Skip to content

Commit

Permalink
Debugging macos fail
Browse files Browse the repository at this point in the history
  • Loading branch information
@adcroft
adcroft committed Mar 26, 2024
1 parent c500197 commit 8fbd85b
Showing 1 changed file with 28 additions and 20 deletions.
48 changes: 28 additions & 20 deletions src/ALE/MOM_remapping.F90
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1710,9 +1710,9 @@ logical function remapping_unit_tests(verbose)
3, (/2., 2., 2./), & ! n1, h1
h_sub, h0_eff, &
isrc_start, isrc_end, isrc_max, itgt_start, itgt_end, isub_src )
write(stdout,*) "intersect_src_tgt_grids test 1: n0=2, n1=3"
write(stdout,*) " h_src = | 3 | 3 |"
write(stdout,*) " h_tgt = | 2 | 2 | 2 |"
if (v) write(stdout,*) "intersect_src_tgt_grids test 1: n0=2, n1=3"
if (v) write(stdout,*) " h_src = | 3 | 3 |"
if (v) write(stdout,*) " h_tgt = | 2 | 2 | 2 |"
remapping_unit_tests = remapping_unit_tests .or. &
test_answer(v, 6, h_sub, (/0.,2.,1.,1.,2.,0./), 'h_sub')
remapping_unit_tests = remapping_unit_tests .or. &
Expand Down Expand Up @@ -1746,9 +1746,9 @@ logical function remapping_unit_tests(verbose)
2, (/3., 3./), & ! n1, h1
h_sub, h0_eff, &
isrc_start, isrc_end, isrc_max, itgt_start, itgt_end, isub_src )
write(stdout,*) "intersect_src_tgt_grids test 2: n0=3, n1=2"
write(stdout,*) " h_src = | 2 | 2 | 2 |"
write(stdout,*) " h_tgt = | 3 | 3 |"
if (v) write(stdout,*) "intersect_src_tgt_grids test 2: n0=3, n1=2"
if (v) write(stdout,*) " h_src = | 2 | 2 | 2 |"
if (v) write(stdout,*) " h_tgt = | 3 | 3 |"
remapping_unit_tests = remapping_unit_tests .or. &
test_answer(v, 6, h_sub, (/0.,2.,1.,1.,2.,0./), 'h_sub')
remapping_unit_tests = remapping_unit_tests .or. &
Expand Down Expand Up @@ -1782,9 +1782,9 @@ logical function remapping_unit_tests(verbose)
3, (/2., 2., 2./), & ! n1, h1
h_sub, h0_eff, &
isrc_start, isrc_end, isrc_max, itgt_start, itgt_end, isub_src )
write(stdout,*) "intersect_src_tgt_grids test 3: n0=2, n1=3"
write(stdout,*) " h_src = | 2 | 4 |"
write(stdout,*) " h_tgt = | 2 | 2 | 2 |"
if (v) write(stdout,*) "intersect_src_tgt_grids test 3: n0=2, n1=3"
if (v) write(stdout,*) " h_src = | 2 | 4 |"
if (v) write(stdout,*) " h_tgt = | 2 | 2 | 2 |"
remapping_unit_tests = remapping_unit_tests .or. &
test_answer(v, 6, h_sub, (/0.,2.,0.,2.,2.,0./), 'h_sub')
remapping_unit_tests = remapping_unit_tests .or. &
Expand Down Expand Up @@ -1841,9 +1841,9 @@ logical function remapping_unit_tests(verbose)
3, (/2., 2., 1./), & ! n1, h1
h_sub, h0_eff, &
isrc_start, isrc_end, isrc_max, itgt_start, itgt_end, isub_src )
write(stdout,*) "intersect_src_tgt_grids test 4: n0=2, n1=3"
write(stdout,*) " h_src = | 2 | 4 |"
write(stdout,*) " h_tgt = | 2 | 2 | 1 |"
if (v) write(stdout,*) "intersect_src_tgt_grids test 4: n0=2, n1=3"
if (v) write(stdout,*) " h_src = | 2 | 4 |"
if (v) write(stdout,*) " h_tgt = | 2 | 2 | 1 |"
remapping_unit_tests = remapping_unit_tests .or. &
test_answer(v, 6, h_sub, (/0.,2.,0.,2.,1.,1./), 'h_sub')
remapping_unit_tests = remapping_unit_tests .or. &
Expand Down Expand Up @@ -1892,9 +1892,9 @@ logical function remapping_unit_tests(verbose)
2, (/2., 4./), & ! n1, h1
h_sub, h0_eff, &
isrc_start, isrc_end, isrc_max, itgt_start, itgt_end, isub_src )
write(stdout,*) "intersect_src_tgt_grids test 5: n0=3, n1=2"
write(stdout,*) " h_src = | 2 | 2 | 1 |"
write(stdout,*) " h_tgt = | 2 | 4 |"
if (v) write(stdout,*) "intersect_src_tgt_grids test 5: n0=3, n1=2"
if (v) write(stdout,*) " h_src = | 2 | 2 | 1 |"
if (v) write(stdout,*) " h_tgt = | 2 | 4 |"
remapping_unit_tests = remapping_unit_tests .or. &
test_answer(v, 6, h_sub, (/0.,2.,0.,2.,1.,1./), 'h_sub')
remapping_unit_tests = remapping_unit_tests .or. &
Expand All @@ -1918,7 +1918,15 @@ logical function remapping_unit_tests(verbose)
! edge = |1 3|3 5|5 6|
! u_sub = |1| 2 |3| 4 | 5.5 | 6 |
call PLM_reconstruction(3, (/2.,2.,1./), (/2.,4.,5.5/), ppoly0_E, ppoly0_coefs, h_neglect )
remapping_unit_tests = remapping_unit_tests .or. &
test_answer(v, 3, ppoly0_E(:,1), (/2.,3.,5.5/), 'ppoly0: left edges')
remapping_unit_tests = remapping_unit_tests .or. &
test_answer(v, 3, ppoly0_E(:,2), (/2.,5.,5.5/), 'ppoly0: right edges')
call PLM_boundary_extrapolation(3, (/2.,2.,1./),(/2.,4.,5.5/), ppoly0_E, ppoly0_coefs, h_neglect)
remapping_unit_tests = remapping_unit_tests .or. &
test_answer(v, 3, ppoly0_E(:,1), (/1.,3.,5./), 'ppoly0: left edges')
remapping_unit_tests = remapping_unit_tests .or. &
test_answer(v, 3, ppoly0_E(:,2), (/3.,5.,6./), 'ppoly0: right edges')
allocate(u_sub(6), uh_sub(6))
call remap_src_to_sub_grid(3, (/2.,2.,1./), (/2.,4.,5.5/), ppoly0_E, ppoly0_coefs, 3, h_sub, &
h0_eff, isrc_start, isrc_end, isrc_max, isub_src, &
Expand All @@ -1943,9 +1951,9 @@ logical function remapping_unit_tests(verbose)
5, (/1., 0., 1., 0., 2./), & ! n1, h1
h_sub, h0_eff, &
isrc_start, isrc_end, isrc_max, itgt_start, itgt_end, isub_src )
write(stdout,*) "intersect_src_tgt_grids test 6: n0=3, n1=5"
write(stdout,*) " h_src = | 2 |0| 2 |"
write(stdout,*) " h_tgt = | 1 |0| 1 |0| 2 |"
if (v) write(stdout,*) "intersect_src_tgt_grids test 6: n0=3, n1=5"
if (v) write(stdout,*) " h_src = | 2 |0| 2 |"
if (v) write(stdout,*) " h_tgt = | 1 |0| 1 |0| 2 |"
remapping_unit_tests = remapping_unit_tests .or. &
test_answer(v, 9, h_sub, (/0.,1.,0.,1.,0.,0.,0.,2.,0./), 'h_sub')
remapping_unit_tests = remapping_unit_tests .or. &
Expand All @@ -1968,8 +1976,8 @@ logical function remapping_unit_tests(verbose)
! This section tests interpolation and reintegration functions
! ============================================================

write(stdout,*) '=== MOM_remapping: interpolation and reintegration unit tests ==='
if (verbose) write(stdout,*) '- - - - - - - - - - interpolation tests - - - - - - - - -'
if (v) write(stdout,*) '=== MOM_remapping: interpolation and reintegration unit tests ==='
if (v) write(stdout,*) '- - - - - - - - - - interpolation tests - - - - - - - - -'

fail = test_interp(verbose, 'Identity: 3 layer', &
3, (/1.,2.,3./), (/1.,2.,3.,4./), &
Expand Down

0 comments on commit 8fbd85b

Please sign in to comment.