From 7f8a3052be11075fa9bdfe53c0aa23d26a13a203 Mon Sep 17 00:00:00 2001 From: BrainBoardz <87398149+BrainBoardz@users.noreply.github.com> Date: Wed, 8 Mar 2023 16:25:18 -0500 Subject: [PATCH 1/5] Updated Pins.c definitions for SPI and I2C Removed "CD" from the pin definitions for (MISO, MOSI and SCK pins). Specifically Pins 13, 15 and 14. Added Pin definitions for I2C and SPI objects --- ports/espressif/boards/brainboardz_neuron/pins.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/ports/espressif/boards/brainboardz_neuron/pins.c b/ports/espressif/boards/brainboardz_neuron/pins.c index b0cbb915632b..31757e184321 100755 --- a/ports/espressif/boards/brainboardz_neuron/pins.c +++ b/ports/espressif/boards/brainboardz_neuron/pins.c @@ -25,13 +25,13 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) }, { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) }, - { MP_ROM_QSTR(MP_QSTR_SD_MISO), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO13) }, { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) }, - { MP_ROM_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO14) }, { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) }, - { MP_ROM_QSTR(MP_QSTR_SD_MOSI), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO15) }, { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) }, { MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_GPIO16) }, @@ -63,6 +63,8 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) }, { MP_ROM_QSTR(MP_QSTR_IO47), MP_ROM_PTR(&pin_GPIO47) }, { MP_ROM_QSTR(MP_QSTR_IO48), MP_ROM_PTR(&pin_GPIO48) }, - + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) } }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); From c133e79a08b336a456e8286a70e22c95a5743e4c Mon Sep 17 00:00:00 2001 From: BrainBoardz <87398149+BrainBoardz@users.noreply.github.com> Date: Wed, 8 Mar 2023 16:31:47 -0500 Subject: [PATCH 2/5] Updated mpconfigboard.h Add #defines for SPI_BUS_SCK, SPI_BUS_MOSI and SPI_BUS.MISO --- ports/espressif/boards/brainboardz_neuron/mpconfigboard.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/ports/espressif/boards/brainboardz_neuron/mpconfigboard.h b/ports/espressif/boards/brainboardz_neuron/mpconfigboard.h index 9507917ead01..47be454d8b23 100755 --- a/ports/espressif/boards/brainboardz_neuron/mpconfigboard.h +++ b/ports/espressif/boards/brainboardz_neuron/mpconfigboard.h @@ -31,3 +31,10 @@ #define DEFAULT_UART_BUS_RX (&pin_GPIO44) #define DEFAULT_UART_BUS_TX (&pin_GPIO43) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO4) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO3) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO14) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO15) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO13) From 1200fe405f9e4e672e12e86daac216376671a777 Mon Sep 17 00:00:00 2001 From: BrainBoardz <87398149+BrainBoardz@users.noreply.github.com> Date: Wed, 8 Mar 2023 16:38:16 -0500 Subject: [PATCH 3/5] Change GPIO pins for SDA and SCL Chnage the SDA pin define to GPIO9 and SCL pin define to GPIO8. This now matches the currect GPIO pins numbers in pins.c The previous GPIO pins number in mpconfigboard.h were incorrect --- ports/espressif/boards/brainboardz_neuron/mpconfigboard.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ports/espressif/boards/brainboardz_neuron/mpconfigboard.h b/ports/espressif/boards/brainboardz_neuron/mpconfigboard.h index 47be454d8b23..72cda83c9b53 100755 --- a/ports/espressif/boards/brainboardz_neuron/mpconfigboard.h +++ b/ports/espressif/boards/brainboardz_neuron/mpconfigboard.h @@ -32,8 +32,8 @@ #define DEFAULT_UART_BUS_RX (&pin_GPIO44) #define DEFAULT_UART_BUS_TX (&pin_GPIO43) -#define DEFAULT_I2C_BUS_SCL (&pin_GPIO4) -#define DEFAULT_I2C_BUS_SDA (&pin_GPIO3) +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO9) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO8) #define DEFAULT_SPI_BUS_SCK (&pin_GPIO14) #define DEFAULT_SPI_BUS_MOSI (&pin_GPIO15) From 6da2ca6770e89a47484ab9a8499ea4830ec45d48 Mon Sep 17 00:00:00 2001 From: BrainBoardz <87398149+BrainBoardz@users.noreply.github.com> Date: Wed, 8 Mar 2023 16:46:31 -0500 Subject: [PATCH 4/5] Update pins.c Added a comma (,) to the the end of the definition for board_spi_obj --- ports/espressif/boards/brainboardz_neuron/pins.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/espressif/boards/brainboardz_neuron/pins.c b/ports/espressif/boards/brainboardz_neuron/pins.c index 31757e184321..b436045b0514 100755 --- a/ports/espressif/boards/brainboardz_neuron/pins.c +++ b/ports/espressif/boards/brainboardz_neuron/pins.c @@ -65,6 +65,6 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_IO48), MP_ROM_PTR(&pin_GPIO48) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) } + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); From 005436278473f6326e41b79edbc612ab5d26b22a Mon Sep 17 00:00:00 2001 From: BrainBoardz <87398149+BrainBoardz@users.noreply.github.com> Date: Thu, 9 Mar 2023 10:26:54 -0500 Subject: [PATCH 5/5] Updated Pin Assignments (Add SPI definition) Changed incorrect i2C pins assignment in mpconfigboard.h (changed SDA/SCL to GPIO 8/GPIO 9. Rename SD_MOSI, SD_MISO and SD_SCK to MOSI, MISO and SCK Added SPI define in mpconfigboard.h for SPI --- ports/espressif/boards/brainboardz_neuron/pins.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/espressif/boards/brainboardz_neuron/pins.c b/ports/espressif/boards/brainboardz_neuron/pins.c index b436045b0514..5c198c20a707 100755 --- a/ports/espressif/boards/brainboardz_neuron/pins.c +++ b/ports/espressif/boards/brainboardz_neuron/pins.c @@ -63,7 +63,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) }, { MP_ROM_QSTR(MP_QSTR_IO47), MP_ROM_PTR(&pin_GPIO47) }, { MP_ROM_QSTR(MP_QSTR_IO48), MP_ROM_PTR(&pin_GPIO48) }, - + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, };