From 0374e99484116ea8f5e1de5926a939a80eca6b3e Mon Sep 17 00:00:00 2001 From: "U-ANALOG\\BHurst" Date: Wed, 14 Aug 2024 14:29:27 -0700 Subject: [PATCH 01/39] Initial commit for ADI MAX32690 support. Still many modules to implement/unstub, but builds clean. --- .gitmodules | 3 + ports/analog/Makefile | 261 +++++++++++ ports/analog/README.md | 52 +++ ports/analog/background.c | 28 ++ ports/analog/background.h | 10 + ports/analog/boards/APARD/README.md | 14 + ports/analog/boards/APARD/board.c | 9 + ports/analog/boards/APARD/mpconfigboard.h | 31 ++ ports/analog/boards/APARD/mpconfigboard.mk | 18 + ports/analog/boards/APARD/pins.c | 125 ++++++ ports/analog/common-hal/board/__init__.c | 5 + ports/analog/common-hal/microcontroller/Pin.c | 34 ++ ports/analog/common-hal/microcontroller/Pin.h | 14 + .../common-hal/microcontroller/Processor.c | 36 ++ .../common-hal/microcontroller/Processor.h | 16 + .../common-hal/microcontroller/__init__.c | 410 ++++++++++++++++++ ports/analog/common-hal/os/__init__.c | 50 +++ ports/analog/linking/max32690_cktpy.ld | 160 +++++++ ports/analog/mpconfigport.h | 36 ++ ports/analog/mpconfigport.mk | 85 ++++ ports/analog/mphalport.c | 15 + ports/analog/mphalport.h | 22 + ports/analog/msdk | 1 + ports/analog/peripherals/max32690/pins.c | 119 +++++ ports/analog/peripherals/max32690/pins.h | 114 +++++ ports/analog/peripherals/pins.h | 34 ++ ports/analog/qstrdefsport.h | 10 + ports/analog/supervisor/cpu.s | 27 ++ ports/analog/supervisor/internal_flash.c | 289 ++++++++++++ ports/analog/supervisor/internal_flash.h | 16 + ports/analog/supervisor/port.c | 167 +++++++ ports/analog/supervisor/serial.c | 61 +++ tools/ci_fetch_deps.py | 6 + 33 files changed, 2278 insertions(+) create mode 100644 ports/analog/Makefile create mode 100644 ports/analog/README.md create mode 100644 ports/analog/background.c create mode 100644 ports/analog/background.h create mode 100644 ports/analog/boards/APARD/README.md create mode 100644 ports/analog/boards/APARD/board.c create mode 100644 ports/analog/boards/APARD/mpconfigboard.h create mode 100644 ports/analog/boards/APARD/mpconfigboard.mk create mode 100644 ports/analog/boards/APARD/pins.c create mode 100644 ports/analog/common-hal/board/__init__.c create mode 100644 ports/analog/common-hal/microcontroller/Pin.c create mode 100644 ports/analog/common-hal/microcontroller/Pin.h create mode 100644 ports/analog/common-hal/microcontroller/Processor.c create mode 100644 ports/analog/common-hal/microcontroller/Processor.h create mode 100644 ports/analog/common-hal/microcontroller/__init__.c create mode 100644 ports/analog/common-hal/os/__init__.c create mode 100644 ports/analog/linking/max32690_cktpy.ld create mode 100644 ports/analog/mpconfigport.h create mode 100644 ports/analog/mpconfigport.mk create mode 100644 ports/analog/mphalport.c create mode 100644 ports/analog/mphalport.h create mode 160000 ports/analog/msdk create mode 100644 ports/analog/peripherals/max32690/pins.c create mode 100644 ports/analog/peripherals/max32690/pins.h create mode 100644 ports/analog/peripherals/pins.h create mode 100644 ports/analog/qstrdefsport.h create mode 100644 ports/analog/supervisor/cpu.s create mode 100644 ports/analog/supervisor/internal_flash.c create mode 100644 ports/analog/supervisor/internal_flash.h create mode 100644 ports/analog/supervisor/port.c create mode 100644 ports/analog/supervisor/serial.c diff --git a/.gitmodules b/.gitmodules index c01f23dbe6e1..2185e9207941 100644 --- a/.gitmodules +++ b/.gitmodules @@ -407,3 +407,6 @@ [submodule "frozen/Adafruit_CircuitPython_Wiznet5k"] path = frozen/Adafruit_CircuitPython_Wiznet5k url = https://github.com/adafruit/Adafruit_CircuitPython_Wiznet5k +[submodule "ports/analog/msdk"] + path = ports/analog/msdk + url = https://github.com/analogdevicesinc/msdk.git diff --git a/ports/analog/Makefile b/ports/analog/Makefile new file mode 100644 index 000000000000..b348a57d237f --- /dev/null +++ b/ports/analog/Makefile @@ -0,0 +1,261 @@ +# This file is part of the CircuitPython project: https://circuitpython.org +# +# SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries +# +# SPDX-License-Identifier: MIT + +# Includes mpconfigboard.mk & mpconfigport.mk, +# along with numerous other shared environment makefiles. +include ../../py/circuitpy_mkenv.mk + +CROSS_COMPILE = arm-none-eabi- + +# MCU_SERIES e.g. "max32" +# MCU_VARIANT e.g. "max32690" +# defined in mpconfigboard.mk +MCU_SERIES_LOWER := $(shell echo $(MCU_SERIES) | tr '[:upper:]' '[:lower:]') +MCU_SERIES_UPPER := $(shell echo $(MCU_SERIES) | tr '[:lower:]' '[:upper:]') +MCU_VARIANT_LOWER := $(shell echo $(MCU_VARIANT) | tr '[:upper:]' '[:lower:]') +MCU_VARIANT_UPPER := $(shell echo $(MCU_VARIANT) | tr '[:lower:]' '[:upper:]') + +# ******************************************************************************* +#### MSDK INCLUDES #### +# Necessary for msdk makefiles +TARGET := $(MCU_VARIANT_UPPER) +TARGET_UC := $(MCU_VARIANT_UPPER) +TARGET_LC := $(MCU_VARIANT_LOWER) + +MSDK_ROOT = ./msdk +MSDK_LIBS = $(MSDK_ROOT)/Libraries +CMSIS_ROOT = $(MSDK_LIBS)/CMSIS +ADI_PERIPH = $(MSDK_ROOT)/Libraries/PeriphDrivers +ADI_MISC_DRIVERS_DIR ?= $(MSDK_LIBS)/MiscDrivers +ADI_BOARD_DIR = $(MSDK_LIBS)/Boards/$(MCU_VARIANT_UPPER)/$(BOARD) + +# For debugging the build +ifneq ($(BUILD_VERBOSE),"") +$(info MSDK_ROOT is $(MSDK_ROOT)) +$(info MSDK_LIBS is $(MSDK_LIBS)) +$(info CMSIS_ROOT is $(CMSIS_ROOT)) +$(info ADI_PERIPH is $(ADI_PERIPH)) +$(info ADI_MISC_DRIVERS_DIR is $(ADI_MISC_DRIVERS_DIR)) +$(info ADI_BOARD_DIR is $(ADI_BOARD_DIR)) +$(info MAXIM_PATH is $(MAXIM_PATH)) +endif + +# ----------------- +# Sources & Include +# ----------------- +# Define max32 die type for PeriphDriver Includes +# default to me18 for max32690 +# more info: +# https://analogdevicesinc.github.io/msdk//USERGUIDE/#die-types-to-part-numbers +ifeq ($(MCU_VARIANT_LOWER), "max32690") +DIE_TYPE=me18 +else +DIE_TYPE=me18 +endif + +PERIPH_SRC = $(ADI_PERIPH)/Source + +INC += -I. +INC += -I../.. +INC += -I$(BUILD) +INC += -I$(BUILD)/genhdr +INC += -I./../../lib/cmsis/inc +INC += -I./boards/ +INC += -I./boards/$(BOARD) +INC += -I./peripherals/ +INC += -I../../lib/mp-readline + +INC += \ + -I$(TOP)/$(BOARD_PATH) \ + -I$(TOP)/lib/cmsis/inc \ + -I$(CMSIS_ROOT)/Include \ + -I$(CMSIS_ROOT)/Device/Maxim/$(MCU_VARIANT_UPPER)/Include \ + -I$(ADI_PERIPH)/Include/$(MCU_VARIANT_UPPER) \ + -I$(PERIPH_SRC)/SYS \ + -I$(PERIPH_SRC)/GPIO \ + -I$(PERIPH_SRC)/CTB \ + -I$(PERIPH_SRC)/ICC \ + -I$(PERIPH_SRC)/FLC \ + -I$(PERIPH_SRC)/UART \ + +INC += -I$(CMSIS_ROOT)/Device/Maxim/$(MCU_VARIANT_UPPER)/Source/GCC + +SRC_MAX32 += \ + $(CMSIS_ROOT)/Device/Maxim/$(MCU_VARIANT_UPPER)/Source/heap.c \ + $(CMSIS_ROOT)/Device/Maxim/$(MCU_VARIANT_UPPER)/Source/system_$(MCU_VARIANT_LOWER).c \ + $(PERIPH_SRC)/SYS/mxc_assert.c \ + $(PERIPH_SRC)/SYS/mxc_delay.c \ + $(PERIPH_SRC)/SYS/mxc_lock.c \ + $(PERIPH_SRC)/SYS/nvic_table.c \ + $(PERIPH_SRC)/SYS/pins_$(DIE_TYPE).c \ + $(PERIPH_SRC)/SYS/sys_$(DIE_TYPE).c \ + $(PERIPH_SRC)/CTB/ctb_$(DIE_TYPE).c \ + $(PERIPH_SRC)/CTB/ctb_reva.c \ + $(PERIPH_SRC)/CTB/ctb_common.c \ + $(PERIPH_SRC)/FLC/flc_common.c \ + $(PERIPH_SRC)/FLC/flc_$(DIE_TYPE).c \ + $(PERIPH_SRC)/FLC/flc_reva.c \ + $(PERIPH_SRC)/GPIO/gpio_common.c \ + $(PERIPH_SRC)/GPIO/gpio_$(DIE_TYPE).c \ + $(PERIPH_SRC)/GPIO/gpio_reva.c \ + $(PERIPH_SRC)/ICC/icc_$(DIE_TYPE).c \ + $(PERIPH_SRC)/ICC/icc_reva.c \ + $(PERIPH_SRC)/UART/uart_common.c \ + $(PERIPH_SRC)/UART/uart_$(DIE_TYPE).c \ + $(PERIPH_SRC)/UART/uart_revb.c \ + +SRC_C += $(SRC_MAX32) \ + boards/$(BOARD)/board.c \ + boards/$(BOARD)/pins.c \ + peripherals/$(MCU_VARIANT_LOWER)/pins.c \ + +# ******************************************************************************* +### Compiler & Linker Flags ### +COMPILER ?= GCC + +ifeq ($(COMPILER), GCC) + +STARTUPFILE = $(CMSIS_ROOT)/Device/Maxim/$(MCU_VARIANT_UPPER)/Source/GCC/startup_$(MCU_VARIANT_LOWER).s +# STARTUPFILE = $(ADI_BOARD_DIR)/Source/startup_$(MCU_VARIANT_LOWER).s + +# CircuitPython custom linkerfile (necessary for build steps & filesystems) +LINKERFILE = linking/$(MCU_VARIANT_LOWER)_cktpy.ld +LDFLAGS += -nostartfiles -specs=nosys.specs -specs=nano.specs +endif + +SRC_S += supervisor/cpu.s \ + $(STARTUPFILE) + +# Needed to compile some MAX32 headers +CFLAGS += -D$(MCU_VARIANT_UPPER) \ + -DTARGET_REV=0x4131 \ + -DTARGET=$(MCU_VARIANT_UPPER) \ + -DIAR_PRAGMAS=0 \ + # -DFLASH_ORIGIN=0x10000000 \ + # -DFLASH_SIZE=0x340000 \ + # -DSRAM_ORIGIN=0x20000000 \ + # -DSRAM_SIZE=0x100000 \ + +CPU_CORE=cortex-m4 +CFLAGS += -mthumb -mcpu=$(CPU_CORE) -mfloat-abi=hard -mfpu=fpv4-sp-d16 + +# NOTE: Start with DEBUG ONLY settings for now +ifeq ($(DEBUG),) +DEBUG ?= 1 +endif + +ifeq ($(DEBUG),1) +CFLAGS += -ggdb3 +COPT = -Og +else +COPT += -O2 +endif + + +# TinyUSB CFLAGS +CFLAGS += \ + -DCFG_TUSB_MCU=OPT_MCU_$(MCU_VARIANT_UPPER) \ + -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED \ + +# TODO: Add for TinyUSB once our PR goes through for MAX32 devices +# Add TinyUSB +# INC += -I../../lib/tinyusb/src +# INC += -I../../supervisor/shared/usb +# SRC_C += lib/tinyusb/src/portable/mentor/musb/dcd_musb.c + +SRC_C += \ + boards/$(BOARD)/board.c \ + background.c \ + mphalport.c \ + +CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostartfiles $(BASE_CFLAGS) $(COPT) + +# Suppress some warnings for MSDK +CFLAGS += -Wno-error=unused-parameter \ + -Wno-error=old-style-declaration \ + -Wno-error=sign-compare \ + -Wno-error=strict-prototypes \ + -Wno-error=cast-qual \ + -Wno-unused-variable \ + -Wno-lto-type-mismatch \ + -Wno-cast-align \ + -Wno-nested-externs \ + -Wno-sign-compare + +LDFLAGS += $(CFLAGS) -Wl,-nostdlib -Wl,-T,$(LINKERFILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections +LIBS := -lgcc -lc + +# If not using CKTPY mathlib, use toolchain mathlib +ifndef INTERNAL_LIBM +LIBS += -lm +endif + +# ******************************************************************************* +### PORT-DEFINED BUILD RULES ### +# This section attempts to build the Python core, the supervisor, and any +# port-provided source code. +# +# QSTR sources are provided for the initial build step, which generates +# Python constants to represent C data which gets passed into the GC. + +SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ + $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ + $(addprefix common-hal/, $(SRC_COMMON_HAL)) + +SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) + +# There are duplicates between SRC_COMMON_HAL_EXPANDED and SRC_SHARED_MODULE_EXPANDED, +# because a few modules have files both in common-hal/ and shared-module/. +# Doing a $(sort ...) removes duplicates as part of sorting. +SRC_COMMON_HAL_SHARED_MODULE_EXPANDED = $(sort $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED)) + +# OBJ includes +OBJ += $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_SHARED_MODULE_EXPANDED:.c=.o)) +ifeq ($(INTERNAL_LIBM),1) +OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) +endif +OBJ += $(addprefix $(BUILD)/, $(SRC_CIRCUITPY_COMMON:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) + +# List of sources for qstr extraction +SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_CIRCUITPY_COMMON) \ + $(SRC_COMMON_HAL_SHARED_MODULE_EXPANDED) $(SRC_MOD) +# Sources that only hold QSTRs after pre-processing. +SRC_QSTR_PREPROCESSOR += + +# Default build target +all: $(BUILD)/firmware.elf + +clean-max32: + rm -rf build-* + +# Optional flash option when running within an installed MSDK to use OpenOCD +# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated. +# If the MSDK is installed, flash-msdk can be run to utilize the the modified +# openocd with the algorithms +MAXIM_PATH := $(subst \,/,$(MAXIM_PATH)) +flash-msdk: + $(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \ + -f interface/cmsis-dap.cfg -f target/$(MCU_VARIANT_LOWER).cfg \ + -c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit" + +# flash target using JLink +JLINK_DEVICE = $(MCU_VARIANT_LOWER) +flash: flash-jlink + +$(BUILD)/firmware.elf: $(OBJ) $(LINKERFILE) + $(STEPECHO) "LINK $@" + $(Q)echo $(OBJ) > $(BUILD)/firmware.objs + $(Q)$(CC) -o $@ $(LDFLAGS) @$(BUILD)/firmware.objs -Wl,--print-memory-usage -Wl,--start-group $(LIBS) -Wl,--end-group + $(Q)$(SIZE) $@ | $(PYTHON) $(TOP)/tools/build_memory_info.py $(LINKERFILE) $(BUILD) + +# ******************************************************************************* +### CKTPY BUILD RULES ### +include $(TOP)/py/mkrules.mk diff --git a/ports/analog/README.md b/ports/analog/README.md new file mode 100644 index 000000000000..0e5d3f7d2951 --- /dev/null +++ b/ports/analog/README.md @@ -0,0 +1,52 @@ +# Analog Devices "MAX32" MCUs + +This port brings CircuitPython to ADI's "MAX32" series of microcontrollers. These devices are mostly ARM Cortex-M4-based and focus on delivering performance at low-power levels. Currently this port only supports MAX32690. + +### Structure of this port + +- **`boards/:`** Board-specific definitions including pins, board initialization, etc. +- **`common-hal/:`** Port-specific implementations of CircuitPython common-hal APIs. When a new module is enabled, this is often where the implementation is found. Expected functions for modules in `common-hal` are usually found in `shared-bindings/` or `shared-module/` in the CircuitPy root directory. +- **`linking/:`** Linkerfiles customized for CircuitPython. These are distinct from the linkerfiles used in MSDK as they adopt the structure required by CircuitPython. They may also omit unused features and memory sections, e.g. Mailboxes, RISC-V Flash, & Hyperbus RAM for MAX32690. +- **`msdk:/`** SDK for MAX32 devices. More info on our GitHub: [Analog Devices MSDK GitHub](https://github.com/analogdevicesinc/msdk) +- **`peripherals:/`** Helper files for peripherals such as clocks, gpio, etc. These files tend to be specific to vendor SDKs and provide some useful functions for the common-hal interfaces. +- **`supervisor/:`** Implementation files for the CircuitPython supervisor. This includes port setup, usb, and a filesystem on a storage medium such as SD Card/eMMC, QSPI Flash, or internal flash memory. Currently the internal flash is used. + +- `. :` Build system and high-level interface to the CircuitPython core for the ADI port. + +### Building for MAX32 devices + +Ensure CircuitPython dependencies are up-to-date by following the CircuitPython introduction on Adafruit's Website: [Building CircuitPython - Introduction](https://learn.adafruit.com/building-circuitpython/introduction). In particular, it is necessary to fetch all submodules (including the ARM Toolchain inside MSDK) and build the `mpy-cross` compiler. + +Ensure the MSDK's ARM toolchain is contained on your PATH. This can be done in MinGW or WSL by exporting a prefix to the PATH variable: + + $ export MSDK_GNU_PATH=/ports/analog/msdk/Tools/GNUTools/10.3/bin + $ export PATH=$MSDK_GNU_PATH:$PATH + +This needs to be done each time you open a command environment to build CircuitPython. + +Once you have built `mpy-cross` and set up your build system for CircuitPython, you can build for MAX32 devices using the following commands: + + $ cd ports/analog + $ make BOARD= + +Be aware the build may take a long time without parallelizing via the `-jN` flag, where N is the # of cores on your machine. + +### Flashing the board + +Universal instructions on flashing MAX32 devices this project can be found in the **[MSDK User Guide](https://analogdevicesinc.github.io/msdk/USERGUIDE/)**. + +In addition, a user may flash the device by calling `make` with the `flash-msdk` target from within the `ports/analog` directory, as below: + + $ make BOARD= flash-msdk + +This requires the following: +- A MAX32625PICO is connected to the PC via USB +- The PICO board shows up as a "DAPLINK" drive which implements the CMSIS-DAP interface. +- The PICO board is connected to the target board via a 10-pin SWD ribbon cable. + - If SWD connectors are not keyed, the P1 indicator (red line) on the SWD ribbon cable should match the P1 indicator on the board silkscreen near the 10-pin SWD connector. + +[**Section in Progress.**] + +### Using the REPL + +[**Section in Progress. Review & Testing are needed.**] diff --git a/ports/analog/background.c b/ports/analog/background.c new file mode 100644 index 000000000000..ccf71bf77bf5 --- /dev/null +++ b/ports/analog/background.c @@ -0,0 +1,28 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#include "py/runtime.h" +#include "supervisor/filesystem.h" +#include "supervisor/usb.h" +#include "supervisor/shared/stack.h" + +//TODO: IMPLEMENT + +void port_background_task(void) { + return; +} + +void port_background_tick(void) { + return; +} + +void port_start_background_tick(void) { + return; +} + +void port_finish_background_tick(void) { + return; +} diff --git a/ports/analog/background.h b/ports/analog/background.h new file mode 100644 index 000000000000..8fbe98bd9d8e --- /dev/null +++ b/ports/analog/background.h @@ -0,0 +1,10 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2019 Dan Halbert for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#ifndef MICROPY_INCLUDED_BACKGROUND_H +#define MICROPY_INCLUDED_BACKGROUND_H + +#endif // MICROPY_INCLUDED_BACKGROUND_H diff --git a/ports/analog/boards/APARD/README.md b/ports/analog/boards/APARD/README.md new file mode 100644 index 000000000000..8768ed93d56d --- /dev/null +++ b/ports/analog/boards/APARD/README.md @@ -0,0 +1,14 @@ +# AD-APARD32690-SL + +This board features the MAX32690, a dual-core ARM Cortex-M4/RISC-V MCU with 3MiB Flash, 1MiB SRAM. The board also has support for 10BASE-T1L Ethernet, Wifi, Bluetooth, USB, and Security via MAXQ1065. However, most of these features are not yet available for this CircuitPython port (USB will be added soon; others are currently unplanned). + +### Onboard connectors & peripherals + +This board comes in a form-factor similar to an Arduino Mega, enabling Arduino-style shield boards to be plugged in and evaluated with the MAX32690. This vastly opens up the options for easily plugging peripherals into the board, especially when combined with the two Pmod:tm: connectors, P8 (SPI) and P13 (I2C). + +### Product Resources + +For more info about AD-APARD32690-SL, visit our product webpages for datasheets, User Guides, Software, and Design Documents: + +[AD-APARD32690-SL Product Webpage](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/ad-apard32690-sl.html) +[AD-APARD32690-SL User Guide](https://wiki.analog.com/resources/eval/user-guides/ad-apard32690-sl) diff --git a/ports/analog/boards/APARD/board.c b/ports/analog/boards/APARD/board.c new file mode 100644 index 000000000000..b44a1ae51e04 --- /dev/null +++ b/ports/analog/boards/APARD/board.c @@ -0,0 +1,9 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#include "supervisor/board.h" + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. diff --git a/ports/analog/boards/APARD/mpconfigboard.h b/ports/analog/boards/APARD/mpconfigboard.h new file mode 100644 index 000000000000..b22c7ab9ecc6 --- /dev/null +++ b/ports/analog/boards/APARD/mpconfigboard.h @@ -0,0 +1,31 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2016 Glenn Ruben Bakke +// SPDX-FileCopyrightText: Copyright (c) 2018 Dan Halbert for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#pragma once + +#define MICROPY_HW_BOARD_NAME "APARD32690" +#define MICROPY_HW_MCU_NAME "max32690" + +#define FLASH_SIZE (0x300000) // 3MiB +#define FLASH_PAGE_SIZE (0x4000) // 16384 byte pages (16 KiB) + +#define BOARD_HAS_CRYSTAL 1 + +// todo: figure out a way to smartly set this up based on storage considerations +#if INTERNAL_FLASH_FILESYSTEM +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (0x10032000) // for MAX32690 +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (64 * 1024) // 64K +#else +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) +#endif diff --git a/ports/analog/boards/APARD/mpconfigboard.mk b/ports/analog/boards/APARD/mpconfigboard.mk new file mode 100644 index 000000000000..7e5465e69422 --- /dev/null +++ b/ports/analog/boards/APARD/mpconfigboard.mk @@ -0,0 +1,18 @@ +# This file is part of the CircuitPython project: https://circuitpython.org +# +# SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries +# +# SPDX-License-Identifier: MIT + +INTERNAL_FLASH_FILESYSTEM = 1 +# FLASH: 0x10000000 to 0x10340000 +# SRAM: 0x20000000 to 0x20100000 + +USB_PRODUCT = "MAX32690 APARD" +USB_MANUFACTURER = "Analog Devices, Inc." +# CFLAGS+=-DEXT_FLASH_MX25 + +MCU_SERIES=max32 +MCU_VARIANT=max32690 + +CFLAGS += -DHAS_TRNG=1 diff --git a/ports/analog/boards/APARD/pins.c b/ports/analog/boards/APARD/pins.c new file mode 100644 index 000000000000..ddd2afdafe58 --- /dev/null +++ b/ports/analog/boards/APARD/pins.c @@ -0,0 +1,125 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#include "shared-bindings/board/__init__.h" + +static const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + //P0 + { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_PA16), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_PA17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_PA18), MP_ROM_PTR(&pin_P0_18) }, + { MP_ROM_QSTR(MP_QSTR_PA19), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_PA20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_PA21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_PA22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_PA23), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_PA24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_PA25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_PA26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_PA27), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_PA28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_PA29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_PA30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_PA31), MP_ROM_PTR(&pin_P0_31) }, + //P1 + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_PB16), MP_ROM_PTR(&pin_P1_16) }, + { MP_ROM_QSTR(MP_QSTR_PB17), MP_ROM_PTR(&pin_P1_17) }, + { MP_ROM_QSTR(MP_QSTR_PB18), MP_ROM_PTR(&pin_P1_18) }, + { MP_ROM_QSTR(MP_QSTR_PB19), MP_ROM_PTR(&pin_P1_19) }, + { MP_ROM_QSTR(MP_QSTR_PB20), MP_ROM_PTR(&pin_P1_20) }, + { MP_ROM_QSTR(MP_QSTR_PB21), MP_ROM_PTR(&pin_P1_21) }, + { MP_ROM_QSTR(MP_QSTR_PB22), MP_ROM_PTR(&pin_P1_22) }, + { MP_ROM_QSTR(MP_QSTR_PB23), MP_ROM_PTR(&pin_P1_23) }, + { MP_ROM_QSTR(MP_QSTR_PB24), MP_ROM_PTR(&pin_P1_24) }, + { MP_ROM_QSTR(MP_QSTR_PB25), MP_ROM_PTR(&pin_P1_25) }, + { MP_ROM_QSTR(MP_QSTR_PB26), MP_ROM_PTR(&pin_P1_26) }, + { MP_ROM_QSTR(MP_QSTR_PB27), MP_ROM_PTR(&pin_P1_27) }, + { MP_ROM_QSTR(MP_QSTR_PB28), MP_ROM_PTR(&pin_P1_28) }, + { MP_ROM_QSTR(MP_QSTR_PB29), MP_ROM_PTR(&pin_P1_29) }, + { MP_ROM_QSTR(MP_QSTR_PB30), MP_ROM_PTR(&pin_P1_30) }, + { MP_ROM_QSTR(MP_QSTR_PB31), MP_ROM_PTR(&pin_P1_31) }, + //P2 + { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_P2_00) }, + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_P2_01) }, + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_P2_02) }, + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_P2_03) }, + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_P2_04) }, + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_P2_05) }, + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_P2_06) }, + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_P2_07) }, + { MP_ROM_QSTR(MP_QSTR_PC08), MP_ROM_PTR(&pin_P2_08) }, + { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_P2_09) }, + { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_P2_10) }, + { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_P2_11) }, + { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_P2_12) }, + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_P2_13) }, + { MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_P2_14) }, + { MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_P2_15) }, + { MP_ROM_QSTR(MP_QSTR_PC16), MP_ROM_PTR(&pin_P2_16) }, + { MP_ROM_QSTR(MP_QSTR_PC17), MP_ROM_PTR(&pin_P2_17) }, + { MP_ROM_QSTR(MP_QSTR_PC18), MP_ROM_PTR(&pin_P2_18) }, + { MP_ROM_QSTR(MP_QSTR_PC19), MP_ROM_PTR(&pin_P2_19) }, + { MP_ROM_QSTR(MP_QSTR_PC20), MP_ROM_PTR(&pin_P2_20) }, + { MP_ROM_QSTR(MP_QSTR_PC21), MP_ROM_PTR(&pin_P2_21) }, + { MP_ROM_QSTR(MP_QSTR_PC22), MP_ROM_PTR(&pin_P2_22) }, + { MP_ROM_QSTR(MP_QSTR_PC23), MP_ROM_PTR(&pin_P2_23) }, + { MP_ROM_QSTR(MP_QSTR_PC24), MP_ROM_PTR(&pin_P2_24) }, + { MP_ROM_QSTR(MP_QSTR_PC25), MP_ROM_PTR(&pin_P2_25) }, + { MP_ROM_QSTR(MP_QSTR_PC26), MP_ROM_PTR(&pin_P2_26) }, + { MP_ROM_QSTR(MP_QSTR_PC27), MP_ROM_PTR(&pin_P2_27) }, + { MP_ROM_QSTR(MP_QSTR_PC28), MP_ROM_PTR(&pin_P2_28) }, + { MP_ROM_QSTR(MP_QSTR_PC29), MP_ROM_PTR(&pin_P2_29) }, + { MP_ROM_QSTR(MP_QSTR_PC30), MP_ROM_PTR(&pin_P2_30) }, + { MP_ROM_QSTR(MP_QSTR_PC31), MP_ROM_PTR(&pin_P2_31) }, + //P3 + { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_P3_00) }, + { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_P3_01) }, + { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_P3_02) }, + { MP_ROM_QSTR(MP_QSTR_PD03), MP_ROM_PTR(&pin_P3_03) }, + { MP_ROM_QSTR(MP_QSTR_PD04), MP_ROM_PTR(&pin_P3_04) }, + { MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_P3_05) }, + { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_P3_06) }, + { MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_P3_07) }, + { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_P3_08) }, + { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_P3_09) }, + //P4 + { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_P4_00) }, + { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_P4_01) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/analog/common-hal/board/__init__.c b/ports/analog/common-hal/board/__init__.c new file mode 100644 index 000000000000..bcae8371c18c --- /dev/null +++ b/ports/analog/common-hal/board/__init__.c @@ -0,0 +1,5 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2018 Dan Halbert for Adafruit Industries +// +// SPDX-License-Identifier: MIT diff --git a/ports/analog/common-hal/microcontroller/Pin.c b/ports/analog/common-hal/microcontroller/Pin.c new file mode 100644 index 000000000000..bc1ef9d70efc --- /dev/null +++ b/ports/analog/common-hal/microcontroller/Pin.c @@ -0,0 +1,34 @@ + +#include + +#include "shared-bindings/microcontroller/Pin.h" +// #include "shared-bindings/digitalio/DigitalInOut.h" + + +// #include "gpio.h" + + +//FIXME: Implement +void reset_all_pins(void) { + return; +} + +// FIXME: Implement +void reset_pin_number(uint8_t pin) { + return; +} + +// FIXME: Implement +void claim_pin(const mcu_pin_obj_t *pin) { + return; +} + +// FIXME: Implement +bool pin_number_is_free(uint8_t pin_number) { + return true; +} + +// FIXME: Implement +void never_reset_pin_number(uint8_t pin_number) { + return; +} diff --git a/ports/analog/common-hal/microcontroller/Pin.h b/ports/analog/common-hal/microcontroller/Pin.h new file mode 100644 index 000000000000..6089a94e0c11 --- /dev/null +++ b/ports/analog/common-hal/microcontroller/Pin.h @@ -0,0 +1,14 @@ + +#pragma once + +#include "py/mphal.h" + +#include "peripherals/pins.h" + +void reset_all_pins(void); +// reset_pin_number takes the pin number instead of the pointer so that objects don't +// need to store a full pointer. +void reset_pin_number(uint8_t pin); +void claim_pin(const mcu_pin_obj_t *pin); +bool pin_number_is_free(uint8_t pin_number); +void never_reset_pin_number(uint8_t pin_number); diff --git a/ports/analog/common-hal/microcontroller/Processor.c b/ports/analog/common-hal/microcontroller/Processor.c new file mode 100644 index 000000000000..1bdcceeeb74c --- /dev/null +++ b/ports/analog/common-hal/microcontroller/Processor.c @@ -0,0 +1,36 @@ + + +#include +#include "py/runtime.h" + +#if CIRCUITPY_ALARM +#include "common-hal/alarm/__init__.h" +#endif + +#include "common-hal/microcontroller/Processor.h" +#include "shared-bindings/microcontroller/ResetReason.h" + +#include "system_max32690.h" + +// +float common_hal_mcu_processor_get_temperature(void) { + return NAN; +} + +// TODO: Determine if there's a means of getting core voltage +float common_hal_mcu_processor_get_voltage(void) { + return NAN; +} + +uint32_t common_hal_mcu_processor_get_frequency(void) { + return SystemCoreClock; +} + +void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { + return; +} + +// TODO: May need to add reset reason in alarm / deepsleep cases +mcu_reset_reason_t common_hal_mcu_processor_get_reset_reason(void) { + return RESET_REASON_UNKNOWN; +} diff --git a/ports/analog/common-hal/microcontroller/Processor.h b/ports/analog/common-hal/microcontroller/Processor.h new file mode 100644 index 000000000000..aab7727550a9 --- /dev/null +++ b/ports/analog/common-hal/microcontroller/Processor.h @@ -0,0 +1,16 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Dan Halbert for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#pragma once + +#define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH 12 + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} mcu_processor_obj_t; diff --git a/ports/analog/common-hal/microcontroller/__init__.c b/ports/analog/common-hal/microcontroller/__init__.c new file mode 100644 index 000000000000..f15ef9bcecc3 --- /dev/null +++ b/ports/analog/common-hal/microcontroller/__init__.c @@ -0,0 +1,410 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2016 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2019 Lucian Copeland for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/microcontroller/Processor.h" + +// #include "shared-bindings/nvm/ByteArray.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/Processor.h" +#include "supervisor/port.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/safe_mode.h" + + +#include "max32690.h" +/** NOTE: It is not advised to directly include the below! + * These are includes taken care of by the core cmsis file. + * e.g. "max32690.h". Since CMSIS is compiled as lib, these are + * included there as for example. +*/ +// #include "core_cmFunc.h" // For enable/disable interrupts +// #include "core_cm4.h" // For NVIC_SystemReset +// #include "core_cmInstr.h" // For __DMB Data Memory Barrier + +void common_hal_mcu_delay_us(uint32_t delay) { + // uint32_t ticks_per_us = HAL_RCC_GetSysClockFreq() / 1000000UL; + // delay *= ticks_per_us; + // SysTick->VAL = 0UL; + // SysTick->LOAD = delay; + // SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk; + // while ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0) { + // } + // SysTick->CTRL = 0UL; +} + +volatile uint32_t nesting_count = 0; + +void common_hal_mcu_disable_interrupts(void) { + __disable_irq(); + __DMB(); + nesting_count++; +} + +void common_hal_mcu_enable_interrupts(void) { + if (nesting_count == 0) { + // This is very very bad because it means there was mismatched disable/enables. + reset_into_safe_mode(SAFE_MODE_INTERRUPT_ERROR); + } + nesting_count--; + if (nesting_count > 0) { + return; + } + __DMB(); + __enable_irq(); +} + +static bool next_reset_to_bootloader = false; + +void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { + if (runmode == RUNMODE_SAFE_MODE) { + safe_mode_on_next_reset(SAFE_MODE_PROGRAMMATIC); + } + if (runmode == RUNMODE_BOOTLOADER) { + next_reset_to_bootloader = true; + } +} + +void common_hal_mcu_reset(void) { + + if (next_reset_to_bootloader) { + reset_to_bootloader(); + } else { + NVIC_SystemReset(); + } +} + +// The singleton microcontroller.Processor object, bound to microcontroller.cpu +// It currently only has properties, and no state. +const mcu_processor_obj_t common_hal_mcu_processor_obj = { + .base = { + .type = &mcu_processor_type, + }, +}; + +// This maps MCU pin names to pin objects. +static const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { + #if defined(PIN_PA01) && !defined(IGNORE_PIN_PA01) + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + #endif + #if defined(PIN_PA02) && !defined(IGNORE_PIN_PA02) + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + #endif + #if defined(PIN_PA03) && !defined(IGNORE_PIN_PA03) + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + #endif + #if defined(PIN_PA04) && !defined(IGNORE_PIN_PA04) + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + #endif + #if defined(PIN_PA05) && !defined(IGNORE_PIN_PA05) + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + #endif + #if defined(PIN_PA06) && !defined(IGNORE_PIN_PA06) + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + #endif + #if defined(PIN_PA07) && !defined(IGNORE_PIN_PA07) + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + #endif + #if defined(PIN_PA08) && !defined(IGNORE_PIN_PA08) + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + #endif + #if defined(PIN_PA09) && !defined(IGNORE_PIN_PA09) + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + #endif + #if defined(PIN_PA10) && !defined(IGNORE_PIN_PA10) + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + #endif + #if defined(PIN_PA11) && !defined(IGNORE_PIN_PA11) + { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, + #endif + #if defined(PIN_PA12) && !defined(IGNORE_PIN_PA12) + { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, + #endif + #if defined(PIN_PA13) && !defined(IGNORE_PIN_PA13) + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + #endif + #if defined(PIN_PA14) && !defined(IGNORE_PIN_PA14) + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + #endif + #if defined(PIN_PA15) && !defined(IGNORE_PIN_PA15) + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + #endif + #if defined(PIN_PA16) && !defined(IGNORE_PIN_PA16) + { MP_ROM_QSTR(MP_QSTR_PA16), MP_ROM_PTR(&pin_PA16) }, + #endif + #if defined(PIN_PA17) && !defined(IGNORE_PIN_PA17) + { MP_ROM_QSTR(MP_QSTR_PA17), MP_ROM_PTR(&pin_PA17) }, + #endif + #if defined(PIN_PA18) && !defined(IGNORE_PIN_PA18) + { MP_ROM_QSTR(MP_QSTR_PA18), MP_ROM_PTR(&pin_PA18) }, + #endif + #if defined(PIN_PA19) && !defined(IGNORE_PIN_PA19) + { MP_ROM_QSTR(MP_QSTR_PA19), MP_ROM_PTR(&pin_PA19) }, + #endif + #if defined(PIN_PA20) && !defined(IGNORE_PIN_PA20) + { MP_ROM_QSTR(MP_QSTR_PA20), MP_ROM_PTR(&pin_PA20) }, + #endif + #if defined(PIN_PA21) && !defined(IGNORE_PIN_PA21) + { MP_ROM_QSTR(MP_QSTR_PA21), MP_ROM_PTR(&pin_PA21) }, + #endif + #if defined(PIN_PA22) && !defined(IGNORE_PIN_PA22) + { MP_ROM_QSTR(MP_QSTR_PA22), MP_ROM_PTR(&pin_PA22) }, + #endif + #if defined(PIN_PA23) && !defined(IGNORE_PIN_PA23) + { MP_ROM_QSTR(MP_QSTR_PA23), MP_ROM_PTR(&pin_PA23) }, + #endif + #if defined(PIN_PA24) && !defined(IGNORE_PIN_PA24) + { MP_ROM_QSTR(MP_QSTR_PA24), MP_ROM_PTR(&pin_PA24) }, + #endif + #if defined(PIN_PA25) && !defined(IGNORE_PIN_PA25) + { MP_ROM_QSTR(MP_QSTR_PA25), MP_ROM_PTR(&pin_PA25) }, + #endif + #if defined(PIN_PA27) && !defined(IGNORE_PIN_PA27) + { MP_ROM_QSTR(MP_QSTR_PA27), MP_ROM_PTR(&pin_PA27) }, + #endif + #if defined(PIN_PA28) && !defined(IGNORE_PIN_PA28) + { MP_ROM_QSTR(MP_QSTR_PA28), MP_ROM_PTR(&pin_PA28) }, + #endif + #if defined(PIN_PA30) && !defined(IGNORE_PIN_PA30) + { MP_ROM_QSTR(MP_QSTR_PA30), MP_ROM_PTR(&pin_PA30) }, + #endif + #if defined(PIN_PA31) && !defined(IGNORE_PIN_PA31) + { MP_ROM_QSTR(MP_QSTR_PA31), MP_ROM_PTR(&pin_PA31) }, + #endif + + #if defined(PIN_PB01) && !defined(IGNORE_PIN_PB01) + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + #endif + #if defined(PIN_PB02) && !defined(IGNORE_PIN_PB02) + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, + #endif + #if defined(PIN_PB03) && !defined(IGNORE_PIN_PB03) + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + #endif + #if defined(PIN_PB04) && !defined(IGNORE_PIN_PB04) + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + #endif + #if defined(PIN_PB05) && !defined(IGNORE_PIN_PB05) + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + #endif + #if defined(PIN_PB06) && !defined(IGNORE_PIN_PB06) + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + #endif + #if defined(PIN_PB07) && !defined(IGNORE_PIN_PB07) + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + #endif + #if defined(PIN_PB08) && !defined(IGNORE_PIN_PB08) + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + #endif + #if defined(PIN_PB09) && !defined(IGNORE_PIN_PB09) + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + #endif + #if defined(PIN_PB10) && !defined(IGNORE_PIN_PB10) + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, + #endif + #if defined(PIN_PB11) && !defined(IGNORE_PIN_PB11) + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, + #endif + #if defined(PIN_PB12) && !defined(IGNORE_PIN_PB12) + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + #endif + #if defined(PIN_PB13) && !defined(IGNORE_PIN_PB13) + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + #endif + #if defined(PIN_PB14) && !defined(IGNORE_PIN_PB14) + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + #endif + #if defined(PIN_PB15) && !defined(IGNORE_PIN_PB15) + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + #endif + #if defined(PIN_PB16) && !defined(IGNORE_PIN_PB16) + { MP_ROM_QSTR(MP_QSTR_PB16), MP_ROM_PTR(&pin_PB16) }, + #endif + #if defined(PIN_PB17) && !defined(IGNORE_PIN_PB17) + { MP_ROM_QSTR(MP_QSTR_PB17), MP_ROM_PTR(&pin_PB17) }, + #endif + #if defined(PIN_PB18) && !defined(IGNORE_PIN_PB18) + { MP_ROM_QSTR(MP_QSTR_PB18), MP_ROM_PTR(&pin_PB18) }, + #endif + #if defined(PIN_PB19) && !defined(IGNORE_PIN_PB19) + { MP_ROM_QSTR(MP_QSTR_PB19), MP_ROM_PTR(&pin_PB19) }, + #endif + #if defined(PIN_PB20) && !defined(IGNORE_PIN_PB20) + { MP_ROM_QSTR(MP_QSTR_PB20), MP_ROM_PTR(&pin_PB20) }, + #endif + #if defined(PIN_PB21) && !defined(IGNORE_PIN_PB21) + { MP_ROM_QSTR(MP_QSTR_PB21), MP_ROM_PTR(&pin_PB21) }, + #endif + #if defined(PIN_PB22) && !defined(IGNORE_PIN_PB22) + { MP_ROM_QSTR(MP_QSTR_PB22), MP_ROM_PTR(&pin_PB22) }, + #endif + #if defined(PIN_PB23) && !defined(IGNORE_PIN_PB23) + { MP_ROM_QSTR(MP_QSTR_PB23), MP_ROM_PTR(&pin_PB23) }, + #endif + #if defined(PIN_PB24) && !defined(IGNORE_PIN_PB24) + { MP_ROM_QSTR(MP_QSTR_PB24), MP_ROM_PTR(&pin_PB24) }, + #endif + #if defined(PIN_PB25) && !defined(IGNORE_PIN_PB25) + { MP_ROM_QSTR(MP_QSTR_PB25), MP_ROM_PTR(&pin_PB25) }, + #endif + #if defined(PIN_PB26) && !defined(IGNORE_PIN_PB26) + { MP_ROM_QSTR(MP_QSTR_PB26), MP_ROM_PTR(&pin_PB26) }, + #endif + #if defined(PIN_PB27) && !defined(IGNORE_PIN_PB27) + { MP_ROM_QSTR(MP_QSTR_PB27), MP_ROM_PTR(&pin_PB27) }, + #endif + #if defined(PIN_PB28) && !defined(IGNORE_PIN_PB28) + { MP_ROM_QSTR(MP_QSTR_PB28), MP_ROM_PTR(&pin_PB28) }, + #endif + #if defined(PIN_PB29) && !defined(IGNORE_PIN_PB29) + { MP_ROM_QSTR(MP_QSTR_PB29), MP_ROM_PTR(&pin_PB29) }, + #endif + #if defined(PIN_PB30) && !defined(IGNORE_PIN_PB30) + { MP_ROM_QSTR(MP_QSTR_PB30), MP_ROM_PTR(&pin_PB30) }, + #endif + #if defined(PIN_PB31) && !defined(IGNORE_PIN_PB31) + { MP_ROM_QSTR(MP_QSTR_PB31), MP_ROM_PTR(&pin_PB31) }, + #endif + + #if defined(PIN_PC01) && !defined(IGNORE_PIN_PC01) + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + #endif + #if defined(PIN_PC02) && !defined(IGNORE_PIN_PC02) + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + #endif + #if defined(PIN_PC03) && !defined(IGNORE_PIN_PC03) + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + #endif + #if defined(PIN_PC04) && !defined(IGNORE_PIN_PC04) + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + #endif + #if defined(PIN_PC05) && !defined(IGNORE_PIN_PC05) + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + #endif + #if defined(PIN_PC06) && !defined(IGNORE_PIN_PC06) + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + #endif + #if defined(PIN_PC07) && !defined(IGNORE_PIN_PC07) + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + #endif + #if defined(PIN_PC10) && !defined(IGNORE_PIN_PC10) + { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, + #endif + #if defined(PIN_PC11) && !defined(IGNORE_PIN_PC11) + { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, + #endif + #if defined(PIN_PC12) && !defined(IGNORE_PIN_PC12) + { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, + #endif + #if defined(PIN_PC13) && !defined(IGNORE_PIN_PC13) + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + #endif + #if defined(PIN_PC14) && !defined(IGNORE_PIN_PC14) + { MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14) }, + #endif + #if defined(PIN_PC15) && !defined(IGNORE_PIN_PC15) + { MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_PC15) }, + #endif + #if defined(PIN_PC16) && !defined(IGNORE_PIN_PC16) + { MP_ROM_QSTR(MP_QSTR_PC16), MP_ROM_PTR(&pin_PC16) }, + #endif + #if defined(PIN_PC17) && !defined(IGNORE_PIN_PC17) + { MP_ROM_QSTR(MP_QSTR_PC17), MP_ROM_PTR(&pin_PC17) }, + #endif + #if defined(PIN_PC18) && !defined(IGNORE_PIN_PC18) + { MP_ROM_QSTR(MP_QSTR_PC18), MP_ROM_PTR(&pin_PC18) }, + #endif + #if defined(PIN_PC19) && !defined(IGNORE_PIN_PC19) + { MP_ROM_QSTR(MP_QSTR_PC19), MP_ROM_PTR(&pin_PC19) }, + #endif + #if defined(PIN_PC20) && !defined(IGNORE_PIN_PC20) + { MP_ROM_QSTR(MP_QSTR_PC20), MP_ROM_PTR(&pin_PC20) }, + #endif + #if defined(PIN_PC21) && !defined(IGNORE_PIN_PC21) + { MP_ROM_QSTR(MP_QSTR_PC21), MP_ROM_PTR(&pin_PC21) }, + #endif + #if defined(PIN_PC22) && !defined(IGNORE_PIN_PC22) + { MP_ROM_QSTR(MP_QSTR_PC22), MP_ROM_PTR(&pin_PC22) }, + #endif + #if defined(PIN_PC23) && !defined(IGNORE_PIN_PC23) + { MP_ROM_QSTR(MP_QSTR_PC23), MP_ROM_PTR(&pin_PC23) }, + #endif + #if defined(PIN_PC24) && !defined(IGNORE_PIN_PC24) + { MP_ROM_QSTR(MP_QSTR_PC24), MP_ROM_PTR(&pin_PC24) }, + #endif + #if defined(PIN_PC25) && !defined(IGNORE_PIN_PC25) + { MP_ROM_QSTR(MP_QSTR_PC25), MP_ROM_PTR(&pin_PC25) }, + #endif + #if defined(PIN_PC26) && !defined(IGNORE_PIN_PC26) + { MP_ROM_QSTR(MP_QSTR_PC26), MP_ROM_PTR(&pin_PC26) }, + #endif + #if defined(PIN_PC27) && !defined(IGNORE_PIN_PC27) + { MP_ROM_QSTR(MP_QSTR_PC27), MP_ROM_PTR(&pin_PC27) }, + #endif + #if defined(PIN_PC28) && !defined(IGNORE_PIN_PC28) + { MP_ROM_QSTR(MP_QSTR_PC28), MP_ROM_PTR(&pin_PC28) }, + #endif + #if defined(PIN_PC30) && !defined(IGNORE_PIN_PC30) + { MP_ROM_QSTR(MP_QSTR_PC30), MP_ROM_PTR(&pin_PC30) }, + #endif + #if defined(PIN_PC31) && !defined(IGNORE_PIN_PC31) + { MP_ROM_QSTR(MP_QSTR_PC31), MP_ROM_PTR(&pin_PC31) }, + #endif + + #if defined(PIN_PD01) && !defined(IGNORE_PIN_PD01) + { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, + #endif + #if defined(PIN_PD02) && !defined(IGNORE_PIN_PD02) + { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_PD02) }, + #endif + #if defined(PIN_PD03) && !defined(IGNORE_PIN_PD03) + { MP_ROM_QSTR(MP_QSTR_PD03), MP_ROM_PTR(&pin_PD03) }, + #endif + #if defined(PIN_PD04) && !defined(IGNORE_PIN_PD04) + { MP_ROM_QSTR(MP_QSTR_PD04), MP_ROM_PTR(&pin_PD04) }, + #endif + #if defined(PIN_PD05) && !defined(IGNORE_PIN_PD05) + { MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_PD05) }, + #endif + #if defined(PIN_PD06) && !defined(IGNORE_PIN_PD06) + { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) }, + #endif + #if defined(PIN_PD07) && !defined(IGNORE_PIN_PD07) + { MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_PD07) }, + #endif + #if defined(PIN_PD08) && !defined(IGNORE_PIN_PD08) + { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, + #endif + #if defined(PIN_PD09) && !defined(IGNORE_PIN_PD09) + { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, + #endif + + #if defined(PIN_PE01) && !defined(IGNORE_PIN_PE01) + { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD02) }, + #endif + #if defined(PIN_PE02) && !defined(IGNORE_PIN_PD02) + { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD02) }, + #endif + +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table); + +// #if CIRCUITPY_INTERNAL_NVM_SIZE > 0 +// // The singleton nvm.ByteArray object. +// const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { +// .base = { +// .type = &nvm_bytearray_type, +// }, +// .len = NVM_BYTEARRAY_BUFFER_SIZE, +// .start_address = (uint8_t *)(CIRCUITPY_INTERNAL_NVM_START_ADDR) +// }; +// #endif diff --git a/ports/analog/common-hal/os/__init__.c b/ports/analog/common-hal/os/__init__.c new file mode 100644 index 000000000000..97ce98cb9e1e --- /dev/null +++ b/ports/analog/common-hal/os/__init__.c @@ -0,0 +1,50 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2019 Lucian Copeland for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#include "genhdr/mpversion.h" +#include "py/mpconfig.h" +#include "py/objstr.h" +#include "py/objtuple.h" + +#include "py/mperrno.h" +#include "py/runtime.h" + +// #include "peripherals/periph.h" + +static const qstr os_uname_info_fields[] = { + MP_QSTR_sysname, MP_QSTR_nodename, + MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine +}; +static const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "max32"); +static const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "max32"); + +static const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING); +static const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); +static const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); + +static MP_DEFINE_ATTRTUPLE( + os_uname_info_obj, + os_uname_info_fields, + 5, + (mp_obj_t)&os_uname_info_sysname_obj, + (mp_obj_t)&os_uname_info_nodename_obj, + (mp_obj_t)&os_uname_info_release_obj, + (mp_obj_t)&os_uname_info_version_obj, + (mp_obj_t)&os_uname_info_machine_obj + ); + +mp_obj_t common_hal_os_uname(void) { + return (mp_obj_t)&os_uname_info_obj; +} + +bool common_hal_os_urandom(uint8_t *buffer, uint32_t length) { + #if (HAS_TRNG) + //todo: implement + #else + #endif + return false; +} diff --git a/ports/analog/linking/max32690_cktpy.ld b/ports/analog/linking/max32690_cktpy.ld new file mode 100644 index 000000000000..3ecc0b991f2f --- /dev/null +++ b/ports/analog/linking/max32690_cktpy.ld @@ -0,0 +1,160 @@ +MEMORY { + ROM (rx) : ORIGIN = 0x00000000, LENGTH = 128K + FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 3M + FLASH_ISR (rx) : ORIGIN = 0x10000000, LENGTH = 200K + FLASH_FS (rw) : ORIGIN = 0x10032000, LENGTH = 64K + FLASH_FIRMWARE (rx) : ORIGIN = 0x10042000, LENGTH = 0x002BE000 + RAM (rwx): ORIGIN = 0x20000000, LENGTH = 1M +} +/* FLASH FIRMWARE: 0x10300000 (end) - 0x10042000 = 0x002BE000 */ + +ENTRY(Reset_Handler) + +SECTIONS { + .rom : + { + KEEP(*(.rom_vector)) + *(.rom_handlers*) + } > ROM + + /* Place ISR vector in a separate flash section */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + EXCLUDE_FILE (*riscv.o) *(.text*) /* program code, exclude RISCV code */ + } >FLASH_ISR + + .text : + { + . = ALIGN(4); + _text = .; + *(.rodata*) /* read-only data: "const" */ + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + /* C++ Exception handling */ + KEEP(*(.eh_frame*)) + . = ALIGN(4); + _etext = .; + } > FLASH_FIRMWARE + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH_FIRMWARE + + /* Binary import */ + .bin_storage : + { + FILL(0xFF) + _bin_start_ = .; + KEEP(*(.bin_storage_img)) + _bin_end_ = .; + . = ALIGN(4); + } > FLASH_FIRMWARE + + /* it's used for C++ exception handling */ + /* we need to keep this to avoid overlapping */ + .ARM.exidx : + { + __exidx_start = .; + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + __exidx_end = .; + } > FLASH_FIRMWARE + + .data : + { + . = ALIGN(4); + _data = .; + _sdata = .; + + *(vtable) + *(.data*) /*read-write initialized data: initialized global variable*/ + + /* These array sections are used by __libc_init_array to call static C++ constructors */ + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + /* Run the flash programming functions from SRAM */ + *(.flashprog) + + . = ALIGN(4); + _edata = .; + } > RAM AT>FLASH_FIRMWARE + __load_data = LOADADDR(.data); + + .bss : + { + . = ALIGN(4); + _sbss = .; /* Provide _sbss for Cktpy */ + _bss = .; + + *(.bss*) /*read-write zero initialized data: uninitialized global variable*/ + *(COMMON) + + . = ALIGN(4); + _ebss = .; + _ezero = .; /* Provide _ezero /_ebss for CktPython (same as ebss) */ + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + __estack = __StackLimit; /* Provide _estack for CktPython */ + + .heap (COPY): + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + *(.heap*) + __HeapLimit = ABSOLUTE(__StackLimit); + } > RAM + + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack") +} diff --git a/ports/analog/mpconfigport.h b/ports/analog/mpconfigport.h new file mode 100644 index 000000000000..bb9f8b6ac368 --- /dev/null +++ b/ports/analog/mpconfigport.h @@ -0,0 +1,36 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2015 Glenn Ruben Bakke +// SPDX-FileCopyrightText: Copyright (c) 2019 Dan Halbert for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#pragma once + +#include + +#define MICROPY_PY_FUNCTION_ATTRS (1) +#define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) + + +// 24kiB stack +#define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000 +// uint8_t _ld_default_stack_size; +// #define CIRCUITPY_DEFAULT_STACK_SIZE ((uint32_t)&_ld_default_stack_size) + +// Also includes mpconfigboard.h +#include "py/circuitpy_mpconfig.h" + +// Board flags: +#ifndef BOARD_OVERWRITE_SWD +#define BOARD_OVERWRITE_SWD (0) +#endif +#ifndef BOARD_VTOR_DEFER +#define BOARD_VTOR_DEFER (0) +#endif +#ifndef BOARD_NO_VBUS_SENSE +#define BOARD_NO_VBUS_SENSE (0) +#endif +#ifndef BOARD_NO_USB_OTG_ID_SENSE +#define BOARD_NO_USB_OTG_ID_SENSE (0) +#endif diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk new file mode 100644 index 000000000000..3c68a62884fd --- /dev/null +++ b/ports/analog/mpconfigport.mk @@ -0,0 +1,85 @@ +# This file is part of the CircuitPython project: https://circuitpython.org +# +# SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries +# +# SPDX-License-Identifier: MIT + +CHIP_FAMILY ?= max32 + +# Necessary to build CircuitPython +USB_NUM_ENDPOINT_PAIRS ?= 0 +LONGINT_IMPL ?= MPZ +INTERNAL_LIBM ?= 1 + +#################################################################################### +# Suggested config for first-time porting +#################################################################################### +# These modules are implemented in ports//common-hal: + +# Typically the first module to create +CIRCUITPY_MICROCONTROLLER = 1 +# Typically the second module to create +CIRCUITPY_DIGITALIO = 0 +# Other modules: +CIRCUITPY_ANALOGIO = 0 +CIRCUITPY_BUSIO = 0 +CIRCUITPY_COUNTIO = 0 +CIRCUITPY_NEOPIXEL_WRITE = 0 +CIRCUITPY_PULSEIO = 0 +CIRCUITPY_OS = 1 +CIRCUITPY_NVM = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_ROTARYIO = 0 +CIRCUITPY_RTC = 0 +CIRCUITPY_SDCARDIO = 0 +CIRCUITPY_FRAMEBUFFERIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CTARGET = 0 +# Requires SPI, PulseIO (stub ok): +CIRCUITPY_DISPLAYIO = 0 + +# These modules are implemented in shared-module/ - they can be included in +# any port once their prerequisites in common-hal are complete. +# Requires DigitalIO: +CIRCUITPY_BITBANGIO = 0 +# Requires neopixel_write or SPI (dotstar) +CIRCUITPY_PIXELBUF = 0 +# Requires OS +CIRCUITPY_RANDOM = 0 +# Requires OS, filesystem +CIRCUITPY_STORAGE = 0 +# Requires Microcontroller +CIRCUITPY_TOUCHIO = 0 +# Requires UART! +CIRCUITPY_CONSOLE_UART = 0 +# Requires USB +CIRCUITPY_USB_DEVICE = 0 +CIRCUITPY_USB_CDC = 0 +CIRCUITPY_USB_HID = 0 +CIRCUITPY_USB_MIDI = 0 +# Does nothing without I2C +CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 +# No requirements, but takes extra flash +CIRCUITPY_ULAB = 0 +#################################################################################### +# Required for clean building (additional CircuittPython Defaults) +#################################################################################### +# Enabled by default +CIRCUITPY_PWMIO = 0 +# Depends on BUSIO +# CIRCUITPY_BLEIO = 0 +CIRCUITPY_BLEIO_HCI = 0 +CIRCUITPY_KEYPAD = 0 +CIRCUITPY_BUSDEVICE = 0 + +# TinyUSB will be added later. +CIRCUITPY_TINYUSB = 0 +CIRCUITPY_PYUSB = 0 + +INTERNAL_FLASH_FILESYSTEM = 1 +SPI_FLASH_FILESYSTEM = 0 +QSPI_FLASH_FILESYSTEM = 0 + +# TODO: Review flash filesystem funcs before flashing +DISABLE_FILESYSTEM = 0 diff --git a/ports/analog/mphalport.c b/ports/analog/mphalport.c new file mode 100644 index 000000000000..1bbcf605b007 --- /dev/null +++ b/ports/analog/mphalport.c @@ -0,0 +1,15 @@ + +#include "mphalport.h" +#include "cmsis_gcc.h" + + +// TODO: Define tick & other port functions + + +void mp_hal_disable_all_interrupts(void) { + __disable_irq(); +} + +void mp_hal_enable_all_interrupts(void) { + __enable_irq(); +} diff --git a/ports/analog/mphalport.h b/ports/analog/mphalport.h new file mode 100644 index 000000000000..8dba63d82ff0 --- /dev/null +++ b/ports/analog/mphalport.h @@ -0,0 +1,22 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst +// +// SPDX-License-Identifier: MIT + +#pragma once + +#include "py/obj.h" +#include "lib/oofatfs/ff.h" +#include "supervisor/shared/tick.h" + +// TODO: Define tick & other port functions +// Global millisecond tick count (driven by SysTick interrupt). +static inline mp_uint_t mp_hal_ticks_ms(void) { + return supervisor_ticks_ms32(); +} + +void mp_hal_set_interrupt_char(int c); + +void mp_hal_disable_all_interrupts(void); +void mp_hal_enable_all_interrupts(void); diff --git a/ports/analog/msdk b/ports/analog/msdk new file mode 160000 index 000000000000..608acf33e95a --- /dev/null +++ b/ports/analog/msdk @@ -0,0 +1 @@ +Subproject commit 608acf33e95a994d548b8223955952c4749acaac diff --git a/ports/analog/peripherals/max32690/pins.c b/ports/analog/peripherals/max32690/pins.c new file mode 100644 index 000000000000..4f26d9d1f6d6 --- /dev/null +++ b/ports/analog/peripherals/max32690/pins.c @@ -0,0 +1,119 @@ +#include "py/obj.h" +#include "py/mphal.h" +#include "peripherals/pins.h" + +#include "gpio.h" +#include "gpio_regs.h" + +const mcu_pin_obj_t pin_P0_00 = PIN(MXC_GPIO_PORT_0, 0); +const mcu_pin_obj_t pin_P0_01 = PIN(MXC_GPIO_PORT_0, 1); +const mcu_pin_obj_t pin_P0_02 = PIN(MXC_GPIO_PORT_0, 2); +const mcu_pin_obj_t pin_P0_03 = PIN(MXC_GPIO_PORT_0, 3); +const mcu_pin_obj_t pin_P0_04 = PIN(MXC_GPIO_PORT_0, 4); +const mcu_pin_obj_t pin_P0_05 = PIN(MXC_GPIO_PORT_0, 5); +const mcu_pin_obj_t pin_P0_06 = PIN(MXC_GPIO_PORT_0, 6); +const mcu_pin_obj_t pin_P0_07 = PIN(MXC_GPIO_PORT_0, 7); +const mcu_pin_obj_t pin_P0_08 = PIN(MXC_GPIO_PORT_0, 8); +const mcu_pin_obj_t pin_P0_09 = PIN(MXC_GPIO_PORT_0, 9); +const mcu_pin_obj_t pin_P0_10 = PIN(MXC_GPIO_PORT_0, 10); +const mcu_pin_obj_t pin_P0_11 = PIN(MXC_GPIO_PORT_0, 11); +const mcu_pin_obj_t pin_P0_12 = PIN(MXC_GPIO_PORT_0, 12); +const mcu_pin_obj_t pin_P0_13 = PIN(MXC_GPIO_PORT_0, 13); +const mcu_pin_obj_t pin_P0_14 = PIN(MXC_GPIO_PORT_0, 14); +const mcu_pin_obj_t pin_P0_15 = PIN(MXC_GPIO_PORT_0, 15); +const mcu_pin_obj_t pin_P0_16 = PIN(MXC_GPIO_PORT_0, 16); +const mcu_pin_obj_t pin_P0_17 = PIN(MXC_GPIO_PORT_0, 17); +const mcu_pin_obj_t pin_P0_18 = PIN(MXC_GPIO_PORT_0, 18); +const mcu_pin_obj_t pin_P0_19 = PIN(MXC_GPIO_PORT_0, 19); +const mcu_pin_obj_t pin_P0_20 = PIN(MXC_GPIO_PORT_0, 20); +const mcu_pin_obj_t pin_P0_21 = PIN(MXC_GPIO_PORT_0, 21); +const mcu_pin_obj_t pin_P0_22 = PIN(MXC_GPIO_PORT_0, 22); +const mcu_pin_obj_t pin_P0_23 = PIN(MXC_GPIO_PORT_0, 23); +const mcu_pin_obj_t pin_P0_24 = PIN(MXC_GPIO_PORT_0, 24); +const mcu_pin_obj_t pin_P0_25 = PIN(MXC_GPIO_PORT_0, 25); +const mcu_pin_obj_t pin_P0_26 = PIN(MXC_GPIO_PORT_0, 26); +const mcu_pin_obj_t pin_P0_27 = PIN(MXC_GPIO_PORT_0, 27); +const mcu_pin_obj_t pin_P0_28 = PIN(MXC_GPIO_PORT_0, 28); +const mcu_pin_obj_t pin_P0_29 = PIN(MXC_GPIO_PORT_0, 29); +const mcu_pin_obj_t pin_P0_30 = PIN(MXC_GPIO_PORT_0, 30); +const mcu_pin_obj_t pin_P0_31 = PIN(MXC_GPIO_PORT_0, 31); + +const mcu_pin_obj_t pin_P1_00 = PIN(MXC_GPIO_PORT_1, 0); +const mcu_pin_obj_t pin_P1_01 = PIN(MXC_GPIO_PORT_1, 1); +const mcu_pin_obj_t pin_P1_02 = PIN(MXC_GPIO_PORT_1, 2); +const mcu_pin_obj_t pin_P1_03 = PIN(MXC_GPIO_PORT_1, 3); +const mcu_pin_obj_t pin_P1_04 = PIN(MXC_GPIO_PORT_1, 4); +const mcu_pin_obj_t pin_P1_05 = PIN(MXC_GPIO_PORT_1, 5); +const mcu_pin_obj_t pin_P1_06 = PIN(MXC_GPIO_PORT_1, 6); +const mcu_pin_obj_t pin_P1_07 = PIN(MXC_GPIO_PORT_1, 7); +const mcu_pin_obj_t pin_P1_08 = PIN(MXC_GPIO_PORT_1, 8); +const mcu_pin_obj_t pin_P1_09 = PIN(MXC_GPIO_PORT_1, 9); +const mcu_pin_obj_t pin_P1_10 = PIN(MXC_GPIO_PORT_1, 10); +const mcu_pin_obj_t pin_P1_11 = PIN(MXC_GPIO_PORT_1, 11); +const mcu_pin_obj_t pin_P1_12 = PIN(MXC_GPIO_PORT_1, 12); +const mcu_pin_obj_t pin_P1_13 = PIN(MXC_GPIO_PORT_1, 13); +const mcu_pin_obj_t pin_P1_14 = PIN(MXC_GPIO_PORT_1, 14); +const mcu_pin_obj_t pin_P1_15 = PIN(MXC_GPIO_PORT_1, 15); +const mcu_pin_obj_t pin_P1_16 = PIN(MXC_GPIO_PORT_1, 16); +const mcu_pin_obj_t pin_P1_17 = PIN(MXC_GPIO_PORT_1, 17); +const mcu_pin_obj_t pin_P1_18 = PIN(MXC_GPIO_PORT_1, 18); +const mcu_pin_obj_t pin_P1_19 = PIN(MXC_GPIO_PORT_1, 19); +const mcu_pin_obj_t pin_P1_20 = PIN(MXC_GPIO_PORT_1, 20); +const mcu_pin_obj_t pin_P1_21 = PIN(MXC_GPIO_PORT_1, 21); +const mcu_pin_obj_t pin_P1_22 = PIN(MXC_GPIO_PORT_1, 22); +const mcu_pin_obj_t pin_P1_23 = PIN(MXC_GPIO_PORT_1, 23); +const mcu_pin_obj_t pin_P1_24 = PIN(MXC_GPIO_PORT_1, 24); +const mcu_pin_obj_t pin_P1_25 = PIN(MXC_GPIO_PORT_1, 25); +const mcu_pin_obj_t pin_P1_26 = PIN(MXC_GPIO_PORT_1, 26); +const mcu_pin_obj_t pin_P1_27 = PIN(MXC_GPIO_PORT_1, 27); +const mcu_pin_obj_t pin_P1_28 = PIN(MXC_GPIO_PORT_1, 28); +const mcu_pin_obj_t pin_P1_29 = PIN(MXC_GPIO_PORT_1, 29); +const mcu_pin_obj_t pin_P1_30 = PIN(MXC_GPIO_PORT_1, 30); +const mcu_pin_obj_t pin_P1_31 = PIN(MXC_GPIO_PORT_1, 31); + +const mcu_pin_obj_t pin_P2_00 = PIN(MXC_GPIO_PORT_2, 0); +const mcu_pin_obj_t pin_P2_01 = PIN(MXC_GPIO_PORT_2, 1); +const mcu_pin_obj_t pin_P2_02 = PIN(MXC_GPIO_PORT_2, 2); +const mcu_pin_obj_t pin_P2_03 = PIN(MXC_GPIO_PORT_2, 3); +const mcu_pin_obj_t pin_P2_04 = PIN(MXC_GPIO_PORT_2, 4); +const mcu_pin_obj_t pin_P2_05 = PIN(MXC_GPIO_PORT_2, 5); +const mcu_pin_obj_t pin_P2_06 = PIN(MXC_GPIO_PORT_2, 6); +const mcu_pin_obj_t pin_P2_07 = PIN(MXC_GPIO_PORT_2, 7); +const mcu_pin_obj_t pin_P2_08 = PIN(MXC_GPIO_PORT_2, 8); +const mcu_pin_obj_t pin_P2_09 = PIN(MXC_GPIO_PORT_2, 9); +const mcu_pin_obj_t pin_P2_10 = PIN(MXC_GPIO_PORT_2, 10); +const mcu_pin_obj_t pin_P2_11 = PIN(MXC_GPIO_PORT_2, 11); +const mcu_pin_obj_t pin_P2_12 = PIN(MXC_GPIO_PORT_2, 12); +const mcu_pin_obj_t pin_P2_13 = PIN(MXC_GPIO_PORT_2, 13); +const mcu_pin_obj_t pin_P2_14 = PIN(MXC_GPIO_PORT_2, 14); +const mcu_pin_obj_t pin_P2_15 = PIN(MXC_GPIO_PORT_2, 15); +const mcu_pin_obj_t pin_P2_16 = PIN(MXC_GPIO_PORT_2, 16); +const mcu_pin_obj_t pin_P2_17 = PIN(MXC_GPIO_PORT_2, 17); +const mcu_pin_obj_t pin_P2_18 = PIN(MXC_GPIO_PORT_2, 18); +const mcu_pin_obj_t pin_P2_19 = PIN(MXC_GPIO_PORT_2, 19); +const mcu_pin_obj_t pin_P2_20 = PIN(MXC_GPIO_PORT_2, 20); +const mcu_pin_obj_t pin_P2_21 = PIN(MXC_GPIO_PORT_2, 21); +const mcu_pin_obj_t pin_P2_22 = PIN(MXC_GPIO_PORT_2, 22); +const mcu_pin_obj_t pin_P2_23 = PIN(MXC_GPIO_PORT_2, 23); +const mcu_pin_obj_t pin_P2_24 = PIN(MXC_GPIO_PORT_2, 24); +const mcu_pin_obj_t pin_P2_25 = PIN(MXC_GPIO_PORT_2, 25); +const mcu_pin_obj_t pin_P2_26 = PIN(MXC_GPIO_PORT_2, 26); +const mcu_pin_obj_t pin_P2_27 = PIN(MXC_GPIO_PORT_2, 27); +const mcu_pin_obj_t pin_P2_28 = PIN(MXC_GPIO_PORT_2, 28); +const mcu_pin_obj_t pin_P2_29 = PIN(MXC_GPIO_PORT_2, 29); +const mcu_pin_obj_t pin_P2_30 = PIN(MXC_GPIO_PORT_2, 30); +const mcu_pin_obj_t pin_P2_31 = PIN(MXC_GPIO_PORT_2, 31); + +const mcu_pin_obj_t pin_P3_00 = PIN(MXC_GPIO_PORT_3, 0); +const mcu_pin_obj_t pin_P3_01 = PIN(MXC_GPIO_PORT_3, 1); +const mcu_pin_obj_t pin_P3_02 = PIN(MXC_GPIO_PORT_3, 2); +const mcu_pin_obj_t pin_P3_03 = PIN(MXC_GPIO_PORT_3, 3); +const mcu_pin_obj_t pin_P3_04 = PIN(MXC_GPIO_PORT_3, 4); +const mcu_pin_obj_t pin_P3_05 = PIN(MXC_GPIO_PORT_3, 5); +const mcu_pin_obj_t pin_P3_06 = PIN(MXC_GPIO_PORT_3, 6); +const mcu_pin_obj_t pin_P3_07 = PIN(MXC_GPIO_PORT_3, 7); +const mcu_pin_obj_t pin_P3_08 = PIN(MXC_GPIO_PORT_3, 8); +const mcu_pin_obj_t pin_P3_09 = PIN(MXC_GPIO_PORT_3, 9); + +const mcu_pin_obj_t pin_P4_00 = PIN(MXC_GPIO_PORT_4, 0); +const mcu_pin_obj_t pin_P4_01 = PIN(MXC_GPIO_PORT_4, 1); diff --git a/ports/analog/peripherals/max32690/pins.h b/ports/analog/peripherals/max32690/pins.h new file mode 100644 index 000000000000..9b5cc303ee5c --- /dev/null +++ b/ports/analog/peripherals/max32690/pins.h @@ -0,0 +1,114 @@ +#pragma once + +extern const mcu_pin_obj_t pin_P0_00; +extern const mcu_pin_obj_t pin_P0_01; +extern const mcu_pin_obj_t pin_P0_02; +extern const mcu_pin_obj_t pin_P0_03; +extern const mcu_pin_obj_t pin_P0_04; +extern const mcu_pin_obj_t pin_P0_05; +extern const mcu_pin_obj_t pin_P0_06; +extern const mcu_pin_obj_t pin_P0_07; +extern const mcu_pin_obj_t pin_P0_08; +extern const mcu_pin_obj_t pin_P0_09; +extern const mcu_pin_obj_t pin_P0_10; +extern const mcu_pin_obj_t pin_P0_11; +extern const mcu_pin_obj_t pin_P0_12; +extern const mcu_pin_obj_t pin_P0_13; +extern const mcu_pin_obj_t pin_P0_14; +extern const mcu_pin_obj_t pin_P0_15; +extern const mcu_pin_obj_t pin_P0_16; +extern const mcu_pin_obj_t pin_P0_17; +extern const mcu_pin_obj_t pin_P0_18; +extern const mcu_pin_obj_t pin_P0_19; +extern const mcu_pin_obj_t pin_P0_20; +extern const mcu_pin_obj_t pin_P0_21; +extern const mcu_pin_obj_t pin_P0_22; +extern const mcu_pin_obj_t pin_P0_23; +extern const mcu_pin_obj_t pin_P0_24; +extern const mcu_pin_obj_t pin_P0_25; +extern const mcu_pin_obj_t pin_P0_26; +extern const mcu_pin_obj_t pin_P0_27; +extern const mcu_pin_obj_t pin_P0_28; +extern const mcu_pin_obj_t pin_P0_29; +extern const mcu_pin_obj_t pin_P0_30; +extern const mcu_pin_obj_t pin_P0_31; + +extern const mcu_pin_obj_t pin_P1_00; +extern const mcu_pin_obj_t pin_P1_01; +extern const mcu_pin_obj_t pin_P1_02; +extern const mcu_pin_obj_t pin_P1_03; +extern const mcu_pin_obj_t pin_P1_04; +extern const mcu_pin_obj_t pin_P1_05; +extern const mcu_pin_obj_t pin_P1_06; +extern const mcu_pin_obj_t pin_P1_07; +extern const mcu_pin_obj_t pin_P1_08; +extern const mcu_pin_obj_t pin_P1_09; +extern const mcu_pin_obj_t pin_P1_10; +extern const mcu_pin_obj_t pin_P1_11; +extern const mcu_pin_obj_t pin_P1_12; +extern const mcu_pin_obj_t pin_P1_13; +extern const mcu_pin_obj_t pin_P1_14; +extern const mcu_pin_obj_t pin_P1_15; +extern const mcu_pin_obj_t pin_P1_16; +extern const mcu_pin_obj_t pin_P1_17; +extern const mcu_pin_obj_t pin_P1_18; +extern const mcu_pin_obj_t pin_P1_19; +extern const mcu_pin_obj_t pin_P1_20; +extern const mcu_pin_obj_t pin_P1_21; +extern const mcu_pin_obj_t pin_P1_22; +extern const mcu_pin_obj_t pin_P1_23; +extern const mcu_pin_obj_t pin_P1_24; +extern const mcu_pin_obj_t pin_P1_25; +extern const mcu_pin_obj_t pin_P1_26; +extern const mcu_pin_obj_t pin_P1_27; +extern const mcu_pin_obj_t pin_P1_28; +extern const mcu_pin_obj_t pin_P1_29; +extern const mcu_pin_obj_t pin_P1_30; +extern const mcu_pin_obj_t pin_P1_31; + +extern const mcu_pin_obj_t pin_P2_00; +extern const mcu_pin_obj_t pin_P2_01; +extern const mcu_pin_obj_t pin_P2_02; +extern const mcu_pin_obj_t pin_P2_03; +extern const mcu_pin_obj_t pin_P2_04; +extern const mcu_pin_obj_t pin_P2_05; +extern const mcu_pin_obj_t pin_P2_06; +extern const mcu_pin_obj_t pin_P2_07; +extern const mcu_pin_obj_t pin_P2_08; +extern const mcu_pin_obj_t pin_P2_09; +extern const mcu_pin_obj_t pin_P2_10; +extern const mcu_pin_obj_t pin_P2_11; +extern const mcu_pin_obj_t pin_P2_12; +extern const mcu_pin_obj_t pin_P2_13; +extern const mcu_pin_obj_t pin_P2_14; +extern const mcu_pin_obj_t pin_P2_15; +extern const mcu_pin_obj_t pin_P2_16; +extern const mcu_pin_obj_t pin_P2_17; +extern const mcu_pin_obj_t pin_P2_18; +extern const mcu_pin_obj_t pin_P2_19; +extern const mcu_pin_obj_t pin_P2_20; +extern const mcu_pin_obj_t pin_P2_21; +extern const mcu_pin_obj_t pin_P2_22; +extern const mcu_pin_obj_t pin_P2_23; +extern const mcu_pin_obj_t pin_P2_24; +extern const mcu_pin_obj_t pin_P2_25; +extern const mcu_pin_obj_t pin_P2_26; +extern const mcu_pin_obj_t pin_P2_27; +extern const mcu_pin_obj_t pin_P2_28; +extern const mcu_pin_obj_t pin_P2_29; +extern const mcu_pin_obj_t pin_P2_30; +extern const mcu_pin_obj_t pin_P2_31; + +extern const mcu_pin_obj_t pin_P3_00; +extern const mcu_pin_obj_t pin_P3_01; +extern const mcu_pin_obj_t pin_P3_02; +extern const mcu_pin_obj_t pin_P3_03; +extern const mcu_pin_obj_t pin_P3_04; +extern const mcu_pin_obj_t pin_P3_05; +extern const mcu_pin_obj_t pin_P3_06; +extern const mcu_pin_obj_t pin_P3_07; +extern const mcu_pin_obj_t pin_P3_08; +extern const mcu_pin_obj_t pin_P3_09; + +extern const mcu_pin_obj_t pin_P4_00; // BTLDR Stimulus +extern const mcu_pin_obj_t pin_P4_01; diff --git a/ports/analog/peripherals/pins.h b/ports/analog/peripherals/pins.h new file mode 100644 index 000000000000..ae471dc29e18 --- /dev/null +++ b/ports/analog/peripherals/pins.h @@ -0,0 +1,34 @@ + + +#pragma once + +// STD includes +#include +#include + +// CktPy includes +#include "py/obj.h" + +// HAL includes +// #include "gpio.h" + +typedef struct { + mp_obj_base_t base; + const uint8_t port; + const uint8_t pad; + // const uint8_t level : 4; // FIXME: Find how to include the VDDIO/VDDIOH level +} mcu_pin_obj_t; + +extern const mp_obj_type_t mcu_pin_type; + +#define NO_PIN (0xFF) // for non-connected pins + +#define PIN(pin_port, pin_pad) \ + { \ + { &mcu_pin_type }, \ + .port = pin_port, \ + .pad = pin_pad, \ + } + +// TODO: Create macros for detecting MCU VARIANT +#include "max32690/pins.h" diff --git a/ports/analog/qstrdefsport.h b/ports/analog/qstrdefsport.h new file mode 100644 index 000000000000..2d2c26092348 --- /dev/null +++ b/ports/analog/qstrdefsport.h @@ -0,0 +1,10 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Adafruit Industries LLC +// +// SPDX-License-Identifier: MIT + +// Do not use #pragma once in this file; it will cause a warning during qstr generation. + +// qstrs specific to this port +// *FORMAT-OFF* diff --git a/ports/analog/supervisor/cpu.s b/ports/analog/supervisor/cpu.s new file mode 100644 index 000000000000..9e6807a5e2e9 --- /dev/null +++ b/ports/analog/supervisor/cpu.s @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0], #4 +str r5, [r0], #4 +str r6, [r0], #4 +str r7, [r0], #4 +str r8, [r0], #4 +str r9, [r0], #4 +str r10, [r0], #4 +str r11, [r0], #4 +str r12, [r0], #4 +str r13, [r0], #4 + +@ return the sp +mov r0, sp +bx lr diff --git a/ports/analog/supervisor/internal_flash.c b/ports/analog/supervisor/internal_flash.c new file mode 100644 index 000000000000..a8c10076d3bf --- /dev/null +++ b/ports/analog/supervisor/internal_flash.c @@ -0,0 +1,289 @@ + +#include "supervisor/internal_flash.h" + +#include +#include + +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" + +#include "py/obj.h" +#include "py/mphal.h" +#include "py/runtime.h" + +#include "supervisor/filesystem.h" +#include "supervisor/flash.h" +#include "supervisor/shared/safe_mode.h" + +#if CIRCUITPY_USB_DEVICE +#include "supervisor/usb.h" +#endif + +// MAX32 HAL Includes +#include "flc.h" +#include "flc_reva.h" +#include "icc.h" // includes icc_.c for MSDK die type +#include "mxc_device.h" + +/** TODO: + * - Verify all necessary Filesystem MACROs are defined in mpconfigport.h + * + * NOTE: + * ANY function which modifies flash contents must execute from a crit section. + * This is because FLC functions are loc'd in RAM, and any ISR executing + * from Flash will trigger a HardFault. + * + * An alternative would be to initialize with NVIC_SetRAM(), + * which makes ISRs execute from RAM. + * + * NOTE: + * Additionally, any code that modifies flash contents must disable the + * cache. Turn off ICC0 any time flash is to be modified. Remember to re-enable if using. + * + * For Maxim devices which include an additional RISC-V processor, this shall be ignored. + * Therefore only ICC0 need be used for the purpose of these functions. + */ + +#define NO_CACHE 0xffffffff +#define MAX_CACHE 0x4000 + +typedef struct { + uint32_t base_addr; + uint32_t sector_size; + uint32_t num_sectors; +} flash_layout_t; + +#ifdef MAX32690 +static const flash_layout_t flash_layout[] = { + { 0x1000000, 0x4000, 192}, + { 0x1030000, 0x2000, 32 }, +}; +static uint8_t _flash_cache[0x4000] __attribute__((aligned(4))); +#endif + +// Address of the flash sector currently being cached +static uint32_t _cache_addr_in_flash = NO_CACHE; + +static inline int32_t block2addr(uint32_t block) { + if (block > 0 && block < INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS) { + return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE; + } + else return -1; +} + +int flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) { + // This function should return -1 in the event of errors. + if (addr >= flash_layout[0].base_addr) { + uint32_t sector_index = 0; + if (MP_ARRAY_SIZE(flash_layout) == 1) { + sector_index = (addr - flash_layout[0].base_addr) / flash_layout[0].sector_size; + if (sector_index >= flash_layout[0].num_sectors) { + return -1; + } + if (start_addr) { + *start_addr = flash_layout[0].base_addr + (sector_index * flash_layout[0].sector_size); + } + if (size) { + *size = flash_layout[0].sector_size; + } + return sector_index; + } + + for (uint8_t i = 0; i < MP_ARRAY_SIZE(flash_layout); ++i) { + for (uint8_t j = 0; j < flash_layout[i].num_sectors; ++j) { + uint32_t sector_start_next = flash_layout[i].base_addr + + (j + 1) * flash_layout[i].sector_size; + if (addr < sector_start_next) { + if (start_addr) { + *start_addr = flash_layout[i].base_addr + + j * flash_layout[i].sector_size; + } + if (size) { + *size = flash_layout[i].sector_size; + } + return sector_index; + } + ++sector_index; + } + } + } + return -1; +} + +void supervisor_flash_init(void) { + // No initialization needed. + // Pay attention to the note at the top of this file! +} + +uint32_t supervisor_flash_get_block_size(void) { + return FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_count(void) { + return INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS; +} + +// Flush the flash page that is currently cached +void port_internal_flash_flush(void) { + // Flash has not been cached + if (_cache_addr_in_flash == NO_CACHE) { + return; + } + uint32_t sector_start, sector_size = 0xffffffff; + + // Clear & enable flash interrupt flags + MXC_FLC_EnableInt(MXC_F_FLC_INTR_DONEIE | MXC_F_FLC_INTR_AFIE); + + // Figure out the sector of flash we're targeting + if (flash_get_sector_info(_cache_addr_in_flash, §or_start, §or_size) == -1) { + // If not in valid sector, just release the cache and return + supervisor_flash_release_cache(); + return; + } + + // if invalid sector or sector size > the size of our cache, reset with flash fail + if (sector_size > sizeof(_flash_cache) || sector_start == 0xffffffff) { + reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); + } + + // skip if the data in cache is the same as what's already there + if (memcmp(_flash_cache, (void *)_cache_addr_in_flash, FLASH_PAGE_SIZE) != 0) { + uint32_t error; + + // buffer for the page of flash + uint32_t page_buffer[FLASH_PAGE_SIZE >> 2] = { + 0xFFFFFFFF + }; // bytes per page / 4 bytes = # of uint32_t + + // Unlock Flash + MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_UNLOCKED; + + /*** ERASE FLASH PAGE ***/ + MXC_CRITICAL( + // buffer the page + MXC_FLC_Read(sector_start, page_buffer, sector_size); + // Erase page & error check + error = MXC_FLC_PageErase(sector_start); + ); + if (error != E_NO_ERROR) { + // lock flash & reset + MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED; + reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); + } + + /*** RE-WRITE FLASH PAGE w/ CACHE DATA ***/ + MXC_CRITICAL( + // ret = program the flash page with cache data (for loop) + for (uint32_t i = 0; i < (sector_size >> 2); i++) { + error = MXC_FLC_Write32(_cache_addr_in_flash + 4 * i, _flash_cache[i]); + } + ); + if (error != E_NO_ERROR) { + // lock flash & reset + MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED; + reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); + } + + // Lock flash & exit + MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED; + } + +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { + // Find the address of the block we want to read + int src_addr = block2addr(block); + if (src_addr == -1) { + // bad block num + return false; + } + + uint32_t sector_size, sector_start; + if (flash_get_sector_info(src_addr, §or_start, §or_size) == -1) { + // bad sector idx + return false; + } + + // Find how many blocks left in sector + uint32_t blocks_in_sector = (sector_size - (src_addr - sector_start)) / FILESYSTEM_BLOCK_SIZE; + + // If the whole read is inside the cache, then read cache + if (num_blocks <= blocks_in_sector && _cache_addr_in_flash == sector_start) { + memcpy(dest, (_flash_cache + (src_addr - sector_start)), FILESYSTEM_BLOCK_SIZE * num_blocks); + } else { + supervisor_flash_flush(); + /** NOTE: The MXC_FLC_Read function executes from SRAM and does some more error checking + * than memcpy does. Will use it for now. + */ + MXC_FLC_Read((int)dest, (int *)src_addr, FILESYSTEM_BLOCK_SIZE * num_blocks); + } + return 0; // success +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { + uint32_t count=0; + uint32_t sector_size=0; + uint32_t sector_start=0; + + while (num_blocks > 0) { + const int32_t dest_addr = block2addr(block_num); + // bad block number passed in + if (dest_addr == -1) { + return false; + } + + // Implementation is from STM port + // NOTE: May replace later, but this port had a method + // that seemed to make sense across multiple devices. + if (flash_get_sector_info(dest_addr, §or_start, §or_size) == -1) { + reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); + } + + // fail if sector size is greater than cache size + if (sector_size > sizeof(_flash_cache)) { + reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); + } + + // Find the number of blocks left within this sector + // BLOCK_NUM = (SECTOR SIZE - BLOCK OFFSET within sector)) / BLOCK_SIZE + count = (sector_size - (dest_addr - sector_start)) / FILESYSTEM_BLOCK_SIZE; + count = MIN(num_blocks, count); + + // if we're not at the start of a sector, copy the whole sector to cache + if (_cache_addr_in_flash != sector_start) { + // Flush cache first + supervisor_flash_flush(); + + _cache_addr_in_flash = sector_start; + + // Copy the whole sector into cache + memcpy(_flash_cache, (void *)sector_start, sector_size); + } + + // Overwrite the cache with source data passed in + memcpy(_flash_cache + (dest_addr - sector_start), src, count * FILESYSTEM_BLOCK_SIZE); + + block_num += count; + src += count * FILESYSTEM_BLOCK_SIZE; + num_blocks -= count; + } + return 0; // success +} + +void supervisor_flash_release_cache(void) { + // Flush the cache for ARM M4 + MXC_ICC_Flush(MXC_ICC0); + MXC_ICC_Flush(MXC_ICC1); + + // Clear the line fill buffer by reading 2 pages from flash + volatile uint32_t *line_addr; + volatile uint32_t line; + line_addr = (uint32_t *)(MXC_FLASH_MEM_BASE); + line = *line_addr; + line_addr = (uint32_t *)(MXC_FLASH_MEM_BASE + MXC_FLASH_PAGE_SIZE); + line = *line_addr; + (void)line; // Silence build warnings that this variable is not used. + + // Invalidate the current cache + _cache_addr_in_flash = NO_CACHE; +} diff --git a/ports/analog/supervisor/internal_flash.h b/ports/analog/supervisor/internal_flash.h new file mode 100644 index 000000000000..e59fd2af2408 --- /dev/null +++ b/ports/analog/supervisor/internal_flash.h @@ -0,0 +1,16 @@ + +#pragma once + +#include +#include + +#include "py/mpconfig.h" + +/** Sections defined in linker files under "linking" */ +#ifdef MAX32690 +#define MAX32_FLASH_SIZE 0x300000 // 3 MB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x10000 // 64K +#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x10032000 // Load into the last MB of code/data storage??? +#endif + +#define INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS (INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE) diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c new file mode 100644 index 000000000000..cf63b3a261f4 --- /dev/null +++ b/ports/analog/supervisor/port.c @@ -0,0 +1,167 @@ +/****************************************************************************** + * + * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. All Rights Reserved. + * (now owned by Analog Devices, Inc.), + * Copyright (C) 2023 Analog Devices, Inc. All Rights Reserved. This software + * is proprietary to Analog Devices, Inc. and its licensors. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +/** + * @file port.c + * @author Brandon Hurst @ Analog Devices, Inc. + * @brief Functions required for a basic CircuitPython port + * @date 2024-07-30 + * + * @copyright Copyright (c) 2024 + */ + +#include +#include "supervisor/board.h" +#include "supervisor/port.h" + +#include +// #include "gpio.h" +#include "mxc_assert.h" +#include "mxc_delay.h" +#include "mxc_device.h" +#include "mxc_pins.h" +#include "mxc_sys.h" +#include "uart.h" + +/** Linker variables defined.... + * _estack: end of the stack + * _ebss: end of BSS section + * _ezero: same as ebss (acc. to main.c) + */ +extern uint32_t _ezero; +extern uint32_t _estack; +extern uint32_t _ebss; // Stored at the end of the bss section (which includes the heap). +extern uint32_t _ld_heap_start, _ld_heap_end, _ld_stack_top, _ld_stack_bottom; + +// defined by cmsis core files +void NVIC_SystemReset(void) NORETURN; + +safe_mode_t port_init(void) { + return SAFE_MODE_NONE; +} + +void HAL_Delay(uint32_t delay_ms) { +} + +uint32_t HAL_GetTick(void) { + return 1000; +} + +void SysTick_Handler(void) { +} + +void reset_to_bootloader(void) { + NVIC_SystemReset(); +} + + +void reset_cpu(void) { + NVIC_SystemReset(); +} + +void reset_port(void) { + // MXC_GPIO_Reset(MXC_GPIO0); + // MXC_GPIO_Reset(MXC_GPIO1); +} + +uint32_t *port_heap_get_bottom(void) { + return (uint32_t *)0xAAAAAAAA; +} + +uint32_t *port_heap_get_top(void) { + return (uint32_t *)0xAAAAAAAF; +} + +uint32_t *port_stack_get_limit(void) { + #pragma GCC diagnostic push + + #pragma GCC diagnostic ignored "-Warray-bounds" + // return port_stack_get_top() - (CIRCUITPY_DEFAULT_STACK_SIZE + CIRCUITPY_EXCEPTION_STACK_SIZE) / sizeof(uint32_t); + return port_stack_get_top() - (0 + 0) / sizeof(uint32_t); + #pragma GCC diagnostic pop +} + +uint32_t *port_stack_get_top(void) { + return (uint32_t *)0xB000000; +} + + +// Place the word to save just after our BSS section that gets blanked. +void port_set_saved_word(uint32_t value) { + _ebss = value; +} + +uint32_t port_get_saved_word(void) { + return _ebss; +} + +// __attribute__((used)) void MemManage_Handler(void) { +// reset_into_safe_mode(SAFE_MODE_HARD_FAULT); +// while (true) { +// asm ("nop;"); +// } +// } + +// __attribute__((used)) void BusFault_Handler(void) { +// reset_into_safe_mode(SAFE_MODE_HARD_FAULT); +// while (true) { +// asm ("nop;"); +// } +// } + +// __attribute__((used)) void UsageFault_Handler(void) { +// reset_into_safe_mode(SAFE_MODE_HARD_FAULT); +// while (true) { +// asm ("nop;"); +// } +// } + +// __attribute__((used)) void HardFault_Handler(void) { +// reset_into_safe_mode(SAFE_MODE_HARD_FAULT); +// while (true) { +// asm ("nop;"); +// } +// } + +uint64_t port_get_raw_ticks(uint8_t *subticks) { + return 1000; +} + +// Enable 1/1024 second tick. +void port_enable_tick(void) { +} + +// Disable 1/1024 second tick. +void port_disable_tick(void) { +} + +void port_interrupt_after_ticks(uint32_t ticks) { + // todo: implement isr after rtc ticks +} + +void port_idle_until_interrupt(void) { + __WFI(); +} + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) { +} diff --git a/ports/analog/supervisor/serial.c b/ports/analog/supervisor/serial.c new file mode 100644 index 000000000000..7f485a35204c --- /dev/null +++ b/ports/analog/supervisor/serial.c @@ -0,0 +1,61 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2019 Lucian Copeland for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#include "py/mphal.h" +#include +#include "supervisor/shared/serial.h" + +#define MAX32_SERIAL 0 + +#if MAX32_SERIAL +// TODO: Switch this to using DEBUG_UART. +#endif + +void port_serial_init(void) { + #if MAX32_SERIAL + // huart2.Instance = USART2; + // huart2.Init.BaudRate = 115200; + // huart2.Init.WordLength = UART_WORDLENGTH_8B; + // huart2.Init.StopBits = UART_STOPBITS_1; + // huart2.Init.Parity = UART_PARITY_NONE; + // huart2.Init.Mode = UART_MODE_TX_RX; + // huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + // huart2.Init.OverSampling = UART_OVERSAMPLING_16; + // if (HAL_UART_Init(&huart2) == HAL_OK) { + // stm32f4_peripherals_status_led(1, 1); + // } + #endif +} + +bool port_serial_connected(void) { + return true; +} + +char port_serial_read(void) { + #if MAX32_SERIAL + // uint8_t data; + // HAL_UART_Receive(&huart2, &data, 1, 500); + // return data; + #else + return -1; + #endif +} + +// There is no easy way to find the number of pending characters, so just say there's 1. +uint32_t port_serial_bytes_available(void) { + #if MAX32_SERIAL + // return __HAL_UART_GET_FLAG(&huart2, UART_FLAG_RXNE) ? 1 : 0; + #else + return 0; + #endif +} + +void port_serial_write_substring(const char *text, uint32_t len) { + #if MAX32_SERIAL + // HAL_UART_Transmit(&huart2, (uint8_t *)text, len, 5000); + #endif +} diff --git a/tools/ci_fetch_deps.py b/tools/ci_fetch_deps.py index cbae4b3ff5e0..778a90c31b63 100644 --- a/tools/ci_fetch_deps.py +++ b/tools/ci_fetch_deps.py @@ -46,6 +46,12 @@ def matching_submodules(s): # Submodules needed by port builds outside of their ports directory. # Should we try and detect these? PORT_DEPS = { + "analog": [ + "extmod/ulab/", + "/lib/tlsf/", + "lib/tinyusb/", + "lib/protomatter", + ], "atmel-samd": [ "extmod/ulab/", "lib/adafruit_floppy/", From e8528faddc04cf586f0f11b2dc3e7e24a8ffde28 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Thu, 15 Aug 2024 23:10:01 -0700 Subject: [PATCH 02/39] - Added 1/1024 s tick based on 4096 Hz RTC. - Added simple status LED for initial testing - Generally cleaned up & implemented supervisor/port.c - Added some additional commenting from supervisor headers - Fixed a linkerscript issue copying .text into FLASH_ISR --- ports/analog/Makefile | 7 +- ports/analog/background.c | 37 ++- ports/analog/boards/APARD/board.c | 20 +- ports/analog/linking/max32690_cktpy.ld | 19 +- ports/analog/mpconfigport.mk | 18 +- ports/analog/mphalport.c | 9 +- ports/analog/supervisor/internal_flash.h | 2 +- ports/analog/supervisor/max32_port.h | 31 +++ ports/analog/supervisor/port.c | 314 +++++++++++++++++------ 9 files changed, 351 insertions(+), 106 deletions(-) create mode 100644 ports/analog/supervisor/max32_port.h diff --git a/ports/analog/Makefile b/ports/analog/Makefile index b348a57d237f..b7ed00f0b691 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -75,10 +75,11 @@ INC += \ -I$(CMSIS_ROOT)/Device/Maxim/$(MCU_VARIANT_UPPER)/Include \ -I$(ADI_PERIPH)/Include/$(MCU_VARIANT_UPPER) \ -I$(PERIPH_SRC)/SYS \ - -I$(PERIPH_SRC)/GPIO \ -I$(PERIPH_SRC)/CTB \ - -I$(PERIPH_SRC)/ICC \ -I$(PERIPH_SRC)/FLC \ + -I$(PERIPH_SRC)/GPIO \ + -I$(PERIPH_SRC)/ICC \ + -I$(PERIPH_SRC)/RTC \ -I$(PERIPH_SRC)/UART \ INC += -I$(CMSIS_ROOT)/Device/Maxim/$(MCU_VARIANT_UPPER)/Source/GCC @@ -103,6 +104,8 @@ SRC_MAX32 += \ $(PERIPH_SRC)/GPIO/gpio_reva.c \ $(PERIPH_SRC)/ICC/icc_$(DIE_TYPE).c \ $(PERIPH_SRC)/ICC/icc_reva.c \ + $(PERIPH_SRC)/RTC/rtc_$(DIE_TYPE).c \ + $(PERIPH_SRC)/RTC/rtc_reva.c \ $(PERIPH_SRC)/UART/uart_common.c \ $(PERIPH_SRC)/UART/uart_$(DIE_TYPE).c \ $(PERIPH_SRC)/UART/uart_revb.c \ diff --git a/ports/analog/background.c b/ports/analog/background.c index ccf71bf77bf5..f08eb00a7123 100644 --- a/ports/analog/background.c +++ b/ports/analog/background.c @@ -9,20 +9,41 @@ #include "supervisor/usb.h" #include "supervisor/shared/stack.h" -//TODO: IMPLEMENT +#include "supervisor/max32_port.h" -void port_background_task(void) { - return; -} +/** NOTE: ALL "ticks" refer to a 1/1024 s period */ +static int status_led_ticks=0; + +extern mxc_gpio_cfg_t led_pin[]; +extern const unsigned int num_leds; +extern mxc_gpio_cfg_t pb_pin[]; +extern const unsigned int num_pbs; + +// This function is where port-specific background +// tasks should be performed +// Execute port specific actions during background tick. Only if ticks are enabled. void port_background_tick(void) { - return; + status_led_ticks++; + + // Set an LED approx. 1/s + if (status_led_ticks > 1024) + { + MXC_GPIO_OutToggle(led_pin[0].port, led_pin[0].mask); + status_led_ticks = 0; + } } -void port_start_background_tick(void) { - return; +// Execute port specific actions during background tasks. This is before the +// background callback system and happens *very* often. Use +// port_background_tick() when possible. +void port_background_task(void) { } +// Take port specific actions at the beginning and end of background ticks. +// This is used e.g., to set a monitoring pin for debug purposes. "Actual +// work" should be done in port_background_tick() instead. +void port_start_background_tick(void) { +} void port_finish_background_tick(void) { - return; } diff --git a/ports/analog/boards/APARD/board.c b/ports/analog/boards/APARD/board.c index b44a1ae51e04..cd69f369579a 100644 --- a/ports/analog/boards/APARD/board.c +++ b/ports/analog/boards/APARD/board.c @@ -6,4 +6,22 @@ #include "supervisor/board.h" -// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. +// DEFAULT: Using the weak-defined supervisor/shared/board.c functions + +/***** OPTIONAL BOARD-SPECIFIC FUNTIONS from supervisor/board.h *****/ +// Returns true if the user initiates safe mode in a board specific way. +// Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific +// way. +// bool board_requests_safe_mode(void); + +// Initializes board related state once on start up. +// void board_init(void); + +// Reset the state of off MCU components such as neopixels. +// void reset_board(void); + +// Deinit the board. This should put the board in deep sleep durable, low power +// state. It should not prevent the user access method from working (such as +// disabling USB, BLE or flash) because CircuitPython may continue to run. +// void board_deinit(void); +/*******************************************************************/ diff --git a/ports/analog/linking/max32690_cktpy.ld b/ports/analog/linking/max32690_cktpy.ld index 3ecc0b991f2f..423bfc321168 100644 --- a/ports/analog/linking/max32690_cktpy.ld +++ b/ports/analog/linking/max32690_cktpy.ld @@ -1,9 +1,9 @@ MEMORY { ROM (rx) : ORIGIN = 0x00000000, LENGTH = 128K FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 3M - FLASH_ISR (rx) : ORIGIN = 0x10000000, LENGTH = 200K - FLASH_FS (rw) : ORIGIN = 0x10032000, LENGTH = 64K - FLASH_FIRMWARE (rx) : ORIGIN = 0x10042000, LENGTH = 0x002BE000 + FLASH_ISR (rx) : ORIGIN = 0x10000000, LENGTH = 16K + FLASH_FS (rw) : ORIGIN = 0x10004000, LENGTH = 64K + FLASH_FIRMWARE (rx) : ORIGIN = 0x10014000, LENGTH = 0x10030000 - 80K RAM (rwx): ORIGIN = 0x20000000, LENGTH = 1M } /* FLASH FIRMWARE: 0x10300000 (end) - 0x10042000 = 0x002BE000 */ @@ -21,14 +21,18 @@ SECTIONS { .isr_vector : { . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - EXCLUDE_FILE (*riscv.o) *(.text*) /* program code, exclude RISCV code */ + /* Startup code */ + KEEP(*(.isr_vector*)) } >FLASH_ISR .text : { . = ALIGN(4); _text = .; + + /* program code, exclude RISCV code */ + EXCLUDE_FILE (*riscv.o) *(.text*) + *(.rodata*) /* read-only data: "const" */ KEEP(*(.init)) @@ -142,17 +146,20 @@ SECTIONS { * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackLimit = __StackTop - SIZEOF(.stack_dummy); - __estack = __StackLimit; /* Provide _estack for CktPython */ + _estack = __StackLimit; /* Provide _estack for CktPython */ .heap (COPY): { . = ALIGN(4); + __heap = .; PROVIDE ( end = . ); PROVIDE ( _end = . ); *(.heap*) __HeapLimit = ABSOLUTE(__StackLimit); } > RAM + __eheap = __HeapLimit; + PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk index 3c68a62884fd..c4a6234f664e 100644 --- a/ports/analog/mpconfigport.mk +++ b/ports/analog/mpconfigport.mk @@ -11,6 +11,13 @@ USB_NUM_ENDPOINT_PAIRS ?= 0 LONGINT_IMPL ?= MPZ INTERNAL_LIBM ?= 1 +INTERNAL_FLASH_FILESYSTEM = 1 +SPI_FLASH_FILESYSTEM = 0 +QSPI_FLASH_FILESYSTEM = 0 + +# TODO: Review flash filesystem funcs before flashing +DISABLE_FILESYSTEM = 0 + #################################################################################### # Suggested config for first-time porting #################################################################################### @@ -31,6 +38,7 @@ CIRCUITPY_NVM = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 CIRCUITPY_ROTARYIO = 0 +#todo: implement time/date based on RTC sec/subsec CIRCUITPY_RTC = 0 CIRCUITPY_SDCARDIO = 0 CIRCUITPY_FRAMEBUFFERIO = 0 @@ -60,8 +68,9 @@ CIRCUITPY_USB_HID = 0 CIRCUITPY_USB_MIDI = 0 # Does nothing without I2C CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 + # No requirements, but takes extra flash -CIRCUITPY_ULAB = 0 +CIRCUITPY_ULAB = 1 #################################################################################### # Required for clean building (additional CircuittPython Defaults) #################################################################################### @@ -76,10 +85,3 @@ CIRCUITPY_BUSDEVICE = 0 # TinyUSB will be added later. CIRCUITPY_TINYUSB = 0 CIRCUITPY_PYUSB = 0 - -INTERNAL_FLASH_FILESYSTEM = 1 -SPI_FLASH_FILESYSTEM = 0 -QSPI_FLASH_FILESYSTEM = 0 - -# TODO: Review flash filesystem funcs before flashing -DISABLE_FILESYSTEM = 0 diff --git a/ports/analog/mphalport.c b/ports/analog/mphalport.c index 1bbcf605b007..d4e63ec67393 100644 --- a/ports/analog/mphalport.c +++ b/ports/analog/mphalport.c @@ -1,10 +1,15 @@ #include "mphalport.h" -#include "cmsis_gcc.h" +#include "py/mphal.h" +// includes __enable/__disable interrupts +#include "mxc_sys.h" -// TODO: Define tick & other port functions +#include "shared-bindings/microcontroller/__init__.h" +void mp_hal_delay_us(mp_uint_t delay) { + common_hal_mcu_delay_us(delay); +} void mp_hal_disable_all_interrupts(void) { __disable_irq(); diff --git a/ports/analog/supervisor/internal_flash.h b/ports/analog/supervisor/internal_flash.h index e59fd2af2408..ef944fbffed5 100644 --- a/ports/analog/supervisor/internal_flash.h +++ b/ports/analog/supervisor/internal_flash.h @@ -10,7 +10,7 @@ #ifdef MAX32690 #define MAX32_FLASH_SIZE 0x300000 // 3 MB #define INTERNAL_FLASH_FILESYSTEM_SIZE 0x10000 // 64K -#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x10032000 // Load into the last MB of code/data storage??? +#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x10040000 // Load into the last MB of code/data storage??? #endif #define INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS (INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE) diff --git a/ports/analog/supervisor/max32_port.h b/ports/analog/supervisor/max32_port.h new file mode 100644 index 000000000000..25641a5dddbc --- /dev/null +++ b/ports/analog/supervisor/max32_port.h @@ -0,0 +1,31 @@ + +#ifndef MAX32_PORT_H +#define MAX32_PORT_H + +#include + +#include "mxc_sys.h" +#include "mxc_pins.h" +#include "gpio.h" +#include "mxc_assert.h" + +/** Linker variables defined.... + * _estack: end of the stack + * _ebss: end of BSS section + * _ezero: same as ebss (acc. to main.c) + */ +extern uint32_t _ezero; +extern uint32_t _estack; +extern uint32_t _ebss; // Stored at the end of the bss section (which includes the heap). +extern uint32_t __stack, __heap; + +extern uint32_t SystemCoreClock; + +// Tick timer should be 1/1024 s. RTC Oscillator is usually 32.768 kHz ERTCO. +#define TICKS_PER_SEC 1024 + +#ifdef MAX32690 +#define SUBSEC_PER_TICK 8 // 12-bit ssec register, ticks @ 4096 Hz +#endif + +#endif //MAX32_PORT_H diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index cf63b3a261f4..fd6bc1806aeb 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -29,139 +29,297 @@ */ #include +#include +#include "supervisor/background_callback.h" #include "supervisor/board.h" #include "supervisor/port.h" -#include -// #include "gpio.h" -#include "mxc_assert.h" +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/__init__.h" + +//todo: pack the below definitions into their own module +//todo: under peripherals/gpio, peripherals/clocks, etc. + +// Sys includes +#include "max32_port.h" + +// Timers #include "mxc_delay.h" -#include "mxc_device.h" -#include "mxc_pins.h" -#include "mxc_sys.h" -#include "uart.h" - -/** Linker variables defined.... - * _estack: end of the stack - * _ebss: end of BSS section - * _ezero: same as ebss (acc. to main.c) - */ -extern uint32_t _ezero; -extern uint32_t _estack; -extern uint32_t _ebss; // Stored at the end of the bss section (which includes the heap). -extern uint32_t _ld_heap_start, _ld_heap_end, _ld_stack_top, _ld_stack_bottom; +#include "rtc.h" + +//todo: define an LED HAL +// #include "peripherals/led.h" + +#ifdef MAX32690 +// Board-level setup for MAX32690 +// clang-format off +const mxc_gpio_cfg_t pb_pin[] = { + { MXC_GPIO1, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}, +}; +const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t)); + +const mxc_gpio_cfg_t led_pin[] = { + { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, + { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, + { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, +}; +const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t)); +// clang-format on +#endif + +// For caching rtc data for ticks +static uint32_t subsec, sec = 0; // defined by cmsis core files -void NVIC_SystemReset(void) NORETURN; +extern void NVIC_SystemReset(void) NORETURN; safe_mode_t port_init(void) { - return SAFE_MODE_NONE; -} + int err = E_NO_ERROR; -void HAL_Delay(uint32_t delay_ms) { -} + // Enable GPIO (enables clocks + common init for ports) + for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++){ + err = MXC_GPIO_Init(0x1 << i); + if (err) { + return SAFE_MODE_PROGRAMMATIC; + } + } -uint32_t HAL_GetTick(void) { - return 1000; -} + // Init Board LEDs + /* setup GPIO for the LED */ + for (int i = 0; i < num_leds; i++) { + // Set the output value + MXC_GPIO_OutClr(led_pin[i].port, led_pin[i].mask); -void SysTick_Handler(void) { -} + if (MXC_GPIO_Config(&led_pin[i]) != E_NO_ERROR) { + return SAFE_MODE_PROGRAMMATIC; + } + } -void reset_to_bootloader(void) { - NVIC_SystemReset(); -} + // Turn on one LED to indicate Sign of Life + MXC_GPIO_OutSet(led_pin[0].port, led_pin[0].mask); + + // Init RTC w/ 0sec, 0subsec + // Driven by 32.768 kHz ERTCO, with ssec= 1/4096 s + err = MXC_RTC_Init(0, 0); + if (err) { + return SAFE_MODE_SDK_FATAL_ERROR; + } + NVIC_EnableIRQ(RTC_IRQn); + + // todo: init periph clocks / console here when ready + MXC_RTC_Start(); + return SAFE_MODE_NONE; +} +// Reset the MCU completely void reset_cpu(void) { + // includes MCU reset request + awaits on memory bus NVIC_SystemReset(); } +// Reset MCU state void reset_port(void) { - // MXC_GPIO_Reset(MXC_GPIO0); - // MXC_GPIO_Reset(MXC_GPIO1); -} + int err; + // Reset GPIO Ports + // Enable GPIO (enables clocks + common init for ports) + for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++){ + err = MXC_GPIO_Reset(0x1 << i); + if (err) { + // todo: indicate some gpio error + continue; + } + } -uint32_t *port_heap_get_bottom(void) { - return (uint32_t *)0xAAAAAAAA; + // TODO: Reset peripheral clocks + + // Reset 1/1024 tick timer + MXC_RTC_Stop(); + MXC_RTC_ClearFlags(0xFFFFFFFF); + MXC_RTC_Init(0,0); } -uint32_t *port_heap_get_top(void) { - return (uint32_t *)0xAAAAAAAF; +// Reset to the bootloader +// note: not implemented since max32 requires external stim ignals to +// activate bootloaders +// todo: check if there's a method to jump to it +void reset_to_bootloader(void) { + NVIC_SystemReset(); + while (true) { + asm ("nop;"); + } } +/** Acquire values of stack & heap starts & limits + * Return variables defined by linkerscript. + */ uint32_t *port_stack_get_limit(void) { + // ignore array bounds GCC warnings for stack here #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Warray-bounds" - // return port_stack_get_top() - (CIRCUITPY_DEFAULT_STACK_SIZE + CIRCUITPY_EXCEPTION_STACK_SIZE) / sizeof(uint32_t); - return port_stack_get_top() - (0 + 0) / sizeof(uint32_t); + + // NOTE: Only return how much stack we have alloted for CircuitPython + return (uint32_t *)(port_stack_get_top() - (CIRCUITPY_DEFAULT_STACK_SIZE + CIRCUITPY_EXCEPTION_STACK_SIZE) / sizeof(uint32_t)); + // return _estack; + + // end GCC diagnostic disable #pragma GCC diagnostic pop } - uint32_t *port_stack_get_top(void) { - return (uint32_t *)0xB000000; + return (uint32_t *)__stack; +} +uint32_t *port_heap_get_bottom(void) { + return (uint32_t *)__heap; +} +uint32_t *port_heap_get_top(void) { + return port_stack_get_limit(); } - -// Place the word to save just after our BSS section that gets blanked. +/** Save & retrieve a word from memory over a reset cycle. + * Used for safe mode + */ void port_set_saved_word(uint32_t value) { _ebss = value; } - uint32_t port_get_saved_word(void) { return _ebss; } -// __attribute__((used)) void MemManage_Handler(void) { -// reset_into_safe_mode(SAFE_MODE_HARD_FAULT); -// while (true) { -// asm ("nop;"); -// } -// } - -// __attribute__((used)) void BusFault_Handler(void) { -// reset_into_safe_mode(SAFE_MODE_HARD_FAULT); -// while (true) { -// asm ("nop;"); -// } -// } - -// __attribute__((used)) void UsageFault_Handler(void) { -// reset_into_safe_mode(SAFE_MODE_HARD_FAULT); -// while (true) { -// asm ("nop;"); -// } -// } - -// __attribute__((used)) void HardFault_Handler(void) { -// reset_into_safe_mode(SAFE_MODE_HARD_FAULT); -// while (true) { -// asm ("nop;"); -// } -// } - +// Raw monotonic tick count since startup. +// NOTE (rollover): +// seconds reg is 32 bits, can hold up to 2^32-1 +// theref. rolls over after ~136 years uint64_t port_get_raw_ticks(uint8_t *subticks) { - return 1000; + // Ensure we can read from ssec register as soon as we can + // MXC function does cross-tick / busy checking of RTC controller + __disable_irq(); + MXC_RTC_GetTime(&sec, &subsec); + __enable_irq(); + + // Return ticks given total subseconds + // ticks = TICKS/s * s + subsec/ subs/tick + uint64_t raw_ticks = ((uint64_t)TICKS_PER_SEC) * sec + (subsec / SUBSEC_PER_TICK); + + if (subticks) { + // subticks may only be filled to a resn of 1/4096 in some cases + // e.g. multiply by 32 / 8 = 4 to get true 1/32768 subticks + *subticks = (32 / (SUBSEC_PER_TICK)) * (subsec - (subsec / SUBSEC_PER_TICK)); + } + + return raw_ticks; } // Enable 1/1024 second tick. void port_enable_tick(void) { + MXC_RTC_Start(); } // Disable 1/1024 second tick. void port_disable_tick(void) { + MXC_RTC_Stop(); } +// Wake the CPU after a given # of ticks or sooner void port_interrupt_after_ticks(uint32_t ticks) { - // todo: implement isr after rtc ticks + // Stop RTC & store current time & ticks + port_disable_tick(); + port_get_raw_ticks(NULL); + + uint32_t target_sec = (ticks / TICKS_PER_SEC); + uint32_t target_ssec = (ticks - (target_sec * TICKS_PER_SEC)) * SUBSEC_PER_TICK; + + // Set up alarm configuration + // if alarm is greater than 1 s, + // use the ToD alarm --> resol. to closest second + // else + // use Ssec alarm --> resn. to 1/1024 s. (down to a full tick) + if (target_sec > 0) { + if (MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE | + MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) { + // todo: signal some RTC error! + } + + if (MXC_RTC_SetTimeofdayAlarm(target_sec) != E_NO_ERROR) { + // todo: signal some RTC error! + } + if (MXC_RTC_EnableInt(MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) { + // todo: signal some RTC error! + } + } + else { + if (MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE | + MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) { + // todo: signal some RTC error! + } + + if (MXC_RTC_SetSubsecondAlarm(target_ssec) != E_NO_ERROR) { + // todo: signal some RTC error! + } + + if (MXC_RTC_EnableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE) == E_BUSY) { + // todo: signal some RTC error! + } + } + port_enable_tick(); +} + +void RTC_IRQHandler(void) { + // Read flags to clear + int flags = MXC_RTC_GetFlags(); + + if (flags & MXC_F_RTC_CTRL_TOD_ALARM) { + MXC_RTC_ClearFlags(MXC_F_RTC_CTRL_TOD_ALARM); + while (MXC_RTC_DisableInt(MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) {} + } + + if (flags & MXC_F_RTC_CTRL_SSEC_ALARM) { + MXC_RTC_ClearFlags(MXC_F_RTC_CTRL_SSEC_ALARM); + while (MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE) == E_BUSY) {} + } } void port_idle_until_interrupt(void) { - __WFI(); + // Check if alarm triggers before we even got here + if (MXC_RTC_GetFlags() == (MXC_F_RTC_CTRL_TOD_ALARM | MXC_F_RTC_CTRL_SSEC_ALARM)) { + return; + } + + common_hal_mcu_disable_interrupts(); + if (!background_callback_pending()) { + __WFI(); + } + common_hal_mcu_enable_interrupts(); +} + +__attribute__((used)) void MemManage_Handler(void) { + reset_into_safe_mode(SAFE_MODE_HARD_FAULT); + while (true) { + asm ("nop;"); + } +} + +__attribute__((used)) void BusFault_Handler(void) { + reset_into_safe_mode(SAFE_MODE_HARD_FAULT); + while (true) { + asm ("nop;"); + } +} + +__attribute__((used)) void UsageFault_Handler(void) { + reset_into_safe_mode(SAFE_MODE_HARD_FAULT); + while (true) { + asm ("nop;"); + } +} + +__attribute__((used)) void HardFault_Handler(void) { + reset_into_safe_mode(SAFE_MODE_HARD_FAULT); + while (true) { + asm ("nop;"); + } } -// Required by __libc_init_array in startup code if we are compiling using -// -nostdlib/-nostartfiles. +// Required by libc _init_array loops in startup code +// if we are compiling using "-nostdlib/-nostartfiles" void _init(void) { } From 8978e3e437ad04e4fff909034c851739cc9e83d7 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Tue, 20 Aug 2024 13:23:36 -0700 Subject: [PATCH 03/39] - (build): Added tinyUSB src/inc, DMA & RTC from MSDK. - (build): added hex & bin targets for executable. - (build): temporarily modified .ld due to issue exiting MAX32 ROM code - (flash): added flash target for jlink & msdk, along with helper files under tools/ - Reorganized mpconfigport.mk for clarity - Moved flash driver & LED/PB definitions to board files (mpconfigboard._) --- ports/analog/Makefile | 58 ++++++++++++------ ports/analog/README.md | 4 +- ports/analog/background.c | 16 ++--- ports/analog/boards/APARD/mpconfigboard.h | 10 +++- ports/analog/linking/max32690_cktpy.ld | 55 ++++++++++------- ports/analog/mpconfigport.h | 5 +- ports/analog/mpconfigport.mk | 72 ++++++++++++----------- ports/analog/mphalport.h | 3 +- ports/analog/supervisor/internal_flash.c | 49 ++++++++++----- ports/analog/supervisor/internal_flash.h | 7 --- ports/analog/tools/connect-gdb.txt | 16 +++++ ports/analog/tools/flash-halt-openocd.bat | 5 ++ ports/analog/tools/flash_max32.jlink | 6 ++ 13 files changed, 191 insertions(+), 115 deletions(-) create mode 100644 ports/analog/tools/connect-gdb.txt create mode 100644 ports/analog/tools/flash-halt-openocd.bat create mode 100644 ports/analog/tools/flash_max32.jlink diff --git a/ports/analog/Makefile b/ports/analog/Makefile index b7ed00f0b691..151299a8792a 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -76,9 +76,11 @@ INC += \ -I$(ADI_PERIPH)/Include/$(MCU_VARIANT_UPPER) \ -I$(PERIPH_SRC)/SYS \ -I$(PERIPH_SRC)/CTB \ + -I$(PERIPH_SRC)/DMA \ -I$(PERIPH_SRC)/FLC \ -I$(PERIPH_SRC)/GPIO \ -I$(PERIPH_SRC)/ICC \ + -I$(PERIPH_SRC)/TMR \ -I$(PERIPH_SRC)/RTC \ -I$(PERIPH_SRC)/UART \ @@ -96,6 +98,9 @@ SRC_MAX32 += \ $(PERIPH_SRC)/CTB/ctb_$(DIE_TYPE).c \ $(PERIPH_SRC)/CTB/ctb_reva.c \ $(PERIPH_SRC)/CTB/ctb_common.c \ + $(PERIPH_SRC)/DMA/dma_reva.c \ + $(PERIPH_SRC)/DMA/dma_revb.c \ + $(PERIPH_SRC)/DMA/dma_$(DIE_TYPE).c \ $(PERIPH_SRC)/FLC/flc_common.c \ $(PERIPH_SRC)/FLC/flc_$(DIE_TYPE).c \ $(PERIPH_SRC)/FLC/flc_reva.c \ @@ -106,6 +111,9 @@ SRC_MAX32 += \ $(PERIPH_SRC)/ICC/icc_reva.c \ $(PERIPH_SRC)/RTC/rtc_$(DIE_TYPE).c \ $(PERIPH_SRC)/RTC/rtc_reva.c \ + $(PERIPH_SRC)/TMR/tmr_common.c \ + $(PERIPH_SRC)/TMR/tmr_revb.c \ + $(PERIPH_SRC)/TMR/tmr_$(DIE_TYPE).c \ $(PERIPH_SRC)/UART/uart_common.c \ $(PERIPH_SRC)/UART/uart_$(DIE_TYPE).c \ $(PERIPH_SRC)/UART/uart_revb.c \ @@ -126,7 +134,7 @@ STARTUPFILE = $(CMSIS_ROOT)/Device/Maxim/$(MCU_VARIANT_UPPER)/Source/GCC/startup # CircuitPython custom linkerfile (necessary for build steps & filesystems) LINKERFILE = linking/$(MCU_VARIANT_LOWER)_cktpy.ld -LDFLAGS += -nostartfiles -specs=nosys.specs -specs=nano.specs +LDFLAGS += -nostartfiles -specs=nano.specs endif SRC_S += supervisor/cpu.s \ @@ -137,13 +145,14 @@ CFLAGS += -D$(MCU_VARIANT_UPPER) \ -DTARGET_REV=0x4131 \ -DTARGET=$(MCU_VARIANT_UPPER) \ -DIAR_PRAGMAS=0 \ + -DRISCV_LOAD=0 \ # -DFLASH_ORIGIN=0x10000000 \ # -DFLASH_SIZE=0x340000 \ # -DSRAM_ORIGIN=0x20000000 \ # -DSRAM_SIZE=0x100000 \ CPU_CORE=cortex-m4 -CFLAGS += -mthumb -mcpu=$(CPU_CORE) -mfloat-abi=hard -mfpu=fpv4-sp-d16 +CFLAGS += -mthumb -mcpu=$(CPU_CORE) -mfloat-abi=softfp -mfpu=fpv4-sp-d16 # NOTE: Start with DEBUG ONLY settings for now ifeq ($(DEBUG),) @@ -154,7 +163,7 @@ ifeq ($(DEBUG),1) CFLAGS += -ggdb3 COPT = -Og else -COPT += -O2 +COPT += -O0 #opt completely off to start endif @@ -165,9 +174,9 @@ CFLAGS += \ # TODO: Add for TinyUSB once our PR goes through for MAX32 devices # Add TinyUSB -# INC += -I../../lib/tinyusb/src -# INC += -I../../supervisor/shared/usb -# SRC_C += lib/tinyusb/src/portable/mentor/musb/dcd_musb.c +INC += -I../../lib/tinyusb/src +INC += -I../../supervisor/shared/usb +SRC_C += lib/tinyusb/src/portable/mentor/musb/dcd_musb.c SRC_C += \ boards/$(BOARD)/board.c \ @@ -182,13 +191,14 @@ CFLAGS += -Wno-error=unused-parameter \ -Wno-error=sign-compare \ -Wno-error=strict-prototypes \ -Wno-error=cast-qual \ - -Wno-unused-variable \ - -Wno-lto-type-mismatch \ - -Wno-cast-align \ - -Wno-nested-externs \ - -Wno-sign-compare + -Wno-error=unused-variable \ + -Wno-error=lto-type-mismatch \ + -Wno-error=cast-align \ + -Wno-error=nested-externs \ + -Wno-error=sign-compare \ -LDFLAGS += $(CFLAGS) -Wl,-nostdlib -Wl,-T,$(LINKERFILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections +ENTRY = Reset_Handler +LDFLAGS += $(CFLAGS) --entry $(ENTRY) -Wl,-nostdlib -Wl,-T,$(LINKERFILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections LIBS := -lgcc -lc # If not using CKTPY mathlib, use toolchain mathlib @@ -234,7 +244,7 @@ SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_CIRCUITPY_COMMON) \ SRC_QSTR_PREPROCESSOR += # Default build target -all: $(BUILD)/firmware.elf +all: $(BUILD)/firmware.elf $(BUILD)/firmware.hex $(BUILD)/firmware.bin clean-max32: rm -rf build-* @@ -247,18 +257,32 @@ MAXIM_PATH := $(subst \,/,$(MAXIM_PATH)) flash-msdk: $(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \ -f interface/cmsis-dap.cfg -f target/$(MCU_VARIANT_LOWER).cfg \ - -c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit" + -c "program $(BUILD)/firmware.elf verify; init; reset; exit" # flash target using JLink JLINK_DEVICE = $(MCU_VARIANT_LOWER) -flash: flash-jlink -$(BUILD)/firmware.elf: $(OBJ) $(LINKERFILE) +JLINKEXE ?= JLink.exe +JLINKEXE += -if SWD -device ${JLINK_DEVICE} -speed 10000 +COMMAND_FILE := tools/flash_max32.jlink + +flash-jlink: $(BUILD)/firmware.bin + @$(JLINKEXE) -device $(MCU_VARIANT_UPPER) -NoGui 1 -CommandFile ${COMMAND_FILE} + +$(BUILD)/firmware.elf: $(OBJ) $(STEPECHO) "LINK $@" - $(Q)echo $(OBJ) > $(BUILD)/firmware.objs + $(Q)echo $^ > $(BUILD)/firmware.objs $(Q)$(CC) -o $@ $(LDFLAGS) @$(BUILD)/firmware.objs -Wl,--print-memory-usage -Wl,--start-group $(LIBS) -Wl,--end-group $(Q)$(SIZE) $@ | $(PYTHON) $(TOP)/tools/build_memory_info.py $(LINKERFILE) $(BUILD) +$(BUILD)/firmware.hex: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O ihex $^ $@ + +$(BUILD)/firmware.bin: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O binary $^ $@ + # ******************************************************************************* ### CKTPY BUILD RULES ### include $(TOP)/py/mkrules.mk diff --git a/ports/analog/README.md b/ports/analog/README.md index 0e5d3f7d2951..603a22f9fd4b 100644 --- a/ports/analog/README.md +++ b/ports/analog/README.md @@ -45,8 +45,6 @@ This requires the following: - The PICO board is connected to the target board via a 10-pin SWD ribbon cable. - If SWD connectors are not keyed, the P1 indicator (red line) on the SWD ribbon cable should match the P1 indicator on the board silkscreen near the 10-pin SWD connector. -[**Section in Progress.**] - ### Using the REPL -[**Section in Progress. Review & Testing are needed.**] +[**Section in Progress. USB support needs implementation & test.**] diff --git a/ports/analog/background.c b/ports/analog/background.c index f08eb00a7123..8dad8c4e351d 100644 --- a/ports/analog/background.c +++ b/ports/analog/background.c @@ -9,17 +9,17 @@ #include "supervisor/usb.h" #include "supervisor/shared/stack.h" -#include "supervisor/max32_port.h" +#include "max32_port.h" + +// From boards/$(BOARD)/board.c +extern const mxc_gpio_cfg_t pb_pin[]; +extern const int num_pbs; +extern const mxc_gpio_cfg_t led_pin[]; +extern const int num_leds; /** NOTE: ALL "ticks" refer to a 1/1024 s period */ static int status_led_ticks=0; -extern mxc_gpio_cfg_t led_pin[]; -extern const unsigned int num_leds; - -extern mxc_gpio_cfg_t pb_pin[]; -extern const unsigned int num_pbs; - // This function is where port-specific background // tasks should be performed // Execute port specific actions during background tick. Only if ticks are enabled. @@ -29,7 +29,7 @@ void port_background_tick(void) { // Set an LED approx. 1/s if (status_led_ticks > 1024) { - MXC_GPIO_OutToggle(led_pin[0].port, led_pin[0].mask); + MXC_GPIO_OutToggle(led_pin[2].port, led_pin[2].mask); status_led_ticks = 0; } } diff --git a/ports/analog/boards/APARD/mpconfigboard.h b/ports/analog/boards/APARD/mpconfigboard.h index b22c7ab9ecc6..87baa0120994 100644 --- a/ports/analog/boards/APARD/mpconfigboard.h +++ b/ports/analog/boards/APARD/mpconfigboard.h @@ -22,10 +22,16 @@ #define BOARD_HAS_CRYSTAL 1 -// todo: figure out a way to smartly set this up based on storage considerations +#define NUM_GPIO_PORTS 4 + #if INTERNAL_FLASH_FILESYSTEM -#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (0x10032000) // for MAX32690 +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (0x102FC000) // for MAX32690 #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (64 * 1024) // 64K + +#define MAX32_FLASH_SIZE 0x300000 // 3 MiB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x10000 // 64KiB +#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x102FC000 // Load into the last MiB of code/data storage + #else #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) #endif diff --git a/ports/analog/linking/max32690_cktpy.ld b/ports/analog/linking/max32690_cktpy.ld index 423bfc321168..e80a14d53c90 100644 --- a/ports/analog/linking/max32690_cktpy.ld +++ b/ports/analog/linking/max32690_cktpy.ld @@ -1,38 +1,51 @@ MEMORY { ROM (rx) : ORIGIN = 0x00000000, LENGTH = 128K FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 3M - FLASH_ISR (rx) : ORIGIN = 0x10000000, LENGTH = 16K - FLASH_FS (rw) : ORIGIN = 0x10004000, LENGTH = 64K - FLASH_FIRMWARE (rx) : ORIGIN = 0x10014000, LENGTH = 0x10030000 - 80K - RAM (rwx): ORIGIN = 0x20000000, LENGTH = 1M + FLASH_FIRMWARE (rx) : ORIGIN = 0x10000000, LENGTH = 2992K + FLASH_ISR (rx) : ORIGIN = 0x102EC000, LENGTH = 16K + FLASH_FS (rx) : ORIGIN = 0x102FC000, LENGTH = 64K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 1M } -/* FLASH FIRMWARE: 0x10300000 (end) - 0x10042000 = 0x002BE000 */ - -ENTRY(Reset_Handler) +/* Minimum flash page is 16K */ +/* FLASH FIRMWARE: 3072K [3MB] - 16K - 64K = 2992K */ SECTIONS { .rom : { - KEEP(*(.rom_vector)) - *(.rom_handlers*) + KEEP(*(.rom_vector*)) + KEEP(*(.rom_handlers*)) } > ROM + + /** FIXME: can't place this in its own section for some reason + * system doesn't exit ROM code unless *(.isr_vector) + * is placed in the beginning of .text, + * even if .text is moved upward and *(.isr_vector) is + * placed at 0x10000000. + **/ + /* Place ISR vector in a separate flash section */ - .isr_vector : - { - . = ALIGN(4); - /* Startup code */ - KEEP(*(.isr_vector*)) - } >FLASH_ISR + /* .isr_vector : */ + /* { */ + /* ISR Vector beginning of .text */ + /* KEEP(*(.isr_vector)) */ + /* KEEP(*(.isr_vector*)) */ + /* } > FLASH_ISR */ .text : { . = ALIGN(4); _text = .; - /* program code, exclude RISCV code */ - EXCLUDE_FILE (*riscv.o) *(.text*) + /* ISR Vector beginning of .text */ + /** fixme: may want to move this to FLASH_ISR long-term */ + KEEP(*(.isr_vector)) + KEEP(*(.isr_vector*)) + + . = ALIGN(4); + /* program code; exclude RISCV code */ + EXCLUDE_FILE (*riscv.o) *(.text*) *(.rodata*) /* read-only data: "const" */ KEEP(*(.init)) @@ -146,21 +159,21 @@ SECTIONS { * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackLimit = __StackTop - SIZEOF(.stack_dummy); + + _stack = __StackTop; _estack = __StackLimit; /* Provide _estack for CktPython */ .heap (COPY): { . = ALIGN(4); - __heap = .; + _heap = .; PROVIDE ( end = . ); PROVIDE ( _end = . ); *(.heap*) __HeapLimit = ABSOLUTE(__StackLimit); } > RAM - __eheap = __HeapLimit; - - PROVIDE(__stack = __StackTop); + _eheap = __HeapLimit; /* Check if data + heap + stack exceeds RAM limit */ ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack") diff --git a/ports/analog/mpconfigport.h b/ports/analog/mpconfigport.h index bb9f8b6ac368..cadfbddbc55b 100644 --- a/ports/analog/mpconfigport.h +++ b/ports/analog/mpconfigport.h @@ -12,11 +12,8 @@ #define MICROPY_PY_FUNCTION_ATTRS (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) - -// 24kiB stack +// 24KiB stack #define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000 -// uint8_t _ld_default_stack_size; -// #define CIRCUITPY_DEFAULT_STACK_SIZE ((uint32_t)&_ld_default_stack_size) // Also includes mpconfigboard.h #include "py/circuitpy_mpconfig.h" diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk index c4a6234f664e..b67622935183 100644 --- a/ports/analog/mpconfigport.mk +++ b/ports/analog/mpconfigport.mk @@ -15,7 +15,7 @@ INTERNAL_FLASH_FILESYSTEM = 1 SPI_FLASH_FILESYSTEM = 0 QSPI_FLASH_FILESYSTEM = 0 -# TODO: Review flash filesystem funcs before flashing +# TODO: TEST filesystem & general bringup! DISABLE_FILESYSTEM = 0 #################################################################################### @@ -24,60 +24,62 @@ DISABLE_FILESYSTEM = 0 # These modules are implemented in ports//common-hal: # Typically the first module to create -CIRCUITPY_MICROCONTROLLER = 1 +CIRCUITPY_MICROCONTROLLER ?= 1 # Typically the second module to create -CIRCUITPY_DIGITALIO = 0 -# Other modules: -CIRCUITPY_ANALOGIO = 0 -CIRCUITPY_BUSIO = 0 -CIRCUITPY_COUNTIO = 0 -CIRCUITPY_NEOPIXEL_WRITE = 0 -CIRCUITPY_PULSEIO = 0 -CIRCUITPY_OS = 1 -CIRCUITPY_NVM = 0 -CIRCUITPY_AUDIOBUSIO = 0 -CIRCUITPY_AUDIOIO = 0 -CIRCUITPY_ROTARYIO = 0 -#todo: implement time/date based on RTC sec/subsec -CIRCUITPY_RTC = 0 -CIRCUITPY_SDCARDIO = 0 -CIRCUITPY_FRAMEBUFFERIO = 0 -CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CTARGET = 0 +CIRCUITPY_DIGITALIO ?= 0 + +# Plan to implement +CIRCUITPY_BUSIO ?= 0 +CIRCUITPY_OS ?= 1 +CIRCUITPY_RTC ?= 0 + +# Other modules (may or may not implement): +CIRCUITPY_ANALOGIO ?= 0 +CIRCUITPY_AUDIOBUSIO ?= 0 +CIRCUITPY_AUDIOIO ?= 0 +CIRCUITPY_COUNTIO ?= 0 +CIRCUITPY_NEOPIXEL_WRITE ?= 0 +CIRCUITPY_FREQUENCYIO ?= 0 +CIRCUITPY_I2CTARGET ?= 0 +CIRCUITPY_PULSEIO ?= 0 +CIRCUITPY_PWMIO ?= 0 +CIRCUITPY_NVM ?= 0 +CIRCUITPY_ROTARYIO ?= 0 +CIRCUITPY_SDCARDIO ?= 0 +CIRCUITPY_FRAMEBUFFERIO ?= 0 # Requires SPI, PulseIO (stub ok): -CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_DISPLAYIO ?= 0 # These modules are implemented in shared-module/ - they can be included in # any port once their prerequisites in common-hal are complete. # Requires DigitalIO: -CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_BITBANGIO ?= 0 # Requires neopixel_write or SPI (dotstar) -CIRCUITPY_PIXELBUF = 0 +CIRCUITPY_PIXELBUF ?= 0 # Requires OS -CIRCUITPY_RANDOM = 0 +CIRCUITPY_RANDOM ?= 0 # Requires OS, filesystem -CIRCUITPY_STORAGE = 0 +CIRCUITPY_STORAGE ?= 0 # Requires Microcontroller -CIRCUITPY_TOUCHIO = 0 -# Requires UART! -CIRCUITPY_CONSOLE_UART = 0 +CIRCUITPY_TOUCHIO ?= 0 +# Requires UART +CIRCUITPY_CONSOLE_UART ?= 0 # Requires USB -CIRCUITPY_USB_DEVICE = 0 -CIRCUITPY_USB_CDC = 0 -CIRCUITPY_USB_HID = 0 -CIRCUITPY_USB_MIDI = 0 +CIRCUITPY_USB_DEVICE ?= 0 +CIRCUITPY_USB_CDC ?= 0 +CIRCUITPY_USB_HID ?= 0 +CIRCUITPY_USB_MIDI ?= 0 # Does nothing without I2C CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 # No requirements, but takes extra flash CIRCUITPY_ULAB = 1 + #################################################################################### # Required for clean building (additional CircuittPython Defaults) #################################################################################### -# Enabled by default -CIRCUITPY_PWMIO = 0 + # Depends on BUSIO -# CIRCUITPY_BLEIO = 0 CIRCUITPY_BLEIO_HCI = 0 CIRCUITPY_KEYPAD = 0 CIRCUITPY_BUSDEVICE = 0 diff --git a/ports/analog/mphalport.h b/ports/analog/mphalport.h index 8dba63d82ff0..5efd78736e78 100644 --- a/ports/analog/mphalport.h +++ b/ports/analog/mphalport.h @@ -10,8 +10,7 @@ #include "lib/oofatfs/ff.h" #include "supervisor/shared/tick.h" -// TODO: Define tick & other port functions -// Global millisecond tick count (driven by SysTick interrupt). +// Global millisecond tick count static inline mp_uint_t mp_hal_ticks_ms(void) { return supervisor_ticks_ms32(); } diff --git a/ports/analog/supervisor/internal_flash.c b/ports/analog/supervisor/internal_flash.c index a8c10076d3bf..97fe21d4a52c 100644 --- a/ports/analog/supervisor/internal_flash.c +++ b/ports/analog/supervisor/internal_flash.c @@ -26,11 +26,11 @@ #include "mxc_device.h" /** TODO: - * - Verify all necessary Filesystem MACROs are defined in mpconfigport.h + * Test! * * NOTE: * ANY function which modifies flash contents must execute from a crit section. - * This is because FLC functions are loc'd in RAM, and any ISR executing + * This is because FLC functions are loc'd in RAM, and an ISR executing * from Flash will trigger a HardFault. * * An alternative would be to initialize with NVIC_SetRAM(), @@ -54,10 +54,14 @@ typedef struct { } flash_layout_t; #ifdef MAX32690 +// struct layout is the actual layout of flash +// FS Code will use INTERNAL_FLASH_FILESYSTEM_START_ADDR +// and won't conflict with ISR vector in first 16 KiB of flash static const flash_layout_t flash_layout[] = { - { 0x1000000, 0x4000, 192}, - { 0x1030000, 0x2000, 32 }, + { 0x10000000, 0x4000, 192}, + // { 0x10300000, 0x2000, 32 }, // RISC-V flash }; +// Cache a full 16K sector static uint8_t _flash_cache[0x4000] __attribute__((aligned(4))); #endif @@ -65,12 +69,13 @@ static uint8_t _flash_cache[0x4000] __attribute__((aligned(4))); static uint32_t _cache_addr_in_flash = NO_CACHE; static inline int32_t block2addr(uint32_t block) { - if (block > 0 && block < INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS) { + if (block >= 0 && block < INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS) { return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE; } else return -1; } +// Get index, start addr, & size of the flash sector where addr lies int flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) { // This function should return -1 in the event of errors. if (addr >= flash_layout[0].base_addr) { @@ -78,17 +83,24 @@ int flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) { if (MP_ARRAY_SIZE(flash_layout) == 1) { sector_index = (addr - flash_layout[0].base_addr) / flash_layout[0].sector_size; if (sector_index >= flash_layout[0].num_sectors) { - return -1; + return -1; // addr is not in flash } if (start_addr) { *start_addr = flash_layout[0].base_addr + (sector_index * flash_layout[0].sector_size); } + else { + return -1; // start_addr is NULL + } if (size) { *size = flash_layout[0].sector_size; } + else { + return -1; //size is NULL + } return sector_index; } + // algorithm for multiple flash sections for (uint8_t i = 0; i < MP_ARRAY_SIZE(flash_layout); ++i) { for (uint8_t j = 0; j < flash_layout[i].num_sectors; ++j) { uint32_t sector_start_next = flash_layout[i].base_addr @@ -123,7 +135,7 @@ uint32_t supervisor_flash_get_block_count(void) { return INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS; } -// Flush the flash page that is currently cached +// Write back to Flash the page that is currently cached void port_internal_flash_flush(void) { // Flash has not been cached if (_cache_addr_in_flash == NO_CACHE) { @@ -186,10 +198,11 @@ void port_internal_flash_flush(void) { // Lock flash & exit MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED; - } - + } // finished flushing cache + // todo: verify no other flash operation (e.g. flushing HW cache) is needed to complete this } +// Read flash blocks, using cache if it contains the right data mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { // Find the address of the block we want to read int src_addr = block2addr(block); @@ -208,9 +221,10 @@ mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t n uint32_t blocks_in_sector = (sector_size - (src_addr - sector_start)) / FILESYSTEM_BLOCK_SIZE; // If the whole read is inside the cache, then read cache - if (num_blocks <= blocks_in_sector && _cache_addr_in_flash == sector_start) { + if ( (num_blocks <= blocks_in_sector) && (_cache_addr_in_flash == sector_start) ) { memcpy(dest, (_flash_cache + (src_addr - sector_start)), FILESYSTEM_BLOCK_SIZE * num_blocks); } else { + // flush the cache & read the flash data directly supervisor_flash_flush(); /** NOTE: The MXC_FLC_Read function executes from SRAM and does some more error checking * than memcpy does. Will use it for now. @@ -220,6 +234,9 @@ mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t n return 0; // success } +// Write to flash blocks, using cache if it is targeting the right page (and large enough) +// todo: most of this fn is taken from the ST driver. +// todo: look at other ports and see if I can adapt it at all mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { uint32_t count=0; uint32_t sector_size=0; @@ -251,7 +268,7 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, // if we're not at the start of a sector, copy the whole sector to cache if (_cache_addr_in_flash != sector_start) { - // Flush cache first + // Flush cache first before we overwrite it supervisor_flash_flush(); _cache_addr_in_flash = sector_start; @@ -270,10 +287,13 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, return 0; // success } +// Empty the fs cache void supervisor_flash_release_cache(void) { - // Flush the cache for ARM M4 + // Invalidate the current FS cache + _cache_addr_in_flash = NO_CACHE; + + // Flush the hardware cache for ARM M4 MXC_ICC_Flush(MXC_ICC0); - MXC_ICC_Flush(MXC_ICC1); // Clear the line fill buffer by reading 2 pages from flash volatile uint32_t *line_addr; @@ -283,7 +303,4 @@ void supervisor_flash_release_cache(void) { line_addr = (uint32_t *)(MXC_FLASH_MEM_BASE + MXC_FLASH_PAGE_SIZE); line = *line_addr; (void)line; // Silence build warnings that this variable is not used. - - // Invalidate the current cache - _cache_addr_in_flash = NO_CACHE; } diff --git a/ports/analog/supervisor/internal_flash.h b/ports/analog/supervisor/internal_flash.h index ef944fbffed5..1b4091e9a4fd 100644 --- a/ports/analog/supervisor/internal_flash.h +++ b/ports/analog/supervisor/internal_flash.h @@ -6,11 +6,4 @@ #include "py/mpconfig.h" -/** Sections defined in linker files under "linking" */ -#ifdef MAX32690 -#define MAX32_FLASH_SIZE 0x300000 // 3 MB -#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x10000 // 64K -#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x10040000 // Load into the last MB of code/data storage??? -#endif - #define INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS (INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE) diff --git a/ports/analog/tools/connect-gdb.txt b/ports/analog/tools/connect-gdb.txt new file mode 100644 index 000000000000..ced4bdf6af3a --- /dev/null +++ b/ports/analog/tools/connect-gdb.txt @@ -0,0 +1,16 @@ +For connecting GDB... + +// Set symbol & exec to .elf +arm-none-eabi-gdb --se=build-APARD/firmware.elf + +// connect to remote on local machine TCP port :3333 +target extended-remote localhost:3333 + +// reset halt the MCU +monitor reset halt + +// set a breakpoint on main & hit it +b main +continue + +// now...time to mess around! diff --git a/ports/analog/tools/flash-halt-openocd.bat b/ports/analog/tools/flash-halt-openocd.bat new file mode 100644 index 000000000000..ae30cdff0b97 --- /dev/null +++ b/ports/analog/tools/flash-halt-openocd.bat @@ -0,0 +1,5 @@ +:: Flash the target MCU via OpenOCD, +:: then reset halt to prepare for gdb connection +:: waits for gdb connection on localhost port 3333; see connect-gdb.txt for more info +:: leave this process open if you're connecting gdb +openocd -s $MAXIM_PATH/Tools/OpenOCD/scripts -f interface/cmsis-dap.cfg -f target/max32690.cfg -c "program build-APARD/firmware.elf verify; init; reset halt" diff --git a/ports/analog/tools/flash_max32.jlink b/ports/analog/tools/flash_max32.jlink new file mode 100644 index 000000000000..4c9cbacb96fe --- /dev/null +++ b/ports/analog/tools/flash_max32.jlink @@ -0,0 +1,6 @@ +si 1 +erase +loadbin build-APARD/firmware.bin 0x10000000 +r +g +exit From b1ca548f758d9373a103051265b396fa2ccb5151 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Tue, 20 Aug 2024 13:32:18 -0700 Subject: [PATCH 04/39] - Fixed stack & heap variables from linkerscript causing HardFaults. Placed in supervisor/port.c - Moved LEDs & PBs from supervisor/port.c to boards/$(BOARD)/board.c for APARD - Reviewed Processor.c in common-hal/microcontroller - Prepared stubs for common-hal/microcontroller/Pin.c --- ports/analog/boards/APARD/board.c | 37 +++++++++++- ports/analog/boards/APARD/mpconfigboard.mk | 7 ++- ports/analog/common-hal/microcontroller/Pin.c | 51 ++++++++++++---- .../common-hal/microcontroller/Processor.c | 14 +++-- .../common-hal/microcontroller/__init__.c | 23 ++++---- ports/analog/{supervisor => }/max32_port.h | 12 +++- ports/analog/supervisor/port.c | 58 ++++++------------- 7 files changed, 129 insertions(+), 73 deletions(-) rename ports/analog/{supervisor => }/max32_port.h (85%) diff --git a/ports/analog/boards/APARD/board.c b/ports/analog/boards/APARD/board.c index cd69f369579a..a075ec67d501 100644 --- a/ports/analog/boards/APARD/board.c +++ b/ports/analog/boards/APARD/board.c @@ -5,6 +5,24 @@ // SPDX-License-Identifier: MIT #include "supervisor/board.h" +#include "supervisor/port.h" +#include "mpconfigboard.h" +#include "max32_port.h" + +// Board-level setup for MAX32690 +// clang-format off +const mxc_gpio_cfg_t pb_pin[] = { + { MXC_GPIO1, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}, +}; +const int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t)); + +const mxc_gpio_cfg_t led_pin[] = { + { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, + { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, + { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, +}; +const int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t)); +// clang-format on // DEFAULT: Using the weak-defined supervisor/shared/board.c functions @@ -15,7 +33,23 @@ // bool board_requests_safe_mode(void); // Initializes board related state once on start up. -// void board_init(void); +void board_init(void) { + // Enable GPIO (enables clocks + common init for ports) + for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++){ + MXC_GPIO_Init(0x1 << i); + } + + // Init Board LEDs + /* setup GPIO for the LED */ + for (int i = 0; i < num_leds; i++) { + // Set the output value + MXC_GPIO_OutClr(led_pin[i].port, led_pin[i].mask); + MXC_GPIO_Config(&led_pin[i]); + } + + // Turn on one LED to indicate Sign of Life + MXC_GPIO_OutSet(led_pin[2].port, led_pin[2].mask); +} // Reset the state of off MCU components such as neopixels. // void reset_board(void); @@ -24,4 +58,5 @@ // state. It should not prevent the user access method from working (such as // disabling USB, BLE or flash) because CircuitPython may continue to run. // void board_deinit(void); + /*******************************************************************/ diff --git a/ports/analog/boards/APARD/mpconfigboard.mk b/ports/analog/boards/APARD/mpconfigboard.mk index 7e5465e69422..874c3c14e394 100644 --- a/ports/analog/boards/APARD/mpconfigboard.mk +++ b/ports/analog/boards/APARD/mpconfigboard.mk @@ -5,13 +5,18 @@ # SPDX-License-Identifier: MIT INTERNAL_FLASH_FILESYSTEM = 1 -# FLASH: 0x10000000 to 0x10340000 +# FLASH: 0x10000000 to 0x10300000 (ARM) # SRAM: 0x20000000 to 0x20100000 USB_PRODUCT = "MAX32690 APARD" USB_MANUFACTURER = "Analog Devices, Inc." + +# NOTE: Not implementing external flash for now # CFLAGS+=-DEXT_FLASH_MX25 +# define 13 bytes UID for memory safety (buffer gets passed as a raw ptr) +COMMON_HAL_MCU_PROCESSOR_UID_LENGTH = 13 + MCU_SERIES=max32 MCU_VARIANT=max32690 diff --git a/ports/analog/common-hal/microcontroller/Pin.c b/ports/analog/common-hal/microcontroller/Pin.c index bc1ef9d70efc..6826b18e036f 100644 --- a/ports/analog/common-hal/microcontroller/Pin.c +++ b/ports/analog/common-hal/microcontroller/Pin.c @@ -2,33 +2,62 @@ #include #include "shared-bindings/microcontroller/Pin.h" -// #include "shared-bindings/digitalio/DigitalInOut.h" +#include "mpconfigboard.h" +#include "pins.h" +#include "mxc_sys.h" +#include "max32690.h" +#include "gpio.h" -// #include "gpio.h" - - -//FIXME: Implement void reset_all_pins(void) { - return; + // todo: this is not a good method for this long-term + // Pins should be individually reset to account for never_reset pins like SWD + for (int i = 0; i < NUM_GPIO_PORTS; i++) { + MXC_GPIO_Reset(i); + } } -// FIXME: Implement +// todo: Implement void reset_pin_number(uint8_t pin) { - return; } -// FIXME: Implement +// todo: Implement void claim_pin(const mcu_pin_obj_t *pin) { return; } -// FIXME: Implement +// todo: Implement bool pin_number_is_free(uint8_t pin_number) { return true; } -// FIXME: Implement + +// todo: Implement void never_reset_pin_number(uint8_t pin_number) { return; } + +//todo: implement +uint8_t common_hal_mcu_pin_number(const mcu_pin_obj_t *pin) { + return 0; +} + +// todo: implement +bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { + return true; +} + +void common_hal_never_reset_pin(const mcu_pin_obj_t *pin) { +} + +void common_hal_reset_pin(const mcu_pin_obj_t *pin) { +} + +void common_hal_mcu_pin_claim(const mcu_pin_obj_t *pin) { +} + +void common_hal_mcu_pin_claim_number(uint8_t pin_no) { +} + +void common_hal_mcu_pin_reset_number(uint8_t pin_no) { +} diff --git a/ports/analog/common-hal/microcontroller/Processor.c b/ports/analog/common-hal/microcontroller/Processor.c index 1bdcceeeb74c..339770f9fd24 100644 --- a/ports/analog/common-hal/microcontroller/Processor.c +++ b/ports/analog/common-hal/microcontroller/Processor.c @@ -10,14 +10,15 @@ #include "common-hal/microcontroller/Processor.h" #include "shared-bindings/microcontroller/ResetReason.h" -#include "system_max32690.h" +#include "max32_port.h" -// +// No means of getting core temperature for currently supported devices float common_hal_mcu_processor_get_temperature(void) { return NAN; } -// TODO: Determine if there's a means of getting core voltage +// MAX32690 can measure VCORE +// TODO: (low prior.) Implement ADC API under "peripherals" and use API to measure VCORE float common_hal_mcu_processor_get_voltage(void) { return NAN; } @@ -26,11 +27,16 @@ uint32_t common_hal_mcu_processor_get_frequency(void) { return SystemCoreClock; } +// NOTE: COMMON_HAL_MCU_PROCESSOR_UID_LENGTH is defined in mpconfigboard.h +// Use this per device to make sure raw_id is an appropriate minimum number of bytes void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { + MXC_SYS_GetUSN(raw_id, NULL); // NULL checksum will not be verified by AES return; } -// TODO: May need to add reset reason in alarm / deepsleep cases mcu_reset_reason_t common_hal_mcu_processor_get_reset_reason(void) { + #if CIRCUITPY_ALARM + // TODO: (low prior.) add reset reason in alarm / deepsleep cases (should require alarm peripheral API in "peripherals") + #endif return RESET_REASON_UNKNOWN; } diff --git a/ports/analog/common-hal/microcontroller/__init__.c b/ports/analog/common-hal/microcontroller/__init__.c index f15ef9bcecc3..aff2dc2fd497 100644 --- a/ports/analog/common-hal/microcontroller/__init__.c +++ b/ports/analog/common-hal/microcontroller/__init__.c @@ -22,24 +22,20 @@ #include "max32690.h" +#include "mxc_delay.h" + /** NOTE: It is not advised to directly include the below! * These are includes taken care of by the core cmsis file. * e.g. "max32690.h". Since CMSIS is compiled as lib, these are * included there as for example. */ -// #include "core_cmFunc.h" // For enable/disable interrupts -// #include "core_cm4.h" // For NVIC_SystemReset -// #include "core_cmInstr.h" // For __DMB Data Memory Barrier +// #include // For enable/disable interrupts +// #include // For NVIC_SystemReset +// #include // For __DMB Data Memory Barrier (flush DBUS activity) void common_hal_mcu_delay_us(uint32_t delay) { - // uint32_t ticks_per_us = HAL_RCC_GetSysClockFreq() / 1000000UL; - // delay *= ticks_per_us; - // SysTick->VAL = 0UL; - // SysTick->LOAD = delay; - // SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk; - // while ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0) { - // } - // SysTick->CTRL = 0UL; + + MXC_Delay(MXC_DELAY_USEC(delay)); } volatile uint32_t nesting_count = 0; @@ -59,7 +55,7 @@ void common_hal_mcu_enable_interrupts(void) { if (nesting_count > 0) { return; } - __DMB(); + __DMB(); // flush internal DBUS before proceeding __enable_irq(); } @@ -75,7 +71,6 @@ void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { } void common_hal_mcu_reset(void) { - if (next_reset_to_bootloader) { reset_to_bootloader(); } else { @@ -398,6 +393,8 @@ static const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { }; MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table); + +/** NOTE: Not implemented yet */ // #if CIRCUITPY_INTERNAL_NVM_SIZE > 0 // // The singleton nvm.ByteArray object. // const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { diff --git a/ports/analog/supervisor/max32_port.h b/ports/analog/max32_port.h similarity index 85% rename from ports/analog/supervisor/max32_port.h rename to ports/analog/max32_port.h index 25641a5dddbc..ec6d29ad80f8 100644 --- a/ports/analog/supervisor/max32_port.h +++ b/ports/analog/max32_port.h @@ -4,10 +4,18 @@ #include -#include "mxc_sys.h" +#include "mxc_assert.h" +#include "mxc_delay.h" +#include "mxc_device.h" #include "mxc_pins.h" +#include "mxc_sys.h" + #include "gpio.h" -#include "mxc_assert.h" + +#ifdef MQAX32690 +#include "system_max32690.h" +#include "max32690.h" +#endif /** Linker variables defined.... * _estack: end of the stack diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index fd6bc1806aeb..21f4b6504cca 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -47,26 +47,19 @@ #include "mxc_delay.h" #include "rtc.h" +// Externs defined by linker .ld file +extern uint32_t _stack, _heap, _estack, _eheap; +extern uint32_t _ebss; + +// From boards/$(BOARD)/board.c +extern const mxc_gpio_cfg_t pb_pin[]; +extern const int num_pbs; +extern const mxc_gpio_cfg_t led_pin[]; +extern const int num_leds; + //todo: define an LED HAL // #include "peripherals/led.h" -#ifdef MAX32690 -// Board-level setup for MAX32690 -// clang-format off -const mxc_gpio_cfg_t pb_pin[] = { - { MXC_GPIO1, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}, -}; -const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t)); - -const mxc_gpio_cfg_t led_pin[] = { - { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, - { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, - { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, -}; -const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t)); -// clang-format on -#endif - // For caching rtc data for ticks static uint32_t subsec, sec = 0; @@ -96,7 +89,7 @@ safe_mode_t port_init(void) { } // Turn on one LED to indicate Sign of Life - MXC_GPIO_OutSet(led_pin[0].port, led_pin[0].mask); + MXC_GPIO_OutSet(led_pin[2].port, led_pin[2].mask); // Init RTC w/ 0sec, 0subsec // Driven by 32.768 kHz ERTCO, with ssec= 1/4096 s @@ -120,23 +113,9 @@ void reset_cpu(void) { // Reset MCU state void reset_port(void) { - int err; - // Reset GPIO Ports - // Enable GPIO (enables clocks + common init for ports) - for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++){ - err = MXC_GPIO_Reset(0x1 << i); - if (err) { - // todo: indicate some gpio error - continue; - } - } - - // TODO: Reset peripheral clocks + reset_all_pins(); - // Reset 1/1024 tick timer - MXC_RTC_Stop(); - MXC_RTC_ClearFlags(0xFFFFFFFF); - MXC_RTC_Init(0,0); + // todo: may need rtc-related resets here later } // Reset to the bootloader @@ -154,22 +133,19 @@ void reset_to_bootloader(void) { * Return variables defined by linkerscript. */ uint32_t *port_stack_get_limit(void) { - // ignore array bounds GCC warnings for stack here + // ignore array bounds GCC warnings #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Warray-bounds" // NOTE: Only return how much stack we have alloted for CircuitPython - return (uint32_t *)(port_stack_get_top() - (CIRCUITPY_DEFAULT_STACK_SIZE + CIRCUITPY_EXCEPTION_STACK_SIZE) / sizeof(uint32_t)); - // return _estack; - - // end GCC diagnostic disable + return port_stack_get_top() - (CIRCUITPY_DEFAULT_STACK_SIZE + CIRCUITPY_EXCEPTION_STACK_SIZE) / sizeof(uint32_t); #pragma GCC diagnostic pop } uint32_t *port_stack_get_top(void) { - return (uint32_t *)__stack; + return &_stack; } uint32_t *port_heap_get_bottom(void) { - return (uint32_t *)__heap; + return &_heap; } uint32_t *port_heap_get_top(void) { return port_stack_get_limit(); From 79f496fd468d8b213ee1640f0480e12995a23134 Mon Sep 17 00:00:00 2001 From: "U-ANALOG\\BHurst" Date: Fri, 23 Aug 2024 14:39:44 -0700 Subject: [PATCH 05/39] -Added USB via tinyUSB. Still need to test/debug before REPL is ready. - Enabled USB-based modules & dependencies in mpconfigport.mk --- ports/analog/Makefile | 19 +++- ports/analog/README.md | 3 +- ports/analog/boards/APARD/board.c | 13 +++ ports/analog/boards/APARD/mpconfigboard.mk | 9 +- ports/analog/common-hal/microcontroller/Pin.c | 96 ++++++++++++++----- ports/analog/common-hal/microcontroller/Pin.h | 5 +- ports/analog/mpconfigport.mk | 24 ++--- ports/analog/supervisor/usb.c | 40 ++++++++ 8 files changed, 160 insertions(+), 49 deletions(-) create mode 100644 ports/analog/supervisor/usb.c diff --git a/ports/analog/Makefile b/ports/analog/Makefile index 151299a8792a..7a684711546d 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -166,17 +166,30 @@ else COPT += -O0 #opt completely off to start endif - # TinyUSB CFLAGS +ifeq ($(CIRCUITPY_TINYUSB),1) CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_$(MCU_VARIANT_UPPER) \ -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED \ + -DCFG_TUSB_OS=OPT_OS_NONE \ + -DCFG_TUD_TASK_QUEUE_SZ=32 -# TODO: Add for TinyUSB once our PR goes through for MAX32 devices -# Add TinyUSB +# Add TinyUSB sources INC += -I../../lib/tinyusb/src INC += -I../../supervisor/shared/usb SRC_C += lib/tinyusb/src/portable/mentor/musb/dcd_musb.c +endif + +ifeq ($(CIRCUITPY_USB_DEVICE),1) +CFLAGS += \ + -DCFG_TUD_CDC_RX_BUFSIZE=1024 \ + -DCFG_TUD_CDC_TX_BUFSIZE=1024 \ + -DCFG_TUD_MSC_BUFSIZE=4096 \ + -DCFG_TUD_MIDI_RX_BUFSIZE=128 \ + -DCFG_TUD_MIDI_TX_BUFSIZE=128 \ + -DCFG_TUD_VENDOR_RX_BUFSIZE=128 \ + -DCFG_TUD_VENDOR_TX_BUFSIZE=128 +endif SRC_C += \ boards/$(BOARD)/board.c \ diff --git a/ports/analog/README.md b/ports/analog/README.md index 603a22f9fd4b..1650fad1cac5 100644 --- a/ports/analog/README.md +++ b/ports/analog/README.md @@ -9,7 +9,8 @@ This port brings CircuitPython to ADI's "MAX32" series of microcontrollers. Thes - **`linking/:`** Linkerfiles customized for CircuitPython. These are distinct from the linkerfiles used in MSDK as they adopt the structure required by CircuitPython. They may also omit unused features and memory sections, e.g. Mailboxes, RISC-V Flash, & Hyperbus RAM for MAX32690. - **`msdk:/`** SDK for MAX32 devices. More info on our GitHub: [Analog Devices MSDK GitHub](https://github.com/analogdevicesinc/msdk) - **`peripherals:/`** Helper files for peripherals such as clocks, gpio, etc. These files tend to be specific to vendor SDKs and provide some useful functions for the common-hal interfaces. -- **`supervisor/:`** Implementation files for the CircuitPython supervisor. This includes port setup, usb, and a filesystem on a storage medium such as SD Card/eMMC, QSPI Flash, or internal flash memory. Currently the internal flash is used. +- **`supervisor/:`** Implementation files for the CircuitPython supervisor. This includes port setup, usb, and a filesystem on a storage medium such as SD Card/eMMC, QSPI Flash, or internal flash memory. Currently the internal flash is used. This folder is the most important part of a port's core functionality for CircuitPython. +- **`supervisor/port.c:`** Port-specific startup code including clock initialization, console startup, etc. - `. :` Build system and high-level interface to the CircuitPython core for the ADI port. diff --git a/ports/analog/boards/APARD/board.c b/ports/analog/boards/APARD/board.c index a075ec67d501..972bdcee6f8c 100644 --- a/ports/analog/boards/APARD/board.c +++ b/ports/analog/boards/APARD/board.c @@ -32,8 +32,21 @@ const int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t)); // way. // bool board_requests_safe_mode(void); +volatile uint32_t system_ticks = 0; + +void SysTick_Handler(void) { + system_ticks++; +} + +uint32_t board_millis(void) { + return system_ticks; +} + // Initializes board related state once on start up. void board_init(void) { + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000);\ + // Enable GPIO (enables clocks + common init for ports) for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++){ MXC_GPIO_Init(0x1 << i); diff --git a/ports/analog/boards/APARD/mpconfigboard.mk b/ports/analog/boards/APARD/mpconfigboard.mk index 874c3c14e394..16c8ac72581d 100644 --- a/ports/analog/boards/APARD/mpconfigboard.mk +++ b/ports/analog/boards/APARD/mpconfigboard.mk @@ -8,8 +8,13 @@ INTERNAL_FLASH_FILESYSTEM = 1 # FLASH: 0x10000000 to 0x10300000 (ARM) # SRAM: 0x20000000 to 0x20100000 -USB_PRODUCT = "MAX32690 APARD" -USB_MANUFACTURER = "Analog Devices, Inc." +USB_MANUFACTURER="Analog Devices, Inc." +USB_PRODUCT="MAX32690 APARD" + +# Use 0x0456 for Analog Devices, Inc.; 0B6A for Maxim +USB_VID=0x0456 +# USB_VID=0x0B6A +USB_PID=0x003C # NOTE: Not implementing external flash for now # CFLAGS+=-DEXT_FLASH_MX25 diff --git a/ports/analog/common-hal/microcontroller/Pin.c b/ports/analog/common-hal/microcontroller/Pin.c index 6826b18e036f..e11c9413c907 100644 --- a/ports/analog/common-hal/microcontroller/Pin.c +++ b/ports/analog/common-hal/microcontroller/Pin.c @@ -8,56 +8,104 @@ #include "mxc_sys.h" #include "max32690.h" #include "gpio.h" +#include "gpio_regs.h" + +// Structs to represent GPIO ports & valid pins/pads +#ifdef MAX32690 +// todo: special constraints are applied to GPIO4 for MAX32690. Tend to these later (low prior) +static mxc_gpio_regs_t* ports[NUM_GPIO_PORTS] = { MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3}; +#endif + +static uint32_t claimed_pins[NUM_GPIO_PORTS]; +static uint32_t never_reset_pins[NUM_GPIO_PORTS]; + +#define INVALID_PIN 0xFF // id for invalid pin void reset_all_pins(void) { - // todo: this is not a good method for this long-term - // Pins should be individually reset to account for never_reset pins like SWD + // reset all pins except for never_reset_pins for (int i = 0; i < NUM_GPIO_PORTS; i++) { - MXC_GPIO_Reset(i); + for (int j = 0; j < 32; j++) { + if (!(never_reset_pins[i] & (1 << j))) { + reset_pin_number(i, j); + } + } + // set claimed pins to never_reset pins + claimed_pins[i] = never_reset_pins[i]; } } -// todo: Implement -void reset_pin_number(uint8_t pin) { -} +void reset_pin_number(uint8_t pin_port, uint8_t pin_pad) { + if (pin_port == INVALID_PIN || pin_port > NUM_GPIO_PORTS) { + return; + } -// todo: Implement -void claim_pin(const mcu_pin_obj_t *pin) { - return; -} + uint32_t mask = 1 << (pin_pad); -// todo: Implement -bool pin_number_is_free(uint8_t pin_number) { - return true; -} + /** START: RESET LOGIC for GPIOs */ + // Switch to I/O mode first + ports[pin_port]->en0_set = mask; + + // set GPIO configuration enable bits to I/O + ports[pin_port]->en0_clr = mask; + ports[pin_port]->en1_clr = mask; + ports[pin_port]->en2_clr = mask; + + // enable input mode GPIOn_INEN.pin = 1 + ports[pin_port]->inen |= mask; + + // High Impedance mode enable (GPIOn_PADCTRL1 = 0, _PADCTRL0 = 0), pu/pd disable + ports[pin_port]->padctrl0 &= ~mask; + ports[pin_port]->padctrl1 &= ~mask; + // Output mode disable GPIOn_OUTEN = 0 + ports[pin_port]->outen |= mask; -// todo: Implement -void never_reset_pin_number(uint8_t pin_number) { - return; + // Interrupt disable GPIOn_INTEN = 0 + ports[pin_port]->inten &= ~mask; + /** END: RESET LOGIC for GPIOs */ } -//todo: implement uint8_t common_hal_mcu_pin_number(const mcu_pin_obj_t *pin) { - return 0; + if (pin == NULL) { + return INVALID_PIN; + } + + // most max32 gpio ports have 32 pins + // todo: create a struct to encode # of pins for each port, since some GPIO ports differ + return pin->port * 32 + pin->pad; } -// todo: implement bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { - return true; + if (pin == NULL) { + return true; + } + return !(claimed_pins[pin->port] & (pin->pad)); } void common_hal_never_reset_pin(const mcu_pin_obj_t *pin) { + if ((pin != NULL) && (pin->pad != INVALID_PIN)) { + never_reset_pins[pin->port] |= (1 << pin->pad); + + // any never reset pin must also be claimed + claimed_pins[pin->port] |= (1 << pin->pad); + } } void common_hal_reset_pin(const mcu_pin_obj_t *pin) { -} + if (pin == NULL) { + return; + } -void common_hal_mcu_pin_claim(const mcu_pin_obj_t *pin) { + reset_pin_number(pin->port, pin->pad); } -void common_hal_mcu_pin_claim_number(uint8_t pin_no) { +void common_hal_mcu_pin_claim(const mcu_pin_obj_t *pin) { + if (pin == NULL) { + return; + } + claimed_pins[pin->port] |= (1 << pin->pad); } void common_hal_mcu_pin_reset_number(uint8_t pin_no) { + reset_pin_number(pin_no / 32, pin_no & 32); } diff --git a/ports/analog/common-hal/microcontroller/Pin.h b/ports/analog/common-hal/microcontroller/Pin.h index 6089a94e0c11..55d4081f3a6b 100644 --- a/ports/analog/common-hal/microcontroller/Pin.h +++ b/ports/analog/common-hal/microcontroller/Pin.h @@ -8,7 +8,4 @@ void reset_all_pins(void); // reset_pin_number takes the pin number instead of the pointer so that objects don't // need to store a full pointer. -void reset_pin_number(uint8_t pin); -void claim_pin(const mcu_pin_obj_t *pin); -bool pin_number_is_free(uint8_t pin_number); -void never_reset_pin_number(uint8_t pin_number); +void reset_pin_number(uint8_t pin_port, uint8_t pin_pad); diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk index b67622935183..689ae445b7fe 100644 --- a/ports/analog/mpconfigport.mk +++ b/ports/analog/mpconfigport.mk @@ -15,22 +15,27 @@ INTERNAL_FLASH_FILESYSTEM = 1 SPI_FLASH_FILESYSTEM = 0 QSPI_FLASH_FILESYSTEM = 0 -# TODO: TEST filesystem & general bringup! +# TODO: Test/Debug fs & general bringup DISABLE_FILESYSTEM = 0 +# TODO: Test/Debug TinyUSB! +# Builds clean; need to test +CIRCUITPY_TINYUSB = 1 +CIRCUITPY_USB_DEVICE ?= 1 +CIRCUITPY_USB_CDC ?= 1 +CIRCUITPY_USB_HID ?= 0 +CIRCUITPY_USB_MIDI ?= 0 + #################################################################################### # Suggested config for first-time porting #################################################################################### # These modules are implemented in ports//common-hal: -# Typically the first module to create -CIRCUITPY_MICROCONTROLLER ?= 1 # Typically the second module to create CIRCUITPY_DIGITALIO ?= 0 # Plan to implement CIRCUITPY_BUSIO ?= 0 -CIRCUITPY_OS ?= 1 CIRCUITPY_RTC ?= 0 # Other modules (may or may not implement): @@ -58,17 +63,10 @@ CIRCUITPY_BITBANGIO ?= 0 CIRCUITPY_PIXELBUF ?= 0 # Requires OS CIRCUITPY_RANDOM ?= 0 -# Requires OS, filesystem -CIRCUITPY_STORAGE ?= 0 # Requires Microcontroller CIRCUITPY_TOUCHIO ?= 0 # Requires UART CIRCUITPY_CONSOLE_UART ?= 0 -# Requires USB -CIRCUITPY_USB_DEVICE ?= 0 -CIRCUITPY_USB_CDC ?= 0 -CIRCUITPY_USB_HID ?= 0 -CIRCUITPY_USB_MIDI ?= 0 # Does nothing without I2C CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 @@ -83,7 +81,3 @@ CIRCUITPY_ULAB = 1 CIRCUITPY_BLEIO_HCI = 0 CIRCUITPY_KEYPAD = 0 CIRCUITPY_BUSDEVICE = 0 - -# TinyUSB will be added later. -CIRCUITPY_TINYUSB = 0 -CIRCUITPY_PYUSB = 0 diff --git a/ports/analog/supervisor/usb.c b/ports/analog/supervisor/usb.c new file mode 100644 index 000000000000..2fd1545bdb1b --- /dev/null +++ b/ports/analog/supervisor/usb.c @@ -0,0 +1,40 @@ + +#include "supervisor/usb.h" +#include "common-hal/microcontroller/Pin.h" + +#include "py/mpconfig.h" + +#include "lib/tinyusb/src/device/usbd.h" + +// max32 includes +#include "mxc_sys.h" +#include "gcr_regs.h" +#include "mcr_regs.h" + +void init_usb_hardware(void) { + // USB GPIOs are non-configurable on MAX32 devices + // No need to add them to the never_reset list for mcu/Pin API. + + // 1 ms SysTick initialized in board.c + // todo: consider moving SysTick initialization here? + + // Enable requisite clocks & power for USB + MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IPO); + MXC_MCR->ldoctrl |= MXC_F_MCR_LDOCTRL_0P9EN; + MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB); + MXC_SYS_Reset_Periph(MXC_SYS_RESET0_USB); + + // Supervisor calls TinyUSB's dcd_init, + // which initializes the USB PHY. + // Dep. on CIRCUITPY_TINYUSB and CIRCUITPY_USB_DEVICE + + // Interrupt enables are left to TUSB depending on the device class + // todo: confirm with testing! +} + +void USB_IRQHandler(void) +{ + // Schedules USB background callback + // appropriate to a given device class via TinyUSB lib + usb_irq_handler(0); +} From 04720eccc097ed46fd92bfe3a8105efa43c7e0e8 Mon Sep 17 00:00:00 2001 From: "U-ANALOG\\BHurst" Date: Mon, 26 Aug 2024 15:09:37 -0700 Subject: [PATCH 06/39] Fixed USB endpoint speed issue w/ configuration setting --- ports/analog/Makefile | 40 +++++++++++++--------- ports/analog/boards/APARD/mpconfigboard.mk | 12 ++++--- ports/analog/mpconfigport.mk | 1 - 3 files changed, 30 insertions(+), 23 deletions(-) diff --git a/ports/analog/Makefile b/ports/analog/Makefile index 7a684711546d..20ea99f5de62 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -82,7 +82,7 @@ INC += \ -I$(PERIPH_SRC)/ICC \ -I$(PERIPH_SRC)/TMR \ -I$(PERIPH_SRC)/RTC \ - -I$(PERIPH_SRC)/UART \ + -I$(PERIPH_SRC)/UART INC += -I$(CMSIS_ROOT)/Device/Maxim/$(MCU_VARIANT_UPPER)/Source/GCC @@ -116,12 +116,12 @@ SRC_MAX32 += \ $(PERIPH_SRC)/TMR/tmr_$(DIE_TYPE).c \ $(PERIPH_SRC)/UART/uart_common.c \ $(PERIPH_SRC)/UART/uart_$(DIE_TYPE).c \ - $(PERIPH_SRC)/UART/uart_revb.c \ + $(PERIPH_SRC)/UART/uart_revb.c SRC_C += $(SRC_MAX32) \ boards/$(BOARD)/board.c \ boards/$(BOARD)/pins.c \ - peripherals/$(MCU_VARIANT_LOWER)/pins.c \ + peripherals/$(MCU_VARIANT_LOWER)/pins.c # ******************************************************************************* ### Compiler & Linker Flags ### @@ -145,11 +145,11 @@ CFLAGS += -D$(MCU_VARIANT_UPPER) \ -DTARGET_REV=0x4131 \ -DTARGET=$(MCU_VARIANT_UPPER) \ -DIAR_PRAGMAS=0 \ - -DRISCV_LOAD=0 \ - # -DFLASH_ORIGIN=0x10000000 \ - # -DFLASH_SIZE=0x340000 \ - # -DSRAM_ORIGIN=0x20000000 \ - # -DSRAM_SIZE=0x100000 \ + -DRISCV_LOAD=0 +# -DFLASH_ORIGIN=0x10000000 \ +# -DFLASH_SIZE=0x340000 \ +# -DSRAM_ORIGIN=0x20000000 \ +# -DSRAM_SIZE=0x100000 CPU_CORE=cortex-m4 CFLAGS += -mthumb -mcpu=$(CPU_CORE) -mfloat-abi=softfp -mfpu=fpv4-sp-d16 @@ -171,8 +171,9 @@ ifeq ($(CIRCUITPY_TINYUSB),1) CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_$(MCU_VARIANT_UPPER) \ -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED \ - -DCFG_TUSB_OS=OPT_OS_NONE \ - -DCFG_TUD_TASK_QUEUE_SZ=32 + -DCFG_TUSB_OS=OPT_OS_NONE + +# -DCFG_TUD_TASK_QUEUE_SZ=32 # Add TinyUSB sources INC += -I../../lib/tinyusb/src @@ -182,15 +183,20 @@ endif ifeq ($(CIRCUITPY_USB_DEVICE),1) CFLAGS += \ - -DCFG_TUD_CDC_RX_BUFSIZE=1024 \ -DCFG_TUD_CDC_TX_BUFSIZE=1024 \ - -DCFG_TUD_MSC_BUFSIZE=4096 \ - -DCFG_TUD_MIDI_RX_BUFSIZE=128 \ - -DCFG_TUD_MIDI_TX_BUFSIZE=128 \ - -DCFG_TUD_VENDOR_RX_BUFSIZE=128 \ - -DCFG_TUD_VENDOR_TX_BUFSIZE=128 + -DCFG_TUD_CDC_RX_BUFSIZE=1024 \ + -DCFG_TUD_MSC_BUFSIZE=4096 endif +ifdef CIRCUITPY_USB_VENDOR +CFLASGS += \ + -DCFG_TUD_VENDOR_RX_BUFSIZE=1024 \ + -DCFG_TUD_VENDOR_TX_BUFSIZE=1024 +endif + +# -DCFG_TUD_MIDI_RX_BUFSIZE=128 +# -DCFG_TUD_MIDI_TX_BUFSIZE=128 + SRC_C += \ boards/$(BOARD)/board.c \ background.c \ @@ -208,7 +214,7 @@ CFLAGS += -Wno-error=unused-parameter \ -Wno-error=lto-type-mismatch \ -Wno-error=cast-align \ -Wno-error=nested-externs \ - -Wno-error=sign-compare \ + -Wno-error=sign-compare ENTRY = Reset_Handler LDFLAGS += $(CFLAGS) --entry $(ENTRY) -Wl,-nostdlib -Wl,-T,$(LINKERFILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections diff --git a/ports/analog/boards/APARD/mpconfigboard.mk b/ports/analog/boards/APARD/mpconfigboard.mk index 16c8ac72581d..749c30465679 100644 --- a/ports/analog/boards/APARD/mpconfigboard.mk +++ b/ports/analog/boards/APARD/mpconfigboard.mk @@ -4,23 +4,25 @@ # # SPDX-License-Identifier: MIT -INTERNAL_FLASH_FILESYSTEM = 1 +INTERNAL_FLASH_FILESYSTEM=1 # FLASH: 0x10000000 to 0x10300000 (ARM) # SRAM: 0x20000000 to 0x20100000 -USB_MANUFACTURER="Analog Devices, Inc." -USB_PRODUCT="MAX32690 APARD" - # Use 0x0456 for Analog Devices, Inc.; 0B6A for Maxim USB_VID=0x0456 # USB_VID=0x0B6A USB_PID=0x003C +USB_MANUFACTURER="Analog Devices, Inc." +USB_PRODUCT="MAX32690 APARD" +# Num endpt pairs for a given device +USB_NUM_ENDPOINT_PAIRS=12 +USB_HIGHSPEED=1 # NOTE: Not implementing external flash for now # CFLAGS+=-DEXT_FLASH_MX25 # define 13 bytes UID for memory safety (buffer gets passed as a raw ptr) -COMMON_HAL_MCU_PROCESSOR_UID_LENGTH = 13 +COMMON_HAL_MCU_PROCESSOR_UID_LENGTH=13 MCU_SERIES=max32 MCU_VARIANT=max32690 diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk index 689ae445b7fe..0fb490cc150b 100644 --- a/ports/analog/mpconfigport.mk +++ b/ports/analog/mpconfigport.mk @@ -7,7 +7,6 @@ CHIP_FAMILY ?= max32 # Necessary to build CircuitPython -USB_NUM_ENDPOINT_PAIRS ?= 0 LONGINT_IMPL ?= MPZ INTERNAL_LIBM ?= 1 From 53746254787bff34d32199dc9fa019c3128a088f Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Mon, 2 Sep 2024 13:22:06 -0700 Subject: [PATCH 07/39] Fixed some RTC alarm setup issues; tick interrupts now function as expected. --- ports/analog/boards/APARD/mpconfigboard.mk | 17 ++- ports/analog/max32_port.h | 5 +- ports/analog/mpconfigport.mk | 4 +- ports/analog/supervisor/port.c | 132 +++++++++++---------- ports/analog/tools/connect-gdb.txt | 16 --- ports/analog/tools/flash-halt-openocd.bat | 5 - 6 files changed, 83 insertions(+), 96 deletions(-) delete mode 100644 ports/analog/tools/connect-gdb.txt delete mode 100644 ports/analog/tools/flash-halt-openocd.bat diff --git a/ports/analog/boards/APARD/mpconfigboard.mk b/ports/analog/boards/APARD/mpconfigboard.mk index 749c30465679..e49d695761c3 100644 --- a/ports/analog/boards/APARD/mpconfigboard.mk +++ b/ports/analog/boards/APARD/mpconfigboard.mk @@ -4,27 +4,26 @@ # # SPDX-License-Identifier: MIT +MCU_SERIES=max32 +MCU_VARIANT=max32690 + INTERNAL_FLASH_FILESYSTEM=1 # FLASH: 0x10000000 to 0x10300000 (ARM) # SRAM: 0x20000000 to 0x20100000 +#### USB CONFIGURATION # Use 0x0456 for Analog Devices, Inc.; 0B6A for Maxim USB_VID=0x0456 # USB_VID=0x0B6A USB_PID=0x003C USB_MANUFACTURER="Analog Devices, Inc." USB_PRODUCT="MAX32690 APARD" -# Num endpt pairs for a given device USB_NUM_ENDPOINT_PAIRS=12 USB_HIGHSPEED=1 +### + +# define UID len for memory safety (buffer gets passed as a raw ptr) +COMMON_HAL_MCU_PROCESSOR_UID_LENGTH=30 # NOTE: Not implementing external flash for now # CFLAGS+=-DEXT_FLASH_MX25 - -# define 13 bytes UID for memory safety (buffer gets passed as a raw ptr) -COMMON_HAL_MCU_PROCESSOR_UID_LENGTH=13 - -MCU_SERIES=max32 -MCU_VARIANT=max32690 - -CFLAGS += -DHAS_TRNG=1 diff --git a/ports/analog/max32_port.h b/ports/analog/max32_port.h index ec6d29ad80f8..214e975b719b 100644 --- a/ports/analog/max32_port.h +++ b/ports/analog/max32_port.h @@ -12,7 +12,7 @@ #include "gpio.h" -#ifdef MQAX32690 +#ifdef MAX32690 #include "system_max32690.h" #include "max32690.h" #endif @@ -33,7 +33,8 @@ extern uint32_t SystemCoreClock; #define TICKS_PER_SEC 1024 #ifdef MAX32690 -#define SUBSEC_PER_TICK 8 // 12-bit ssec register, ticks @ 4096 Hz +// 12-bit ssec register, ticks @ 4096 Hz +#define SUBSEC_PER_TICK 4 #endif #endif //MAX32_PORT_H diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk index 0fb490cc150b..f9b50477bc23 100644 --- a/ports/analog/mpconfigport.mk +++ b/ports/analog/mpconfigport.mk @@ -10,6 +10,9 @@ CHIP_FAMILY ?= max32 LONGINT_IMPL ?= MPZ INTERNAL_LIBM ?= 1 +# Req'd for OS; all max32 have TRNG +CFLAGS += -DHAS_TRNG=1 + INTERNAL_FLASH_FILESYSTEM = 1 SPI_FLASH_FILESYSTEM = 0 QSPI_FLASH_FILESYSTEM = 0 @@ -18,7 +21,6 @@ QSPI_FLASH_FILESYSTEM = 0 DISABLE_FILESYSTEM = 0 # TODO: Test/Debug TinyUSB! -# Builds clean; need to test CIRCUITPY_TINYUSB = 1 CIRCUITPY_USB_DEVICE ?= 1 CIRCUITPY_USB_CDC ?= 1 diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index 21f4b6504cca..31a46b8de8b8 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -47,6 +47,11 @@ #include "mxc_delay.h" #include "rtc.h" +// msec to RTC subsec ticks (4 kHz) +#define MSEC_TO_SS_ALARM(x) \ + (0 - ((x * 4096) / \ + 1000)) /* Converts a time in milleseconds to the equivalent RSSA register value. */ + // Externs defined by linker .ld file extern uint32_t _stack, _heap, _estack, _eheap; extern uint32_t _ebss; @@ -60,8 +65,9 @@ extern const int num_leds; //todo: define an LED HAL // #include "peripherals/led.h" -// For caching rtc data for ticks +// For saving rtc data for ticks static uint32_t subsec, sec = 0; +static uint32_t tick_flag = 0; // defined by cmsis core files extern void NVIC_SystemReset(void) NORETURN; @@ -91,20 +97,43 @@ safe_mode_t port_init(void) { // Turn on one LED to indicate Sign of Life MXC_GPIO_OutSet(led_pin[2].port, led_pin[2].mask); + // Enable clock to RTC peripheral + MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; + while(!(MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_ERTCO_RDY)); + + NVIC_EnableIRQ(RTC_IRQn); + NVIC_EnableIRQ(USB_IRQn); + // Init RTC w/ 0sec, 0subsec // Driven by 32.768 kHz ERTCO, with ssec= 1/4096 s - err = MXC_RTC_Init(0, 0); - if (err) { - return SAFE_MODE_SDK_FATAL_ERROR; - } - NVIC_EnableIRQ(RTC_IRQn); + while( MXC_RTC_Init(0,0) != E_SUCCESS ) {}; - // todo: init periph clocks / console here when ready + // enable 1 sec RTC SSEC alarm + MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE); + MXC_RTC_SetSubsecondAlarm(MSEC_TO_SS_ALARM(1000)); + MXC_RTC_EnableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE); + + // Enable RTC + while ( MXC_RTC_Start() != E_SUCCESS ) {}; - MXC_RTC_Start(); return SAFE_MODE_NONE; } +void RTC_IRQHandler(void) { + // Read flags to clear + int flags = MXC_RTC_GetFlags(); + + if (flags & MXC_F_RTC_CTRL_SSEC_ALARM) { + MXC_RTC_ClearFlags(MXC_F_RTC_CTRL_SSEC_ALARM); + } + + if (flags & MXC_F_RTC_CTRL_TOD_ALARM) { + MXC_RTC_ClearFlags(MXC_F_RTC_CTRL_TOD_ALARM); + } + + tick_flag = 1; +} + // Reset the MCU completely void reset_cpu(void) { // includes MCU reset request + awaits on memory bus @@ -114,18 +143,15 @@ void reset_cpu(void) { // Reset MCU state void reset_port(void) { reset_all_pins(); - - // todo: may need rtc-related resets here later } // Reset to the bootloader // note: not implemented since max32 requires external stim ignals to // activate bootloaders -// todo: check if there's a method to jump to it void reset_to_bootloader(void) { NVIC_SystemReset(); while (true) { - asm ("nop;"); + __NOP(); } } @@ -169,7 +195,14 @@ uint64_t port_get_raw_ticks(uint8_t *subticks) { // Ensure we can read from ssec register as soon as we can // MXC function does cross-tick / busy checking of RTC controller __disable_irq(); - MXC_RTC_GetTime(&sec, &subsec); + if (MXC_RTC->ctrl & MXC_F_RTC_CTRL_EN) { + // NOTE: RTC_GetTime always returns BUSY if RTC is not running + while( (MXC_RTC_GetTime(&sec, &subsec)) != E_NO_ERROR ); + } + else { + sec = MXC_RTC->sec; + subsec = MXC_RTC->ssec; + } __enable_irq(); // Return ticks given total subseconds @@ -197,71 +230,44 @@ void port_disable_tick(void) { // Wake the CPU after a given # of ticks or sooner void port_interrupt_after_ticks(uint32_t ticks) { + uint32_t ticks_msec = 0; // Stop RTC & store current time & ticks port_disable_tick(); port_get_raw_ticks(NULL); - uint32_t target_sec = (ticks / TICKS_PER_SEC); - uint32_t target_ssec = (ticks - (target_sec * TICKS_PER_SEC)) * SUBSEC_PER_TICK; - - // Set up alarm configuration - // if alarm is greater than 1 s, - // use the ToD alarm --> resol. to closest second - // else - // use Ssec alarm --> resn. to 1/1024 s. (down to a full tick) - if (target_sec > 0) { - if (MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE | - MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) { - // todo: signal some RTC error! - } + ticks_msec = 1000 * ticks / TICKS_PER_SEC; - if (MXC_RTC_SetTimeofdayAlarm(target_sec) != E_NO_ERROR) { - // todo: signal some RTC error! - } - if (MXC_RTC_EnableInt(MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) { - // todo: signal some RTC error! - } - } - else { - if (MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE | - MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) { - // todo: signal some RTC error! - } + while (MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE | + MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) {}; - if (MXC_RTC_SetSubsecondAlarm(target_ssec) != E_NO_ERROR) { - // todo: signal some RTC error! - } - - if (MXC_RTC_EnableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE) == E_BUSY) { - // todo: signal some RTC error! - } - } - port_enable_tick(); -} + // Clear the flag to be set by the RTC Handler + tick_flag = 0; -void RTC_IRQHandler(void) { - // Read flags to clear - int flags = MXC_RTC_GetFlags(); + // Subsec alarm is the starting/reload value of the SSEC counter. + // ISR triggered when SSEC rolls over from 0xFFFF_FFFF to 0x0 + while ( MXC_RTC_SetSubsecondAlarm(MSEC_TO_SS_ALARM(ticks_msec) ) == E_BUSY) {} + while (MXC_RTC_EnableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE) == E_BUSY) {} - if (flags & MXC_F_RTC_CTRL_TOD_ALARM) { - MXC_RTC_ClearFlags(MXC_F_RTC_CTRL_TOD_ALARM); - while (MXC_RTC_DisableInt(MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) {} - } + NVIC_EnableIRQ(RTC_IRQn); - if (flags & MXC_F_RTC_CTRL_SSEC_ALARM) { - MXC_RTC_ClearFlags(MXC_F_RTC_CTRL_SSEC_ALARM); - while (MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE) == E_BUSY) {} - } + port_enable_tick(); } void port_idle_until_interrupt(void) { - // Check if alarm triggers before we even got here - if (MXC_RTC_GetFlags() == (MXC_F_RTC_CTRL_TOD_ALARM | MXC_F_RTC_CTRL_SSEC_ALARM)) { - return; - } + #if CIRCUITPY_RTC + // Check if alarm triggers before we even got here + if (MXC_RTC_GetFlags() == (MXC_F_RTC_CTRL_TOD_ALARM | MXC_F_RTC_CTRL_SSEC_ALARM)) { + return; + } + #endif + // Interrupts should be disabled to ensure the ISR queue is flushed + // WFI still returns as long as the interrupt flag toggles; + // only when we re-enable interrupts will the ISR function trigger common_hal_mcu_disable_interrupts(); if (!background_callback_pending()) { + __DSB(); + /** DEBUG: may comment out WFI for debugging port functions */ __WFI(); } common_hal_mcu_enable_interrupts(); diff --git a/ports/analog/tools/connect-gdb.txt b/ports/analog/tools/connect-gdb.txt deleted file mode 100644 index ced4bdf6af3a..000000000000 --- a/ports/analog/tools/connect-gdb.txt +++ /dev/null @@ -1,16 +0,0 @@ -For connecting GDB... - -// Set symbol & exec to .elf -arm-none-eabi-gdb --se=build-APARD/firmware.elf - -// connect to remote on local machine TCP port :3333 -target extended-remote localhost:3333 - -// reset halt the MCU -monitor reset halt - -// set a breakpoint on main & hit it -b main -continue - -// now...time to mess around! diff --git a/ports/analog/tools/flash-halt-openocd.bat b/ports/analog/tools/flash-halt-openocd.bat deleted file mode 100644 index ae30cdff0b97..000000000000 --- a/ports/analog/tools/flash-halt-openocd.bat +++ /dev/null @@ -1,5 +0,0 @@ -:: Flash the target MCU via OpenOCD, -:: then reset halt to prepare for gdb connection -:: waits for gdb connection on localhost port 3333; see connect-gdb.txt for more info -:: leave this process open if you're connecting gdb -openocd -s $MAXIM_PATH/Tools/OpenOCD/scripts -f interface/cmsis-dap.cfg -f target/max32690.cfg -c "program build-APARD/firmware.elf verify; init; reset halt" From 1c1d1994ba198453de9e439db5f8c1839873cfe8 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Tue, 3 Sep 2024 09:33:41 -0700 Subject: [PATCH 08/39] Reorganized some build files & commented out WFI to debug USB. USB enumerates but has some issues starting interfaces for CDC/MSC/HID. --- ports/analog/Makefile | 30 +++++++++--------------------- ports/analog/mpconfigport.mk | 13 +++++++------ ports/analog/supervisor/port.c | 4 ++-- 3 files changed, 18 insertions(+), 29 deletions(-) diff --git a/ports/analog/Makefile b/ports/analog/Makefile index 20ea99f5de62..7c3e1cb80117 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -167,36 +167,24 @@ COPT += -O0 #opt completely off to start endif # TinyUSB CFLAGS -ifeq ($(CIRCUITPY_TINYUSB),1) CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_$(MCU_VARIANT_UPPER) \ -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED \ - -DCFG_TUSB_OS=OPT_OS_NONE - -# -DCFG_TUD_TASK_QUEUE_SZ=32 - -# Add TinyUSB sources -INC += -I../../lib/tinyusb/src -INC += -I../../supervisor/shared/usb -SRC_C += lib/tinyusb/src/portable/mentor/musb/dcd_musb.c -endif - -ifeq ($(CIRCUITPY_USB_DEVICE),1) -CFLAGS += \ + -DCFG_TUSB_OS=OPT_OS_NONE \ -DCFG_TUD_CDC_TX_BUFSIZE=1024 \ -DCFG_TUD_CDC_RX_BUFSIZE=1024 \ - -DCFG_TUD_MSC_BUFSIZE=4096 -endif - -ifdef CIRCUITPY_USB_VENDOR -CFLASGS += \ + -DCFG_TUD_MSC_BUFSIZE=4096 \ + -DCFG_TUD_MIDI_RX_BUFSIZE=128 \ + -DCFG_TUD_MIDI_TX_BUFSIZE=128 \ -DCFG_TUD_VENDOR_RX_BUFSIZE=1024 \ -DCFG_TUD_VENDOR_TX_BUFSIZE=1024 -endif -# -DCFG_TUD_MIDI_RX_BUFSIZE=128 -# -DCFG_TUD_MIDI_TX_BUFSIZE=128 +# Add TinyUSB sources +INC += -I../../lib/tinyusb/src +INC += -I../../supervisor/shared/usb +SRC_C += lib/tinyusb/src/portable/mentor/musb/dcd_musb.c +# Add port sources incl. any board functions SRC_C += \ boards/$(BOARD)/board.c \ background.c \ diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk index f9b50477bc23..32881729c7a9 100644 --- a/ports/analog/mpconfigport.mk +++ b/ports/analog/mpconfigport.mk @@ -17,15 +17,16 @@ INTERNAL_FLASH_FILESYSTEM = 1 SPI_FLASH_FILESYSTEM = 0 QSPI_FLASH_FILESYSTEM = 0 -# TODO: Test/Debug fs & general bringup +# TODO: Test/Debug fs once USB-MSC is ready DISABLE_FILESYSTEM = 0 # TODO: Test/Debug TinyUSB! -CIRCUITPY_TINYUSB = 1 -CIRCUITPY_USB_DEVICE ?= 1 -CIRCUITPY_USB_CDC ?= 1 -CIRCUITPY_USB_HID ?= 0 -CIRCUITPY_USB_MIDI ?= 0 +# CIRCUITPY_TINYUSB = 1 +# CIRCUITPY_USB_DEVICE ?= 1 +# CIRCUITPY_USB_CDC ?= 1 +# CIRCUITPY_USB_VENDOR ?=1 +# CIRCUITPY_USB_HID ?= 0 +# CIRCUITPY_USB_MIDI ?= 0 #################################################################################### # Suggested config for first-time porting diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index 31a46b8de8b8..730d85124259 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -163,7 +163,7 @@ uint32_t *port_stack_get_limit(void) { #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Warray-bounds" - // NOTE: Only return how much stack we have alloted for CircuitPython + // NOTE: Only return how much stack we have allotted for CircuitPython return port_stack_get_top() - (CIRCUITPY_DEFAULT_STACK_SIZE + CIRCUITPY_EXCEPTION_STACK_SIZE) / sizeof(uint32_t); #pragma GCC diagnostic pop } @@ -268,7 +268,7 @@ void port_idle_until_interrupt(void) { if (!background_callback_pending()) { __DSB(); /** DEBUG: may comment out WFI for debugging port functions */ - __WFI(); + // __WFI(); } common_hal_mcu_enable_interrupts(); } From e6c4c78813e57e2ae9955f0795eccab580b04f95 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Tue, 3 Sep 2024 13:02:24 -0700 Subject: [PATCH 09/39] - Fixed USB endpoint descriptor problems. All USB classes should now be usable. - Had to adjust some shared modules to account for MAX32 devices not supporting IN/OUT endpoints on the same EP # --- ports/analog/boards/APARD/mpconfigboard.mk | 4 +++- ports/analog/mpconfigport.mk | 10 +--------- shared-module/storage/__init__.c | 5 +++++ shared-module/usb_cdc/__init__.c | 5 +++++ shared-module/usb_hid/__init__.c | 6 ++++++ shared-module/usb_midi/__init__.c | 6 ++++++ 6 files changed, 26 insertions(+), 10 deletions(-) diff --git a/ports/analog/boards/APARD/mpconfigboard.mk b/ports/analog/boards/APARD/mpconfigboard.mk index e49d695761c3..cbd2e97d9058 100644 --- a/ports/analog/boards/APARD/mpconfigboard.mk +++ b/ports/analog/boards/APARD/mpconfigboard.mk @@ -18,8 +18,10 @@ USB_VID=0x0456 USB_PID=0x003C USB_MANUFACTURER="Analog Devices, Inc." USB_PRODUCT="MAX32690 APARD" -USB_NUM_ENDPOINT_PAIRS=12 USB_HIGHSPEED=1 + +# NOTE: MAX32 devices do not support IN/OUT pairs on the same EP +USB_NUM_ENDPOINT_PAIRS=12 ### # define UID len for memory safety (buffer gets passed as a raw ptr) diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk index 32881729c7a9..fe250e282751 100644 --- a/ports/analog/mpconfigport.mk +++ b/ports/analog/mpconfigport.mk @@ -17,17 +17,9 @@ INTERNAL_FLASH_FILESYSTEM = 1 SPI_FLASH_FILESYSTEM = 0 QSPI_FLASH_FILESYSTEM = 0 -# TODO: Test/Debug fs once USB-MSC is ready +# TODO: Test/Debug FS DISABLE_FILESYSTEM = 0 -# TODO: Test/Debug TinyUSB! -# CIRCUITPY_TINYUSB = 1 -# CIRCUITPY_USB_DEVICE ?= 1 -# CIRCUITPY_USB_CDC ?= 1 -# CIRCUITPY_USB_VENDOR ?=1 -# CIRCUITPY_USB_HID ?= 0 -# CIRCUITPY_USB_MIDI ?= 0 - #################################################################################### # Suggested config for first-time porting #################################################################################### diff --git a/shared-module/storage/__init__.c b/shared-module/storage/__init__.c index e64184c000bb..dd20d2a70fff 100644 --- a/shared-module/storage/__init__.c +++ b/shared-module/storage/__init__.c @@ -92,6 +92,11 @@ size_t storage_usb_add_descriptor(uint8_t *descriptor_buf, descriptor_counts_t * descriptor_buf[MSC_IN_ENDPOINT_INDEX] = 0x80 | (USB_MSC_EP_NUM_IN ? USB_MSC_EP_NUM_IN : descriptor_counts->current_endpoint); descriptor_counts->num_in_endpoints++; + // Some TinyUSB devices have issues with bi-directional endpoints + #ifdef TUD_ENDPOINT_ONE_DIRECTION_ONLY + descriptor_counts->current_endpoint++; + #endif + descriptor_buf[MSC_OUT_ENDPOINT_INDEX] = USB_MSC_EP_NUM_OUT ? USB_MSC_EP_NUM_OUT : descriptor_counts->current_endpoint; descriptor_counts->num_out_endpoints++; diff --git a/shared-module/usb_cdc/__init__.c b/shared-module/usb_cdc/__init__.c index 502d8fa620e0..0248c0f180fd 100644 --- a/shared-module/usb_cdc/__init__.c +++ b/shared-module/usb_cdc/__init__.c @@ -192,6 +192,11 @@ size_t usb_cdc_add_descriptor(uint8_t *descriptor_buf, descriptor_counts_t *desc ? (USB_CDC_EP_NUM_DATA_IN ? USB_CDC_EP_NUM_DATA_IN : descriptor_counts->current_endpoint) : (USB_CDC2_EP_NUM_DATA_IN ? USB_CDC2_EP_NUM_DATA_IN : descriptor_counts->current_endpoint)); descriptor_counts->num_in_endpoints++; + // Some TinyUSB devices have issues with bi-directional endpoints + #ifdef TUD_ENDPOINT_ONE_DIRECTION_ONLY + descriptor_counts->current_endpoint++; + #endif + descriptor_buf[CDC_DATA_OUT_ENDPOINT_INDEX] = console ? (USB_CDC_EP_NUM_DATA_OUT ? USB_CDC_EP_NUM_DATA_OUT : descriptor_counts->current_endpoint) diff --git a/shared-module/usb_hid/__init__.c b/shared-module/usb_hid/__init__.c index b007bc3ac2d4..4d0d5fc2e3d5 100644 --- a/shared-module/usb_hid/__init__.c +++ b/shared-module/usb_hid/__init__.c @@ -172,6 +172,12 @@ size_t usb_hid_add_descriptor(uint8_t *descriptor_buf, descriptor_counts_t *desc descriptor_buf[HID_IN_ENDPOINT_INDEX] = 0x80 | (USB_HID_EP_NUM_IN ? USB_HID_EP_NUM_IN : descriptor_counts->current_endpoint); descriptor_counts->num_in_endpoints++; + + // Some TinyUSB devices have issues with bi-directional endpoints + #ifdef TUD_ENDPOINT_ONE_DIRECTION_ONLY + descriptor_counts->current_endpoint++; + #endif + descriptor_buf[HID_OUT_ENDPOINT_INDEX] = USB_HID_EP_NUM_OUT ? USB_HID_EP_NUM_OUT : descriptor_counts->current_endpoint; descriptor_counts->num_out_endpoints++; diff --git a/shared-module/usb_midi/__init__.c b/shared-module/usb_midi/__init__.c index e0853e4e2a7a..3808801ff7e1 100644 --- a/shared-module/usb_midi/__init__.c +++ b/shared-module/usb_midi/__init__.c @@ -176,6 +176,12 @@ size_t usb_midi_add_descriptor(uint8_t *descriptor_buf, descriptor_counts_t *des descriptor_buf[MIDI_STREAMING_IN_ENDPOINT_INDEX] = 0x80 | (USB_MIDI_EP_NUM_IN ? USB_MIDI_EP_NUM_IN : descriptor_counts->current_endpoint); descriptor_counts->num_in_endpoints++; + + // Some TinyUSB devices have issues with bi-directional endpoints + #ifdef TUD_ENDPOINT_ONE_DIRECTION_ONLY + descriptor_counts->current_endpoint++; + #endif + descriptor_buf[MIDI_STREAMING_OUT_ENDPOINT_INDEX] = USB_MIDI_EP_NUM_OUT ? USB_MIDI_EP_NUM_OUT : descriptor_counts->current_endpoint; descriptor_counts->num_out_endpoints++; From 0fa04e9ff180f47ce4be19690a787ccfb2fd9730 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Thu, 5 Sep 2024 17:48:38 -0600 Subject: [PATCH 10/39] - Fixed USB issues. REPL & CIRCUITPY: drive now function correctly! - Fixed bugs with Internal Flash filesystem. Files now write & read back correctly. - Added copyright headers for all files. --- ports/analog/Makefile | 1 + ports/analog/README.md | 12 +- ports/analog/background.c | 1 + ports/analog/background.h | 1 + ports/analog/boards/APARD/README.md | 22 ++ ports/analog/boards/APARD/board.c | 4 +- ports/analog/boards/APARD/mpconfigboard.h | 23 +- ports/analog/boards/APARD/mpconfigboard.mk | 1 + ports/analog/boards/APARD/pins.c | 1 + ports/analog/common-hal/microcontroller/Pin.c | 5 + ports/analog/common-hal/microcontroller/Pin.h | 5 + .../common-hal/microcontroller/Processor.c | 6 +- .../common-hal/microcontroller/__init__.c | 1 + ports/analog/linking/max32690_cktpy.ld | 10 +- ports/analog/max32_port.h | 5 + ports/analog/mpconfigport.mk | 6 +- ports/analog/mphalport.c | 5 + ports/analog/mphalport.h | 2 +- ports/analog/peripherals/led.h | 5 + ports/analog/peripherals/max32690/pins.c | 6 + ports/analog/peripherals/max32690/pins.h | 6 + ports/analog/peripherals/pins.h | 6 +- ports/analog/supervisor/cpu.s | 7 + ports/analog/supervisor/internal_flash.c | 215 +++++++----------- ports/analog/supervisor/internal_flash.h | 6 + ports/analog/supervisor/serial.c | 51 +++-- ports/analog/supervisor/usb.c | 10 +- 27 files changed, 243 insertions(+), 180 deletions(-) create mode 100644 ports/analog/peripherals/led.h diff --git a/ports/analog/Makefile b/ports/analog/Makefile index 7c3e1cb80117..072d9f866219 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -1,6 +1,7 @@ # This file is part of the CircuitPython project: https://circuitpython.org # # SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries +# SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. # # SPDX-License-Identifier: MIT diff --git a/ports/analog/README.md b/ports/analog/README.md index 1650fad1cac5..e2bd38b66472 100644 --- a/ports/analog/README.md +++ b/ports/analog/README.md @@ -38,7 +38,9 @@ Universal instructions on flashing MAX32 devices this project can be found in th In addition, a user may flash the device by calling `make` with the `flash-msdk` target from within the `ports/analog` directory, as below: - $ make BOARD= flash-msdk +``` +$ make BOARD= flash-msdk +``` This requires the following: - A MAX32625PICO is connected to the PC via USB @@ -48,4 +50,10 @@ This requires the following: ### Using the REPL -[**Section in Progress. USB support needs implementation & test.**] +Once the device is plugged in, it will enumerate via USB as both a USB Serial Device (CDC) and a Mass Storage Device (MSC). You can connect to the Python REPL with your favorite Serial Monitor program e.g. TeraTerm, VS Code, Putty, etc. Use any buadrate with 8-bit, No Parity, 1 Stop Bit (8N1) settings. From this point forward, you can run Python code on the MCU! If you want help with learning CircuitPython-specific code or learning Python in general, a good place to start is Adafruit's ["Welcome to CircuitPython"](https://learn.adafruit.com/welcome-to-circuitpython/) guide. + +### Editing code.py + +Python code may be executed from `code.py` the `CIRCUITPY:` drive. When editing this file, please be aware that some text editors will work better than others. A list of suggested text editors can be found at Adafruit's guide here: https://learn.adafruit.com/welcome-to-circuitpython/recommended-editors + +Once you save `code.py`, it gets written back to the device you are running Circuitpython on, and will automatically run and output it's result to the REPL. You can also automatically reload and run code.py any time from the REPL by pressing CTRL+D. diff --git a/ports/analog/background.c b/ports/analog/background.c index 8dad8c4e351d..ad3063b7feb9 100644 --- a/ports/analog/background.c +++ b/ports/analog/background.c @@ -1,6 +1,7 @@ // This file is part of the CircuitPython project: https://circuitpython.org // // SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. // // SPDX-License-Identifier: MIT diff --git a/ports/analog/background.h b/ports/analog/background.h index 8fbe98bd9d8e..d32f2b0dc2c3 100644 --- a/ports/analog/background.h +++ b/ports/analog/background.h @@ -1,6 +1,7 @@ // This file is part of the CircuitPython project: https://circuitpython.org // // SPDX-FileCopyrightText: Copyright (c) 2019 Dan Halbert for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. // // SPDX-License-Identifier: MIT diff --git a/ports/analog/boards/APARD/README.md b/ports/analog/boards/APARD/README.md index 8768ed93d56d..04f28ca4502b 100644 --- a/ports/analog/boards/APARD/README.md +++ b/ports/analog/boards/APARD/README.md @@ -12,3 +12,25 @@ For more info about AD-APARD32690-SL, visit our product webpages for datasheets, [AD-APARD32690-SL Product Webpage](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/ad-apard32690-sl.html) [AD-APARD32690-SL User Guide](https://wiki.analog.com/resources/eval/user-guides/ad-apard32690-sl) + +#### Building for this board + +To build for this board, ensure you are in the `ports/analog` directory and run the following command. Note that passing in the `-jN` flag, where N is the # of cores on your machine, can speed up compile times. + +``` +make BOARD=APARD +``` + +#### Flashing this board + +To flash the board, run the following command if using the MAX32625PICO: + +``` +make BOARD=APARD flash-msdk +``` + +If using Segger JLink, please run the following command instead: + +``` +make BOARD=APARD flash-jlink +``` diff --git a/ports/analog/boards/APARD/board.c b/ports/analog/boards/APARD/board.c index 972bdcee6f8c..c24ff5a08e83 100644 --- a/ports/analog/boards/APARD/board.c +++ b/ports/analog/boards/APARD/board.c @@ -1,6 +1,6 @@ // This file is part of the CircuitPython project: https://circuitpython.org // -// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc // // SPDX-License-Identifier: MIT @@ -26,7 +26,7 @@ const int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t)); // DEFAULT: Using the weak-defined supervisor/shared/board.c functions -/***** OPTIONAL BOARD-SPECIFIC FUNTIONS from supervisor/board.h *****/ +/***** OPTIONAL BOARD-SPECIFIC FUNCTIONS from supervisor/board.h *****/ // Returns true if the user initiates safe mode in a board specific way. // Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific // way. diff --git a/ports/analog/boards/APARD/mpconfigboard.h b/ports/analog/boards/APARD/mpconfigboard.h index 87baa0120994..972ca72abeba 100644 --- a/ports/analog/boards/APARD/mpconfigboard.h +++ b/ports/analog/boards/APARD/mpconfigboard.h @@ -1,6 +1,7 @@ // This file is part of the CircuitPython project: https://circuitpython.org // // SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices Inc. // // SPDX-License-Identifier: MIT @@ -20,18 +21,18 @@ #define FLASH_SIZE (0x300000) // 3MiB #define FLASH_PAGE_SIZE (0x4000) // 16384 byte pages (16 KiB) -#define BOARD_HAS_CRYSTAL 1 +#define BOARD_HAS_CRYSTAL 1 +#define NUM_GPIO_PORTS 4 +#define CONSOLE_UART MXC_UART0 -#define NUM_GPIO_PORTS 4 - -#if INTERNAL_FLASH_FILESYSTEM -#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (0x102FC000) // for MAX32690 -#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (64 * 1024) // 64K +// #if INTERNAL_FLASH_FILESYSTEM +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (0x102E0000) // for MAX32690 +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (128 * 1024) // 64K #define MAX32_FLASH_SIZE 0x300000 // 3 MiB -#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x10000 // 64KiB -#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x102FC000 // Load into the last MiB of code/data storage +#define INTERNAL_FLASH_FILESYSTEM_SIZE CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE +#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x102E0000 // Load into the last MiB of code/data storage -#else -#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) -#endif +// #else +// #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) +// #endif diff --git a/ports/analog/boards/APARD/mpconfigboard.mk b/ports/analog/boards/APARD/mpconfigboard.mk index cbd2e97d9058..7cc54ccfc6dd 100644 --- a/ports/analog/boards/APARD/mpconfigboard.mk +++ b/ports/analog/boards/APARD/mpconfigboard.mk @@ -1,6 +1,7 @@ # This file is part of the CircuitPython project: https://circuitpython.org # # SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries +# SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc # # SPDX-License-Identifier: MIT diff --git a/ports/analog/boards/APARD/pins.c b/ports/analog/boards/APARD/pins.c index ddd2afdafe58..89bc41832751 100644 --- a/ports/analog/boards/APARD/pins.c +++ b/ports/analog/boards/APARD/pins.c @@ -1,6 +1,7 @@ // This file is part of the CircuitPython project: https://circuitpython.org // // SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. // // SPDX-License-Identifier: MIT diff --git a/ports/analog/common-hal/microcontroller/Pin.c b/ports/analog/common-hal/microcontroller/Pin.c index e11c9413c907..65949045cdcc 100644 --- a/ports/analog/common-hal/microcontroller/Pin.c +++ b/ports/analog/common-hal/microcontroller/Pin.c @@ -1,3 +1,8 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc +// +// SPDX-License-Identifier: MIT #include diff --git a/ports/analog/common-hal/microcontroller/Pin.h b/ports/analog/common-hal/microcontroller/Pin.h index 55d4081f3a6b..169586e7e903 100644 --- a/ports/analog/common-hal/microcontroller/Pin.h +++ b/ports/analog/common-hal/microcontroller/Pin.h @@ -1,3 +1,8 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc +// +// SPDX-License-Identifier: MIT #pragma once diff --git a/ports/analog/common-hal/microcontroller/Processor.c b/ports/analog/common-hal/microcontroller/Processor.c index 339770f9fd24..e28388e58596 100644 --- a/ports/analog/common-hal/microcontroller/Processor.c +++ b/ports/analog/common-hal/microcontroller/Processor.c @@ -1,4 +1,8 @@ - +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc +// +// SPDX-License-Identifier: MIT #include #include "py/runtime.h" diff --git a/ports/analog/common-hal/microcontroller/__init__.c b/ports/analog/common-hal/microcontroller/__init__.c index aff2dc2fd497..bbdb686195ca 100644 --- a/ports/analog/common-hal/microcontroller/__init__.c +++ b/ports/analog/common-hal/microcontroller/__init__.c @@ -2,6 +2,7 @@ // // SPDX-FileCopyrightText: Copyright (c) 2016 Scott Shawcroft for Adafruit Industries // SPDX-FileCopyrightText: Copyright (c) 2019 Lucian Copeland for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc // // SPDX-License-Identifier: MIT diff --git a/ports/analog/linking/max32690_cktpy.ld b/ports/analog/linking/max32690_cktpy.ld index e80a14d53c90..9b32121a135a 100644 --- a/ports/analog/linking/max32690_cktpy.ld +++ b/ports/analog/linking/max32690_cktpy.ld @@ -1,9 +1,15 @@ +/** This file is part of the CircuitPython project: https://circuitpython.org +* +* SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices Inc. +* +* SPDX-License-Identifier: MIT +*/ + MEMORY { ROM (rx) : ORIGIN = 0x00000000, LENGTH = 128K FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 3M FLASH_FIRMWARE (rx) : ORIGIN = 0x10000000, LENGTH = 2992K - FLASH_ISR (rx) : ORIGIN = 0x102EC000, LENGTH = 16K - FLASH_FS (rx) : ORIGIN = 0x102FC000, LENGTH = 64K + FLASH_FS (rx) : ORIGIN = 0x102E0000, LENGTH = 128K RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 1M } /* Minimum flash page is 16K */ diff --git a/ports/analog/max32_port.h b/ports/analog/max32_port.h index 214e975b719b..0ded32e5b820 100644 --- a/ports/analog/max32_port.h +++ b/ports/analog/max32_port.h @@ -1,3 +1,8 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. +// +// SPDX-License-Identifier: MIT #ifndef MAX32_PORT_H #define MAX32_PORT_H diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk index fe250e282751..60b18a5249a2 100644 --- a/ports/analog/mpconfigport.mk +++ b/ports/analog/mpconfigport.mk @@ -1,6 +1,7 @@ # This file is part of the CircuitPython project: https://circuitpython.org # # SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries +# SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. # # SPDX-License-Identifier: MIT @@ -14,11 +15,6 @@ INTERNAL_LIBM ?= 1 CFLAGS += -DHAS_TRNG=1 INTERNAL_FLASH_FILESYSTEM = 1 -SPI_FLASH_FILESYSTEM = 0 -QSPI_FLASH_FILESYSTEM = 0 - -# TODO: Test/Debug FS -DISABLE_FILESYSTEM = 0 #################################################################################### # Suggested config for first-time porting diff --git a/ports/analog/mphalport.c b/ports/analog/mphalport.c index d4e63ec67393..8f305d6325e5 100644 --- a/ports/analog/mphalport.c +++ b/ports/analog/mphalport.c @@ -1,3 +1,8 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc +// +// SPDX-License-Identifier: MIT #include "mphalport.h" #include "py/mphal.h" diff --git a/ports/analog/mphalport.h b/ports/analog/mphalport.h index 5efd78736e78..3cd3e00c6e18 100644 --- a/ports/analog/mphalport.h +++ b/ports/analog/mphalport.h @@ -1,6 +1,6 @@ // This file is part of the CircuitPython project: https://circuitpython.org // -// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc // // SPDX-License-Identifier: MIT diff --git a/ports/analog/peripherals/led.h b/ports/analog/peripherals/led.h new file mode 100644 index 000000000000..ff05be051bb2 --- /dev/null +++ b/ports/analog/peripherals/led.h @@ -0,0 +1,5 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. +// +// SPDX-License-Identifier: MIT diff --git a/ports/analog/peripherals/max32690/pins.c b/ports/analog/peripherals/max32690/pins.c index 4f26d9d1f6d6..b6c4e993553b 100644 --- a/ports/analog/peripherals/max32690/pins.c +++ b/ports/analog/peripherals/max32690/pins.c @@ -1,3 +1,9 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. +// +// SPDX-License-Identifier: MIT + #include "py/obj.h" #include "py/mphal.h" #include "peripherals/pins.h" diff --git a/ports/analog/peripherals/max32690/pins.h b/ports/analog/peripherals/max32690/pins.h index 9b5cc303ee5c..44022decdf71 100644 --- a/ports/analog/peripherals/max32690/pins.h +++ b/ports/analog/peripherals/max32690/pins.h @@ -1,3 +1,9 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. +// +// SPDX-License-Identifier: MIT + #pragma once extern const mcu_pin_obj_t pin_P0_00; diff --git a/ports/analog/peripherals/pins.h b/ports/analog/peripherals/pins.h index ae471dc29e18..313addc1f205 100644 --- a/ports/analog/peripherals/pins.h +++ b/ports/analog/peripherals/pins.h @@ -1,4 +1,8 @@ - +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. +// +// SPDX-License-Identifier: MIT #pragma once diff --git a/ports/analog/supervisor/cpu.s b/ports/analog/supervisor/cpu.s index 9e6807a5e2e9..7cb8291045f1 100644 --- a/ports/analog/supervisor/cpu.s +++ b/ports/analog/supervisor/cpu.s @@ -1,3 +1,10 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc +// +// SPDX-License-Identifier: MIT + .syntax unified .cpu cortex-m4 .thumb diff --git a/ports/analog/supervisor/internal_flash.c b/ports/analog/supervisor/internal_flash.c index 97fe21d4a52c..2b9b51967734 100644 --- a/ports/analog/supervisor/internal_flash.c +++ b/ports/analog/supervisor/internal_flash.c @@ -1,8 +1,16 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2013, 2014 Damien P. George +// SPDX-FileCopyrightText: Copyright (c) 2020 Lucian Copeland for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. +// +// SPDX-License-Identifier: MIT #include "supervisor/internal_flash.h" #include #include +#include #include "extmod/vfs.h" #include "extmod/vfs_fat.h" @@ -14,20 +22,19 @@ #include "supervisor/filesystem.h" #include "supervisor/flash.h" #include "supervisor/shared/safe_mode.h" - #if CIRCUITPY_USB_DEVICE #include "supervisor/usb.h" #endif +#include "mpconfigboard.h" + // MAX32 HAL Includes #include "flc.h" #include "flc_reva.h" #include "icc.h" // includes icc_.c for MSDK die type #include "mxc_device.h" -/** TODO: - * Test! - * +/** * NOTE: * ANY function which modifies flash contents must execute from a crit section. * This is because FLC functions are loc'd in RAM, and an ISR executing @@ -44,13 +51,10 @@ * Therefore only ICC0 need be used for the purpose of these functions. */ -#define NO_CACHE 0xffffffff -#define MAX_CACHE 0x4000 - typedef struct { - uint32_t base_addr; - uint32_t sector_size; - uint32_t num_sectors; + const uint32_t base_addr; + const uint32_t sector_size; + const uint32_t num_sectors; } flash_layout_t; #ifdef MAX32690 @@ -58,15 +62,15 @@ typedef struct { // FS Code will use INTERNAL_FLASH_FILESYSTEM_START_ADDR // and won't conflict with ISR vector in first 16 KiB of flash static const flash_layout_t flash_layout[] = { - { 0x10000000, 0x4000, 192}, + { 0x10000000, FLASH_PAGE_SIZE, 192}, // { 0x10300000, 0x2000, 32 }, // RISC-V flash }; -// Cache a full 16K sector -static uint8_t _flash_cache[0x4000] __attribute__((aligned(4))); -#endif +// must be able to hold a full page (for re-writing upon erase) +static uint32_t page_buffer[FLASH_PAGE_SIZE / 4] = {0x0}; -// Address of the flash sector currently being cached -static uint32_t _cache_addr_in_flash = NO_CACHE; +#else +#error "Invalid BOARD. Please set BOARD equal to any board under 'boards/'." +#endif static inline int32_t block2addr(uint32_t block) { if (block >= 0 && block < INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS) { @@ -135,150 +139,100 @@ uint32_t supervisor_flash_get_block_count(void) { return INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS; } -// Write back to Flash the page that is currently cached void port_internal_flash_flush(void) { - // Flash has not been cached - if (_cache_addr_in_flash == NO_CACHE) { - return; - } - uint32_t sector_start, sector_size = 0xffffffff; - - // Clear & enable flash interrupt flags - MXC_FLC_EnableInt(MXC_F_FLC_INTR_DONEIE | MXC_F_FLC_INTR_AFIE); - - // Figure out the sector of flash we're targeting - if (flash_get_sector_info(_cache_addr_in_flash, §or_start, §or_size) == -1) { - // If not in valid sector, just release the cache and return - supervisor_flash_release_cache(); - return; - } - - // if invalid sector or sector size > the size of our cache, reset with flash fail - if (sector_size > sizeof(_flash_cache) || sector_start == 0xffffffff) { - reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); - } - - // skip if the data in cache is the same as what's already there - if (memcmp(_flash_cache, (void *)_cache_addr_in_flash, FLASH_PAGE_SIZE) != 0) { - uint32_t error; - - // buffer for the page of flash - uint32_t page_buffer[FLASH_PAGE_SIZE >> 2] = { - 0xFFFFFFFF - }; // bytes per page / 4 bytes = # of uint32_t - - // Unlock Flash - MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_UNLOCKED; - - /*** ERASE FLASH PAGE ***/ - MXC_CRITICAL( - // buffer the page - MXC_FLC_Read(sector_start, page_buffer, sector_size); - // Erase page & error check - error = MXC_FLC_PageErase(sector_start); - ); - if (error != E_NO_ERROR) { - // lock flash & reset - MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED; - reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); - } - /*** RE-WRITE FLASH PAGE w/ CACHE DATA ***/ - MXC_CRITICAL( - // ret = program the flash page with cache data (for loop) - for (uint32_t i = 0; i < (sector_size >> 2); i++) { - error = MXC_FLC_Write32(_cache_addr_in_flash + 4 * i, _flash_cache[i]); - } - ); - if (error != E_NO_ERROR) { - // lock flash & reset - MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED; - reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); - } + // Flush all instruction cache + // ME18 has bug where top-level sysctrl flush bit only works one. + // Have to use low-level flush bits for each ICC instance. + MXC_ICC_Flush(MXC_ICC0); + MXC_ICC_Flush(MXC_ICC1); - // Lock flash & exit - MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED; - } // finished flushing cache - // todo: verify no other flash operation (e.g. flushing HW cache) is needed to complete this + // Clear the line fill buffer by reading 2 pages from flash + volatile uint32_t *line_addr; + volatile uint32_t line; + line_addr = (uint32_t *)(MXC_FLASH_MEM_BASE); + line = *line_addr; + line_addr = (uint32_t *)(MXC_FLASH_MEM_BASE + MXC_FLASH_PAGE_SIZE); + line = *line_addr; + (void)line; // Silence build warnings that this variable is not used. } // Read flash blocks, using cache if it contains the right data +// return 0 on success, non-zero on error mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { // Find the address of the block we want to read int src_addr = block2addr(block); if (src_addr == -1) { // bad block num - return false; + return 1; } uint32_t sector_size, sector_start; if (flash_get_sector_info(src_addr, §or_start, §or_size) == -1) { // bad sector idx - return false; + return 2; } - // Find how many blocks left in sector - uint32_t blocks_in_sector = (sector_size - (src_addr - sector_start)) / FILESYSTEM_BLOCK_SIZE; - - // If the whole read is inside the cache, then read cache - if ( (num_blocks <= blocks_in_sector) && (_cache_addr_in_flash == sector_start) ) { - memcpy(dest, (_flash_cache + (src_addr - sector_start)), FILESYSTEM_BLOCK_SIZE * num_blocks); - } else { - // flush the cache & read the flash data directly - supervisor_flash_flush(); - /** NOTE: The MXC_FLC_Read function executes from SRAM and does some more error checking - * than memcpy does. Will use it for now. - */ - MXC_FLC_Read((int)dest, (int *)src_addr, FILESYSTEM_BLOCK_SIZE * num_blocks); - } + /** NOTE: The MXC_FLC_Read function executes from SRAM and does some more error checking + * than memcpy does. Will use it for now. + */ + MXC_FLC_Read( src_addr, dest, FILESYSTEM_BLOCK_SIZE * num_blocks ); + return 0; // success } -// Write to flash blocks, using cache if it is targeting the right page (and large enough) -// todo: most of this fn is taken from the ST driver. -// todo: look at other ports and see if I can adapt it at all +// Write to flash blocks +// return 0 on success, non-zero on error mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { - uint32_t count=0; - uint32_t sector_size=0; - uint32_t sector_start=0; + uint32_t error, blocks_left, count, page_start, page_size = 0; while (num_blocks > 0) { - const int32_t dest_addr = block2addr(block_num); + uint32_t dest_addr = block2addr(block_num); // bad block number passed in if (dest_addr == -1) { - return false; - } - - // Implementation is from STM port - // NOTE: May replace later, but this port had a method - // that seemed to make sense across multiple devices. - if (flash_get_sector_info(dest_addr, §or_start, §or_size) == -1) { - reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); + return 1; } - // fail if sector size is greater than cache size - if (sector_size > sizeof(_flash_cache)) { + if (flash_get_sector_info(dest_addr, &page_start, &page_size) == -1) { reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); } // Find the number of blocks left within this sector - // BLOCK_NUM = (SECTOR SIZE - BLOCK OFFSET within sector)) / BLOCK_SIZE - count = (sector_size - (dest_addr - sector_start)) / FILESYSTEM_BLOCK_SIZE; - count = MIN(num_blocks, count); + // BLOCKS_LEFT = (SECTOR_SIZE - BLOCK_OFFSET within sector)) / BLOCK_SIZE + blocks_left = (page_size - (dest_addr - page_start)) / FILESYSTEM_BLOCK_SIZE; + count = MIN(num_blocks, blocks_left); - // if we're not at the start of a sector, copy the whole sector to cache - if (_cache_addr_in_flash != sector_start) { - // Flush cache first before we overwrite it - supervisor_flash_flush(); + MXC_ICC_Disable(MXC_ICC0); - _cache_addr_in_flash = sector_start; + // Buffer the page of flash to erase + MXC_FLC_Read(page_start , page_buffer, page_size); - // Copy the whole sector into cache - memcpy(_flash_cache, (void *)sector_start, sector_size); + // Erase flash page + MXC_CRITICAL( + error = MXC_FLC_PageErase(dest_addr); + ); + if (error != E_NO_ERROR) { + // lock flash & reset + MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED; + reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); } - // Overwrite the cache with source data passed in - memcpy(_flash_cache + (dest_addr - sector_start), src, count * FILESYSTEM_BLOCK_SIZE); + // Copy new src data into the page buffer + // fill the new data in at the offset dest_addr - page_start + // account for uint32_t page_buffer vs uint8_t src + memcpy( (page_buffer + (dest_addr - page_start) / 4), src, count * FILESYSTEM_BLOCK_SIZE); + + // Write new page buffer back into flash + MXC_CRITICAL( + error = MXC_FLC_Write(page_start, page_size, page_buffer); + ); + if (error != E_NO_ERROR) { + // lock flash & reset + MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED; + reset_into_safe_mode(SAFE_MODE_FLASH_WRITE_FAIL); + } + + MXC_ICC_Enable(MXC_ICC0); block_num += count; src += count * FILESYSTEM_BLOCK_SIZE; @@ -289,18 +243,5 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, // Empty the fs cache void supervisor_flash_release_cache(void) { - // Invalidate the current FS cache - _cache_addr_in_flash = NO_CACHE; - - // Flush the hardware cache for ARM M4 - MXC_ICC_Flush(MXC_ICC0); - - // Clear the line fill buffer by reading 2 pages from flash - volatile uint32_t *line_addr; - volatile uint32_t line; - line_addr = (uint32_t *)(MXC_FLASH_MEM_BASE); - line = *line_addr; - line_addr = (uint32_t *)(MXC_FLASH_MEM_BASE + MXC_FLASH_PAGE_SIZE); - line = *line_addr; - (void)line; // Silence build warnings that this variable is not used. + supervisor_flash_flush(); } diff --git a/ports/analog/supervisor/internal_flash.h b/ports/analog/supervisor/internal_flash.h index 1b4091e9a4fd..cc25f80be770 100644 --- a/ports/analog/supervisor/internal_flash.h +++ b/ports/analog/supervisor/internal_flash.h @@ -1,3 +1,9 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2013, 2014 Damien P. George +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. +// +// SPDX-License-Identifier: MIT #pragma once diff --git a/ports/analog/supervisor/serial.c b/ports/analog/supervisor/serial.c index 7f485a35204c..871e6cd0fe72 100644 --- a/ports/analog/supervisor/serial.c +++ b/ports/analog/supervisor/serial.c @@ -2,6 +2,7 @@ // // SPDX-FileCopyrightText: Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries // SPDX-FileCopyrightText: Copyright (c) 2019 Lucian Copeland for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) Brandon Hurst, Analog Devices, Inc. // // SPDX-License-Identifier: MIT @@ -9,25 +10,24 @@ #include #include "supervisor/shared/serial.h" +#include "uart.h" +#include "uart_regs.h" + +#ifndef MAX32_SERIAL #define MAX32_SERIAL 0 +#endif #if MAX32_SERIAL -// TODO: Switch this to using DEBUG_UART. +#ifdef MAX32690 +#define CONSOLE_UART MXC_UART0 +#endif #endif void port_serial_init(void) { #if MAX32_SERIAL - // huart2.Instance = USART2; - // huart2.Init.BaudRate = 115200; - // huart2.Init.WordLength = UART_WORDLENGTH_8B; - // huart2.Init.StopBits = UART_STOPBITS_1; - // huart2.Init.Parity = UART_PARITY_NONE; - // huart2.Init.Mode = UART_MODE_TX_RX; - // huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - // huart2.Init.OverSampling = UART_OVERSAMPLING_16; - // if (HAL_UART_Init(&huart2) == HAL_OK) { - // stm32f4_peripherals_status_led(1, 1); - // } + MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; + while( !(MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IBRO_RDY) ); + MXC_UART_Init(CONSOLE_UART, 115200, MXC_UART_IBRO_CLK); #endif } @@ -40,15 +40,27 @@ char port_serial_read(void) { // uint8_t data; // HAL_UART_Receive(&huart2, &data, 1, 500); // return data; + uint8_t rData; + + mxc_uart_req_t uart_req = { + .uart = CONSOLE_UART, + .rxCnt = 0, + .txCnt = 0, + .txData = NULL, + .rxData = &rData, + .txLen = 0, + .rxLen = 1 + }; + MXC_UART_Transaction(&uart_req); + return rData; #else return -1; #endif } -// There is no easy way to find the number of pending characters, so just say there's 1. uint32_t port_serial_bytes_available(void) { #if MAX32_SERIAL - // return __HAL_UART_GET_FLAG(&huart2, UART_FLAG_RXNE) ? 1 : 0; + return MXC_UART_GetRXFIFOAvailable(CONSOLE_UART); #else return 0; #endif @@ -56,6 +68,15 @@ uint32_t port_serial_bytes_available(void) { void port_serial_write_substring(const char *text, uint32_t len) { #if MAX32_SERIAL - // HAL_UART_Transmit(&huart2, (uint8_t *)text, len, 5000); + mxc_uart_req_t uart_req = { + .uart = CONSOLE_UART, + .rxCnt = 0, + .txCnt = 0, + .txData = (const unsigned char *)text, + .rxData = NULL, + .txLen = len, + .rxLen = 0 + }; + MXC_UART_Transaction(&uart_req); #endif } diff --git a/ports/analog/supervisor/usb.c b/ports/analog/supervisor/usb.c index 2fd1545bdb1b..f156669ad386 100644 --- a/ports/analog/supervisor/usb.c +++ b/ports/analog/supervisor/usb.c @@ -1,3 +1,9 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2018 hathach for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc +// +// SPDX-License-Identifier: MIT #include "supervisor/usb.h" #include "common-hal/microcontroller/Pin.h" @@ -16,7 +22,6 @@ void init_usb_hardware(void) { // No need to add them to the never_reset list for mcu/Pin API. // 1 ms SysTick initialized in board.c - // todo: consider moving SysTick initialization here? // Enable requisite clocks & power for USB MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IPO); @@ -26,10 +31,9 @@ void init_usb_hardware(void) { // Supervisor calls TinyUSB's dcd_init, // which initializes the USB PHY. - // Dep. on CIRCUITPY_TINYUSB and CIRCUITPY_USB_DEVICE + // Depending on CIRCUITPY_TINYUSB and CIRCUITPY_USB_DEVICE // Interrupt enables are left to TUSB depending on the device class - // todo: confirm with testing! } void USB_IRQHandler(void) From 3f2e39e101d25e9b50a9d2408b699cba076c26d2 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Sun, 22 Sep 2024 09:48:11 -0600 Subject: [PATCH 11/39] Added digitalio module. --- ports/analog/boards/APARD/mpconfigboard.h | 2 +- ports/analog/boards/APARD/pins.c | 216 +++++----- .../common-hal/digitalio/DigitalInOut.c | 201 +++++++++ .../common-hal/digitalio/DigitalInOut.h | 15 + ports/analog/common-hal/digitalio/__init__.c | 7 + ports/analog/common-hal/microcontroller/Pin.c | 45 +- .../common-hal/microcontroller/__init__.c | 404 +++++++++--------- ports/analog/mpconfigport.mk | 2 +- ports/analog/peripherals/max32690/pins.c | 220 +++++----- ports/analog/peripherals/pins.h | 22 +- 10 files changed, 678 insertions(+), 456 deletions(-) create mode 100644 ports/analog/common-hal/digitalio/DigitalInOut.c create mode 100644 ports/analog/common-hal/digitalio/DigitalInOut.h create mode 100644 ports/analog/common-hal/digitalio/__init__.c diff --git a/ports/analog/boards/APARD/mpconfigboard.h b/ports/analog/boards/APARD/mpconfigboard.h index 972ca72abeba..0e09a4ede674 100644 --- a/ports/analog/boards/APARD/mpconfigboard.h +++ b/ports/analog/boards/APARD/mpconfigboard.h @@ -22,7 +22,7 @@ #define FLASH_PAGE_SIZE (0x4000) // 16384 byte pages (16 KiB) #define BOARD_HAS_CRYSTAL 1 -#define NUM_GPIO_PORTS 4 +#define NUM_GPIO_PORTS 5 #define CONSOLE_UART MXC_UART0 // #if INTERNAL_FLASH_FILESYSTEM diff --git a/ports/analog/boards/APARD/pins.c b/ports/analog/boards/APARD/pins.c index 89bc41832751..5b736385dc58 100644 --- a/ports/analog/boards/APARD/pins.c +++ b/ports/analog/boards/APARD/pins.c @@ -10,117 +10,117 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS //P0 - { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_P0_00) }, - { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_P0_01) }, - { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_P0_02) }, - { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_P0_03) }, - { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_P0_04) }, - { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_P0_05) }, - { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_P0_06) }, - { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_P0_07) }, - { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_P0_08) }, - { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_P0_09) }, - { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_P0_10) }, - { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_P0_11) }, - { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_P0_12) }, - { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_P0_13) }, - { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_P0_14) }, - { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_P0_15) }, - { MP_ROM_QSTR(MP_QSTR_PA16), MP_ROM_PTR(&pin_P0_16) }, - { MP_ROM_QSTR(MP_QSTR_PA17), MP_ROM_PTR(&pin_P0_17) }, - { MP_ROM_QSTR(MP_QSTR_PA18), MP_ROM_PTR(&pin_P0_18) }, - { MP_ROM_QSTR(MP_QSTR_PA19), MP_ROM_PTR(&pin_P0_19) }, - { MP_ROM_QSTR(MP_QSTR_PA20), MP_ROM_PTR(&pin_P0_20) }, - { MP_ROM_QSTR(MP_QSTR_PA21), MP_ROM_PTR(&pin_P0_21) }, - { MP_ROM_QSTR(MP_QSTR_PA22), MP_ROM_PTR(&pin_P0_22) }, - { MP_ROM_QSTR(MP_QSTR_PA23), MP_ROM_PTR(&pin_P0_23) }, - { MP_ROM_QSTR(MP_QSTR_PA24), MP_ROM_PTR(&pin_P0_24) }, - { MP_ROM_QSTR(MP_QSTR_PA25), MP_ROM_PTR(&pin_P0_25) }, - { MP_ROM_QSTR(MP_QSTR_PA26), MP_ROM_PTR(&pin_P0_26) }, - { MP_ROM_QSTR(MP_QSTR_PA27), MP_ROM_PTR(&pin_P0_27) }, - { MP_ROM_QSTR(MP_QSTR_PA28), MP_ROM_PTR(&pin_P0_28) }, - { MP_ROM_QSTR(MP_QSTR_PA29), MP_ROM_PTR(&pin_P0_29) }, - { MP_ROM_QSTR(MP_QSTR_PA30), MP_ROM_PTR(&pin_P0_30) }, - { MP_ROM_QSTR(MP_QSTR_PA31), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, + { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, //P1 - { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_P1_00) }, - { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_P1_01) }, - { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_P1_02) }, - { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_P1_03) }, - { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_P1_04) }, - { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_P1_05) }, - { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_P1_06) }, - { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_P1_07) }, - { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_P1_08) }, - { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_P1_09) }, - { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_P1_10) }, - { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_P1_11) }, - { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_P1_12) }, - { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_P1_13) }, - { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_P1_14) }, - { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_P1_15) }, - { MP_ROM_QSTR(MP_QSTR_PB16), MP_ROM_PTR(&pin_P1_16) }, - { MP_ROM_QSTR(MP_QSTR_PB17), MP_ROM_PTR(&pin_P1_17) }, - { MP_ROM_QSTR(MP_QSTR_PB18), MP_ROM_PTR(&pin_P1_18) }, - { MP_ROM_QSTR(MP_QSTR_PB19), MP_ROM_PTR(&pin_P1_19) }, - { MP_ROM_QSTR(MP_QSTR_PB20), MP_ROM_PTR(&pin_P1_20) }, - { MP_ROM_QSTR(MP_QSTR_PB21), MP_ROM_PTR(&pin_P1_21) }, - { MP_ROM_QSTR(MP_QSTR_PB22), MP_ROM_PTR(&pin_P1_22) }, - { MP_ROM_QSTR(MP_QSTR_PB23), MP_ROM_PTR(&pin_P1_23) }, - { MP_ROM_QSTR(MP_QSTR_PB24), MP_ROM_PTR(&pin_P1_24) }, - { MP_ROM_QSTR(MP_QSTR_PB25), MP_ROM_PTR(&pin_P1_25) }, - { MP_ROM_QSTR(MP_QSTR_PB26), MP_ROM_PTR(&pin_P1_26) }, - { MP_ROM_QSTR(MP_QSTR_PB27), MP_ROM_PTR(&pin_P1_27) }, - { MP_ROM_QSTR(MP_QSTR_PB28), MP_ROM_PTR(&pin_P1_28) }, - { MP_ROM_QSTR(MP_QSTR_PB29), MP_ROM_PTR(&pin_P1_29) }, - { MP_ROM_QSTR(MP_QSTR_PB30), MP_ROM_PTR(&pin_P1_30) }, - { MP_ROM_QSTR(MP_QSTR_PB31), MP_ROM_PTR(&pin_P1_31) }, + { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_P1_16), MP_ROM_PTR(&pin_P1_16) }, + { MP_ROM_QSTR(MP_QSTR_P1_17), MP_ROM_PTR(&pin_P1_17) }, + { MP_ROM_QSTR(MP_QSTR_P1_18), MP_ROM_PTR(&pin_P1_18) }, + { MP_ROM_QSTR(MP_QSTR_P1_19), MP_ROM_PTR(&pin_P1_19) }, + { MP_ROM_QSTR(MP_QSTR_P1_20), MP_ROM_PTR(&pin_P1_20) }, + { MP_ROM_QSTR(MP_QSTR_P1_21), MP_ROM_PTR(&pin_P1_21) }, + { MP_ROM_QSTR(MP_QSTR_P1_22), MP_ROM_PTR(&pin_P1_22) }, + { MP_ROM_QSTR(MP_QSTR_P1_23), MP_ROM_PTR(&pin_P1_23) }, + { MP_ROM_QSTR(MP_QSTR_P1_24), MP_ROM_PTR(&pin_P1_24) }, + { MP_ROM_QSTR(MP_QSTR_P1_25), MP_ROM_PTR(&pin_P1_25) }, + { MP_ROM_QSTR(MP_QSTR_P1_26), MP_ROM_PTR(&pin_P1_26) }, + { MP_ROM_QSTR(MP_QSTR_P1_27), MP_ROM_PTR(&pin_P1_27) }, + { MP_ROM_QSTR(MP_QSTR_P1_28), MP_ROM_PTR(&pin_P1_28) }, + { MP_ROM_QSTR(MP_QSTR_P1_29), MP_ROM_PTR(&pin_P1_29) }, + { MP_ROM_QSTR(MP_QSTR_P1_30), MP_ROM_PTR(&pin_P1_30) }, + { MP_ROM_QSTR(MP_QSTR_P1_31), MP_ROM_PTR(&pin_P1_31) }, //P2 - { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_P2_00) }, - { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_P2_01) }, - { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_P2_02) }, - { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_P2_03) }, - { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_P2_04) }, - { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_P2_05) }, - { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_P2_06) }, - { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_P2_07) }, - { MP_ROM_QSTR(MP_QSTR_PC08), MP_ROM_PTR(&pin_P2_08) }, - { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_P2_09) }, - { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_P2_10) }, - { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_P2_11) }, - { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_P2_12) }, - { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_P2_13) }, - { MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_P2_14) }, - { MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_P2_15) }, - { MP_ROM_QSTR(MP_QSTR_PC16), MP_ROM_PTR(&pin_P2_16) }, - { MP_ROM_QSTR(MP_QSTR_PC17), MP_ROM_PTR(&pin_P2_17) }, - { MP_ROM_QSTR(MP_QSTR_PC18), MP_ROM_PTR(&pin_P2_18) }, - { MP_ROM_QSTR(MP_QSTR_PC19), MP_ROM_PTR(&pin_P2_19) }, - { MP_ROM_QSTR(MP_QSTR_PC20), MP_ROM_PTR(&pin_P2_20) }, - { MP_ROM_QSTR(MP_QSTR_PC21), MP_ROM_PTR(&pin_P2_21) }, - { MP_ROM_QSTR(MP_QSTR_PC22), MP_ROM_PTR(&pin_P2_22) }, - { MP_ROM_QSTR(MP_QSTR_PC23), MP_ROM_PTR(&pin_P2_23) }, - { MP_ROM_QSTR(MP_QSTR_PC24), MP_ROM_PTR(&pin_P2_24) }, - { MP_ROM_QSTR(MP_QSTR_PC25), MP_ROM_PTR(&pin_P2_25) }, - { MP_ROM_QSTR(MP_QSTR_PC26), MP_ROM_PTR(&pin_P2_26) }, - { MP_ROM_QSTR(MP_QSTR_PC27), MP_ROM_PTR(&pin_P2_27) }, - { MP_ROM_QSTR(MP_QSTR_PC28), MP_ROM_PTR(&pin_P2_28) }, - { MP_ROM_QSTR(MP_QSTR_PC29), MP_ROM_PTR(&pin_P2_29) }, - { MP_ROM_QSTR(MP_QSTR_PC30), MP_ROM_PTR(&pin_P2_30) }, - { MP_ROM_QSTR(MP_QSTR_PC31), MP_ROM_PTR(&pin_P2_31) }, + { MP_ROM_QSTR(MP_QSTR_P2_00), MP_ROM_PTR(&pin_P2_00) }, + { MP_ROM_QSTR(MP_QSTR_P2_01), MP_ROM_PTR(&pin_P2_01) }, + { MP_ROM_QSTR(MP_QSTR_P2_02), MP_ROM_PTR(&pin_P2_02) }, + { MP_ROM_QSTR(MP_QSTR_P2_03), MP_ROM_PTR(&pin_P2_03) }, + { MP_ROM_QSTR(MP_QSTR_P2_04), MP_ROM_PTR(&pin_P2_04) }, + { MP_ROM_QSTR(MP_QSTR_P2_05), MP_ROM_PTR(&pin_P2_05) }, + { MP_ROM_QSTR(MP_QSTR_P2_06), MP_ROM_PTR(&pin_P2_06) }, + { MP_ROM_QSTR(MP_QSTR_P2_07), MP_ROM_PTR(&pin_P2_07) }, + { MP_ROM_QSTR(MP_QSTR_P2_08), MP_ROM_PTR(&pin_P2_08) }, + { MP_ROM_QSTR(MP_QSTR_P2_09), MP_ROM_PTR(&pin_P2_09) }, + { MP_ROM_QSTR(MP_QSTR_P2_10), MP_ROM_PTR(&pin_P2_10) }, + { MP_ROM_QSTR(MP_QSTR_P2_11), MP_ROM_PTR(&pin_P2_11) }, + { MP_ROM_QSTR(MP_QSTR_P2_12), MP_ROM_PTR(&pin_P2_12) }, + { MP_ROM_QSTR(MP_QSTR_P2_13), MP_ROM_PTR(&pin_P2_13) }, + { MP_ROM_QSTR(MP_QSTR_P2_14), MP_ROM_PTR(&pin_P2_14) }, + { MP_ROM_QSTR(MP_QSTR_P2_15), MP_ROM_PTR(&pin_P2_15) }, + { MP_ROM_QSTR(MP_QSTR_P2_16), MP_ROM_PTR(&pin_P2_16) }, + { MP_ROM_QSTR(MP_QSTR_P2_17), MP_ROM_PTR(&pin_P2_17) }, + { MP_ROM_QSTR(MP_QSTR_P2_18), MP_ROM_PTR(&pin_P2_18) }, + { MP_ROM_QSTR(MP_QSTR_P2_19), MP_ROM_PTR(&pin_P2_19) }, + { MP_ROM_QSTR(MP_QSTR_P2_20), MP_ROM_PTR(&pin_P2_20) }, + { MP_ROM_QSTR(MP_QSTR_P2_21), MP_ROM_PTR(&pin_P2_21) }, + { MP_ROM_QSTR(MP_QSTR_P2_22), MP_ROM_PTR(&pin_P2_22) }, + { MP_ROM_QSTR(MP_QSTR_P2_23), MP_ROM_PTR(&pin_P2_23) }, + { MP_ROM_QSTR(MP_QSTR_P2_24), MP_ROM_PTR(&pin_P2_24) }, + { MP_ROM_QSTR(MP_QSTR_P2_25), MP_ROM_PTR(&pin_P2_25) }, + { MP_ROM_QSTR(MP_QSTR_P2_26), MP_ROM_PTR(&pin_P2_26) }, + { MP_ROM_QSTR(MP_QSTR_P2_27), MP_ROM_PTR(&pin_P2_27) }, + { MP_ROM_QSTR(MP_QSTR_P2_28), MP_ROM_PTR(&pin_P2_28) }, + { MP_ROM_QSTR(MP_QSTR_P2_29), MP_ROM_PTR(&pin_P2_29) }, + { MP_ROM_QSTR(MP_QSTR_P2_30), MP_ROM_PTR(&pin_P2_30) }, + { MP_ROM_QSTR(MP_QSTR_P2_31), MP_ROM_PTR(&pin_P2_31) }, //P3 - { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_P3_00) }, - { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_P3_01) }, - { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_P3_02) }, - { MP_ROM_QSTR(MP_QSTR_PD03), MP_ROM_PTR(&pin_P3_03) }, - { MP_ROM_QSTR(MP_QSTR_PD04), MP_ROM_PTR(&pin_P3_04) }, - { MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_P3_05) }, - { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_P3_06) }, - { MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_P3_07) }, - { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_P3_08) }, - { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_P3_09) }, + { MP_ROM_QSTR(MP_QSTR_P3_00), MP_ROM_PTR(&pin_P3_00) }, + { MP_ROM_QSTR(MP_QSTR_P3_01), MP_ROM_PTR(&pin_P3_01) }, + { MP_ROM_QSTR(MP_QSTR_P3_02), MP_ROM_PTR(&pin_P3_02) }, + { MP_ROM_QSTR(MP_QSTR_P3_03), MP_ROM_PTR(&pin_P3_03) }, + { MP_ROM_QSTR(MP_QSTR_P3_04), MP_ROM_PTR(&pin_P3_04) }, + { MP_ROM_QSTR(MP_QSTR_P3_05), MP_ROM_PTR(&pin_P3_05) }, + { MP_ROM_QSTR(MP_QSTR_P3_06), MP_ROM_PTR(&pin_P3_06) }, + { MP_ROM_QSTR(MP_QSTR_P3_07), MP_ROM_PTR(&pin_P3_07) }, + { MP_ROM_QSTR(MP_QSTR_P3_08), MP_ROM_PTR(&pin_P3_08) }, + { MP_ROM_QSTR(MP_QSTR_P3_09), MP_ROM_PTR(&pin_P3_09) }, //P4 - { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_P4_00) }, - { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_P4_01) }, + { MP_ROM_QSTR(MP_QSTR_P4_00), MP_ROM_PTR(&pin_P4_00) }, + { MP_ROM_QSTR(MP_QSTR_P4_01), MP_ROM_PTR(&pin_P4_01) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/analog/common-hal/digitalio/DigitalInOut.c b/ports/analog/common-hal/digitalio/DigitalInOut.c new file mode 100644 index 000000000000..59a242239e0d --- /dev/null +++ b/ports/analog/common-hal/digitalio/DigitalInOut.c @@ -0,0 +1,201 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc +// +// SPDX-License-Identifier: MIT + +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/microcontroller/Pin.h" + +#include "gpio_reva.h" + +extern mxc_gpio_regs_t* gpio_ports[NUM_GPIO_PORTS]; + +void common_hal_digitalio_digitalinout_never_reset( + digitalio_digitalinout_obj_t *self) { + common_hal_never_reset_pin(self->pin); +} + +bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t *self) { + return self->pin == NULL; +} + +digitalinout_result_t common_hal_digitalio_digitalinout_construct( + digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) { + + common_hal_mcu_pin_claim(pin); + self->pin = pin; + + mxc_gpio_cfg_t new_gpio_cfg = { + .port = gpio_ports[self->pin->port], + .mask = (self->pin->mask), + .vssel = self->pin->level, + .func = MXC_GPIO_FUNC_IN, + .drvstr = MXC_GPIO_DRVSTR_0, + .pad = MXC_GPIO_PAD_NONE, + }; + MXC_GPIO_Config(&new_gpio_cfg); + + return DIGITALINOUT_OK; +} + +void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self) { + if (common_hal_digitalio_digitalinout_deinited(self)) { + return; + } + + reset_pin_number(self->pin->port, self->pin->mask); + self->pin = NULL; +} + +digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_input( + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) +{ + mxc_gpio_regs_t* port = gpio_ports[self->pin->port]; + uint32_t mask = self->pin->mask; + + MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_IN, mask); + return common_hal_digitalio_digitalinout_set_pull(self, pull); +} + +digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( + digitalio_digitalinout_obj_t *self, bool value, + digitalio_drive_mode_t drive_mode) +{ + mxc_gpio_regs_t* port = gpio_ports[self->pin->port]; + uint32_t mask = self->pin->mask; + + MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_OUT, mask); + common_hal_digitalio_digitalinout_set_value(self, value); + + // todo (low): MSDK Hardware does not support open-drain configuration except + // todo (low): when directly managed by a peripheral such as I2C. + // todo (low): find a way to signal this perhaps to any upstream code + if (drive_mode != DRIVE_MODE_PUSH_PULL) { + return DIGITALINOUT_OK; + } + return DIGITALINOUT_OK; +} + +digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( + digitalio_digitalinout_obj_t *self) { + + mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; + uint32_t mask = self->pin->mask; + + // Check that I/O mode is enabled and we don't have in AND out on at the same time + MP_STATIC_ASSERT(!( (port->en0 & mask) && (port->inen & mask) && (port->outen & mask) )); + + if ( (port->en0 & mask) && (port->outen & mask) ) + { + return DIRECTION_OUTPUT; + } + else if ( (port->en0 & mask) && (port->inen & mask) ) + { + return DIRECTION_INPUT; + } + + // do not try to drive a pin which has an odd configuration here + else return DIRECTION_INPUT; +} + +void common_hal_digitalio_digitalinout_set_value( + digitalio_digitalinout_obj_t *self, bool value) +{ + digitalio_direction_t dir = + common_hal_digitalio_digitalinout_get_direction(self); + + mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; + uint32_t mask = self->pin->mask; + + if (dir == DIRECTION_OUTPUT) { + if (value == true) { + MXC_GPIO_OutSet(port, mask); + } + else { + MXC_GPIO_OutClr(port, mask); + } + } +} + +bool common_hal_digitalio_digitalinout_get_value(digitalio_digitalinout_obj_t *self) +{ + digitalio_direction_t dir = + common_hal_digitalio_digitalinout_get_direction(self); + + mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; + uint32_t mask = self->pin->mask; + + if (dir == DIRECTION_INPUT) { + return (MXC_GPIO_InGet(port, mask)); + } + else { + return ( (port->out & mask) == true); + } +} + +digitalinout_result_t common_hal_digitalio_digitalinout_set_drive_mode( + digitalio_digitalinout_obj_t *self, digitalio_drive_mode_t drive_mode) { + + // On MAX32, drive mode is not configurable + // and should always be push-pull unless managed by a peripheral like I2C + return DIGITALINOUT_OK; +} + +digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( + digitalio_digitalinout_obj_t *self) { + return DRIVE_MODE_PUSH_PULL; +} + +digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + + mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; + uint32_t mask = self->pin->mask; + + if ( (port->en0 & mask) && (port->inen & mask) ) { + // PULL_NONE, PULL_UP, or PULL_DOWN + switch (pull) { + case PULL_NONE: + port->padctrl0 &= ~(mask); + port->padctrl1 &= ~(mask); + break; + case PULL_UP: + port->padctrl0 |= mask; + port->padctrl1 &= ~(mask); + break; + case PULL_DOWN: + port->padctrl0 &= ~(mask); + port->padctrl1 |= mask; + break; + default: + break; + } + return DIGITALINOUT_OK; + } + else { + return DIGITALINOUT_PIN_BUSY; + } +} + +digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( + digitalio_digitalinout_obj_t *self) { + + bool pin_padctrl0 = (gpio_ports[self->pin->port]->padctrl0) & ( self->pin->mask); + bool pin_padctrl1 = (gpio_ports[self->pin->port]->padctrl1) & ( self->pin->mask); + + if ( (pin_padctrl0) && !(pin_padctrl1) ) { + return PULL_UP; + } + else if ( !(pin_padctrl0) && pin_padctrl1 ) { + return PULL_DOWN; + } + else if ( !(pin_padctrl0) && !(pin_padctrl1) ) { + return PULL_NONE; + } + + // Shouldn't happen, (value 0b11 is reserved) + else { + return PULL_NONE; + } +} diff --git a/ports/analog/common-hal/digitalio/DigitalInOut.h b/ports/analog/common-hal/digitalio/DigitalInOut.h new file mode 100644 index 000000000000..f58b23832b19 --- /dev/null +++ b/ports/analog/common-hal/digitalio/DigitalInOut.h @@ -0,0 +1,15 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2019 Lucian Copeland for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#pragma once + +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; +} digitalio_digitalinout_obj_t; diff --git a/ports/analog/common-hal/digitalio/__init__.c b/ports/analog/common-hal/digitalio/__init__.c new file mode 100644 index 000000000000..fa222ed01f03 --- /dev/null +++ b/ports/analog/common-hal/digitalio/__init__.c @@ -0,0 +1,7 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Adafruit Industries LLC +// +// SPDX-License-Identifier: MIT + +// No digitalio module functions. diff --git a/ports/analog/common-hal/microcontroller/Pin.c b/ports/analog/common-hal/microcontroller/Pin.c index 65949045cdcc..7259c0effe8a 100644 --- a/ports/analog/common-hal/microcontroller/Pin.c +++ b/ports/analog/common-hal/microcontroller/Pin.c @@ -11,17 +11,20 @@ #include "pins.h" #include "mxc_sys.h" -#include "max32690.h" #include "gpio.h" #include "gpio_regs.h" -// Structs to represent GPIO ports & valid pins/pads +#include "common-hal/microcontroller/Pin.h" + +static uint32_t claimed_pins[NUM_GPIO_PORTS]; + +// todo (low): try moving this to an extern in the board support #ifdef MAX32690 -// todo: special constraints are applied to GPIO4 for MAX32690. Tend to these later (low prior) -static mxc_gpio_regs_t* ports[NUM_GPIO_PORTS] = { MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3}; +#include "max32690.h" +mxc_gpio_regs_t* gpio_ports[NUM_GPIO_PORTS] = + {MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3, MXC_GPIO4}; #endif -static uint32_t claimed_pins[NUM_GPIO_PORTS]; static uint32_t never_reset_pins[NUM_GPIO_PORTS]; #define INVALID_PIN 0xFF // id for invalid pin @@ -48,25 +51,25 @@ void reset_pin_number(uint8_t pin_port, uint8_t pin_pad) { /** START: RESET LOGIC for GPIOs */ // Switch to I/O mode first - ports[pin_port]->en0_set = mask; + gpio_ports[pin_port]->en0_set = mask; // set GPIO configuration enable bits to I/O - ports[pin_port]->en0_clr = mask; - ports[pin_port]->en1_clr = mask; - ports[pin_port]->en2_clr = mask; + gpio_ports[pin_port]->en0_clr = mask; + gpio_ports[pin_port]->en1_clr = mask; + gpio_ports[pin_port]->en2_clr = mask; // enable input mode GPIOn_INEN.pin = 1 - ports[pin_port]->inen |= mask; + gpio_ports[pin_port]->inen |= mask; // High Impedance mode enable (GPIOn_PADCTRL1 = 0, _PADCTRL0 = 0), pu/pd disable - ports[pin_port]->padctrl0 &= ~mask; - ports[pin_port]->padctrl1 &= ~mask; + gpio_ports[pin_port]->padctrl0 &= ~mask; + gpio_ports[pin_port]->padctrl1 &= ~mask; // Output mode disable GPIOn_OUTEN = 0 - ports[pin_port]->outen |= mask; + gpio_ports[pin_port]->outen |= mask; // Interrupt disable GPIOn_INTEN = 0 - ports[pin_port]->inten &= ~mask; + gpio_ports[pin_port]->inten &= ~mask; /** END: RESET LOGIC for GPIOs */ } @@ -77,22 +80,22 @@ uint8_t common_hal_mcu_pin_number(const mcu_pin_obj_t *pin) { // most max32 gpio ports have 32 pins // todo: create a struct to encode # of pins for each port, since some GPIO ports differ - return pin->port * 32 + pin->pad; + return pin->port * 32 + pin->mask; } bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { if (pin == NULL) { return true; } - return !(claimed_pins[pin->port] & (pin->pad)); + return !(claimed_pins[pin->port] & (pin->mask)); } void common_hal_never_reset_pin(const mcu_pin_obj_t *pin) { - if ((pin != NULL) && (pin->pad != INVALID_PIN)) { - never_reset_pins[pin->port] |= (1 << pin->pad); + if ((pin != NULL) && (pin->mask != INVALID_PIN)) { + never_reset_pins[pin->port] |= (1 << pin->mask); // any never reset pin must also be claimed - claimed_pins[pin->port] |= (1 << pin->pad); + claimed_pins[pin->port] |= (1 << pin->mask); } } @@ -101,14 +104,14 @@ void common_hal_reset_pin(const mcu_pin_obj_t *pin) { return; } - reset_pin_number(pin->port, pin->pad); + reset_pin_number(pin->port, pin->mask); } void common_hal_mcu_pin_claim(const mcu_pin_obj_t *pin) { if (pin == NULL) { return; } - claimed_pins[pin->port] |= (1 << pin->pad); + claimed_pins[pin->port] |= (1 << pin->mask); } void common_hal_mcu_pin_reset_number(uint8_t pin_no) { diff --git a/ports/analog/common-hal/microcontroller/__init__.c b/ports/analog/common-hal/microcontroller/__init__.c index bbdb686195ca..207ddbe52f37 100644 --- a/ports/analog/common-hal/microcontroller/__init__.c +++ b/ports/analog/common-hal/microcontroller/__init__.c @@ -1,10 +1,10 @@ // This file is part of the CircuitPython project: https://circuitpython.org // -// SPDX-FileCopyrightText: Copyright (c) 2016 Scott Shawcroft for Adafruit Industries -// SPDX-FileCopyrightText: Copyright (c) 2019 Lucian Copeland for Adafruit Industries -// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc +// SP3_X-FileCopyrightText: Copyright (c) 2016 Scott Shawcroft for Adafruit Industries +// SP3_X-FileCopyrightText: Copyright (c) 2019 Lucian Copeland for Adafruit Industries +// SP3_X-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc // -// SPDX-License-Identifier: MIT +// SP3_X-License-Identifier: MIT #include "py/mphal.h" #include "py/obj.h" @@ -89,306 +89,306 @@ const mcu_processor_obj_t common_hal_mcu_processor_obj = { // This maps MCU pin names to pin objects. static const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { - #if defined(PIN_PA01) && !defined(IGNORE_PIN_PA01) - { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + #if defined(PIN_P0_01) && !defined(IGNORE_PIN_P0_01) + { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, #endif - #if defined(PIN_PA02) && !defined(IGNORE_PIN_PA02) - { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + #if defined(PIN_P0_02) && !defined(IGNORE_PIN_P0_02) + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, #endif - #if defined(PIN_PA03) && !defined(IGNORE_PIN_PA03) - { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + #if defined(PIN_P0_03) && !defined(IGNORE_PIN_P0_03) + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, #endif - #if defined(PIN_PA04) && !defined(IGNORE_PIN_PA04) - { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + #if defined(PIN_P0_04) && !defined(IGNORE_PIN_P0_04) + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, #endif - #if defined(PIN_PA05) && !defined(IGNORE_PIN_PA05) - { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + #if defined(PIN_P0_05) && !defined(IGNORE_PIN_P0_05) + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, #endif - #if defined(PIN_PA06) && !defined(IGNORE_PIN_PA06) - { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + #if defined(PIN_P0_06) && !defined(IGNORE_PIN_P0_06) + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, #endif - #if defined(PIN_PA07) && !defined(IGNORE_PIN_PA07) - { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + #if defined(PIN_P0_07) && !defined(IGNORE_PIN_P0_07) + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, #endif - #if defined(PIN_PA08) && !defined(IGNORE_PIN_PA08) - { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + #if defined(PIN_P0_08) && !defined(IGNORE_PIN_P0_08) + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, #endif - #if defined(PIN_PA09) && !defined(IGNORE_PIN_PA09) - { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + #if defined(PIN_P0_09) && !defined(IGNORE_PIN_P0_09) + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, #endif - #if defined(PIN_PA10) && !defined(IGNORE_PIN_PA10) - { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + #if defined(PIN_P0_10) && !defined(IGNORE_PIN_P0_10) + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, #endif - #if defined(PIN_PA11) && !defined(IGNORE_PIN_PA11) - { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, + #if defined(PIN_P0_11) && !defined(IGNORE_PIN_P0_11) + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, #endif - #if defined(PIN_PA12) && !defined(IGNORE_PIN_PA12) - { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, + #if defined(PIN_P0_12) && !defined(IGNORE_PIN_P0_12) + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, #endif - #if defined(PIN_PA13) && !defined(IGNORE_PIN_PA13) - { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + #if defined(PIN_P0_13) && !defined(IGNORE_PIN_P0_13) + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, #endif - #if defined(PIN_PA14) && !defined(IGNORE_PIN_PA14) - { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + #if defined(PIN_P0_14) && !defined(IGNORE_PIN_P0_14) + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, #endif - #if defined(PIN_PA15) && !defined(IGNORE_PIN_PA15) - { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + #if defined(PIN_P0_15) && !defined(IGNORE_PIN_P0_15) + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, #endif - #if defined(PIN_PA16) && !defined(IGNORE_PIN_PA16) - { MP_ROM_QSTR(MP_QSTR_PA16), MP_ROM_PTR(&pin_PA16) }, + #if defined(PIN_P0_16) && !defined(IGNORE_PIN_P0_16) + { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, #endif - #if defined(PIN_PA17) && !defined(IGNORE_PIN_PA17) - { MP_ROM_QSTR(MP_QSTR_PA17), MP_ROM_PTR(&pin_PA17) }, + #if defined(PIN_P0_17) && !defined(IGNORE_PIN_P0_17) + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, #endif - #if defined(PIN_PA18) && !defined(IGNORE_PIN_PA18) - { MP_ROM_QSTR(MP_QSTR_PA18), MP_ROM_PTR(&pin_PA18) }, + #if defined(PIN_P0_18) && !defined(IGNORE_PIN_P0_18) + { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, #endif - #if defined(PIN_PA19) && !defined(IGNORE_PIN_PA19) - { MP_ROM_QSTR(MP_QSTR_PA19), MP_ROM_PTR(&pin_PA19) }, + #if defined(PIN_P0_19) && !defined(IGNORE_PIN_P0_19) + { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, #endif - #if defined(PIN_PA20) && !defined(IGNORE_PIN_PA20) - { MP_ROM_QSTR(MP_QSTR_PA20), MP_ROM_PTR(&pin_PA20) }, + #if defined(PIN_P0_20) && !defined(IGNORE_PIN_P0_20) + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, #endif - #if defined(PIN_PA21) && !defined(IGNORE_PIN_PA21) - { MP_ROM_QSTR(MP_QSTR_PA21), MP_ROM_PTR(&pin_PA21) }, + #if defined(PIN_P0_21) && !defined(IGNORE_PIN_P0_21) + { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, #endif - #if defined(PIN_PA22) && !defined(IGNORE_PIN_PA22) - { MP_ROM_QSTR(MP_QSTR_PA22), MP_ROM_PTR(&pin_PA22) }, + #if defined(PIN_P0_22) && !defined(IGNORE_PIN_P0_22) + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, #endif - #if defined(PIN_PA23) && !defined(IGNORE_PIN_PA23) - { MP_ROM_QSTR(MP_QSTR_PA23), MP_ROM_PTR(&pin_PA23) }, + #if defined(PIN_P0_23) && !defined(IGNORE_PIN_P0_23) + { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, #endif - #if defined(PIN_PA24) && !defined(IGNORE_PIN_PA24) - { MP_ROM_QSTR(MP_QSTR_PA24), MP_ROM_PTR(&pin_PA24) }, + #if defined(PIN_P0_24) && !defined(IGNORE_PIN_P0_24) + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, #endif - #if defined(PIN_PA25) && !defined(IGNORE_PIN_PA25) - { MP_ROM_QSTR(MP_QSTR_PA25), MP_ROM_PTR(&pin_PA25) }, + #if defined(PIN_P0_25) && !defined(IGNORE_PIN_P0_25) + { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, #endif - #if defined(PIN_PA27) && !defined(IGNORE_PIN_PA27) - { MP_ROM_QSTR(MP_QSTR_PA27), MP_ROM_PTR(&pin_PA27) }, + #if defined(PIN_P0_27) && !defined(IGNORE_PIN_P0_27) + { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_27) }, #endif - #if defined(PIN_PA28) && !defined(IGNORE_PIN_PA28) - { MP_ROM_QSTR(MP_QSTR_PA28), MP_ROM_PTR(&pin_PA28) }, + #if defined(PIN_P0_28) && !defined(IGNORE_PIN_P0_28) + { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, #endif - #if defined(PIN_PA30) && !defined(IGNORE_PIN_PA30) - { MP_ROM_QSTR(MP_QSTR_PA30), MP_ROM_PTR(&pin_PA30) }, + #if defined(PIN_P0_30) && !defined(IGNORE_PIN_P0_30) + { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, #endif - #if defined(PIN_PA31) && !defined(IGNORE_PIN_PA31) - { MP_ROM_QSTR(MP_QSTR_PA31), MP_ROM_PTR(&pin_PA31) }, + #if defined(PIN_P0_31) && !defined(IGNORE_PIN_P0_31) + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, #endif - #if defined(PIN_PB01) && !defined(IGNORE_PIN_PB01) - { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + #if defined(PIN_P1_01) && !defined(IGNORE_PIN_P1_01) + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, #endif - #if defined(PIN_PB02) && !defined(IGNORE_PIN_PB02) - { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, + #if defined(PIN_P1_02) && !defined(IGNORE_PIN_P1_02) + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, #endif - #if defined(PIN_PB03) && !defined(IGNORE_PIN_PB03) - { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + #if defined(PIN_P1_03) && !defined(IGNORE_PIN_P1_03) + { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, #endif - #if defined(PIN_PB04) && !defined(IGNORE_PIN_PB04) - { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + #if defined(PIN_P1_04) && !defined(IGNORE_PIN_P1_04) + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, #endif - #if defined(PIN_PB05) && !defined(IGNORE_PIN_PB05) - { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + #if defined(PIN_P1_05) && !defined(IGNORE_PIN_P1_05) + { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, #endif - #if defined(PIN_PB06) && !defined(IGNORE_PIN_PB06) - { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + #if defined(PIN_P1_06) && !defined(IGNORE_PIN_P1_06) + { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, #endif - #if defined(PIN_PB07) && !defined(IGNORE_PIN_PB07) - { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + #if defined(PIN_P1_07) && !defined(IGNORE_PIN_P1_07) + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, #endif - #if defined(PIN_PB08) && !defined(IGNORE_PIN_PB08) - { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + #if defined(PIN_P1_08) && !defined(IGNORE_PIN_P1_08) + { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, #endif - #if defined(PIN_PB09) && !defined(IGNORE_PIN_PB09) - { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + #if defined(PIN_P1_09) && !defined(IGNORE_PIN_P1_09) + { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, #endif - #if defined(PIN_PB10) && !defined(IGNORE_PIN_PB10) - { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, + #if defined(PIN_P1_10) && !defined(IGNORE_PIN_P1_10) + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, #endif - #if defined(PIN_PB11) && !defined(IGNORE_PIN_PB11) - { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, + #if defined(PIN_P1_11) && !defined(IGNORE_PIN_P1_11) + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, #endif - #if defined(PIN_PB12) && !defined(IGNORE_PIN_PB12) - { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + #if defined(PIN_P1_12) && !defined(IGNORE_PIN_P1_12) + { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, #endif - #if defined(PIN_PB13) && !defined(IGNORE_PIN_PB13) - { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + #if defined(PIN_P1_13) && !defined(IGNORE_PIN_P1_13) + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, #endif - #if defined(PIN_PB14) && !defined(IGNORE_PIN_PB14) - { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + #if defined(PIN_P1_14) && !defined(IGNORE_PIN_P1_14) + { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) }, #endif - #if defined(PIN_PB15) && !defined(IGNORE_PIN_PB15) - { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + #if defined(PIN_P1_15) && !defined(IGNORE_PIN_P1_15) + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, #endif - #if defined(PIN_PB16) && !defined(IGNORE_PIN_PB16) - { MP_ROM_QSTR(MP_QSTR_PB16), MP_ROM_PTR(&pin_PB16) }, + #if defined(PIN_P1_16) && !defined(IGNORE_PIN_P1_16) + { MP_ROM_QSTR(MP_QSTR_P1_16), MP_ROM_PTR(&pin_P1_16) }, #endif - #if defined(PIN_PB17) && !defined(IGNORE_PIN_PB17) - { MP_ROM_QSTR(MP_QSTR_PB17), MP_ROM_PTR(&pin_PB17) }, + #if defined(PIN_P1_17) && !defined(IGNORE_PIN_P1_17) + { MP_ROM_QSTR(MP_QSTR_P1_17), MP_ROM_PTR(&pin_P1_17) }, #endif - #if defined(PIN_PB18) && !defined(IGNORE_PIN_PB18) - { MP_ROM_QSTR(MP_QSTR_PB18), MP_ROM_PTR(&pin_PB18) }, + #if defined(PIN_P1_18) && !defined(IGNORE_PIN_P1_18) + { MP_ROM_QSTR(MP_QSTR_P1_18), MP_ROM_PTR(&pin_P1_18) }, #endif - #if defined(PIN_PB19) && !defined(IGNORE_PIN_PB19) - { MP_ROM_QSTR(MP_QSTR_PB19), MP_ROM_PTR(&pin_PB19) }, + #if defined(PIN_P1_19) && !defined(IGNORE_PIN_P1_19) + { MP_ROM_QSTR(MP_QSTR_P1_19), MP_ROM_PTR(&pin_P1_19) }, #endif - #if defined(PIN_PB20) && !defined(IGNORE_PIN_PB20) - { MP_ROM_QSTR(MP_QSTR_PB20), MP_ROM_PTR(&pin_PB20) }, + #if defined(PIN_P1_20) && !defined(IGNORE_PIN_P1_20) + { MP_ROM_QSTR(MP_QSTR_P1_20), MP_ROM_PTR(&pin_P1_20) }, #endif - #if defined(PIN_PB21) && !defined(IGNORE_PIN_PB21) - { MP_ROM_QSTR(MP_QSTR_PB21), MP_ROM_PTR(&pin_PB21) }, + #if defined(PIN_P1_21) && !defined(IGNORE_PIN_P1_21) + { MP_ROM_QSTR(MP_QSTR_P1_21), MP_ROM_PTR(&pin_P1_21) }, #endif - #if defined(PIN_PB22) && !defined(IGNORE_PIN_PB22) - { MP_ROM_QSTR(MP_QSTR_PB22), MP_ROM_PTR(&pin_PB22) }, + #if defined(PIN_P1_22) && !defined(IGNORE_PIN_P1_22) + { MP_ROM_QSTR(MP_QSTR_P1_22), MP_ROM_PTR(&pin_P1_22) }, #endif - #if defined(PIN_PB23) && !defined(IGNORE_PIN_PB23) - { MP_ROM_QSTR(MP_QSTR_PB23), MP_ROM_PTR(&pin_PB23) }, + #if defined(PIN_P1_23) && !defined(IGNORE_PIN_P1_23) + { MP_ROM_QSTR(MP_QSTR_P1_23), MP_ROM_PTR(&pin_P1_23) }, #endif - #if defined(PIN_PB24) && !defined(IGNORE_PIN_PB24) - { MP_ROM_QSTR(MP_QSTR_PB24), MP_ROM_PTR(&pin_PB24) }, + #if defined(PIN_P1_24) && !defined(IGNORE_PIN_P1_24) + { MP_ROM_QSTR(MP_QSTR_P1_24), MP_ROM_PTR(&pin_P1_24) }, #endif - #if defined(PIN_PB25) && !defined(IGNORE_PIN_PB25) - { MP_ROM_QSTR(MP_QSTR_PB25), MP_ROM_PTR(&pin_PB25) }, + #if defined(PIN_P1_25) && !defined(IGNORE_PIN_P1_25) + { MP_ROM_QSTR(MP_QSTR_P1_25), MP_ROM_PTR(&pin_P1_25) }, #endif - #if defined(PIN_PB26) && !defined(IGNORE_PIN_PB26) - { MP_ROM_QSTR(MP_QSTR_PB26), MP_ROM_PTR(&pin_PB26) }, + #if defined(PIN_P1_26) && !defined(IGNORE_PIN_P1_26) + { MP_ROM_QSTR(MP_QSTR_P1_26), MP_ROM_PTR(&pin_P1_26) }, #endif - #if defined(PIN_PB27) && !defined(IGNORE_PIN_PB27) - { MP_ROM_QSTR(MP_QSTR_PB27), MP_ROM_PTR(&pin_PB27) }, + #if defined(PIN_P1_27) && !defined(IGNORE_PIN_P1_27) + { MP_ROM_QSTR(MP_QSTR_P1_27), MP_ROM_PTR(&pin_P1_27) }, #endif - #if defined(PIN_PB28) && !defined(IGNORE_PIN_PB28) - { MP_ROM_QSTR(MP_QSTR_PB28), MP_ROM_PTR(&pin_PB28) }, + #if defined(PIN_P1_28) && !defined(IGNORE_PIN_P1_28) + { MP_ROM_QSTR(MP_QSTR_P1_28), MP_ROM_PTR(&pin_P1_28) }, #endif - #if defined(PIN_PB29) && !defined(IGNORE_PIN_PB29) - { MP_ROM_QSTR(MP_QSTR_PB29), MP_ROM_PTR(&pin_PB29) }, + #if defined(PIN_P1_29) && !defined(IGNORE_PIN_P1_29) + { MP_ROM_QSTR(MP_QSTR_P1_29), MP_ROM_PTR(&pin_P1_29) }, #endif - #if defined(PIN_PB30) && !defined(IGNORE_PIN_PB30) - { MP_ROM_QSTR(MP_QSTR_PB30), MP_ROM_PTR(&pin_PB30) }, + #if defined(PIN_P1_30) && !defined(IGNORE_PIN_P1_30) + { MP_ROM_QSTR(MP_QSTR_P1_30), MP_ROM_PTR(&pin_P1_30) }, #endif - #if defined(PIN_PB31) && !defined(IGNORE_PIN_PB31) - { MP_ROM_QSTR(MP_QSTR_PB31), MP_ROM_PTR(&pin_PB31) }, + #if defined(PIN_P1_31) && !defined(IGNORE_PIN_P1_31) + { MP_ROM_QSTR(MP_QSTR_P1_31), MP_ROM_PTR(&pin_P1_31) }, #endif - #if defined(PIN_PC01) && !defined(IGNORE_PIN_PC01) - { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + #if defined(PIN_P2_01) && !defined(IGNORE_PIN_P2_01) + { MP_ROM_QSTR(MP_QSTR_P2_01), MP_ROM_PTR(&pin_P2_01) }, #endif - #if defined(PIN_PC02) && !defined(IGNORE_PIN_PC02) - { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + #if defined(PIN_P2_02) && !defined(IGNORE_PIN_P2_02) + { MP_ROM_QSTR(MP_QSTR_P2_02), MP_ROM_PTR(&pin_P2_02) }, #endif - #if defined(PIN_PC03) && !defined(IGNORE_PIN_PC03) - { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + #if defined(PIN_P2_03) && !defined(IGNORE_PIN_P2_03) + { MP_ROM_QSTR(MP_QSTR_P2_03), MP_ROM_PTR(&pin_P2_03) }, #endif - #if defined(PIN_PC04) && !defined(IGNORE_PIN_PC04) - { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + #if defined(PIN_P2_04) && !defined(IGNORE_PIN_P2_04) + { MP_ROM_QSTR(MP_QSTR_P2_04), MP_ROM_PTR(&pin_P2_04) }, #endif - #if defined(PIN_PC05) && !defined(IGNORE_PIN_PC05) - { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + #if defined(PIN_P2_05) && !defined(IGNORE_PIN_P2_05) + { MP_ROM_QSTR(MP_QSTR_P2_05), MP_ROM_PTR(&pin_P2_05) }, #endif - #if defined(PIN_PC06) && !defined(IGNORE_PIN_PC06) - { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + #if defined(PIN_P2_06) && !defined(IGNORE_PIN_P2_06) + { MP_ROM_QSTR(MP_QSTR_P2_06), MP_ROM_PTR(&pin_P2_06) }, #endif - #if defined(PIN_PC07) && !defined(IGNORE_PIN_PC07) - { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + #if defined(PIN_P2_07) && !defined(IGNORE_PIN_P2_07) + { MP_ROM_QSTR(MP_QSTR_P2_07), MP_ROM_PTR(&pin_P2_07) }, #endif - #if defined(PIN_PC10) && !defined(IGNORE_PIN_PC10) - { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, + #if defined(PIN_P2_10) && !defined(IGNORE_PIN_P2_10) + { MP_ROM_QSTR(MP_QSTR_P2_10), MP_ROM_PTR(&pin_P2_10) }, #endif - #if defined(PIN_PC11) && !defined(IGNORE_PIN_PC11) - { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, + #if defined(PIN_P2_11) && !defined(IGNORE_PIN_P2_11) + { MP_ROM_QSTR(MP_QSTR_P2_11), MP_ROM_PTR(&pin_P2_11) }, #endif - #if defined(PIN_PC12) && !defined(IGNORE_PIN_PC12) - { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, + #if defined(PIN_P2_12) && !defined(IGNORE_PIN_P2_12) + { MP_ROM_QSTR(MP_QSTR_P2_12), MP_ROM_PTR(&pin_P2_12) }, #endif - #if defined(PIN_PC13) && !defined(IGNORE_PIN_PC13) - { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + #if defined(PIN_P2_13) && !defined(IGNORE_PIN_P2_13) + { MP_ROM_QSTR(MP_QSTR_P2_13), MP_ROM_PTR(&pin_P2_13) }, #endif - #if defined(PIN_PC14) && !defined(IGNORE_PIN_PC14) - { MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14) }, + #if defined(PIN_P2_14) && !defined(IGNORE_PIN_P2_14) + { MP_ROM_QSTR(MP_QSTR_P2_14), MP_ROM_PTR(&pin_P2_14) }, #endif - #if defined(PIN_PC15) && !defined(IGNORE_PIN_PC15) - { MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_PC15) }, + #if defined(PIN_P2_15) && !defined(IGNORE_PIN_P2_15) + { MP_ROM_QSTR(MP_QSTR_P2_15), MP_ROM_PTR(&pin_P2_15) }, #endif - #if defined(PIN_PC16) && !defined(IGNORE_PIN_PC16) - { MP_ROM_QSTR(MP_QSTR_PC16), MP_ROM_PTR(&pin_PC16) }, + #if defined(PIN_P2_16) && !defined(IGNORE_PIN_P2_16) + { MP_ROM_QSTR(MP_QSTR_P2_16), MP_ROM_PTR(&pin_P2_16) }, #endif - #if defined(PIN_PC17) && !defined(IGNORE_PIN_PC17) - { MP_ROM_QSTR(MP_QSTR_PC17), MP_ROM_PTR(&pin_PC17) }, + #if defined(PIN_P2_17) && !defined(IGNORE_PIN_P2_17) + { MP_ROM_QSTR(MP_QSTR_P2_17), MP_ROM_PTR(&pin_P2_17) }, #endif - #if defined(PIN_PC18) && !defined(IGNORE_PIN_PC18) - { MP_ROM_QSTR(MP_QSTR_PC18), MP_ROM_PTR(&pin_PC18) }, + #if defined(PIN_P2_18) && !defined(IGNORE_PIN_P2_18) + { MP_ROM_QSTR(MP_QSTR_P2_18), MP_ROM_PTR(&pin_P2_18) }, #endif - #if defined(PIN_PC19) && !defined(IGNORE_PIN_PC19) - { MP_ROM_QSTR(MP_QSTR_PC19), MP_ROM_PTR(&pin_PC19) }, + #if defined(PIN_P2_19) && !defined(IGNORE_PIN_P2_19) + { MP_ROM_QSTR(MP_QSTR_P2_19), MP_ROM_PTR(&pin_P2_19) }, #endif - #if defined(PIN_PC20) && !defined(IGNORE_PIN_PC20) - { MP_ROM_QSTR(MP_QSTR_PC20), MP_ROM_PTR(&pin_PC20) }, + #if defined(PIN_P2_20) && !defined(IGNORE_PIN_P2_20) + { MP_ROM_QSTR(MP_QSTR_P2_20), MP_ROM_PTR(&pin_P2_20) }, #endif - #if defined(PIN_PC21) && !defined(IGNORE_PIN_PC21) - { MP_ROM_QSTR(MP_QSTR_PC21), MP_ROM_PTR(&pin_PC21) }, + #if defined(PIN_P2_21) && !defined(IGNORE_PIN_P2_21) + { MP_ROM_QSTR(MP_QSTR_P2_21), MP_ROM_PTR(&pin_P2_21) }, #endif - #if defined(PIN_PC22) && !defined(IGNORE_PIN_PC22) - { MP_ROM_QSTR(MP_QSTR_PC22), MP_ROM_PTR(&pin_PC22) }, + #if defined(PIN_P2_22) && !defined(IGNORE_PIN_P2_22) + { MP_ROM_QSTR(MP_QSTR_P2_22), MP_ROM_PTR(&pin_P2_22) }, #endif - #if defined(PIN_PC23) && !defined(IGNORE_PIN_PC23) - { MP_ROM_QSTR(MP_QSTR_PC23), MP_ROM_PTR(&pin_PC23) }, + #if defined(PIN_P2_23) && !defined(IGNORE_PIN_P2_23) + { MP_ROM_QSTR(MP_QSTR_P2_23), MP_ROM_PTR(&pin_P2_23) }, #endif - #if defined(PIN_PC24) && !defined(IGNORE_PIN_PC24) - { MP_ROM_QSTR(MP_QSTR_PC24), MP_ROM_PTR(&pin_PC24) }, + #if defined(PIN_P2_24) && !defined(IGNORE_PIN_P2_24) + { MP_ROM_QSTR(MP_QSTR_P2_24), MP_ROM_PTR(&pin_P2_24) }, #endif - #if defined(PIN_PC25) && !defined(IGNORE_PIN_PC25) - { MP_ROM_QSTR(MP_QSTR_PC25), MP_ROM_PTR(&pin_PC25) }, + #if defined(PIN_P2_25) && !defined(IGNORE_PIN_P2_25) + { MP_ROM_QSTR(MP_QSTR_P2_25), MP_ROM_PTR(&pin_P2_25) }, #endif - #if defined(PIN_PC26) && !defined(IGNORE_PIN_PC26) - { MP_ROM_QSTR(MP_QSTR_PC26), MP_ROM_PTR(&pin_PC26) }, + #if defined(PIN_P2_26) && !defined(IGNORE_PIN_P2_26) + { MP_ROM_QSTR(MP_QSTR_P2_26), MP_ROM_PTR(&pin_P2_26) }, #endif - #if defined(PIN_PC27) && !defined(IGNORE_PIN_PC27) - { MP_ROM_QSTR(MP_QSTR_PC27), MP_ROM_PTR(&pin_PC27) }, + #if defined(PIN_P2_27) && !defined(IGNORE_PIN_P2_27) + { MP_ROM_QSTR(MP_QSTR_P2_27), MP_ROM_PTR(&pin_P2_27) }, #endif - #if defined(PIN_PC28) && !defined(IGNORE_PIN_PC28) - { MP_ROM_QSTR(MP_QSTR_PC28), MP_ROM_PTR(&pin_PC28) }, + #if defined(PIN_P2_28) && !defined(IGNORE_PIN_P2_28) + { MP_ROM_QSTR(MP_QSTR_P2_28), MP_ROM_PTR(&pin_P2_28) }, #endif - #if defined(PIN_PC30) && !defined(IGNORE_PIN_PC30) - { MP_ROM_QSTR(MP_QSTR_PC30), MP_ROM_PTR(&pin_PC30) }, + #if defined(PIN_P2_30) && !defined(IGNORE_PIN_P2_30) + { MP_ROM_QSTR(MP_QSTR_P2_30), MP_ROM_PTR(&pin_P2_30) }, #endif - #if defined(PIN_PC31) && !defined(IGNORE_PIN_PC31) - { MP_ROM_QSTR(MP_QSTR_PC31), MP_ROM_PTR(&pin_PC31) }, + #if defined(PIN_P2_31) && !defined(IGNORE_PIN_P2_31) + { MP_ROM_QSTR(MP_QSTR_P2_31), MP_ROM_PTR(&pin_P2_31) }, #endif - #if defined(PIN_PD01) && !defined(IGNORE_PIN_PD01) - { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, + #if defined(PIN_P3_01) && !defined(IGNORE_PIN_P3_01) + { MP_ROM_QSTR(MP_QSTR_P3_01), MP_ROM_PTR(&pin_P3_01) }, #endif - #if defined(PIN_PD02) && !defined(IGNORE_PIN_PD02) - { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_PD02) }, + #if defined(PIN_P3_02) && !defined(IGNORE_PIN_P3_02) + { MP_ROM_QSTR(MP_QSTR_P3_02), MP_ROM_PTR(&pin_P3_02) }, #endif - #if defined(PIN_PD03) && !defined(IGNORE_PIN_PD03) - { MP_ROM_QSTR(MP_QSTR_PD03), MP_ROM_PTR(&pin_PD03) }, + #if defined(PIN_P3_03) && !defined(IGNORE_PIN_P3_03) + { MP_ROM_QSTR(MP_QSTR_P3_03), MP_ROM_PTR(&pin_P3_03) }, #endif - #if defined(PIN_PD04) && !defined(IGNORE_PIN_PD04) - { MP_ROM_QSTR(MP_QSTR_PD04), MP_ROM_PTR(&pin_PD04) }, + #if defined(PIN_P3_04) && !defined(IGNORE_PIN_P3_04) + { MP_ROM_QSTR(MP_QSTR_P3_04), MP_ROM_PTR(&pin_P3_04) }, #endif - #if defined(PIN_PD05) && !defined(IGNORE_PIN_PD05) - { MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_PD05) }, + #if defined(PIN_P3_05) && !defined(IGNORE_PIN_P3_05) + { MP_ROM_QSTR(MP_QSTR_P3_05), MP_ROM_PTR(&pin_P3_05) }, #endif - #if defined(PIN_PD06) && !defined(IGNORE_PIN_PD06) - { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) }, + #if defined(PIN_P3_06) && !defined(IGNORE_PIN_P3_06) + { MP_ROM_QSTR(MP_QSTR_P3_06), MP_ROM_PTR(&pin_P3_06) }, #endif - #if defined(PIN_PD07) && !defined(IGNORE_PIN_PD07) - { MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_PD07) }, + #if defined(PIN_P3_07) && !defined(IGNORE_PIN_P3_07) + { MP_ROM_QSTR(MP_QSTR_P3_07), MP_ROM_PTR(&pin_P3_07) }, #endif - #if defined(PIN_PD08) && !defined(IGNORE_PIN_PD08) - { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, + #if defined(PIN_P3_08) && !defined(IGNORE_PIN_P3_08) + { MP_ROM_QSTR(MP_QSTR_P3_08), MP_ROM_PTR(&pin_P3_08) }, #endif - #if defined(PIN_PD09) && !defined(IGNORE_PIN_PD09) - { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, + #if defined(PIN_P3_09) && !defined(IGNORE_PIN_P3_09) + { MP_ROM_QSTR(MP_QSTR_P3_09), MP_ROM_PTR(&pin_P3_09) }, #endif - #if defined(PIN_PE01) && !defined(IGNORE_PIN_PE01) - { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD02) }, + #if defined(PIN_P4_01) && !defined(IGNORE_PIN_P4_01) + { MP_ROM_QSTR(MP_QSTR_P4_01), MP_ROM_PTR(&pin_P4_02) }, #endif - #if defined(PIN_PE02) && !defined(IGNORE_PIN_PD02) - { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD02) }, + #if defined(PIN_P4_02) && !defined(IGNORE_PIN_P4_02) + { MP_ROM_QSTR(MP_QSTR_P4_01), MP_ROM_PTR(&pin_P4_02) }, #endif }; diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk index 60b18a5249a2..f2cc8bd7aea0 100644 --- a/ports/analog/mpconfigport.mk +++ b/ports/analog/mpconfigport.mk @@ -22,7 +22,7 @@ INTERNAL_FLASH_FILESYSTEM = 1 # These modules are implemented in ports//common-hal: # Typically the second module to create -CIRCUITPY_DIGITALIO ?= 0 +CIRCUITPY_DIGITALIO ?= 1 # Plan to implement CIRCUITPY_BUSIO ?= 0 diff --git a/ports/analog/peripherals/max32690/pins.c b/ports/analog/peripherals/max32690/pins.c index b6c4e993553b..7550dc549efa 100644 --- a/ports/analog/peripherals/max32690/pins.c +++ b/ports/analog/peripherals/max32690/pins.c @@ -7,119 +7,117 @@ #include "py/obj.h" #include "py/mphal.h" #include "peripherals/pins.h" +#include "max32690.h" -#include "gpio.h" -#include "gpio_regs.h" +const mcu_pin_obj_t pin_P0_00 = PIN(0, 0); +const mcu_pin_obj_t pin_P0_01 = PIN(0, 1); +const mcu_pin_obj_t pin_P0_02 = PIN(0, 2); +const mcu_pin_obj_t pin_P0_03 = PIN(0, 3); +const mcu_pin_obj_t pin_P0_04 = PIN(0, 4); +const mcu_pin_obj_t pin_P0_05 = PIN(0, 5); +const mcu_pin_obj_t pin_P0_06 = PIN(0, 6); +const mcu_pin_obj_t pin_P0_07 = PIN(0, 7); +const mcu_pin_obj_t pin_P0_08 = PIN(0, 8); +const mcu_pin_obj_t pin_P0_09 = PIN(0, 9); +const mcu_pin_obj_t pin_P0_10 = PIN(0, 10); +const mcu_pin_obj_t pin_P0_11 = PIN(0, 11); +const mcu_pin_obj_t pin_P0_12 = PIN(0, 12); +const mcu_pin_obj_t pin_P0_13 = PIN(0, 13); +const mcu_pin_obj_t pin_P0_14 = PIN(0, 14); +const mcu_pin_obj_t pin_P0_15 = PIN(0, 15); +const mcu_pin_obj_t pin_P0_16 = PIN(0, 16); +const mcu_pin_obj_t pin_P0_17 = PIN(0, 17); +const mcu_pin_obj_t pin_P0_18 = PIN(0, 18); +const mcu_pin_obj_t pin_P0_19 = PIN(0, 19); +const mcu_pin_obj_t pin_P0_20 = PIN(0, 20); +const mcu_pin_obj_t pin_P0_21 = PIN(0, 21); +const mcu_pin_obj_t pin_P0_22 = PIN(0, 22); +const mcu_pin_obj_t pin_P0_23 = PIN(0, 23); +const mcu_pin_obj_t pin_P0_24 = PIN(0, 24); +const mcu_pin_obj_t pin_P0_25 = PIN(0, 25); +const mcu_pin_obj_t pin_P0_26 = PIN(0, 26); +const mcu_pin_obj_t pin_P0_27 = PIN(0, 27); +const mcu_pin_obj_t pin_P0_28 = PIN(0, 28); +const mcu_pin_obj_t pin_P0_29 = PIN(0, 29); +const mcu_pin_obj_t pin_P0_30 = PIN(0, 30); +const mcu_pin_obj_t pin_P0_31 = PIN(0, 31); -const mcu_pin_obj_t pin_P0_00 = PIN(MXC_GPIO_PORT_0, 0); -const mcu_pin_obj_t pin_P0_01 = PIN(MXC_GPIO_PORT_0, 1); -const mcu_pin_obj_t pin_P0_02 = PIN(MXC_GPIO_PORT_0, 2); -const mcu_pin_obj_t pin_P0_03 = PIN(MXC_GPIO_PORT_0, 3); -const mcu_pin_obj_t pin_P0_04 = PIN(MXC_GPIO_PORT_0, 4); -const mcu_pin_obj_t pin_P0_05 = PIN(MXC_GPIO_PORT_0, 5); -const mcu_pin_obj_t pin_P0_06 = PIN(MXC_GPIO_PORT_0, 6); -const mcu_pin_obj_t pin_P0_07 = PIN(MXC_GPIO_PORT_0, 7); -const mcu_pin_obj_t pin_P0_08 = PIN(MXC_GPIO_PORT_0, 8); -const mcu_pin_obj_t pin_P0_09 = PIN(MXC_GPIO_PORT_0, 9); -const mcu_pin_obj_t pin_P0_10 = PIN(MXC_GPIO_PORT_0, 10); -const mcu_pin_obj_t pin_P0_11 = PIN(MXC_GPIO_PORT_0, 11); -const mcu_pin_obj_t pin_P0_12 = PIN(MXC_GPIO_PORT_0, 12); -const mcu_pin_obj_t pin_P0_13 = PIN(MXC_GPIO_PORT_0, 13); -const mcu_pin_obj_t pin_P0_14 = PIN(MXC_GPIO_PORT_0, 14); -const mcu_pin_obj_t pin_P0_15 = PIN(MXC_GPIO_PORT_0, 15); -const mcu_pin_obj_t pin_P0_16 = PIN(MXC_GPIO_PORT_0, 16); -const mcu_pin_obj_t pin_P0_17 = PIN(MXC_GPIO_PORT_0, 17); -const mcu_pin_obj_t pin_P0_18 = PIN(MXC_GPIO_PORT_0, 18); -const mcu_pin_obj_t pin_P0_19 = PIN(MXC_GPIO_PORT_0, 19); -const mcu_pin_obj_t pin_P0_20 = PIN(MXC_GPIO_PORT_0, 20); -const mcu_pin_obj_t pin_P0_21 = PIN(MXC_GPIO_PORT_0, 21); -const mcu_pin_obj_t pin_P0_22 = PIN(MXC_GPIO_PORT_0, 22); -const mcu_pin_obj_t pin_P0_23 = PIN(MXC_GPIO_PORT_0, 23); -const mcu_pin_obj_t pin_P0_24 = PIN(MXC_GPIO_PORT_0, 24); -const mcu_pin_obj_t pin_P0_25 = PIN(MXC_GPIO_PORT_0, 25); -const mcu_pin_obj_t pin_P0_26 = PIN(MXC_GPIO_PORT_0, 26); -const mcu_pin_obj_t pin_P0_27 = PIN(MXC_GPIO_PORT_0, 27); -const mcu_pin_obj_t pin_P0_28 = PIN(MXC_GPIO_PORT_0, 28); -const mcu_pin_obj_t pin_P0_29 = PIN(MXC_GPIO_PORT_0, 29); -const mcu_pin_obj_t pin_P0_30 = PIN(MXC_GPIO_PORT_0, 30); -const mcu_pin_obj_t pin_P0_31 = PIN(MXC_GPIO_PORT_0, 31); +const mcu_pin_obj_t pin_P1_00 = PIN(1, 0); +const mcu_pin_obj_t pin_P1_01 = PIN(1, 1); +const mcu_pin_obj_t pin_P1_02 = PIN(1, 2); +const mcu_pin_obj_t pin_P1_03 = PIN(1, 3); +const mcu_pin_obj_t pin_P1_04 = PIN(1, 4); +const mcu_pin_obj_t pin_P1_05 = PIN(1, 5); +const mcu_pin_obj_t pin_P1_06 = PIN(1, 6); +const mcu_pin_obj_t pin_P1_07 = PIN(1, 7); +const mcu_pin_obj_t pin_P1_08 = PIN(1, 8); +const mcu_pin_obj_t pin_P1_09 = PIN(1, 9); +const mcu_pin_obj_t pin_P1_10 = PIN(1, 10); +const mcu_pin_obj_t pin_P1_11 = PIN(1, 11); +const mcu_pin_obj_t pin_P1_12 = PIN(1, 12); +const mcu_pin_obj_t pin_P1_13 = PIN(1, 13); +const mcu_pin_obj_t pin_P1_14 = PIN(1, 14); +const mcu_pin_obj_t pin_P1_15 = PIN(1, 15); +const mcu_pin_obj_t pin_P1_16 = PIN(1, 16); +const mcu_pin_obj_t pin_P1_17 = PIN(1, 17); +const mcu_pin_obj_t pin_P1_18 = PIN(1, 18); +const mcu_pin_obj_t pin_P1_19 = PIN(1, 19); +const mcu_pin_obj_t pin_P1_20 = PIN(1, 20); +const mcu_pin_obj_t pin_P1_21 = PIN(1, 21); +const mcu_pin_obj_t pin_P1_22 = PIN(1, 22); +const mcu_pin_obj_t pin_P1_23 = PIN(1, 23); +const mcu_pin_obj_t pin_P1_24 = PIN(1, 24); +const mcu_pin_obj_t pin_P1_25 = PIN(1, 25); +const mcu_pin_obj_t pin_P1_26 = PIN(1, 26); +const mcu_pin_obj_t pin_P1_27 = PIN(1, 27); +const mcu_pin_obj_t pin_P1_28 = PIN(1, 28); +const mcu_pin_obj_t pin_P1_29 = PIN(1, 29); +const mcu_pin_obj_t pin_P1_30 = PIN(1, 30); +const mcu_pin_obj_t pin_P1_31 = PIN(1, 31); -const mcu_pin_obj_t pin_P1_00 = PIN(MXC_GPIO_PORT_1, 0); -const mcu_pin_obj_t pin_P1_01 = PIN(MXC_GPIO_PORT_1, 1); -const mcu_pin_obj_t pin_P1_02 = PIN(MXC_GPIO_PORT_1, 2); -const mcu_pin_obj_t pin_P1_03 = PIN(MXC_GPIO_PORT_1, 3); -const mcu_pin_obj_t pin_P1_04 = PIN(MXC_GPIO_PORT_1, 4); -const mcu_pin_obj_t pin_P1_05 = PIN(MXC_GPIO_PORT_1, 5); -const mcu_pin_obj_t pin_P1_06 = PIN(MXC_GPIO_PORT_1, 6); -const mcu_pin_obj_t pin_P1_07 = PIN(MXC_GPIO_PORT_1, 7); -const mcu_pin_obj_t pin_P1_08 = PIN(MXC_GPIO_PORT_1, 8); -const mcu_pin_obj_t pin_P1_09 = PIN(MXC_GPIO_PORT_1, 9); -const mcu_pin_obj_t pin_P1_10 = PIN(MXC_GPIO_PORT_1, 10); -const mcu_pin_obj_t pin_P1_11 = PIN(MXC_GPIO_PORT_1, 11); -const mcu_pin_obj_t pin_P1_12 = PIN(MXC_GPIO_PORT_1, 12); -const mcu_pin_obj_t pin_P1_13 = PIN(MXC_GPIO_PORT_1, 13); -const mcu_pin_obj_t pin_P1_14 = PIN(MXC_GPIO_PORT_1, 14); -const mcu_pin_obj_t pin_P1_15 = PIN(MXC_GPIO_PORT_1, 15); -const mcu_pin_obj_t pin_P1_16 = PIN(MXC_GPIO_PORT_1, 16); -const mcu_pin_obj_t pin_P1_17 = PIN(MXC_GPIO_PORT_1, 17); -const mcu_pin_obj_t pin_P1_18 = PIN(MXC_GPIO_PORT_1, 18); -const mcu_pin_obj_t pin_P1_19 = PIN(MXC_GPIO_PORT_1, 19); -const mcu_pin_obj_t pin_P1_20 = PIN(MXC_GPIO_PORT_1, 20); -const mcu_pin_obj_t pin_P1_21 = PIN(MXC_GPIO_PORT_1, 21); -const mcu_pin_obj_t pin_P1_22 = PIN(MXC_GPIO_PORT_1, 22); -const mcu_pin_obj_t pin_P1_23 = PIN(MXC_GPIO_PORT_1, 23); -const mcu_pin_obj_t pin_P1_24 = PIN(MXC_GPIO_PORT_1, 24); -const mcu_pin_obj_t pin_P1_25 = PIN(MXC_GPIO_PORT_1, 25); -const mcu_pin_obj_t pin_P1_26 = PIN(MXC_GPIO_PORT_1, 26); -const mcu_pin_obj_t pin_P1_27 = PIN(MXC_GPIO_PORT_1, 27); -const mcu_pin_obj_t pin_P1_28 = PIN(MXC_GPIO_PORT_1, 28); -const mcu_pin_obj_t pin_P1_29 = PIN(MXC_GPIO_PORT_1, 29); -const mcu_pin_obj_t pin_P1_30 = PIN(MXC_GPIO_PORT_1, 30); -const mcu_pin_obj_t pin_P1_31 = PIN(MXC_GPIO_PORT_1, 31); +const mcu_pin_obj_t pin_P2_00 = PIN(2, 0); +const mcu_pin_obj_t pin_P2_01 = PIN(2, 1); +const mcu_pin_obj_t pin_P2_02 = PIN(2, 2); +const mcu_pin_obj_t pin_P2_03 = PIN(2, 3); +const mcu_pin_obj_t pin_P2_04 = PIN(2, 4); +const mcu_pin_obj_t pin_P2_05 = PIN(2, 5); +const mcu_pin_obj_t pin_P2_06 = PIN(2, 6); +const mcu_pin_obj_t pin_P2_07 = PIN(2, 7); +const mcu_pin_obj_t pin_P2_08 = PIN(2, 8); +const mcu_pin_obj_t pin_P2_09 = PIN(2, 9); +const mcu_pin_obj_t pin_P2_10 = PIN(2, 10); +const mcu_pin_obj_t pin_P2_11 = PIN(2, 11); +const mcu_pin_obj_t pin_P2_12 = PIN(2, 12); +const mcu_pin_obj_t pin_P2_13 = PIN(2, 13); +const mcu_pin_obj_t pin_P2_14 = PIN(2, 14); +const mcu_pin_obj_t pin_P2_15 = PIN(2, 15); +const mcu_pin_obj_t pin_P2_16 = PIN(2, 16); +const mcu_pin_obj_t pin_P2_17 = PIN(2, 17); +const mcu_pin_obj_t pin_P2_18 = PIN(2, 18); +const mcu_pin_obj_t pin_P2_19 = PIN(2, 19); +const mcu_pin_obj_t pin_P2_20 = PIN(2, 20); +const mcu_pin_obj_t pin_P2_21 = PIN(2, 21); +const mcu_pin_obj_t pin_P2_22 = PIN(2, 22); +const mcu_pin_obj_t pin_P2_23 = PIN(2, 23); +const mcu_pin_obj_t pin_P2_24 = PIN(2, 24); +const mcu_pin_obj_t pin_P2_25 = PIN(2, 25); +const mcu_pin_obj_t pin_P2_26 = PIN(2, 26); +const mcu_pin_obj_t pin_P2_27 = PIN(2, 27); +const mcu_pin_obj_t pin_P2_28 = PIN(2, 28); +const mcu_pin_obj_t pin_P2_29 = PIN(2, 29); +const mcu_pin_obj_t pin_P2_30 = PIN(2, 30); +const mcu_pin_obj_t pin_P2_31 = PIN(2, 31); -const mcu_pin_obj_t pin_P2_00 = PIN(MXC_GPIO_PORT_2, 0); -const mcu_pin_obj_t pin_P2_01 = PIN(MXC_GPIO_PORT_2, 1); -const mcu_pin_obj_t pin_P2_02 = PIN(MXC_GPIO_PORT_2, 2); -const mcu_pin_obj_t pin_P2_03 = PIN(MXC_GPIO_PORT_2, 3); -const mcu_pin_obj_t pin_P2_04 = PIN(MXC_GPIO_PORT_2, 4); -const mcu_pin_obj_t pin_P2_05 = PIN(MXC_GPIO_PORT_2, 5); -const mcu_pin_obj_t pin_P2_06 = PIN(MXC_GPIO_PORT_2, 6); -const mcu_pin_obj_t pin_P2_07 = PIN(MXC_GPIO_PORT_2, 7); -const mcu_pin_obj_t pin_P2_08 = PIN(MXC_GPIO_PORT_2, 8); -const mcu_pin_obj_t pin_P2_09 = PIN(MXC_GPIO_PORT_2, 9); -const mcu_pin_obj_t pin_P2_10 = PIN(MXC_GPIO_PORT_2, 10); -const mcu_pin_obj_t pin_P2_11 = PIN(MXC_GPIO_PORT_2, 11); -const mcu_pin_obj_t pin_P2_12 = PIN(MXC_GPIO_PORT_2, 12); -const mcu_pin_obj_t pin_P2_13 = PIN(MXC_GPIO_PORT_2, 13); -const mcu_pin_obj_t pin_P2_14 = PIN(MXC_GPIO_PORT_2, 14); -const mcu_pin_obj_t pin_P2_15 = PIN(MXC_GPIO_PORT_2, 15); -const mcu_pin_obj_t pin_P2_16 = PIN(MXC_GPIO_PORT_2, 16); -const mcu_pin_obj_t pin_P2_17 = PIN(MXC_GPIO_PORT_2, 17); -const mcu_pin_obj_t pin_P2_18 = PIN(MXC_GPIO_PORT_2, 18); -const mcu_pin_obj_t pin_P2_19 = PIN(MXC_GPIO_PORT_2, 19); -const mcu_pin_obj_t pin_P2_20 = PIN(MXC_GPIO_PORT_2, 20); -const mcu_pin_obj_t pin_P2_21 = PIN(MXC_GPIO_PORT_2, 21); -const mcu_pin_obj_t pin_P2_22 = PIN(MXC_GPIO_PORT_2, 22); -const mcu_pin_obj_t pin_P2_23 = PIN(MXC_GPIO_PORT_2, 23); -const mcu_pin_obj_t pin_P2_24 = PIN(MXC_GPIO_PORT_2, 24); -const mcu_pin_obj_t pin_P2_25 = PIN(MXC_GPIO_PORT_2, 25); -const mcu_pin_obj_t pin_P2_26 = PIN(MXC_GPIO_PORT_2, 26); -const mcu_pin_obj_t pin_P2_27 = PIN(MXC_GPIO_PORT_2, 27); -const mcu_pin_obj_t pin_P2_28 = PIN(MXC_GPIO_PORT_2, 28); -const mcu_pin_obj_t pin_P2_29 = PIN(MXC_GPIO_PORT_2, 29); -const mcu_pin_obj_t pin_P2_30 = PIN(MXC_GPIO_PORT_2, 30); -const mcu_pin_obj_t pin_P2_31 = PIN(MXC_GPIO_PORT_2, 31); +const mcu_pin_obj_t pin_P3_00 = PIN(3, 0); +const mcu_pin_obj_t pin_P3_01 = PIN(3, 1); +const mcu_pin_obj_t pin_P3_02 = PIN(3, 2); +const mcu_pin_obj_t pin_P3_03 = PIN(3, 3); +const mcu_pin_obj_t pin_P3_04 = PIN(3, 4); +const mcu_pin_obj_t pin_P3_05 = PIN(3, 5); +const mcu_pin_obj_t pin_P3_06 = PIN(3, 6); +const mcu_pin_obj_t pin_P3_07 = PIN(3, 7); +const mcu_pin_obj_t pin_P3_08 = PIN(3, 8); +const mcu_pin_obj_t pin_P3_09 = PIN(3, 9); -const mcu_pin_obj_t pin_P3_00 = PIN(MXC_GPIO_PORT_3, 0); -const mcu_pin_obj_t pin_P3_01 = PIN(MXC_GPIO_PORT_3, 1); -const mcu_pin_obj_t pin_P3_02 = PIN(MXC_GPIO_PORT_3, 2); -const mcu_pin_obj_t pin_P3_03 = PIN(MXC_GPIO_PORT_3, 3); -const mcu_pin_obj_t pin_P3_04 = PIN(MXC_GPIO_PORT_3, 4); -const mcu_pin_obj_t pin_P3_05 = PIN(MXC_GPIO_PORT_3, 5); -const mcu_pin_obj_t pin_P3_06 = PIN(MXC_GPIO_PORT_3, 6); -const mcu_pin_obj_t pin_P3_07 = PIN(MXC_GPIO_PORT_3, 7); -const mcu_pin_obj_t pin_P3_08 = PIN(MXC_GPIO_PORT_3, 8); -const mcu_pin_obj_t pin_P3_09 = PIN(MXC_GPIO_PORT_3, 9); - -const mcu_pin_obj_t pin_P4_00 = PIN(MXC_GPIO_PORT_4, 0); -const mcu_pin_obj_t pin_P4_01 = PIN(MXC_GPIO_PORT_4, 1); +const mcu_pin_obj_t pin_P4_00 = PIN(4, 0); +const mcu_pin_obj_t pin_P4_01 = PIN(4, 1); diff --git a/ports/analog/peripherals/pins.h b/ports/analog/peripherals/pins.h index 313addc1f205..efee60a2962a 100644 --- a/ports/analog/peripherals/pins.h +++ b/ports/analog/peripherals/pins.h @@ -14,25 +14,23 @@ #include "py/obj.h" // HAL includes -// #include "gpio.h" +#include "gpio.h" +#include "gpio_regs.h" typedef struct { mp_obj_base_t base; - const uint8_t port; - const uint8_t pad; - // const uint8_t level : 4; // FIXME: Find how to include the VDDIO/VDDIOH level + uint8_t port; + uint32_t mask; // the pad # target e.g. P0.01 is Port=0, Mask=1 + mxc_gpio_vssel_t level; } mcu_pin_obj_t; extern const mp_obj_type_t mcu_pin_type; -#define NO_PIN (0xFF) // for non-connected pins +#define PIN(pin_port, pin_mask) { {&mcu_pin_type}, .port = pin_port, .mask = 1UL< Date: Mon, 23 Sep 2024 07:13:10 -0600 Subject: [PATCH 12/39] Added max32690 EVKIT board & changed APARD board to apard32690 --- .../boards/{APARD => apard32690}/README.md | 0 .../boards/{APARD => apard32690}/board.c | 0 .../{APARD => apard32690}/mpconfigboard.h | 0 .../{APARD => apard32690}/mpconfigboard.mk | 0 .../boards/{APARD => apard32690}/pins.c | 0 ports/analog/boards/max32690evkit/board.c | 74 ++++++++++ .../boards/max32690evkit/mpconfigboard.h | 38 ++++++ .../boards/max32690evkit/mpconfigboard.mk | 32 +++++ ports/analog/boards/max32690evkit/pins.c | 126 ++++++++++++++++++ 9 files changed, 270 insertions(+) rename ports/analog/boards/{APARD => apard32690}/README.md (100%) rename ports/analog/boards/{APARD => apard32690}/board.c (100%) rename ports/analog/boards/{APARD => apard32690}/mpconfigboard.h (100%) rename ports/analog/boards/{APARD => apard32690}/mpconfigboard.mk (100%) rename ports/analog/boards/{APARD => apard32690}/pins.c (100%) create mode 100644 ports/analog/boards/max32690evkit/board.c create mode 100644 ports/analog/boards/max32690evkit/mpconfigboard.h create mode 100644 ports/analog/boards/max32690evkit/mpconfigboard.mk create mode 100644 ports/analog/boards/max32690evkit/pins.c diff --git a/ports/analog/boards/APARD/README.md b/ports/analog/boards/apard32690/README.md similarity index 100% rename from ports/analog/boards/APARD/README.md rename to ports/analog/boards/apard32690/README.md diff --git a/ports/analog/boards/APARD/board.c b/ports/analog/boards/apard32690/board.c similarity index 100% rename from ports/analog/boards/APARD/board.c rename to ports/analog/boards/apard32690/board.c diff --git a/ports/analog/boards/APARD/mpconfigboard.h b/ports/analog/boards/apard32690/mpconfigboard.h similarity index 100% rename from ports/analog/boards/APARD/mpconfigboard.h rename to ports/analog/boards/apard32690/mpconfigboard.h diff --git a/ports/analog/boards/APARD/mpconfigboard.mk b/ports/analog/boards/apard32690/mpconfigboard.mk similarity index 100% rename from ports/analog/boards/APARD/mpconfigboard.mk rename to ports/analog/boards/apard32690/mpconfigboard.mk diff --git a/ports/analog/boards/APARD/pins.c b/ports/analog/boards/apard32690/pins.c similarity index 100% rename from ports/analog/boards/APARD/pins.c rename to ports/analog/boards/apard32690/pins.c diff --git a/ports/analog/boards/max32690evkit/board.c b/ports/analog/boards/max32690evkit/board.c new file mode 100644 index 000000000000..9a0c8278641f --- /dev/null +++ b/ports/analog/boards/max32690evkit/board.c @@ -0,0 +1,74 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc +// +// SPDX-License-Identifier: MIT + +#include "supervisor/board.h" +#include "supervisor/port.h" +#include "mpconfigboard.h" +#include "max32_port.h" + +// Board-level setup for MAX32690 +// clang-format off +const mxc_gpio_cfg_t pb_pin[] = { + { MXC_GPIO4, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}, +}; +const int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t)); + +const mxc_gpio_cfg_t led_pin[] = { + { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, + { MXC_GPIO2, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, +}; +const int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t)); +// clang-format on + +// DEFAULT: Using the weak-defined supervisor/shared/board.c functions + +/***** OPTIONAL BOARD-SPECIFIC FUNCTIONS from supervisor/board.h *****/ +// Returns true if the user initiates safe mode in a board specific way. +// Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific +// way. +// bool board_requests_safe_mode(void); + +volatile uint32_t system_ticks = 0; + +void SysTick_Handler(void) { + system_ticks++; +} + +uint32_t board_millis(void) { + return system_ticks; +} + +// Initializes board related state once on start up. +void board_init(void) { + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000);\ + + // Enable GPIO (enables clocks + common init for ports) + for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++){ + MXC_GPIO_Init(0x1 << i); + } + + // Init Board LEDs + /* setup GPIO for the LED */ + for (int i = 0; i < num_leds; i++) { + // Set the output value + MXC_GPIO_OutClr(led_pin[i].port, led_pin[i].mask); + MXC_GPIO_Config(&led_pin[i]); + } + + // Turn on one LED to indicate Sign of Life + MXC_GPIO_OutSet(led_pin[2].port, led_pin[2].mask); +} + +// Reset the state of off MCU components such as neopixels. +// void reset_board(void); + +// Deinit the board. This should put the board in deep sleep durable, low power +// state. It should not prevent the user access method from working (such as +// disabling USB, BLE or flash) because CircuitPython may continue to run. +// void board_deinit(void); + +/*******************************************************************/ diff --git a/ports/analog/boards/max32690evkit/mpconfigboard.h b/ports/analog/boards/max32690evkit/mpconfigboard.h new file mode 100644 index 000000000000..7ab6acf658d1 --- /dev/null +++ b/ports/analog/boards/max32690evkit/mpconfigboard.h @@ -0,0 +1,38 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices Inc. +// +// SPDX-License-Identifier: MIT + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2016 Glenn Ruben Bakke +// SPDX-FileCopyrightText: Copyright (c) 2018 Dan Halbert for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#pragma once + +#define MICROPY_HW_BOARD_NAME "MAX32690 EvKit" +#define MICROPY_HW_MCU_NAME "max32690" + +#define FLASH_SIZE (0x300000) // 3MiB +#define FLASH_PAGE_SIZE (0x4000) // 16384 byte pages (16 KiB) + +#define BOARD_HAS_CRYSTAL 1 +#define NUM_GPIO_PORTS 5 +#define CONSOLE_UART MXC_UART2 + +// #if INTERNAL_FLASH_FILESYSTEM +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (0x102E0000) // for MAX32690 +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (128 * 1024) // 64K + +#define MAX32_FLASH_SIZE 0x300000 // 3 MiB +#define INTERNAL_FLASH_FILESYSTEM_SIZE CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE +#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x102E0000 // Load into the last MiB of code/data storage + +// #else +// #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) +// #endif diff --git a/ports/analog/boards/max32690evkit/mpconfigboard.mk b/ports/analog/boards/max32690evkit/mpconfigboard.mk new file mode 100644 index 000000000000..4e6e766df5d2 --- /dev/null +++ b/ports/analog/boards/max32690evkit/mpconfigboard.mk @@ -0,0 +1,32 @@ +# This file is part of the CircuitPython project: https://circuitpython.org +# +# SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries +# SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc +# +# SPDX-License-Identifier: MIT + +MCU_SERIES=max32 +MCU_VARIANT=max32690 + +INTERNAL_FLASH_FILESYSTEM=1 +# FLASH: 0x10000000 to 0x10300000 (ARM) +# SRAM: 0x20000000 to 0x20100000 + +#### USB CONFIGURATION +# Use 0x0456 for Analog Devices, Inc.; 0B6A for Maxim +USB_VID=0x0456 +# USB_VID=0x0B6A +USB_PID=0x003C +USB_MANUFACTURER="Analog Devices, Inc." +USB_PRODUCT="MAX32690 EvKit" +USB_HIGHSPEED=1 + +# NOTE: MAX32 devices do not support IN/OUT pairs on the same EP +USB_NUM_ENDPOINT_PAIRS=12 +### + +# define UID len for memory safety (buffer gets passed as a raw ptr) +COMMON_HAL_MCU_PROCESSOR_UID_LENGTH=30 + +# NOTE: Not implementing external flash for now +# CFLAGS+=-DEXT_FLASH_MX25 diff --git a/ports/analog/boards/max32690evkit/pins.c b/ports/analog/boards/max32690evkit/pins.c new file mode 100644 index 000000000000..5b736385dc58 --- /dev/null +++ b/ports/analog/boards/max32690evkit/pins.c @@ -0,0 +1,126 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. +// +// SPDX-License-Identifier: MIT + +#include "shared-bindings/board/__init__.h" + +static const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + //P0 + { MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, + { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, + //P1 + { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_P1_16), MP_ROM_PTR(&pin_P1_16) }, + { MP_ROM_QSTR(MP_QSTR_P1_17), MP_ROM_PTR(&pin_P1_17) }, + { MP_ROM_QSTR(MP_QSTR_P1_18), MP_ROM_PTR(&pin_P1_18) }, + { MP_ROM_QSTR(MP_QSTR_P1_19), MP_ROM_PTR(&pin_P1_19) }, + { MP_ROM_QSTR(MP_QSTR_P1_20), MP_ROM_PTR(&pin_P1_20) }, + { MP_ROM_QSTR(MP_QSTR_P1_21), MP_ROM_PTR(&pin_P1_21) }, + { MP_ROM_QSTR(MP_QSTR_P1_22), MP_ROM_PTR(&pin_P1_22) }, + { MP_ROM_QSTR(MP_QSTR_P1_23), MP_ROM_PTR(&pin_P1_23) }, + { MP_ROM_QSTR(MP_QSTR_P1_24), MP_ROM_PTR(&pin_P1_24) }, + { MP_ROM_QSTR(MP_QSTR_P1_25), MP_ROM_PTR(&pin_P1_25) }, + { MP_ROM_QSTR(MP_QSTR_P1_26), MP_ROM_PTR(&pin_P1_26) }, + { MP_ROM_QSTR(MP_QSTR_P1_27), MP_ROM_PTR(&pin_P1_27) }, + { MP_ROM_QSTR(MP_QSTR_P1_28), MP_ROM_PTR(&pin_P1_28) }, + { MP_ROM_QSTR(MP_QSTR_P1_29), MP_ROM_PTR(&pin_P1_29) }, + { MP_ROM_QSTR(MP_QSTR_P1_30), MP_ROM_PTR(&pin_P1_30) }, + { MP_ROM_QSTR(MP_QSTR_P1_31), MP_ROM_PTR(&pin_P1_31) }, + //P2 + { MP_ROM_QSTR(MP_QSTR_P2_00), MP_ROM_PTR(&pin_P2_00) }, + { MP_ROM_QSTR(MP_QSTR_P2_01), MP_ROM_PTR(&pin_P2_01) }, + { MP_ROM_QSTR(MP_QSTR_P2_02), MP_ROM_PTR(&pin_P2_02) }, + { MP_ROM_QSTR(MP_QSTR_P2_03), MP_ROM_PTR(&pin_P2_03) }, + { MP_ROM_QSTR(MP_QSTR_P2_04), MP_ROM_PTR(&pin_P2_04) }, + { MP_ROM_QSTR(MP_QSTR_P2_05), MP_ROM_PTR(&pin_P2_05) }, + { MP_ROM_QSTR(MP_QSTR_P2_06), MP_ROM_PTR(&pin_P2_06) }, + { MP_ROM_QSTR(MP_QSTR_P2_07), MP_ROM_PTR(&pin_P2_07) }, + { MP_ROM_QSTR(MP_QSTR_P2_08), MP_ROM_PTR(&pin_P2_08) }, + { MP_ROM_QSTR(MP_QSTR_P2_09), MP_ROM_PTR(&pin_P2_09) }, + { MP_ROM_QSTR(MP_QSTR_P2_10), MP_ROM_PTR(&pin_P2_10) }, + { MP_ROM_QSTR(MP_QSTR_P2_11), MP_ROM_PTR(&pin_P2_11) }, + { MP_ROM_QSTR(MP_QSTR_P2_12), MP_ROM_PTR(&pin_P2_12) }, + { MP_ROM_QSTR(MP_QSTR_P2_13), MP_ROM_PTR(&pin_P2_13) }, + { MP_ROM_QSTR(MP_QSTR_P2_14), MP_ROM_PTR(&pin_P2_14) }, + { MP_ROM_QSTR(MP_QSTR_P2_15), MP_ROM_PTR(&pin_P2_15) }, + { MP_ROM_QSTR(MP_QSTR_P2_16), MP_ROM_PTR(&pin_P2_16) }, + { MP_ROM_QSTR(MP_QSTR_P2_17), MP_ROM_PTR(&pin_P2_17) }, + { MP_ROM_QSTR(MP_QSTR_P2_18), MP_ROM_PTR(&pin_P2_18) }, + { MP_ROM_QSTR(MP_QSTR_P2_19), MP_ROM_PTR(&pin_P2_19) }, + { MP_ROM_QSTR(MP_QSTR_P2_20), MP_ROM_PTR(&pin_P2_20) }, + { MP_ROM_QSTR(MP_QSTR_P2_21), MP_ROM_PTR(&pin_P2_21) }, + { MP_ROM_QSTR(MP_QSTR_P2_22), MP_ROM_PTR(&pin_P2_22) }, + { MP_ROM_QSTR(MP_QSTR_P2_23), MP_ROM_PTR(&pin_P2_23) }, + { MP_ROM_QSTR(MP_QSTR_P2_24), MP_ROM_PTR(&pin_P2_24) }, + { MP_ROM_QSTR(MP_QSTR_P2_25), MP_ROM_PTR(&pin_P2_25) }, + { MP_ROM_QSTR(MP_QSTR_P2_26), MP_ROM_PTR(&pin_P2_26) }, + { MP_ROM_QSTR(MP_QSTR_P2_27), MP_ROM_PTR(&pin_P2_27) }, + { MP_ROM_QSTR(MP_QSTR_P2_28), MP_ROM_PTR(&pin_P2_28) }, + { MP_ROM_QSTR(MP_QSTR_P2_29), MP_ROM_PTR(&pin_P2_29) }, + { MP_ROM_QSTR(MP_QSTR_P2_30), MP_ROM_PTR(&pin_P2_30) }, + { MP_ROM_QSTR(MP_QSTR_P2_31), MP_ROM_PTR(&pin_P2_31) }, + //P3 + { MP_ROM_QSTR(MP_QSTR_P3_00), MP_ROM_PTR(&pin_P3_00) }, + { MP_ROM_QSTR(MP_QSTR_P3_01), MP_ROM_PTR(&pin_P3_01) }, + { MP_ROM_QSTR(MP_QSTR_P3_02), MP_ROM_PTR(&pin_P3_02) }, + { MP_ROM_QSTR(MP_QSTR_P3_03), MP_ROM_PTR(&pin_P3_03) }, + { MP_ROM_QSTR(MP_QSTR_P3_04), MP_ROM_PTR(&pin_P3_04) }, + { MP_ROM_QSTR(MP_QSTR_P3_05), MP_ROM_PTR(&pin_P3_05) }, + { MP_ROM_QSTR(MP_QSTR_P3_06), MP_ROM_PTR(&pin_P3_06) }, + { MP_ROM_QSTR(MP_QSTR_P3_07), MP_ROM_PTR(&pin_P3_07) }, + { MP_ROM_QSTR(MP_QSTR_P3_08), MP_ROM_PTR(&pin_P3_08) }, + { MP_ROM_QSTR(MP_QSTR_P3_09), MP_ROM_PTR(&pin_P3_09) }, + //P4 + { MP_ROM_QSTR(MP_QSTR_P4_00), MP_ROM_PTR(&pin_P4_00) }, + { MP_ROM_QSTR(MP_QSTR_P4_01), MP_ROM_PTR(&pin_P4_01) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); From 58277a4290ecc1e24e95b06a3706fdae6d2c3129 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Mon, 23 Sep 2024 09:30:16 -0600 Subject: [PATCH 13/39] Reordered mpconfigport.mk; replaced MXC_SYS includes with max32_port.h in microcontroller/Pin.c --- ports/analog/Makefile | 9 +++++++-- .../common-hal/digitalio/DigitalInOut.c | 5 +++-- ports/analog/common-hal/microcontroller/Pin.c | 6 ++---- ports/analog/mpconfigport.mk | 20 ++++++++----------- ports/analog/peripherals/led.h | 5 ----- ports/analog/supervisor/internal_flash.c | 2 +- ports/analog/supervisor/port.c | 6 ------ 7 files changed, 21 insertions(+), 32 deletions(-) delete mode 100644 ports/analog/peripherals/led.h diff --git a/ports/analog/Makefile b/ports/analog/Makefile index 072d9f866219..766f0f78b930 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -147,6 +147,8 @@ CFLAGS += -D$(MCU_VARIANT_UPPER) \ -DTARGET=$(MCU_VARIANT_UPPER) \ -DIAR_PRAGMAS=0 \ -DRISCV_LOAD=0 + +# todo: add these for linkerfiles later on so that it's easier to add new boards # -DFLASH_ORIGIN=0x10000000 \ # -DFLASH_SIZE=0x340000 \ # -DSRAM_ORIGIN=0x20000000 \ @@ -193,7 +195,9 @@ SRC_C += \ CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostartfiles $(BASE_CFLAGS) $(COPT) -# Suppress some warnings for MSDK +# Suppress some errors for MSDK +# cast-align warning will be suppressed; +# it gets generated by CircuitPy's TLSF memory allocator lib CFLAGS += -Wno-error=unused-parameter \ -Wno-error=old-style-declaration \ -Wno-error=sign-compare \ @@ -203,7 +207,8 @@ CFLAGS += -Wno-error=unused-parameter \ -Wno-error=lto-type-mismatch \ -Wno-error=cast-align \ -Wno-error=nested-externs \ - -Wno-error=sign-compare + -Wno-error=sign-compare \ + -Wno-cast-align \ ENTRY = Reset_Handler LDFLAGS += $(CFLAGS) --entry $(ENTRY) -Wl,-nostdlib -Wl,-T,$(LINKERFILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections diff --git a/ports/analog/common-hal/digitalio/DigitalInOut.c b/ports/analog/common-hal/digitalio/DigitalInOut.c index 59a242239e0d..d23c90fdbc36 100644 --- a/ports/analog/common-hal/digitalio/DigitalInOut.c +++ b/ports/analog/common-hal/digitalio/DigitalInOut.c @@ -4,6 +4,7 @@ // // SPDX-License-Identifier: MIT +#define CIRCUITPY_DIGITALIO_HAVE_INVALID_DRIVE_MODE 1 #include "shared-bindings/digitalio/DigitalInOut.h" #include "shared-bindings/microcontroller/Pin.h" @@ -70,9 +71,9 @@ digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( // todo (low): MSDK Hardware does not support open-drain configuration except // todo (low): when directly managed by a peripheral such as I2C. - // todo (low): find a way to signal this perhaps to any upstream code + // todo (low): find a way to signal this to any upstream code if (drive_mode != DRIVE_MODE_PUSH_PULL) { - return DIGITALINOUT_OK; + return DIGITALINOUT_INVALID_DRIVE_MODE; } return DIGITALINOUT_OK; } diff --git a/ports/analog/common-hal/microcontroller/Pin.c b/ports/analog/common-hal/microcontroller/Pin.c index 7259c0effe8a..22e3ce3899d9 100644 --- a/ports/analog/common-hal/microcontroller/Pin.c +++ b/ports/analog/common-hal/microcontroller/Pin.c @@ -10,9 +10,7 @@ #include "mpconfigboard.h" #include "pins.h" -#include "mxc_sys.h" -#include "gpio.h" -#include "gpio_regs.h" +#include "max32_port.h" #include "common-hal/microcontroller/Pin.h" @@ -79,7 +77,7 @@ uint8_t common_hal_mcu_pin_number(const mcu_pin_obj_t *pin) { } // most max32 gpio ports have 32 pins - // todo: create a struct to encode # of pins for each port, since some GPIO ports differ + // todo (low prior.): encode # of pins for each port, since some GPIO ports differ return pin->port * 32 + pin->mask; } diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk index f2cc8bd7aea0..348d61dc2892 100644 --- a/ports/analog/mpconfigport.mk +++ b/ports/analog/mpconfigport.mk @@ -21,9 +21,6 @@ INTERNAL_FLASH_FILESYSTEM = 1 #################################################################################### # These modules are implemented in ports//common-hal: -# Typically the second module to create -CIRCUITPY_DIGITALIO ?= 1 - # Plan to implement CIRCUITPY_BUSIO ?= 0 CIRCUITPY_RTC ?= 0 @@ -47,21 +44,20 @@ CIRCUITPY_DISPLAYIO ?= 0 # These modules are implemented in shared-module/ - they can be included in # any port once their prerequisites in common-hal are complete. +# No requirements, but takes extra flash +CIRCUITPY_ULAB = 1 # Requires DigitalIO: -CIRCUITPY_BITBANGIO ?= 0 -# Requires neopixel_write or SPI (dotstar) -CIRCUITPY_PIXELBUF ?= 0 +CIRCUITPY_BITBANGIO ?= 1 +# Requires Microcontroller +CIRCUITPY_TOUCHIO ?= 1 # Requires OS CIRCUITPY_RANDOM ?= 0 -# Requires Microcontroller -CIRCUITPY_TOUCHIO ?= 0 -# Requires UART +# Requires busio.UART CIRCUITPY_CONSOLE_UART ?= 0 # Does nothing without I2C CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 - -# No requirements, but takes extra flash -CIRCUITPY_ULAB = 1 +# Requires neopixel_write or SPI (dotstar) +CIRCUITPY_PIXELBUF ?= 0 #################################################################################### # Required for clean building (additional CircuittPython Defaults) diff --git a/ports/analog/peripherals/led.h b/ports/analog/peripherals/led.h deleted file mode 100644 index ff05be051bb2..000000000000 --- a/ports/analog/peripherals/led.h +++ /dev/null @@ -1,5 +0,0 @@ -// This file is part of the CircuitPython project: https://circuitpython.org -// -// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. -// -// SPDX-License-Identifier: MIT diff --git a/ports/analog/supervisor/internal_flash.c b/ports/analog/supervisor/internal_flash.c index 2b9b51967734..57dd7d8b45d4 100644 --- a/ports/analog/supervisor/internal_flash.c +++ b/ports/analog/supervisor/internal_flash.c @@ -187,7 +187,7 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t error, blocks_left, count, page_start, page_size = 0; while (num_blocks > 0) { - uint32_t dest_addr = block2addr(block_num); + int dest_addr = block2addr(block_num); // bad block number passed in if (dest_addr == -1) { return 1; diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index 730d85124259..af929e074e8f 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -37,9 +37,6 @@ #include "common-hal/microcontroller/Pin.h" #include "shared-bindings/microcontroller/__init__.h" -//todo: pack the below definitions into their own module -//todo: under peripherals/gpio, peripherals/clocks, etc. - // Sys includes #include "max32_port.h" @@ -62,9 +59,6 @@ extern const int num_pbs; extern const mxc_gpio_cfg_t led_pin[]; extern const int num_leds; -//todo: define an LED HAL -// #include "peripherals/led.h" - // For saving rtc data for ticks static uint32_t subsec, sec = 0; static uint32_t tick_flag = 0; From 4a8643e66d495f327cf3037df0e6aabb25162815 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Fri, 27 Sep 2024 08:22:33 -0700 Subject: [PATCH 14/39] Moved GPIO ports to board.c to make it easy to add boards in the future. Added priority to remaining TODOs (low) --- ports/analog/boards/apard32690/board.c | 3 +++ ports/analog/boards/max32690evkit/board.c | 3 +++ ports/analog/common-hal/microcontroller/Pin.c | 8 ++------ ports/analog/common-hal/os/__init__.c | 2 +- 4 files changed, 9 insertions(+), 7 deletions(-) diff --git a/ports/analog/boards/apard32690/board.c b/ports/analog/boards/apard32690/board.c index c24ff5a08e83..c8751aa37e79 100644 --- a/ports/analog/boards/apard32690/board.c +++ b/ports/analog/boards/apard32690/board.c @@ -10,6 +10,9 @@ #include "max32_port.h" // Board-level setup for MAX32690 +mxc_gpio_regs_t* gpio_ports[NUM_GPIO_PORTS] = + {MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3, MXC_GPIO4}; + // clang-format off const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO1, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}, diff --git a/ports/analog/boards/max32690evkit/board.c b/ports/analog/boards/max32690evkit/board.c index 9a0c8278641f..924eaeafef0e 100644 --- a/ports/analog/boards/max32690evkit/board.c +++ b/ports/analog/boards/max32690evkit/board.c @@ -10,6 +10,9 @@ #include "max32_port.h" // Board-level setup for MAX32690 +mxc_gpio_regs_t* gpio_ports[NUM_GPIO_PORTS] = + {MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3, MXC_GPIO4}; + // clang-format off const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO4, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}, diff --git a/ports/analog/common-hal/microcontroller/Pin.c b/ports/analog/common-hal/microcontroller/Pin.c index 22e3ce3899d9..29befaf5e5c0 100644 --- a/ports/analog/common-hal/microcontroller/Pin.c +++ b/ports/analog/common-hal/microcontroller/Pin.c @@ -16,12 +16,8 @@ static uint32_t claimed_pins[NUM_GPIO_PORTS]; -// todo (low): try moving this to an extern in the board support -#ifdef MAX32690 -#include "max32690.h" -mxc_gpio_regs_t* gpio_ports[NUM_GPIO_PORTS] = - {MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3, MXC_GPIO4}; -#endif +// defined in board.c +extern mxc_gpio_regs_t* gpio_ports[NUM_GPIO_PORTS]; static uint32_t never_reset_pins[NUM_GPIO_PORTS]; diff --git a/ports/analog/common-hal/os/__init__.c b/ports/analog/common-hal/os/__init__.c index 97ce98cb9e1e..04e561e61909 100644 --- a/ports/analog/common-hal/os/__init__.c +++ b/ports/analog/common-hal/os/__init__.c @@ -43,7 +43,7 @@ mp_obj_t common_hal_os_uname(void) { bool common_hal_os_urandom(uint8_t *buffer, uint32_t length) { #if (HAS_TRNG) - //todo: implement + //todo (low prior): implement #else #endif return false; From ff87a70f9c9d411508b6efc01ad917b1143b815a Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Fri, 27 Sep 2024 08:51:06 -0700 Subject: [PATCH 15/39] Updated USB PID for max32690evkit --- ports/analog/boards/max32690evkit/mpconfigboard.mk | 2 +- tests/pyboard.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/ports/analog/boards/max32690evkit/mpconfigboard.mk b/ports/analog/boards/max32690evkit/mpconfigboard.mk index 4e6e766df5d2..61413216d817 100644 --- a/ports/analog/boards/max32690evkit/mpconfigboard.mk +++ b/ports/analog/boards/max32690evkit/mpconfigboard.mk @@ -16,7 +16,7 @@ INTERNAL_FLASH_FILESYSTEM=1 # Use 0x0456 for Analog Devices, Inc.; 0B6A for Maxim USB_VID=0x0456 # USB_VID=0x0B6A -USB_PID=0x003C +USB_PID=0x003D USB_MANUFACTURER="Analog Devices, Inc." USB_PRODUCT="MAX32690 EvKit" USB_HIGHSPEED=1 diff --git a/tests/pyboard.py b/tests/pyboard.py index 616773a313a1..582a1f894f8b 120000 --- a/tests/pyboard.py +++ b/tests/pyboard.py @@ -1 +1 @@ -../tools/cpboard.py \ No newline at end of file +../tools/cpboard.py From 8ee4bfb84e65b92b4bb40776a203527c4c90a0cf Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Fri, 27 Sep 2024 09:06:33 -0700 Subject: [PATCH 16/39] Formatting fixes missed by local pre-commit runner --- ports/analog/background.c | 5 +- ports/analog/boards/apard32690/board.c | 12 ++-- ports/analog/boards/apard32690/pins.c | 10 +-- ports/analog/boards/max32690evkit/board.c | 8 +-- .../common-hal/digitalio/DigitalInOut.c | 62 ++++++++----------- ports/analog/common-hal/microcontroller/Pin.c | 6 +- .../common-hal/microcontroller/Processor.c | 2 +- ports/analog/common-hal/os/__init__.c | 4 +- ports/analog/supervisor/serial.c | 6 +- ports/analog/supervisor/usb.c | 3 +- 10 files changed, 53 insertions(+), 65 deletions(-) diff --git a/ports/analog/background.c b/ports/analog/background.c index ad3063b7feb9..ffad007ffa51 100644 --- a/ports/analog/background.c +++ b/ports/analog/background.c @@ -19,7 +19,7 @@ extern const mxc_gpio_cfg_t led_pin[]; extern const int num_leds; /** NOTE: ALL "ticks" refer to a 1/1024 s period */ -static int status_led_ticks=0; +static int status_led_ticks = 0; // This function is where port-specific background // tasks should be performed @@ -28,8 +28,7 @@ void port_background_tick(void) { status_led_ticks++; // Set an LED approx. 1/s - if (status_led_ticks > 1024) - { + if (status_led_ticks > 1024) { MXC_GPIO_OutToggle(led_pin[2].port, led_pin[2].mask); status_led_ticks = 0; } diff --git a/ports/analog/boards/apard32690/board.c b/ports/analog/boards/apard32690/board.c index c8751aa37e79..3cc10de29f1e 100644 --- a/ports/analog/boards/apard32690/board.c +++ b/ports/analog/boards/apard32690/board.c @@ -10,8 +10,8 @@ #include "max32_port.h" // Board-level setup for MAX32690 -mxc_gpio_regs_t* gpio_ports[NUM_GPIO_PORTS] = - {MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3, MXC_GPIO4}; +mxc_gpio_regs_t *gpio_ports[NUM_GPIO_PORTS] = +{MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3, MXC_GPIO4}; // clang-format off const mxc_gpio_cfg_t pb_pin[] = { @@ -38,20 +38,20 @@ const int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t)); volatile uint32_t system_ticks = 0; void SysTick_Handler(void) { - system_ticks++; + system_ticks++; } uint32_t board_millis(void) { - return system_ticks; + return system_ticks; } // Initializes board related state once on start up. void board_init(void) { // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000);\ + SysTick_Config(SystemCoreClock / 1000); \ // Enable GPIO (enables clocks + common init for ports) - for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++){ + for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++) { MXC_GPIO_Init(0x1 << i); } diff --git a/ports/analog/boards/apard32690/pins.c b/ports/analog/boards/apard32690/pins.c index 5b736385dc58..0486687d3347 100644 --- a/ports/analog/boards/apard32690/pins.c +++ b/ports/analog/boards/apard32690/pins.c @@ -9,7 +9,7 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS - //P0 + // P0 { MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) }, { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, @@ -42,7 +42,7 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, - //P1 + // P1 { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, @@ -75,7 +75,7 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P1_29), MP_ROM_PTR(&pin_P1_29) }, { MP_ROM_QSTR(MP_QSTR_P1_30), MP_ROM_PTR(&pin_P1_30) }, { MP_ROM_QSTR(MP_QSTR_P1_31), MP_ROM_PTR(&pin_P1_31) }, - //P2 + // P2 { MP_ROM_QSTR(MP_QSTR_P2_00), MP_ROM_PTR(&pin_P2_00) }, { MP_ROM_QSTR(MP_QSTR_P2_01), MP_ROM_PTR(&pin_P2_01) }, { MP_ROM_QSTR(MP_QSTR_P2_02), MP_ROM_PTR(&pin_P2_02) }, @@ -108,7 +108,7 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P2_29), MP_ROM_PTR(&pin_P2_29) }, { MP_ROM_QSTR(MP_QSTR_P2_30), MP_ROM_PTR(&pin_P2_30) }, { MP_ROM_QSTR(MP_QSTR_P2_31), MP_ROM_PTR(&pin_P2_31) }, - //P3 + // P3 { MP_ROM_QSTR(MP_QSTR_P3_00), MP_ROM_PTR(&pin_P3_00) }, { MP_ROM_QSTR(MP_QSTR_P3_01), MP_ROM_PTR(&pin_P3_01) }, { MP_ROM_QSTR(MP_QSTR_P3_02), MP_ROM_PTR(&pin_P3_02) }, @@ -119,7 +119,7 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P3_07), MP_ROM_PTR(&pin_P3_07) }, { MP_ROM_QSTR(MP_QSTR_P3_08), MP_ROM_PTR(&pin_P3_08) }, { MP_ROM_QSTR(MP_QSTR_P3_09), MP_ROM_PTR(&pin_P3_09) }, - //P4 + // P4 { MP_ROM_QSTR(MP_QSTR_P4_00), MP_ROM_PTR(&pin_P4_00) }, { MP_ROM_QSTR(MP_QSTR_P4_01), MP_ROM_PTR(&pin_P4_01) }, }; diff --git a/ports/analog/boards/max32690evkit/board.c b/ports/analog/boards/max32690evkit/board.c index 924eaeafef0e..76da5c0adccb 100644 --- a/ports/analog/boards/max32690evkit/board.c +++ b/ports/analog/boards/max32690evkit/board.c @@ -10,8 +10,8 @@ #include "max32_port.h" // Board-level setup for MAX32690 -mxc_gpio_regs_t* gpio_ports[NUM_GPIO_PORTS] = - {MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3, MXC_GPIO4}; +mxc_gpio_regs_t *gpio_ports[NUM_GPIO_PORTS] = +{MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3, MXC_GPIO4}; // clang-format off const mxc_gpio_cfg_t pb_pin[] = { @@ -47,10 +47,10 @@ uint32_t board_millis(void) { // Initializes board related state once on start up. void board_init(void) { // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000);\ + SysTick_Config(SystemCoreClock / 1000); \ // Enable GPIO (enables clocks + common init for ports) - for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++){ + for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++) { MXC_GPIO_Init(0x1 << i); } diff --git a/ports/analog/common-hal/digitalio/DigitalInOut.c b/ports/analog/common-hal/digitalio/DigitalInOut.c index d23c90fdbc36..166021b44128 100644 --- a/ports/analog/common-hal/digitalio/DigitalInOut.c +++ b/ports/analog/common-hal/digitalio/DigitalInOut.c @@ -10,7 +10,7 @@ #include "gpio_reva.h" -extern mxc_gpio_regs_t* gpio_ports[NUM_GPIO_PORTS]; +extern mxc_gpio_regs_t *gpio_ports[NUM_GPIO_PORTS]; void common_hal_digitalio_digitalinout_never_reset( digitalio_digitalinout_obj_t *self) { @@ -50,9 +50,8 @@ void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self } digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_input( - digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) -{ - mxc_gpio_regs_t* port = gpio_ports[self->pin->port]; + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_IN, mask); @@ -61,9 +60,8 @@ digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_input( digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( digitalio_digitalinout_obj_t *self, bool value, - digitalio_drive_mode_t drive_mode) -{ - mxc_gpio_regs_t* port = gpio_ports[self->pin->port]; + digitalio_drive_mode_t drive_mode) { + mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_OUT, mask); @@ -85,24 +83,21 @@ digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( uint32_t mask = self->pin->mask; // Check that I/O mode is enabled and we don't have in AND out on at the same time - MP_STATIC_ASSERT(!( (port->en0 & mask) && (port->inen & mask) && (port->outen & mask) )); + MP_STATIC_ASSERT(!((port->en0 & mask) && (port->inen & mask) && (port->outen & mask))); - if ( (port->en0 & mask) && (port->outen & mask) ) - { + if ((port->en0 & mask) && (port->outen & mask)) { return DIRECTION_OUTPUT; - } - else if ( (port->en0 & mask) && (port->inen & mask) ) - { + } else if ((port->en0 & mask) && (port->inen & mask)) { return DIRECTION_INPUT; } - // do not try to drive a pin which has an odd configuration here - else return DIRECTION_INPUT; + else { + return DIRECTION_INPUT; + } } void common_hal_digitalio_digitalinout_set_value( - digitalio_digitalinout_obj_t *self, bool value) -{ + digitalio_digitalinout_obj_t *self, bool value) { digitalio_direction_t dir = common_hal_digitalio_digitalinout_get_direction(self); @@ -112,15 +107,13 @@ void common_hal_digitalio_digitalinout_set_value( if (dir == DIRECTION_OUTPUT) { if (value == true) { MXC_GPIO_OutSet(port, mask); - } - else { + } else { MXC_GPIO_OutClr(port, mask); } } } -bool common_hal_digitalio_digitalinout_get_value(digitalio_digitalinout_obj_t *self) -{ +bool common_hal_digitalio_digitalinout_get_value(digitalio_digitalinout_obj_t *self) { digitalio_direction_t dir = common_hal_digitalio_digitalinout_get_direction(self); @@ -128,10 +121,9 @@ bool common_hal_digitalio_digitalinout_get_value(digitalio_digitalinout_obj_t *s uint32_t mask = self->pin->mask; if (dir == DIRECTION_INPUT) { - return (MXC_GPIO_InGet(port, mask)); - } - else { - return ( (port->out & mask) == true); + return MXC_GPIO_InGet(port, mask); + } else { + return (port->out & mask) == true; } } @@ -154,7 +146,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; - if ( (port->en0 & mask) && (port->inen & mask) ) { + if ((port->en0 & mask) && (port->inen & mask)) { // PULL_NONE, PULL_UP, or PULL_DOWN switch (pull) { case PULL_NONE: @@ -162,7 +154,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( port->padctrl1 &= ~(mask); break; case PULL_UP: - port->padctrl0 |= mask; + port->padctrl0 |= mask; port->padctrl1 &= ~(mask); break; case PULL_DOWN: @@ -173,8 +165,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( break; } return DIGITALINOUT_OK; - } - else { + } else { return DIGITALINOUT_PIN_BUSY; } } @@ -182,19 +173,16 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( digitalio_digitalinout_obj_t *self) { - bool pin_padctrl0 = (gpio_ports[self->pin->port]->padctrl0) & ( self->pin->mask); - bool pin_padctrl1 = (gpio_ports[self->pin->port]->padctrl1) & ( self->pin->mask); + bool pin_padctrl0 = (gpio_ports[self->pin->port]->padctrl0) & (self->pin->mask); + bool pin_padctrl1 = (gpio_ports[self->pin->port]->padctrl1) & (self->pin->mask); - if ( (pin_padctrl0) && !(pin_padctrl1) ) { + if ((pin_padctrl0) && !(pin_padctrl1)) { return PULL_UP; - } - else if ( !(pin_padctrl0) && pin_padctrl1 ) { + } else if (!(pin_padctrl0) && pin_padctrl1) { return PULL_DOWN; - } - else if ( !(pin_padctrl0) && !(pin_padctrl1) ) { + } else if (!(pin_padctrl0) && !(pin_padctrl1)) { return PULL_NONE; } - // Shouldn't happen, (value 0b11 is reserved) else { return PULL_NONE; diff --git a/ports/analog/common-hal/microcontroller/Pin.c b/ports/analog/common-hal/microcontroller/Pin.c index 29befaf5e5c0..4545aa039c2f 100644 --- a/ports/analog/common-hal/microcontroller/Pin.c +++ b/ports/analog/common-hal/microcontroller/Pin.c @@ -17,7 +17,7 @@ static uint32_t claimed_pins[NUM_GPIO_PORTS]; // defined in board.c -extern mxc_gpio_regs_t* gpio_ports[NUM_GPIO_PORTS]; +extern mxc_gpio_regs_t *gpio_ports[NUM_GPIO_PORTS]; static uint32_t never_reset_pins[NUM_GPIO_PORTS]; @@ -31,8 +31,8 @@ void reset_all_pins(void) { reset_pin_number(i, j); } } - // set claimed pins to never_reset pins - claimed_pins[i] = never_reset_pins[i]; + // set claimed pins to never_reset pins + claimed_pins[i] = never_reset_pins[i]; } } diff --git a/ports/analog/common-hal/microcontroller/Processor.c b/ports/analog/common-hal/microcontroller/Processor.c index e28388e58596..87d8047ff2cb 100644 --- a/ports/analog/common-hal/microcontroller/Processor.c +++ b/ports/analog/common-hal/microcontroller/Processor.c @@ -40,7 +40,7 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { mcu_reset_reason_t common_hal_mcu_processor_get_reset_reason(void) { #if CIRCUITPY_ALARM - // TODO: (low prior.) add reset reason in alarm / deepsleep cases (should require alarm peripheral API in "peripherals") + // TODO: (low prior.) add reset reason in alarm / deepsleep cases (should require alarm peripheral API in "peripherals") #endif return RESET_REASON_UNKNOWN; } diff --git a/ports/analog/common-hal/os/__init__.c b/ports/analog/common-hal/os/__init__.c index 04e561e61909..1f89300c4c18 100644 --- a/ports/analog/common-hal/os/__init__.c +++ b/ports/analog/common-hal/os/__init__.c @@ -43,8 +43,8 @@ mp_obj_t common_hal_os_uname(void) { bool common_hal_os_urandom(uint8_t *buffer, uint32_t length) { #if (HAS_TRNG) - //todo (low prior): implement + // todo (low prior): implement #else #endif - return false; + return false; } diff --git a/ports/analog/supervisor/serial.c b/ports/analog/supervisor/serial.c index 871e6cd0fe72..536355e38f60 100644 --- a/ports/analog/supervisor/serial.c +++ b/ports/analog/supervisor/serial.c @@ -26,7 +26,9 @@ void port_serial_init(void) { #if MAX32_SERIAL MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; - while( !(MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IBRO_RDY) ); + while (!(MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IBRO_RDY)) { + ; + } MXC_UART_Init(CONSOLE_UART, 115200, MXC_UART_IBRO_CLK); #endif } @@ -76,7 +78,7 @@ void port_serial_write_substring(const char *text, uint32_t len) { .rxData = NULL, .txLen = len, .rxLen = 0 - }; + }; MXC_UART_Transaction(&uart_req); #endif } diff --git a/ports/analog/supervisor/usb.c b/ports/analog/supervisor/usb.c index f156669ad386..1624359ab51f 100644 --- a/ports/analog/supervisor/usb.c +++ b/ports/analog/supervisor/usb.c @@ -36,8 +36,7 @@ void init_usb_hardware(void) { // Interrupt enables are left to TUSB depending on the device class } -void USB_IRQHandler(void) -{ +void USB_IRQHandler(void) { // Schedules USB background callback // appropriate to a given device class via TinyUSB lib usb_irq_handler(0); From a8ba80fa09dab7a1fd27be851a8ac1286473fe7a Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Fri, 27 Sep 2024 09:15:49 -0700 Subject: [PATCH 17/39] Add "analog" to shared_bindings_matrix.py --- docs/shared_bindings_matrix.py | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index f4b430111eb7..66b6881e4f74 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -31,6 +31,7 @@ from concurrent.futures import ThreadPoolExecutor SUPPORTED_PORTS = [ + "analog", "atmel-samd", "broadcom", "cxd56", From df86e3e3857863b6aa3562ffe06fb249b9883e3e Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Fri, 27 Sep 2024 09:33:29 -0700 Subject: [PATCH 18/39] More pre-commit fixes. --- ports/analog/peripherals/pins.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/analog/peripherals/pins.h b/ports/analog/peripherals/pins.h index efee60a2962a..3bd7d02bf46d 100644 --- a/ports/analog/peripherals/pins.h +++ b/ports/analog/peripherals/pins.h @@ -26,7 +26,7 @@ typedef struct { extern const mp_obj_type_t mcu_pin_type; -#define PIN(pin_port, pin_mask) { {&mcu_pin_type}, .port = pin_port, .mask = 1UL< Date: Fri, 27 Sep 2024 09:46:38 -0700 Subject: [PATCH 19/39] Manual pre-commit fix for all requisite files. --- ports/analog/boards/max32690evkit/pins.c | 10 +++--- ports/analog/max32_port.h | 2 +- ports/analog/supervisor/internal_flash.c | 21 ++++++------ ports/analog/supervisor/port.c | 43 +++++++++++++++--------- 4 files changed, 43 insertions(+), 33 deletions(-) diff --git a/ports/analog/boards/max32690evkit/pins.c b/ports/analog/boards/max32690evkit/pins.c index 5b736385dc58..0486687d3347 100644 --- a/ports/analog/boards/max32690evkit/pins.c +++ b/ports/analog/boards/max32690evkit/pins.c @@ -9,7 +9,7 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS - //P0 + // P0 { MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) }, { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, @@ -42,7 +42,7 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, - //P1 + // P1 { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, @@ -75,7 +75,7 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P1_29), MP_ROM_PTR(&pin_P1_29) }, { MP_ROM_QSTR(MP_QSTR_P1_30), MP_ROM_PTR(&pin_P1_30) }, { MP_ROM_QSTR(MP_QSTR_P1_31), MP_ROM_PTR(&pin_P1_31) }, - //P2 + // P2 { MP_ROM_QSTR(MP_QSTR_P2_00), MP_ROM_PTR(&pin_P2_00) }, { MP_ROM_QSTR(MP_QSTR_P2_01), MP_ROM_PTR(&pin_P2_01) }, { MP_ROM_QSTR(MP_QSTR_P2_02), MP_ROM_PTR(&pin_P2_02) }, @@ -108,7 +108,7 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P2_29), MP_ROM_PTR(&pin_P2_29) }, { MP_ROM_QSTR(MP_QSTR_P2_30), MP_ROM_PTR(&pin_P2_30) }, { MP_ROM_QSTR(MP_QSTR_P2_31), MP_ROM_PTR(&pin_P2_31) }, - //P3 + // P3 { MP_ROM_QSTR(MP_QSTR_P3_00), MP_ROM_PTR(&pin_P3_00) }, { MP_ROM_QSTR(MP_QSTR_P3_01), MP_ROM_PTR(&pin_P3_01) }, { MP_ROM_QSTR(MP_QSTR_P3_02), MP_ROM_PTR(&pin_P3_02) }, @@ -119,7 +119,7 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P3_07), MP_ROM_PTR(&pin_P3_07) }, { MP_ROM_QSTR(MP_QSTR_P3_08), MP_ROM_PTR(&pin_P3_08) }, { MP_ROM_QSTR(MP_QSTR_P3_09), MP_ROM_PTR(&pin_P3_09) }, - //P4 + // P4 { MP_ROM_QSTR(MP_QSTR_P4_00), MP_ROM_PTR(&pin_P4_00) }, { MP_ROM_QSTR(MP_QSTR_P4_01), MP_ROM_PTR(&pin_P4_01) }, }; diff --git a/ports/analog/max32_port.h b/ports/analog/max32_port.h index 0ded32e5b820..fe6d5e157fea 100644 --- a/ports/analog/max32_port.h +++ b/ports/analog/max32_port.h @@ -42,4 +42,4 @@ extern uint32_t SystemCoreClock; #define SUBSEC_PER_TICK 4 #endif -#endif //MAX32_PORT_H +#endif // MAX32_PORT_H diff --git a/ports/analog/supervisor/internal_flash.c b/ports/analog/supervisor/internal_flash.c index 57dd7d8b45d4..8518b235566c 100644 --- a/ports/analog/supervisor/internal_flash.c +++ b/ports/analog/supervisor/internal_flash.c @@ -75,8 +75,9 @@ static uint32_t page_buffer[FLASH_PAGE_SIZE / 4] = {0x0}; static inline int32_t block2addr(uint32_t block) { if (block >= 0 && block < INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS) { return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE; + } else { + return -1; } - else return -1; } // Get index, start addr, & size of the flash sector where addr lies @@ -91,15 +92,13 @@ int flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) { } if (start_addr) { *start_addr = flash_layout[0].base_addr + (sector_index * flash_layout[0].sector_size); - } - else { + } else { return -1; // start_addr is NULL } if (size) { *size = flash_layout[0].sector_size; - } - else { - return -1; //size is NULL + } else { + return -1; // size is NULL } return sector_index; } @@ -176,7 +175,7 @@ mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t n /** NOTE: The MXC_FLC_Read function executes from SRAM and does some more error checking * than memcpy does. Will use it for now. */ - MXC_FLC_Read( src_addr, dest, FILESYSTEM_BLOCK_SIZE * num_blocks ); + MXC_FLC_Read(src_addr, dest, FILESYSTEM_BLOCK_SIZE * num_blocks); return 0; // success } @@ -205,12 +204,12 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, MXC_ICC_Disable(MXC_ICC0); // Buffer the page of flash to erase - MXC_FLC_Read(page_start , page_buffer, page_size); + MXC_FLC_Read(page_start, page_buffer, page_size); // Erase flash page MXC_CRITICAL( error = MXC_FLC_PageErase(dest_addr); - ); + ); if (error != E_NO_ERROR) { // lock flash & reset MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED; @@ -220,12 +219,12 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, // Copy new src data into the page buffer // fill the new data in at the offset dest_addr - page_start // account for uint32_t page_buffer vs uint8_t src - memcpy( (page_buffer + (dest_addr - page_start) / 4), src, count * FILESYSTEM_BLOCK_SIZE); + memcpy((page_buffer + (dest_addr - page_start) / 4), src, count * FILESYSTEM_BLOCK_SIZE); // Write new page buffer back into flash MXC_CRITICAL( error = MXC_FLC_Write(page_start, page_size, page_buffer); - ); + ); if (error != E_NO_ERROR) { // lock flash & reset MXC_FLC0->ctrl = (MXC_FLC0->ctrl & ~MXC_F_FLC_REVA_CTRL_UNLOCK) | MXC_S_FLC_REVA_CTRL_UNLOCK_LOCKED; diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index af929e074e8f..065ac3b3c437 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -46,8 +46,8 @@ // msec to RTC subsec ticks (4 kHz) #define MSEC_TO_SS_ALARM(x) \ - (0 - ((x * 4096) / \ - 1000)) /* Converts a time in milleseconds to the equivalent RSSA register value. */ + (0 - ((x * 4096) / \ + 1000)) /* Converts a time in milleseconds to the equivalent RSSA register value. */ // Externs defined by linker .ld file extern uint32_t _stack, _heap, _estack, _eheap; @@ -70,7 +70,7 @@ safe_mode_t port_init(void) { int err = E_NO_ERROR; // Enable GPIO (enables clocks + common init for ports) - for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++){ + for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++) { err = MXC_GPIO_Init(0x1 << i); if (err) { return SAFE_MODE_PROGRAMMATIC; @@ -93,14 +93,18 @@ safe_mode_t port_init(void) { // Enable clock to RTC peripheral MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; - while(!(MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_ERTCO_RDY)); + while (!(MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_ERTCO_RDY)) { + ; + } NVIC_EnableIRQ(RTC_IRQn); NVIC_EnableIRQ(USB_IRQn); // Init RTC w/ 0sec, 0subsec // Driven by 32.768 kHz ERTCO, with ssec= 1/4096 s - while( MXC_RTC_Init(0,0) != E_SUCCESS ) {}; + while (MXC_RTC_Init(0, 0) != E_SUCCESS) { + } + ; // enable 1 sec RTC SSEC alarm MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE); @@ -108,7 +112,9 @@ safe_mode_t port_init(void) { MXC_RTC_EnableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE); // Enable RTC - while ( MXC_RTC_Start() != E_SUCCESS ) {}; + while (MXC_RTC_Start() != E_SUCCESS) { + } + ; return SAFE_MODE_NONE; } @@ -191,9 +197,10 @@ uint64_t port_get_raw_ticks(uint8_t *subticks) { __disable_irq(); if (MXC_RTC->ctrl & MXC_F_RTC_CTRL_EN) { // NOTE: RTC_GetTime always returns BUSY if RTC is not running - while( (MXC_RTC_GetTime(&sec, &subsec)) != E_NO_ERROR ); - } - else { + while ((MXC_RTC_GetTime(&sec, &subsec)) != E_NO_ERROR) { + ; + } + } else { sec = MXC_RTC->sec; subsec = MXC_RTC->ssec; } @@ -232,15 +239,19 @@ void port_interrupt_after_ticks(uint32_t ticks) { ticks_msec = 1000 * ticks / TICKS_PER_SEC; while (MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE | - MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) {}; + MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) { + } + ; // Clear the flag to be set by the RTC Handler tick_flag = 0; // Subsec alarm is the starting/reload value of the SSEC counter. // ISR triggered when SSEC rolls over from 0xFFFF_FFFF to 0x0 - while ( MXC_RTC_SetSubsecondAlarm(MSEC_TO_SS_ALARM(ticks_msec) ) == E_BUSY) {} - while (MXC_RTC_EnableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE) == E_BUSY) {} + while (MXC_RTC_SetSubsecondAlarm(MSEC_TO_SS_ALARM(ticks_msec)) == E_BUSY) { + } + while (MXC_RTC_EnableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE) == E_BUSY) { + } NVIC_EnableIRQ(RTC_IRQn); @@ -249,10 +260,10 @@ void port_interrupt_after_ticks(uint32_t ticks) { void port_idle_until_interrupt(void) { #if CIRCUITPY_RTC - // Check if alarm triggers before we even got here - if (MXC_RTC_GetFlags() == (MXC_F_RTC_CTRL_TOD_ALARM | MXC_F_RTC_CTRL_SSEC_ALARM)) { - return; - } + // Check if alarm triggers before we even got here + if (MXC_RTC_GetFlags() == (MXC_F_RTC_CTRL_TOD_ALARM | MXC_F_RTC_CTRL_SSEC_ALARM)) { + return; + } #endif // Interrupts should be disabled to ensure the ISR queue is flushed From 76cc006153450d19d0903dfcef009ddfff204d72 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Fri, 27 Sep 2024 09:57:01 -0700 Subject: [PATCH 20/39] Manual pre-commit fix for last delinquent file --- ports/analog/supervisor/port.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index 065ac3b3c437..1c068cb22c1d 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -45,9 +45,8 @@ #include "rtc.h" // msec to RTC subsec ticks (4 kHz) -#define MSEC_TO_SS_ALARM(x) \ - (0 - ((x * 4096) / \ - 1000)) /* Converts a time in milleseconds to the equivalent RSSA register value. */ +/* Converts a time in milleseconds to equivalent RSSA register value */ +#define MSEC_TO_SS_ALARM(x) (0 - ((x * 4096) / 1000)) // Externs defined by linker .ld file extern uint32_t _stack, _heap, _estack, _eheap; From 8e753d3cbf0292b7fc85b1419724ecc8f5b1f894 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Tue, 1 Oct 2024 08:44:14 -0700 Subject: [PATCH 21/39] - Move SysTick init from board_init to port_init. - Fix RTC issue with interrupt_after_ticks. - Move LED inidcator to STATUS_LED code. --- ports/analog/Makefile | 2 +- ports/analog/boards/apard32690/README.md | 2 +- ports/analog/boards/apard32690/board.c | 18 ------- .../analog/boards/apard32690/mpconfigboard.h | 2 + ports/analog/boards/max32690evkit/board.c | 18 ------- .../boards/max32690evkit/mpconfigboard.h | 3 ++ ports/analog/supervisor/port.c | 52 ++++++++++--------- 7 files changed, 34 insertions(+), 63 deletions(-) diff --git a/ports/analog/Makefile b/ports/analog/Makefile index 766f0f78b930..79eb7a49052d 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -259,7 +259,7 @@ SRC_QSTR_PREPROCESSOR += # Default build target all: $(BUILD)/firmware.elf $(BUILD)/firmware.hex $(BUILD)/firmware.bin -clean-max32: +clean-all: rm -rf build-* # Optional flash option when running within an installed MSDK to use OpenOCD diff --git a/ports/analog/boards/apard32690/README.md b/ports/analog/boards/apard32690/README.md index 04f28ca4502b..3e8464854cb3 100644 --- a/ports/analog/boards/apard32690/README.md +++ b/ports/analog/boards/apard32690/README.md @@ -18,7 +18,7 @@ For more info about AD-APARD32690-SL, visit our product webpages for datasheets, To build for this board, ensure you are in the `ports/analog` directory and run the following command. Note that passing in the `-jN` flag, where N is the # of cores on your machine, can speed up compile times. ``` -make BOARD=APARD +make BOARD=apard32690 ``` #### Flashing this board diff --git a/ports/analog/boards/apard32690/board.c b/ports/analog/boards/apard32690/board.c index 3cc10de29f1e..cfef4bfcf61a 100644 --- a/ports/analog/boards/apard32690/board.c +++ b/ports/analog/boards/apard32690/board.c @@ -47,24 +47,6 @@ uint32_t board_millis(void) { // Initializes board related state once on start up. void board_init(void) { - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); \ - - // Enable GPIO (enables clocks + common init for ports) - for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++) { - MXC_GPIO_Init(0x1 << i); - } - - // Init Board LEDs - /* setup GPIO for the LED */ - for (int i = 0; i < num_leds; i++) { - // Set the output value - MXC_GPIO_OutClr(led_pin[i].port, led_pin[i].mask); - MXC_GPIO_Config(&led_pin[i]); - } - - // Turn on one LED to indicate Sign of Life - MXC_GPIO_OutSet(led_pin[2].port, led_pin[2].mask); } // Reset the state of off MCU components such as neopixels. diff --git a/ports/analog/boards/apard32690/mpconfigboard.h b/ports/analog/boards/apard32690/mpconfigboard.h index 0e09a4ede674..19b75a79d810 100644 --- a/ports/analog/boards/apard32690/mpconfigboard.h +++ b/ports/analog/boards/apard32690/mpconfigboard.h @@ -36,3 +36,5 @@ // #else // #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) // #endif + + #define MICROPY_HW_LED_STATUS (&pin_P2_01) diff --git a/ports/analog/boards/max32690evkit/board.c b/ports/analog/boards/max32690evkit/board.c index 76da5c0adccb..ebb8b2da35fc 100644 --- a/ports/analog/boards/max32690evkit/board.c +++ b/ports/analog/boards/max32690evkit/board.c @@ -46,24 +46,6 @@ uint32_t board_millis(void) { // Initializes board related state once on start up. void board_init(void) { - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); \ - - // Enable GPIO (enables clocks + common init for ports) - for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++) { - MXC_GPIO_Init(0x1 << i); - } - - // Init Board LEDs - /* setup GPIO for the LED */ - for (int i = 0; i < num_leds; i++) { - // Set the output value - MXC_GPIO_OutClr(led_pin[i].port, led_pin[i].mask); - MXC_GPIO_Config(&led_pin[i]); - } - - // Turn on one LED to indicate Sign of Life - MXC_GPIO_OutSet(led_pin[2].port, led_pin[2].mask); } // Reset the state of off MCU components such as neopixels. diff --git a/ports/analog/boards/max32690evkit/mpconfigboard.h b/ports/analog/boards/max32690evkit/mpconfigboard.h index 7ab6acf658d1..e4395e8a0ae7 100644 --- a/ports/analog/boards/max32690evkit/mpconfigboard.h +++ b/ports/analog/boards/max32690evkit/mpconfigboard.h @@ -36,3 +36,6 @@ // #else // #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) // #endif + +#define MICROPY_HW_LED_STATUS (&pin_P2_12) +#define MICROPY_HW_LED_STATUS_INVERTED 1 diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index 1c068cb22c1d..6ef3b350744e 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -68,6 +68,9 @@ extern void NVIC_SystemReset(void) NORETURN; safe_mode_t port_init(void) { int err = E_NO_ERROR; + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); + // Enable GPIO (enables clocks + common init for ports) for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++) { err = MXC_GPIO_Init(0x1 << i); @@ -122,12 +125,18 @@ void RTC_IRQHandler(void) { // Read flags to clear int flags = MXC_RTC_GetFlags(); - if (flags & MXC_F_RTC_CTRL_SSEC_ALARM) { - MXC_RTC_ClearFlags(MXC_F_RTC_CTRL_SSEC_ALARM); - } - - if (flags & MXC_F_RTC_CTRL_TOD_ALARM) { - MXC_RTC_ClearFlags(MXC_F_RTC_CTRL_TOD_ALARM); + switch (flags) { + case MXC_F_RTC_CTRL_SSEC_ALARM: + MXC_RTC_ClearFlags(MXC_F_RTC_CTRL_SSEC_ALARM); + break; + case MXC_F_RTC_CTRL_TOD_ALARM: + MXC_RTC_ClearFlags(MXC_F_RTC_CTRL_TOD_ALARM); + break; + case MXC_F_RTC_CTRL_RDY: + MXC_RTC_ClearFlags(MXC_F_RTC_CTRL_RDY); + break; + default: + break; } tick_flag = 1; @@ -145,7 +154,7 @@ void reset_port(void) { } // Reset to the bootloader -// note: not implemented since max32 requires external stim ignals to +// note: not implemented since max32 requires external signals to // activate bootloaders void reset_to_bootloader(void) { NVIC_SystemReset(); @@ -193,7 +202,6 @@ uint32_t port_get_saved_word(void) { uint64_t port_get_raw_ticks(uint8_t *subticks) { // Ensure we can read from ssec register as soon as we can // MXC function does cross-tick / busy checking of RTC controller - __disable_irq(); if (MXC_RTC->ctrl & MXC_F_RTC_CTRL_EN) { // NOTE: RTC_GetTime always returns BUSY if RTC is not running while ((MXC_RTC_GetTime(&sec, &subsec)) != E_NO_ERROR) { @@ -203,7 +211,6 @@ uint64_t port_get_raw_ticks(uint8_t *subticks) { sec = MXC_RTC->sec; subsec = MXC_RTC->ssec; } - __enable_irq(); // Return ticks given total subseconds // ticks = TICKS/s * s + subsec/ subs/tick @@ -220,41 +227,36 @@ uint64_t port_get_raw_ticks(uint8_t *subticks) { // Enable 1/1024 second tick. void port_enable_tick(void) { - MXC_RTC_Start(); + while ( MXC_RTC_Start() == E_BUSY ); } // Disable 1/1024 second tick. void port_disable_tick(void) { - MXC_RTC_Stop(); + while( MXC_RTC_Stop() == E_BUSY ); } // Wake the CPU after a given # of ticks or sooner void port_interrupt_after_ticks(uint32_t ticks) { uint32_t ticks_msec = 0; - // Stop RTC & store current time & ticks - port_disable_tick(); - port_get_raw_ticks(NULL); - ticks_msec = 1000 * ticks / TICKS_PER_SEC; + ticks_msec = (ticks / TICKS_PER_SEC) * 1000; - while (MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE | - MXC_F_RTC_CTRL_TOD_ALARM_IE) == E_BUSY) { - } - ; + // Disable RTC interrupts + MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE | + MXC_F_RTC_CTRL_TOD_ALARM_IE | MXC_F_RTC_CTRL_RDY_IE); + + // Stop RTC & store current time & ticks + port_get_raw_ticks(NULL); // Clear the flag to be set by the RTC Handler tick_flag = 0; // Subsec alarm is the starting/reload value of the SSEC counter. // ISR triggered when SSEC rolls over from 0xFFFF_FFFF to 0x0 - while (MXC_RTC_SetSubsecondAlarm(MSEC_TO_SS_ALARM(ticks_msec)) == E_BUSY) { - } - while (MXC_RTC_EnableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE) == E_BUSY) { - } + while (MXC_RTC_SetSubsecondAlarm(MSEC_TO_SS_ALARM(ticks_msec)) != E_SUCCESS) {} - NVIC_EnableIRQ(RTC_IRQn); + MXC_RTC_EnableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE); - port_enable_tick(); } void port_idle_until_interrupt(void) { From 79d2fc59f93c05b17579e00f349c3713f55f4e63 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Tue, 1 Oct 2024 17:00:33 -0700 Subject: [PATCH 22/39] - Changed board.c to match silkscreen. - Added digitalio handling for GPIO Port 4 (different on MAX32690). - Added MCR defs to max32_port.h. --- ports/analog/boards/apard32690/pins.c | 91 ++++++++------- ports/analog/boards/max32690evkit/pins.c | 89 +++++++------- .../common-hal/digitalio/DigitalInOut.c | 110 +++++++++++++----- ports/analog/max32_port.h | 29 +++++ 4 files changed, 203 insertions(+), 116 deletions(-) diff --git a/ports/analog/boards/apard32690/pins.c b/ports/analog/boards/apard32690/pins.c index 0486687d3347..f4970aff7aeb 100644 --- a/ports/analog/boards/apard32690/pins.c +++ b/ports/analog/boards/apard32690/pins.c @@ -10,16 +10,16 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS // P0 - { MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) }, - { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, - { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, - { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, - { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, - { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, - { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, - { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, - { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, - { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_0), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_P0_1), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_P0_2), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_3), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P0_4), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_5), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_6), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_7), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P0_8), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_9), MP_ROM_PTR(&pin_P0_09) }, { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, @@ -43,16 +43,16 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, // P1 - { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, - { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, - { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, - { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, - { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, - { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, - { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, - { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, - { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, - { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_P1_0), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_P1_1), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_P1_2), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_3), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_P1_4), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_P1_5), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_P1_6), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_P1_7), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_8), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_P1_9), MP_ROM_PTR(&pin_P1_09) }, { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, @@ -76,16 +76,16 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P1_30), MP_ROM_PTR(&pin_P1_30) }, { MP_ROM_QSTR(MP_QSTR_P1_31), MP_ROM_PTR(&pin_P1_31) }, // P2 - { MP_ROM_QSTR(MP_QSTR_P2_00), MP_ROM_PTR(&pin_P2_00) }, - { MP_ROM_QSTR(MP_QSTR_P2_01), MP_ROM_PTR(&pin_P2_01) }, - { MP_ROM_QSTR(MP_QSTR_P2_02), MP_ROM_PTR(&pin_P2_02) }, - { MP_ROM_QSTR(MP_QSTR_P2_03), MP_ROM_PTR(&pin_P2_03) }, - { MP_ROM_QSTR(MP_QSTR_P2_04), MP_ROM_PTR(&pin_P2_04) }, - { MP_ROM_QSTR(MP_QSTR_P2_05), MP_ROM_PTR(&pin_P2_05) }, - { MP_ROM_QSTR(MP_QSTR_P2_06), MP_ROM_PTR(&pin_P2_06) }, - { MP_ROM_QSTR(MP_QSTR_P2_07), MP_ROM_PTR(&pin_P2_07) }, - { MP_ROM_QSTR(MP_QSTR_P2_08), MP_ROM_PTR(&pin_P2_08) }, - { MP_ROM_QSTR(MP_QSTR_P2_09), MP_ROM_PTR(&pin_P2_09) }, + { MP_ROM_QSTR(MP_QSTR_P2_0), MP_ROM_PTR(&pin_P2_00) }, + { MP_ROM_QSTR(MP_QSTR_P2_1), MP_ROM_PTR(&pin_P2_01) }, + { MP_ROM_QSTR(MP_QSTR_P2_2), MP_ROM_PTR(&pin_P2_02) }, + { MP_ROM_QSTR(MP_QSTR_P2_3), MP_ROM_PTR(&pin_P2_03) }, + { MP_ROM_QSTR(MP_QSTR_P2_4), MP_ROM_PTR(&pin_P2_04) }, + { MP_ROM_QSTR(MP_QSTR_P2_5), MP_ROM_PTR(&pin_P2_05) }, + { MP_ROM_QSTR(MP_QSTR_P2_6), MP_ROM_PTR(&pin_P2_06) }, + { MP_ROM_QSTR(MP_QSTR_P2_7), MP_ROM_PTR(&pin_P2_07) }, + { MP_ROM_QSTR(MP_QSTR_P2_8), MP_ROM_PTR(&pin_P2_08) }, + { MP_ROM_QSTR(MP_QSTR_P2_9), MP_ROM_PTR(&pin_P2_09) }, { MP_ROM_QSTR(MP_QSTR_P2_10), MP_ROM_PTR(&pin_P2_10) }, { MP_ROM_QSTR(MP_QSTR_P2_11), MP_ROM_PTR(&pin_P2_11) }, { MP_ROM_QSTR(MP_QSTR_P2_12), MP_ROM_PTR(&pin_P2_12) }, @@ -109,18 +109,25 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P2_30), MP_ROM_PTR(&pin_P2_30) }, { MP_ROM_QSTR(MP_QSTR_P2_31), MP_ROM_PTR(&pin_P2_31) }, // P3 - { MP_ROM_QSTR(MP_QSTR_P3_00), MP_ROM_PTR(&pin_P3_00) }, - { MP_ROM_QSTR(MP_QSTR_P3_01), MP_ROM_PTR(&pin_P3_01) }, - { MP_ROM_QSTR(MP_QSTR_P3_02), MP_ROM_PTR(&pin_P3_02) }, - { MP_ROM_QSTR(MP_QSTR_P3_03), MP_ROM_PTR(&pin_P3_03) }, - { MP_ROM_QSTR(MP_QSTR_P3_04), MP_ROM_PTR(&pin_P3_04) }, - { MP_ROM_QSTR(MP_QSTR_P3_05), MP_ROM_PTR(&pin_P3_05) }, - { MP_ROM_QSTR(MP_QSTR_P3_06), MP_ROM_PTR(&pin_P3_06) }, - { MP_ROM_QSTR(MP_QSTR_P3_07), MP_ROM_PTR(&pin_P3_07) }, - { MP_ROM_QSTR(MP_QSTR_P3_08), MP_ROM_PTR(&pin_P3_08) }, - { MP_ROM_QSTR(MP_QSTR_P3_09), MP_ROM_PTR(&pin_P3_09) }, + { MP_ROM_QSTR(MP_QSTR_P3_0), MP_ROM_PTR(&pin_P3_00) }, + { MP_ROM_QSTR(MP_QSTR_P3_1), MP_ROM_PTR(&pin_P3_01) }, + { MP_ROM_QSTR(MP_QSTR_P3_2), MP_ROM_PTR(&pin_P3_02) }, + { MP_ROM_QSTR(MP_QSTR_P3_3), MP_ROM_PTR(&pin_P3_03) }, + { MP_ROM_QSTR(MP_QSTR_P3_4), MP_ROM_PTR(&pin_P3_04) }, + { MP_ROM_QSTR(MP_QSTR_P3_5), MP_ROM_PTR(&pin_P3_05) }, + { MP_ROM_QSTR(MP_QSTR_P3_6), MP_ROM_PTR(&pin_P3_06) }, + { MP_ROM_QSTR(MP_QSTR_P3_7), MP_ROM_PTR(&pin_P3_07) }, + { MP_ROM_QSTR(MP_QSTR_P3_8), MP_ROM_PTR(&pin_P3_08) }, + { MP_ROM_QSTR(MP_QSTR_P3_9), MP_ROM_PTR(&pin_P3_09) }, // P4 - { MP_ROM_QSTR(MP_QSTR_P4_00), MP_ROM_PTR(&pin_P4_00) }, - { MP_ROM_QSTR(MP_QSTR_P4_01), MP_ROM_PTR(&pin_P4_01) }, + { MP_ROM_QSTR(MP_QSTR_P4_0), MP_ROM_PTR(&pin_P4_00) }, + { MP_ROM_QSTR(MP_QSTR_P4_1), MP_ROM_PTR(&pin_P4_01) }, + + // Silkscreen aliases + { MP_ROM_QSTR(MP_QSTR_LED0), MP_ROM_PTR(&pin_P2_01) }, + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_S2), MP_ROM_PTR(&pin_P1_27) }, + }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/analog/boards/max32690evkit/pins.c b/ports/analog/boards/max32690evkit/pins.c index 0486687d3347..3270e4d62b2a 100644 --- a/ports/analog/boards/max32690evkit/pins.c +++ b/ports/analog/boards/max32690evkit/pins.c @@ -10,16 +10,16 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS // P0 - { MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) }, - { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, - { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, - { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, - { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, - { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, - { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, - { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, - { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, - { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_0), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_P0_1), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_P0_2), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_3), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P0_4), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_5), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_6), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_7), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P0_8), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_9), MP_ROM_PTR(&pin_P0_09) }, { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, @@ -43,16 +43,16 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, // P1 - { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, - { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, - { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, - { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, - { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, - { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, - { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, - { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, - { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, - { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_P1_0), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_P1_1), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_P1_2), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_3), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_P1_4), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_P1_5), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_P1_6), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_P1_7), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_8), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_P1_9), MP_ROM_PTR(&pin_P1_09) }, { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, @@ -76,16 +76,16 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P1_30), MP_ROM_PTR(&pin_P1_30) }, { MP_ROM_QSTR(MP_QSTR_P1_31), MP_ROM_PTR(&pin_P1_31) }, // P2 - { MP_ROM_QSTR(MP_QSTR_P2_00), MP_ROM_PTR(&pin_P2_00) }, - { MP_ROM_QSTR(MP_QSTR_P2_01), MP_ROM_PTR(&pin_P2_01) }, - { MP_ROM_QSTR(MP_QSTR_P2_02), MP_ROM_PTR(&pin_P2_02) }, - { MP_ROM_QSTR(MP_QSTR_P2_03), MP_ROM_PTR(&pin_P2_03) }, - { MP_ROM_QSTR(MP_QSTR_P2_04), MP_ROM_PTR(&pin_P2_04) }, - { MP_ROM_QSTR(MP_QSTR_P2_05), MP_ROM_PTR(&pin_P2_05) }, - { MP_ROM_QSTR(MP_QSTR_P2_06), MP_ROM_PTR(&pin_P2_06) }, - { MP_ROM_QSTR(MP_QSTR_P2_07), MP_ROM_PTR(&pin_P2_07) }, - { MP_ROM_QSTR(MP_QSTR_P2_08), MP_ROM_PTR(&pin_P2_08) }, - { MP_ROM_QSTR(MP_QSTR_P2_09), MP_ROM_PTR(&pin_P2_09) }, + { MP_ROM_QSTR(MP_QSTR_P2_0), MP_ROM_PTR(&pin_P2_00) }, + { MP_ROM_QSTR(MP_QSTR_P2_1), MP_ROM_PTR(&pin_P2_01) }, + { MP_ROM_QSTR(MP_QSTR_P2_2), MP_ROM_PTR(&pin_P2_02) }, + { MP_ROM_QSTR(MP_QSTR_P2_3), MP_ROM_PTR(&pin_P2_03) }, + { MP_ROM_QSTR(MP_QSTR_P2_4), MP_ROM_PTR(&pin_P2_04) }, + { MP_ROM_QSTR(MP_QSTR_P2_5), MP_ROM_PTR(&pin_P2_05) }, + { MP_ROM_QSTR(MP_QSTR_P2_6), MP_ROM_PTR(&pin_P2_06) }, + { MP_ROM_QSTR(MP_QSTR_P2_7), MP_ROM_PTR(&pin_P2_07) }, + { MP_ROM_QSTR(MP_QSTR_P2_8), MP_ROM_PTR(&pin_P2_08) }, + { MP_ROM_QSTR(MP_QSTR_P2_9), MP_ROM_PTR(&pin_P2_09) }, { MP_ROM_QSTR(MP_QSTR_P2_10), MP_ROM_PTR(&pin_P2_10) }, { MP_ROM_QSTR(MP_QSTR_P2_11), MP_ROM_PTR(&pin_P2_11) }, { MP_ROM_QSTR(MP_QSTR_P2_12), MP_ROM_PTR(&pin_P2_12) }, @@ -109,18 +109,23 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P2_30), MP_ROM_PTR(&pin_P2_30) }, { MP_ROM_QSTR(MP_QSTR_P2_31), MP_ROM_PTR(&pin_P2_31) }, // P3 - { MP_ROM_QSTR(MP_QSTR_P3_00), MP_ROM_PTR(&pin_P3_00) }, - { MP_ROM_QSTR(MP_QSTR_P3_01), MP_ROM_PTR(&pin_P3_01) }, - { MP_ROM_QSTR(MP_QSTR_P3_02), MP_ROM_PTR(&pin_P3_02) }, - { MP_ROM_QSTR(MP_QSTR_P3_03), MP_ROM_PTR(&pin_P3_03) }, - { MP_ROM_QSTR(MP_QSTR_P3_04), MP_ROM_PTR(&pin_P3_04) }, - { MP_ROM_QSTR(MP_QSTR_P3_05), MP_ROM_PTR(&pin_P3_05) }, - { MP_ROM_QSTR(MP_QSTR_P3_06), MP_ROM_PTR(&pin_P3_06) }, - { MP_ROM_QSTR(MP_QSTR_P3_07), MP_ROM_PTR(&pin_P3_07) }, - { MP_ROM_QSTR(MP_QSTR_P3_08), MP_ROM_PTR(&pin_P3_08) }, - { MP_ROM_QSTR(MP_QSTR_P3_09), MP_ROM_PTR(&pin_P3_09) }, + { MP_ROM_QSTR(MP_QSTR_P3_0), MP_ROM_PTR(&pin_P3_00) }, + { MP_ROM_QSTR(MP_QSTR_P3_1), MP_ROM_PTR(&pin_P3_01) }, + { MP_ROM_QSTR(MP_QSTR_P3_2), MP_ROM_PTR(&pin_P3_02) }, + { MP_ROM_QSTR(MP_QSTR_P3_3), MP_ROM_PTR(&pin_P3_03) }, + { MP_ROM_QSTR(MP_QSTR_P3_4), MP_ROM_PTR(&pin_P3_04) }, + { MP_ROM_QSTR(MP_QSTR_P3_5), MP_ROM_PTR(&pin_P3_05) }, + { MP_ROM_QSTR(MP_QSTR_P3_6), MP_ROM_PTR(&pin_P3_06) }, + { MP_ROM_QSTR(MP_QSTR_P3_7), MP_ROM_PTR(&pin_P3_07) }, + { MP_ROM_QSTR(MP_QSTR_P3_8), MP_ROM_PTR(&pin_P3_08) }, + { MP_ROM_QSTR(MP_QSTR_P3_9), MP_ROM_PTR(&pin_P3_09) }, // P4 - { MP_ROM_QSTR(MP_QSTR_P4_00), MP_ROM_PTR(&pin_P4_00) }, - { MP_ROM_QSTR(MP_QSTR_P4_01), MP_ROM_PTR(&pin_P4_01) }, + { MP_ROM_QSTR(MP_QSTR_P4_0), MP_ROM_PTR(&pin_P4_00) }, + { MP_ROM_QSTR(MP_QSTR_P4_1), MP_ROM_PTR(&pin_P4_01) }, + + // Board silkscreen Aliases + { MP_ROM_QSTR(MP_QSTR_LED0), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P2_12) }, + { MP_ROM_QSTR(MP_QSTR_PB0), MP_ROM_PTR(&pin_P4_00) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/analog/common-hal/digitalio/DigitalInOut.c b/ports/analog/common-hal/digitalio/DigitalInOut.c index 166021b44128..c5d8bbd508db 100644 --- a/ports/analog/common-hal/digitalio/DigitalInOut.c +++ b/ports/analog/common-hal/digitalio/DigitalInOut.c @@ -8,7 +8,9 @@ #include "shared-bindings/digitalio/DigitalInOut.h" #include "shared-bindings/microcontroller/Pin.h" +#include "max32_port.h" #include "gpio_reva.h" +#include "mxc_errors.h" extern mxc_gpio_regs_t *gpio_ports[NUM_GPIO_PORTS]; @@ -53,8 +55,19 @@ digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_input( digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; + int err=E_NO_ERROR; - MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_IN, mask); + if (self->pin->port == 4) { + // Set GPIO(s) to input mode + MXC_MCR->gpio4_ctrl &= ~GPIO4_OUTEN_MASK(mask); + MXC_MCR->outen &= ~GPIO4_AFEN_MASK(mask); + } + else { + err = MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_IN, mask); + } + if (err != E_NO_ERROR) { + return DIGITALINOUT_PIN_BUSY; + } return common_hal_digitalio_digitalinout_set_pull(self, pull); } @@ -64,7 +77,14 @@ digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; - MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_OUT, mask); + if (self->pin->port == 4) { + // Set GPIO(s) to output mode + MXC_MCR->gpio4_ctrl |= GPIO4_OUTEN_MASK(mask); + MXC_MCR->outen &= ~GPIO4_AFEN_MASK(mask); + } + else { + MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_OUT, mask); + } common_hal_digitalio_digitalinout_set_value(self, value); // todo (low): MSDK Hardware does not support open-drain configuration except @@ -82,17 +102,27 @@ digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; - // Check that I/O mode is enabled and we don't have in AND out on at the same time - MP_STATIC_ASSERT(!((port->en0 & mask) && (port->inen & mask) && (port->outen & mask))); + if (self->pin->port < 4) { + // Check that I/O mode is enabled and we don't have in AND out on at the same time + MP_STATIC_ASSERT(!((port->en0 & mask) && (port->inen & mask) && (port->outen & mask))); - if ((port->en0 & mask) && (port->outen & mask)) { - return DIRECTION_OUTPUT; - } else if ((port->en0 & mask) && (port->inen & mask)) { - return DIRECTION_INPUT; + if ((port->en0 & mask) && (port->outen & mask)) { + return DIRECTION_OUTPUT; + } else if ((port->en0 & mask) && (port->inen & mask)) { + return DIRECTION_INPUT; + } + // do not try to drive a pin which has an odd configuration here + else { + return DIRECTION_INPUT; + } } - // do not try to drive a pin which has an odd configuration here else { - return DIRECTION_INPUT; + if (MXC_MCR->gpio4_ctrl & GPIO4_OUTEN_MASK(mask)) { + return DIRECTION_OUTPUT; + } + else { + return DIRECTION_INPUT; + } } } @@ -121,15 +151,22 @@ bool common_hal_digitalio_digitalinout_get_value(digitalio_digitalinout_obj_t *s uint32_t mask = self->pin->mask; if (dir == DIRECTION_INPUT) { - return MXC_GPIO_InGet(port, mask); + if (self->pin->port == 4) { + return (bool)(MXC_MCR->gpio4_ctrl & GPIO4_DATAIN_MASK(mask)); + } + return (MXC_GPIO_InGet(port, mask) && mask); } else { - return (port->out & mask) == true; + return (MXC_GPIO_OutGet(port, mask) && mask); } } +/** FIXME: Implement open-drain by switching to input WITHOUT re-labeling the pin */ digitalinout_result_t common_hal_digitalio_digitalinout_set_drive_mode( digitalio_digitalinout_obj_t *self, digitalio_drive_mode_t drive_mode) { + if (drive_mode == DRIVE_MODE_OPEN_DRAIN) { + common_hal_digitalio_digitalinout_switch_to_input(self, PULL_NONE); + } // On MAX32, drive mode is not configurable // and should always be push-pull unless managed by a peripheral like I2C return DIGITALINOUT_OK; @@ -146,30 +183,39 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; - if ((port->en0 & mask) && (port->inen & mask)) { - // PULL_NONE, PULL_UP, or PULL_DOWN - switch (pull) { - case PULL_NONE: - port->padctrl0 &= ~(mask); - port->padctrl1 &= ~(mask); - break; - case PULL_UP: - port->padctrl0 |= mask; - port->padctrl1 &= ~(mask); - break; - case PULL_DOWN: - port->padctrl0 &= ~(mask); - port->padctrl1 |= mask; - break; - default: - break; - } + // padctrl registers only work in input mode + if (self->pin->port == 4) { + MXC_MCR->gpio4_ctrl &= ~(GPIO4_PULLDIS_MASK(mask)); return DIGITALINOUT_OK; - } else { - return DIGITALINOUT_PIN_BUSY; + } + else { + if ((mask & port->en0) & (mask & ~(port->outen))) { + // PULL_NONE, PULL_UP, or PULL_DOWN + switch (pull) { + case PULL_NONE: + port->padctrl0 &= ~(mask); + port->padctrl1 &= ~(mask); + break; + case PULL_UP: + port->padctrl0 |= mask; + port->padctrl1 &= ~(mask); + break; + case PULL_DOWN: + port->padctrl0 &= ~(mask); + port->padctrl1 |= mask; + break; + default: + break; + } + return DIGITALINOUT_OK; + } + else { + return DIGITALINOUT_PIN_BUSY; + } } } +/** FIXME: Account for GPIO4 handling here */ digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( digitalio_digitalinout_obj_t *self) { diff --git a/ports/analog/max32_port.h b/ports/analog/max32_port.h index fe6d5e157fea..8781bd56238b 100644 --- a/ports/analog/max32_port.h +++ b/ports/analog/max32_port.h @@ -14,12 +14,41 @@ #include "mxc_device.h" #include "mxc_pins.h" #include "mxc_sys.h" +#include "mcr_regs.h" #include "gpio.h" #ifdef MAX32690 #include "system_max32690.h" #include "max32690.h" + +/** START: GPIO4 Handling specific to MAX32690 */ +#define GPIO4_PIN_MASK 0x00000003 +#define GPIO4_RESET_MASK 0xFFFFFF77 +#define GPIO4_OUTEN_MASK(mask) \ + (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_OE_POS) | \ + ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_OE_POS - 1))) +#define GPIO4_PULLDIS_MASK(mask) \ + (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_PE_POS) | \ + ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_PE_POS - 1))) +#define GPIO4_DATAOUT_MASK(mask) \ + (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \ + ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1))) +#define GPIO4_DATAOUT_GET_MASK(mask) \ + ((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_DO) >> MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \ + ((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P41_DO) >> \ + (MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1))) & \ + mask) +#define GPIO4_DATAIN_MASK(mask) \ + ((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_IN) >> MXC_F_MCR_GPIO4_CTRL_P40_IN_POS) | \ + ((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P41_IN) >> \ + (MXC_F_MCR_GPIO4_CTRL_P41_IN_POS - 1))) & \ + mask) +#define GPIO4_AFEN_MASK(mask) \ + (((mask & (1 << 0)) << MXC_F_MCR_OUTEN_PDOWN_OUT_EN_POS) | \ + ((mask & (1 << 1)) >> (MXC_F_MCR_OUTEN_SQWOUT_EN_POS + 1))) +/** END: GPIO4 Handling specific to MAX32690 */ + #endif /** Linker variables defined.... From 0fe33e11104e41c2f647aabc54c71f2494046447 Mon Sep 17 00:00:00 2001 From: "U-ANALOG\\BHurst" Date: Tue, 1 Oct 2024 17:29:45 -0700 Subject: [PATCH 23/39] pre-commit formatting fixes --- .../common-hal/digitalio/DigitalInOut.c | 33 +++++++------------ ports/analog/max32_port.h | 32 +++++++++--------- ports/analog/supervisor/port.c | 11 +++++-- 3 files changed, 36 insertions(+), 40 deletions(-) diff --git a/ports/analog/common-hal/digitalio/DigitalInOut.c b/ports/analog/common-hal/digitalio/DigitalInOut.c index c5d8bbd508db..3861900d81cd 100644 --- a/ports/analog/common-hal/digitalio/DigitalInOut.c +++ b/ports/analog/common-hal/digitalio/DigitalInOut.c @@ -55,14 +55,13 @@ digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_input( digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; - int err=E_NO_ERROR; + int err = E_NO_ERROR; if (self->pin->port == 4) { // Set GPIO(s) to input mode MXC_MCR->gpio4_ctrl &= ~GPIO4_OUTEN_MASK(mask); MXC_MCR->outen &= ~GPIO4_AFEN_MASK(mask); - } - else { + } else { err = MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_IN, mask); } if (err != E_NO_ERROR) { @@ -81,8 +80,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( // Set GPIO(s) to output mode MXC_MCR->gpio4_ctrl |= GPIO4_OUTEN_MASK(mask); MXC_MCR->outen &= ~GPIO4_AFEN_MASK(mask); - } - else { + } else { MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_OUT, mask); } common_hal_digitalio_digitalinout_set_value(self, value); @@ -110,17 +108,14 @@ digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( return DIRECTION_OUTPUT; } else if ((port->en0 & mask) && (port->inen & mask)) { return DIRECTION_INPUT; - } - // do not try to drive a pin which has an odd configuration here - else { + // do not try to drive a pin which has an odd configuration here + } else { return DIRECTION_INPUT; } - } - else { + } else { if (MXC_MCR->gpio4_ctrl & GPIO4_OUTEN_MASK(mask)) { return DIRECTION_OUTPUT; - } - else { + } else { return DIRECTION_INPUT; } } @@ -154,9 +149,9 @@ bool common_hal_digitalio_digitalinout_get_value(digitalio_digitalinout_obj_t *s if (self->pin->port == 4) { return (bool)(MXC_MCR->gpio4_ctrl & GPIO4_DATAIN_MASK(mask)); } - return (MXC_GPIO_InGet(port, mask) && mask); + return MXC_GPIO_InGet(port, mask) && mask; } else { - return (MXC_GPIO_OutGet(port, mask) && mask); + return MXC_GPIO_OutGet(port, mask) && mask; } } @@ -187,8 +182,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( if (self->pin->port == 4) { MXC_MCR->gpio4_ctrl &= ~(GPIO4_PULLDIS_MASK(mask)); return DIGITALINOUT_OK; - } - else { + } else { if ((mask & port->en0) & (mask & ~(port->outen))) { // PULL_NONE, PULL_UP, or PULL_DOWN switch (pull) { @@ -208,8 +202,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( break; } return DIGITALINOUT_OK; - } - else { + } else { return DIGITALINOUT_PIN_BUSY; } } @@ -228,9 +221,7 @@ digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( return PULL_DOWN; } else if (!(pin_padctrl0) && !(pin_padctrl1)) { return PULL_NONE; - } - // Shouldn't happen, (value 0b11 is reserved) - else { + } else { return PULL_NONE; } } diff --git a/ports/analog/max32_port.h b/ports/analog/max32_port.h index 8781bd56238b..64c6915aa68d 100644 --- a/ports/analog/max32_port.h +++ b/ports/analog/max32_port.h @@ -26,27 +26,27 @@ #define GPIO4_PIN_MASK 0x00000003 #define GPIO4_RESET_MASK 0xFFFFFF77 #define GPIO4_OUTEN_MASK(mask) \ - (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_OE_POS) | \ - ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_OE_POS - 1))) + (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_OE_POS) | \ + ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_OE_POS - 1))) #define GPIO4_PULLDIS_MASK(mask) \ - (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_PE_POS) | \ - ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_PE_POS - 1))) + (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_PE_POS) | \ + ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_PE_POS - 1))) #define GPIO4_DATAOUT_MASK(mask) \ - (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \ - ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1))) + (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \ + ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1))) #define GPIO4_DATAOUT_GET_MASK(mask) \ - ((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_DO) >> MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \ - ((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P41_DO) >> \ - (MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1))) & \ - mask) + ((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_DO) >> MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \ + ((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P41_DO) >> \ + (MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1)))& \ + mask) #define GPIO4_DATAIN_MASK(mask) \ - ((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_IN) >> MXC_F_MCR_GPIO4_CTRL_P40_IN_POS) | \ - ((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P41_IN) >> \ - (MXC_F_MCR_GPIO4_CTRL_P41_IN_POS - 1))) & \ - mask) + ((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_IN) >> MXC_F_MCR_GPIO4_CTRL_P40_IN_POS) | \ + ((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P41_IN) >> \ + (MXC_F_MCR_GPIO4_CTRL_P41_IN_POS - 1)))& \ + mask) #define GPIO4_AFEN_MASK(mask) \ - (((mask & (1 << 0)) << MXC_F_MCR_OUTEN_PDOWN_OUT_EN_POS) | \ - ((mask & (1 << 1)) >> (MXC_F_MCR_OUTEN_SQWOUT_EN_POS + 1))) + (((mask & (1 << 0)) << MXC_F_MCR_OUTEN_PDOWN_OUT_EN_POS) | \ + ((mask & (1 << 1)) >> (MXC_F_MCR_OUTEN_SQWOUT_EN_POS + 1))) /** END: GPIO4 Handling specific to MAX32690 */ #endif diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index 6ef3b350744e..cdbf88d2528d 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -227,12 +227,16 @@ uint64_t port_get_raw_ticks(uint8_t *subticks) { // Enable 1/1024 second tick. void port_enable_tick(void) { - while ( MXC_RTC_Start() == E_BUSY ); + while (MXC_RTC_Start() == E_BUSY) { + ; + } } // Disable 1/1024 second tick. void port_disable_tick(void) { - while( MXC_RTC_Stop() == E_BUSY ); + while (MXC_RTC_Stop() == E_BUSY) { + ; + } } // Wake the CPU after a given # of ticks or sooner @@ -253,7 +257,8 @@ void port_interrupt_after_ticks(uint32_t ticks) { // Subsec alarm is the starting/reload value of the SSEC counter. // ISR triggered when SSEC rolls over from 0xFFFF_FFFF to 0x0 - while (MXC_RTC_SetSubsecondAlarm(MSEC_TO_SS_ALARM(ticks_msec)) != E_SUCCESS) {} + while (MXC_RTC_SetSubsecondAlarm(MSEC_TO_SS_ALARM(ticks_msec)) != E_SUCCESS) { + } MXC_RTC_EnableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE); From 8a269493993eb8bec8e0417ac7cf89120e1d286d Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Tue, 1 Oct 2024 18:01:45 -0700 Subject: [PATCH 24/39] more pre-commit fixes --- ports/analog/max32_port.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/ports/analog/max32_port.h b/ports/analog/max32_port.h index 64c6915aa68d..c464dabb2844 100644 --- a/ports/analog/max32_port.h +++ b/ports/analog/max32_port.h @@ -26,26 +26,26 @@ #define GPIO4_PIN_MASK 0x00000003 #define GPIO4_RESET_MASK 0xFFFFFF77 #define GPIO4_OUTEN_MASK(mask) \ - (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_OE_POS) | \ + (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_OE_POS) | \ ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_OE_POS - 1))) #define GPIO4_PULLDIS_MASK(mask) \ - (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_PE_POS) | \ + (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_PE_POS) | \ ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_PE_POS - 1))) #define GPIO4_DATAOUT_MASK(mask) \ - (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \ + (((mask & (1 << 0)) << MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \ ((mask & (1 << 1)) << (MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1))) #define GPIO4_DATAOUT_GET_MASK(mask) \ - ((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_DO) >> MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \ + ((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_DO) >> MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \ ((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P41_DO) >> \ - (MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1)))& \ + (MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1))) & \ mask) #define GPIO4_DATAIN_MASK(mask) \ ((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_IN) >> MXC_F_MCR_GPIO4_CTRL_P40_IN_POS) | \ ((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P41_IN) >> \ - (MXC_F_MCR_GPIO4_CTRL_P41_IN_POS - 1)))& \ + (MXC_F_MCR_GPIO4_CTRL_P41_IN_POS - 1))) & \ mask) #define GPIO4_AFEN_MASK(mask) \ - (((mask & (1 << 0)) << MXC_F_MCR_OUTEN_PDOWN_OUT_EN_POS) | \ + (((mask & (1 << 0)) << MXC_F_MCR_OUTEN_PDOWN_OUT_EN_POS) | \ ((mask & (1 << 1)) >> (MXC_F_MCR_OUTEN_SQWOUT_EN_POS + 1))) /** END: GPIO4 Handling specific to MAX32690 */ From 47948860fd15105e6862baacee68bc4b3de064f5 Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Tue, 1 Oct 2024 18:04:19 -0700 Subject: [PATCH 25/39] final pre-commit fix --- ports/analog/max32_port.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/analog/max32_port.h b/ports/analog/max32_port.h index c464dabb2844..5d92fcfe6d3e 100644 --- a/ports/analog/max32_port.h +++ b/ports/analog/max32_port.h @@ -40,7 +40,7 @@ (MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1))) & \ mask) #define GPIO4_DATAIN_MASK(mask) \ - ((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_IN) >> MXC_F_MCR_GPIO4_CTRL_P40_IN_POS) | \ + ((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_IN) >> MXC_F_MCR_GPIO4_CTRL_P40_IN_POS) | \ ((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P41_IN) >> \ (MXC_F_MCR_GPIO4_CTRL_P41_IN_POS - 1))) & \ mask) From efae9e2b1faa2ac1d398de8182bba07e1afa05be Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Wed, 2 Oct 2024 09:16:25 -0700 Subject: [PATCH 26/39] Fix CI run issues with docs & tlsf submodule --- ports/analog/README.md | 10 +++++----- ports/analog/boards/apard32690/README.md | 8 ++++---- tools/ci_fetch_deps.py | 2 +- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/ports/analog/README.md b/ports/analog/README.md index e2bd38b66472..39d8db098dd0 100644 --- a/ports/analog/README.md +++ b/ports/analog/README.md @@ -2,7 +2,7 @@ This port brings CircuitPython to ADI's "MAX32" series of microcontrollers. These devices are mostly ARM Cortex-M4-based and focus on delivering performance at low-power levels. Currently this port only supports MAX32690. -### Structure of this port +## Structure of this port - **`boards/:`** Board-specific definitions including pins, board initialization, etc. - **`common-hal/:`** Port-specific implementations of CircuitPython common-hal APIs. When a new module is enabled, this is often where the implementation is found. Expected functions for modules in `common-hal` are usually found in `shared-bindings/` or `shared-module/` in the CircuitPy root directory. @@ -14,7 +14,7 @@ This port brings CircuitPython to ADI's "MAX32" series of microcontrollers. Thes - `. :` Build system and high-level interface to the CircuitPython core for the ADI port. -### Building for MAX32 devices +## Building for MAX32 devices Ensure CircuitPython dependencies are up-to-date by following the CircuitPython introduction on Adafruit's Website: [Building CircuitPython - Introduction](https://learn.adafruit.com/building-circuitpython/introduction). In particular, it is necessary to fetch all submodules (including the ARM Toolchain inside MSDK) and build the `mpy-cross` compiler. @@ -32,7 +32,7 @@ Once you have built `mpy-cross` and set up your build system for CircuitPython, Be aware the build may take a long time without parallelizing via the `-jN` flag, where N is the # of cores on your machine. -### Flashing the board +## Flashing the board Universal instructions on flashing MAX32 devices this project can be found in the **[MSDK User Guide](https://analogdevicesinc.github.io/msdk/USERGUIDE/)**. @@ -48,11 +48,11 @@ This requires the following: - The PICO board is connected to the target board via a 10-pin SWD ribbon cable. - If SWD connectors are not keyed, the P1 indicator (red line) on the SWD ribbon cable should match the P1 indicator on the board silkscreen near the 10-pin SWD connector. -### Using the REPL +## Using the REPL Once the device is plugged in, it will enumerate via USB as both a USB Serial Device (CDC) and a Mass Storage Device (MSC). You can connect to the Python REPL with your favorite Serial Monitor program e.g. TeraTerm, VS Code, Putty, etc. Use any buadrate with 8-bit, No Parity, 1 Stop Bit (8N1) settings. From this point forward, you can run Python code on the MCU! If you want help with learning CircuitPython-specific code or learning Python in general, a good place to start is Adafruit's ["Welcome to CircuitPython"](https://learn.adafruit.com/welcome-to-circuitpython/) guide. -### Editing code.py +## Editing code.py Python code may be executed from `code.py` the `CIRCUITPY:` drive. When editing this file, please be aware that some text editors will work better than others. A list of suggested text editors can be found at Adafruit's guide here: https://learn.adafruit.com/welcome-to-circuitpython/recommended-editors diff --git a/ports/analog/boards/apard32690/README.md b/ports/analog/boards/apard32690/README.md index 3e8464854cb3..960a26a007f2 100644 --- a/ports/analog/boards/apard32690/README.md +++ b/ports/analog/boards/apard32690/README.md @@ -2,18 +2,18 @@ This board features the MAX32690, a dual-core ARM Cortex-M4/RISC-V MCU with 3MiB Flash, 1MiB SRAM. The board also has support for 10BASE-T1L Ethernet, Wifi, Bluetooth, USB, and Security via MAXQ1065. However, most of these features are not yet available for this CircuitPython port (USB will be added soon; others are currently unplanned). -### Onboard connectors & peripherals +## Onboard connectors & peripherals This board comes in a form-factor similar to an Arduino Mega, enabling Arduino-style shield boards to be plugged in and evaluated with the MAX32690. This vastly opens up the options for easily plugging peripherals into the board, especially when combined with the two Pmod:tm: connectors, P8 (SPI) and P13 (I2C). -### Product Resources +## Product Resources For more info about AD-APARD32690-SL, visit our product webpages for datasheets, User Guides, Software, and Design Documents: [AD-APARD32690-SL Product Webpage](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/ad-apard32690-sl.html) [AD-APARD32690-SL User Guide](https://wiki.analog.com/resources/eval/user-guides/ad-apard32690-sl) -#### Building for this board +### Building for this board To build for this board, ensure you are in the `ports/analog` directory and run the following command. Note that passing in the `-jN` flag, where N is the # of cores on your machine, can speed up compile times. @@ -21,7 +21,7 @@ To build for this board, ensure you are in the `ports/analog` directory and run make BOARD=apard32690 ``` -#### Flashing this board +### Flashing this board To flash the board, run the following command if using the MAX32625PICO: diff --git a/tools/ci_fetch_deps.py b/tools/ci_fetch_deps.py index 778a90c31b63..a06631bb307e 100644 --- a/tools/ci_fetch_deps.py +++ b/tools/ci_fetch_deps.py @@ -48,7 +48,7 @@ def matching_submodules(s): PORT_DEPS = { "analog": [ "extmod/ulab/", - "/lib/tlsf/", + "lib/tlsf/", "lib/tinyusb/", "lib/protomatter", ], From dc2c214c84dbdafa079057b5d2e78716ce40061f Mon Sep 17 00:00:00 2001 From: "Hurst, Brandon" Date: Wed, 2 Oct 2024 10:18:13 -0700 Subject: [PATCH 27/39] - Add elf target for CI build. - Add ports/analog/README to toctree for Sphinx docs. --- docs/supported_ports.rst | 1 + ports/analog/mpconfigport.mk | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/docs/supported_ports.rst b/docs/supported_ports.rst index 69eaa5ef1489..41f872864791 100644 --- a/docs/supported_ports.rst +++ b/docs/supported_ports.rst @@ -12,6 +12,7 @@ Additional testing is limited. .. toctree:: :maxdepth: 2 + ../ports/analog/README ../ports/atmel-samd/README ../ports/broadcom/README ../ports/cxd56/README diff --git a/ports/analog/mpconfigport.mk b/ports/analog/mpconfigport.mk index 348d61dc2892..1b9655c7f33c 100644 --- a/ports/analog/mpconfigport.mk +++ b/ports/analog/mpconfigport.mk @@ -60,10 +60,13 @@ CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 CIRCUITPY_PIXELBUF ?= 0 #################################################################################### -# Required for clean building (additional CircuittPython Defaults) +# Required for clean building (additional CircuitPython Defaults) #################################################################################### # Depends on BUSIO CIRCUITPY_BLEIO_HCI = 0 CIRCUITPY_KEYPAD = 0 CIRCUITPY_BUSDEVICE = 0 + +# For CircuitPython CI +CIRCUITPY_BUILD_EXTENSIONS ?= elf From 4a7fe71d8aecdc699d940a73181029bb171ec3e0 Mon Sep 17 00:00:00 2001 From: Brandon Date: Thu, 24 Oct 2024 12:00:18 -0700 Subject: [PATCH 28/39] Update msdk submodule to clear nvic/dma warnings --- ports/analog/msdk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/analog/msdk b/ports/analog/msdk index 608acf33e95a..db69388844d2 160000 --- a/ports/analog/msdk +++ b/ports/analog/msdk @@ -1 +1 @@ -Subproject commit 608acf33e95a994d548b8223955952c4749acaac +Subproject commit db69388844d29e727cd245b90b54279341f77401 From ac19bbab542ebcae2f49e7f425b03480b45b29af Mon Sep 17 00:00:00 2001 From: Brandon Date: Thu, 24 Oct 2024 12:23:26 -0700 Subject: [PATCH 29/39] Remove dma_revb.c from Makefile --- ports/analog/Makefile | 1 - 1 file changed, 1 deletion(-) diff --git a/ports/analog/Makefile b/ports/analog/Makefile index 79eb7a49052d..9499c8eacd36 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -100,7 +100,6 @@ SRC_MAX32 += \ $(PERIPH_SRC)/CTB/ctb_reva.c \ $(PERIPH_SRC)/CTB/ctb_common.c \ $(PERIPH_SRC)/DMA/dma_reva.c \ - $(PERIPH_SRC)/DMA/dma_revb.c \ $(PERIPH_SRC)/DMA/dma_$(DIE_TYPE).c \ $(PERIPH_SRC)/FLC/flc_common.c \ $(PERIPH_SRC)/FLC/flc_$(DIE_TYPE).c \ From 7fe51d34817635a34e0646609d37aaf31f464d87 Mon Sep 17 00:00:00 2001 From: Brandon Date: Thu, 24 Oct 2024 12:40:44 -0700 Subject: [PATCH 30/39] Add CONFIG_TRUSTED_EXECUTION_SECURE macro to Makefile --- ports/analog/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/ports/analog/Makefile b/ports/analog/Makefile index 9499c8eacd36..46dfc6a53b39 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -145,7 +145,8 @@ CFLAGS += -D$(MCU_VARIANT_UPPER) \ -DTARGET_REV=0x4131 \ -DTARGET=$(MCU_VARIANT_UPPER) \ -DIAR_PRAGMAS=0 \ - -DRISCV_LOAD=0 + -DRISCV_LOAD=0 \ + -DCONFIG_TRUSTED_EXECUTION_SECURE=0 # todo: add these for linkerfiles later on so that it's easier to add new boards # -DFLASH_ORIGIN=0x10000000 \ From b1424e1ecb3914ba00d5a7b1c594d5c0cf0478db Mon Sep 17 00:00:00 2001 From: Brandon Date: Fri, 25 Oct 2024 13:42:53 -0700 Subject: [PATCH 31/39] Add open-drain to digitalio + Resolve some issues with GPIO4 & setting pullup/pulldown --- ports/analog/Makefile | 1 + .../common-hal/digitalio/DigitalInOut.c | 140 ++++++++++++++---- .../common-hal/digitalio/DigitalInOut.h | 2 + 3 files changed, 112 insertions(+), 31 deletions(-) diff --git a/ports/analog/Makefile b/ports/analog/Makefile index 46dfc6a53b39..ebdb62bb2c13 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -209,6 +209,7 @@ CFLAGS += -Wno-error=unused-parameter \ -Wno-error=nested-externs \ -Wno-error=sign-compare \ -Wno-cast-align \ + -Wno-sign-compare \ ENTRY = Reset_Handler LDFLAGS += $(CFLAGS) --entry $(ENTRY) -Wl,-nostdlib -Wl,-T,$(LINKERFILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections diff --git a/ports/analog/common-hal/digitalio/DigitalInOut.c b/ports/analog/common-hal/digitalio/DigitalInOut.c index 3861900d81cd..0f34b604fd0c 100644 --- a/ports/analog/common-hal/digitalio/DigitalInOut.c +++ b/ports/analog/common-hal/digitalio/DigitalInOut.c @@ -28,11 +28,13 @@ digitalinout_result_t common_hal_digitalio_digitalinout_construct( common_hal_mcu_pin_claim(pin); self->pin = pin; + self->open_drain = false; + self->vssel = MXC_GPIO_VSSEL_VDDIOH; mxc_gpio_cfg_t new_gpio_cfg = { .port = gpio_ports[self->pin->port], .mask = (self->pin->mask), - .vssel = self->pin->level, + .vssel = self->vssel, .func = MXC_GPIO_FUNC_IN, .drvstr = MXC_GPIO_DRVSTR_0, .pad = MXC_GPIO_PAD_NONE, @@ -55,6 +57,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_input( digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; + int err = E_NO_ERROR; if (self->pin->port == 4) { @@ -76,21 +79,18 @@ digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; + self->open_drain = (drive_mode == DRIVE_MODE_OPEN_DRAIN); + + // Set GPIO(s) to output mode if (self->pin->port == 4) { - // Set GPIO(s) to output mode MXC_MCR->gpio4_ctrl |= GPIO4_OUTEN_MASK(mask); MXC_MCR->outen &= ~GPIO4_AFEN_MASK(mask); } else { MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_OUT, mask); } + common_hal_digitalio_digitalinout_set_value(self, value); - // todo (low): MSDK Hardware does not support open-drain configuration except - // todo (low): when directly managed by a peripheral such as I2C. - // todo (low): find a way to signal this to any upstream code - if (drive_mode != DRIVE_MODE_PUSH_PULL) { - return DIGITALINOUT_INVALID_DRIVE_MODE; - } return DIGITALINOUT_OK; } @@ -100,6 +100,11 @@ digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; + // Open drain must be considered output for CircuitPython API to work properly + if (self->open_drain) { + return DIRECTION_OUTPUT; + } + if (self->pin->port < 4) { // Check that I/O mode is enabled and we don't have in AND out on at the same time MP_STATIC_ASSERT(!((port->en0 & mask) && (port->inen & mask) && (port->outen & mask))); @@ -129,8 +134,30 @@ void common_hal_digitalio_digitalinout_set_value( mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; - if (dir == DIRECTION_OUTPUT) { - if (value == true) { + MXC_GPIO_SetVSSEL(port, self->vssel, mask); + + if (self->open_drain) { + // Open-drain can be done by setting to input mode, no pullup/pulldown + // when the value is high (no sink current into GPIO) + if (value) { + // set to input, no pull + common_hal_digitalio_digitalinout_switch_to_input(self, PULL_NONE); + } + else { + // can't use common_hal_switch_to_output b/c it calls this function + // set the GPIO to output, low + if (self->pin->port == 4) { + MXC_MCR->gpio4_ctrl |= GPIO4_OUTEN_MASK(mask); + MXC_MCR->outen &= ~GPIO4_AFEN_MASK(mask); + } else { + MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)port, MXC_GPIO_FUNC_OUT, mask); + } + MXC_GPIO_OutClr(port, mask); + } + } + + else if (dir == DIRECTION_OUTPUT) { + if (value) { MXC_GPIO_OutSet(port, mask); } else { MXC_GPIO_OutClr(port, mask); @@ -145,6 +172,10 @@ bool common_hal_digitalio_digitalinout_get_value(digitalio_digitalinout_obj_t *s mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; + if (self->open_drain) { + return MXC_GPIO_InGet(port, mask) && mask; + } + if (dir == DIRECTION_INPUT) { if (self->pin->port == 4) { return (bool)(MXC_MCR->gpio4_ctrl & GPIO4_DATAIN_MASK(mask)); @@ -155,21 +186,29 @@ bool common_hal_digitalio_digitalinout_get_value(digitalio_digitalinout_obj_t *s } } -/** FIXME: Implement open-drain by switching to input WITHOUT re-labeling the pin */ digitalinout_result_t common_hal_digitalio_digitalinout_set_drive_mode( digitalio_digitalinout_obj_t *self, digitalio_drive_mode_t drive_mode) { - if (drive_mode == DRIVE_MODE_OPEN_DRAIN) { - common_hal_digitalio_digitalinout_switch_to_input(self, PULL_NONE); - } - // On MAX32, drive mode is not configurable - // and should always be push-pull unless managed by a peripheral like I2C + // Check what the current value is + bool value = common_hal_digitalio_digitalinout_get_value(self); + self->open_drain = (drive_mode == DRIVE_MODE_OPEN_DRAIN); + + // Re-set the value to account for different setting methods for drive types + // Switch to output will both set the output config + // AND set the value for the new drive type + common_hal_digitalio_digitalinout_switch_to_output(self, value, drive_mode); + return DIGITALINOUT_OK; } digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( digitalio_digitalinout_obj_t *self) { - return DRIVE_MODE_PUSH_PULL; + if (self->open_drain) { + return DRIVE_MODE_OPEN_DRAIN; + } + else { + return DRIVE_MODE_PUSH_PULL; + } } digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( @@ -178,11 +217,31 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; uint32_t mask = self->pin->mask; - // padctrl registers only work in input mode + // GPIO4 handling if (self->pin->port == 4) { - MXC_MCR->gpio4_ctrl &= ~(GPIO4_PULLDIS_MASK(mask)); + switch(pull) { + case PULL_NONE: + // disable pullup/pulldown + MXC_MCR->gpio4_ctrl |= GPIO4_PULLDIS_MASK(mask); + break; + case PULL_UP: + // enable pullup/pulldown (clear the mask) + // then set output value to 1 + MXC_MCR->gpio4_ctrl &= ~(GPIO4_PULLDIS_MASK(mask)); + MXC_MCR->gpio4_ctrl |= GPIO4_DATAOUT_MASK(mask); + break; + case PULL_DOWN: + // enable pullup/pulldown (clear the mask) + // then clear output value to 0 + MXC_MCR->gpio4_ctrl &= ~(GPIO4_PULLDIS_MASK(mask)); + MXC_MCR->gpio4_ctrl &= ~(GPIO4_DATAOUT_MASK(mask)); + break; + default: + break; + } return DIGITALINOUT_OK; } else { + // padctrl registers only work in input mode if ((mask & port->en0) & (mask & ~(port->outen))) { // PULL_NONE, PULL_UP, or PULL_DOWN switch (pull) { @@ -193,10 +252,12 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( case PULL_UP: port->padctrl0 |= mask; port->padctrl1 &= ~(mask); + port->ps &= ~(mask); break; case PULL_DOWN: - port->padctrl0 &= ~(mask); + port->padctrl0 &= ~mask; port->padctrl1 |= mask; + port->ps &= ~mask; break; default: break; @@ -208,20 +269,37 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( } } -/** FIXME: Account for GPIO4 handling here */ digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( digitalio_digitalinout_obj_t *self) { - bool pin_padctrl0 = (gpio_ports[self->pin->port]->padctrl0) & (self->pin->mask); - bool pin_padctrl1 = (gpio_ports[self->pin->port]->padctrl1) & (self->pin->mask); + mxc_gpio_regs_t *port = gpio_ports[self->pin->port]; + uint32_t mask = self->pin->mask; - if ((pin_padctrl0) && !(pin_padctrl1)) { - return PULL_UP; - } else if (!(pin_padctrl0) && pin_padctrl1) { - return PULL_DOWN; - } else if (!(pin_padctrl0) && !(pin_padctrl1)) { - return PULL_NONE; - } else { - return PULL_NONE; + bool pin_padctrl0 = (port->padctrl0) & (mask); + bool pin_padctrl1 = (port->padctrl1) & (mask); + + if (self->pin->port == 4) { + if (MXC_MCR->gpio4_ctrl & GPIO4_PULLDIS_MASK(mask)) { + return PULL_NONE; + } + else { + if (MXC_MCR->gpio4_ctrl & GPIO4_DATAOUT_MASK(mask)) { + return PULL_UP; + } + else { + return PULL_DOWN; + } + } + } + else { + if ((pin_padctrl0) && !(pin_padctrl1)) { + return PULL_UP; + } else if (!(pin_padctrl0) && pin_padctrl1) { + return PULL_DOWN; + } else if (!(pin_padctrl0) && !(pin_padctrl1)) { + return PULL_NONE; + } else { + return PULL_NONE; + } } } diff --git a/ports/analog/common-hal/digitalio/DigitalInOut.h b/ports/analog/common-hal/digitalio/DigitalInOut.h index f58b23832b19..d10345fa3fa8 100644 --- a/ports/analog/common-hal/digitalio/DigitalInOut.h +++ b/ports/analog/common-hal/digitalio/DigitalInOut.h @@ -12,4 +12,6 @@ typedef struct { mp_obj_base_t base; const mcu_pin_obj_t *pin; + bool open_drain; + mxc_gpio_vssel_t vssel; } digitalio_digitalinout_obj_t; From bd96ff7bb03480702a7867e1fec63d63617e8f00 Mon Sep 17 00:00:00 2001 From: Brandon Date: Fri, 25 Oct 2024 13:47:15 -0700 Subject: [PATCH 32/39] Pre-commit formatting fix --- .../analog/common-hal/digitalio/DigitalInOut.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/ports/analog/common-hal/digitalio/DigitalInOut.c b/ports/analog/common-hal/digitalio/DigitalInOut.c index 0f34b604fd0c..f3e3fe552dc0 100644 --- a/ports/analog/common-hal/digitalio/DigitalInOut.c +++ b/ports/analog/common-hal/digitalio/DigitalInOut.c @@ -142,8 +142,7 @@ void common_hal_digitalio_digitalinout_set_value( if (value) { // set to input, no pull common_hal_digitalio_digitalinout_switch_to_input(self, PULL_NONE); - } - else { + } else { // can't use common_hal_switch_to_output b/c it calls this function // set the GPIO to output, low if (self->pin->port == 4) { @@ -154,9 +153,7 @@ void common_hal_digitalio_digitalinout_set_value( } MXC_GPIO_OutClr(port, mask); } - } - - else if (dir == DIRECTION_OUTPUT) { + } else if (dir == DIRECTION_OUTPUT) { if (value) { MXC_GPIO_OutSet(port, mask); } else { @@ -219,7 +216,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_set_pull( // GPIO4 handling if (self->pin->port == 4) { - switch(pull) { + switch (pull) { case PULL_NONE: // disable pullup/pulldown MXC_MCR->gpio4_ctrl |= GPIO4_PULLDIS_MASK(mask); @@ -281,17 +278,14 @@ digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( if (self->pin->port == 4) { if (MXC_MCR->gpio4_ctrl & GPIO4_PULLDIS_MASK(mask)) { return PULL_NONE; - } - else { + } else { if (MXC_MCR->gpio4_ctrl & GPIO4_DATAOUT_MASK(mask)) { return PULL_UP; - } - else { + } else { return PULL_DOWN; } } - } - else { + } else { if ((pin_padctrl0) && !(pin_padctrl1)) { return PULL_UP; } else if (!(pin_padctrl0) && pin_padctrl1) { From dace5bc97fe57cc5ae44641a92b63449980e42a9 Mon Sep 17 00:00:00 2001 From: Brandon Date: Fri, 25 Oct 2024 13:52:21 -0700 Subject: [PATCH 33/39] Pre-commit formatting fix --- ports/analog/common-hal/digitalio/DigitalInOut.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/ports/analog/common-hal/digitalio/DigitalInOut.c b/ports/analog/common-hal/digitalio/DigitalInOut.c index f3e3fe552dc0..7d4048d77e70 100644 --- a/ports/analog/common-hal/digitalio/DigitalInOut.c +++ b/ports/analog/common-hal/digitalio/DigitalInOut.c @@ -202,8 +202,7 @@ digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( digitalio_digitalinout_obj_t *self) { if (self->open_drain) { return DRIVE_MODE_OPEN_DRAIN; - } - else { + } else { return DRIVE_MODE_PUSH_PULL; } } From ecba079e44f383c4f9a18a4497028679eed1734d Mon Sep 17 00:00:00 2001 From: "U-ANALOG\\BHurst" Date: Sun, 3 Nov 2024 11:29:01 -0500 Subject: [PATCH 34/39] Fix optimization settings for non-debug builds --- ports/analog/Makefile | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/ports/analog/Makefile b/ports/analog/Makefile index ebdb62bb2c13..a36619b5687c 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -163,10 +163,9 @@ DEBUG ?= 1 endif ifeq ($(DEBUG),1) -CFLAGS += -ggdb3 -COPT = -Og +COPT = -Og -ggdb3 -Os else -COPT += -O0 #opt completely off to start +COPT += -Os #opt completely off to start endif # TinyUSB CFLAGS From 4c249d524dd202f7101005328ddf0a6646e6c4eb Mon Sep 17 00:00:00 2001 From: Brandon Hurst Date: Sun, 3 Nov 2024 13:45:39 -0500 Subject: [PATCH 35/39] Enabled SysTick interrupt for time.sleep to work. Cleaned up optimization settings. --- ports/analog/Makefile | 16 ++++++++-------- ports/analog/supervisor/port.c | 3 +++ 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/ports/analog/Makefile b/ports/analog/Makefile index a36619b5687c..b2f392b17c59 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -141,7 +141,7 @@ SRC_S += supervisor/cpu.s \ $(STARTUPFILE) # Needed to compile some MAX32 headers -CFLAGS += -D$(MCU_VARIANT_UPPER) \ +CFLAGS += -D$(MCU_VARIANT_UPPER) \ -DTARGET_REV=0x4131 \ -DTARGET=$(MCU_VARIANT_UPPER) \ -DIAR_PRAGMAS=0 \ @@ -149,23 +149,23 @@ CFLAGS += -D$(MCU_VARIANT_UPPER) \ -DCONFIG_TRUSTED_EXECUTION_SECURE=0 # todo: add these for linkerfiles later on so that it's easier to add new boards -# -DFLASH_ORIGIN=0x10000000 \ -# -DFLASH_SIZE=0x340000 \ -# -DSRAM_ORIGIN=0x20000000 \ -# -DSRAM_SIZE=0x100000 +# -DFLASH_ORIGIN \ +# -DFLASH_SIZE \ +# -DSRAM_ORIGIN \ +# -DSRAM_SIZE CPU_CORE=cortex-m4 CFLAGS += -mthumb -mcpu=$(CPU_CORE) -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -# NOTE: Start with DEBUG ONLY settings for now +# NOTE: Start with DEBUG=1 defaults for now ifeq ($(DEBUG),) DEBUG ?= 1 endif ifeq ($(DEBUG),1) -COPT = -Og -ggdb3 -Os +COPT = -ggdb3 -Og -Os else -COPT += -Os #opt completely off to start +COPT += -Os endif # TinyUSB CFLAGS diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index cdbf88d2528d..391ad655d2cd 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -65,11 +65,14 @@ static uint32_t tick_flag = 0; // defined by cmsis core files extern void NVIC_SystemReset(void) NORETURN; +// FIXME: Currently have an issue with time.sleep b/c MXC_Delay uses SysTick, +// and SysTick ISR isn't happening. Seems that MXC_Delay results in inf. loop safe_mode_t port_init(void) { int err = E_NO_ERROR; // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); + NVIC_EnableIRQ(SysTick_IRQn); // FIXME: Test with NVIC Enable here before committing // Enable GPIO (enables clocks + common init for ports) for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++) { From c3a3ae13b56c9b24aaaf9bea75c905e63661a7ee Mon Sep 17 00:00:00 2001 From: Brandon Hurst Date: Sun, 3 Nov 2024 15:18:59 -0500 Subject: [PATCH 36/39] Remove FIXME comments from supervisor/port.c. Changes were tested. --- ports/analog/supervisor/port.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index 391ad655d2cd..0aedd74f179c 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -65,14 +65,12 @@ static uint32_t tick_flag = 0; // defined by cmsis core files extern void NVIC_SystemReset(void) NORETURN; -// FIXME: Currently have an issue with time.sleep b/c MXC_Delay uses SysTick, -// and SysTick ISR isn't happening. Seems that MXC_Delay results in inf. loop safe_mode_t port_init(void) { int err = E_NO_ERROR; // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); - NVIC_EnableIRQ(SysTick_IRQn); // FIXME: Test with NVIC Enable here before committing + NVIC_EnableIRQ(SysTick_IRQn); // Enable GPIO (enables clocks + common init for ports) for (int i = 0; i < MXC_CFG_GPIO_INSTANCES; i++) { From 491b7bda2b944a377872713a06220705a2a7a1c9 Mon Sep 17 00:00:00 2001 From: Brandon Hurst Date: Mon, 25 Nov 2024 15:26:47 -0800 Subject: [PATCH 37/39] Fix rebase issues and add ARM GCC environment setup to README.md --- ports/analog/Makefile | 4 +++- ports/analog/README.md | 10 +++++----- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/ports/analog/Makefile b/ports/analog/Makefile index b2f392b17c59..5d923cbaf6b6 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -267,8 +267,10 @@ clean-all: # If the MSDK is installed, flash-msdk can be run to utilize the the modified # openocd with the algorithms MAXIM_PATH := $(subst \,/,$(MAXIM_PATH)) +OPENOCD ?= $(MAXIM_PATH)/Tools/OpenOCD/openocd +OPENOCD_SCRIPTS ?= $(MAXIM_PATH)/Tools/OpenOCD/scripts flash-msdk: - $(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \ + $(OPENOCD) -s $(OPENOCD_SCRIPTS) \ -f interface/cmsis-dap.cfg -f target/$(MCU_VARIANT_LOWER).cfg \ -c "program $(BUILD)/firmware.elf verify; init; reset; exit" diff --git a/ports/analog/README.md b/ports/analog/README.md index 39d8db098dd0..fa5ab1f4a778 100644 --- a/ports/analog/README.md +++ b/ports/analog/README.md @@ -16,14 +16,14 @@ This port brings CircuitPython to ADI's "MAX32" series of microcontrollers. Thes ## Building for MAX32 devices -Ensure CircuitPython dependencies are up-to-date by following the CircuitPython introduction on Adafruit's Website: [Building CircuitPython - Introduction](https://learn.adafruit.com/building-circuitpython/introduction). In particular, it is necessary to fetch all submodules (including the ARM Toolchain inside MSDK) and build the `mpy-cross` compiler. +Ensure CircuitPython dependencies are up-to-date by following the CircuitPython introduction on Adafruit's Website: [Building CircuitPython - Introduction](https://learn.adafruit.com/building-circuitpython/introduction). You will require the [ARM GNU Toolchain](https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads), with ARM GCC >=13.x. It is also necessary to fetch all submodules and build the `mpy-cross` compiler, per the "Building CircuitPython" guide. -Ensure the MSDK's ARM toolchain is contained on your PATH. This can be done in MinGW or WSL by exporting a prefix to the PATH variable: +Ensure the ARM toolchain is contained on your PATH. This can be done in MinGW or WSL by exporting a prefix to the PATH variable. The author's path is included below as an example: - $ export MSDK_GNU_PATH=/ports/analog/msdk/Tools/GNUTools/10.3/bin - $ export PATH=$MSDK_GNU_PATH:$PATH + $ export ARM_GNU_PATH=C:/x-tools/arm-win/arm-none-eabi-w64-i686-13.3rel1/bin + $ export PATH=$ARM_GNU_PATH:$PATH -This needs to be done each time you open a command environment to build CircuitPython. +This needs to be done each time you open a command environment to build CircuitPython. It can be useful to set up a simple shell script for this. Once you have built `mpy-cross` and set up your build system for CircuitPython, you can build for MAX32 devices using the following commands: From 2a2ebb9daadc16460146f4d4faa53879bcba8c30 Mon Sep 17 00:00:00 2001 From: Brandon Hurst Date: Wed, 27 Nov 2024 08:47:05 -0800 Subject: [PATCH 38/39] Remove board_millis() and extra LED bringup code --- ports/analog/boards/apard32690/board.c | 4 ---- ports/analog/boards/max32690evkit/board.c | 4 ---- ports/analog/supervisor/port.c | 14 -------------- 3 files changed, 22 deletions(-) diff --git a/ports/analog/boards/apard32690/board.c b/ports/analog/boards/apard32690/board.c index cfef4bfcf61a..44c5a47faa6e 100644 --- a/ports/analog/boards/apard32690/board.c +++ b/ports/analog/boards/apard32690/board.c @@ -41,10 +41,6 @@ void SysTick_Handler(void) { system_ticks++; } -uint32_t board_millis(void) { - return system_ticks; -} - // Initializes board related state once on start up. void board_init(void) { } diff --git a/ports/analog/boards/max32690evkit/board.c b/ports/analog/boards/max32690evkit/board.c index ebb8b2da35fc..57d5cf74e7be 100644 --- a/ports/analog/boards/max32690evkit/board.c +++ b/ports/analog/boards/max32690evkit/board.c @@ -40,10 +40,6 @@ void SysTick_Handler(void) { system_ticks++; } -uint32_t board_millis(void) { - return system_ticks; -} - // Initializes board related state once on start up. void board_init(void) { } diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index 0aedd74f179c..da668d1f31a7 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -80,20 +80,6 @@ safe_mode_t port_init(void) { } } - // Init Board LEDs - /* setup GPIO for the LED */ - for (int i = 0; i < num_leds; i++) { - // Set the output value - MXC_GPIO_OutClr(led_pin[i].port, led_pin[i].mask); - - if (MXC_GPIO_Config(&led_pin[i]) != E_NO_ERROR) { - return SAFE_MODE_PROGRAMMATIC; - } - } - - // Turn on one LED to indicate Sign of Life - MXC_GPIO_OutSet(led_pin[2].port, led_pin[2].mask); - // Enable clock to RTC peripheral MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; while (!(MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_ERTCO_RDY)) { From 24b53f5411048f42c46687d06e61fa494c6e5884 Mon Sep 17 00:00:00 2001 From: Brandon Hurst Date: Wed, 27 Nov 2024 11:55:42 -0800 Subject: [PATCH 39/39] Move configuration from board.c to supervisor/port.c (non-MCU specific) and peripherals/max32690 (mcu-specific) --- ports/analog/Makefile | 3 +- ports/analog/boards/apard32690/board.c | 34 ++++------------------- ports/analog/boards/max32690evkit/board.c | 33 ++++------------------ ports/analog/peripherals/max32690/gpios.c | 10 +++++++ ports/analog/peripherals/max32690/gpios.h | 13 +++++++++ ports/analog/supervisor/port.c | 7 +++++ 6 files changed, 42 insertions(+), 58 deletions(-) create mode 100644 ports/analog/peripherals/max32690/gpios.c create mode 100644 ports/analog/peripherals/max32690/gpios.h diff --git a/ports/analog/Makefile b/ports/analog/Makefile index 5d923cbaf6b6..c31bb6dea191 100644 --- a/ports/analog/Makefile +++ b/ports/analog/Makefile @@ -121,7 +121,8 @@ SRC_MAX32 += \ SRC_C += $(SRC_MAX32) \ boards/$(BOARD)/board.c \ boards/$(BOARD)/pins.c \ - peripherals/$(MCU_VARIANT_LOWER)/pins.c + peripherals/$(MCU_VARIANT_LOWER)/pins.c \ + peripherals/$(MCU_VARIANT_LOWER)/gpios.c # ******************************************************************************* ### Compiler & Linker Flags ### diff --git a/ports/analog/boards/apard32690/board.c b/ports/analog/boards/apard32690/board.c index 44c5a47faa6e..76c3e7f5591f 100644 --- a/ports/analog/boards/apard32690/board.c +++ b/ports/analog/boards/apard32690/board.c @@ -9,42 +9,18 @@ #include "mpconfigboard.h" #include "max32_port.h" -// Board-level setup for MAX32690 -mxc_gpio_regs_t *gpio_ports[NUM_GPIO_PORTS] = -{MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3, MXC_GPIO4}; - -// clang-format off -const mxc_gpio_cfg_t pb_pin[] = { - { MXC_GPIO1, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}, -}; -const int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t)); - -const mxc_gpio_cfg_t led_pin[] = { - { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, - { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, - { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, -}; -const int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t)); -// clang-format on - +/***** OPTIONAL BOARD-SPECIFIC FUNCTIONS from supervisor/board.h *****/ // DEFAULT: Using the weak-defined supervisor/shared/board.c functions -/***** OPTIONAL BOARD-SPECIFIC FUNCTIONS from supervisor/board.h *****/ +// Initializes board related state once on start up. +void board_init(void) { +} + // Returns true if the user initiates safe mode in a board specific way. // Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific // way. // bool board_requests_safe_mode(void); -volatile uint32_t system_ticks = 0; - -void SysTick_Handler(void) { - system_ticks++; -} - -// Initializes board related state once on start up. -void board_init(void) { -} - // Reset the state of off MCU components such as neopixels. // void reset_board(void); diff --git a/ports/analog/boards/max32690evkit/board.c b/ports/analog/boards/max32690evkit/board.c index 57d5cf74e7be..76c3e7f5591f 100644 --- a/ports/analog/boards/max32690evkit/board.c +++ b/ports/analog/boards/max32690evkit/board.c @@ -9,41 +9,18 @@ #include "mpconfigboard.h" #include "max32_port.h" -// Board-level setup for MAX32690 -mxc_gpio_regs_t *gpio_ports[NUM_GPIO_PORTS] = -{MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3, MXC_GPIO4}; - -// clang-format off -const mxc_gpio_cfg_t pb_pin[] = { - { MXC_GPIO4, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}, -}; -const int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t)); - -const mxc_gpio_cfg_t led_pin[] = { - { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, - { MXC_GPIO2, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }, -}; -const int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t)); -// clang-format on - +/***** OPTIONAL BOARD-SPECIFIC FUNCTIONS from supervisor/board.h *****/ // DEFAULT: Using the weak-defined supervisor/shared/board.c functions -/***** OPTIONAL BOARD-SPECIFIC FUNCTIONS from supervisor/board.h *****/ +// Initializes board related state once on start up. +void board_init(void) { +} + // Returns true if the user initiates safe mode in a board specific way. // Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific // way. // bool board_requests_safe_mode(void); -volatile uint32_t system_ticks = 0; - -void SysTick_Handler(void) { - system_ticks++; -} - -// Initializes board related state once on start up. -void board_init(void) { -} - // Reset the state of off MCU components such as neopixels. // void reset_board(void); diff --git a/ports/analog/peripherals/max32690/gpios.c b/ports/analog/peripherals/max32690/gpios.c new file mode 100644 index 000000000000..d0dd3ad0fc19 --- /dev/null +++ b/ports/analog/peripherals/max32690/gpios.c @@ -0,0 +1,10 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. +// +// SPDX-License-Identifier: MIT + +#include "gpios.h" + +volatile mxc_gpio_regs_t *gpio_ports[NUM_GPIO_PORTS] = +{MXC_GPIO0, MXC_GPIO1, MXC_GPIO2, MXC_GPIO3, MXC_GPIO4}; diff --git a/ports/analog/peripherals/max32690/gpios.h b/ports/analog/peripherals/max32690/gpios.h new file mode 100644 index 000000000000..4677bf8f33db --- /dev/null +++ b/ports/analog/peripherals/max32690/gpios.h @@ -0,0 +1,13 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Brandon Hurst, Analog Devices, Inc. +// +// SPDX-License-Identifier: MIT + +#include "py/obj.h" +#include "py/mphal.h" + +// MSDK HAL includes +#include "gpio.h" +#include "gpio_regs.h" +#include "max32690.h" diff --git a/ports/analog/supervisor/port.c b/ports/analog/supervisor/port.c index da668d1f31a7..ad003c12ed9e 100644 --- a/ports/analog/supervisor/port.c +++ b/ports/analog/supervisor/port.c @@ -65,6 +65,13 @@ static uint32_t tick_flag = 0; // defined by cmsis core files extern void NVIC_SystemReset(void) NORETURN; +volatile uint32_t system_ticks = 0; + +void SysTick_Handler(void) { + system_ticks++; +} + + safe_mode_t port_init(void) { int err = E_NO_ERROR;