diff --git a/README.md b/README.md index 916f09402..a7d436a66 100644 --- a/README.md +++ b/README.md @@ -28,7 +28,7 @@ The online WiSeConnect 3 SDK documentation is available [here](https://docs.sila - See the [Getting Started](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started) section to run your first example. - See the [Examples](https://docs.silabs.com/wiseconnect/latest/wiseconnect-examples) section to explore all the available examples. - - See our [Migration Guide](docs/software-reference/developer-guides/migrating-from-v3-3-0.md) for information on porting your WiSeConnect v3.3.0 application to WiSeConnect v3.3.1 + - See our [Migration Guide](docs/software-reference/developer-guides/migrating-from-v3-3-2.md) for information on porting your WiSeConnect v3.3.2 application to WiSeConnect v3.3.3 - [API Reference Guide](https://docs.silabs.com/wiseconnect/latest/wiseconnect-api-reference-guide-summary) - [SiWx917 Software Reference Manual](docs/software-reference/manuals/siwx91x-software-reference-manual.md) @@ -36,7 +36,7 @@ The online WiSeConnect 3 SDK documentation is available [here](https://docs.sila - [SiWx917 SoC Datasheet](https://www.silabs.com/documents/public/data-sheets/siwg917-datasheet.pdf) - [SiWx917 NCP Datasheet](https://www.silabs.com/documents/public/data-sheets/siwx917-ncp-datasheet.pdf) - - **SiWx917 Reference Manual:** To access this document, contact the Silicon Labs Sales team by clicking [here](https://www.silabs.com/about-us/contact-sales). + - [SiWx917 Reference Manual](https://www.silabs.com/documents/public/reference-manuals/siw917x-family-rm.pdf) - [SiWx917 RF Matching and Layout Design Guide](https://www.silabs.com/documents/public/application-notes/an1423-siwx917-rf-matching-guide.pdf) - [SiWx917 Gain Offset Calibration](https://www.silabs.com/documents/public/application-notes/an1440-siwx917-gain-offset-calibration.pdf) - [SiWx917 QMS Crystal Calibration App Note](https://www.silabs.com/documents/public/application-notes/an1436-siwx917-qms-crystal-calibration-application-note.pdf) diff --git a/components/board/silabs/component/brd2605a.slcc b/components/board/silabs/component/brd2605a.slcc index 3d409b303..33bad0a5b 100644 --- a/components/board/silabs/component/brd2605a.slcc +++ b/components/board/silabs/component/brd2605a.slcc @@ -16,9 +16,9 @@ - provides: - name: brd2605a - name: hardware_board - - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_dev_board - define: - name: SL_BOARD_NAME value: '"BRD2605A"' @@ -34,7 +34,7 @@ value: '1' - name: SLI_SI91X_MCU_ENABLE_FLASH_BASED_EXECUTION value: '1' - + - name: SI917_DEVKIT - template_contribution: # Default Memory configuration - name: device_flash_addr diff --git a/components/board/silabs/component/brd2605a_config.slcc b/components/board/silabs/component/brd2605a_config.slcc index 43eed5b08..25f6b66b3 100644 --- a/components/board/silabs/component/brd2605a_config.slcc +++ b/components/board/silabs/component/brd2605a_config.slcc @@ -15,15 +15,15 @@ component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: RTE_Device_917 path: brd2605a/RTE_Device_917.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: ledB + path: brd2605a/sl_si91x_led_init_ledB_config.h - override: component: "%extension-wiseconnect3_sdk%psram_core" file_id: psram_pin_config path: brd4340a/sl_si91x_psram_pin_config.h - - override: - component: "%extension-wiseconnect3_sdk%adc_instance" - file_id: adc_config - instance: channel_0 - path: common_config/sl_si91x_adc_init_channel_0_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -100,10 +100,10 @@ instance: channel_15 path: common_config/sl_si91x_adc_init_channel_15_config.h - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h + component: "%extension-wiseconnect3_sdk%adc_instance" + file_id: adc_config + instance: channel_16 + path: common_config/sl_si91x_adc_init_channel_16_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -170,4 +170,26 @@ - override: component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: pin_config - path: brd2605a/pin_config.h \ No newline at end of file + path: brd2605a/pin_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn0 + path: brd2605a/sl_si91x_button_init_btn0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn1 + path: brd2605a/sl_si91x_button_init_btn1_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si70xx" + file_id: si70xx_config + path: brd2605a/sl_si91x_i2c_init_i2c2_config.h + - override: + component: "%extension-wiseconnect3_sdk%iostream_si91x" + file_id: iostream_usart_config + path: brd2605a/sl_iostream_usart_vcom_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_icm40627" + file_id: icm40627_config + path: brd2605a/sl_si91x_icm40627_config.h \ No newline at end of file diff --git a/components/board/silabs/component/brd4325a.slcc b/components/board/silabs/component/brd4325a.slcc index c83373ede..b11dc9bbd 100644 --- a/components/board/silabs/component/brd4325a.slcc +++ b/components/board/silabs/component/brd4325a.slcc @@ -21,6 +21,8 @@ - name: hardware_board - name: hardware_board_rb - name: si91x_a0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - define: diff --git a/components/board/silabs/component/brd4325a_config.slcc b/components/board/silabs/component/brd4325a_config.slcc index 27e5bc84a..00e405c8c 100644 --- a/components/board/silabs/component/brd4325a_config.slcc +++ b/components/board/silabs/component/brd4325a_config.slcc @@ -90,11 +90,6 @@ file_id: adc_config instance: channel_15 path: common_config/sl_si91x_adc_init_channel_15_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -120,6 +115,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config diff --git a/components/board/silabs/component/brd4325b.slcc b/components/board/silabs/component/brd4325b.slcc index a2bab40ed..13b93db58 100644 --- a/components/board/silabs/component/brd4325b.slcc +++ b/components/board/silabs/component/brd4325b.slcc @@ -21,6 +21,8 @@ - name: hardware_board - name: hardware_board_rb - name: si91x_a0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - define: diff --git a/components/board/silabs/component/brd4325b_config.slcc b/components/board/silabs/component/brd4325b_config.slcc index 38a03d59f..87a900e70 100644 --- a/components/board/silabs/component/brd4325b_config.slcc +++ b/components/board/silabs/component/brd4325b_config.slcc @@ -90,11 +90,6 @@ file_id: adc_config instance: channel_15 path: common_config/sl_si91x_adc_init_channel_15_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -120,6 +115,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config diff --git a/components/board/silabs/component/brd4325c.slcc b/components/board/silabs/component/brd4325c.slcc index fb21d37f9..e08bf4140 100644 --- a/components/board/silabs/component/brd4325c.slcc +++ b/components/board/silabs/component/brd4325c.slcc @@ -22,6 +22,8 @@ - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - define: diff --git a/components/board/silabs/component/brd4325c_config.slcc b/components/board/silabs/component/brd4325c_config.slcc index 002b0d48e..66b443e00 100644 --- a/components/board/silabs/component/brd4325c_config.slcc +++ b/components/board/silabs/component/brd4325c_config.slcc @@ -95,11 +95,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -120,6 +115,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config diff --git a/components/board/silabs/component/brd4325e.slcc b/components/board/silabs/component/brd4325e.slcc index bc5aa1a00..ad6891559 100644 --- a/components/board/silabs/component/brd4325e.slcc +++ b/components/board/silabs/component/brd4325e.slcc @@ -22,6 +22,8 @@ - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - define: diff --git a/components/board/silabs/component/brd4325e_config.slcc b/components/board/silabs/component/brd4325e_config.slcc index 99a2203b7..257f37b6d 100644 --- a/components/board/silabs/component/brd4325e_config.slcc +++ b/components/board/silabs/component/brd4325e_config.slcc @@ -95,11 +95,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -120,6 +115,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config diff --git a/components/board/silabs/component/brd4325f.slcc b/components/board/silabs/component/brd4325f.slcc index 610170dc0..b97a39e0b 100644 --- a/components/board/silabs/component/brd4325f.slcc +++ b/components/board/silabs/component/brd4325f.slcc @@ -22,6 +22,8 @@ - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - define: diff --git a/components/board/silabs/component/brd4325f_config.slcc b/components/board/silabs/component/brd4325f_config.slcc index f99540714..f4d11bd3a 100644 --- a/components/board/silabs/component/brd4325f_config.slcc +++ b/components/board/silabs/component/brd4325f_config.slcc @@ -95,11 +95,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -120,6 +115,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config diff --git a/components/board/silabs/component/brd4325g.slcc b/components/board/silabs/component/brd4325g.slcc index 27bc278a5..41f1882fa 100644 --- a/components/board/silabs/component/brd4325g.slcc +++ b/components/board/silabs/component/brd4325g.slcc @@ -22,6 +22,8 @@ - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - id: "%extension-wiseconnect3_sdk%psram_aps6404l_sqh" diff --git a/components/board/silabs/component/brd4325g_config.slcc b/components/board/silabs/component/brd4325g_config.slcc index 6e8194723..83a0f704a 100644 --- a/components/board/silabs/component/brd4325g_config.slcc +++ b/components/board/silabs/component/brd4325g_config.slcc @@ -95,11 +95,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -120,6 +115,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config diff --git a/components/board/silabs/component/brd4338a.slcc b/components/board/silabs/component/brd4338a.slcc index 3899fd4b4..3be545725 100644 --- a/components/board/silabs/component/brd4338a.slcc +++ b/components/board/silabs/component/brd4338a.slcc @@ -22,6 +22,8 @@ - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - define: diff --git a/components/board/silabs/component/brd4338a_config.slcc b/components/board/silabs/component/brd4338a_config.slcc index 5afc9136e..3102163ba 100644 --- a/components/board/silabs/component/brd4338a_config.slcc +++ b/components/board/silabs/component/brd4338a_config.slcc @@ -95,11 +95,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -120,6 +115,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config @@ -176,4 +181,36 @@ component: "%extension-wiseconnect3_sdk%analog_comparator_instance" file_id: analog_comparator_config instance: comparator2 - path: common_config/sl_si91x_analog_comparator_comparator2_config.h \ No newline at end of file + path: common_config/sl_si91x_analog_comparator_comparator2_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn0 + path: brd4338a/sl_si91x_button_init_btn0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn1 + path: brd4338a/sl_si91x_button_init_btn1_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si70xx" + file_id: si70xx_config + path: brd4338a/sl_si91x_i2c_init_i2c2_config.h + - override: + component: "%extension-wiseconnect3_sdk%memlcd_917" + file_id: memlcd_config + path: brd4338a/sl_si91x_memlcd_config.h + - override: + component: "%extension-wiseconnect3_sdk%iostream_si91x" + file_id: iostream_usart_config + path: brd4338a/sl_iostream_usart_vcom_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led0 + path: brd4338a/sl_si91x_led_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led1 + path: brd4338a/sl_si91x_led_init_led1_config.h diff --git a/components/board/silabs/component/brd4339a.slcc b/components/board/silabs/component/brd4339a.slcc index 387b2b534..9e7c8ba7d 100644 --- a/components/board/silabs/component/brd4339a.slcc +++ b/components/board/silabs/component/brd4339a.slcc @@ -22,6 +22,8 @@ - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a diff --git a/components/board/silabs/component/brd4339a_config.slcc b/components/board/silabs/component/brd4339a_config.slcc index c7c64a313..3e7905a2c 100644 --- a/components/board/silabs/component/brd4339a_config.slcc +++ b/components/board/silabs/component/brd4339a_config.slcc @@ -15,6 +15,16 @@ component: "%extension-wiseconnect3_sdk%psram_core" file_id: psram_pin_config path: brd4339a/sl_si91x_psram_pin_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led0 + path: brd4339a/sl_si91x_led_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led1 + path: brd4339a/sl_si91x_led_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -95,11 +105,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -120,6 +125,11 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config @@ -170,4 +180,26 @@ - override: component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: pin_config - path: brd4339a/pin_config.h \ No newline at end of file + path: brd4339a/pin_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn0 + path: brd4339a/sl_si91x_button_init_btn0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn1 + path: brd4339a/sl_si91x_button_init_btn1_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si70xx" + file_id: si70xx_config + path: brd4339a/sl_si91x_i2c_init_i2c2_config.h + - override: + component: "%extension-wiseconnect3_sdk%memlcd_917" + file_id: memlcd_config + path: brd4339a/sl_si91x_memlcd_config.h + - override: + component: "%extension-wiseconnect3_sdk%iostream_si91x" + file_id: iostream_usart_config + path: brd4339a/sl_iostream_usart_vcom_config.h diff --git a/components/board/silabs/component/brd4339b.slcc b/components/board/silabs/component/brd4339b.slcc index 2e78bbbcb..613272ac2 100644 --- a/components/board/silabs/component/brd4339b.slcc +++ b/components/board/silabs/component/brd4339b.slcc @@ -22,6 +22,8 @@ - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - define: diff --git a/components/board/silabs/component/brd4339b_config.slcc b/components/board/silabs/component/brd4339b_config.slcc index 2a0b82601..36f718e4f 100644 --- a/components/board/silabs/component/brd4339b_config.slcc +++ b/components/board/silabs/component/brd4339b_config.slcc @@ -17,6 +17,16 @@ component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: RTE_Device_917 path: brd4339b/RTE_Device_917.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led0 + path: brd4339b/sl_si91x_led_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led1 + path: brd4339b/sl_si91x_led_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -97,11 +107,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -122,6 +127,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config @@ -168,4 +183,26 @@ - override: component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: pin_config - path: brd4339b/pin_config.h \ No newline at end of file + path: brd4339b/pin_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn0 + path: brd4339b/sl_si91x_button_init_btn0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn1 + path: brd4339b/sl_si91x_button_init_btn1_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si70xx" + file_id: si70xx_config + path: brd4339b/sl_si91x_i2c_init_i2c2_config.h + - override: + component: "%extension-wiseconnect3_sdk%memlcd_917" + file_id: memlcd_config + path: brd4339b/sl_si91x_memlcd_config.h + - override: + component: "%extension-wiseconnect3_sdk%iostream_si91x" + file_id: iostream_usart_config + path: brd4339b/sl_iostream_usart_vcom_config.h diff --git a/components/board/silabs/component/brd4340a.slcc b/components/board/silabs/component/brd4340a.slcc index 9253a679f..b0d3e2964 100644 --- a/components/board/silabs/component/brd4340a.slcc +++ b/components/board/silabs/component/brd4340a.slcc @@ -22,6 +22,8 @@ - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - id: "%extension-wiseconnect3_sdk%psram_aps6404l_sqh" diff --git a/components/board/silabs/component/brd4340a_config.slcc b/components/board/silabs/component/brd4340a_config.slcc index bcf310f00..e84028f18 100644 --- a/components/board/silabs/component/brd4340a_config.slcc +++ b/components/board/silabs/component/brd4340a_config.slcc @@ -19,6 +19,16 @@ component: "%extension-wiseconnect3_sdk%psram_core" file_id: psram_pin_config path: brd4340a/sl_si91x_psram_pin_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led0 + path: brd4340a/sl_si91x_led_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led1 + path: brd4340a/sl_si91x_led_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -99,11 +109,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -124,6 +129,11 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config @@ -180,4 +190,26 @@ component: "%extension-wiseconnect3_sdk%analog_comparator_instance" file_id: analog_comparator_config instance: comparator2 - path: common_config/sl_si91x_analog_comparator_comparator2_config.h \ No newline at end of file + path: common_config/sl_si91x_analog_comparator_comparator2_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn0 + path: brd4340a/sl_si91x_button_init_btn0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn1 + path: brd4340a/sl_si91x_button_init_btn1_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si70xx" + file_id: si70xx_config + path: brd4340a/sl_si91x_i2c_init_i2c2_config.h + - override: + component: "%extension-wiseconnect3_sdk%memlcd_917" + file_id: memlcd_config + path: brd4340a/sl_si91x_memlcd_config.h + - override: + component: "%extension-wiseconnect3_sdk%iostream_si91x" + file_id: iostream_usart_config + path: brd4340a/sl_iostream_usart_vcom_config.h diff --git a/components/board/silabs/component/brd4340b.slcc b/components/board/silabs/component/brd4340b.slcc index 816300724..141b7f810 100644 --- a/components/board/silabs/component/brd4340b.slcc +++ b/components/board/silabs/component/brd4340b.slcc @@ -22,6 +22,8 @@ - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - define: diff --git a/components/board/silabs/component/brd4340b_config.slcc b/components/board/silabs/component/brd4340b_config.slcc index 6d48eba44..7c27e49e1 100644 --- a/components/board/silabs/component/brd4340b_config.slcc +++ b/components/board/silabs/component/brd4340b_config.slcc @@ -15,6 +15,16 @@ component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: RTE_Device_917 path: brd4340b/RTE_Device_917.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led0 + path: brd4340b/sl_si91x_led_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led1 + path: brd4340b/sl_si91x_led_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -95,11 +105,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -120,6 +125,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config @@ -166,4 +181,26 @@ - override: component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: pin_config - path: brd4340b/pin_config.h \ No newline at end of file + path: brd4340b/pin_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn0 + path: brd4340b/sl_si91x_button_init_btn0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn1 + path: brd4340b/sl_si91x_button_init_btn1_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si70xx" + file_id: si70xx_config + path: brd4340b/sl_si91x_i2c_init_i2c2_config.h + - override: + component: "%extension-wiseconnect3_sdk%memlcd_917" + file_id: memlcd_config + path: brd4340b/sl_si91x_memlcd_config.h + - override: + component: "%extension-wiseconnect3_sdk%iostream_si91x" + file_id: iostream_usart_config + path: brd4340b/sl_iostream_usart_vcom_config.h diff --git a/components/board/silabs/component/brd4341a.slcc b/components/board/silabs/component/brd4341a.slcc index 6bfe6699c..545718c15 100644 --- a/components/board/silabs/component/brd4341a.slcc +++ b/components/board/silabs/component/brd4341a.slcc @@ -22,6 +22,8 @@ - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - define: diff --git a/components/board/silabs/component/brd4341a_config.slcc b/components/board/silabs/component/brd4341a_config.slcc index 3968fa570..2f28148ae 100644 --- a/components/board/silabs/component/brd4341a_config.slcc +++ b/components/board/silabs/component/brd4341a_config.slcc @@ -15,6 +15,16 @@ component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: RTE_Device_917 path: brd4341a/RTE_Device_917.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led0 + path: brd4341a/sl_si91x_led_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led1 + path: brd4341a/sl_si91x_led_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -95,11 +105,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -120,6 +125,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config @@ -162,4 +177,26 @@ - override: component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: sl_board_control - path: brd4341a/sl_board_control.h \ No newline at end of file + path: brd4341a/sl_board_control.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn0 + path: brd4341a/sl_si91x_button_init_btn0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn1 + path: brd4341a/sl_si91x_button_init_btn1_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si70xx" + file_id: si70xx_config + path: brd4341a/sl_si91x_i2c_init_i2c2_config.h + - override: + component: "%extension-wiseconnect3_sdk%memlcd_917" + file_id: memlcd_config + path: brd4341a/sl_si91x_memlcd_config.h + - override: + component: "%extension-wiseconnect3_sdk%iostream_si91x" + file_id: iostream_usart_config + path: brd4341a/sl_iostream_usart_vcom_config.h diff --git a/components/board/silabs/component/brd4342a.slcc b/components/board/silabs/component/brd4342a.slcc index c45ac18e6..5ecd7b49a 100644 --- a/components/board/silabs/component/brd4342a.slcc +++ b/components/board/silabs/component/brd4342a.slcc @@ -22,6 +22,8 @@ - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_radio_board - recommends: - id: brd4002a - define: diff --git a/components/board/silabs/component/brd4342a_config.slcc b/components/board/silabs/component/brd4342a_config.slcc index 3c62d9d83..6f116cdf6 100644 --- a/components/board/silabs/component/brd4342a_config.slcc +++ b/components/board/silabs/component/brd4342a_config.slcc @@ -15,6 +15,16 @@ component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: RTE_Device_917 path: brd4342a/RTE_Device_917.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led0 + path: brd4342a/sl_si91x_led_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led1 + path: brd4342a/sl_si91x_led_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -95,11 +105,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%psram_core" file_id: psram_pin_config @@ -124,6 +129,11 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config @@ -180,4 +190,26 @@ component: "%extension-wiseconnect3_sdk%analog_comparator_instance" file_id: analog_comparator_config instance: comparator2 - path: common_config/sl_si91x_analog_comparator_comparator2_config.h \ No newline at end of file + path: common_config/sl_si91x_analog_comparator_comparator2_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn0 + path: brd4342a/sl_si91x_button_init_btn0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn1 + path: brd4342a/sl_si91x_button_init_btn1_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si70xx" + file_id: si70xx_config + path: brd4342a/sl_si91x_i2c_init_i2c2_config.h + - override: + component: "%extension-wiseconnect3_sdk%memlcd_917" + file_id: memlcd_config + path: brd4342a/sl_si91x_memlcd_config.h + - override: + component: "%extension-wiseconnect3_sdk%iostream_si91x" + file_id: iostream_usart_config + path: brd4342a/sl_iostream_usart_vcom_config.h diff --git a/components/board/silabs/component/brd4343a.slcc b/components/board/silabs/component/brd4343a.slcc index f9cc2a67b..0e4bd381c 100644 --- a/components/board/silabs/component/brd4343a.slcc +++ b/components/board/silabs/component/brd4343a.slcc @@ -16,12 +16,15 @@ - name: external_psram_none - name: rsilib_board - name: si91x_common_flash + - name: si91x_32kHz_external_oscillator - provides: - name: brd4343a - name: hardware_board - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_module_radio_board - recommends: - id: brd4002a - define: @@ -29,7 +32,7 @@ value: '"BRD4343A"' - name: SL_BOARD_REV value: '"A02"' - - name: SL_SI91X_MODULE_BOARD + - name: SL_SI91X_ACX_MODULE value: '1' - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER value: '1' diff --git a/components/board/silabs/component/brd4343a_config.slcc b/components/board/silabs/component/brd4343a_config.slcc index 1d5287b8f..12ade2a25 100644 --- a/components/board/silabs/component/brd4343a_config.slcc +++ b/components/board/silabs/component/brd4343a_config.slcc @@ -15,6 +15,16 @@ component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: RTE_Device_917 path: brd4343a/RTE_Device_917.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led0 + path: brd4343a/sl_si91x_led_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led1 + path: brd4343a/sl_si91x_led_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -95,11 +105,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -120,6 +125,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config @@ -166,4 +181,26 @@ - override: component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: pin_config - path: brd4343a/pin_config.h \ No newline at end of file + path: brd4343a/pin_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn0 + path: brd4343a/sl_si91x_button_init_btn0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn1 + path: brd4343a/sl_si91x_button_init_btn1_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si70xx" + file_id: si70xx_config + path: brd4343a/sl_si91x_i2c_init_i2c2_config.h + - override: + component: "%extension-wiseconnect3_sdk%memlcd_917" + file_id: memlcd_config + path: brd4343a/sl_si91x_memlcd_config.h + - override: + component: "%extension-wiseconnect3_sdk%iostream_si91x" + file_id: iostream_usart_config + path: brd4343a/sl_iostream_usart_vcom_config.h diff --git a/components/board/silabs/component/brd4343b.slcc b/components/board/silabs/component/brd4343b.slcc index 82ae674ba..b21f39de2 100644 --- a/components/board/silabs/component/brd4343b.slcc +++ b/components/board/silabs/component/brd4343b.slcc @@ -16,12 +16,15 @@ - name: external_psram_none - name: rsilib_board - name: si91x_common_flash + - name: si91x_32kHz_external_oscillator - provides: - name: brd4343b - name: hardware_board - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_module_radio_board - recommends: - id: brd4002a - define: @@ -29,7 +32,7 @@ value: '"BRD4343B"' - name: SL_BOARD_REV value: '"A02"' - - name: SL_SI91X_MODULE_BOARD + - name: SL_SI91X_ACX_MODULE value: '1' - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER value: '1' diff --git a/components/board/silabs/component/brd4343b_config.slcc b/components/board/silabs/component/brd4343b_config.slcc index 199d42521..079cb8fb1 100644 --- a/components/board/silabs/component/brd4343b_config.slcc +++ b/components/board/silabs/component/brd4343b_config.slcc @@ -15,6 +15,16 @@ component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: RTE_Device_917 path: brd4343b/RTE_Device_917.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led0 + path: brd4343b/sl_si91x_led_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led1 + path: brd4343b/sl_si91x_led_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -95,11 +105,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -120,6 +125,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config @@ -166,4 +181,26 @@ - override: component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: pin_config - path: brd4343b/pin_config.h \ No newline at end of file + path: brd4343b/pin_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn0 + path: brd4343b/sl_si91x_button_init_btn0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn1 + path: brd4343b/sl_si91x_button_init_btn1_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si70xx" + file_id: si70xx_config + path: brd4343b/sl_si91x_i2c_init_i2c2_config.h + - override: + component: "%extension-wiseconnect3_sdk%memlcd_917" + file_id: memlcd_config + path: brd4343b/sl_si91x_memlcd_config.h + - override: + component: "%extension-wiseconnect3_sdk%iostream_si91x" + file_id: iostream_usart_config + path: brd4343b/sl_iostream_usart_vcom_config.h diff --git a/components/board/silabs/component/brd4343q.slcc b/components/board/silabs/component/brd4343q.slcc index dd2d84df9..178a3d29d 100644 --- a/components/board/silabs/component/brd4343q.slcc +++ b/components/board/silabs/component/brd4343q.slcc @@ -16,12 +16,15 @@ - name: external_psram_none - name: rsilib_board - name: si91x_common_flash + - name: si91x_32kHz_external_oscillator - provides: - name: brd4343q - name: hardware_board - name: hardware_board_rb - name: hardware_board_supports_multi_slave - name: si91x_b0_board + - name: si917_prod_board + - name: si917_module_radio_board - recommends: - id: brd4002a - define: @@ -29,7 +32,7 @@ value: '"BRD4343Q"' - name: SL_BOARD_REV value: '"A02"' - - name: SL_SI91X_MODULE_BOARD + - name: SL_SI91X_ACX_MODULE value: '1' - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER value: '1' diff --git a/components/board/silabs/component/brd4343q_config.slcc b/components/board/silabs/component/brd4343q_config.slcc index daf5edac0..4e77d9af0 100644 --- a/components/board/silabs/component/brd4343q_config.slcc +++ b/components/board/silabs/component/brd4343q_config.slcc @@ -15,6 +15,16 @@ component: "%extension-wiseconnect3_sdk%board_configuration_headers" file_id: RTE_Device_917 path: brd4343q/RTE_Device_917.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led0 + path: brd4343q/sl_si91x_led_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_led_917" + file_id: led_config + instance: led1 + path: brd4343q/sl_si91x_led_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%adc_instance" file_id: adc_config @@ -95,11 +105,6 @@ file_id: adc_config instance: channel_16 path: common_config/sl_si91x_adc_init_channel_16_config.h - - override: - component: "%extension-wiseconnect3_sdk%pwm_instance" - file_id: pwm_config - instance: led0 - path: common_config/sl_si91x_pwm_init_led0_config.h - override: component: "%extension-wiseconnect3_sdk%pwm_instance" file_id: pwm_config @@ -120,6 +125,16 @@ file_id: pwm_config instance: channel_3 path: common_config/sl_si91x_pwm_init_channel_3_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led0 + path: common_config/sl_si91x_pwm_init_led0_config.h + - override: + component: "%extension-wiseconnect3_sdk%pwm_instance" + file_id: pwm_config + instance: led1 + path: common_config/sl_si91x_pwm_init_led1_config.h - override: component: "%extension-wiseconnect3_sdk%i2c_instance" file_id: i2c_config @@ -176,4 +191,26 @@ component: "%extension-wiseconnect3_sdk%analog_comparator_instance" file_id: analog_comparator_config instance: comparator2 - path: common_config/sl_si91x_analog_comparator_comparator2_config.h \ No newline at end of file + path: common_config/sl_si91x_analog_comparator_comparator2_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn0 + path: brd4343q/sl_si91x_button_init_btn0_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si91x_button_917" + file_id: button_config + instance: btn1 + path: brd4343q/sl_si91x_button_init_btn1_config.h + - override: + component: "%extension-wiseconnect3_sdk%sl_si70xx" + file_id: si70xx_config + path: brd4343q/sl_si91x_i2c_init_i2c2_config.h + - override: + component: "%extension-wiseconnect3_sdk%memlcd_917" + file_id: memlcd_config + path: brd4343q/sl_si91x_memlcd_config.h + - override: + component: "%extension-wiseconnect3_sdk%iostream_si91x" + file_id: iostream_usart_config + path: brd4343q/sl_iostream_usart_vcom_config.h diff --git a/components/board/silabs/config/brd2605a/RTE_Device_917.h b/components/board/silabs/config/brd2605a/RTE_Device_917.h index 61ade5b1d..f5b2e6a3d 100644 --- a/components/board/silabs/config/brd2605a/RTE_Device_917.h +++ b/components/board/silabs/config/brd2605a/RTE_Device_917.h @@ -38,8 +38,6 @@ #define BUTTON_0_GPIO_PIN 2 -#define SI917_DEVKIT - #define RTE_BUTTON0_PORT 0 #define RTE_BUTTON0_NUMBER 0 #define RTE_BUTTON0_PIN (2U) @@ -49,23 +47,26 @@ #define RTE_BUTTON1_PIN (1U) #define RTE_BUTTON1_PAD 13 -// RED LED -#define RTE_LEDR_PORT 3 -#define RTE_LEDR_NUMBER 0 -#define RTE_LEDR_PIN 2 -#define RTE_LEDR_PAD 14 +// RGB LED Instance 0 +#define RTE_LED0_NUMBER 0 + +// Red LED +#define RTE_LED0_LEDR_PORT 3 +#define RTE_LED0_LEDR_NUMBER RTE_LED0_NUMBER +#define RTE_LED0_LEDR_PIN 2 +#define RTE_LED0_LEDR_PAD 14 -// GREEN LED -#define RTE_LEDG_PORT 3 -#define RTE_LEDG_NUMBER 1 -#define RTE_LEDG_PIN 3 -#define RTE_LEDG_PAD 15 +// Green LED +#define RTE_LED0_LEDG_PORT 3 +#define RTE_LED0_LEDG_NUMBER RTE_LED0_NUMBER +#define RTE_LED0_LEDG_PIN 3 +#define RTE_LED0_LEDG_PAD 15 -//BLUE LED -#define RTE_LEDB_PORT 0 -#define RTE_LEDB_NUMBER 2 -#define RTE_LEDB_PIN 15 -#define RTE_LEDB_PAD 8 +// Blue LED +#define RTE_LED0_LEDB_PORT 0 +#define RTE_LED0_LEDB_NUMBER RTE_LED0_NUMBER +#define RTE_LED0_LEDB_PIN 15 +#define RTE_LED0_LEDB_PAD 8 // USART0 [Driver_USART0] // Configuration settings for Driver_USART0 in component ::CMSIS Driver:USART @@ -120,7 +121,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -178,7 +179,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -246,7 +247,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -305,7 +306,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -354,7 +355,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -406,7 +407,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -458,7 +459,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -502,7 +503,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -541,7 +542,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -560,7 +561,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -577,7 +578,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -649,7 +650,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -713,7 +714,7 @@ #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -777,7 +778,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -850,7 +851,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -925,7 +926,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -952,7 +953,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -975,7 +976,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -992,7 +993,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1035,7 +1036,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1078,7 +1079,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1121,7 +1122,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1169,7 +1170,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1194,7 +1195,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1222,7 +1223,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1244,7 +1245,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1306,7 +1307,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1364,7 +1365,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1418,7 +1419,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1472,7 +1473,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1516,7 +1517,7 @@ #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1534,14 +1535,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1559,14 +1560,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1590,14 +1591,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1615,30 +1616,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT -#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 +#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SSI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1729,7 +1730,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1777,7 +1778,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1825,7 +1826,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1873,7 +1874,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1925,7 +1926,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1973,7 +1974,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2069,7 +2070,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2091,7 +2092,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2113,7 +2114,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2139,7 +2140,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2233,7 +2234,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2286,7 +2287,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2368,7 +2369,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2459,7 +2460,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2537,7 +2538,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2575,8 +2576,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2637,7 +2638,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2692,7 +2693,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2746,7 +2747,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2800,7 +2801,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2853,7 +2854,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2908,7 +2909,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2973,7 +2974,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -3009,7 +3010,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3056,7 +3057,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3098,7 +3099,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3125,7 +3126,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3151,7 +3152,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3165,42 +3166,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3544,7 +3545,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3576,7 +3577,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3611,7 +3612,7 @@ #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3647,7 +3648,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3679,7 +3680,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3706,7 +3707,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3742,7 +3743,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3772,7 +3773,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3805,7 +3806,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3843,7 +3844,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3868,7 +3869,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3904,7 +3905,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3952,7 +3953,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3978,7 +3979,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3998,7 +3999,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4164,270 +4165,13 @@ #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4436,7 +4180,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4445,7 +4189,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4454,7 +4198,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4463,7 +4207,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4472,7 +4216,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4481,7 +4225,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4491,7 +4235,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 @@ -4906,4 +4650,4 @@ #define RTE_MEMLCD_EXTCOMIN_PORT 0 // Memlcd external communication port #define RTE_MEMLCD_ENABLE_DISPLAY_PIN 0 // Memlcd display enable pin -#define RTE_MEMLCD_ENABLE_DISPLAY_PORT 0 // Memlcd display enable port +#define RTE_MEMLCD_ENABLE_DISPLAY_PORT 0 // Memlcd display enable port \ No newline at end of file diff --git a/components/board/silabs/config/brd2605a/pin_config.h b/components/board/silabs/config/brd2605a/pin_config.h index 2bbc8c59c..60a6a7d20 100644 --- a/components/board/silabs/config/brd2605a/pin_config.h +++ b/components/board/silabs/config/brd2605a/pin_config.h @@ -25,8 +25,8 @@ // $[SSI_SLAVE] // [SSI_SLAVE]$ -// $[ULP_SPI] -// [ULP_SPI]$ +// $[ULP_SSI] +// [ULP_SSI]$ // $[GSPI_MASTER] // [GSPI_MASTER]$ @@ -127,6 +127,15 @@ // $[DAC1] // [DAC1]$ +// $[SYSRTC] +// [SYSRTC]$ + +// $[UULP_VBAT_GPIO] +// [UULP_VBAT_GPIO]$ + +// $[GPIO] +// [GPIO]$ + // $[CUSTOM_PIN_NAME] #ifndef _PORT #define _PORT 0 diff --git a/components/board/silabs/config/brd2605a/sl_iostream_usart_vcom_config.h b/components/board/silabs/config/brd2605a/sl_iostream_usart_vcom_config.h new file mode 100644 index 000000000..97ff2003b --- /dev/null +++ b/components/board/silabs/config/brd2605a/sl_iostream_usart_vcom_config.h @@ -0,0 +1,135 @@ +/***************************************************************************/ /** + * @file + * @brief IOSTREAM_USART Config. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_IOSTREAM_USART_VCOM_CONFIG_H +#define SL_IOSTREAM_USART_VCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// USART settings + +#define ENABLE 1 +#define DISABLE 0 + +// Baud rate <9600-921600> +// Default: 115200 +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + +// Parity +// No Parity +// Even parity +// Odd parity +// Default: SL_USART_NO_PARITY +#define SL_IOSTREAM_USART_VCOM_PARITY SL_USART_NO_PARITY + +// Stop bits +// 0.5 stop bits +// 1 stop bits +// 1.5 stop bits +// 2 stop bits +// Default: SL_USART_STOP_BITS_1 +#define SL_IOSTREAM_USART_VCOM_STOP_BITS SL_USART_STOP_BITS_1 + +#define SL_IOSTREAM_USART_VCOM_MODE SL_USART_MODE_ASYNCHRONOUS + +// Data Width +// 5 data bits +// 6 data bits +// 7 data bits +// 8 data bits +// Default: SL_USART_DATA_BITS_8 +#define SL_IOSTREAM_USART_VCOM_DATA_BITS SL_USART_DATA_BITS_8 + +// Flow control +// None +// CTS +// RTS +// CTS/RTS +// Default: SL_USART_FLOW_CONTROL_NONE +#define SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE SL_USART_FLOW_CONTROL_NONE + +// VCOM enable +// Default: 1 +#define SL_SI91X_VCOM_ENABLE 1 + +#define USART0_MODULE 0 +#define UART1_MODULE 1 +#define ULP_UART_MODULE 2 + +#if SL_SI91X_VCOM_ENABLE +#define SL_USART_MODULE ULP_UART_MODULE +#else +#define SL_USART_MODULE USART0_MODULE +#endif + +// Receive buffer size +// Default: 32 +#define SL_IOSTREAM_USART_VCOM_RX_BUFFER_SIZE 32 + +// Convert \n to \r\n +// It can be changed at runtime using the C API. +// Default: 0 +#define SL_IOSTREAM_USART_VCOM_CONVERT_BY_DEFAULT_LF_TO_CRLF 0 +// + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_IOSTREAM +// $[USART_SL_SI91X_IOSTREAM] +#ifndef SL_SI91X_IOSTREAM_PERIPHERAL +#define SL_SI91X_IOSTREAM_PERIPHERAL ULP_UART +#endif + +// ULP_UART TX on ULP_GPIO_11/GPIO_75 +#ifndef SL_SI91X_IOSTREAM_TX_PORT +#define SL_SI91X_IOSTREAM_TX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_TX_PIN +#define SL_SI91X_IOSTREAM_TX_PIN 11 +#endif +#ifndef SL_SI91X_IOSTREAM_TX_LOC +#define SL_SI91X_IOSTREAM_TX_LOC 1 +#endif + +// ULP_UART RX on ULP_GPIO_9/GPIO_73 +#ifndef SL_SI91X_IOSTREAM_RX_PORT +#define SL_SI91X_IOSTREAM_RX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_RX_PIN +#define SL_SI91X_IOSTREAM_RX_PIN 9 +#endif +#ifndef SL_SI91X_IOSTREAM_RX_LOC +#define SL_SI91X_IOSTREAM_RX_LOC 3 +#endif +// [USART_SL_SI91X_IOSTREAM]$ +// <<< sl:end pin_tool >>> + +#endif \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/config/sl_si91x_button_instance_config.h b/components/board/silabs/config/brd2605a/sl_si91x_button_init_btn0_config.h similarity index 61% rename from components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/config/sl_si91x_button_instance_config.h rename to components/board/silabs/config/brd2605a/sl_si91x_button_init_btn0_config.h index b1e6564b5..f31924c9a 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/config/sl_si91x_button_instance_config.h +++ b/components/board/silabs/config/brd2605a/sl_si91x_button_init_btn0_config.h @@ -1,28 +1,42 @@ -/***************************************************************************/ /** - * @file sl_si91x_button_config.h - * @brief Button Driver Configuration - ******************************************************************************* - * # License - * Copyright 2023 Silicon Laboratories Inc. www.silabs.com - *******************************************************************************/ - -#ifndef SL_SI91X_BUTTON_INSTANCE_CONFIG_H -#define SL_SI91X_BUTTON_INSTANCE_CONFIG_H - -#include "sl_si91x_button.h" - -// <<< Use Configuration Wizard in Context Menu >>> - -// Button Interrupt Configuration -// High level interrupt -// Low level interrupt -// High level and low level interrupt -// Rise edge interrupt -// Fall edge interrupt -// Rise edge and fall edge interrupt -// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT -#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT - -// <<< end of configuration section >>> - -#endif // SL_SI91X_BUTTON_INSTANCE_CONFIG_H +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn0_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/components/board/silabs/config/brd2605a/sl_si91x_button_init_btn1_config.h b/components/board/silabs/config/brd2605a/sl_si91x_button_init_btn1_config.h new file mode 100644 index 000000000..83092e7e1 --- /dev/null +++ b/components/board/silabs/config/brd2605a/sl_si91x_button_init_btn1_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn1_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 1 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/components/board/silabs/config/brd2605a/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/brd2605a/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..1719bbde9 --- /dev/null +++ b/components/board/silabs/config/brd2605a/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,115 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_I2C2_CONFIG_H +#define SL_SI91X_I2C_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration + +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_I2C_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd2605a/sl_si91x_icm40627_config.h b/components/board/silabs/config/brd2605a/sl_si91x_icm40627_config.h new file mode 100644 index 000000000..4e89413e1 --- /dev/null +++ b/components/board/silabs/config/brd2605a/sl_si91x_icm40627_config.h @@ -0,0 +1,94 @@ +/***************************************************************************/ /** +* @file sl_si91x_icm40627_config.h +* * @brief SSI Master/Slave API configuration +* ******************************************************************************* +* * # License +* * Copyright 2023 Silicon Laboratories Inc. www.silabs.com +* ******************************************************************************* +* * +* * SPDX-License-Identifier: Zlib +* * +* * The licensor of this software is Silicon Laboratories Inc. +* * +* * This software is provided 'as-is', without any express or implied +* * warranty. In no event will the authors be held liable for any damages +* * arising from the use of this software. +* * +* * Permission is granted to anyone to use this software for any purpose, +* * including commercial applications, and to alter it and redistribute it +* * freely, subject to the following restrictions: +* * +* * 1. The origin of this software must not be misrepresented; you must not +* * claim that you wrote the original software. If you use this software +* * in a product, an acknowledgment in the product documentation would be +* * appreciated but is not required. +* * 2. Altered source versions must be plainly marked as such, and must not be +* * misrepresented as being the original software. +* * 3. This notice may not be removed or altered from any source distribution. +* * +* ******************************************************************************/ + +#ifndef SL_SI91X_ICM40627_CONFIG_H +#define SL_SI91X_ICM40627_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +// <<< sl:start pin_tool >>> +// SL_SI91X_ICM40627 +// $[SSI_SL_SI91X_ICM40627] +#ifndef SL_SI91X_ICM40627_PERIPHERAL +#define SL_SI91X_ICM40627_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_SI91X_ICM40627_MOSI__PORT +#define SL_SI91X_ICM40627_MOSI__PORT ULP +#endif +#ifndef SL_SI91X_ICM40627_MOSI__PIN +#define SL_SI91X_ICM40627_MOSI__PIN 1 +#endif +#ifndef SL_SI91X_ICM40627_MOSI_LOC +#define SL_SI91X_ICM40627_MOSI_LOC 0 +#endif + +// ULP_SSI MISO_ on ULP_GPIO_2/GPIO_66 +#ifndef SL_SI91X_ICM40627_MISO__PORT +#define SL_SI91X_ICM40627_MISO__PORT ULP +#endif +#ifndef SL_SI91X_ICM40627_MISO__PIN +#define SL_SI91X_ICM40627_MISO__PIN 2 +#endif +#ifndef SL_SI91X_ICM40627_MISO_LOC +#define SL_SI91X_ICM40627_MISO_LOC 12 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_SI91X_ICM40627_SCK__PORT +#define SL_SI91X_ICM40627_SCK__PORT ULP +#endif +#ifndef SL_SI91X_ICM40627_SCK__PIN +#define SL_SI91X_ICM40627_SCK__PIN 8 +#endif +#ifndef SL_SI91X_ICM40627_SCK_LOC +#define SL_SI91X_ICM40627_SCK_LOC 7 +#endif + +// ULP_SSI CS0_ on ULP_GPIO_10/GPIO_74 +#ifndef SL_SI91X_ICM40627_CS0__PORT +#define SL_SI91X_ICM40627_CS0__PORT ULP +#endif +#ifndef SL_SI91X_ICM40627_CS0__PIN +#define SL_SI91X_ICM40627_CS0__PIN 10 +#endif +#ifndef SL_SI91X_ICM40627_CS0_LOC +#define SL_SI91X_ICM40627_CS0_LOC 9 +#endif +// [SSI_SL_SI91X_ICM40627]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif +#endif /* SL_SI91X_ICM40627_CONFIG_H */ diff --git a/components/board/silabs/config/brd2605a/sl_si91x_led_init_ledB_config.h b/components/board/silabs/config/brd2605a/sl_si91x_led_init_ledB_config.h new file mode 100644 index 000000000..408c0c566 --- /dev/null +++ b/components/board/silabs/config/brd2605a/sl_si91x_led_init_ledB_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_ledb_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LEDB_CONFIG_H +#define SL_SI91X_LED_INIT_LEDB_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_B +// $[GPIO_SL_SI91X_LED_B] +#ifndef SL_SI91X_LED_B_PORT +#define SL_SI91X_LED_B_PORT HP +#endif +#ifndef SL_SI91X_LED_B_PIN +#define SL_SI91X_LED_B_PIN 15 +#endif +// [GPIO_SL_SI91X_LED_B]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LEDB_PIN SL_SI91X_LED_B_PIN +#define SL_LED_LEDB_PORT RTE_LEDB_PORT +#define SL_LED_LEDB_NUMBER RTE_LEDB_NUMBER + +#endif // SL_SI91X_LED_INIT_LEDB_CONFIG_H diff --git a/components/board/silabs/config/brd4338a/RTE_Device_917.h b/components/board/silabs/config/brd4338a/RTE_Device_917.h index 64cb5a563..a23d43e67 100644 --- a/components/board/silabs/config/brd4338a/RTE_Device_917.h +++ b/components/board/silabs/config/brd4338a/RTE_Device_917.h @@ -110,7 +110,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -168,7 +168,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -236,7 +236,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -295,7 +295,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -344,7 +344,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -396,7 +396,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -448,7 +448,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -492,7 +492,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -531,7 +531,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -550,7 +550,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -567,7 +567,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -639,7 +639,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -703,7 +703,7 @@ #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -767,7 +767,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -840,7 +840,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -915,7 +915,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -942,7 +942,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -965,7 +965,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -982,7 +982,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1025,7 +1025,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1068,7 +1068,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1111,7 +1111,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1159,7 +1159,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1184,7 +1184,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1212,7 +1212,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1234,7 +1234,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1296,7 +1296,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1354,7 +1354,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1408,7 +1408,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1462,7 +1462,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1506,7 +1506,7 @@ #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1524,14 +1524,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1549,14 +1549,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1580,14 +1580,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1605,30 +1605,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1719,7 +1719,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1767,7 +1767,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1815,7 +1815,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1863,7 +1863,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1915,7 +1915,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1963,7 +1963,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2059,7 +2059,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2081,7 +2081,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2103,7 +2103,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2129,7 +2129,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2223,7 +2223,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2276,7 +2276,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2358,7 +2358,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2449,7 +2449,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2527,7 +2527,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2565,8 +2565,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2627,7 +2627,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2682,7 +2682,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2736,7 +2736,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2790,7 +2790,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2843,7 +2843,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2898,7 +2898,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2963,7 +2963,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2999,7 +2999,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3046,7 +3046,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3088,7 +3088,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3115,7 +3115,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3141,7 +3141,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3155,42 +3155,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3534,7 +3534,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3566,7 +3566,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3601,7 +3601,7 @@ #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3637,7 +3637,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3669,7 +3669,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3696,7 +3696,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3732,7 +3732,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3762,7 +3762,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3795,7 +3795,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3833,7 +3833,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3858,7 +3858,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3894,7 +3894,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3942,7 +3942,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3968,7 +3968,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3988,7 +3988,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4154,270 +4154,13 @@ #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4426,7 +4169,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4435,7 +4178,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4444,7 +4187,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4453,7 +4196,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4462,7 +4205,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4471,7 +4214,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4481,7 +4224,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 diff --git a/components/board/silabs/config/brd4338a/pin_config.h b/components/board/silabs/config/brd4338a/pin_config.h index 2bbc8c59c..60a6a7d20 100644 --- a/components/board/silabs/config/brd4338a/pin_config.h +++ b/components/board/silabs/config/brd4338a/pin_config.h @@ -25,8 +25,8 @@ // $[SSI_SLAVE] // [SSI_SLAVE]$ -// $[ULP_SPI] -// [ULP_SPI]$ +// $[ULP_SSI] +// [ULP_SSI]$ // $[GSPI_MASTER] // [GSPI_MASTER]$ @@ -127,6 +127,15 @@ // $[DAC1] // [DAC1]$ +// $[SYSRTC] +// [SYSRTC]$ + +// $[UULP_VBAT_GPIO] +// [UULP_VBAT_GPIO]$ + +// $[GPIO] +// [GPIO]$ + // $[CUSTOM_PIN_NAME] #ifndef _PORT #define _PORT 0 diff --git a/components/board/silabs/config/brd4338a/sl_iostream_usart_vcom_config.h b/components/board/silabs/config/brd4338a/sl_iostream_usart_vcom_config.h new file mode 100644 index 000000000..97ff2003b --- /dev/null +++ b/components/board/silabs/config/brd4338a/sl_iostream_usart_vcom_config.h @@ -0,0 +1,135 @@ +/***************************************************************************/ /** + * @file + * @brief IOSTREAM_USART Config. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_IOSTREAM_USART_VCOM_CONFIG_H +#define SL_IOSTREAM_USART_VCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// USART settings + +#define ENABLE 1 +#define DISABLE 0 + +// Baud rate <9600-921600> +// Default: 115200 +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + +// Parity +// No Parity +// Even parity +// Odd parity +// Default: SL_USART_NO_PARITY +#define SL_IOSTREAM_USART_VCOM_PARITY SL_USART_NO_PARITY + +// Stop bits +// 0.5 stop bits +// 1 stop bits +// 1.5 stop bits +// 2 stop bits +// Default: SL_USART_STOP_BITS_1 +#define SL_IOSTREAM_USART_VCOM_STOP_BITS SL_USART_STOP_BITS_1 + +#define SL_IOSTREAM_USART_VCOM_MODE SL_USART_MODE_ASYNCHRONOUS + +// Data Width +// 5 data bits +// 6 data bits +// 7 data bits +// 8 data bits +// Default: SL_USART_DATA_BITS_8 +#define SL_IOSTREAM_USART_VCOM_DATA_BITS SL_USART_DATA_BITS_8 + +// Flow control +// None +// CTS +// RTS +// CTS/RTS +// Default: SL_USART_FLOW_CONTROL_NONE +#define SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE SL_USART_FLOW_CONTROL_NONE + +// VCOM enable +// Default: 1 +#define SL_SI91X_VCOM_ENABLE 1 + +#define USART0_MODULE 0 +#define UART1_MODULE 1 +#define ULP_UART_MODULE 2 + +#if SL_SI91X_VCOM_ENABLE +#define SL_USART_MODULE ULP_UART_MODULE +#else +#define SL_USART_MODULE USART0_MODULE +#endif + +// Receive buffer size +// Default: 32 +#define SL_IOSTREAM_USART_VCOM_RX_BUFFER_SIZE 32 + +// Convert \n to \r\n +// It can be changed at runtime using the C API. +// Default: 0 +#define SL_IOSTREAM_USART_VCOM_CONVERT_BY_DEFAULT_LF_TO_CRLF 0 +// + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_IOSTREAM +// $[USART_SL_SI91X_IOSTREAM] +#ifndef SL_SI91X_IOSTREAM_PERIPHERAL +#define SL_SI91X_IOSTREAM_PERIPHERAL ULP_UART +#endif + +// ULP_UART TX on ULP_GPIO_11/GPIO_75 +#ifndef SL_SI91X_IOSTREAM_TX_PORT +#define SL_SI91X_IOSTREAM_TX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_TX_PIN +#define SL_SI91X_IOSTREAM_TX_PIN 11 +#endif +#ifndef SL_SI91X_IOSTREAM_TX_LOC +#define SL_SI91X_IOSTREAM_TX_LOC 1 +#endif + +// ULP_UART RX on ULP_GPIO_9/GPIO_73 +#ifndef SL_SI91X_IOSTREAM_RX_PORT +#define SL_SI91X_IOSTREAM_RX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_RX_PIN +#define SL_SI91X_IOSTREAM_RX_PIN 9 +#endif +#ifndef SL_SI91X_IOSTREAM_RX_LOC +#define SL_SI91X_IOSTREAM_RX_LOC 3 +#endif +// [USART_SL_SI91X_IOSTREAM]$ +// <<< sl:end pin_tool >>> + +#endif \ No newline at end of file diff --git a/components/board/silabs/config/brd4338a/sl_si91x_button_init_btn0_config.h b/components/board/silabs/config/brd4338a/sl_si91x_button_init_btn0_config.h new file mode 100644 index 000000000..f31924c9a --- /dev/null +++ b/components/board/silabs/config/brd4338a/sl_si91x_button_init_btn0_config.h @@ -0,0 +1,42 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn0_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/components/board/silabs/config/brd4338a/sl_si91x_button_init_btn1_config.h b/components/board/silabs/config/brd4338a/sl_si91x_button_init_btn1_config.h new file mode 100644 index 000000000..31838d62e --- /dev/null +++ b/components/board/silabs/config/brd4338a/sl_si91x_button_init_btn1_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn1_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/components/board/silabs/config/brd4338a/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/brd4338a/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..1719bbde9 --- /dev/null +++ b/components/board/silabs/config/brd4338a/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,115 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_I2C2_CONFIG_H +#define SL_SI91X_I2C_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration + +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_I2C_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4338a/sl_si91x_led_init_led0_config.h b/components/board/silabs/config/brd4338a/sl_si91x_led_init_led0_config.h new file mode 100644 index 000000000..2a41e676d --- /dev/null +++ b/components/board/silabs/config/brd4338a/sl_si91x_led_init_led0_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 2 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/components/board/silabs/config/brd4338a/sl_si91x_led_init_led1_config.h b/components/board/silabs/config/brd4338a/sl_si91x_led_init_led1_config.h new file mode 100644 index 000000000..14093b027 --- /dev/null +++ b/components/board/silabs/config/brd4338a/sl_si91x_led_init_led1_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H diff --git a/components/board/silabs/config/brd4338a/sl_si91x_memlcd_config.h b/components/board/silabs/config/brd4338a/sl_si91x_memlcd_config.h new file mode 100644 index 000000000..adc826da1 --- /dev/null +++ b/components/board/silabs/config/brd4338a/sl_si91x_memlcd_config.h @@ -0,0 +1,109 @@ +/***************************************************************************/ /** +* @file sl_si91x_memlcd_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_MEMLCD_CONFIG_H +#define SL_SI91X_MEMLCD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +// <<< sl:start pin_tool >>> +// SL_MEMLCD +// $[SSI_SL_MEMLCD] +#ifndef SL_MEMLCD_PERIPHERAL +#define SL_MEMLCD_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_MEMLCD_MOSI__PORT +#define SL_MEMLCD_MOSI__PORT ULP +#endif +#ifndef SL_MEMLCD_MOSI__PIN +#define SL_MEMLCD_MOSI__PIN 1 +#endif +#ifndef SL_MEMLCD_MOSI_LOC +#define SL_MEMLCD_MOSI_LOC 0 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_MEMLCD_SCK__PORT +#define SL_MEMLCD_SCK__PORT ULP +#endif +#ifndef SL_MEMLCD_SCK__PIN +#define SL_MEMLCD_SCK__PIN 8 +#endif +#ifndef SL_MEMLCD_SCK_LOC +#define SL_MEMLCD_SCK_LOC 7 +#endif + +// ULP_SSI CS0_ on ULP_GPIO_10/GPIO_74 +#ifndef SL_MEMLCD_CS0__PORT +#define SL_MEMLCD_CS0__PORT ULP +#endif +#ifndef SL_MEMLCD_CS0__PIN +#define SL_MEMLCD_CS0__PIN 10 +#endif +#ifndef SL_MEMLCD_CS0_LOC +#define SL_MEMLCD_CS0_LOC 9 +#endif +// [SSI_SL_MEMLCD]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_ENABLE +// $[GPIO_SL_MEMLCD_DISP_ENABLE] +#ifndef SL_MEMLCD_DISP_ENABLE_PORT +#define SL_MEMLCD_DISP_ENABLE_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_ENABLE_PIN +#define SL_MEMLCD_DISP_ENABLE_PIN 0 +#endif +// [GPIO_SL_MEMLCD_DISP_ENABLE]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_EXT_COMIN +// $[GPIO_SL_MEMLCD_DISP_EXT_COMIN] +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PORT +#define SL_MEMLCD_DISP_EXT_COMIN_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PIN +#define SL_MEMLCD_DISP_EXT_COMIN_PIN 3 +#endif +// [GPIO_SL_MEMLCD_DISP_EXT_COMIN]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_MEMLCD_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4339a/RTE_Device_917.h b/components/board/silabs/config/brd4339a/RTE_Device_917.h index c061ec27f..5d1cab81f 100644 --- a/components/board/silabs/config/brd4339a/RTE_Device_917.h +++ b/components/board/silabs/config/brd4339a/RTE_Device_917.h @@ -109,7 +109,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -167,7 +167,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -235,7 +235,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -294,7 +294,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -343,7 +343,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -395,7 +395,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -447,7 +447,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -491,7 +491,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -530,7 +530,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -549,7 +549,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -566,7 +566,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -638,7 +638,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -702,7 +702,7 @@ #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -766,7 +766,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -839,7 +839,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -914,7 +914,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -941,7 +941,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -964,7 +964,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -981,7 +981,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1024,7 +1024,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1067,7 +1067,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1110,7 +1110,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1158,7 +1158,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1183,7 +1183,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1211,7 +1211,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1233,7 +1233,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1295,7 +1295,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1353,7 +1353,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1407,7 +1407,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1461,7 +1461,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1505,7 +1505,7 @@ #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1523,14 +1523,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1548,14 +1548,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1579,14 +1579,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1604,30 +1604,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT -#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 +#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SSI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1718,7 +1718,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1766,7 +1766,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1814,7 +1814,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1862,7 +1862,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1914,7 +1914,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1962,7 +1962,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2058,7 +2058,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2080,7 +2080,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2102,7 +2102,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2128,7 +2128,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2222,7 +2222,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2275,7 +2275,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2357,7 +2357,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2448,7 +2448,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2526,7 +2526,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2564,8 +2564,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2626,7 +2626,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2681,7 +2681,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2735,7 +2735,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2789,7 +2789,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2842,7 +2842,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2897,7 +2897,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2962,7 +2962,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2998,7 +2998,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3045,7 +3045,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3087,7 +3087,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3114,7 +3114,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3140,7 +3140,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3154,42 +3154,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3533,7 +3533,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3565,7 +3565,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3600,7 +3600,7 @@ #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3636,7 +3636,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3668,7 +3668,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3695,7 +3695,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3731,7 +3731,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3761,7 +3761,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3794,7 +3794,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3832,7 +3832,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3857,7 +3857,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3893,7 +3893,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3941,7 +3941,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3967,7 +3967,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3987,7 +3987,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4153,270 +4153,13 @@ #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4425,7 +4168,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4434,7 +4177,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4443,7 +4186,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4452,7 +4195,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4461,7 +4204,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4470,7 +4213,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4480,7 +4223,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 diff --git a/components/board/silabs/config/brd4339a/pin_config.h b/components/board/silabs/config/brd4339a/pin_config.h index 2bbc8c59c..60a6a7d20 100644 --- a/components/board/silabs/config/brd4339a/pin_config.h +++ b/components/board/silabs/config/brd4339a/pin_config.h @@ -25,8 +25,8 @@ // $[SSI_SLAVE] // [SSI_SLAVE]$ -// $[ULP_SPI] -// [ULP_SPI]$ +// $[ULP_SSI] +// [ULP_SSI]$ // $[GSPI_MASTER] // [GSPI_MASTER]$ @@ -127,6 +127,15 @@ // $[DAC1] // [DAC1]$ +// $[SYSRTC] +// [SYSRTC]$ + +// $[UULP_VBAT_GPIO] +// [UULP_VBAT_GPIO]$ + +// $[GPIO] +// [GPIO]$ + // $[CUSTOM_PIN_NAME] #ifndef _PORT #define _PORT 0 diff --git a/components/board/silabs/config/brd4339a/sl_iostream_usart_vcom_config.h b/components/board/silabs/config/brd4339a/sl_iostream_usart_vcom_config.h new file mode 100644 index 000000000..97ff2003b --- /dev/null +++ b/components/board/silabs/config/brd4339a/sl_iostream_usart_vcom_config.h @@ -0,0 +1,135 @@ +/***************************************************************************/ /** + * @file + * @brief IOSTREAM_USART Config. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_IOSTREAM_USART_VCOM_CONFIG_H +#define SL_IOSTREAM_USART_VCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// USART settings + +#define ENABLE 1 +#define DISABLE 0 + +// Baud rate <9600-921600> +// Default: 115200 +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + +// Parity +// No Parity +// Even parity +// Odd parity +// Default: SL_USART_NO_PARITY +#define SL_IOSTREAM_USART_VCOM_PARITY SL_USART_NO_PARITY + +// Stop bits +// 0.5 stop bits +// 1 stop bits +// 1.5 stop bits +// 2 stop bits +// Default: SL_USART_STOP_BITS_1 +#define SL_IOSTREAM_USART_VCOM_STOP_BITS SL_USART_STOP_BITS_1 + +#define SL_IOSTREAM_USART_VCOM_MODE SL_USART_MODE_ASYNCHRONOUS + +// Data Width +// 5 data bits +// 6 data bits +// 7 data bits +// 8 data bits +// Default: SL_USART_DATA_BITS_8 +#define SL_IOSTREAM_USART_VCOM_DATA_BITS SL_USART_DATA_BITS_8 + +// Flow control +// None +// CTS +// RTS +// CTS/RTS +// Default: SL_USART_FLOW_CONTROL_NONE +#define SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE SL_USART_FLOW_CONTROL_NONE + +// VCOM enable +// Default: 1 +#define SL_SI91X_VCOM_ENABLE 1 + +#define USART0_MODULE 0 +#define UART1_MODULE 1 +#define ULP_UART_MODULE 2 + +#if SL_SI91X_VCOM_ENABLE +#define SL_USART_MODULE ULP_UART_MODULE +#else +#define SL_USART_MODULE USART0_MODULE +#endif + +// Receive buffer size +// Default: 32 +#define SL_IOSTREAM_USART_VCOM_RX_BUFFER_SIZE 32 + +// Convert \n to \r\n +// It can be changed at runtime using the C API. +// Default: 0 +#define SL_IOSTREAM_USART_VCOM_CONVERT_BY_DEFAULT_LF_TO_CRLF 0 +// + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_IOSTREAM +// $[USART_SL_SI91X_IOSTREAM] +#ifndef SL_SI91X_IOSTREAM_PERIPHERAL +#define SL_SI91X_IOSTREAM_PERIPHERAL ULP_UART +#endif + +// ULP_UART TX on ULP_GPIO_11/GPIO_75 +#ifndef SL_SI91X_IOSTREAM_TX_PORT +#define SL_SI91X_IOSTREAM_TX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_TX_PIN +#define SL_SI91X_IOSTREAM_TX_PIN 11 +#endif +#ifndef SL_SI91X_IOSTREAM_TX_LOC +#define SL_SI91X_IOSTREAM_TX_LOC 1 +#endif + +// ULP_UART RX on ULP_GPIO_9/GPIO_73 +#ifndef SL_SI91X_IOSTREAM_RX_PORT +#define SL_SI91X_IOSTREAM_RX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_RX_PIN +#define SL_SI91X_IOSTREAM_RX_PIN 9 +#endif +#ifndef SL_SI91X_IOSTREAM_RX_LOC +#define SL_SI91X_IOSTREAM_RX_LOC 3 +#endif +// [USART_SL_SI91X_IOSTREAM]$ +// <<< sl:end pin_tool >>> + +#endif \ No newline at end of file diff --git a/components/board/silabs/config/brd4339a/sl_si91x_button_init_btn0_config.h b/components/board/silabs/config/brd4339a/sl_si91x_button_init_btn0_config.h new file mode 100644 index 000000000..f31924c9a --- /dev/null +++ b/components/board/silabs/config/brd4339a/sl_si91x_button_init_btn0_config.h @@ -0,0 +1,42 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn0_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/components/board/silabs/config/brd4339a/sl_si91x_button_init_btn1_config.h b/components/board/silabs/config/brd4339a/sl_si91x_button_init_btn1_config.h new file mode 100644 index 000000000..31838d62e --- /dev/null +++ b/components/board/silabs/config/brd4339a/sl_si91x_button_init_btn1_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn1_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/components/board/silabs/config/brd4339a/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/brd4339a/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..1719bbde9 --- /dev/null +++ b/components/board/silabs/config/brd4339a/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,115 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_I2C2_CONFIG_H +#define SL_SI91X_I2C_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration + +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_I2C_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4339a/sl_si91x_led_init_led0_config.h b/components/board/silabs/config/brd4339a/sl_si91x_led_init_led0_config.h new file mode 100644 index 000000000..08c83e088 --- /dev/null +++ b/components/board/silabs/config/brd4339a/sl_si91x_led_init_led0_config.h @@ -0,0 +1,40 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Simple LED configuration +// +// Active low +// Active high +// Default: SL_SIMPLE_LED_POLARITY_ACTIVE_HIGH +#define SL_SIMPLE_LED_LED0_POLARITY SL_SIMPLE_LED_POLARITY_ACTIVE_HIGH +// end led configuration + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 2 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/components/board/silabs/config/brd4339a/sl_si91x_led_init_led1_config.h b/components/board/silabs/config/brd4339a/sl_si91x_led_init_led1_config.h new file mode 100644 index 000000000..3c9821184 --- /dev/null +++ b/components/board/silabs/config/brd4339a/sl_si91x_led_init_led1_config.h @@ -0,0 +1,40 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Simple LED configuration +// +// Active low +// Active high +// Default: SL_SIMPLE_LED_POLARITY_ACTIVE_HIGH +#define SL_SIMPLE_LED_LED1_POLARITY SL_SIMPLE_LED_POLARITY_ACTIVE_HIGH +// end led configuration + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H diff --git a/components/board/silabs/config/brd4339a/sl_si91x_memlcd_config.h b/components/board/silabs/config/brd4339a/sl_si91x_memlcd_config.h new file mode 100644 index 000000000..adc826da1 --- /dev/null +++ b/components/board/silabs/config/brd4339a/sl_si91x_memlcd_config.h @@ -0,0 +1,109 @@ +/***************************************************************************/ /** +* @file sl_si91x_memlcd_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_MEMLCD_CONFIG_H +#define SL_SI91X_MEMLCD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +// <<< sl:start pin_tool >>> +// SL_MEMLCD +// $[SSI_SL_MEMLCD] +#ifndef SL_MEMLCD_PERIPHERAL +#define SL_MEMLCD_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_MEMLCD_MOSI__PORT +#define SL_MEMLCD_MOSI__PORT ULP +#endif +#ifndef SL_MEMLCD_MOSI__PIN +#define SL_MEMLCD_MOSI__PIN 1 +#endif +#ifndef SL_MEMLCD_MOSI_LOC +#define SL_MEMLCD_MOSI_LOC 0 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_MEMLCD_SCK__PORT +#define SL_MEMLCD_SCK__PORT ULP +#endif +#ifndef SL_MEMLCD_SCK__PIN +#define SL_MEMLCD_SCK__PIN 8 +#endif +#ifndef SL_MEMLCD_SCK_LOC +#define SL_MEMLCD_SCK_LOC 7 +#endif + +// ULP_SSI CS0_ on ULP_GPIO_10/GPIO_74 +#ifndef SL_MEMLCD_CS0__PORT +#define SL_MEMLCD_CS0__PORT ULP +#endif +#ifndef SL_MEMLCD_CS0__PIN +#define SL_MEMLCD_CS0__PIN 10 +#endif +#ifndef SL_MEMLCD_CS0_LOC +#define SL_MEMLCD_CS0_LOC 9 +#endif +// [SSI_SL_MEMLCD]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_ENABLE +// $[GPIO_SL_MEMLCD_DISP_ENABLE] +#ifndef SL_MEMLCD_DISP_ENABLE_PORT +#define SL_MEMLCD_DISP_ENABLE_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_ENABLE_PIN +#define SL_MEMLCD_DISP_ENABLE_PIN 0 +#endif +// [GPIO_SL_MEMLCD_DISP_ENABLE]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_EXT_COMIN +// $[GPIO_SL_MEMLCD_DISP_EXT_COMIN] +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PORT +#define SL_MEMLCD_DISP_EXT_COMIN_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PIN +#define SL_MEMLCD_DISP_EXT_COMIN_PIN 3 +#endif +// [GPIO_SL_MEMLCD_DISP_EXT_COMIN]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_MEMLCD_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4339b/RTE_Device_917.h b/components/board/silabs/config/brd4339b/RTE_Device_917.h index da52615dc..3587a592b 100644 --- a/components/board/silabs/config/brd4339b/RTE_Device_917.h +++ b/components/board/silabs/config/brd4339b/RTE_Device_917.h @@ -110,7 +110,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -168,7 +168,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -236,7 +236,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -295,7 +295,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -344,7 +344,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -396,7 +396,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -448,7 +448,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -492,7 +492,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -531,7 +531,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -550,7 +550,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -567,7 +567,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -639,7 +639,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -703,7 +703,7 @@ #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -767,7 +767,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -840,7 +840,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -915,7 +915,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -942,7 +942,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -965,7 +965,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -982,7 +982,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1025,7 +1025,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1068,7 +1068,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1111,7 +1111,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1159,7 +1159,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1184,7 +1184,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1212,7 +1212,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1234,7 +1234,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1296,7 +1296,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1354,7 +1354,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1408,7 +1408,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1462,7 +1462,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1506,7 +1506,7 @@ #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1524,14 +1524,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1549,14 +1549,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1580,14 +1580,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1605,30 +1605,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT -#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 +#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SSI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1719,7 +1719,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1767,7 +1767,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1815,7 +1815,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1863,7 +1863,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1915,7 +1915,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1963,7 +1963,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2059,7 +2059,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2081,7 +2081,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2103,7 +2103,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2129,7 +2129,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2223,7 +2223,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2276,7 +2276,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2358,7 +2358,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2449,7 +2449,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2527,7 +2527,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2565,8 +2565,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2627,7 +2627,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2682,7 +2682,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2736,7 +2736,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2790,7 +2790,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2843,7 +2843,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2898,7 +2898,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2963,7 +2963,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2999,7 +2999,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3046,7 +3046,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3088,7 +3088,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3115,7 +3115,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3141,7 +3141,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3155,42 +3155,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3534,7 +3534,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3566,7 +3566,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3601,7 +3601,7 @@ #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3637,7 +3637,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3669,7 +3669,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3696,7 +3696,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3732,7 +3732,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3762,7 +3762,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3795,7 +3795,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3833,7 +3833,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3858,7 +3858,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3894,7 +3894,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3942,7 +3942,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3968,7 +3968,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3988,7 +3988,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4154,270 +4154,13 @@ #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4426,7 +4169,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4435,7 +4178,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4444,7 +4187,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4453,7 +4196,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4462,7 +4205,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4471,7 +4214,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4481,7 +4224,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 diff --git a/components/board/silabs/config/brd4339b/pin_config.h b/components/board/silabs/config/brd4339b/pin_config.h index 2bbc8c59c..60a6a7d20 100644 --- a/components/board/silabs/config/brd4339b/pin_config.h +++ b/components/board/silabs/config/brd4339b/pin_config.h @@ -25,8 +25,8 @@ // $[SSI_SLAVE] // [SSI_SLAVE]$ -// $[ULP_SPI] -// [ULP_SPI]$ +// $[ULP_SSI] +// [ULP_SSI]$ // $[GSPI_MASTER] // [GSPI_MASTER]$ @@ -127,6 +127,15 @@ // $[DAC1] // [DAC1]$ +// $[SYSRTC] +// [SYSRTC]$ + +// $[UULP_VBAT_GPIO] +// [UULP_VBAT_GPIO]$ + +// $[GPIO] +// [GPIO]$ + // $[CUSTOM_PIN_NAME] #ifndef _PORT #define _PORT 0 diff --git a/components/board/silabs/config/brd4339b/sl_iostream_usart_vcom_config.h b/components/board/silabs/config/brd4339b/sl_iostream_usart_vcom_config.h new file mode 100644 index 000000000..97ff2003b --- /dev/null +++ b/components/board/silabs/config/brd4339b/sl_iostream_usart_vcom_config.h @@ -0,0 +1,135 @@ +/***************************************************************************/ /** + * @file + * @brief IOSTREAM_USART Config. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_IOSTREAM_USART_VCOM_CONFIG_H +#define SL_IOSTREAM_USART_VCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// USART settings + +#define ENABLE 1 +#define DISABLE 0 + +// Baud rate <9600-921600> +// Default: 115200 +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + +// Parity +// No Parity +// Even parity +// Odd parity +// Default: SL_USART_NO_PARITY +#define SL_IOSTREAM_USART_VCOM_PARITY SL_USART_NO_PARITY + +// Stop bits +// 0.5 stop bits +// 1 stop bits +// 1.5 stop bits +// 2 stop bits +// Default: SL_USART_STOP_BITS_1 +#define SL_IOSTREAM_USART_VCOM_STOP_BITS SL_USART_STOP_BITS_1 + +#define SL_IOSTREAM_USART_VCOM_MODE SL_USART_MODE_ASYNCHRONOUS + +// Data Width +// 5 data bits +// 6 data bits +// 7 data bits +// 8 data bits +// Default: SL_USART_DATA_BITS_8 +#define SL_IOSTREAM_USART_VCOM_DATA_BITS SL_USART_DATA_BITS_8 + +// Flow control +// None +// CTS +// RTS +// CTS/RTS +// Default: SL_USART_FLOW_CONTROL_NONE +#define SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE SL_USART_FLOW_CONTROL_NONE + +// VCOM enable +// Default: 1 +#define SL_SI91X_VCOM_ENABLE 1 + +#define USART0_MODULE 0 +#define UART1_MODULE 1 +#define ULP_UART_MODULE 2 + +#if SL_SI91X_VCOM_ENABLE +#define SL_USART_MODULE ULP_UART_MODULE +#else +#define SL_USART_MODULE USART0_MODULE +#endif + +// Receive buffer size +// Default: 32 +#define SL_IOSTREAM_USART_VCOM_RX_BUFFER_SIZE 32 + +// Convert \n to \r\n +// It can be changed at runtime using the C API. +// Default: 0 +#define SL_IOSTREAM_USART_VCOM_CONVERT_BY_DEFAULT_LF_TO_CRLF 0 +// + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_IOSTREAM +// $[USART_SL_SI91X_IOSTREAM] +#ifndef SL_SI91X_IOSTREAM_PERIPHERAL +#define SL_SI91X_IOSTREAM_PERIPHERAL ULP_UART +#endif + +// ULP_UART TX on ULP_GPIO_11/GPIO_75 +#ifndef SL_SI91X_IOSTREAM_TX_PORT +#define SL_SI91X_IOSTREAM_TX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_TX_PIN +#define SL_SI91X_IOSTREAM_TX_PIN 11 +#endif +#ifndef SL_SI91X_IOSTREAM_TX_LOC +#define SL_SI91X_IOSTREAM_TX_LOC 1 +#endif + +// ULP_UART RX on ULP_GPIO_9/GPIO_73 +#ifndef SL_SI91X_IOSTREAM_RX_PORT +#define SL_SI91X_IOSTREAM_RX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_RX_PIN +#define SL_SI91X_IOSTREAM_RX_PIN 9 +#endif +#ifndef SL_SI91X_IOSTREAM_RX_LOC +#define SL_SI91X_IOSTREAM_RX_LOC 3 +#endif +// [USART_SL_SI91X_IOSTREAM]$ +// <<< sl:end pin_tool >>> + +#endif \ No newline at end of file diff --git a/components/board/silabs/config/brd4339b/sl_si91x_button_init_btn0_config.h b/components/board/silabs/config/brd4339b/sl_si91x_button_init_btn0_config.h new file mode 100644 index 000000000..f31924c9a --- /dev/null +++ b/components/board/silabs/config/brd4339b/sl_si91x_button_init_btn0_config.h @@ -0,0 +1,42 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn0_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/components/board/silabs/config/brd4339b/sl_si91x_button_init_btn1_config.h b/components/board/silabs/config/brd4339b/sl_si91x_button_init_btn1_config.h new file mode 100644 index 000000000..31838d62e --- /dev/null +++ b/components/board/silabs/config/brd4339b/sl_si91x_button_init_btn1_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn1_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/components/board/silabs/config/brd4339b/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/brd4339b/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..1719bbde9 --- /dev/null +++ b/components/board/silabs/config/brd4339b/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,115 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_I2C2_CONFIG_H +#define SL_SI91X_I2C_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration + +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_I2C_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4339b/sl_si91x_led_init_led0_config.h b/components/board/silabs/config/brd4339b/sl_si91x_led_init_led0_config.h new file mode 100644 index 000000000..2a41e676d --- /dev/null +++ b/components/board/silabs/config/brd4339b/sl_si91x_led_init_led0_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 2 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/components/board/silabs/config/brd4339b/sl_si91x_led_init_led1_config.h b/components/board/silabs/config/brd4339b/sl_si91x_led_init_led1_config.h new file mode 100644 index 000000000..14093b027 --- /dev/null +++ b/components/board/silabs/config/brd4339b/sl_si91x_led_init_led1_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H diff --git a/components/board/silabs/config/brd4339b/sl_si91x_memlcd_config.h b/components/board/silabs/config/brd4339b/sl_si91x_memlcd_config.h new file mode 100644 index 000000000..adc826da1 --- /dev/null +++ b/components/board/silabs/config/brd4339b/sl_si91x_memlcd_config.h @@ -0,0 +1,109 @@ +/***************************************************************************/ /** +* @file sl_si91x_memlcd_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_MEMLCD_CONFIG_H +#define SL_SI91X_MEMLCD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +// <<< sl:start pin_tool >>> +// SL_MEMLCD +// $[SSI_SL_MEMLCD] +#ifndef SL_MEMLCD_PERIPHERAL +#define SL_MEMLCD_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_MEMLCD_MOSI__PORT +#define SL_MEMLCD_MOSI__PORT ULP +#endif +#ifndef SL_MEMLCD_MOSI__PIN +#define SL_MEMLCD_MOSI__PIN 1 +#endif +#ifndef SL_MEMLCD_MOSI_LOC +#define SL_MEMLCD_MOSI_LOC 0 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_MEMLCD_SCK__PORT +#define SL_MEMLCD_SCK__PORT ULP +#endif +#ifndef SL_MEMLCD_SCK__PIN +#define SL_MEMLCD_SCK__PIN 8 +#endif +#ifndef SL_MEMLCD_SCK_LOC +#define SL_MEMLCD_SCK_LOC 7 +#endif + +// ULP_SSI CS0_ on ULP_GPIO_10/GPIO_74 +#ifndef SL_MEMLCD_CS0__PORT +#define SL_MEMLCD_CS0__PORT ULP +#endif +#ifndef SL_MEMLCD_CS0__PIN +#define SL_MEMLCD_CS0__PIN 10 +#endif +#ifndef SL_MEMLCD_CS0_LOC +#define SL_MEMLCD_CS0_LOC 9 +#endif +// [SSI_SL_MEMLCD]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_ENABLE +// $[GPIO_SL_MEMLCD_DISP_ENABLE] +#ifndef SL_MEMLCD_DISP_ENABLE_PORT +#define SL_MEMLCD_DISP_ENABLE_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_ENABLE_PIN +#define SL_MEMLCD_DISP_ENABLE_PIN 0 +#endif +// [GPIO_SL_MEMLCD_DISP_ENABLE]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_EXT_COMIN +// $[GPIO_SL_MEMLCD_DISP_EXT_COMIN] +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PORT +#define SL_MEMLCD_DISP_EXT_COMIN_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PIN +#define SL_MEMLCD_DISP_EXT_COMIN_PIN 3 +#endif +// [GPIO_SL_MEMLCD_DISP_EXT_COMIN]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_MEMLCD_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4340a/RTE_Device_917.h b/components/board/silabs/config/brd4340a/RTE_Device_917.h index 120a801bb..cd628d119 100644 --- a/components/board/silabs/config/brd4340a/RTE_Device_917.h +++ b/components/board/silabs/config/brd4340a/RTE_Device_917.h @@ -110,7 +110,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -168,7 +168,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -236,7 +236,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -295,7 +295,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -344,7 +344,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -396,7 +396,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -448,7 +448,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -492,7 +492,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -531,7 +531,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -550,7 +550,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -567,7 +567,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -639,7 +639,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -703,7 +703,7 @@ #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -767,7 +767,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -840,7 +840,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -915,7 +915,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -942,7 +942,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -965,7 +965,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -982,7 +982,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1025,7 +1025,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1068,7 +1068,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1111,7 +1111,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1159,7 +1159,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1184,7 +1184,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1212,7 +1212,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1234,7 +1234,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1296,7 +1296,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1354,7 +1354,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1408,7 +1408,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1462,7 +1462,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1506,7 +1506,7 @@ #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1524,14 +1524,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1549,14 +1549,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1580,14 +1580,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1605,30 +1605,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT -#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 +#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SSI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1719,7 +1719,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1767,7 +1767,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1815,7 +1815,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1863,7 +1863,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1915,7 +1915,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1963,7 +1963,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2059,7 +2059,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2081,7 +2081,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2103,7 +2103,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2129,7 +2129,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2223,7 +2223,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2276,7 +2276,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2358,7 +2358,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2449,7 +2449,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2527,7 +2527,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2565,8 +2565,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2627,7 +2627,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2682,7 +2682,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2736,7 +2736,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2790,7 +2790,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2843,7 +2843,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2898,7 +2898,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2963,7 +2963,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2999,7 +2999,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3046,7 +3046,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3088,7 +3088,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3115,7 +3115,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3141,7 +3141,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3155,42 +3155,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3534,7 +3534,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3566,7 +3566,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3601,7 +3601,7 @@ #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3637,7 +3637,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3669,7 +3669,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3696,7 +3696,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3732,7 +3732,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3762,7 +3762,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3795,7 +3795,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3833,7 +3833,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3858,7 +3858,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3894,7 +3894,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3942,7 +3942,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3968,7 +3968,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3988,7 +3988,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4154,270 +4154,13 @@ #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4426,7 +4169,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4435,7 +4178,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4444,7 +4187,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4453,7 +4196,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4462,7 +4205,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4471,7 +4214,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4481,7 +4224,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 diff --git a/components/board/silabs/config/brd4340a/pin_config.h b/components/board/silabs/config/brd4340a/pin_config.h index 2bbc8c59c..60a6a7d20 100644 --- a/components/board/silabs/config/brd4340a/pin_config.h +++ b/components/board/silabs/config/brd4340a/pin_config.h @@ -25,8 +25,8 @@ // $[SSI_SLAVE] // [SSI_SLAVE]$ -// $[ULP_SPI] -// [ULP_SPI]$ +// $[ULP_SSI] +// [ULP_SSI]$ // $[GSPI_MASTER] // [GSPI_MASTER]$ @@ -127,6 +127,15 @@ // $[DAC1] // [DAC1]$ +// $[SYSRTC] +// [SYSRTC]$ + +// $[UULP_VBAT_GPIO] +// [UULP_VBAT_GPIO]$ + +// $[GPIO] +// [GPIO]$ + // $[CUSTOM_PIN_NAME] #ifndef _PORT #define _PORT 0 diff --git a/components/board/silabs/config/brd4340a/sl_iostream_usart_vcom_config.h b/components/board/silabs/config/brd4340a/sl_iostream_usart_vcom_config.h new file mode 100644 index 000000000..97ff2003b --- /dev/null +++ b/components/board/silabs/config/brd4340a/sl_iostream_usart_vcom_config.h @@ -0,0 +1,135 @@ +/***************************************************************************/ /** + * @file + * @brief IOSTREAM_USART Config. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_IOSTREAM_USART_VCOM_CONFIG_H +#define SL_IOSTREAM_USART_VCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// USART settings + +#define ENABLE 1 +#define DISABLE 0 + +// Baud rate <9600-921600> +// Default: 115200 +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + +// Parity +// No Parity +// Even parity +// Odd parity +// Default: SL_USART_NO_PARITY +#define SL_IOSTREAM_USART_VCOM_PARITY SL_USART_NO_PARITY + +// Stop bits +// 0.5 stop bits +// 1 stop bits +// 1.5 stop bits +// 2 stop bits +// Default: SL_USART_STOP_BITS_1 +#define SL_IOSTREAM_USART_VCOM_STOP_BITS SL_USART_STOP_BITS_1 + +#define SL_IOSTREAM_USART_VCOM_MODE SL_USART_MODE_ASYNCHRONOUS + +// Data Width +// 5 data bits +// 6 data bits +// 7 data bits +// 8 data bits +// Default: SL_USART_DATA_BITS_8 +#define SL_IOSTREAM_USART_VCOM_DATA_BITS SL_USART_DATA_BITS_8 + +// Flow control +// None +// CTS +// RTS +// CTS/RTS +// Default: SL_USART_FLOW_CONTROL_NONE +#define SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE SL_USART_FLOW_CONTROL_NONE + +// VCOM enable +// Default: 1 +#define SL_SI91X_VCOM_ENABLE 1 + +#define USART0_MODULE 0 +#define UART1_MODULE 1 +#define ULP_UART_MODULE 2 + +#if SL_SI91X_VCOM_ENABLE +#define SL_USART_MODULE ULP_UART_MODULE +#else +#define SL_USART_MODULE USART0_MODULE +#endif + +// Receive buffer size +// Default: 32 +#define SL_IOSTREAM_USART_VCOM_RX_BUFFER_SIZE 32 + +// Convert \n to \r\n +// It can be changed at runtime using the C API. +// Default: 0 +#define SL_IOSTREAM_USART_VCOM_CONVERT_BY_DEFAULT_LF_TO_CRLF 0 +// + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_IOSTREAM +// $[USART_SL_SI91X_IOSTREAM] +#ifndef SL_SI91X_IOSTREAM_PERIPHERAL +#define SL_SI91X_IOSTREAM_PERIPHERAL ULP_UART +#endif + +// ULP_UART TX on ULP_GPIO_11/GPIO_75 +#ifndef SL_SI91X_IOSTREAM_TX_PORT +#define SL_SI91X_IOSTREAM_TX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_TX_PIN +#define SL_SI91X_IOSTREAM_TX_PIN 11 +#endif +#ifndef SL_SI91X_IOSTREAM_TX_LOC +#define SL_SI91X_IOSTREAM_TX_LOC 1 +#endif + +// ULP_UART RX on ULP_GPIO_9/GPIO_73 +#ifndef SL_SI91X_IOSTREAM_RX_PORT +#define SL_SI91X_IOSTREAM_RX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_RX_PIN +#define SL_SI91X_IOSTREAM_RX_PIN 9 +#endif +#ifndef SL_SI91X_IOSTREAM_RX_LOC +#define SL_SI91X_IOSTREAM_RX_LOC 3 +#endif +// [USART_SL_SI91X_IOSTREAM]$ +// <<< sl:end pin_tool >>> + +#endif \ No newline at end of file diff --git a/components/board/silabs/config/brd4340a/sl_si91x_button_init_btn0_config.h b/components/board/silabs/config/brd4340a/sl_si91x_button_init_btn0_config.h new file mode 100644 index 000000000..f31924c9a --- /dev/null +++ b/components/board/silabs/config/brd4340a/sl_si91x_button_init_btn0_config.h @@ -0,0 +1,42 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn0_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/components/board/silabs/config/brd4340a/sl_si91x_button_init_btn1_config.h b/components/board/silabs/config/brd4340a/sl_si91x_button_init_btn1_config.h new file mode 100644 index 000000000..31838d62e --- /dev/null +++ b/components/board/silabs/config/brd4340a/sl_si91x_button_init_btn1_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn1_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/components/board/silabs/config/brd4340a/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/brd4340a/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..1719bbde9 --- /dev/null +++ b/components/board/silabs/config/brd4340a/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,115 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_I2C2_CONFIG_H +#define SL_SI91X_I2C_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration + +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_I2C_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4340a/sl_si91x_led_init_led0_config.h b/components/board/silabs/config/brd4340a/sl_si91x_led_init_led0_config.h new file mode 100644 index 000000000..2a41e676d --- /dev/null +++ b/components/board/silabs/config/brd4340a/sl_si91x_led_init_led0_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 2 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/components/board/silabs/config/brd4340a/sl_si91x_led_init_led1_config.h b/components/board/silabs/config/brd4340a/sl_si91x_led_init_led1_config.h new file mode 100644 index 000000000..14093b027 --- /dev/null +++ b/components/board/silabs/config/brd4340a/sl_si91x_led_init_led1_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H diff --git a/components/board/silabs/config/brd4340a/sl_si91x_memlcd_config.h b/components/board/silabs/config/brd4340a/sl_si91x_memlcd_config.h new file mode 100644 index 000000000..adc826da1 --- /dev/null +++ b/components/board/silabs/config/brd4340a/sl_si91x_memlcd_config.h @@ -0,0 +1,109 @@ +/***************************************************************************/ /** +* @file sl_si91x_memlcd_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_MEMLCD_CONFIG_H +#define SL_SI91X_MEMLCD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +// <<< sl:start pin_tool >>> +// SL_MEMLCD +// $[SSI_SL_MEMLCD] +#ifndef SL_MEMLCD_PERIPHERAL +#define SL_MEMLCD_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_MEMLCD_MOSI__PORT +#define SL_MEMLCD_MOSI__PORT ULP +#endif +#ifndef SL_MEMLCD_MOSI__PIN +#define SL_MEMLCD_MOSI__PIN 1 +#endif +#ifndef SL_MEMLCD_MOSI_LOC +#define SL_MEMLCD_MOSI_LOC 0 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_MEMLCD_SCK__PORT +#define SL_MEMLCD_SCK__PORT ULP +#endif +#ifndef SL_MEMLCD_SCK__PIN +#define SL_MEMLCD_SCK__PIN 8 +#endif +#ifndef SL_MEMLCD_SCK_LOC +#define SL_MEMLCD_SCK_LOC 7 +#endif + +// ULP_SSI CS0_ on ULP_GPIO_10/GPIO_74 +#ifndef SL_MEMLCD_CS0__PORT +#define SL_MEMLCD_CS0__PORT ULP +#endif +#ifndef SL_MEMLCD_CS0__PIN +#define SL_MEMLCD_CS0__PIN 10 +#endif +#ifndef SL_MEMLCD_CS0_LOC +#define SL_MEMLCD_CS0_LOC 9 +#endif +// [SSI_SL_MEMLCD]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_ENABLE +// $[GPIO_SL_MEMLCD_DISP_ENABLE] +#ifndef SL_MEMLCD_DISP_ENABLE_PORT +#define SL_MEMLCD_DISP_ENABLE_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_ENABLE_PIN +#define SL_MEMLCD_DISP_ENABLE_PIN 0 +#endif +// [GPIO_SL_MEMLCD_DISP_ENABLE]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_EXT_COMIN +// $[GPIO_SL_MEMLCD_DISP_EXT_COMIN] +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PORT +#define SL_MEMLCD_DISP_EXT_COMIN_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PIN +#define SL_MEMLCD_DISP_EXT_COMIN_PIN 3 +#endif +// [GPIO_SL_MEMLCD_DISP_EXT_COMIN]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_MEMLCD_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4340b/RTE_Device_917.h b/components/board/silabs/config/brd4340b/RTE_Device_917.h index b3602f10f..3fd9e9d8e 100644 --- a/components/board/silabs/config/brd4340b/RTE_Device_917.h +++ b/components/board/silabs/config/brd4340b/RTE_Device_917.h @@ -110,7 +110,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -168,7 +168,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -236,7 +236,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -295,7 +295,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -344,7 +344,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -396,7 +396,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -448,7 +448,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -492,7 +492,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -531,7 +531,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -550,7 +550,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -567,7 +567,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -639,7 +639,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -703,7 +703,7 @@ #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -767,7 +767,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -840,7 +840,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -915,7 +915,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -942,7 +942,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -965,7 +965,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -982,7 +982,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1025,7 +1025,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1068,7 +1068,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1111,7 +1111,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1159,7 +1159,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1184,7 +1184,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1212,7 +1212,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1234,7 +1234,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1296,7 +1296,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1354,7 +1354,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1408,7 +1408,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1462,7 +1462,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1506,7 +1506,7 @@ #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1524,14 +1524,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1549,14 +1549,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1580,14 +1580,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1605,30 +1605,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT -#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 +#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SSI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1719,7 +1719,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1767,7 +1767,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1815,7 +1815,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1863,7 +1863,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1915,7 +1915,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1963,7 +1963,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2059,7 +2059,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2081,7 +2081,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2103,7 +2103,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2129,7 +2129,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2223,7 +2223,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2276,7 +2276,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2358,7 +2358,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2449,7 +2449,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2527,7 +2527,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2565,8 +2565,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2627,7 +2627,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2682,7 +2682,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2736,7 +2736,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2790,7 +2790,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2843,7 +2843,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2898,7 +2898,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2963,7 +2963,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2999,7 +2999,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3046,7 +3046,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3088,7 +3088,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3115,7 +3115,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3141,7 +3141,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3155,42 +3155,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3534,7 +3534,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3566,7 +3566,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3601,7 +3601,7 @@ #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3637,7 +3637,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3669,7 +3669,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3696,7 +3696,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3732,7 +3732,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3762,7 +3762,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3795,7 +3795,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3833,7 +3833,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3858,7 +3858,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3894,7 +3894,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3942,7 +3942,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3968,7 +3968,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3988,7 +3988,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4154,270 +4154,13 @@ #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4426,7 +4169,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4435,7 +4178,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4444,7 +4187,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4453,7 +4196,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4462,7 +4205,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4471,7 +4214,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4481,7 +4224,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 diff --git a/components/board/silabs/config/brd4340b/pin_config.h b/components/board/silabs/config/brd4340b/pin_config.h index 2bbc8c59c..60a6a7d20 100644 --- a/components/board/silabs/config/brd4340b/pin_config.h +++ b/components/board/silabs/config/brd4340b/pin_config.h @@ -25,8 +25,8 @@ // $[SSI_SLAVE] // [SSI_SLAVE]$ -// $[ULP_SPI] -// [ULP_SPI]$ +// $[ULP_SSI] +// [ULP_SSI]$ // $[GSPI_MASTER] // [GSPI_MASTER]$ @@ -127,6 +127,15 @@ // $[DAC1] // [DAC1]$ +// $[SYSRTC] +// [SYSRTC]$ + +// $[UULP_VBAT_GPIO] +// [UULP_VBAT_GPIO]$ + +// $[GPIO] +// [GPIO]$ + // $[CUSTOM_PIN_NAME] #ifndef _PORT #define _PORT 0 diff --git a/components/board/silabs/config/brd4340b/sl_iostream_usart_vcom_config.h b/components/board/silabs/config/brd4340b/sl_iostream_usart_vcom_config.h new file mode 100644 index 000000000..97ff2003b --- /dev/null +++ b/components/board/silabs/config/brd4340b/sl_iostream_usart_vcom_config.h @@ -0,0 +1,135 @@ +/***************************************************************************/ /** + * @file + * @brief IOSTREAM_USART Config. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_IOSTREAM_USART_VCOM_CONFIG_H +#define SL_IOSTREAM_USART_VCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// USART settings + +#define ENABLE 1 +#define DISABLE 0 + +// Baud rate <9600-921600> +// Default: 115200 +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + +// Parity +// No Parity +// Even parity +// Odd parity +// Default: SL_USART_NO_PARITY +#define SL_IOSTREAM_USART_VCOM_PARITY SL_USART_NO_PARITY + +// Stop bits +// 0.5 stop bits +// 1 stop bits +// 1.5 stop bits +// 2 stop bits +// Default: SL_USART_STOP_BITS_1 +#define SL_IOSTREAM_USART_VCOM_STOP_BITS SL_USART_STOP_BITS_1 + +#define SL_IOSTREAM_USART_VCOM_MODE SL_USART_MODE_ASYNCHRONOUS + +// Data Width +// 5 data bits +// 6 data bits +// 7 data bits +// 8 data bits +// Default: SL_USART_DATA_BITS_8 +#define SL_IOSTREAM_USART_VCOM_DATA_BITS SL_USART_DATA_BITS_8 + +// Flow control +// None +// CTS +// RTS +// CTS/RTS +// Default: SL_USART_FLOW_CONTROL_NONE +#define SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE SL_USART_FLOW_CONTROL_NONE + +// VCOM enable +// Default: 1 +#define SL_SI91X_VCOM_ENABLE 1 + +#define USART0_MODULE 0 +#define UART1_MODULE 1 +#define ULP_UART_MODULE 2 + +#if SL_SI91X_VCOM_ENABLE +#define SL_USART_MODULE ULP_UART_MODULE +#else +#define SL_USART_MODULE USART0_MODULE +#endif + +// Receive buffer size +// Default: 32 +#define SL_IOSTREAM_USART_VCOM_RX_BUFFER_SIZE 32 + +// Convert \n to \r\n +// It can be changed at runtime using the C API. +// Default: 0 +#define SL_IOSTREAM_USART_VCOM_CONVERT_BY_DEFAULT_LF_TO_CRLF 0 +// + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_IOSTREAM +// $[USART_SL_SI91X_IOSTREAM] +#ifndef SL_SI91X_IOSTREAM_PERIPHERAL +#define SL_SI91X_IOSTREAM_PERIPHERAL ULP_UART +#endif + +// ULP_UART TX on ULP_GPIO_11/GPIO_75 +#ifndef SL_SI91X_IOSTREAM_TX_PORT +#define SL_SI91X_IOSTREAM_TX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_TX_PIN +#define SL_SI91X_IOSTREAM_TX_PIN 11 +#endif +#ifndef SL_SI91X_IOSTREAM_TX_LOC +#define SL_SI91X_IOSTREAM_TX_LOC 1 +#endif + +// ULP_UART RX on ULP_GPIO_9/GPIO_73 +#ifndef SL_SI91X_IOSTREAM_RX_PORT +#define SL_SI91X_IOSTREAM_RX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_RX_PIN +#define SL_SI91X_IOSTREAM_RX_PIN 9 +#endif +#ifndef SL_SI91X_IOSTREAM_RX_LOC +#define SL_SI91X_IOSTREAM_RX_LOC 3 +#endif +// [USART_SL_SI91X_IOSTREAM]$ +// <<< sl:end pin_tool >>> + +#endif \ No newline at end of file diff --git a/components/board/silabs/config/brd4340b/sl_si91x_button_init_btn0_config.h b/components/board/silabs/config/brd4340b/sl_si91x_button_init_btn0_config.h new file mode 100644 index 000000000..f31924c9a --- /dev/null +++ b/components/board/silabs/config/brd4340b/sl_si91x_button_init_btn0_config.h @@ -0,0 +1,42 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn0_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/components/board/silabs/config/brd4340b/sl_si91x_button_init_btn1_config.h b/components/board/silabs/config/brd4340b/sl_si91x_button_init_btn1_config.h new file mode 100644 index 000000000..31838d62e --- /dev/null +++ b/components/board/silabs/config/brd4340b/sl_si91x_button_init_btn1_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn1_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/components/board/silabs/config/brd4340b/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/brd4340b/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..1719bbde9 --- /dev/null +++ b/components/board/silabs/config/brd4340b/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,115 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_I2C2_CONFIG_H +#define SL_SI91X_I2C_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration + +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_I2C_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4340b/sl_si91x_led_init_led0_config.h b/components/board/silabs/config/brd4340b/sl_si91x_led_init_led0_config.h new file mode 100644 index 000000000..2a41e676d --- /dev/null +++ b/components/board/silabs/config/brd4340b/sl_si91x_led_init_led0_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 2 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/components/board/silabs/config/brd4340b/sl_si91x_led_init_led1_config.h b/components/board/silabs/config/brd4340b/sl_si91x_led_init_led1_config.h new file mode 100644 index 000000000..14093b027 --- /dev/null +++ b/components/board/silabs/config/brd4340b/sl_si91x_led_init_led1_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H diff --git a/components/board/silabs/config/brd4340b/sl_si91x_memlcd_config.h b/components/board/silabs/config/brd4340b/sl_si91x_memlcd_config.h new file mode 100644 index 000000000..adc826da1 --- /dev/null +++ b/components/board/silabs/config/brd4340b/sl_si91x_memlcd_config.h @@ -0,0 +1,109 @@ +/***************************************************************************/ /** +* @file sl_si91x_memlcd_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_MEMLCD_CONFIG_H +#define SL_SI91X_MEMLCD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +// <<< sl:start pin_tool >>> +// SL_MEMLCD +// $[SSI_SL_MEMLCD] +#ifndef SL_MEMLCD_PERIPHERAL +#define SL_MEMLCD_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_MEMLCD_MOSI__PORT +#define SL_MEMLCD_MOSI__PORT ULP +#endif +#ifndef SL_MEMLCD_MOSI__PIN +#define SL_MEMLCD_MOSI__PIN 1 +#endif +#ifndef SL_MEMLCD_MOSI_LOC +#define SL_MEMLCD_MOSI_LOC 0 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_MEMLCD_SCK__PORT +#define SL_MEMLCD_SCK__PORT ULP +#endif +#ifndef SL_MEMLCD_SCK__PIN +#define SL_MEMLCD_SCK__PIN 8 +#endif +#ifndef SL_MEMLCD_SCK_LOC +#define SL_MEMLCD_SCK_LOC 7 +#endif + +// ULP_SSI CS0_ on ULP_GPIO_10/GPIO_74 +#ifndef SL_MEMLCD_CS0__PORT +#define SL_MEMLCD_CS0__PORT ULP +#endif +#ifndef SL_MEMLCD_CS0__PIN +#define SL_MEMLCD_CS0__PIN 10 +#endif +#ifndef SL_MEMLCD_CS0_LOC +#define SL_MEMLCD_CS0_LOC 9 +#endif +// [SSI_SL_MEMLCD]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_ENABLE +// $[GPIO_SL_MEMLCD_DISP_ENABLE] +#ifndef SL_MEMLCD_DISP_ENABLE_PORT +#define SL_MEMLCD_DISP_ENABLE_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_ENABLE_PIN +#define SL_MEMLCD_DISP_ENABLE_PIN 0 +#endif +// [GPIO_SL_MEMLCD_DISP_ENABLE]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_EXT_COMIN +// $[GPIO_SL_MEMLCD_DISP_EXT_COMIN] +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PORT +#define SL_MEMLCD_DISP_EXT_COMIN_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PIN +#define SL_MEMLCD_DISP_EXT_COMIN_PIN 3 +#endif +// [GPIO_SL_MEMLCD_DISP_EXT_COMIN]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_MEMLCD_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4341a/RTE_Device_917.h b/components/board/silabs/config/brd4341a/RTE_Device_917.h index e06201447..e7c64296c 100644 --- a/components/board/silabs/config/brd4341a/RTE_Device_917.h +++ b/components/board/silabs/config/brd4341a/RTE_Device_917.h @@ -103,7 +103,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -161,7 +161,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -229,7 +229,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -288,7 +288,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -337,7 +337,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -389,7 +389,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -441,7 +441,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -485,7 +485,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -524,7 +524,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -543,7 +543,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -560,7 +560,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -632,7 +632,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -696,7 +696,7 @@ #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -760,7 +760,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -833,7 +833,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -908,7 +908,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -935,7 +935,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -958,7 +958,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -975,7 +975,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1018,7 +1018,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1061,7 +1061,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1104,7 +1104,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1152,7 +1152,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1177,7 +1177,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1205,7 +1205,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1227,7 +1227,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1289,7 +1289,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1347,7 +1347,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1401,7 +1401,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1455,7 +1455,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1499,7 +1499,7 @@ #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1517,14 +1517,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1542,14 +1542,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1573,14 +1573,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1598,30 +1598,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT -#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 +#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SSI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1712,7 +1712,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1760,7 +1760,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1808,7 +1808,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1856,7 +1856,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1908,7 +1908,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1956,7 +1956,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2052,7 +2052,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2074,7 +2074,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2096,7 +2096,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2122,7 +2122,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2216,7 +2216,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2269,7 +2269,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2351,7 +2351,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2442,7 +2442,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2520,7 +2520,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2558,8 +2558,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2620,7 +2620,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2675,7 +2675,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2729,7 +2729,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2783,7 +2783,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2836,7 +2836,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2891,7 +2891,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2956,7 +2956,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2992,7 +2992,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3039,7 +3039,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3081,7 +3081,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3108,7 +3108,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3134,7 +3134,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3148,42 +3148,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3527,7 +3527,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3559,7 +3559,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3594,7 +3594,7 @@ #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3630,7 +3630,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3662,7 +3662,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3689,7 +3689,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3725,7 +3725,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3755,7 +3755,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3788,7 +3788,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3826,7 +3826,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3851,7 +3851,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3887,7 +3887,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3935,7 +3935,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3961,7 +3961,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3981,7 +3981,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4147,270 +4147,13 @@ #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4419,7 +4162,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4428,7 +4171,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4437,7 +4180,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4446,7 +4189,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4455,7 +4198,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4464,7 +4207,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4474,7 +4217,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 diff --git a/components/board/silabs/config/brd4341a/sl_iostream_usart_vcom_config.h b/components/board/silabs/config/brd4341a/sl_iostream_usart_vcom_config.h new file mode 100644 index 000000000..97ff2003b --- /dev/null +++ b/components/board/silabs/config/brd4341a/sl_iostream_usart_vcom_config.h @@ -0,0 +1,135 @@ +/***************************************************************************/ /** + * @file + * @brief IOSTREAM_USART Config. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_IOSTREAM_USART_VCOM_CONFIG_H +#define SL_IOSTREAM_USART_VCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// USART settings + +#define ENABLE 1 +#define DISABLE 0 + +// Baud rate <9600-921600> +// Default: 115200 +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + +// Parity +// No Parity +// Even parity +// Odd parity +// Default: SL_USART_NO_PARITY +#define SL_IOSTREAM_USART_VCOM_PARITY SL_USART_NO_PARITY + +// Stop bits +// 0.5 stop bits +// 1 stop bits +// 1.5 stop bits +// 2 stop bits +// Default: SL_USART_STOP_BITS_1 +#define SL_IOSTREAM_USART_VCOM_STOP_BITS SL_USART_STOP_BITS_1 + +#define SL_IOSTREAM_USART_VCOM_MODE SL_USART_MODE_ASYNCHRONOUS + +// Data Width +// 5 data bits +// 6 data bits +// 7 data bits +// 8 data bits +// Default: SL_USART_DATA_BITS_8 +#define SL_IOSTREAM_USART_VCOM_DATA_BITS SL_USART_DATA_BITS_8 + +// Flow control +// None +// CTS +// RTS +// CTS/RTS +// Default: SL_USART_FLOW_CONTROL_NONE +#define SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE SL_USART_FLOW_CONTROL_NONE + +// VCOM enable +// Default: 1 +#define SL_SI91X_VCOM_ENABLE 1 + +#define USART0_MODULE 0 +#define UART1_MODULE 1 +#define ULP_UART_MODULE 2 + +#if SL_SI91X_VCOM_ENABLE +#define SL_USART_MODULE ULP_UART_MODULE +#else +#define SL_USART_MODULE USART0_MODULE +#endif + +// Receive buffer size +// Default: 32 +#define SL_IOSTREAM_USART_VCOM_RX_BUFFER_SIZE 32 + +// Convert \n to \r\n +// It can be changed at runtime using the C API. +// Default: 0 +#define SL_IOSTREAM_USART_VCOM_CONVERT_BY_DEFAULT_LF_TO_CRLF 0 +// + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_IOSTREAM +// $[USART_SL_SI91X_IOSTREAM] +#ifndef SL_SI91X_IOSTREAM_PERIPHERAL +#define SL_SI91X_IOSTREAM_PERIPHERAL ULP_UART +#endif + +// ULP_UART TX on ULP_GPIO_11/GPIO_75 +#ifndef SL_SI91X_IOSTREAM_TX_PORT +#define SL_SI91X_IOSTREAM_TX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_TX_PIN +#define SL_SI91X_IOSTREAM_TX_PIN 11 +#endif +#ifndef SL_SI91X_IOSTREAM_TX_LOC +#define SL_SI91X_IOSTREAM_TX_LOC 1 +#endif + +// ULP_UART RX on ULP_GPIO_9/GPIO_73 +#ifndef SL_SI91X_IOSTREAM_RX_PORT +#define SL_SI91X_IOSTREAM_RX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_RX_PIN +#define SL_SI91X_IOSTREAM_RX_PIN 9 +#endif +#ifndef SL_SI91X_IOSTREAM_RX_LOC +#define SL_SI91X_IOSTREAM_RX_LOC 3 +#endif +// [USART_SL_SI91X_IOSTREAM]$ +// <<< sl:end pin_tool >>> + +#endif \ No newline at end of file diff --git a/components/board/silabs/config/brd4341a/sl_si91x_button_init_btn0_config.h b/components/board/silabs/config/brd4341a/sl_si91x_button_init_btn0_config.h new file mode 100644 index 000000000..f31924c9a --- /dev/null +++ b/components/board/silabs/config/brd4341a/sl_si91x_button_init_btn0_config.h @@ -0,0 +1,42 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn0_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/components/board/silabs/config/brd4341a/sl_si91x_button_init_btn1_config.h b/components/board/silabs/config/brd4341a/sl_si91x_button_init_btn1_config.h new file mode 100644 index 000000000..31838d62e --- /dev/null +++ b/components/board/silabs/config/brd4341a/sl_si91x_button_init_btn1_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn1_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/components/board/silabs/config/brd4341a/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/brd4341a/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..1719bbde9 --- /dev/null +++ b/components/board/silabs/config/brd4341a/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,115 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_I2C2_CONFIG_H +#define SL_SI91X_I2C_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration + +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_I2C_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4341a/sl_si91x_led_init_led0_config.h b/components/board/silabs/config/brd4341a/sl_si91x_led_init_led0_config.h new file mode 100644 index 000000000..2a41e676d --- /dev/null +++ b/components/board/silabs/config/brd4341a/sl_si91x_led_init_led0_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 2 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/components/board/silabs/config/brd4341a/sl_si91x_led_init_led1_config.h b/components/board/silabs/config/brd4341a/sl_si91x_led_init_led1_config.h new file mode 100644 index 000000000..14093b027 --- /dev/null +++ b/components/board/silabs/config/brd4341a/sl_si91x_led_init_led1_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H diff --git a/components/board/silabs/config/brd4341a/sl_si91x_memlcd_config.h b/components/board/silabs/config/brd4341a/sl_si91x_memlcd_config.h new file mode 100644 index 000000000..adc826da1 --- /dev/null +++ b/components/board/silabs/config/brd4341a/sl_si91x_memlcd_config.h @@ -0,0 +1,109 @@ +/***************************************************************************/ /** +* @file sl_si91x_memlcd_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_MEMLCD_CONFIG_H +#define SL_SI91X_MEMLCD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +// <<< sl:start pin_tool >>> +// SL_MEMLCD +// $[SSI_SL_MEMLCD] +#ifndef SL_MEMLCD_PERIPHERAL +#define SL_MEMLCD_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_MEMLCD_MOSI__PORT +#define SL_MEMLCD_MOSI__PORT ULP +#endif +#ifndef SL_MEMLCD_MOSI__PIN +#define SL_MEMLCD_MOSI__PIN 1 +#endif +#ifndef SL_MEMLCD_MOSI_LOC +#define SL_MEMLCD_MOSI_LOC 0 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_MEMLCD_SCK__PORT +#define SL_MEMLCD_SCK__PORT ULP +#endif +#ifndef SL_MEMLCD_SCK__PIN +#define SL_MEMLCD_SCK__PIN 8 +#endif +#ifndef SL_MEMLCD_SCK_LOC +#define SL_MEMLCD_SCK_LOC 7 +#endif + +// ULP_SSI CS0_ on ULP_GPIO_10/GPIO_74 +#ifndef SL_MEMLCD_CS0__PORT +#define SL_MEMLCD_CS0__PORT ULP +#endif +#ifndef SL_MEMLCD_CS0__PIN +#define SL_MEMLCD_CS0__PIN 10 +#endif +#ifndef SL_MEMLCD_CS0_LOC +#define SL_MEMLCD_CS0_LOC 9 +#endif +// [SSI_SL_MEMLCD]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_ENABLE +// $[GPIO_SL_MEMLCD_DISP_ENABLE] +#ifndef SL_MEMLCD_DISP_ENABLE_PORT +#define SL_MEMLCD_DISP_ENABLE_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_ENABLE_PIN +#define SL_MEMLCD_DISP_ENABLE_PIN 0 +#endif +// [GPIO_SL_MEMLCD_DISP_ENABLE]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_EXT_COMIN +// $[GPIO_SL_MEMLCD_DISP_EXT_COMIN] +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PORT +#define SL_MEMLCD_DISP_EXT_COMIN_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PIN +#define SL_MEMLCD_DISP_EXT_COMIN_PIN 3 +#endif +// [GPIO_SL_MEMLCD_DISP_EXT_COMIN]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_MEMLCD_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4342a/RTE_Device_917.h b/components/board/silabs/config/brd4342a/RTE_Device_917.h index a0dfaad55..7d2e521c4 100644 --- a/components/board/silabs/config/brd4342a/RTE_Device_917.h +++ b/components/board/silabs/config/brd4342a/RTE_Device_917.h @@ -110,7 +110,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -168,7 +168,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -236,7 +236,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -295,7 +295,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -344,7 +344,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -396,7 +396,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -448,7 +448,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -492,7 +492,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -531,7 +531,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -550,7 +550,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -567,7 +567,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -639,7 +639,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -703,7 +703,7 @@ #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -767,7 +767,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -840,7 +840,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -915,7 +915,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -942,7 +942,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -965,7 +965,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -982,7 +982,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1025,7 +1025,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1068,7 +1068,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1111,7 +1111,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1159,7 +1159,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1184,7 +1184,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1212,7 +1212,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1234,7 +1234,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1296,7 +1296,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1354,7 +1354,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1408,7 +1408,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1462,7 +1462,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1506,7 +1506,7 @@ #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1524,14 +1524,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1549,14 +1549,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1580,14 +1580,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1605,30 +1605,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT -#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 +#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SSI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1719,7 +1719,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1767,7 +1767,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1815,7 +1815,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1863,7 +1863,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1915,7 +1915,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1963,7 +1963,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2059,7 +2059,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2081,7 +2081,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2103,7 +2103,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2129,7 +2129,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2223,7 +2223,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2276,7 +2276,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2358,7 +2358,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2449,7 +2449,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2527,7 +2527,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2565,8 +2565,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2627,7 +2627,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2682,7 +2682,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2736,7 +2736,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2790,7 +2790,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2843,7 +2843,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2898,7 +2898,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2963,7 +2963,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2999,7 +2999,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3046,7 +3046,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3088,7 +3088,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3115,7 +3115,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3141,7 +3141,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3155,42 +3155,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3534,7 +3534,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3566,7 +3566,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3601,7 +3601,7 @@ #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3637,7 +3637,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3669,7 +3669,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3696,7 +3696,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3732,7 +3732,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3762,7 +3762,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3795,7 +3795,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3833,7 +3833,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3858,7 +3858,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3894,7 +3894,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3942,7 +3942,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3968,7 +3968,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3988,7 +3988,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4154,270 +4154,13 @@ #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4426,7 +4169,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4435,7 +4178,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4444,7 +4187,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4453,7 +4196,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4462,7 +4205,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4471,7 +4214,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4481,7 +4224,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 diff --git a/components/board/silabs/config/brd4342a/pin_config.h b/components/board/silabs/config/brd4342a/pin_config.h index 2bbc8c59c..60a6a7d20 100644 --- a/components/board/silabs/config/brd4342a/pin_config.h +++ b/components/board/silabs/config/brd4342a/pin_config.h @@ -25,8 +25,8 @@ // $[SSI_SLAVE] // [SSI_SLAVE]$ -// $[ULP_SPI] -// [ULP_SPI]$ +// $[ULP_SSI] +// [ULP_SSI]$ // $[GSPI_MASTER] // [GSPI_MASTER]$ @@ -127,6 +127,15 @@ // $[DAC1] // [DAC1]$ +// $[SYSRTC] +// [SYSRTC]$ + +// $[UULP_VBAT_GPIO] +// [UULP_VBAT_GPIO]$ + +// $[GPIO] +// [GPIO]$ + // $[CUSTOM_PIN_NAME] #ifndef _PORT #define _PORT 0 diff --git a/components/board/silabs/config/brd4342a/sl_iostream_usart_vcom_config.h b/components/board/silabs/config/brd4342a/sl_iostream_usart_vcom_config.h new file mode 100644 index 000000000..97ff2003b --- /dev/null +++ b/components/board/silabs/config/brd4342a/sl_iostream_usart_vcom_config.h @@ -0,0 +1,135 @@ +/***************************************************************************/ /** + * @file + * @brief IOSTREAM_USART Config. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_IOSTREAM_USART_VCOM_CONFIG_H +#define SL_IOSTREAM_USART_VCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// USART settings + +#define ENABLE 1 +#define DISABLE 0 + +// Baud rate <9600-921600> +// Default: 115200 +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + +// Parity +// No Parity +// Even parity +// Odd parity +// Default: SL_USART_NO_PARITY +#define SL_IOSTREAM_USART_VCOM_PARITY SL_USART_NO_PARITY + +// Stop bits +// 0.5 stop bits +// 1 stop bits +// 1.5 stop bits +// 2 stop bits +// Default: SL_USART_STOP_BITS_1 +#define SL_IOSTREAM_USART_VCOM_STOP_BITS SL_USART_STOP_BITS_1 + +#define SL_IOSTREAM_USART_VCOM_MODE SL_USART_MODE_ASYNCHRONOUS + +// Data Width +// 5 data bits +// 6 data bits +// 7 data bits +// 8 data bits +// Default: SL_USART_DATA_BITS_8 +#define SL_IOSTREAM_USART_VCOM_DATA_BITS SL_USART_DATA_BITS_8 + +// Flow control +// None +// CTS +// RTS +// CTS/RTS +// Default: SL_USART_FLOW_CONTROL_NONE +#define SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE SL_USART_FLOW_CONTROL_NONE + +// VCOM enable +// Default: 1 +#define SL_SI91X_VCOM_ENABLE 1 + +#define USART0_MODULE 0 +#define UART1_MODULE 1 +#define ULP_UART_MODULE 2 + +#if SL_SI91X_VCOM_ENABLE +#define SL_USART_MODULE ULP_UART_MODULE +#else +#define SL_USART_MODULE USART0_MODULE +#endif + +// Receive buffer size +// Default: 32 +#define SL_IOSTREAM_USART_VCOM_RX_BUFFER_SIZE 32 + +// Convert \n to \r\n +// It can be changed at runtime using the C API. +// Default: 0 +#define SL_IOSTREAM_USART_VCOM_CONVERT_BY_DEFAULT_LF_TO_CRLF 0 +// + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_IOSTREAM +// $[USART_SL_SI91X_IOSTREAM] +#ifndef SL_SI91X_IOSTREAM_PERIPHERAL +#define SL_SI91X_IOSTREAM_PERIPHERAL ULP_UART +#endif + +// ULP_UART TX on ULP_GPIO_11/GPIO_75 +#ifndef SL_SI91X_IOSTREAM_TX_PORT +#define SL_SI91X_IOSTREAM_TX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_TX_PIN +#define SL_SI91X_IOSTREAM_TX_PIN 11 +#endif +#ifndef SL_SI91X_IOSTREAM_TX_LOC +#define SL_SI91X_IOSTREAM_TX_LOC 1 +#endif + +// ULP_UART RX on ULP_GPIO_9/GPIO_73 +#ifndef SL_SI91X_IOSTREAM_RX_PORT +#define SL_SI91X_IOSTREAM_RX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_RX_PIN +#define SL_SI91X_IOSTREAM_RX_PIN 9 +#endif +#ifndef SL_SI91X_IOSTREAM_RX_LOC +#define SL_SI91X_IOSTREAM_RX_LOC 3 +#endif +// [USART_SL_SI91X_IOSTREAM]$ +// <<< sl:end pin_tool >>> + +#endif \ No newline at end of file diff --git a/components/board/silabs/config/brd4342a/sl_si91x_button_init_btn0_config.h b/components/board/silabs/config/brd4342a/sl_si91x_button_init_btn0_config.h new file mode 100644 index 000000000..f31924c9a --- /dev/null +++ b/components/board/silabs/config/brd4342a/sl_si91x_button_init_btn0_config.h @@ -0,0 +1,42 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn0_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/components/board/silabs/config/brd4342a/sl_si91x_button_init_btn1_config.h b/components/board/silabs/config/brd4342a/sl_si91x_button_init_btn1_config.h new file mode 100644 index 000000000..31838d62e --- /dev/null +++ b/components/board/silabs/config/brd4342a/sl_si91x_button_init_btn1_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn1_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/components/board/silabs/config/brd4342a/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/brd4342a/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..1719bbde9 --- /dev/null +++ b/components/board/silabs/config/brd4342a/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,115 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_I2C2_CONFIG_H +#define SL_SI91X_I2C_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration + +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_I2C_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4342a/sl_si91x_led_init_led0_config.h b/components/board/silabs/config/brd4342a/sl_si91x_led_init_led0_config.h new file mode 100644 index 000000000..2a41e676d --- /dev/null +++ b/components/board/silabs/config/brd4342a/sl_si91x_led_init_led0_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 2 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/components/board/silabs/config/brd4342a/sl_si91x_led_init_led1_config.h b/components/board/silabs/config/brd4342a/sl_si91x_led_init_led1_config.h new file mode 100644 index 000000000..14093b027 --- /dev/null +++ b/components/board/silabs/config/brd4342a/sl_si91x_led_init_led1_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H diff --git a/components/board/silabs/config/brd4342a/sl_si91x_memlcd_config.h b/components/board/silabs/config/brd4342a/sl_si91x_memlcd_config.h new file mode 100644 index 000000000..adc826da1 --- /dev/null +++ b/components/board/silabs/config/brd4342a/sl_si91x_memlcd_config.h @@ -0,0 +1,109 @@ +/***************************************************************************/ /** +* @file sl_si91x_memlcd_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_MEMLCD_CONFIG_H +#define SL_SI91X_MEMLCD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +// <<< sl:start pin_tool >>> +// SL_MEMLCD +// $[SSI_SL_MEMLCD] +#ifndef SL_MEMLCD_PERIPHERAL +#define SL_MEMLCD_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_MEMLCD_MOSI__PORT +#define SL_MEMLCD_MOSI__PORT ULP +#endif +#ifndef SL_MEMLCD_MOSI__PIN +#define SL_MEMLCD_MOSI__PIN 1 +#endif +#ifndef SL_MEMLCD_MOSI_LOC +#define SL_MEMLCD_MOSI_LOC 0 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_MEMLCD_SCK__PORT +#define SL_MEMLCD_SCK__PORT ULP +#endif +#ifndef SL_MEMLCD_SCK__PIN +#define SL_MEMLCD_SCK__PIN 8 +#endif +#ifndef SL_MEMLCD_SCK_LOC +#define SL_MEMLCD_SCK_LOC 7 +#endif + +// ULP_SSI CS0_ on ULP_GPIO_10/GPIO_74 +#ifndef SL_MEMLCD_CS0__PORT +#define SL_MEMLCD_CS0__PORT ULP +#endif +#ifndef SL_MEMLCD_CS0__PIN +#define SL_MEMLCD_CS0__PIN 10 +#endif +#ifndef SL_MEMLCD_CS0_LOC +#define SL_MEMLCD_CS0_LOC 9 +#endif +// [SSI_SL_MEMLCD]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_ENABLE +// $[GPIO_SL_MEMLCD_DISP_ENABLE] +#ifndef SL_MEMLCD_DISP_ENABLE_PORT +#define SL_MEMLCD_DISP_ENABLE_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_ENABLE_PIN +#define SL_MEMLCD_DISP_ENABLE_PIN 0 +#endif +// [GPIO_SL_MEMLCD_DISP_ENABLE]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_EXT_COMIN +// $[GPIO_SL_MEMLCD_DISP_EXT_COMIN] +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PORT +#define SL_MEMLCD_DISP_EXT_COMIN_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PIN +#define SL_MEMLCD_DISP_EXT_COMIN_PIN 3 +#endif +// [GPIO_SL_MEMLCD_DISP_EXT_COMIN]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_MEMLCD_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4343a/RTE_Device_917.h b/components/board/silabs/config/brd4343a/RTE_Device_917.h index 5d9574cd2..fa590fc77 100644 --- a/components/board/silabs/config/brd4343a/RTE_Device_917.h +++ b/components/board/silabs/config/brd4343a/RTE_Device_917.h @@ -20,7 +20,7 @@ * $Date: 1. December 2016 * $Revision: V2.4.4 * - * Project: RTE Device Configuration for Si91x 2.0 B0 BRD4343A + * Project: RTE Device Configuration for Si917 ACx Module BRD4343A * -------------------------------------------------------------------------- */ //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- @@ -109,7 +109,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -167,7 +167,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -235,7 +235,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -294,7 +294,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -343,7 +343,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -395,7 +395,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -447,7 +447,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -491,7 +491,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -530,7 +530,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -549,7 +549,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -566,7 +566,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -595,7 +595,7 @@ #define RTE_UART1_CHNL_UDMA_RX_CH 26 /*UART1 PINS*/ -// UART1_TX <0=>P0_7 <1=>P0_30 <2=>P0_67 <3=>P0_69 <4=>P0_73 <5=>P0_75 <6=>P0_34 +// UART1_TX <0=>P0_7 <1=>P0_30 <2=>P0_69 <3=>P0_73 <4=>P0_75 <5=>P0_34 // TX of UART1 #ifndef UART1_TX_LOC #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER @@ -620,15 +620,10 @@ #define RTE_UART1_TX_PAD 0 //no pad #elif (RTE_UART1_TX_PORT_ID == 2) #define RTE_UART1_TX_PORT 0 -#define RTE_UART1_TX_PIN 67 -#define RTE_UART1_TX_MUX 9 -#define RTE_UART1_TX_PAD 25 -#elif (RTE_UART1_TX_PORT_ID == 3) -#define RTE_UART1_TX_PORT 0 #define RTE_UART1_TX_PIN 73 #define RTE_UART1_TX_MUX 6 #define RTE_UART1_TX_PAD 31 -#elif (RTE_UART1_TX_PORT_ID == 4) +#elif (RTE_UART1_TX_PORT_ID == 3) #define RTE_UART1_TX_PORT 0 #define RTE_UART1_TX_PIN 75 #define RTE_UART1_TX_MUX 9 @@ -638,7 +633,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -667,7 +662,7 @@ //Pintool data #endif -// UART1_RX <0=>P0_6 <1=>P0_29 <2=>P0_66 <3=>P0_68 <4=>P0_72 <5=>P0_74 <6=>P0_33 +// UART1_RX <0=>P0_6 <1=>P0_29 <2=>P0_66 <3=>P0_72 // RX of UART1 #ifndef UART1_RX_LOC #define RTE_UART1_RX_PORT_ID 0 @@ -692,17 +687,12 @@ #define RTE_UART1_RX_PIN 72 #define RTE_UART1_RX_MUX 6 #define RTE_UART1_RX_PAD 30 -#elif (RTE_UART1_RX_PORT_ID == 4) -#define RTE_UART1_RX_PORT 0 -#define RTE_UART1_RX_PIN 74 -#define RTE_UART1_RX_MUX 9 -#define RTE_UART1_RX_PAD 32 #else #error "Invalid UART1 RTE_UART1_RX_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -766,7 +756,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -839,7 +829,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -914,7 +904,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -941,7 +931,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -964,7 +954,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -981,7 +971,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1024,7 +1014,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1067,7 +1057,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1110,7 +1100,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1158,7 +1148,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1183,7 +1173,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1211,7 +1201,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1233,7 +1223,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1295,7 +1285,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1353,7 +1343,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1407,7 +1397,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1461,7 +1451,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1500,12 +1490,12 @@ #define RTE_SSI_ULP_MASTER 1 // Enable multiple CSN lines -#define ULP_SSI_CS0 1 -#define ULP_SSI_CS1 0 +#define ULP_SSI_CS0 0 +#define ULP_SSI_CS1 1 #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1523,14 +1513,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1548,14 +1538,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1579,14 +1569,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1604,30 +1594,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT -#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 +#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SSI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1718,7 +1708,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1766,7 +1756,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1814,7 +1804,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1862,7 +1852,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1914,7 +1904,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1962,7 +1952,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2058,7 +2048,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2080,7 +2070,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2102,7 +2092,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2128,7 +2118,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2222,7 +2212,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2244,13 +2234,9 @@ //Pintool data #endif -// I2C0_SCL Pin <0=>P0_6 <1=>P0_64 <2=>P0_67 <3=>P0_74 <4=>P0_31 +// I2C0_SCL Pin <0=>P0_6 #ifndef I2C0_SDA_LOC -#ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define RTE_I2C0_SDA_PORT_ID 2 -#else #define RTE_I2C0_SDA_PORT_ID 0 -#endif #if (RTE_I2C0_SDA_PORT_ID == 0) #define RTE_I2C0_SDA_PORT 0 @@ -2258,24 +2244,12 @@ #define RTE_I2C0_SDA_MUX 4 #define RTE_I2C0_SDA_PAD 1 #define RTE_I2C0_SDA_I2C_REN 6 -#elif (RTE_I2C0_SDA_PORT_ID == 1) -#define RTE_I2C0_SDA_PORT 0 -#define RTE_I2C0_SDA_PIN 67 -#define RTE_I2C0_SDA_MUX 4 -#define RTE_I2C0_SDA_PAD 25 -#define RTE_I2C0_SDA_I2C_REN 3 -#elif (RTE_I2C0_SDA_PORT_ID == 2) -#define RTE_I2C0_SDA_PORT 0 -#define RTE_I2C0_SDA_PIN 74 -#define RTE_I2C0_SDA_MUX 4 -#define RTE_I2C0_SDA_PAD 32 -#define RTE_I2C0_SDA_I2C_REN 10 #else #error "Invalid I2C0 RTE_I2C0_SDA Pin Configuration!" #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2357,7 +2331,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2397,7 +2371,7 @@ //Pintool data #endif -// I2C1_SCL Pin <0=>P0_7 <1=>P0_30 <2=>P0_51 <3=>P0_55 <4=>P0_65 <4=>P0_67 <4=>P0_71 <7=>P0_34 +// I2C1_SCL Pin <0=>P0_7 <1=>P0_30 <2=>P0_51 <3=>P0_55 <4=>P0_65 <5=>P0_71 <6=>P0_34 #ifndef I2C1_SDA_LOC #define RTE_I2C1_SDA_PORT_ID 2 @@ -2433,12 +2407,6 @@ #define RTE_I2C1_SDA_REN 1 #elif (RTE_I2C1_SDA_PORT_ID == 5) #define RTE_I2C1_SDA_PORT 0 -#define RTE_I2C1_SDA_PIN 67 -#define RTE_I2C1_SDA_MUX 5 -#define RTE_I2C1_SDA_PAD 25 -#define RTE_I2C1_SDA_REN 3 -#elif (RTE_I2C1_SDA_PORT_ID == 6) -#define RTE_I2C1_SDA_PORT 0 #define RTE_I2C1_SDA_PIN 71 #define RTE_I2C1_SDA_MUX 5 #define RTE_I2C1_SDA_PAD 29 @@ -2448,7 +2416,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2526,7 +2494,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2564,8 +2532,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2626,7 +2594,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2681,7 +2649,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2735,7 +2703,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2789,7 +2757,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2842,7 +2810,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2897,7 +2865,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2962,7 +2930,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2998,7 +2966,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3045,7 +3013,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3059,7 +3027,7 @@ //Pintool data #endif -//SCT_IN_3 <0=>GPIO_28 <1=>GPIO_67 <2=>GPIO_71 +//SCT_IN_3 <0=>GPIO_28 <1=>GPIO_71 #ifndef SCT_IN3_LOC #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SCT_IN_3_PORT_ID 0 @@ -3074,11 +3042,6 @@ #define RTE_SCT_IN_3_PAD 0 //no pad #elif (RTE_SCT_IN_3_PORT_ID == 1) #define RTE_SCT_IN_3_PORT 0 -#define RTE_SCT_IN_3_PIN 67 -#define RTE_SCT_IN_3_MUX 7 -#define RTE_SCT_IN_3_PAD 25 -#elif (RTE_SCT_IN_3_PORT_ID == 2) -#define RTE_SCT_IN_3_PORT 0 #define RTE_SCT_IN_3_PIN 71 #define RTE_SCT_IN_3_MUX 9 #define RTE_SCT_IN_3_PAD 29 @@ -3087,7 +3050,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3114,7 +3077,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3140,7 +3103,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3154,42 +3117,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3296,7 +3259,7 @@ //Pintool data #endif -// SIO_2 <0=>GPIO_8 <1=>GPIO_27 <2=>GPIO_66 <3=>GPIO_74 +// SIO_2 <0=>GPIO_8 <1=>GPIO_27 <2=>GPIO_66 #ifndef SIO_2_LOC #define RTE_SIO_2_PORT_ID 1 @@ -3315,11 +3278,6 @@ #define RTE_SIO_2_PIN 66 #define RTE_SIO_2_MUX 1 #define RTE_SIO_2_PAD 24 -#elif (RTE_SIO_2_PORT_ID == 3) -#define RTE_SIO_2_PORT 0 -#define RTE_SIO_2_PIN 74 -#define RTE_SIO_2_MUX 1 -#define RTE_SIO_2_PAD 32 #else #error "Invalid RTE_SIO_2_PIN Pin Configuration!" #endif @@ -3342,7 +3300,7 @@ //Pintool data #endif -//SIO_3 <0=>GPIO_9 <1=>GPIO_28 <2=>GPIO_67 <3=>GPIO_75 +//SIO_3 <0=>GPIO_9 <1=>GPIO_28 <2=>GPIO_75 #ifndef SIO_3_LOC #define RTE_SIO_3_PORT_ID 1 @@ -3358,11 +3316,6 @@ #define RTE_SIO_3_PAD 0 //no pad #elif (RTE_SIO_3_PORT_ID == 2) #define RTE_SIO_3_PORT 0 -#define RTE_SIO_3_PIN 67 -#define RTE_SIO_3_MUX 1 -#define RTE_SIO_3_PAD 25 -#elif (RTE_SIO_3_PORT_ID == 3) -#define RTE_SIO_3_PORT 0 #define RTE_SIO_3_PIN 75 #define RTE_SIO_3_MUX 1 #define RTE_SIO_3_PAD 33 @@ -3533,7 +3486,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3565,7 +3518,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3578,7 +3531,7 @@ //Pintool data #endif -//PWM_2H <0=>GPIO_9 <1=>GPIO_67 <2=>GPIO_69 +//PWM_2H <0=>GPIO_9 #ifndef PWM_2H_LOC #define RTE_PWM_2H_PORT_ID 0 #if ((RTE_PWM_2H_PORT_ID == 2)) @@ -3590,17 +3543,12 @@ #define RTE_PWM_2H_PIN 9 #define RTE_PWM_2H_MUX 10 #define RTE_PWM_2H_PAD 4 -#elif (RTE_PWM_2H_PORT_ID == 1) -#define RTE_PWM_2H_PORT 0 -#define RTE_PWM_2H_PIN 67 -#define RTE_PWM_2H_MUX 8 -#define RTE_PWM_2H_PAD 25 #else #error "Invalid RTE_PWM_2H_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3636,7 +3584,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3668,7 +3616,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3695,7 +3643,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3731,7 +3679,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3761,7 +3709,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3794,7 +3742,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3813,7 +3761,7 @@ //Pintool data #endif -// PWM_FAULTB <0=>GPIO_26 <1=>GPIO_69 <1=>GPIO_74 +// PWM_FAULTB <0=>GPIO_26 #ifndef PWM_FAULTB_LOC #define RTE_PWM_FAULTB_PORT_ID 0 @@ -3822,17 +3770,12 @@ #define RTE_PWM_FAULTB_PIN 26 #define RTE_PWM_FAULTB_MUX 10 #define RTE_PWM_FAULTB_PAD 0 //no pad -#elif (RTE_PWM_FAULTB_PORT_ID == 2) -#define RTE_PWM_FAULTB_PORT 0 -#define RTE_PWM_FAULTB_PIN 74 -#define RTE_PWM_FAULTB_MUX 8 -#define RTE_PWM_FAULTB_PAD 32 #else #error "Invalid RTE_PWM_FAULTB_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3857,7 +3800,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3893,7 +3836,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3941,7 +3884,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3967,7 +3910,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3987,7 +3930,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4007,9 +3950,9 @@ //<> QEI (Quadrature Encode Interface) -//QEI_DIR <0=>GPIO_28 <1=>GPIO_49 <2=>GPIO_57 <3=>GPIO_67 <4=>GPIO_71 <5=>GPIO_73 <6=>GPIO_11 <7=>GPIO_34 +//QEI_DIR <0=>GPIO_28 <1=>GPIO_49 <2=>GPIO_57 <3=>GPIO_71 <4=>GPIO_73 <5=>GPIO_11 <6=>GPIO_34 -#define RTE_QEI_DIR_PORT_ID 4 +#define RTE_QEI_DIR_PORT_ID 3 #if (RTE_QEI_DIR_PORT_ID == 0) #define RTE_QEI_DIR_PORT 0 @@ -4028,15 +3971,10 @@ #define RTE_QEI_DIR_PAD 21 #elif (RTE_QEI_DIR_PORT_ID == 3) #define RTE_QEI_DIR_PORT 0 -#define RTE_QEI_DIR_PIN 67 -#define RTE_QEI_DIR_MUX 3 -#define RTE_QEI_DIR_PAD 25 -#elif (RTE_QEI_DIR_PORT_ID == 4) -#define RTE_QEI_DIR_PORT 0 #define RTE_QEI_DIR_PIN 71 #define RTE_QEI_DIR_MUX 3 #define RTE_QEI_DIR_PAD 29 -#elif (RTE_QEI_DIR_PORT_ID == 5) +#elif (RTE_QEI_DIR_PORT_ID == 4) #define RTE_QEI_DIR_PORT 0 #define RTE_QEI_DIR_PIN 73 #define RTE_QEI_DIR_MUX 3 @@ -4110,12 +4048,12 @@ #error "Invalid RTE_QEI_PHA_PIN Pin Configuration!" #endif -//QEI_PHB <0=>GPIO_27 <1=>GPIO_48 <1=>GPIO_56 <1=>GPIO_66 <1=>GPIO_70 <1=>GPIO_74 <7=>GPIO_33 +//QEI_PHB <0=>GPIO_27 <1=>GPIO_48 <2=>GPIO_56 <3=>GPIO_66 <4=>GPIO_70 #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define RTE_QEI_PHB_PORT_ID 5 -#else #define RTE_QEI_PHB_PORT_ID 4 +#else +#define RTE_QEI_PHB_PORT_ID 3 #endif #if (RTE_QEI_PHB_PORT_ID == 0) @@ -4143,280 +4081,18 @@ #define RTE_QEI_PHB_PIN 70 #define RTE_QEI_PHB_MUX 3 #define RTE_QEI_PHB_PAD 28 -#elif (RTE_QEI_PHB_PORT_ID == 5) -#define RTE_QEI_PHB_PORT 0 -#define RTE_QEI_PHB_PIN 74 -#define RTE_QEI_PHB_MUX 3 -#define RTE_QEI_PHB_PAD 32 #else #error "Invalid RTE_QEI_PHB_PIN Pin Configuration!" #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4425,7 +4101,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4434,7 +4110,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4443,7 +4119,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4452,7 +4128,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4461,7 +4137,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4470,7 +4146,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4480,7 +4156,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 @@ -4688,18 +4364,9 @@ #error "Invalid RTE_ULP_GPIO_2_PIN Pin Configuration!" #endif -#ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_ULP_GPIO_3_PORT_ID 1 -#else -#define RTE_ULP_GPIO_3_PORT_ID 0 -#endif -#if (RTE_ULP_GPIO_3_PORT_ID == 0) -#define RTE_ULP_GPIO_3_PORT 0 -#define RTE_ULP_GPIO_3_PAD 25 -#define RTE_ULP_GPIO_3_PIN 67 -#define RTE_ULP_GPIO_3_MODE 0 -#elif (RTE_ULP_GPIO_3_PORT_ID == 1) +#if (RTE_ULP_GPIO_3_PORT_ID == 1) #define RTE_ULP_GPIO_3_PORT 4 #define RTE_ULP_GPIO_3_PIN 3 #define RTE_ULP_GPIO_3_MODE 0 @@ -4821,19 +4488,10 @@ #error "Invalid RTE_ULP_GPIO_9_PIN Pin Configuration!" #endif -#ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define RTE_ULP_GPIO_10_PORT_ID 1 -#else #define RTE_ULP_GPIO_10_PORT_ID 0 -#endif #if (RTE_ULP_GPIO_10_PORT_ID == 0) #define RTE_ULP_GPIO_10_PORT 4 -#define RTE_ULP_GPIO_10_PAD 32 -#define RTE_ULP_GPIO_10_PIN 74 -#define RTE_ULP_GPIO_10_MODE 0 -#elif (RTE_ULP_GPIO_10_PORT_ID == 1) -#define RTE_ULP_GPIO_10_PORT 4 #define RTE_ULP_GPIO_10_PIN 10 #define RTE_ULP_GPIO_10_MODE 0 #else diff --git a/components/board/silabs/config/brd4343a/pin_config.h b/components/board/silabs/config/brd4343a/pin_config.h index 2bbc8c59c..60a6a7d20 100644 --- a/components/board/silabs/config/brd4343a/pin_config.h +++ b/components/board/silabs/config/brd4343a/pin_config.h @@ -25,8 +25,8 @@ // $[SSI_SLAVE] // [SSI_SLAVE]$ -// $[ULP_SPI] -// [ULP_SPI]$ +// $[ULP_SSI] +// [ULP_SSI]$ // $[GSPI_MASTER] // [GSPI_MASTER]$ @@ -127,6 +127,15 @@ // $[DAC1] // [DAC1]$ +// $[SYSRTC] +// [SYSRTC]$ + +// $[UULP_VBAT_GPIO] +// [UULP_VBAT_GPIO]$ + +// $[GPIO] +// [GPIO]$ + // $[CUSTOM_PIN_NAME] #ifndef _PORT #define _PORT 0 diff --git a/components/board/silabs/config/brd4343a/sl_iostream_usart_vcom_config.h b/components/board/silabs/config/brd4343a/sl_iostream_usart_vcom_config.h new file mode 100644 index 000000000..97ff2003b --- /dev/null +++ b/components/board/silabs/config/brd4343a/sl_iostream_usart_vcom_config.h @@ -0,0 +1,135 @@ +/***************************************************************************/ /** + * @file + * @brief IOSTREAM_USART Config. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_IOSTREAM_USART_VCOM_CONFIG_H +#define SL_IOSTREAM_USART_VCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// USART settings + +#define ENABLE 1 +#define DISABLE 0 + +// Baud rate <9600-921600> +// Default: 115200 +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + +// Parity +// No Parity +// Even parity +// Odd parity +// Default: SL_USART_NO_PARITY +#define SL_IOSTREAM_USART_VCOM_PARITY SL_USART_NO_PARITY + +// Stop bits +// 0.5 stop bits +// 1 stop bits +// 1.5 stop bits +// 2 stop bits +// Default: SL_USART_STOP_BITS_1 +#define SL_IOSTREAM_USART_VCOM_STOP_BITS SL_USART_STOP_BITS_1 + +#define SL_IOSTREAM_USART_VCOM_MODE SL_USART_MODE_ASYNCHRONOUS + +// Data Width +// 5 data bits +// 6 data bits +// 7 data bits +// 8 data bits +// Default: SL_USART_DATA_BITS_8 +#define SL_IOSTREAM_USART_VCOM_DATA_BITS SL_USART_DATA_BITS_8 + +// Flow control +// None +// CTS +// RTS +// CTS/RTS +// Default: SL_USART_FLOW_CONTROL_NONE +#define SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE SL_USART_FLOW_CONTROL_NONE + +// VCOM enable +// Default: 1 +#define SL_SI91X_VCOM_ENABLE 1 + +#define USART0_MODULE 0 +#define UART1_MODULE 1 +#define ULP_UART_MODULE 2 + +#if SL_SI91X_VCOM_ENABLE +#define SL_USART_MODULE ULP_UART_MODULE +#else +#define SL_USART_MODULE USART0_MODULE +#endif + +// Receive buffer size +// Default: 32 +#define SL_IOSTREAM_USART_VCOM_RX_BUFFER_SIZE 32 + +// Convert \n to \r\n +// It can be changed at runtime using the C API. +// Default: 0 +#define SL_IOSTREAM_USART_VCOM_CONVERT_BY_DEFAULT_LF_TO_CRLF 0 +// + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_IOSTREAM +// $[USART_SL_SI91X_IOSTREAM] +#ifndef SL_SI91X_IOSTREAM_PERIPHERAL +#define SL_SI91X_IOSTREAM_PERIPHERAL ULP_UART +#endif + +// ULP_UART TX on ULP_GPIO_11/GPIO_75 +#ifndef SL_SI91X_IOSTREAM_TX_PORT +#define SL_SI91X_IOSTREAM_TX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_TX_PIN +#define SL_SI91X_IOSTREAM_TX_PIN 11 +#endif +#ifndef SL_SI91X_IOSTREAM_TX_LOC +#define SL_SI91X_IOSTREAM_TX_LOC 1 +#endif + +// ULP_UART RX on ULP_GPIO_9/GPIO_73 +#ifndef SL_SI91X_IOSTREAM_RX_PORT +#define SL_SI91X_IOSTREAM_RX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_RX_PIN +#define SL_SI91X_IOSTREAM_RX_PIN 9 +#endif +#ifndef SL_SI91X_IOSTREAM_RX_LOC +#define SL_SI91X_IOSTREAM_RX_LOC 3 +#endif +// [USART_SL_SI91X_IOSTREAM]$ +// <<< sl:end pin_tool >>> + +#endif \ No newline at end of file diff --git a/components/board/silabs/config/brd4343a/sl_si91x_button_init_btn0_config.h b/components/board/silabs/config/brd4343a/sl_si91x_button_init_btn0_config.h new file mode 100644 index 000000000..f31924c9a --- /dev/null +++ b/components/board/silabs/config/brd4343a/sl_si91x_button_init_btn0_config.h @@ -0,0 +1,42 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn0_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/components/board/silabs/config/brd4343a/sl_si91x_button_init_btn1_config.h b/components/board/silabs/config/brd4343a/sl_si91x_button_init_btn1_config.h new file mode 100644 index 000000000..31838d62e --- /dev/null +++ b/components/board/silabs/config/brd4343a/sl_si91x_button_init_btn1_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn1_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/components/board/silabs/config/brd4343a/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/brd4343a/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..1719bbde9 --- /dev/null +++ b/components/board/silabs/config/brd4343a/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,115 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_I2C2_CONFIG_H +#define SL_SI91X_I2C_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration + +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_I2C_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4343a/sl_si91x_led_init_led0_config.h b/components/board/silabs/config/brd4343a/sl_si91x_led_init_led0_config.h new file mode 100644 index 000000000..28169b6c2 --- /dev/null +++ b/components/board/silabs/config/brd4343a/sl_si91x_led_init_led0_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 0 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/components/board/silabs/config/brd4343a/sl_si91x_led_init_led1_config.h b/components/board/silabs/config/brd4343a/sl_si91x_led_init_led1_config.h new file mode 100644 index 000000000..14093b027 --- /dev/null +++ b/components/board/silabs/config/brd4343a/sl_si91x_led_init_led1_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H diff --git a/components/board/silabs/config/brd4343a/sl_si91x_memlcd_config.h b/components/board/silabs/config/brd4343a/sl_si91x_memlcd_config.h new file mode 100644 index 000000000..de10c3340 --- /dev/null +++ b/components/board/silabs/config/brd4343a/sl_si91x_memlcd_config.h @@ -0,0 +1,109 @@ +/***************************************************************************/ /** +* @file sl_si91x_memlcd_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_MEMLCD_CONFIG_H +#define SL_SI91X_MEMLCD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +// <<< sl:start pin_tool >>> +// SL_MEMLCD +// $[SSI_SL_MEMLCD] +#ifndef SL_MEMLCD_PERIPHERAL +#define SL_MEMLCD_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_MEMLCD_MOSI__PORT +#define SL_MEMLCD_MOSI__PORT ULP +#endif +#ifndef SL_MEMLCD_MOSI__PIN +#define SL_MEMLCD_MOSI__PIN 1 +#endif +#ifndef SL_MEMLCD_MOSI_LOC +#define SL_MEMLCD_MOSI_LOC 0 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_MEMLCD_SCK__PORT +#define SL_MEMLCD_SCK__PORT ULP +#endif +#ifndef SL_MEMLCD_SCK__PIN +#define SL_MEMLCD_SCK__PIN 8 +#endif +#ifndef SL_MEMLCD_SCK_LOC +#define SL_MEMLCD_SCK_LOC 7 +#endif + +// ULP_SSI CS1_ on ULP_GPIO_4/GPIO_68 +#ifndef SL_MEMLCD_CS1__PORT +#define SL_MEMLCD_CS1__PORT ULP +#endif +#ifndef SL_MEMLCD_CS1__PIN +#define SL_MEMLCD_CS1__PIN 4 +#endif +#ifndef SL_MEMLCD_CS1_LOC +#define SL_MEMLCD_CS1_LOC 10 +#endif +// [SSI_SL_MEMLCD]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_ENABLE +// $[GPIO_SL_MEMLCD_DISP_ENABLE] +#ifndef SL_MEMLCD_DISP_ENABLE_PORT +#define SL_MEMLCD_DISP_ENABLE_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_ENABLE_PIN +#define SL_MEMLCD_DISP_ENABLE_PIN 0 +#endif +// [GPIO_SL_MEMLCD_DISP_ENABLE]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_EXT_COMIN +// $[GPIO_SL_MEMLCD_DISP_EXT_COMIN] +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PORT +#define SL_MEMLCD_DISP_EXT_COMIN_PORT ULP +#endif +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PIN +#define SL_MEMLCD_DISP_EXT_COMIN_PIN 5 +#endif +// [GPIO_SL_MEMLCD_DISP_EXT_COMIN]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_MEMLCD_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4343b/RTE_Device_917.h b/components/board/silabs/config/brd4343b/RTE_Device_917.h index c98d6a0e6..fa182e940 100644 --- a/components/board/silabs/config/brd4343b/RTE_Device_917.h +++ b/components/board/silabs/config/brd4343b/RTE_Device_917.h @@ -20,7 +20,7 @@ * $Date: 1. December 2016 * $Revision: V2.4.4 * - * Project: RTE Device Configuration for Si91x 2.0 B0 BRD4343B + * Project: RTE Device Configuration for Si917 ACx Module BRD4343B * -------------------------------------------------------------------------- */ //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- @@ -109,7 +109,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -167,7 +167,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -235,7 +235,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -294,7 +294,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -343,7 +343,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -395,7 +395,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -447,7 +447,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -491,7 +491,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -530,7 +530,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -549,7 +549,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -566,7 +566,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -595,7 +595,7 @@ #define RTE_UART1_CHNL_UDMA_RX_CH 26 /*UART1 PINS*/ -// UART1_TX <0=>P0_7 <1=>P0_30 <2=>P0_67 <3=>P0_69 <4=>P0_73 <5=>P0_75 <6=>P0_34 +// UART1_TX <0=>P0_7 <1=>P0_30 <2=>P0_69 <3=>P0_73 <4=>P0_75 <5=>P0_34 // TX of UART1 #ifndef UART1_TX_LOC #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER @@ -620,15 +620,10 @@ #define RTE_UART1_TX_PAD 0 //no pad #elif (RTE_UART1_TX_PORT_ID == 2) #define RTE_UART1_TX_PORT 0 -#define RTE_UART1_TX_PIN 67 -#define RTE_UART1_TX_MUX 9 -#define RTE_UART1_TX_PAD 25 -#elif (RTE_UART1_TX_PORT_ID == 3) -#define RTE_UART1_TX_PORT 0 #define RTE_UART1_TX_PIN 73 #define RTE_UART1_TX_MUX 6 #define RTE_UART1_TX_PAD 31 -#elif (RTE_UART1_TX_PORT_ID == 4) +#elif (RTE_UART1_TX_PORT_ID == 3) #define RTE_UART1_TX_PORT 0 #define RTE_UART1_TX_PIN 75 #define RTE_UART1_TX_MUX 9 @@ -638,7 +633,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -667,7 +662,7 @@ //Pintool data #endif -// UART1_RX <0=>P0_6 <1=>P0_29 <2=>P0_66 <3=>P0_68 <4=>P0_72 <5=>P0_74 <6=>P0_33 +// UART1_RX <0=>P0_6 <1=>P0_29 <2=>P0_66 <3=>P0_72 // RX of UART1 #ifndef UART1_RX_LOC #define RTE_UART1_RX_PORT_ID 0 @@ -692,17 +687,12 @@ #define RTE_UART1_RX_PIN 72 #define RTE_UART1_RX_MUX 6 #define RTE_UART1_RX_PAD 30 -#elif (RTE_UART1_RX_PORT_ID == 4) -#define RTE_UART1_RX_PORT 0 -#define RTE_UART1_RX_PIN 74 -#define RTE_UART1_RX_MUX 9 -#define RTE_UART1_RX_PAD 32 #else #error "Invalid UART1 RTE_UART1_RX_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -766,7 +756,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -839,7 +829,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -914,7 +904,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -941,7 +931,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -964,7 +954,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -981,7 +971,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1024,7 +1014,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1067,7 +1057,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1110,7 +1100,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1158,7 +1148,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1183,7 +1173,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1211,7 +1201,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1233,7 +1223,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1295,7 +1285,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1353,7 +1343,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1407,7 +1397,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1427,7 +1417,7 @@ // SSI_SLAVE_CS Pin <0=>Not Used <1=>GPIO_9 <2=>GPIO_25 <3=>GPIO_46 <4=>GPIO_53 #ifndef SSI_SLAVE_CS0_LOC -#define RTE_SSI_SLAVE_CS_PORT_ID 1 +#define RTE_SSI_SLAVE_CS_PORT_ID 2 #if (RTE_SSI_SLAVE_CS_PORT_ID == 0) #define RTE_SSI_SLAVE_CS 0 @@ -1461,7 +1451,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1500,12 +1490,12 @@ #define RTE_SSI_ULP_MASTER 1 // Enable multiple CSN lines -#define ULP_SSI_CS0 1 -#define ULP_SSI_CS1 0 +#define ULP_SSI_CS0 0 +#define ULP_SSI_CS1 1 #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1523,14 +1513,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1548,14 +1538,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1579,14 +1569,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1604,30 +1594,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT -#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 +#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SSI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1718,7 +1708,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1766,7 +1756,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1814,7 +1804,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1862,7 +1852,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1914,7 +1904,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1962,7 +1952,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2058,7 +2048,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2080,7 +2070,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2102,7 +2092,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2128,7 +2118,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2222,7 +2212,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2244,13 +2234,9 @@ //Pintool data #endif -// I2C0_SCL Pin <0=>P0_6 <1=>P0_64 <2=>P0_67 <3=>P0_74 <4=>P0_31 +// I2C0_SCL Pin <0=>P0_6 #ifndef I2C0_SDA_LOC -#ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define RTE_I2C0_SDA_PORT_ID 2 -#else #define RTE_I2C0_SDA_PORT_ID 0 -#endif #if (RTE_I2C0_SDA_PORT_ID == 0) #define RTE_I2C0_SDA_PORT 0 @@ -2258,24 +2244,12 @@ #define RTE_I2C0_SDA_MUX 4 #define RTE_I2C0_SDA_PAD 1 #define RTE_I2C0_SDA_I2C_REN 6 -#elif (RTE_I2C0_SDA_PORT_ID == 1) -#define RTE_I2C0_SDA_PORT 0 -#define RTE_I2C0_SDA_PIN 67 -#define RTE_I2C0_SDA_MUX 4 -#define RTE_I2C0_SDA_PAD 25 -#define RTE_I2C0_SDA_I2C_REN 3 -#elif (RTE_I2C0_SDA_PORT_ID == 2) -#define RTE_I2C0_SDA_PORT 0 -#define RTE_I2C0_SDA_PIN 74 -#define RTE_I2C0_SDA_MUX 4 -#define RTE_I2C0_SDA_PAD 32 -#define RTE_I2C0_SDA_I2C_REN 10 #else #error "Invalid I2C0 RTE_I2C0_SDA Pin Configuration!" #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2357,7 +2331,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2397,7 +2371,7 @@ //Pintool data #endif -// I2C1_SCL Pin <0=>P0_7 <1=>P0_30 <2=>P0_51 <3=>P0_55 <4=>P0_65 <4=>P0_67 <4=>P0_71 <7=>P0_34 +// I2C1_SCL Pin <0=>P0_7 <1=>P0_30 <2=>P0_51 <3=>P0_55 <4=>P0_65 <5=>P0_71 <6=>P0_34 #ifndef I2C1_SDA_LOC #define RTE_I2C1_SDA_PORT_ID 2 @@ -2433,12 +2407,6 @@ #define RTE_I2C1_SDA_REN 1 #elif (RTE_I2C1_SDA_PORT_ID == 5) #define RTE_I2C1_SDA_PORT 0 -#define RTE_I2C1_SDA_PIN 67 -#define RTE_I2C1_SDA_MUX 5 -#define RTE_I2C1_SDA_PAD 25 -#define RTE_I2C1_SDA_REN 3 -#elif (RTE_I2C1_SDA_PORT_ID == 6) -#define RTE_I2C1_SDA_PORT 0 #define RTE_I2C1_SDA_PIN 71 #define RTE_I2C1_SDA_MUX 5 #define RTE_I2C1_SDA_PAD 29 @@ -2448,7 +2416,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2526,7 +2494,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2564,8 +2532,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2626,7 +2594,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2681,7 +2649,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2735,7 +2703,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2789,7 +2757,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2842,7 +2810,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2897,7 +2865,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2962,7 +2930,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2998,7 +2966,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3045,7 +3013,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3059,7 +3027,7 @@ //Pintool data #endif -//SCT_IN_3 <0=>GPIO_28 <1=>GPIO_67 <2=>GPIO_71 +//SCT_IN_3 <0=>GPIO_28 <1=>GPIO_71 #ifndef SCT_IN3_LOC #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SCT_IN_3_PORT_ID 0 @@ -3074,11 +3042,6 @@ #define RTE_SCT_IN_3_PAD 0 //no pad #elif (RTE_SCT_IN_3_PORT_ID == 1) #define RTE_SCT_IN_3_PORT 0 -#define RTE_SCT_IN_3_PIN 67 -#define RTE_SCT_IN_3_MUX 7 -#define RTE_SCT_IN_3_PAD 25 -#elif (RTE_SCT_IN_3_PORT_ID == 2) -#define RTE_SCT_IN_3_PORT 0 #define RTE_SCT_IN_3_PIN 71 #define RTE_SCT_IN_3_MUX 9 #define RTE_SCT_IN_3_PAD 29 @@ -3087,7 +3050,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3114,7 +3077,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3140,7 +3103,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3154,42 +3117,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3296,7 +3259,7 @@ //Pintool data #endif -// SIO_2 <0=>GPIO_8 <1=>GPIO_27 <2=>GPIO_66 <3=>GPIO_74 +// SIO_2 <0=>GPIO_8 <1=>GPIO_27 <2=>GPIO_66 #ifndef SIO_2_LOC #define RTE_SIO_2_PORT_ID 1 @@ -3315,11 +3278,6 @@ #define RTE_SIO_2_PIN 66 #define RTE_SIO_2_MUX 1 #define RTE_SIO_2_PAD 24 -#elif (RTE_SIO_2_PORT_ID == 3) -#define RTE_SIO_2_PORT 0 -#define RTE_SIO_2_PIN 74 -#define RTE_SIO_2_MUX 1 -#define RTE_SIO_2_PAD 32 #else #error "Invalid RTE_SIO_2_PIN Pin Configuration!" #endif @@ -3342,7 +3300,7 @@ //Pintool data #endif -//SIO_3 <0=>GPIO_9 <1=>GPIO_28 <2=>GPIO_67 <3=>GPIO_75 +//SIO_3 <0=>GPIO_9 <1=>GPIO_28 <2=>GPIO_75 #ifndef SIO_3_LOC #define RTE_SIO_3_PORT_ID 1 @@ -3358,11 +3316,6 @@ #define RTE_SIO_3_PAD 0 //no pad #elif (RTE_SIO_3_PORT_ID == 2) #define RTE_SIO_3_PORT 0 -#define RTE_SIO_3_PIN 67 -#define RTE_SIO_3_MUX 1 -#define RTE_SIO_3_PAD 25 -#elif (RTE_SIO_3_PORT_ID == 3) -#define RTE_SIO_3_PORT 0 #define RTE_SIO_3_PIN 75 #define RTE_SIO_3_MUX 1 #define RTE_SIO_3_PAD 33 @@ -3533,7 +3486,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3565,7 +3518,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3578,7 +3531,7 @@ //Pintool data #endif -//PWM_2H <0=>GPIO_9 <1=>GPIO_67 <2=>GPIO_69 +//PWM_2H <0=>GPIO_9 #ifndef PWM_2H_LOC #define RTE_PWM_2H_PORT_ID 0 #if ((RTE_PWM_2H_PORT_ID == 2)) @@ -3590,17 +3543,12 @@ #define RTE_PWM_2H_PIN 9 #define RTE_PWM_2H_MUX 10 #define RTE_PWM_2H_PAD 4 -#elif (RTE_PWM_2H_PORT_ID == 1) -#define RTE_PWM_2H_PORT 0 -#define RTE_PWM_2H_PIN 67 -#define RTE_PWM_2H_MUX 8 -#define RTE_PWM_2H_PAD 25 #else #error "Invalid RTE_PWM_2H_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3636,7 +3584,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3668,7 +3616,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3695,7 +3643,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3731,7 +3679,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3761,7 +3709,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3794,7 +3742,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3813,7 +3761,7 @@ //Pintool data #endif -// PWM_FAULTB <0=>GPIO_26 <1=>GPIO_69 <1=>GPIO_74 +// PWM_FAULTB <0=>GPIO_26 #ifndef PWM_FAULTB_LOC #define RTE_PWM_FAULTB_PORT_ID 0 @@ -3822,17 +3770,12 @@ #define RTE_PWM_FAULTB_PIN 26 #define RTE_PWM_FAULTB_MUX 10 #define RTE_PWM_FAULTB_PAD 0 //no pad -#elif (RTE_PWM_FAULTB_PORT_ID == 2) -#define RTE_PWM_FAULTB_PORT 0 -#define RTE_PWM_FAULTB_PIN 74 -#define RTE_PWM_FAULTB_MUX 8 -#define RTE_PWM_FAULTB_PAD 32 #else #error "Invalid RTE_PWM_FAULTB_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3857,7 +3800,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3893,7 +3836,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3941,7 +3884,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3967,7 +3910,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3987,7 +3930,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4007,9 +3950,9 @@ //<> QEI (Quadrature Encode Interface) -//QEI_DIR <0=>GPIO_28 <1=>GPIO_49 <2=>GPIO_57 <3=>GPIO_67 <4=>GPIO_71 <5=>GPIO_73 <6=>GPIO_11 <7=>GPIO_34 +//QEI_DIR <0=>GPIO_28 <1=>GPIO_49 <2=>GPIO_57 <3=>GPIO_71 <4=>GPIO_73 <5=>GPIO_11 <6=>GPIO_34 -#define RTE_QEI_DIR_PORT_ID 4 +#define RTE_QEI_DIR_PORT_ID 3 #if (RTE_QEI_DIR_PORT_ID == 0) #define RTE_QEI_DIR_PORT 0 @@ -4028,15 +3971,10 @@ #define RTE_QEI_DIR_PAD 21 #elif (RTE_QEI_DIR_PORT_ID == 3) #define RTE_QEI_DIR_PORT 0 -#define RTE_QEI_DIR_PIN 67 -#define RTE_QEI_DIR_MUX 3 -#define RTE_QEI_DIR_PAD 25 -#elif (RTE_QEI_DIR_PORT_ID == 4) -#define RTE_QEI_DIR_PORT 0 #define RTE_QEI_DIR_PIN 71 #define RTE_QEI_DIR_MUX 3 #define RTE_QEI_DIR_PAD 29 -#elif (RTE_QEI_DIR_PORT_ID == 5) +#elif (RTE_QEI_DIR_PORT_ID == 4) #define RTE_QEI_DIR_PORT 0 #define RTE_QEI_DIR_PIN 73 #define RTE_QEI_DIR_MUX 3 @@ -4110,12 +4048,12 @@ #error "Invalid RTE_QEI_PHA_PIN Pin Configuration!" #endif -//QEI_PHB <0=>GPIO_27 <1=>GPIO_48 <1=>GPIO_56 <1=>GPIO_66 <1=>GPIO_70 <1=>GPIO_74 <7=>GPIO_33 +//QEI_PHB <0=>GPIO_27 <1=>GPIO_48 <2=>GPIO_56 <3=>GPIO_66 <4=>GPIO_70 #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define RTE_QEI_PHB_PORT_ID 5 -#else #define RTE_QEI_PHB_PORT_ID 4 +#else +#define RTE_QEI_PHB_PORT_ID 3 #endif #if (RTE_QEI_PHB_PORT_ID == 0) @@ -4143,280 +4081,18 @@ #define RTE_QEI_PHB_PIN 70 #define RTE_QEI_PHB_MUX 3 #define RTE_QEI_PHB_PAD 28 -#elif (RTE_QEI_PHB_PORT_ID == 5) -#define RTE_QEI_PHB_PORT 0 -#define RTE_QEI_PHB_PIN 74 -#define RTE_QEI_PHB_MUX 3 -#define RTE_QEI_PHB_PAD 32 #else #error "Invalid RTE_QEI_PHB_PIN Pin Configuration!" #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4425,7 +4101,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4434,7 +4110,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4443,7 +4119,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4452,7 +4128,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4461,7 +4137,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4470,7 +4146,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4480,7 +4156,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 @@ -4688,18 +4364,9 @@ #error "Invalid RTE_ULP_GPIO_2_PIN Pin Configuration!" #endif -#ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_ULP_GPIO_3_PORT_ID 1 -#else -#define RTE_ULP_GPIO_3_PORT_ID 0 -#endif -#if (RTE_ULP_GPIO_3_PORT_ID == 0) -#define RTE_ULP_GPIO_3_PORT 0 -#define RTE_ULP_GPIO_3_PAD 25 -#define RTE_ULP_GPIO_3_PIN 67 -#define RTE_ULP_GPIO_3_MODE 0 -#elif (RTE_ULP_GPIO_3_PORT_ID == 1) +#if (RTE_ULP_GPIO_3_PORT_ID == 1) #define RTE_ULP_GPIO_3_PORT 4 #define RTE_ULP_GPIO_3_PIN 3 #define RTE_ULP_GPIO_3_MODE 0 @@ -4821,19 +4488,10 @@ #error "Invalid RTE_ULP_GPIO_9_PIN Pin Configuration!" #endif -#ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define RTE_ULP_GPIO_10_PORT_ID 1 -#else #define RTE_ULP_GPIO_10_PORT_ID 0 -#endif #if (RTE_ULP_GPIO_10_PORT_ID == 0) #define RTE_ULP_GPIO_10_PORT 4 -#define RTE_ULP_GPIO_10_PAD 32 -#define RTE_ULP_GPIO_10_PIN 74 -#define RTE_ULP_GPIO_10_MODE 0 -#elif (RTE_ULP_GPIO_10_PORT_ID == 1) -#define RTE_ULP_GPIO_10_PORT 4 #define RTE_ULP_GPIO_10_PIN 10 #define RTE_ULP_GPIO_10_MODE 0 #else @@ -4885,8 +4543,8 @@ // ULP GPIO as enable pin for sensors #define SENSOR_ENABLE_GPIO_MAPPED_TO_ULP -#define SENSOR_ENABLE_GPIO_PORT RTE_ULP_GPIO_3_PORT -#define SENSOR_ENABLE_GPIO_PIN RTE_ULP_GPIO_3_PIN +#define SENSOR_ENABLE_GPIO_PORT RTE_ULP_GPIO_2_PORT +#define SENSOR_ENABLE_GPIO_PIN RTE_ULP_GPIO_2_PIN // Memlcd GPIOs #define RTE_MEMLCD_CS_PIN 4 // Memlcd SPI CS pin diff --git a/components/board/silabs/config/brd4343b/pin_config.h b/components/board/silabs/config/brd4343b/pin_config.h index 2bbc8c59c..60a6a7d20 100644 --- a/components/board/silabs/config/brd4343b/pin_config.h +++ b/components/board/silabs/config/brd4343b/pin_config.h @@ -25,8 +25,8 @@ // $[SSI_SLAVE] // [SSI_SLAVE]$ -// $[ULP_SPI] -// [ULP_SPI]$ +// $[ULP_SSI] +// [ULP_SSI]$ // $[GSPI_MASTER] // [GSPI_MASTER]$ @@ -127,6 +127,15 @@ // $[DAC1] // [DAC1]$ +// $[SYSRTC] +// [SYSRTC]$ + +// $[UULP_VBAT_GPIO] +// [UULP_VBAT_GPIO]$ + +// $[GPIO] +// [GPIO]$ + // $[CUSTOM_PIN_NAME] #ifndef _PORT #define _PORT 0 diff --git a/components/board/silabs/config/brd4343b/sl_iostream_usart_vcom_config.h b/components/board/silabs/config/brd4343b/sl_iostream_usart_vcom_config.h new file mode 100644 index 000000000..97ff2003b --- /dev/null +++ b/components/board/silabs/config/brd4343b/sl_iostream_usart_vcom_config.h @@ -0,0 +1,135 @@ +/***************************************************************************/ /** + * @file + * @brief IOSTREAM_USART Config. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_IOSTREAM_USART_VCOM_CONFIG_H +#define SL_IOSTREAM_USART_VCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// USART settings + +#define ENABLE 1 +#define DISABLE 0 + +// Baud rate <9600-921600> +// Default: 115200 +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + +// Parity +// No Parity +// Even parity +// Odd parity +// Default: SL_USART_NO_PARITY +#define SL_IOSTREAM_USART_VCOM_PARITY SL_USART_NO_PARITY + +// Stop bits +// 0.5 stop bits +// 1 stop bits +// 1.5 stop bits +// 2 stop bits +// Default: SL_USART_STOP_BITS_1 +#define SL_IOSTREAM_USART_VCOM_STOP_BITS SL_USART_STOP_BITS_1 + +#define SL_IOSTREAM_USART_VCOM_MODE SL_USART_MODE_ASYNCHRONOUS + +// Data Width +// 5 data bits +// 6 data bits +// 7 data bits +// 8 data bits +// Default: SL_USART_DATA_BITS_8 +#define SL_IOSTREAM_USART_VCOM_DATA_BITS SL_USART_DATA_BITS_8 + +// Flow control +// None +// CTS +// RTS +// CTS/RTS +// Default: SL_USART_FLOW_CONTROL_NONE +#define SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE SL_USART_FLOW_CONTROL_NONE + +// VCOM enable +// Default: 1 +#define SL_SI91X_VCOM_ENABLE 1 + +#define USART0_MODULE 0 +#define UART1_MODULE 1 +#define ULP_UART_MODULE 2 + +#if SL_SI91X_VCOM_ENABLE +#define SL_USART_MODULE ULP_UART_MODULE +#else +#define SL_USART_MODULE USART0_MODULE +#endif + +// Receive buffer size +// Default: 32 +#define SL_IOSTREAM_USART_VCOM_RX_BUFFER_SIZE 32 + +// Convert \n to \r\n +// It can be changed at runtime using the C API. +// Default: 0 +#define SL_IOSTREAM_USART_VCOM_CONVERT_BY_DEFAULT_LF_TO_CRLF 0 +// + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_IOSTREAM +// $[USART_SL_SI91X_IOSTREAM] +#ifndef SL_SI91X_IOSTREAM_PERIPHERAL +#define SL_SI91X_IOSTREAM_PERIPHERAL ULP_UART +#endif + +// ULP_UART TX on ULP_GPIO_11/GPIO_75 +#ifndef SL_SI91X_IOSTREAM_TX_PORT +#define SL_SI91X_IOSTREAM_TX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_TX_PIN +#define SL_SI91X_IOSTREAM_TX_PIN 11 +#endif +#ifndef SL_SI91X_IOSTREAM_TX_LOC +#define SL_SI91X_IOSTREAM_TX_LOC 1 +#endif + +// ULP_UART RX on ULP_GPIO_9/GPIO_73 +#ifndef SL_SI91X_IOSTREAM_RX_PORT +#define SL_SI91X_IOSTREAM_RX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_RX_PIN +#define SL_SI91X_IOSTREAM_RX_PIN 9 +#endif +#ifndef SL_SI91X_IOSTREAM_RX_LOC +#define SL_SI91X_IOSTREAM_RX_LOC 3 +#endif +// [USART_SL_SI91X_IOSTREAM]$ +// <<< sl:end pin_tool >>> + +#endif \ No newline at end of file diff --git a/components/board/silabs/config/brd4343b/sl_si91x_button_init_btn0_config.h b/components/board/silabs/config/brd4343b/sl_si91x_button_init_btn0_config.h new file mode 100644 index 000000000..f31924c9a --- /dev/null +++ b/components/board/silabs/config/brd4343b/sl_si91x_button_init_btn0_config.h @@ -0,0 +1,42 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn0_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/components/board/silabs/config/brd4343b/sl_si91x_button_init_btn1_config.h b/components/board/silabs/config/brd4343b/sl_si91x_button_init_btn1_config.h new file mode 100644 index 000000000..31838d62e --- /dev/null +++ b/components/board/silabs/config/brd4343b/sl_si91x_button_init_btn1_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn1_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/components/board/silabs/config/brd4343b/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/brd4343b/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..1719bbde9 --- /dev/null +++ b/components/board/silabs/config/brd4343b/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,115 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_I2C2_CONFIG_H +#define SL_SI91X_I2C_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration + +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_I2C_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4343b/sl_si91x_led_init_led0_config.h b/components/board/silabs/config/brd4343b/sl_si91x_led_init_led0_config.h new file mode 100644 index 000000000..28169b6c2 --- /dev/null +++ b/components/board/silabs/config/brd4343b/sl_si91x_led_init_led0_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 0 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/components/board/silabs/config/brd4343b/sl_si91x_led_init_led1_config.h b/components/board/silabs/config/brd4343b/sl_si91x_led_init_led1_config.h new file mode 100644 index 000000000..14093b027 --- /dev/null +++ b/components/board/silabs/config/brd4343b/sl_si91x_led_init_led1_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H diff --git a/components/board/silabs/config/brd4343b/sl_si91x_memlcd_config.h b/components/board/silabs/config/brd4343b/sl_si91x_memlcd_config.h new file mode 100644 index 000000000..de10c3340 --- /dev/null +++ b/components/board/silabs/config/brd4343b/sl_si91x_memlcd_config.h @@ -0,0 +1,109 @@ +/***************************************************************************/ /** +* @file sl_si91x_memlcd_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_MEMLCD_CONFIG_H +#define SL_SI91X_MEMLCD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +// <<< sl:start pin_tool >>> +// SL_MEMLCD +// $[SSI_SL_MEMLCD] +#ifndef SL_MEMLCD_PERIPHERAL +#define SL_MEMLCD_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_MEMLCD_MOSI__PORT +#define SL_MEMLCD_MOSI__PORT ULP +#endif +#ifndef SL_MEMLCD_MOSI__PIN +#define SL_MEMLCD_MOSI__PIN 1 +#endif +#ifndef SL_MEMLCD_MOSI_LOC +#define SL_MEMLCD_MOSI_LOC 0 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_MEMLCD_SCK__PORT +#define SL_MEMLCD_SCK__PORT ULP +#endif +#ifndef SL_MEMLCD_SCK__PIN +#define SL_MEMLCD_SCK__PIN 8 +#endif +#ifndef SL_MEMLCD_SCK_LOC +#define SL_MEMLCD_SCK_LOC 7 +#endif + +// ULP_SSI CS1_ on ULP_GPIO_4/GPIO_68 +#ifndef SL_MEMLCD_CS1__PORT +#define SL_MEMLCD_CS1__PORT ULP +#endif +#ifndef SL_MEMLCD_CS1__PIN +#define SL_MEMLCD_CS1__PIN 4 +#endif +#ifndef SL_MEMLCD_CS1_LOC +#define SL_MEMLCD_CS1_LOC 10 +#endif +// [SSI_SL_MEMLCD]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_ENABLE +// $[GPIO_SL_MEMLCD_DISP_ENABLE] +#ifndef SL_MEMLCD_DISP_ENABLE_PORT +#define SL_MEMLCD_DISP_ENABLE_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_ENABLE_PIN +#define SL_MEMLCD_DISP_ENABLE_PIN 0 +#endif +// [GPIO_SL_MEMLCD_DISP_ENABLE]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_EXT_COMIN +// $[GPIO_SL_MEMLCD_DISP_EXT_COMIN] +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PORT +#define SL_MEMLCD_DISP_EXT_COMIN_PORT ULP +#endif +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PIN +#define SL_MEMLCD_DISP_EXT_COMIN_PIN 5 +#endif +// [GPIO_SL_MEMLCD_DISP_EXT_COMIN]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_MEMLCD_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4343q/RTE_Device_917.h b/components/board/silabs/config/brd4343q/RTE_Device_917.h index 4023f0e17..9fe616f73 100644 --- a/components/board/silabs/config/brd4343q/RTE_Device_917.h +++ b/components/board/silabs/config/brd4343q/RTE_Device_917.h @@ -20,7 +20,7 @@ * $Date: 1. December 2016 * $Revision: V2.4.4 * - * Project: RTE Device Configuration for Si91x 2.0 B0 BRD4343Q + * Project: RTE Device Configuration for Si917 ACx Module BRD4343Q * -------------------------------------------------------------------------- */ //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- @@ -109,7 +109,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -167,7 +167,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -235,7 +235,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -294,7 +294,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -343,7 +343,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -395,7 +395,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -447,7 +447,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -491,7 +491,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -530,7 +530,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -549,7 +549,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -566,7 +566,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -595,7 +595,7 @@ #define RTE_UART1_CHNL_UDMA_RX_CH 26 /*UART1 PINS*/ -// UART1_TX <0=>P0_7 <1=>P0_30 <2=>P0_67 <3=>P0_69 <4=>P0_73 <5=>P0_75 <6=>P0_34 +// UART1_TX <0=>P0_7 <1=>P0_30 <2=>P0_69 <3=>P0_73 <4=>P0_75 <5=>P0_34 // TX of UART1 #ifndef UART1_TX_LOC #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER @@ -620,15 +620,10 @@ #define RTE_UART1_TX_PAD 0 //no pad #elif (RTE_UART1_TX_PORT_ID == 2) #define RTE_UART1_TX_PORT 0 -#define RTE_UART1_TX_PIN 67 -#define RTE_UART1_TX_MUX 9 -#define RTE_UART1_TX_PAD 25 -#elif (RTE_UART1_TX_PORT_ID == 3) -#define RTE_UART1_TX_PORT 0 #define RTE_UART1_TX_PIN 73 #define RTE_UART1_TX_MUX 6 #define RTE_UART1_TX_PAD 31 -#elif (RTE_UART1_TX_PORT_ID == 4) +#elif (RTE_UART1_TX_PORT_ID == 3) #define RTE_UART1_TX_PORT 0 #define RTE_UART1_TX_PIN 75 #define RTE_UART1_TX_MUX 9 @@ -638,7 +633,7 @@ #endif #else //Pintool data -#define RTE_UART1_TX_PORT UART1_TX_PORT +#define RTE_UART1_TX_PORT 0 #if (UART1_TX_LOC == 0) #define RTE_UART1_TX_PIN UART1_TX_PIN #define RTE_UART1_TX_MUX 6 @@ -667,7 +662,7 @@ //Pintool data #endif -// UART1_RX <0=>P0_6 <1=>P0_29 <2=>P0_66 <3=>P0_68 <4=>P0_72 <5=>P0_74 <6=>P0_33 +// UART1_RX <0=>P0_6 <1=>P0_29 <2=>P0_66 <3=>P0_72 // RX of UART1 #ifndef UART1_RX_LOC #define RTE_UART1_RX_PORT_ID 0 @@ -692,17 +687,12 @@ #define RTE_UART1_RX_PIN 72 #define RTE_UART1_RX_MUX 6 #define RTE_UART1_RX_PAD 30 -#elif (RTE_UART1_RX_PORT_ID == 4) -#define RTE_UART1_RX_PORT 0 -#define RTE_UART1_RX_PIN 74 -#define RTE_UART1_RX_MUX 9 -#define RTE_UART1_RX_PAD 32 #else #error "Invalid UART1 RTE_UART1_RX_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -766,7 +756,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -839,7 +829,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -914,7 +904,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -941,7 +931,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -964,7 +954,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -981,7 +971,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1024,7 +1014,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA1_LOC == 3) @@ -1067,7 +1057,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1110,7 +1100,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1158,7 +1148,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1183,7 +1173,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1211,7 +1201,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1233,7 +1223,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1295,7 +1285,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1353,7 +1343,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1407,7 +1397,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1427,7 +1417,7 @@ // SSI_SLAVE_CS Pin <0=>Not Used <1=>GPIO_9 <2=>GPIO_25 <3=>GPIO_46 <4=>GPIO_53 #ifndef SSI_SLAVE_CS0_LOC -#define RTE_SSI_SLAVE_CS_PORT_ID 1 +#define RTE_SSI_SLAVE_CS_PORT_ID 2 #if (RTE_SSI_SLAVE_CS_PORT_ID == 0) #define RTE_SSI_SLAVE_CS 0 @@ -1461,7 +1451,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1500,12 +1490,12 @@ #define RTE_SSI_ULP_MASTER 1 // Enable multiple CSN lines -#define ULP_SSI_CS0 1 -#define ULP_SSI_CS1 0 +#define ULP_SSI_CS0 0 +#define ULP_SSI_CS1 1 #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1523,14 +1513,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1548,14 +1538,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1579,14 +1569,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1604,30 +1594,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT -#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 +#define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SSI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1718,7 +1708,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1766,7 +1756,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1814,7 +1804,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1862,7 +1852,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1914,7 +1904,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1962,7 +1952,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2058,7 +2048,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2080,7 +2070,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2102,7 +2092,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2128,7 +2118,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2222,7 +2212,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2244,13 +2234,9 @@ //Pintool data #endif -// I2C0_SCL Pin <0=>P0_6 <1=>P0_64 <2=>P0_67 <3=>P0_74 <4=>P0_31 +// I2C0_SCL Pin <0=>P0_6 #ifndef I2C0_SDA_LOC -#ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define RTE_I2C0_SDA_PORT_ID 2 -#else #define RTE_I2C0_SDA_PORT_ID 0 -#endif #if (RTE_I2C0_SDA_PORT_ID == 0) #define RTE_I2C0_SDA_PORT 0 @@ -2258,24 +2244,12 @@ #define RTE_I2C0_SDA_MUX 4 #define RTE_I2C0_SDA_PAD 1 #define RTE_I2C0_SDA_I2C_REN 6 -#elif (RTE_I2C0_SDA_PORT_ID == 1) -#define RTE_I2C0_SDA_PORT 0 -#define RTE_I2C0_SDA_PIN 67 -#define RTE_I2C0_SDA_MUX 4 -#define RTE_I2C0_SDA_PAD 25 -#define RTE_I2C0_SDA_I2C_REN 3 -#elif (RTE_I2C0_SDA_PORT_ID == 2) -#define RTE_I2C0_SDA_PORT 0 -#define RTE_I2C0_SDA_PIN 74 -#define RTE_I2C0_SDA_MUX 4 -#define RTE_I2C0_SDA_PAD 32 -#define RTE_I2C0_SDA_I2C_REN 10 #else #error "Invalid I2C0 RTE_I2C0_SDA Pin Configuration!" #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2357,7 +2331,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2397,7 +2371,7 @@ //Pintool data #endif -// I2C1_SCL Pin <0=>P0_7 <1=>P0_30 <2=>P0_51 <3=>P0_55 <4=>P0_65 <4=>P0_67 <4=>P0_71 <7=>P0_34 +// I2C1_SCL Pin <0=>P0_7 <1=>P0_30 <2=>P0_51 <3=>P0_55 <4=>P0_65 <5=>P0_71 <6=>P0_34 #ifndef I2C1_SDA_LOC #define RTE_I2C1_SDA_PORT_ID 2 @@ -2433,12 +2407,6 @@ #define RTE_I2C1_SDA_REN 1 #elif (RTE_I2C1_SDA_PORT_ID == 5) #define RTE_I2C1_SDA_PORT 0 -#define RTE_I2C1_SDA_PIN 67 -#define RTE_I2C1_SDA_MUX 5 -#define RTE_I2C1_SDA_PAD 25 -#define RTE_I2C1_SDA_REN 3 -#elif (RTE_I2C1_SDA_PORT_ID == 6) -#define RTE_I2C1_SDA_PORT 0 #define RTE_I2C1_SDA_PIN 71 #define RTE_I2C1_SDA_MUX 5 #define RTE_I2C1_SDA_PAD 29 @@ -2448,7 +2416,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2526,7 +2494,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2564,8 +2532,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2626,7 +2594,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2681,7 +2649,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2735,7 +2703,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2789,7 +2757,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2842,7 +2810,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2897,7 +2865,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -2962,7 +2930,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_0_PORT SCT_IN0_PORT +#define RTE_SCT_IN_0_PORT 0 #if (SCT_IN0_LOC == 0) #define RTE_SCT_IN_0_PIN SCT_IN0_PIN #define RTE_SCT_IN_0_MUX 9 @@ -2998,7 +2966,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_1_PORT SCT_IN1_PORT +#define RTE_SCT_IN_1_PORT 0 #if (SCT_IN1_LOC == 3) #define RTE_SCT_IN_1_PIN SCT_IN1_PIN #define RTE_SCT_IN_1_MUX 9 @@ -3045,7 +3013,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_2_PORT SCT_IN2_PORT +#define RTE_SCT_IN_2_PORT 0 #if (SCT_IN2_LOC == 6) #define RTE_SCT_IN_2_PIN SCT_IN2_PIN #define RTE_SCT_IN_2_MUX 9 @@ -3059,7 +3027,7 @@ //Pintool data #endif -//SCT_IN_3 <0=>GPIO_28 <1=>GPIO_67 <2=>GPIO_71 +//SCT_IN_3 <0=>GPIO_28 <1=>GPIO_71 #ifndef SCT_IN3_LOC #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SCT_IN_3_PORT_ID 0 @@ -3074,11 +3042,6 @@ #define RTE_SCT_IN_3_PAD 0 //no pad #elif (RTE_SCT_IN_3_PORT_ID == 1) #define RTE_SCT_IN_3_PORT 0 -#define RTE_SCT_IN_3_PIN 67 -#define RTE_SCT_IN_3_MUX 7 -#define RTE_SCT_IN_3_PAD 25 -#elif (RTE_SCT_IN_3_PORT_ID == 2) -#define RTE_SCT_IN_3_PORT 0 #define RTE_SCT_IN_3_PIN 71 #define RTE_SCT_IN_3_MUX 9 #define RTE_SCT_IN_3_PAD 29 @@ -3087,7 +3050,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3114,7 +3077,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3140,7 +3103,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3154,42 +3117,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3296,7 +3259,7 @@ //Pintool data #endif -// SIO_2 <0=>GPIO_8 <1=>GPIO_27 <2=>GPIO_66 <3=>GPIO_74 +// SIO_2 <0=>GPIO_8 <1=>GPIO_27 <2=>GPIO_66 #ifndef SIO_2_LOC #define RTE_SIO_2_PORT_ID 1 @@ -3315,11 +3278,6 @@ #define RTE_SIO_2_PIN 66 #define RTE_SIO_2_MUX 1 #define RTE_SIO_2_PAD 24 -#elif (RTE_SIO_2_PORT_ID == 3) -#define RTE_SIO_2_PORT 0 -#define RTE_SIO_2_PIN 74 -#define RTE_SIO_2_MUX 1 -#define RTE_SIO_2_PAD 32 #else #error "Invalid RTE_SIO_2_PIN Pin Configuration!" #endif @@ -3342,7 +3300,7 @@ //Pintool data #endif -//SIO_3 <0=>GPIO_9 <1=>GPIO_28 <2=>GPIO_67 <3=>GPIO_75 +//SIO_3 <0=>GPIO_9 <1=>GPIO_28 <2=>GPIO_75 #ifndef SIO_3_LOC #define RTE_SIO_3_PORT_ID 1 @@ -3358,11 +3316,6 @@ #define RTE_SIO_3_PAD 0 //no pad #elif (RTE_SIO_3_PORT_ID == 2) #define RTE_SIO_3_PORT 0 -#define RTE_SIO_3_PIN 67 -#define RTE_SIO_3_MUX 1 -#define RTE_SIO_3_PAD 25 -#elif (RTE_SIO_3_PORT_ID == 3) -#define RTE_SIO_3_PORT 0 #define RTE_SIO_3_PIN 75 #define RTE_SIO_3_MUX 1 #define RTE_SIO_3_PAD 33 @@ -3533,7 +3486,7 @@ #endif #else //Pintool data -#define RTE_PWM_1H_PORT PWM_1H_PORT +#define RTE_PWM_1H_PORT 0 #if (PWM_1H_LOC == 0) #define RTE_PWM_1H_PIN PWM_1H_PIN #define RTE_PWM_1H_MUX 10 @@ -3565,7 +3518,7 @@ #endif #else //Pintool data -#define RTE_PWM_1L_PORT PWM_1L_PORT +#define RTE_PWM_1L_PORT 0 #if (PWM_1L_LOC == 2) #define RTE_PWM_1L_PIN PWM_1L_PIN #define RTE_PWM_1L_MUX 10 @@ -3578,7 +3531,7 @@ //Pintool data #endif -//PWM_2H <0=>GPIO_9 <1=>GPIO_67 <2=>GPIO_69 +//PWM_2H <0=>GPIO_9 #ifndef PWM_2H_LOC #define RTE_PWM_2H_PORT_ID 0 #if ((RTE_PWM_2H_PORT_ID == 2)) @@ -3590,17 +3543,12 @@ #define RTE_PWM_2H_PIN 9 #define RTE_PWM_2H_MUX 10 #define RTE_PWM_2H_PAD 4 -#elif (RTE_PWM_2H_PORT_ID == 1) -#define RTE_PWM_2H_PORT 0 -#define RTE_PWM_2H_PIN 67 -#define RTE_PWM_2H_MUX 8 -#define RTE_PWM_2H_PAD 25 #else #error "Invalid RTE_PWM_2H_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3636,7 +3584,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3668,7 +3616,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3695,7 +3643,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3731,7 +3679,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3761,7 +3709,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3794,7 +3742,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3813,7 +3761,7 @@ //Pintool data #endif -// PWM_FAULTB <0=>GPIO_26 <1=>GPIO_69 <1=>GPIO_74 +// PWM_FAULTB <0=>GPIO_26 #ifndef PWM_FAULTB_LOC #define RTE_PWM_FAULTB_PORT_ID 0 @@ -3822,17 +3770,12 @@ #define RTE_PWM_FAULTB_PIN 26 #define RTE_PWM_FAULTB_MUX 10 #define RTE_PWM_FAULTB_PAD 0 //no pad -#elif (RTE_PWM_FAULTB_PORT_ID == 2) -#define RTE_PWM_FAULTB_PORT 0 -#define RTE_PWM_FAULTB_PIN 74 -#define RTE_PWM_FAULTB_MUX 8 -#define RTE_PWM_FAULTB_PAD 32 #else #error "Invalid RTE_PWM_FAULTB_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3857,7 +3800,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3893,7 +3836,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3941,7 +3884,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3967,7 +3910,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3987,7 +3930,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4007,9 +3950,9 @@ //<> QEI (Quadrature Encode Interface) -//QEI_DIR <0=>GPIO_28 <1=>GPIO_49 <2=>GPIO_57 <3=>GPIO_67 <4=>GPIO_71 <5=>GPIO_73 <6=>GPIO_11 <7=>GPIO_34 +//QEI_DIR <0=>GPIO_28 <1=>GPIO_49 <2=>GPIO_57 <3=>GPIO_71 <4=>GPIO_73 <5=>GPIO_11 <6=>GPIO_34 -#define RTE_QEI_DIR_PORT_ID 4 +#define RTE_QEI_DIR_PORT_ID 3 #if (RTE_QEI_DIR_PORT_ID == 0) #define RTE_QEI_DIR_PORT 0 @@ -4028,15 +3971,10 @@ #define RTE_QEI_DIR_PAD 21 #elif (RTE_QEI_DIR_PORT_ID == 3) #define RTE_QEI_DIR_PORT 0 -#define RTE_QEI_DIR_PIN 67 -#define RTE_QEI_DIR_MUX 3 -#define RTE_QEI_DIR_PAD 25 -#elif (RTE_QEI_DIR_PORT_ID == 4) -#define RTE_QEI_DIR_PORT 0 #define RTE_QEI_DIR_PIN 71 #define RTE_QEI_DIR_MUX 3 #define RTE_QEI_DIR_PAD 29 -#elif (RTE_QEI_DIR_PORT_ID == 5) +#elif (RTE_QEI_DIR_PORT_ID == 4) #define RTE_QEI_DIR_PORT 0 #define RTE_QEI_DIR_PIN 73 #define RTE_QEI_DIR_MUX 3 @@ -4110,12 +4048,12 @@ #error "Invalid RTE_QEI_PHA_PIN Pin Configuration!" #endif -//QEI_PHB <0=>GPIO_27 <1=>GPIO_48 <1=>GPIO_56 <1=>GPIO_66 <1=>GPIO_70 <1=>GPIO_74 <7=>GPIO_33 +//QEI_PHB <0=>GPIO_27 <1=>GPIO_48 <2=>GPIO_56 <3=>GPIO_66 <4=>GPIO_70 #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define RTE_QEI_PHB_PORT_ID 5 -#else #define RTE_QEI_PHB_PORT_ID 4 +#else +#define RTE_QEI_PHB_PORT_ID 3 #endif #if (RTE_QEI_PHB_PORT_ID == 0) @@ -4143,280 +4081,18 @@ #define RTE_QEI_PHB_PIN 70 #define RTE_QEI_PHB_MUX 3 #define RTE_QEI_PHB_PAD 28 -#elif (RTE_QEI_PHB_PORT_ID == 5) -#define RTE_QEI_PHB_PORT 0 -#define RTE_QEI_PHB_PIN 74 -#define RTE_QEI_PHB_MUX 3 -#define RTE_QEI_PHB_PAD 32 #else #error "Invalid RTE_QEI_PHB_PIN Pin Configuration!" #endif #endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN -#endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 -#else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN -#endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 - -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN -#endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4425,7 +4101,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4434,7 +4110,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4443,7 +4119,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4452,7 +4128,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4461,7 +4137,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4470,7 +4146,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4480,7 +4156,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 @@ -4688,18 +4364,9 @@ #error "Invalid RTE_ULP_GPIO_2_PIN Pin Configuration!" #endif -#ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_ULP_GPIO_3_PORT_ID 1 -#else -#define RTE_ULP_GPIO_3_PORT_ID 0 -#endif -#if (RTE_ULP_GPIO_3_PORT_ID == 0) -#define RTE_ULP_GPIO_3_PORT 0 -#define RTE_ULP_GPIO_3_PAD 25 -#define RTE_ULP_GPIO_3_PIN 67 -#define RTE_ULP_GPIO_3_MODE 0 -#elif (RTE_ULP_GPIO_3_PORT_ID == 1) +#if (RTE_ULP_GPIO_3_PORT_ID == 1) #define RTE_ULP_GPIO_3_PORT 4 #define RTE_ULP_GPIO_3_PIN 3 #define RTE_ULP_GPIO_3_MODE 0 @@ -4821,19 +4488,10 @@ #error "Invalid RTE_ULP_GPIO_9_PIN Pin Configuration!" #endif -#ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define RTE_ULP_GPIO_10_PORT_ID 1 -#else #define RTE_ULP_GPIO_10_PORT_ID 0 -#endif #if (RTE_ULP_GPIO_10_PORT_ID == 0) #define RTE_ULP_GPIO_10_PORT 4 -#define RTE_ULP_GPIO_10_PAD 32 -#define RTE_ULP_GPIO_10_PIN 74 -#define RTE_ULP_GPIO_10_MODE 0 -#elif (RTE_ULP_GPIO_10_PORT_ID == 1) -#define RTE_ULP_GPIO_10_PORT 4 #define RTE_ULP_GPIO_10_PIN 10 #define RTE_ULP_GPIO_10_MODE 0 #else @@ -4885,8 +4543,8 @@ // ULP GPIO as enable pin for sensors #define SENSOR_ENABLE_GPIO_MAPPED_TO_ULP -#define SENSOR_ENABLE_GPIO_PORT RTE_ULP_GPIO_3_PORT -#define SENSOR_ENABLE_GPIO_PIN RTE_ULP_GPIO_3_PIN +#define SENSOR_ENABLE_GPIO_PORT RTE_ULP_GPIO_2_PORT +#define SENSOR_ENABLE_GPIO_PIN RTE_ULP_GPIO_2_PIN // Memlcd GPIOs #define RTE_MEMLCD_CS_PIN 4 // Memlcd SPI CS pin diff --git a/components/board/silabs/config/brd4343q/pin_config.h b/components/board/silabs/config/brd4343q/pin_config.h index 2bbc8c59c..60a6a7d20 100644 --- a/components/board/silabs/config/brd4343q/pin_config.h +++ b/components/board/silabs/config/brd4343q/pin_config.h @@ -25,8 +25,8 @@ // $[SSI_SLAVE] // [SSI_SLAVE]$ -// $[ULP_SPI] -// [ULP_SPI]$ +// $[ULP_SSI] +// [ULP_SSI]$ // $[GSPI_MASTER] // [GSPI_MASTER]$ @@ -127,6 +127,15 @@ // $[DAC1] // [DAC1]$ +// $[SYSRTC] +// [SYSRTC]$ + +// $[UULP_VBAT_GPIO] +// [UULP_VBAT_GPIO]$ + +// $[GPIO] +// [GPIO]$ + // $[CUSTOM_PIN_NAME] #ifndef _PORT #define _PORT 0 diff --git a/components/board/silabs/config/brd4343q/sl_iostream_usart_vcom_config.h b/components/board/silabs/config/brd4343q/sl_iostream_usart_vcom_config.h new file mode 100644 index 000000000..97ff2003b --- /dev/null +++ b/components/board/silabs/config/brd4343q/sl_iostream_usart_vcom_config.h @@ -0,0 +1,135 @@ +/***************************************************************************/ /** + * @file + * @brief IOSTREAM_USART Config. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_IOSTREAM_USART_VCOM_CONFIG_H +#define SL_IOSTREAM_USART_VCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// USART settings + +#define ENABLE 1 +#define DISABLE 0 + +// Baud rate <9600-921600> +// Default: 115200 +#define SL_IOSTREAM_USART_VCOM_BAUDRATE 115200 + +// Parity +// No Parity +// Even parity +// Odd parity +// Default: SL_USART_NO_PARITY +#define SL_IOSTREAM_USART_VCOM_PARITY SL_USART_NO_PARITY + +// Stop bits +// 0.5 stop bits +// 1 stop bits +// 1.5 stop bits +// 2 stop bits +// Default: SL_USART_STOP_BITS_1 +#define SL_IOSTREAM_USART_VCOM_STOP_BITS SL_USART_STOP_BITS_1 + +#define SL_IOSTREAM_USART_VCOM_MODE SL_USART_MODE_ASYNCHRONOUS + +// Data Width +// 5 data bits +// 6 data bits +// 7 data bits +// 8 data bits +// Default: SL_USART_DATA_BITS_8 +#define SL_IOSTREAM_USART_VCOM_DATA_BITS SL_USART_DATA_BITS_8 + +// Flow control +// None +// CTS +// RTS +// CTS/RTS +// Default: SL_USART_FLOW_CONTROL_NONE +#define SL_IOSTREAM_USART_VCOM_FLOW_CONTROL_TYPE SL_USART_FLOW_CONTROL_NONE + +// VCOM enable +// Default: 1 +#define SL_SI91X_VCOM_ENABLE 1 + +#define USART0_MODULE 0 +#define UART1_MODULE 1 +#define ULP_UART_MODULE 2 + +#if SL_SI91X_VCOM_ENABLE +#define SL_USART_MODULE ULP_UART_MODULE +#else +#define SL_USART_MODULE USART0_MODULE +#endif + +// Receive buffer size +// Default: 32 +#define SL_IOSTREAM_USART_VCOM_RX_BUFFER_SIZE 32 + +// Convert \n to \r\n +// It can be changed at runtime using the C API. +// Default: 0 +#define SL_IOSTREAM_USART_VCOM_CONVERT_BY_DEFAULT_LF_TO_CRLF 0 +// + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_IOSTREAM +// $[USART_SL_SI91X_IOSTREAM] +#ifndef SL_SI91X_IOSTREAM_PERIPHERAL +#define SL_SI91X_IOSTREAM_PERIPHERAL ULP_UART +#endif + +// ULP_UART TX on ULP_GPIO_11/GPIO_75 +#ifndef SL_SI91X_IOSTREAM_TX_PORT +#define SL_SI91X_IOSTREAM_TX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_TX_PIN +#define SL_SI91X_IOSTREAM_TX_PIN 11 +#endif +#ifndef SL_SI91X_IOSTREAM_TX_LOC +#define SL_SI91X_IOSTREAM_TX_LOC 1 +#endif + +// ULP_UART RX on ULP_GPIO_9/GPIO_73 +#ifndef SL_SI91X_IOSTREAM_RX_PORT +#define SL_SI91X_IOSTREAM_RX_PORT ULP +#endif +#ifndef SL_SI91X_IOSTREAM_RX_PIN +#define SL_SI91X_IOSTREAM_RX_PIN 9 +#endif +#ifndef SL_SI91X_IOSTREAM_RX_LOC +#define SL_SI91X_IOSTREAM_RX_LOC 3 +#endif +// [USART_SL_SI91X_IOSTREAM]$ +// <<< sl:end pin_tool >>> + +#endif \ No newline at end of file diff --git a/components/board/silabs/config/brd4343q/sl_si91x_button_init_btn0_config.h b/components/board/silabs/config/brd4343q/sl_si91x_button_init_btn0_config.h new file mode 100644 index 000000000..f31924c9a --- /dev/null +++ b/components/board/silabs/config/brd4343q/sl_si91x_button_init_btn0_config.h @@ -0,0 +1,42 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn0_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // SL_SI91X_BUTTON_INIT_BTN0_CONFIG_H diff --git a/components/board/silabs/config/brd4343q/sl_si91x_button_init_btn1_config.h b/components/board/silabs/config/brd4343q/sl_si91x_button_init_btn1_config.h new file mode 100644 index 000000000..31838d62e --- /dev/null +++ b/components/board/silabs/config/brd4343q/sl_si91x_button_init_btn1_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_btn1_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H +#define SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_INSTANCE_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_1 +// $[GPIO_SL_SI91X_BUTTON_1] +#ifndef SL_SI91X_BUTTON_1_PORT +#define SL_SI91X_BUTTON_1_PORT HP +#endif +#ifndef SL_SI91X_BUTTON_1_PIN +#define SL_SI91X_BUTTON_1_PIN 11 +#endif +// [GPIO_SL_SI91X_BUTTON_1]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN1_PIN SL_SI91X_BUTTON_1_PIN +#define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT +#define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER +#define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD + +#endif // SL_SI91X_BUTTON_INIT_BTN1_CONFIG_H diff --git a/components/board/silabs/config/brd4343q/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/brd4343q/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..1719bbde9 --- /dev/null +++ b/components/board/silabs/config/brd4343q/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,115 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_I2C2_CONFIG_H +#define SL_SI91X_I2C_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration + +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_I2C_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/brd4343q/sl_si91x_led_init_led0_config.h b/components/board/silabs/config/brd4343q/sl_si91x_led_init_led0_config.h new file mode 100644 index 000000000..28169b6c2 --- /dev/null +++ b/components/board/silabs/config/brd4343q/sl_si91x_led_init_led0_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led0_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED0_CONFIG_H +#define SL_SI91X_LED_INIT_LED0_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 0 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER + +#endif // SL_SI91X_LED_INIT_LED0_CONFIG_H diff --git a/components/board/silabs/config/brd4343q/sl_si91x_led_init_led1_config.h b/components/board/silabs/config/brd4343q/sl_si91x_led_init_led1_config.h new file mode 100644 index 000000000..14093b027 --- /dev/null +++ b/components/board/silabs/config/brd4343q/sl_si91x_led_init_led1_config.h @@ -0,0 +1,28 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_led1_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_LED1_CONFIG_H +#define SL_SI91X_LED_INIT_LED1_CONFIG_H + +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT HP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 10 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER + +#endif // SL_SI91X_LED_INIT_LED1_CONFIG_H diff --git a/components/board/silabs/config/brd4343q/sl_si91x_memlcd_config.h b/components/board/silabs/config/brd4343q/sl_si91x_memlcd_config.h new file mode 100644 index 000000000..de10c3340 --- /dev/null +++ b/components/board/silabs/config/brd4343q/sl_si91x_memlcd_config.h @@ -0,0 +1,109 @@ +/***************************************************************************/ /** +* @file sl_si91x_memlcd_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_MEMLCD_CONFIG_H +#define SL_SI91X_MEMLCD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +// <<< sl:start pin_tool >>> +// SL_MEMLCD +// $[SSI_SL_MEMLCD] +#ifndef SL_MEMLCD_PERIPHERAL +#define SL_MEMLCD_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_MEMLCD_MOSI__PORT +#define SL_MEMLCD_MOSI__PORT ULP +#endif +#ifndef SL_MEMLCD_MOSI__PIN +#define SL_MEMLCD_MOSI__PIN 1 +#endif +#ifndef SL_MEMLCD_MOSI_LOC +#define SL_MEMLCD_MOSI_LOC 0 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_MEMLCD_SCK__PORT +#define SL_MEMLCD_SCK__PORT ULP +#endif +#ifndef SL_MEMLCD_SCK__PIN +#define SL_MEMLCD_SCK__PIN 8 +#endif +#ifndef SL_MEMLCD_SCK_LOC +#define SL_MEMLCD_SCK_LOC 7 +#endif + +// ULP_SSI CS1_ on ULP_GPIO_4/GPIO_68 +#ifndef SL_MEMLCD_CS1__PORT +#define SL_MEMLCD_CS1__PORT ULP +#endif +#ifndef SL_MEMLCD_CS1__PIN +#define SL_MEMLCD_CS1__PIN 4 +#endif +#ifndef SL_MEMLCD_CS1_LOC +#define SL_MEMLCD_CS1_LOC 10 +#endif +// [SSI_SL_MEMLCD]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_ENABLE +// $[GPIO_SL_MEMLCD_DISP_ENABLE] +#ifndef SL_MEMLCD_DISP_ENABLE_PORT +#define SL_MEMLCD_DISP_ENABLE_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_ENABLE_PIN +#define SL_MEMLCD_DISP_ENABLE_PIN 0 +#endif +// [GPIO_SL_MEMLCD_DISP_ENABLE]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_EXT_COMIN +// $[GPIO_SL_MEMLCD_DISP_EXT_COMIN] +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PORT +#define SL_MEMLCD_DISP_EXT_COMIN_PORT ULP +#endif +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PIN +#define SL_MEMLCD_DISP_EXT_COMIN_PIN 5 +#endif +// [GPIO_SL_MEMLCD_DISP_EXT_COMIN]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif + +#endif // SL_SI91X_MEMLCD_CONFIG_H \ No newline at end of file diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_10_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_10_config.h index 9c5c6e87d..b7f4a54d6 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_10_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_10_config.h @@ -59,27 +59,27 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH10 +// SL_ADC_CH10 // $[ADC_CH10_SL_ADC_CH10] #ifndef SL_ADC_CH10_PERIPHERAL #define SL_ADC_CH10_PERIPHERAL ADC_CH10 #endif -// ADC_CH10 P10 on ULP_GPIO_9/GPIO_73 -#ifndef SL_ADC_CH10_P10_PORT -#define SL_ADC_CH10_P10_PORT 0 +// ADC_CH10 P on ULP_GPIO_9/GPIO_73 +#ifndef SL_ADC_CH10_P_PORT +#define SL_ADC_CH10_P_PORT ULP #endif -#ifndef SL_ADC_CH10_P10_PIN -#define SL_ADC_CH10_P10_PIN 9 +#ifndef SL_ADC_CH10_P_PIN +#define SL_ADC_CH10_P_PIN 9 #endif -#ifndef SL_ADC_CH10_P10_LOC -#define SL_ADC_CH10_P10_LOC 438 +#ifndef SL_ADC_CH10_P_LOC +#define SL_ADC_CH10_P_LOC 438 #endif // [ADC_CH10_SL_ADC_CH10]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH10_P10_LOC -#define SL_ADC_CHANNEL_10_POS_INPUT_CHNL_SEL (SL_ADC_CH10_P10_LOC - P10_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH10_P_LOC +#define SL_ADC_CHANNEL_10_POS_INPUT_CHNL_SEL (SL_ADC_CH10_P_LOC - P10_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_10_POS_INPUT_CHNL_SEL 14 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_11_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_11_config.h index 64a062c89..1e782a930 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_11_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_11_config.h @@ -59,27 +59,27 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH11 +// SL_ADC_CH11 // $[ADC_CH11_SL_ADC_CH11] #ifndef SL_ADC_CH11_PERIPHERAL #define SL_ADC_CH11_PERIPHERAL ADC_CH11 #endif -// ADC_CH11 P11 on ULP_GPIO_1/GPIO_65 -#ifndef SL_ADC_CH11_P11_PORT -#define SL_ADC_CH11_P11_PORT 0 +// ADC_CH11 P on ULP_GPIO_1/GPIO_65 +#ifndef SL_ADC_CH11_P_PORT +#define SL_ADC_CH11_P_PORT ULP #endif -#ifndef SL_ADC_CH11_P11_PIN -#define SL_ADC_CH11_P11_PIN 1 +#ifndef SL_ADC_CH11_P_PIN +#define SL_ADC_CH11_P_PIN 1 #endif -#ifndef SL_ADC_CH11_P11_LOC -#define SL_ADC_CH11_P11_LOC 181 +#ifndef SL_ADC_CH11_P_LOC +#define SL_ADC_CH11_P_LOC 181 #endif // [ADC_CH11_SL_ADC_CH11]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH11_P11_LOC -#define SL_ADC_CHANNEL_11_POS_INPUT_CHNL_SEL (SL_ADC_CH11_P11_LOC - P11_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH11_P_LOC +#define SL_ADC_CHANNEL_11_POS_INPUT_CHNL_SEL (SL_ADC_CH11_P_LOC - P11_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_11_POS_INPUT_CHNL_SEL 10 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_12_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_12_config.h index cb6725ac4..591960ea0 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_12_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_12_config.h @@ -59,27 +59,27 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH12 +// SL_ADC_CH12 // $[ADC_CH12_SL_ADC_CH12] #ifndef SL_ADC_CH12_PERIPHERAL #define SL_ADC_CH12_PERIPHERAL ADC_CH12 #endif -// ADC_CH12 P12 on ULP_GPIO_1/GPIO_65 -#ifndef SL_ADC_CH12_P12_PORT -#define SL_ADC_CH12_P12_PORT 0 +// ADC_CH12 P on ULP_GPIO_1/GPIO_65 +#ifndef SL_ADC_CH12_P_PORT +#define SL_ADC_CH12_P_PORT ULP #endif -#ifndef SL_ADC_CH12_P12_PIN -#define SL_ADC_CH12_P12_PIN 1 +#ifndef SL_ADC_CH12_P_PIN +#define SL_ADC_CH12_P_PIN 1 #endif -#ifndef SL_ADC_CH12_P12_LOC -#define SL_ADC_CH12_P12_LOC 201 +#ifndef SL_ADC_CH12_P_LOC +#define SL_ADC_CH12_P_LOC 201 #endif // [ADC_CH12_SL_ADC_CH12]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH12_P12_LOC -#define SL_ADC_CHANNEL_12_POS_INPUT_CHNL_SEL (SL_ADC_CH12_P12_LOC - P12_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH12_P_LOC +#define SL_ADC_CHANNEL_12_POS_INPUT_CHNL_SEL (SL_ADC_CH12_P_LOC - P12_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_12_POS_INPUT_CHNL_SEL 10 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_13_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_13_config.h index c30dcabf6..478f8fef5 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_13_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_13_config.h @@ -59,27 +59,27 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH13 +// SL_ADC_CH13 // $[ADC_CH13_SL_ADC_CH13] #ifndef SL_ADC_CH13_PERIPHERAL #define SL_ADC_CH13_PERIPHERAL ADC_CH13 #endif -// ADC_CH13 P13 on ULP_GPIO_7/GPIO_71 -#ifndef SL_ADC_CH13_P13_PORT -#define SL_ADC_CH13_P13_PORT 0 +// ADC_CH13 P on ULP_GPIO_7/GPIO_71 +#ifndef SL_ADC_CH13_P_PORT +#define SL_ADC_CH13_P_PORT ULP #endif -#ifndef SL_ADC_CH13_P13_PIN -#define SL_ADC_CH13_P13_PIN 7 +#ifndef SL_ADC_CH13_P_PIN +#define SL_ADC_CH13_P_PIN 7 #endif -#ifndef SL_ADC_CH13_P13_LOC -#define SL_ADC_CH13_P13_LOC 225 +#ifndef SL_ADC_CH13_P_LOC +#define SL_ADC_CH13_P_LOC 225 #endif // [ADC_CH13_SL_ADC_CH13]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH13_P13_LOC -#define SL_ADC_CHANNEL_13_POS_INPUT_CHNL_SEL (SL_ADC_CH13_P13_LOC - P13_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH13_P_LOC +#define SL_ADC_CHANNEL_13_POS_INPUT_CHNL_SEL (SL_ADC_CH13_P_LOC - P13_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_13_POS_INPUT_CHNL_SEL 15 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_14_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_14_config.h index 78c327815..7d8cf38bc 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_14_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_14_config.h @@ -59,27 +59,27 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH14 +// SL_ADC_CH14 // $[ADC_CH14_SL_ADC_CH14] #ifndef SL_ADC_CH14_PERIPHERAL #define SL_ADC_CH14_PERIPHERAL ADC_CH14 #endif -// ADC_CH14 P14 on GPIO_26 -#ifndef SL_ADC_CH14_P14_PORT -#define SL_ADC_CH14_P14_PORT 0 +// ADC_CH14 P on GPIO_26 +#ifndef SL_ADC_CH14_P_PORT +#define SL_ADC_CH14_P_PORT HP #endif -#ifndef SL_ADC_CH14_P14_PIN -#define SL_ADC_CH14_P14_PIN 26 +#ifndef SL_ADC_CH14_P_PIN +#define SL_ADC_CH14_P_PIN 26 #endif -#ifndef SL_ADC_CH14_P14_LOC -#define SL_ADC_CH14_P14_LOC 245 +#ifndef SL_ADC_CH14_P_LOC +#define SL_ADC_CH14_P_LOC 245 #endif // [ADC_CH14_SL_ADC_CH14]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH14_P14_LOC -#define SL_ADC_CHANNEL_14_POS_INPUT_CHNL_SEL (SL_ADC_CH14_P14_LOC - P14_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH14_P_LOC +#define SL_ADC_CHANNEL_14_POS_INPUT_CHNL_SEL (SL_ADC_CH14_P_LOC - P14_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_14_POS_INPUT_CHNL_SEL 16 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_15_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_15_config.h index 30870cfbc..95eaf5f3e 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_15_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_15_config.h @@ -59,27 +59,27 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH15 +// SL_ADC_CH15 // $[ADC_CH15_SL_ADC_CH15] #ifndef SL_ADC_CH15_PERIPHERAL #define SL_ADC_CH15_PERIPHERAL ADC_CH15 #endif -// ADC_CH15 P15 on GPIO_30 -#ifndef SL_ADC_CH15_P15_PORT -#define SL_ADC_CH15_P15_PORT 0 +// ADC_CH15 P on GPIO_30 +#ifndef SL_ADC_CH15_P_PORT +#define SL_ADC_CH15_P_PORT HP #endif -#ifndef SL_ADC_CH15_P15_PIN -#define SL_ADC_CH15_P15_PIN 30 +#ifndef SL_ADC_CH15_P_PIN +#define SL_ADC_CH15_P_PIN 30 #endif -#ifndef SL_ADC_CH15_P15_LOC -#define SL_ADC_CH15_P15_LOC 266 +#ifndef SL_ADC_CH15_P_LOC +#define SL_ADC_CH15_P_LOC 266 #endif // [ADC_CH15_SL_ADC_CH15]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH15_P15_LOC -#define SL_ADC_CHANNEL_15_POS_INPUT_CHNL_SEL (SL_ADC_CH15_P15_LOC - P15_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH15_P_LOC +#define SL_ADC_CHANNEL_15_POS_INPUT_CHNL_SEL (SL_ADC_CH15_P_LOC - P15_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_15_POS_INPUT_CHNL_SEL 18 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_16_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_16_config.h index df904452e..86199dda9 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_16_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_16_config.h @@ -59,27 +59,27 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH16 +// SL_ADC_CH16 // $[ADC_CH16_SL_ADC_CH16] #ifndef SL_ADC_CH16_PERIPHERAL #define SL_ADC_CH16_PERIPHERAL ADC_CH16 #endif -// ADC_CH16 P16 on GPIO_30 -#ifndef SL_ADC_CH16_P16_PORT -#define SL_ADC_CH16_P16_PORT 0 +// ADC_CH16 P on GPIO_30 +#ifndef SL_ADC_CH16_P_PORT +#define SL_ADC_CH16_P_PORT HP #endif -#ifndef SL_ADC_CH16_P16_PIN -#define SL_ADC_CH16_P16_PIN 30 +#ifndef SL_ADC_CH16_P_PIN +#define SL_ADC_CH16_P_PIN 30 #endif -#ifndef SL_ADC_CH16_P16_LOC -#define SL_ADC_CH16_P16_LOC 285 +#ifndef SL_ADC_CH16_P_LOC +#define SL_ADC_CH16_P_LOC 285 #endif // [ADC_CH16_SL_ADC_CH16]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH16_P16_LOC -#define SL_ADC_CHANNEL_16_POS_INPUT_CHNL_SEL (SL_ADC_CH16_P16_LOC - P16_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH16_P_LOC +#define SL_ADC_CHANNEL_16_POS_INPUT_CHNL_SEL (SL_ADC_CH16_P_LOC - P16_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_16_POS_INPUT_CHNL_SEL 18 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_1_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_1_config.h index 69d4263f2..574f53a73 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_1_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_1_config.h @@ -59,43 +59,43 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH1 +// SL_ADC_CH1 // $[ADC_CH1_SL_ADC_CH1] #ifndef SL_ADC_CH1_PERIPHERAL #define SL_ADC_CH1_PERIPHERAL ADC_CH1 #endif -// ADC_CH1 P1 on ULP_GPIO_1/GPIO_65 -#ifndef SL_ADC_CH1_P1_PORT -#define SL_ADC_CH1_P1_PORT 0 +// ADC_CH1 P on ULP_GPIO_1/GPIO_65 +#ifndef SL_ADC_CH1_P_PORT +#define SL_ADC_CH1_P_PORT ULP #endif -#ifndef SL_ADC_CH1_P1_PIN -#define SL_ADC_CH1_P1_PIN 1 +#ifndef SL_ADC_CH1_P_PIN +#define SL_ADC_CH1_P_PIN 1 #endif -#ifndef SL_ADC_CH1_P1_LOC -#define SL_ADC_CH1_P1_LOC 10 +#ifndef SL_ADC_CH1_P_LOC +#define SL_ADC_CH1_P_LOC 10 #endif -// ADC_CH1 N1 on GPIO_28 -#ifndef SL_ADC_CH1_N1_PORT -#define SL_ADC_CH1_N1_PORT 0 +// ADC_CH1 N on GPIO_28 +#ifndef SL_ADC_CH1_N_PORT +#define SL_ADC_CH1_N_PORT HP #endif -#ifndef SL_ADC_CH1_N1_PIN -#define SL_ADC_CH1_N1_PIN 28 +#ifndef SL_ADC_CH1_N_PIN +#define SL_ADC_CH1_N_PIN 28 #endif -#ifndef SL_ADC_CH1_N1_LOC -#define SL_ADC_CH1_N1_LOC 350 +#ifndef SL_ADC_CH1_N_LOC +#define SL_ADC_CH1_N_LOC 350 #endif // [ADC_CH1_SL_ADC_CH1]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH1_P1_LOC -#define SL_ADC_CHANNEL_1_POS_INPUT_CHNL_SEL SL_ADC_CH1_P1_LOC +#ifdef SL_ADC_CH1_P_LOC +#define SL_ADC_CHANNEL_1_POS_INPUT_CHNL_SEL SL_ADC_CH1_P_LOC #else #define SL_ADC_CHANNEL_1_POS_INPUT_CHNL_SEL 10 #endif -#ifdef SL_ADC_CH1_N1_LOC -#define SL_ADC_CHANNEL_1_NEG_INPUT_CHNL_SEL (SL_ADC_CH1_N1_LOC - N1_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH1_N_LOC +#define SL_ADC_CHANNEL_1_NEG_INPUT_CHNL_SEL (SL_ADC_CH1_N_LOC - N1_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_1_NEG_INPUT_CHNL_SEL 7 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_2_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_2_config.h index ddc310622..2a5ba845a 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_2_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_2_config.h @@ -60,43 +60,43 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH2 +// SL_ADC_CH2 // $[ADC_CH2_SL_ADC_CH2] #ifndef SL_ADC_CH2_PERIPHERAL #define SL_ADC_CH2_PERIPHERAL ADC_CH2 #endif -// ADC_CH2 P2 on GPIO_27 -#ifndef SL_ADC_CH2_P2_PORT -#define SL_ADC_CH2_P2_PORT 0 +// ADC_CH2 P on GPIO_27 +#ifndef SL_ADC_CH2_P_PORT +#define SL_ADC_CH2_P_PORT HP #endif -#ifndef SL_ADC_CH2_P2_PIN -#define SL_ADC_CH2_P2_PIN 27 +#ifndef SL_ADC_CH2_P_PIN +#define SL_ADC_CH2_P_PIN 27 #endif -#ifndef SL_ADC_CH2_P2_LOC -#define SL_ADC_CH2_P2_LOC 26 +#ifndef SL_ADC_CH2_P_LOC +#define SL_ADC_CH2_P_LOC 26 #endif -// ADC_CH2 N2 on GPIO_30 -#ifndef SL_ADC_CH2_N2_PORT -#define SL_ADC_CH2_N2_PORT 0 +// ADC_CH2 N on GPIO_30 +#ifndef SL_ADC_CH2_N_PORT +#define SL_ADC_CH2_N_PORT HP #endif -#ifndef SL_ADC_CH2_N2_PIN -#define SL_ADC_CH2_N2_PIN 30 +#ifndef SL_ADC_CH2_N_PIN +#define SL_ADC_CH2_N_PIN 30 #endif -#ifndef SL_ADC_CH2_N2_LOC -#define SL_ADC_CH2_N2_LOC 360 +#ifndef SL_ADC_CH2_N_LOC +#define SL_ADC_CH2_N_LOC 360 #endif // [ADC_CH2_SL_ADC_CH2]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH2_P2_LOC -#define SL_ADC_CHANNEL_2_POS_INPUT_CHNL_SEL (SL_ADC_CH2_P2_LOC - P2_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH2_P_LOC +#define SL_ADC_CHANNEL_2_POS_INPUT_CHNL_SEL (SL_ADC_CH2_P_LOC - P2_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_2_POS_INPUT_CHNL_SEL 7 #endif -#ifdef SL_ADC_CH2_N2_LOC -#define SL_ADC_CHANNEL_2_NEG_INPUT_CHNL_SEL (SL_ADC_CH2_N2_LOC - N2_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH2_N_LOC +#define SL_ADC_CHANNEL_2_NEG_INPUT_CHNL_SEL (SL_ADC_CH2_N_LOC - N2_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_2_NEG_INPUT_CHNL_SEL 8 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_3_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_3_config.h index 49bdd8885..9fdfbb15a 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_3_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_3_config.h @@ -60,42 +60,42 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH3 +// SL_ADC_CH3 // $[ADC_CH3_SL_ADC_CH3] #ifndef SL_ADC_CH3_PERIPHERAL #define SL_ADC_CH3_PERIPHERAL ADC_CH3 #endif -// ADC_CH3 P3 on ULP_GPIO_8/GPIO_72 -#ifndef SL_ADC_CH3_P3_PORT -#define SL_ADC_CH3_P3_PORT 0 +// ADC_CH3 P on ULP_GPIO_8/GPIO_72 +#ifndef SL_ADC_CH3_P_PORT +#define SL_ADC_CH3_P_PORT ULP #endif -#ifndef SL_ADC_CH3_P3_PIN -#define SL_ADC_CH3_P3_PIN 8 +#ifndef SL_ADC_CH3_P_PIN +#define SL_ADC_CH3_P_PIN 8 #endif -#ifndef SL_ADC_CH3_P3_LOC -#define SL_ADC_CH3_P3_LOC 42 +#ifndef SL_ADC_CH3_P_LOC +#define SL_ADC_CH3_P_LOC 42 #endif -// ADC_CH3 N3 on GPIO_26 -#ifndef SL_ADC_CH3_N3_PORT -#define SL_ADC_CH3_N3_PORT 0 +// ADC_CH3 N on GPIO_26 +#ifndef SL_ADC_CH3_N_PORT +#define SL_ADC_CH3_N_PORT HP #endif -#ifndef SL_ADC_CH3_N3_PIN -#define SL_ADC_CH3_N3_PIN 26 +#ifndef SL_ADC_CH3_N_PIN +#define SL_ADC_CH3_N_PIN 26 #endif -#ifndef SL_ADC_CH3_N3_LOC -#define SL_ADC_CH3_N3_LOC 367 +#ifndef SL_ADC_CH3_N_LOC +#define SL_ADC_CH3_N_LOC 367 #endif // [ADC_CH3_SL_ADC_CH3]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH3_P3_LOC -#define SL_ADC_CHANNEL_3_POS_INPUT_CHNL_SEL (SL_ADC_CH3_P3_LOC - P3_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH3_P_LOC +#define SL_ADC_CHANNEL_3_POS_INPUT_CHNL_SEL (SL_ADC_CH3_P_LOC - P3_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_3_POS_INPUT_CHNL_SEL 4 #endif -#ifdef SL_ADC_CH3_N3_LOC -#define SL_ADC_CHANNEL_3_NEG_INPUT_CHNL_SEL (SL_ADC_CH3_N3_LOC - N3_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH3_N_LOC +#define SL_ADC_CHANNEL_3_NEG_INPUT_CHNL_SEL (SL_ADC_CH3_N_LOC - N3_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_3_NEG_INPUT_CHNL_SEL 6 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_4_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_4_config.h index 6fcc2ce25..d7e004ae4 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_4_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_4_config.h @@ -60,42 +60,42 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH4 +// SL_ADC_CH4 // $[ADC_CH4_SL_ADC_CH4] #ifndef SL_ADC_CH4_PERIPHERAL #define SL_ADC_CH4_PERIPHERAL ADC_CH4 #endif -// ADC_CH4 P4 on GPIO_25 -#ifndef SL_ADC_CH4_P4_PORT -#define SL_ADC_CH4_P4_PORT 0 +// ADC_CH4 P on GPIO_25 +#ifndef SL_ADC_CH4_P_PORT +#define SL_ADC_CH4_P_PORT HP #endif -#ifndef SL_ADC_CH4_P4_PIN -#define SL_ADC_CH4_P4_PIN 25 +#ifndef SL_ADC_CH4_P_PIN +#define SL_ADC_CH4_P_PIN 25 #endif -#ifndef SL_ADC_CH4_P4_LOC -#define SL_ADC_CH4_P4_LOC 63 +#ifndef SL_ADC_CH4_P_LOC +#define SL_ADC_CH4_P_LOC 63 #endif -// ADC_CH4 N4 on ULP_GPIO_7/GPIO_71 -#ifndef SL_ADC_CH4_N4_PORT -#define SL_ADC_CH4_N4_PORT 0 +// ADC_CH4 N on ULP_GPIO_7/GPIO_71 +#ifndef SL_ADC_CH4_N_PORT +#define SL_ADC_CH4_N_PORT ULP #endif -#ifndef SL_ADC_CH4_N4_PIN -#define SL_ADC_CH4_N4_PIN 7 +#ifndef SL_ADC_CH4_N_PIN +#define SL_ADC_CH4_N_PIN 7 #endif -#ifndef SL_ADC_CH4_N4_LOC -#define SL_ADC_CH4_N4_LOC 375 +#ifndef SL_ADC_CH4_N_LOC +#define SL_ADC_CH4_N_LOC 375 #endif // [ADC_CH4_SL_ADC_CH4]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH4_P4_LOC -#define SL_ADC_CHANNEL_4_POS_INPUT_CHNL_SEL (SL_ADC_CH4_P4_LOC - P4_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH4_P_LOC +#define SL_ADC_CHANNEL_4_POS_INPUT_CHNL_SEL (SL_ADC_CH4_P_LOC - P4_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_4_POS_INPUT_CHNL_SEL 6 #endif -#ifdef SL_ADC_CH4_N4_LOC -#define SL_ADC_CHANNEL_4_NEG_INPUT_CHNL_SEL (SL_ADC_CH4_N4_LOC - N4_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH4_N_LOC +#define SL_ADC_CHANNEL_4_NEG_INPUT_CHNL_SEL (SL_ADC_CH4_N_LOC - N4_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_4_NEG_INPUT_CHNL_SEL 5 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_5_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_5_config.h index 0f04dfc1f..141a9bd02 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_5_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_5_config.h @@ -60,43 +60,43 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH5 +// SL_ADC_CH5 // $[ADC_CH5_SL_ADC_CH5] #ifndef SL_ADC_CH5_PERIPHERAL #define SL_ADC_CH5_PERIPHERAL ADC_CH5 #endif -// ADC_CH5 P5 on ULP_GPIO_8/GPIO_72 -#ifndef SL_ADC_CH5_P5_PORT -#define SL_ADC_CH5_P5_PORT 0 +// ADC_CH5 P on ULP_GPIO_8/GPIO_72 +#ifndef SL_ADC_CH5_P_PORT +#define SL_ADC_CH5_P_PORT ULP #endif -#ifndef SL_ADC_CH5_P5_PIN -#define SL_ADC_CH5_P5_PIN 8 +#ifndef SL_ADC_CH5_P_PIN +#define SL_ADC_CH5_P_PIN 8 #endif -#ifndef SL_ADC_CH5_P5_LOC -#define SL_ADC_CH5_P5_LOC 80 +#ifndef SL_ADC_CH5_P_LOC +#define SL_ADC_CH5_P_LOC 80 #endif -// ADC_CH5 N5 on ULP_GPIO_1/GPIO_65 -#ifndef SL_ADC_CH5_N5_PORT -#define SL_ADC_CH5_N5_PORT 0 +// ADC_CH5 N on ULP_GPIO_1/GPIO_65 +#ifndef SL_ADC_CH5_N_PORT +#define SL_ADC_CH5_N_PORT ULP #endif -#ifndef SL_ADC_CH5_N5_PIN -#define SL_ADC_CH5_N5_PIN 1 +#ifndef SL_ADC_CH5_N_PIN +#define SL_ADC_CH5_N_PIN 1 #endif -#ifndef SL_ADC_CH5_N5_LOC -#define SL_ADC_CH5_N5_LOC 379 +#ifndef SL_ADC_CH5_N_LOC +#define SL_ADC_CH5_N_LOC 379 #endif // [ADC_CH5_SL_ADC_CH5]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH5_P5_LOC -#define SL_ADC_CHANNEL_5_POS_INPUT_CHNL_SEL (SL_ADC_CH5_P5_LOC - P5_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH5_P_LOC +#define SL_ADC_CHANNEL_5_POS_INPUT_CHNL_SEL (SL_ADC_CH5_P_LOC - P5_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_5_POS_INPUT_CHNL_SEL 4 #endif -#ifdef SL_ADC_CH5_N5_LOC -#define SL_ADC_CHANNEL_5_NEG_INPUT_CHNL_SEL (SL_ADC_CH5_N5_LOC - N5_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH5_N_LOC +#define SL_ADC_CHANNEL_5_NEG_INPUT_CHNL_SEL (SL_ADC_CH5_N_LOC - N5_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_5_NEG_INPUT_CHNL_SEL 0 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_6_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_6_config.h index 7672a13d9..c18a45205 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_6_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_6_config.h @@ -60,43 +60,43 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH6 +// SL_ADC_CH6 // $[ADC_CH6_SL_ADC_CH6] #ifndef SL_ADC_CH6_PERIPHERAL #define SL_ADC_CH6_PERIPHERAL ADC_CH6 #endif -// ADC_CH6 P6 on ULP_GPIO_10/GPIO_74 -#ifndef SL_ADC_CH6_P6_PORT -#define SL_ADC_CH6_P6_PORT 0 +// ADC_CH6 P on ULP_GPIO_10/GPIO_74 +#ifndef SL_ADC_CH6_P_PORT +#define SL_ADC_CH6_P_PORT ULP #endif -#ifndef SL_ADC_CH6_P6_PIN -#define SL_ADC_CH6_P6_PIN 10 +#ifndef SL_ADC_CH6_P_PIN +#define SL_ADC_CH6_P_PIN 10 #endif -#ifndef SL_ADC_CH6_P6_LOC -#define SL_ADC_CH6_P6_LOC 100 +#ifndef SL_ADC_CH6_P_LOC +#define SL_ADC_CH6_P_LOC 100 #endif -// ADC_CH6 N6 on ULP_GPIO_7/GPIO_71 -#ifndef SL_ADC_CH6_N6_PORT -#define SL_ADC_CH6_N6_PORT 0 +// ADC_CH6 N on ULP_GPIO_7/GPIO_71 +#ifndef SL_ADC_CH6_N_PORT +#define SL_ADC_CH6_N_PORT ULP #endif -#ifndef SL_ADC_CH6_N6_PIN -#define SL_ADC_CH6_N6_PIN 7 +#ifndef SL_ADC_CH6_N_PIN +#define SL_ADC_CH6_N_PIN 7 #endif -#ifndef SL_ADC_CH6_N6_LOC -#define SL_ADC_CH6_N6_LOC 393 +#ifndef SL_ADC_CH6_N_LOC +#define SL_ADC_CH6_N_LOC 393 #endif // [ADC_CH6_SL_ADC_CH6]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH6_P6_LOC -#define SL_ADC_CHANNEL_6_POS_INPUT_CHNL_SEL (SL_ADC_CH6_P6_LOC - P6_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH6_P_LOC +#define SL_ADC_CHANNEL_6_POS_INPUT_CHNL_SEL (SL_ADC_CH6_P_LOC - P6_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_6_POS_INPUT_CHNL_SEL 5 #endif -#ifdef SL_ADC_CH6_N6_LOC -#define SL_ADC_CHANNEL_6_NEG_INPUT_CHNL_SEL (SL_ADC_CH6_N6_LOC - N6_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH6_N_LOC +#define SL_ADC_CHANNEL_6_NEG_INPUT_CHNL_SEL (SL_ADC_CH6_N_LOC - N6_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_6_NEG_INPUT_CHNL_SEL 5 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_7_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_7_config.h index fe4e522e9..6f6a0bc16 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_7_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_7_config.h @@ -60,43 +60,43 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH7 +// SL_ADC_CH7 // $[ADC_CH7_SL_ADC_CH7] #ifndef SL_ADC_CH7_PERIPHERAL #define SL_ADC_CH7_PERIPHERAL ADC_CH7 #endif -// ADC_CH7 P7 on GPIO_25 -#ifndef SL_ADC_CH7_P7_PORT -#define SL_ADC_CH7_P7_PORT 0 +// ADC_CH7 P on GPIO_25 +#ifndef SL_ADC_CH7_P_PORT +#define SL_ADC_CH7_P_PORT HP #endif -#ifndef SL_ADC_CH7_P7_PIN -#define SL_ADC_CH7_P7_PIN 25 +#ifndef SL_ADC_CH7_P_PIN +#define SL_ADC_CH7_P_PIN 25 #endif -#ifndef SL_ADC_CH7_P7_LOC -#define SL_ADC_CH7_P7_LOC 120 +#ifndef SL_ADC_CH7_P_LOC +#define SL_ADC_CH7_P_LOC 120 #endif -// ADC_CH7 N7 on GPIO_26 -#ifndef SL_ADC_CH7_N7_PORT -#define SL_ADC_CH7_N7_PORT 0 +// ADC_CH7 N on GPIO_26 +#ifndef SL_ADC_CH7_N_PORT +#define SL_ADC_CH7_N_PORT HP #endif -#ifndef SL_ADC_CH7_N7_PIN -#define SL_ADC_CH7_N7_PIN 26 +#ifndef SL_ADC_CH7_N_PIN +#define SL_ADC_CH7_N_PIN 26 #endif -#ifndef SL_ADC_CH7_N7_LOC -#define SL_ADC_CH7_N7_LOC 403 +#ifndef SL_ADC_CH7_N_LOC +#define SL_ADC_CH7_N_LOC 403 #endif // [ADC_CH7_SL_ADC_CH7]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH7_P7_LOC -#define SL_ADC_CHANNEL_7_POS_INPUT_CHNL_SEL (SL_ADC_CH7_P7_LOC - P7_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH7_P_LOC +#define SL_ADC_CHANNEL_7_POS_INPUT_CHNL_SEL (SL_ADC_CH7_P_LOC - P7_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_7_POS_INPUT_CHNL_SEL 6 #endif -#ifdef SL_ADC_CH7_N7_LOC -#define SL_ADC_CHANNEL_7_NEG_INPUT_CHNL_SEL (SL_ADC_CH7_N7_LOC - N7_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH7_N_LOC +#define SL_ADC_CHANNEL_7_NEG_INPUT_CHNL_SEL (SL_ADC_CH7_N_LOC - N7_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_7_NEG_INPUT_CHNL_SEL 6 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_8_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_8_config.h index fff811862..e8035501c 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_8_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_8_config.h @@ -60,43 +60,43 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH8 +// SL_ADC_CH8 // $[ADC_CH8_SL_ADC_CH8] #ifndef SL_ADC_CH8_PERIPHERAL #define SL_ADC_CH8_PERIPHERAL ADC_CH8 #endif -// ADC_CH8 P8 on GPIO_27 -#ifndef SL_ADC_CH8_P8_PORT -#define SL_ADC_CH8_P8_PORT 0 +// ADC_CH8 P on GPIO_27 +#ifndef SL_ADC_CH8_P_PORT +#define SL_ADC_CH8_P_PORT HP #endif -#ifndef SL_ADC_CH8_P8_PIN -#define SL_ADC_CH8_P8_PIN 27 +#ifndef SL_ADC_CH8_P_PIN +#define SL_ADC_CH8_P_PIN 27 #endif -#ifndef SL_ADC_CH8_P8_LOC -#define SL_ADC_CH8_P8_LOC 140 +#ifndef SL_ADC_CH8_P_LOC +#define SL_ADC_CH8_P_LOC 140 #endif -// ADC_CH8 N8 on GPIO_28 -#ifndef SL_ADC_CH8_N8_PORT -#define SL_ADC_CH8_N8_PORT 0 +// ADC_CH8 N on GPIO_28 +#ifndef SL_ADC_CH8_N_PORT +#define SL_ADC_CH8_N_PORT HP #endif -#ifndef SL_ADC_CH8_N8_PIN -#define SL_ADC_CH8_N8_PIN 28 +#ifndef SL_ADC_CH8_N_PIN +#define SL_ADC_CH8_N_PIN 28 #endif -#ifndef SL_ADC_CH8_N8_LOC -#define SL_ADC_CH8_N8_LOC 413 +#ifndef SL_ADC_CH8_N_LOC +#define SL_ADC_CH8_N_LOC 413 #endif // [ADC_CH8_SL_ADC_CH8]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH8_P8_LOC -#define SL_ADC_CHANNEL_8_POS_INPUT_CHNL_SEL (SL_ADC_CH8_P8_LOC - P8_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH8_P_LOC +#define SL_ADC_CHANNEL_8_POS_INPUT_CHNL_SEL (SL_ADC_CH8_P_LOC - P8_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_8_POS_INPUT_CHNL_SEL 7 #endif -#ifdef SL_ADC_CH8_N8_LOC -#define SL_ADC_CHANNEL_8_NEG_INPUT_CHNL_SEL (SL_ADC_CH8_N8_LOC - N8_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH8_N_LOC +#define SL_ADC_CHANNEL_8_NEG_INPUT_CHNL_SEL (SL_ADC_CH8_N_LOC - N8_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_8_NEG_INPUT_CHNL_SEL 7 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_9_config.h b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_9_config.h index 3890487e5..f377e5b3f 100644 --- a/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_9_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_adc_init_channel_9_config.h @@ -60,43 +60,43 @@ extern "C" { // <<< end of configuration section >>> // <<< sl:start pin_tool >>> -// SL_ADC_CH9 +// SL_ADC_CH9 // $[ADC_CH9_SL_ADC_CH9] #ifndef SL_ADC_CH9_PERIPHERAL #define SL_ADC_CH9_PERIPHERAL ADC_CH9 #endif -// ADC_CH9 P9 on GPIO_29 -#ifndef SL_ADC_CH9_P9_PORT -#define SL_ADC_CH9_P9_PORT 0 +// ADC_CH9 P on GPIO_29 +#ifndef SL_ADC_CH9_P_PORT +#define SL_ADC_CH9_P_PORT HP #endif -#ifndef SL_ADC_CH9_P9_PIN -#define SL_ADC_CH9_P9_PIN 29 +#ifndef SL_ADC_CH9_P_PIN +#define SL_ADC_CH9_P_PIN 29 #endif -#ifndef SL_ADC_CH9_P9_LOC -#define SL_ADC_CH9_P9_LOC 160 +#ifndef SL_ADC_CH9_P_LOC +#define SL_ADC_CH9_P_LOC 160 #endif -// ADC_CH9 N9 on GPIO_30 -#ifndef SL_ADC_CH9_N9_PORT -#define SL_ADC_CH9_N9_PORT 0 +// ADC_CH9 N on GPIO_30 +#ifndef SL_ADC_CH9_N_PORT +#define SL_ADC_CH9_N_PORT HP #endif -#ifndef SL_ADC_CH9_N9_PIN -#define SL_ADC_CH9_N9_PIN 30 +#ifndef SL_ADC_CH9_N_PIN +#define SL_ADC_CH9_N_PIN 30 #endif -#ifndef SL_ADC_CH9_N9_LOC -#define SL_ADC_CH9_N9_LOC 423 +#ifndef SL_ADC_CH9_N_LOC +#define SL_ADC_CH9_N_LOC 423 #endif // [ADC_CH9_SL_ADC_CH9]$ // <<< sl:end pin_tool >>> -#ifdef SL_ADC_CH9_P9_LOC -#define SL_ADC_CHANNEL_9_POS_INPUT_CHNL_SEL (SL_ADC_CH9_P9_LOC - P9_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH9_P_LOC +#define SL_ADC_CHANNEL_9_POS_INPUT_CHNL_SEL (SL_ADC_CH9_P_LOC - P9_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_9_POS_INPUT_CHNL_SEL 8 #endif -#ifdef SL_ADC_CH9_N9_LOC -#define SL_ADC_CHANNEL_9_NEG_INPUT_CHNL_SEL (SL_ADC_CH9_N9_LOC - N9_START_LOCATION_PINTOOL) +#ifdef SL_ADC_CH9_N_LOC +#define SL_ADC_CHANNEL_9_NEG_INPUT_CHNL_SEL (SL_ADC_CH9_N_LOC - N9_START_LOCATION_PINTOOL) #else #define SL_ADC_CHANNEL_9_NEG_INPUT_CHNL_SEL 8 #endif diff --git a/components/board/silabs/config/common_config/sl_si91x_analog_comparator_comparator1_config.h b/components/board/silabs/config/common_config/sl_si91x_analog_comparator_comparator1_config.h index 44238dfa8..e9388b67d 100644 --- a/components/board/silabs/config/common_config/sl_si91x_analog_comparator_comparator1_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_analog_comparator_comparator1_config.h @@ -79,7 +79,7 @@ // COMP1 P1 on GPIO_27 #ifndef SL_COMP1_COMP_P1_PORT -#define SL_COMP1_COMP_P1_PORT 0 +#define SL_COMP1_COMP_P1_PORT HP #endif #ifndef SL_COMP1_COMP_P1_PIN #define SL_COMP1_COMP_P1_PIN 5 @@ -90,7 +90,7 @@ // COMP1 N1 on GPIO_28 #ifndef SL_COMP1_COMP_N1_PORT -#define SL_COMP1_COMP_N1_PORT 0 +#define SL_COMP1_COMP_N1_PORT HP #endif #ifndef SL_COMP1_COMP_N1_PIN #define SL_COMP1_COMP_N1_PIN 4 diff --git a/components/board/silabs/config/common_config/sl_si91x_analog_comparator_comparator2_config.h b/components/board/silabs/config/common_config/sl_si91x_analog_comparator_comparator2_config.h index 6abff35df..081c0889a 100644 --- a/components/board/silabs/config/common_config/sl_si91x_analog_comparator_comparator2_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_analog_comparator_comparator2_config.h @@ -79,7 +79,7 @@ // COMP2 P1 on GPIO_27 #ifndef SL_COMP2_COMP_P1_PORT -#define SL_COMP2_COMP_P1_PORT 0 +#define SL_COMP2_COMP_P1_PORT HP #endif #ifndef SL_COMP2_COMP_P1_PIN #define SL_COMP2_COMP_P1_PIN 27 @@ -90,7 +90,7 @@ // COMP2 N1 on GPIO_28 #ifndef SL_COMP2_COMP_N1_PORT -#define SL_COMP2_COMP_N1_PORT 0 +#define SL_COMP2_COMP_N1_PORT HP #endif #ifndef SL_COMP2_COMP_N1_PIN #define SL_COMP2_COMP_N1_PIN 28 diff --git a/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c0_config.h b/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c0_config.h index 26f69aae3..a5eb30d2f 100644 --- a/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c0_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c0_config.h @@ -74,7 +74,7 @@ extern "C" { // I2C0 SCL on GPIO_7 #ifndef SL_I2C0_SCL_PORT -#define SL_I2C0_SCL_PORT 0 +#define SL_I2C0_SCL_PORT HP #endif #ifndef SL_I2C0_SCL_PIN #define SL_I2C0_SCL_PIN 7 @@ -85,7 +85,7 @@ extern "C" { // I2C0 SDA on GPIO_6 #ifndef SL_I2C0_SDA_PORT -#define SL_I2C0_SDA_PORT 0 +#define SL_I2C0_SDA_PORT HP #endif #ifndef SL_I2C0_SDA_PIN #define SL_I2C0_SDA_PIN 6 @@ -96,13 +96,13 @@ extern "C" { // [I2C_SL_I2C0]$ // <<< sl:end pin_tool >>> -#define SL_I2C_I2C0_SCL_PORT SL_I2C0_SCL_PORT +#define SL_I2C_I2C0_SCL_PORT 0 #define SL_I2C_I2C0_SCL_PIN SL_I2C0_SCL_PIN #define SL_I2C_I2C0_SCL_MUX SL_SI91X_I2C0_SCL_MUX #define SL_I2C_I2C0_SCL_PAD SL_SI91X_I2C0_SCL_PAD #define SL_I2C_I2C0_SCL_REN SL_SI91X_I2C0_SCL_REN -#define SL_I2C_I2C0_SDA_PORT SL_I2C0_SDA_PORT +#define SL_I2C_I2C0_SDA_PORT 0 #define SL_I2C_I2C0_SDA_PIN SL_I2C0_SDA_PIN #define SL_I2C_I2C0_SDA_MUX SL_SI91X_I2C0_SDA_MUX #define SL_I2C_I2C0_SDA_PAD SL_SI91X_I2C0_SDA_PAD diff --git a/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c1_config.h b/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c1_config.h index 62b6ca860..38bbcbd3d 100644 --- a/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c1_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c1_config.h @@ -74,7 +74,7 @@ extern "C" { // I2C1 SCL on GPIO_50 #ifndef SL_I2C1_SCL_PORT -#define SL_I2C1_SCL_PORT 0 +#define SL_I2C1_SCL_PORT HP #endif #ifndef SL_I2C1_SCL_PIN #define SL_I2C1_SCL_PIN 50 @@ -85,7 +85,7 @@ extern "C" { // I2C1 SDA on GPIO_51 #ifndef SL_I2C1_SDA_PORT -#define SL_I2C1_SDA_PORT 0 +#define SL_I2C1_SDA_PORT HP #endif #ifndef SL_I2C1_SDA_PIN #define SL_I2C1_SDA_PIN 51 @@ -96,13 +96,13 @@ extern "C" { // [I2C_SL_I2C1]$ // <<< sl:end pin_tool >>> -#define SL_I2C_I2C1_SCL_PORT SL_I2C1_SCL_PORT +#define SL_I2C_I2C1_SCL_PORT 0 #define SL_I2C_I2C1_SCL_PIN SL_I2C1_SCL_PIN #define SL_I2C_I2C1_SCL_MUX SL_SI91X_I2C1_SCL_MUX #define SL_I2C_I2C1_SCL_PAD SL_SI91X_I2C1_SCL_PAD #define SL_I2C_I2C1_SCL_REN SL_SI91X_I2C1_SCL_REN -#define SL_I2C_I2C1_SDA_PORT SL_I2C1_SDA_PORT +#define SL_I2C_I2C1_SDA_PORT 0 #define SL_I2C_I2C1_SDA_PIN SL_I2C1_SDA_PIN #define SL_I2C_I2C1_SDA_MUX SL_SI91X_I2C1_SDA_MUX #define SL_I2C_I2C1_SDA_PAD SL_SI91X_I2C1_SDA_PAD diff --git a/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c2_config.h b/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c2_config.h index 5dd38d0f5..49efaf50c 100644 --- a/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c2_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_i2c_init_i2c2_config.h @@ -74,7 +74,7 @@ extern "C" { // ULP_I2C SCL on ULP_GPIO_7/GPIO_71 #ifndef SL_ULP_I2C_SCL_PORT -#define SL_ULP_I2C_SCL_PORT 0 +#define SL_ULP_I2C_SCL_PORT ULP #endif #ifndef SL_ULP_I2C_SCL_PIN #define SL_ULP_I2C_SCL_PIN 7 @@ -85,7 +85,7 @@ extern "C" { // ULP_I2C SDA on ULP_GPIO_6/GPIO_70 #ifndef SL_ULP_I2C_SDA_PORT -#define SL_ULP_I2C_SDA_PORT 0 +#define SL_ULP_I2C_SDA_PORT ULP #endif #ifndef SL_ULP_I2C_SDA_PIN #define SL_ULP_I2C_SDA_PIN 6 @@ -96,13 +96,13 @@ extern "C" { // [I2C_SL_ULP_I2C]$ // <<< sl:end pin_tool >>> -#define SL_I2C_I2C2_SCL_PORT SL_ULP_I2C_SCL_PORT +#define SL_I2C_I2C2_SCL_PORT 0 #define SL_I2C_I2C2_SCL_PIN SL_ULP_I2C_SCL_PIN #define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX #define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD #define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN -#define SL_I2C_I2C2_SDA_PORT SL_ULP_I2C_SDA_PORT +#define SL_I2C_I2C2_SDA_PORT 0 #define SL_I2C_I2C2_SDA_PIN SL_ULP_I2C_SDA_PIN #define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX #define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD diff --git a/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_0_config.h b/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_0_config.h index 6b731eb11..93b1c61aa 100644 --- a/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_0_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_0_config.h @@ -101,7 +101,7 @@ extern "C" { // PWM_CH0 0H on GPIO_7 #ifndef SL_PWM_OUT_CHANNEL0_0H_PORT -#define SL_PWM_OUT_CHANNEL0_0H_PORT 0 +#define SL_PWM_OUT_CHANNEL0_0H_PORT HP #endif #ifndef SL_PWM_OUT_CHANNEL0_0H_PIN #define SL_PWM_OUT_CHANNEL0_0H_PIN 7 @@ -112,7 +112,7 @@ extern "C" { // PWM_CH0 0L on GPIO_6 #ifndef SL_PWM_OUT_CHANNEL0_0L_PORT -#define SL_PWM_OUT_CHANNEL0_0L_PORT 0 +#define SL_PWM_OUT_CHANNEL0_0L_PORT HP #endif #ifndef SL_PWM_OUT_CHANNEL0_0L_PIN #define SL_PWM_OUT_CHANNEL0_0L_PIN 6 @@ -132,7 +132,7 @@ extern "C" { // PWM FAULTA on GPIO_25 #ifndef SL_PWM_CHANNEL0_FAULTA_PORT -#define SL_PWM_CHANNEL0_FAULTA_PORT 0 +#define SL_PWM_CHANNEL0_FAULTA_PORT HP #endif #ifndef SL_PWM_CHANNEL0_FAULTA_PIN #define SL_PWM_CHANNEL0_FAULTA_PIN 25 @@ -143,7 +143,7 @@ extern "C" { // PWM FAULTB on GPIO_26 #ifndef SL_PWM_CHANNEL0_FAULTB_PORT -#define SL_PWM_CHANNEL0_FAULTB_PORT 0 +#define SL_PWM_CHANNEL0_FAULTB_PORT HP #endif #ifndef SL_PWM_CHANNEL0_FAULTB_PIN #define SL_PWM_CHANNEL0_FAULTB_PIN 26 @@ -154,7 +154,7 @@ extern "C" { // PWM TMR_EXT_TRIG_1 on GPIO_27 #ifndef SL_PWM_CHANNEL0_TMR_EXT_TRIG_1_PORT -#define SL_PWM_CHANNEL0_TMR_EXT_TRIG_1_PORT 0 +#define SL_PWM_CHANNEL0_TMR_EXT_TRIG_1_PORT HP #endif #ifndef SL_PWM_CHANNEL0_TMR_EXT_TRIG_1_PIN #define SL_PWM_CHANNEL0_TMR_EXT_TRIG_1_PIN 27 @@ -165,7 +165,7 @@ extern "C" { // PWM TMR_EXT_TRIG_2 on GPIO_28 #ifndef SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_PORT -#define SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_PORT 0 +#define SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_PORT HP #endif #ifndef SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_PIN #define SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_PIN 28 @@ -186,10 +186,10 @@ extern "C" { #else #define SL_PWM_CHANNEL_0_PIN_L (SL_PWM_OUT_CHANNEL0_0L_PIN + 64) #endif -#define SL_PWM_CHANNEL_0_PORT_L SL_PWM_OUT_CHANNEL0_0L_PORT +#define SL_PWM_CHANNEL_0_PORT_L 0 #else #define SL_PWM_CHANNEL_0_PIN_L SL_SI91X_PWM_0L_PIN -#define SL_PWM_CHANNEL_0_PORT_L SL_SI91X_PWM_0L_PORT +#define SL_PWM_CHANNEL_0_PORT_L 0 #endif //SL_PWM_OUT_CHANNEL0_0L_LOC #ifdef SL_PWM_OUT_CHANNEL0_0H_LOC #if (SL_PWM_OUT_CHANNEL0_0H_LOC == 0) @@ -197,10 +197,10 @@ extern "C" { #else #define SL_PWM_CHANNEL_0_PIN_H (SL_PWM_OUT_CHANNEL0_0H_PIN + 64) #endif -#define SL_PWM_CHANNEL_0_PORT_H SL_PWM_OUT_CHANNEL0_0H_PORT +#define SL_PWM_CHANNEL_0_PORT_H 0 #else #define SL_PWM_CHANNEL_0_PIN_H SL_SI91X_PWM_0H_PIN -#define SL_PWM_CHANNEL_0_PORT_H SL_SI91X_PWM_0H_PORT +#define SL_PWM_CHANNEL_0_PORT_H 0 #endif //SL_PWM_OUT_CHANNEL0_0H_LOC #define SL_PWM_CHANNEL_0_MUX_L SL_SI91X_PWM_0L_MUX @@ -211,10 +211,10 @@ extern "C" { // PWM Fault Pin set resolution #if (SL_PWM_CHANNEL_0_EVENT == 0) #ifdef SL_PWM_CHANNEL0_FAULTA_LOC -#define SL_PWM_CHANNEL_0_PORT SL_PWM_CHANNEL0_FAULTA_PORT +#define SL_PWM_CHANNEL_0_PORT 0 #define SL_PWM_CHANNEL_0_PIN SL_PWM_CHANNEL0_FAULTA_PIN #else -#define SL_PWM_CHANNEL_0_PORT SL_SI91X_PWM_FAULTA_PORT +#define SL_PWM_CHANNEL_0_PORT 0 #define SL_PWM_CHANNEL_0_PIN SL_SI91X_PWM_FAULTA_PIN #endif //SL_PWM_CHANNEL0_FAULTA_LOC #define SL_PWM_CHANNEL_0_MUX 0 @@ -223,10 +223,10 @@ extern "C" { #if (SL_PWM_CHANNEL_0_EVENT == 1) #ifdef SL_PWM_CHANNEL0_FAULTA_LOC -#define SL_PWM_CHANNEL_0_PORT SL_PWM_CHANNEL0_FAULTA_PORT +#define SL_PWM_CHANNEL_0_PORT 0 #define SL_PWM_CHANNEL_0_PIN SL_PWM_CHANNEL0_FAULTA_PIN #else -#define SL_PWM_CHANNEL_0_PORT SL_SI91X_PWM_FAULTA_PORT +#define SL_PWM_CHANNEL_0_PORT 0 #define SL_PWM_CHANNEL_0_PIN SL_SI91X_PWM_FAULTA_PIN #endif //SL_PWM_CHANNEL0_FAULTA_LOC #define SL_PWM_CHANNEL_0_MUX SL_SI91X_PWM_FAULTA_MUX @@ -235,14 +235,14 @@ extern "C" { #if (SL_PWM_CHANNEL_0_EVENT == 2) #ifdef SL_PWM_CHANNEL0_FAULTB_LOC -#define SL_PWM_CHANNEL_0_PORT SL_PWM_CHANNEL0_FAULTB_PORT +#define SL_PWM_CHANNEL_0_PORT 0 #if (SL_PWM_CHANNEL0_FAULTB_LOC == 19) #define SL_PWM_CHANNEL_0_PIN SL_PWM_CHANNEL0_FAULTB_PIN #else #define SL_PWM_CHANNEL_0_PIN (SL_PWM_CHANNEL0_FAULTB_PIN + 64) #endif #else -#define SL_PWM_CHANNEL_0_PORT SL_SI91X_PWM_FAULTB_PORT +#define SL_PWM_CHANNEL_0_PORT 0 #define SL_PWM_CHANNEL_0_PIN SL_SI91X_PWM_FAULTB_PIN #endif //SL_PWM_CHANNEL0_FAULTB_LOC #define SL_PWM_CHANNEL_0_MUX SL_SI91X_PWM_FAULTB_MUX @@ -251,14 +251,14 @@ extern "C" { #if (SL_PWM_CHANNEL_0_EVENT == 3) #ifdef SL_PWM_CHANNEL0_EXTTRIG1_LOC -#define SL_PWM_CHANNEL_0_PORT SL_PWM_CHANNEL0_TMR_EXT_TRIG_1_PORT +#define SL_PWM_CHANNEL_0_PORT 0 #if ((SL_PWM_CHANNEL0_TMR_EXT_TRIG_1_LOC == 24) || (SL_PWM_CHANNEL0_TMR_EXT_TRIG_1_LOC == 25)) #define SL_PWM_CHANNEL_0_PIN (SL_PWM_CHANNEL0_TMR_EXT_TRIG_1_PIN + 64) #else #define SL_PWM_CHANNEL_0_PIN SL_PWM_CHANNEL0_TMR_EXT_TRIG_1_PIN #endif #else -#define SL_PWM_CHANNEL_0_PORT SL_SI91X_PWM_TMR_EXT_TRIG_1_PORT +#define SL_PWM_CHANNEL_0_PORT 0 #define SL_PWM_CHANNEL_0_PIN SL_SI91X_PWM_TMR_EXT_TRIG_1_PIN #endif //SL_PWM_CHANNEL0_EXTTRIG1_LOC #define SL_PWM_CHANNEL_0_MUX SL_SI91X_PWM_TMR_EXT_TRIG_1_MUX @@ -267,14 +267,14 @@ extern "C" { #if (SL_PWM_CHANNEL_0_EVENT == 4) #ifdef SL_PWM_CHANNEL0_EXTTRIG2_LOC -#define SL_PWM_CHANNEL_0_PORT SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_PORT +#define SL_PWM_CHANNEL_0_PORT 0 #if ((SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_LOC == 28) || (SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_LOC == 29)) #define SL_PWM_CHANNEL_0_PIN (SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_PIN + 64) #else #define SL_PWM_CHANNEL_0_PIN SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_PIN #endif #else -#define SL_PWM_CHANNEL_0_PORT SL_SI91X_PWM_TMR_EXT_TRIG_2_PORT +#define SL_PWM_CHANNEL_0_PORT 0 #define SL_PWM_CHANNEL_0_PIN SL_SI91X_PWM_TMR_EXT_TRIG_2_PIN #endif //SL_PWM_CHANNEL0_EXTTRIG2_LOC #define SL_PWM_CHANNEL_0_MUX SL_SI91X_PWM_TMR_EXT_TRIG_2_MUX diff --git a/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_1_config.h b/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_1_config.h index ddf094130..e9ec59c0c 100644 --- a/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_1_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_1_config.h @@ -101,7 +101,7 @@ extern "C" { // PWM_CH1 1H on GPIO_9 #ifndef SL_PWM_OUT_CHANNEL1_1H_PORT -#define SL_PWM_OUT_CHANNEL1_1H_PORT 0 +#define SL_PWM_OUT_CHANNEL1_1H_PORT HP #endif #ifndef SL_PWM_OUT_CHANNEL1_1H_PIN #define SL_PWM_OUT_CHANNEL1_1H_PIN 9 @@ -112,7 +112,7 @@ extern "C" { // PWM_CH1 1L on GPIO_8 #ifndef SL_PWM_OUT_CHANNEL1_1L_PORT -#define SL_PWM_OUT_CHANNEL1_1L_PORT 0 +#define SL_PWM_OUT_CHANNEL1_1L_PORT HP #endif #ifndef SL_PWM_OUT_CHANNEL1_1L_PIN #define SL_PWM_OUT_CHANNEL1_1L_PIN 8 @@ -132,7 +132,7 @@ extern "C" { // PWM FAULTA on GPIO_25 #ifndef SL_PWM_CHANNEL1_FAULTA_PORT -#define SL_PWM_CHANNEL1_FAULTA_PORT 0 +#define SL_PWM_CHANNEL1_FAULTA_PORT HP #endif #ifndef SL_PWM_CHANNEL1_FAULTA_PIN #define SL_PWM_CHANNEL1_FAULTA_PIN 25 @@ -143,7 +143,7 @@ extern "C" { // PWM FAULTB on GPIO_26 #ifndef SL_PWM_CHANNEL1_FAULTB_PORT -#define SL_PWM_CHANNEL1_FAULTB_PORT 0 +#define SL_PWM_CHANNEL1_FAULTB_PORT HP #endif #ifndef SL_PWM_CHANNEL1_FAULTB_PIN #define SL_PWM_CHANNEL1_FAULTB_PIN 26 @@ -154,7 +154,7 @@ extern "C" { // PWM TMR_EXT_TRIG_1 on GPIO_27 #ifndef SL_PWM_CHANNEL1_TMR_EXT_TRIG_1_PORT -#define SL_PWM_CHANNEL1_TMR_EXT_TRIG_1_PORT 0 +#define SL_PWM_CHANNEL1_TMR_EXT_TRIG_1_PORT HP #endif #ifndef SL_PWM_CHANNEL1_TMR_EXT_TRIG_1_PIN #define SL_PWM_CHANNEL1_TMR_EXT_TRIG_1_PIN 27 @@ -165,7 +165,7 @@ extern "C" { // PWM TMR_EXT_TRIG_2 on GPIO_28 #ifndef SL_PWM_CHANNEL1_TMR_EXT_TRIG_2_PORT -#define SL_PWM_CHANNEL1_TMR_EXT_TRIG_2_PORT 0 +#define SL_PWM_CHANNEL1_TMR_EXT_TRIG_2_PORT HP #endif #ifndef SL_PWM_CHANNEL1_TMR_EXT_TRIG_2_PIN #define SL_PWM_CHANNEL1_TMR_EXT_TRIG_2_PIN 28 @@ -186,10 +186,10 @@ extern "C" { #else #define SL_PWM_CHANNEL_1_PIN_L (SL_PWM_OUT_CHANNEL1_1L_PIN + 64) #endif -#define SL_PWM_CHANNEL_1_PORT_L SL_PWM_OUT_CHANNEL1_1L_PORT +#define SL_PWM_CHANNEL_1_PORT_L 0 #else #define SL_PWM_CHANNEL_1_PIN_L SL_SI91X_PWM_1L_PIN -#define SL_PWM_CHANNEL_1_PORT_L SL_SI91X_PWM_1L_PORT +#define SL_PWM_CHANNEL_1_PORT_L 0 #endif //SL_PWM_OUT_CHANNEL1_1L_LOC #ifdef SL_PWM_OUT_CHANNEL1_1H_LOC #if (SL_PWM_OUT_CHANNEL1_1H_LOC == 5) @@ -197,10 +197,10 @@ extern "C" { #else #define SL_PWM_CHANNEL_1_PIN_H SL_PWM_OUT_CHANNEL1_1H_PIN #endif -#define SL_PWM_CHANNEL_1_PORT_H SL_PWM_OUT_CHANNEL1_1H_PORT +#define SL_PWM_CHANNEL_1_PORT_H 0 #else #define SL_PWM_CHANNEL_1_PIN_H SL_SI91X_PWM_1H_PIN -#define SL_PWM_CHANNEL_1_PORT_H SL_SI91X_PWM_1H_PORT +#define SL_PWM_CHANNEL_1_PORT_H 0 #endif //SL_PWM_OUT_CHANNEL1_1H_LOC #define SL_PWM_CHANNEL_1_MUX_L SL_SI91X_PWM_1L_MUX @@ -212,10 +212,10 @@ extern "C" { // PWM Fault Pin set resolution #if (SL_PWM_CHANNEL_1_EVENT == 0) #ifdef SL_PWM_CHANNEL1_FAULTA_LOC -#define SL_PWM_CHANNEL_1_PORT SL_PWM_CHANNEL1_FAULTA_PORT +#define SL_PWM_CHANNEL_1_PORT 0 #define SL_PWM_CHANNEL_1_PIN SL_PWM_CHANNEL1_FAULTA_PIN #else -#define SL_PWM_CHANNEL_1_PORT SL_SI91X_PWM_FAULTA_PORT +#define SL_PWM_CHANNEL_1_PORT 0 #define SL_PWM_CHANNEL_1_PIN SL_SI91X_PWM_FAULTA_PIN #endif //SL_PWM_CHANNEL1_FAULTA_LOC #define SL_PWM_CHANNEL_1_MUX 0 @@ -224,10 +224,10 @@ extern "C" { #if (SL_PWM_CHANNEL_1_EVENT == 1) #ifdef SL_PWM_CHANNEL1_FAULTA_LOC -#define SL_PWM_CHANNEL_1_PORT SL_PWM_CHANNEL1_FAULTA_PORT +#define SL_PWM_CHANNEL_1_PORT 0 #define SL_PWM_CHANNEL_1_PIN SL_PWM_CHANNEL1_FAULTA_PIN #else -#define SL_PWM_CHANNEL_1_PORT SL_SI91X_PWM_FAULTA_PORT +#define SL_PWM_CHANNEL_1_PORT 0 #define SL_PWM_CHANNEL_1_PIN SL_SI91X_PWM_FAULTA_PIN #endif //SL_PWM_CHANNEL1_FAULTA_LOC #define SL_PWM_CHANNEL_1_MUX SL_SI91X_PWM_FAULTA_MUX @@ -236,14 +236,14 @@ extern "C" { #if (SL_PWM_CHANNEL_1_EVENT == 2) #ifdef SL_PWM_CHANNEL1_FAULTB_LOC -#define SL_PWM_CHANNEL_1_PORT SL_PWM_CHANNEL1_FAULTB_PORT +#define SL_PWM_CHANNEL_1_PORT 0 #if (SL_PWM_CHANNEL1_FAULTB_LOC == 19) #define SL_PWM_CHANNEL_1_PIN SL_PWM_CHANNEL1_FAULTB_PIN #else #define SL_PWM_CHANNEL_1_PIN (SL_PWM_CHANNEL1_FAULTB_PIN + 64) #endif #else -#define SL_PWM_CHANNEL_1_PORT SL_SI91X_PWM_FAULTB_PORT +#define SL_PWM_CHANNEL_1_PORT 0 #define SL_PWM_CHANNEL_1_PIN SL_SI91X_PWM_FAULTB_PIN #endif //SL_PWM_CHANNEL1_FAULTB_LOC #define SL_PWM_CHANNEL_1_MUX SL_SI91X_PWM_FAULTB_MUX @@ -252,14 +252,14 @@ extern "C" { #if (SL_PWM_CHANNEL_1_EVENT == 3) #ifdef SL_PWM_CHANNEL1_EXTTRIG1_LOC -#define SL_PWM_CHANNEL_1_PORT SL_PWM_CHANNEL1_TMR_EXT_TRIG_1_PORT +#define SL_PWM_CHANNEL_1_PORT 0 #if ((SL_PWM_CHANNEL1_TMR_EXT_TRIG_1_LOC == 24) || (SL_PWM_CHANNEL1_TMR_EXT_TRIG_1_LOC == 25)) #define SL_PWM_CHANNEL_1_PIN (SL_PWM_CHANNEL1_TMR_EXT_TRIG_1_PIN + 64) #else #define SL_PWM_CHANNEL_1_PIN SL_PWM_CHANNEL1_TMR_EXT_TRIG_1_PIN #endif #else -#define SL_PWM_CHANNEL_1_PORT SL_SI91X_PWM_TMR_EXT_TRIG_1_PORT +#define SL_PWM_CHANNEL_1_PORT 0 #define SL_PWM_CHANNEL_1_PIN SL_SI91X_PWM_TMR_EXT_TRIG_1_PIN #endif //SL_PWM_CHANNEL1_EXTTRIG1_LOC #define SL_PWM_CHANNEL_1_MUX SL_SI91X_PWM_TMR_EXT_TRIG_1_MUX @@ -268,14 +268,14 @@ extern "C" { #if (SL_PWM_CHANNEL_1_EVENT == 4) #ifdef SL_PWM_CHANNEL1_EXTTRIG2_LOC -#define SL_PWM_CHANNEL_1_PORT SL_PWM_CHANNEL1_TMR_EXT_TRIG_2_PORT +#define SL_PWM_CHANNEL_1_PORT 0 #if ((SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_LOC == 28) || (SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_LOC == 29)) #define SL_PWM_CHANNEL_1_PIN (SL_PWM_CHANNEL1_TMR_EXT_TRIG_2_PIN + 64) #else #define SL_PWM_CHANNEL_1_PIN SL_PWM_CHANNEL1_TMR_EXT_TRIG_2_PIN #endif #else -#define SL_PWM_CHANNEL_1_PORT SL_SI91X_PWM_TMR_EXT_TRIG_2_PORT +#define SL_PWM_CHANNEL_1_PORT 0 #define SL_PWM_CHANNEL_1_PIN SL_SI91X_PWM_TMR_EXT_TRIG_2_PIN #endif //SL_PWM_CHANNEL1_EXTTRIG2_LOC #define SL_PWM_CHANNEL_1_MUX SL_SI91X_PWM_TMR_EXT_TRIG_2_MUX diff --git a/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_2_config.h b/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_2_config.h index d57832f0b..9fbef7e17 100644 --- a/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_2_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_2_config.h @@ -101,7 +101,7 @@ extern "C" { // PWM_CH2 2H on GPIO_11 #ifndef SL_PWM_OUT_CHANNEL2_2H_PORT -#define SL_PWM_OUT_CHANNEL2_2H_PORT 0 +#define SL_PWM_OUT_CHANNEL2_2H_PORT HP #endif #ifndef SL_PWM_OUT_CHANNEL2_2H_PIN #define SL_PWM_OUT_CHANNEL2_2H_PIN 11 @@ -112,7 +112,7 @@ extern "C" { // PWM_CH2 2L on GPIO_10 #ifndef SL_PWM_OUT_CHANNEL2_2L_PORT -#define SL_PWM_OUT_CHANNEL2_2L_PORT 0 +#define SL_PWM_OUT_CHANNEL2_2L_PORT HP #endif #ifndef SL_PWM_OUT_CHANNEL2_2L_PIN #define SL_PWM_OUT_CHANNEL2_2L_PIN 10 @@ -132,7 +132,7 @@ extern "C" { // PWM FAULTA on GPIO_25 #ifndef SL_PWM_CHANNEL2_FAULTA_PORT -#define SL_PWM_CHANNEL2_FAULTA_PORT 0 +#define SL_PWM_CHANNEL2_FAULTA_PORT HP #endif #ifndef SL_PWM_CHANNEL2_FAULTA_PIN #define SL_PWM_CHANNEL2_FAULTA_PIN 25 @@ -143,7 +143,7 @@ extern "C" { // PWM FAULTB on GPIO_26 #ifndef SL_PWM_CHANNEL2_FAULTB_PORT -#define SL_PWM_CHANNEL2_FAULTB_PORT 0 +#define SL_PWM_CHANNEL2_FAULTB_PORT HP #endif #ifndef SL_PWM_CHANNEL2_FAULTB_PIN #define SL_PWM_CHANNEL2_FAULTB_PIN 26 @@ -154,7 +154,7 @@ extern "C" { // PWM TMR_EXT_TRIG_1 on GPIO_27 #ifndef SL_PWM_CHANNEL2_TMR_EXT_TRIG_1_PORT -#define SL_PWM_CHANNEL2_TMR_EXT_TRIG_1_PORT 0 +#define SL_PWM_CHANNEL2_TMR_EXT_TRIG_1_PORT HP #endif #ifndef SL_PWM_CHANNEL2_TMR_EXT_TRIG_1_PIN #define SL_PWM_CHANNEL2_TMR_EXT_TRIG_1_PIN 27 @@ -165,7 +165,7 @@ extern "C" { // PWM TMR_EXT_TRIG_2 on GPIO_28 #ifndef SL_PWM_CHANNEL2_TMR_EXT_TRIG_2_PORT -#define SL_PWM_CHANNEL2_TMR_EXT_TRIG_2_PORT 0 +#define SL_PWM_CHANNEL2_TMR_EXT_TRIG_2_PORT HP #endif #ifndef SL_PWM_CHANNEL2_TMR_EXT_TRIG_2_PIN #define SL_PWM_CHANNEL2_TMR_EXT_TRIG_2_PIN 28 @@ -186,10 +186,10 @@ extern "C" { #else #define SL_PWM_CHANNEL_2_PIN_L (SL_PWM_OUT_CHANNEL2_2L_PIN + 64) #endif -#define SL_PWM_CHANNEL_2_PORT_L SL_PWM_OUT_CHANNEL2_2L_PORT +#define SL_PWM_CHANNEL_2_PORT_L 0 #else #define SL_PWM_CHANNEL_2_PIN_L SL_SI91X_PWM_2L_PIN -#define SL_PWM_CHANNEL_2_PORT_L SL_SI91X_PWM_2L_PORT +#define SL_PWM_CHANNEL_2_PORT_L 0 #endif //SL_PWM_OUT_CHANNEL2_2L_LOC #ifdef SL_PWM_OUT_CHANNEL2_2H_LOC #if (SL_PWM_OUT_CHANNEL2_2H_LOC == 9) @@ -197,10 +197,10 @@ extern "C" { #else #define SL_PWM_CHANNEL_2_PIN_H (SL_PWM_OUT_CHANNEL2_2H_PIN + 64) #endif -#define SL_PWM_CHANNEL_2_PORT_H SL_PWM_OUT_CHANNEL2_2H_PORT +#define SL_PWM_CHANNEL_2_PORT_H 0 #else #define SL_PWM_CHANNEL_2_PIN_H SL_SI91X_PWM_2H_PIN -#define SL_PWM_CHANNEL_2_PORT_H SL_SI91X_PWM_2H_PORT +#define SL_PWM_CHANNEL_2_PORT_H 0 #endif //SL_PWM_OUT_CHANNEL2_2H_LOC #define SL_PWM_CHANNEL_2_MUX_L SL_SI91X_PWM_2L_MUX @@ -212,10 +212,10 @@ extern "C" { // PWM Fault Pin set resolution #if (SL_PWM_CHANNEL_2_EVENT == 0) #ifdef SL_PWM_CHANNEL2_FAULTA_LOC -#define SL_PWM_CHANNEL_2_PORT SL_PWM_CHANNEL2_FAULTA_PORT +#define SL_PWM_CHANNEL_2_PORT 0 #define SL_PWM_CHANNEL_2_PIN SL_PWM_CHANNEL2_FAULTA_PIN #else -#define SL_PWM_CHANNEL_2_PORT SL_SI91X_PWM_FAULTA_PORT +#define SL_PWM_CHANNEL_2_PORT 0 #define SL_PWM_CHANNEL_2_PIN SL_SI91X_PWM_FAULTA_PIN #endif //SL_PWM_CHANNEL2_FAULTA_LOC #define SL_PWM_CHANNEL_2_MUX 0 @@ -224,10 +224,10 @@ extern "C" { #if (SL_PWM_CHANNEL_2_EVENT == 1) #ifdef SL_PWM_CHANNEL2_FAULTA_LOC -#define SL_PWM_CHANNEL_2_PORT SL_PWM_CHANNEL2_FAULTA_PORT +#define SL_PWM_CHANNEL_2_PORT 0 #define SL_PWM_CHANNEL_2_PIN SL_PWM_CHANNEL2_FAULTA_PIN #else -#define SL_PWM_CHANNEL_2_PORT SL_SI91X_PWM_FAULTA_PORT +#define SL_PWM_CHANNEL_2_PORT 0 #define SL_PWM_CHANNEL_2_PIN SL_SI91X_PWM_FAULTA_PIN #endif //SL_PWM_CHANNEL2_FAULTA_LOC #define SL_PWM_CHANNEL_2_MUX SL_SI91X_PWM_FAULTA_MUX @@ -236,14 +236,14 @@ extern "C" { #if (SL_PWM_CHANNEL_2_EVENT == 2) #ifdef SL_PWM_CHANNEL2_FAULTB_LOC -#define SL_PWM_CHANNEL_2_PORT SL_PWM_CHANNEL2_FAULTB_PORT +#define SL_PWM_CHANNEL_2_PORT 0 #if (SL_PWM_CHANNEL2_FAULTB_LOC == 19) #define SL_PWM_CHANNEL_2_PIN SL_PWM_CHANNEL2_FAULTB_PIN #else #define SL_PWM_CHANNEL_2_PIN (SL_PWM_CHANNEL2_FAULTB_PIN + 64) #endif #else -#define SL_PWM_CHANNEL_2_PORT SL_SI91X_PWM_FAULTB_PORT +#define SL_PWM_CHANNEL_2_PORT 0 #define SL_PWM_CHANNEL_2_PIN SL_SI91X_PWM_FAULTB_PIN #endif //SL_PWM_CHANNEL2_FAULTB_LOC #define SL_PWM_CHANNEL_2_MUX SL_SI91X_PWM_FAULTB_MUX @@ -252,14 +252,14 @@ extern "C" { #if (SL_PWM_CHANNEL_2_EVENT == 3) #ifdef SL_PWM_CHANNEL2_EXTTRIG1_LOC -#define SL_PWM_CHANNEL_2_PORT SL_PWM_CHANNEL2_TMR_EXT_TRIG_1_PORT +#define SL_PWM_CHANNEL_2_PORT 0 #if ((SL_PWM_CHANNEL2_TMR_EXT_TRIG_1_LOC == 24) || (SL_PWM_CHANNEL2_TMR_EXT_TRIG_1_LOC == 25)) #define SL_PWM_CHANNEL_2_PIN (SL_PWM_CHANNEL2_TMR_EXT_TRIG_1_PIN + 64) #else #define SL_PWM_CHANNEL_2_PIN SL_PWM_CHANNEL2_TMR_EXT_TRIG_1_PIN #endif #else -#define SL_PWM_CHANNEL_2_PORT SL_SI91X_PWM_TMR_EXT_TRIG_1_PORT +#define SL_PWM_CHANNEL_2_PORT 0 #define SL_PWM_CHANNEL_2_PIN SL_SI91X_PWM_TMR_EXT_TRIG_1_PIN #endif //SL_PWM_CHANNEL2_EXTTRIG1_LOC #define SL_PWM_CHANNEL_2_MUX SL_SI91X_PWM_TMR_EXT_TRIG_1_MUX @@ -268,14 +268,14 @@ extern "C" { #if (SL_PWM_CHANNEL_2_EVENT == 4) #ifdef SL_PWM_CHANNEL2_EXTTRIG2_LOC -#define SL_PWM_CHANNEL_2_PORT SL_PWM_CHANNEL2_TMR_EXT_TRIG_2_PORT +#define SL_PWM_CHANNEL_2_PORT 0 #if ((SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_LOC == 28) || (SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_LOC == 29)) #define SL_PWM_CHANNEL_2_PIN (SL_PWM_CHANNEL2_TMR_EXT_TRIG_2_PIN + 64) #else #define SL_PWM_CHANNEL_2_PIN SL_PWM_CHANNEL2_TMR_EXT_TRIG_2_PIN #endif #else -#define SL_PWM_CHANNEL_2_PORT SL_SI91X_PWM_TMR_EXT_TRIG_2_PORT +#define SL_PWM_CHANNEL_2_PORT 0 #define SL_PWM_CHANNEL_2_PIN SL_SI91X_PWM_TMR_EXT_TRIG_2_PIN #endif //SL_PWM_CHANNEL2_EXTTRIG2_LOC #define SL_PWM_CHANNEL_2_MUX SL_SI91X_PWM_TMR_EXT_TRIG_2_MUX diff --git a/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_3_config.h b/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_3_config.h index 98ca6c820..70c7300c6 100644 --- a/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_3_config.h +++ b/components/board/silabs/config/common_config/sl_si91x_pwm_init_channel_3_config.h @@ -101,7 +101,7 @@ extern "C" { // PWM_CH3 3H on GPIO_15 #ifndef SL_PWM_OUT_CHANNEL3_3H_PORT -#define SL_PWM_OUT_CHANNEL3_3H_PORT 0 +#define SL_PWM_OUT_CHANNEL3_3H_PORT HP #endif #ifndef SL_PWM_OUT_CHANNEL3_3H_PIN #define SL_PWM_OUT_CHANNEL3_3H_PIN 7 @@ -112,7 +112,7 @@ extern "C" { // PWM_CH3 3L on ULP_GPIO_6/GPIO_70 #ifndef SL_PWM_OUT_CHANNEL3_3L_PORT -#define SL_PWM_OUT_CHANNEL3_3L_PORT 0 +#define SL_PWM_OUT_CHANNEL3_3L_PORT ULP #endif #ifndef SL_PWM_OUT_CHANNEL3_3L_PIN #define SL_PWM_OUT_CHANNEL3_3L_PIN 6 @@ -132,7 +132,7 @@ extern "C" { // PWM FAULTA on GPIO_25 #ifndef SL_PWM_CHANNEL3_FAULTA_PORT -#define SL_PWM_CHANNEL3_FAULTA_PORT 0 +#define SL_PWM_CHANNEL3_FAULTA_PORT HP #endif #ifndef SL_PWM_CHANNEL3_FAULTA_PIN #define SL_PWM_CHANNEL3_FAULTA_PIN 25 @@ -143,7 +143,7 @@ extern "C" { // PWM FAULTB on GPIO_26 #ifndef SL_PWM_CHANNEL3_FAULTB_PORT -#define SL_PWM_CHANNEL3_FAULTB_PORT 0 +#define SL_PWM_CHANNEL3_FAULTB_PORT HP #endif #ifndef SL_PWM_CHANNEL3_FAULTB_PIN #define SL_PWM_CHANNEL3_FAULTB_PIN 26 @@ -154,7 +154,7 @@ extern "C" { // PWM TMR_EXT_TRIG_1 on GPIO_27 #ifndef SL_PWM_CHANNEL3_TMR_EXT_TRIG_1_PORT -#define SL_PWM_CHANNEL3_TMR_EXT_TRIG_1_PORT 0 +#define SL_PWM_CHANNEL3_TMR_EXT_TRIG_1_PORT HP #endif #ifndef SL_PWM_CHANNEL3_TMR_EXT_TRIG_1_PIN #define SL_PWM_CHANNEL3_TMR_EXT_TRIG_1_PIN 27 @@ -165,7 +165,7 @@ extern "C" { // PWM TMR_EXT_TRIG_2 on GPIO_28 #ifndef SL_PWM_CHANNEL3_TMR_EXT_TRIG_2_PORT -#define SL_PWM_CHANNEL3_TMR_EXT_TRIG_2_PORT 0 +#define SL_PWM_CHANNEL3_TMR_EXT_TRIG_2_PORT HP #endif #ifndef SL_PWM_CHANNEL3_TMR_EXT_TRIG_2_PIN #define SL_PWM_CHANNEL3_TMR_EXT_TRIG_2_PIN 28 @@ -186,10 +186,10 @@ extern "C" { #else #define SL_PWM_CHANNEL_3_PIN_L SL_PWM_OUT_CHANNEL3_3L_PIN #endif -#define SL_PWM_CHANNEL_3_PORT_L SL_PWM_OUT_CHANNEL3_3L_PORT +#define SL_PWM_CHANNEL_3_PORT_L 0 #else #define SL_PWM_CHANNEL_3_PIN_L SL_SI91X_PWM_3L_PIN -#define SL_PWM_CHANNEL_3_PORT_L SL_SI91X_PWM_3L_PORT +#define SL_PWM_CHANNEL_3_PORT_L 0 #endif //SL_PWM_OUT_CHANNEL3_3L_LOC #ifdef SL_PWM_OUT_CHANNEL3_3L_LOC @@ -198,10 +198,10 @@ extern "C" { #else #define SL_PWM_CHANNEL_3_PIN_H SL_PWM_OUT_CHANNEL3_3H_PIN #endif -#define SL_PWM_CHANNEL_3_PORT_H SL_PWM_OUT_CHANNEL3_3H_PORT +#define SL_PWM_CHANNEL_3_PORT_H 0 #else #define SL_PWM_CHANNEL_3_PIN_H SL_SI91X_PWM_3H_PIN -#define SL_PWM_CHANNEL_3_PORT_H SL_SI91X_PWM_3H_PORT +#define SL_PWM_CHANNEL_3_PORT_H 0 #endif //SL_PWM_OUT_CHANNEL3_3L_LOC #define SL_PWM_CHANNEL_3_MUX_L SL_SI91X_PWM_3L_MUX @@ -213,10 +213,10 @@ extern "C" { // PWM Fault Pin set resolution #if (SL_PWM_CHANNEL_3_EVENT == 0) #ifdef SL_PWM_CHANNEL3_FAULTA_LOC -#define SL_PWM_CHANNEL_3_PORT SL_PWM_CHANNEL3_FAULTA_PORT +#define SL_PWM_CHANNEL_3_PORT 0 #define SL_PWM_CHANNEL_3_PIN SL_PWM_CHANNEL3_FAULTA_PIN #else -#define SL_PWM_CHANNEL_3_PORT SL_SI91X_PWM_FAULTA_PORT +#define SL_PWM_CHANNEL_3_PORT 0 #define SL_PWM_CHANNEL_3_PIN SL_SI91X_PWM_FAULTA_PIN #endif //SL_PWM_CHANNEL3_FAULTA_LOC #define SL_PWM_CHANNEL_3_MUX 0 @@ -225,10 +225,10 @@ extern "C" { #if (SL_PWM_CHANNEL_3_EVENT == 1) #ifdef SL_PWM_CHANNEL3_FAULTA_LOC -#define SL_PWM_CHANNEL_3_PORT SL_PWM_CHANNEL3_FAULTA_PORT +#define SL_PWM_CHANNEL_3_PORT 0 #define SL_PWM_CHANNEL_3_PIN SL_PWM_CHANNEL3_FAULTA_PIN #else -#define SL_PWM_CHANNEL_3_PORT SL_SI91X_PWM_FAULTA_PORT +#define SL_PWM_CHANNEL_3_PORT 0 #define SL_PWM_CHANNEL_3_PIN SL_SI91X_PWM_FAULTA_PIN #endif //SL_PWM_CHANNEL3_FAULTA_LOC #define SL_PWM_CHANNEL_3_MUX SL_SI91X_PWM_FAULTA_MUX @@ -237,14 +237,14 @@ extern "C" { #if (SL_PWM_CHANNEL_3_EVENT == 2) #ifdef SL_PWM_CHANNEL3_FAULTB_LOC -#define SL_PWM_CHANNEL_3_PORT SL_PWM_CHANNEL3_FAULTB_PORT +#define SL_PWM_CHANNEL_3_PORT 0 #if (SL_PWM_CHANNEL3_FAULTB_LOC == 19) #define SL_PWM_CHANNEL_3_PIN SL_PWM_CHANNEL3_FAULTB_PIN #else #define SL_PWM_CHANNEL_3_PIN (SL_PWM_CHANNEL3_FAULTB_PIN + 64) #endif #else -#define SL_PWM_CHANNEL_3_PORT SL_SI91X_PWM_FAULTB_PORT +#define SL_PWM_CHANNEL_3_PORT 0 #define SL_PWM_CHANNEL_3_PIN SL_SI91X_PWM_FAULTB_PIN #endif //SL_PWM_CHANNEL3_FAULTB_LOC #define SL_PWM_CHANNEL_3_MUX SL_SI91X_PWM_FAULTB_MUX @@ -253,14 +253,14 @@ extern "C" { #if (SL_PWM_CHANNEL_3_EVENT == 3) #ifdef SL_PWM_CHANNEL3_EXTTRIG1_LOC -#define SL_PWM_CHANNEL_3_PORT SL_PWM_CHANNEL3_TMR_EXT_TRIG_1_PORT +#define SL_PWM_CHANNEL_3_PORT 0 #if ((SL_PWM_CHANNEL3_TMR_EXT_TRIG_1_LOC == 24) || (SL_PWM_CHANNEL3_TMR_EXT_TRIG_1_LOC == 25)) #define SL_PWM_CHANNEL_3_PIN (SL_PWM_CHANNEL3_TMR_EXT_TRIG_1_PIN + 64) #else #define SL_PWM_CHANNEL_3_PIN SL_PWM_CHANNEL3_TMR_EXT_TRIG_1_PIN #endif #else -#define SL_PWM_CHANNEL_3_PORT SL_SI91X_PWM_TMR_EXT_TRIG_1_PORT +#define SL_PWM_CHANNEL_3_PORT 0 #define SL_PWM_CHANNEL_3_PIN SL_SI91X_PWM_TMR_EXT_TRIG_1_PIN #endif //SL_PWM_CHANNEL3_EXTTRIG1_LOC #define SL_PWM_CHANNEL_3_MUX SL_SI91X_PWM_TMR_EXT_TRIG_1_MUX @@ -269,14 +269,14 @@ extern "C" { #if (SL_PWM_CHANNEL_3_EVENT == 4) #ifdef SL_PWM_CHANNEL3_EXTTRIG2_LOC -#define SL_PWM_CHANNEL_3_PORT SL_PWM_CHANNEL3_TMR_EXT_TRIG_2_PORT +#define SL_PWM_CHANNEL_3_PORT 0 #if ((SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_LOC == 28) || (SL_PWM_CHANNEL0_TMR_EXT_TRIG_2_LOC == 29)) #define SL_PWM_CHANNEL_3_PIN (SL_PWM_CHANNEL3_TMR_EXT_TRIG_2_PIN + 64) #else #define SL_PWM_CHANNEL_3_PIN SL_PWM_CHANNEL3_TMR_EXT_TRIG_2_PIN #endif #else -#define SL_PWM_CHANNEL_3_PORT SL_SI91X_PWM_TMR_EXT_TRIG_2_PORT +#define SL_PWM_CHANNEL_3_PORT 0 #define SL_PWM_CHANNEL_3_PIN SL_SI91X_PWM_TMR_EXT_TRIG_2_PIN #endif //SL_PWM_CHANNEL3_EXTTRIG2_LOC #define SL_PWM_CHANNEL_3_MUX SL_SI91X_PWM_TMR_EXT_TRIG_2_MUX diff --git a/components/board/silabs/config/common_config/sl_si91x_pwm_init_led1_config.h b/components/board/silabs/config/common_config/sl_si91x_pwm_init_led1_config.h new file mode 100644 index 000000000..d9356a95f --- /dev/null +++ b/components/board/silabs/config/common_config/sl_si91x_pwm_init_led1_config.h @@ -0,0 +1,156 @@ +/***************************************************************************/ /** +* @file sl_si91x_pwm_init_led1_config.h +* @brief PWM configuration file. +******************************************************************************* +* # License +* Copyright 2024 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_PWM_LED1_CONFIG_H +#define SL_SI91X_PWM_LED1_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif +/******************************************************************************/ +/******************************* PWM Configuration **************************/ +// PWM LED1 Configuration + +// Frequency <500-200000> +// Default: 25000 +#define SL_PWM_LED1_FREQUENCY 25000 + +// Output Polarity Low +// POLARITY_LOW +// POLARITY_HIGH +// Default: SL_POLARITYL_HIGH +#define SL_PWM_LED1_POLARITY_LOW SL_POLARITYL_HIGH + +// Output Polarity High +// POLARITY_LOW +// POLARITY_HIGH +// Default: SL_POLARITYH_HIGH +#define SL_PWM_LED1_POLARITY_HIGH SL_POLARITYH_HIGH + +// PWM Mode +// Independent +// Complementary +// Default: SL_INDEPENDENT +#define SL_PWM_LED1_MODE SL_MODE_INDEPENDENT + +// Timer Counter <0-655365> +// Default: 0 +#define SL_PWM_LED1_TIMER_COUNTER 0 + +// Duty Cycle <0-100> +// Default: 50 +#define SL_PWM_LED1_DUTY_CYCLE 50 + +// Base Timer Mode +// Free Run +// Single Event +// Down Count +// Up_Down +// Up_Down Double +// Default: SL_FREE_RUN_MODE +#define SL_PWM_LED1_TIMER_MODE SL_FREE_RUN_MODE + +// Base Timer Selection +// Timer(Each Channel) +// Timer(All Channels) +// Default: SL_BASE_TIMER_EACH_CHANNEL +#define SL_PWM_LED1_TIMER_SELECTION SL_BASE_TIMER_EACH_CHANNEL + +// Ext Trigger +// <0=> None +// <1=> Fault A +// <2=> Fault B +// <3=> Ext Trigger1 +// <4=> Ext Trigger2 +// Default: 0 +#define SL_PWM_LED1_EVENT 0 + +// +/******************************************************************************/ +// <<< end of configuration section >>> + +// PWM channel number for LED1 instance +#define SL_PWM_LED1_OUTPUT_CHANNEL 2 + +// Pin set for LED1 PWM channel +#define SL_PWM_LED1_PIN_L 10 +#define SL_PWM_LED1_PIN_H 11 + +#define SL_PWM_LED1_PORT_L 0 +#define SL_PWM_LED1_PORT_H 0 + +#define SL_PWM_LED1_MUX_L 10 +#define SL_PWM_LED1_MUX_H 10 + +#define SL_PWM_LED1_PAD_L 5 +#define SL_PWM_LED1_PAD_H 6 + +// PWM Fault Pin set resolution +#if (SL_PWM_LED1_EVENT == 0) +#define SL_PWM_LED1_PORT SL_SI91X_PWM_FAULTA_PORT +#define SL_PWM_LED1_PIN SL_SI91X_PWM_FAULTA_PIN +#define SL_PWM_LED1_MUX 0 +#define SL_PWM_LED1_PAD SL_SI91X_PWM_FAULTA_PAD +#endif + +#if (SL_PWM_LED1_EVENT == 1) +#define SL_PWM_LED1_PORT SL_SI91X_PWM_FAULTA_PORT +#define SL_PWM_LED1_PIN SL_SI91X_PWM_FAULTA_PIN +#define SL_PWM_LED1_MUX SL_SI91X_PWM_FAULTA_MUX +#define SL_PWM_LED1_PAD SL_SI91X_PWM_FAULTA_PAD +#endif + +#if (SL_PWM_LED1_EVENT == 2) +#define SL_PWM_LED1_PORT SL_SI91X_PWM_FAULTB_PORT +#define SL_PWM_LED1_PIN SL_SI91X_PWM_FAULTB_PIN +#define SL_PWM_LED1_MUX SL_SI91X_PWM_FAULTB_MUX +#define SL_PWM_LED1_PAD SL_SI91X_PWM_FAULTB_PAD +#endif + +#if (SL_PWM_LED1_EVENT == 3) +#define SL_PWM_LED1_PORT SL_SI91X_PWM_TMR_EXT_TRIG_1_PORT +#define SL_PWM_LED1_PIN SL_SI91X_PWM_TMR_EXT_TRIG_1_PIN +#define SL_PWM_LED1_MUX SL_SI91X_PWM_TMR_EXT_TRIG_1_MUX +#define SL_PWM_LED1_PAD SL_SI91X_PWM_TMR_EXT_TRIG_1_PAD +#endif + +#if (SL_PWM_LED1_EVENT == 4) +#define SL_PWM_LED1_PORT SL_SI91X_PWM_TMR_EXT_TRIG_2_PORT +#define SL_PWM_LED1_PIN SL_SI91X_PWM_TMR_EXT_TRIG_2_PIN +#define SL_PWM_LED1_MUX SL_SI91X_PWM_TMR_EXT_TRIG_2_MUX +#define SL_PWM_LED1_PAD SL_SI91X_PWM_TMR_EXT_TRIG_2_PAD +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* SL_SI91X_PWM_LED1_CONFIG_H */ \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/core/chip/component/device_needs_ram_execution.slcc b/components/device/silabs/si91x/mcu/core/chip/component/device_needs_ram_execution.slcc index f2586ad14..78c7f559a 100644 --- a/components/device/silabs/si91x/mcu/core/chip/component/device_needs_ram_execution.slcc +++ b/components/device/silabs/si91x/mcu/core/chip/component/device_needs_ram_execution.slcc @@ -10,9 +10,7 @@ quality: production provides: - name: device_needs_ram_execution define: - - name: SLI_SI91X_MCU_ENABLE_RAM_BASED_EXECUTION - - name: SLI_SI91X_MCU_ENABLE_PSRAM_SECTION_FEATURE - condition: [wiseconnect_toolchain_psram_linker] + - name: SLI_SI91X_MCU_ENABLE_RAM_BASED_EXECUTION template_contribution: - name: ram_execution value: true diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m100mgtba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m100mgtba.slcc index 67512558a..e6127e34a 100644 --- a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m100mgtba.slcc +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m100mgtba.slcc @@ -48,6 +48,7 @@ - name: device_has_mvp - name: device_compute_mvp - name: device_has_mpu + - name: device_has_chip - requires: - name: rsilib_chip - name: romdriver_clks @@ -137,7 +138,7 @@ - name: Main Flash page_size: 256 size: 8388608 - start: 136060928 + start: 136323072 # 0x0820 2000 type: non-volatile # TODO: Check these Values - name: RAM diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m100xntba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m100xntba.slcc index 7b6597fef..b3aa65882 100644 --- a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m100xntba.slcc +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m100xntba.slcc @@ -47,6 +47,8 @@ - name: device_compute_mvp - name: armv7em - name: device_has_mpu + - name: device_has_chip + - name: device_supports_external_flash - requires: - name: rsilib_chip - name: romdriver_clks diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m110lgtba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m110lgtba.slcc index 7baca8a3a..ba10450a6 100644 --- a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m110lgtba.slcc +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m110lgtba.slcc @@ -46,6 +46,7 @@ - name: device_supports_psram - name: device_has_stacked_flash - name: device_has_mpu + - name: device_has_chip - requires: - name: rsilib_chip - name: romdriver_clks @@ -82,34 +83,34 @@ # Default Memory configuration - name: device_flash_addr - value: 136323072 # 0x0820 2000 + value: 135733248 # 0x0817 2000 priority: 1000 condition: - si917_mem_config_1 - name: device_flash_size - value: 2088960 # 0x001F E000 + value: 1232896 # 0x0012 D000 priority: 1000 condition: - si917_mem_config_1 # Medium Memory configuration - name: device_flash_addr - value: 136323072 # 0x0820 2000 + value: 135733248 # 0x0817 2000 priority: 1000 condition: - si917_mem_config_2 - name: device_flash_size - value: 2088960 # 0x001F E000 + value: 1232896 # 0x0012 D000 priority: 1000 condition: - si917_mem_config_2 # Advanced Memory configuration - name: device_flash_addr - value: 136323072 # 0x0820 2000 + value: 135733248 # 0x0817 2000 priority: 1000 condition: - si917_mem_config_3 - name: device_flash_size - value: 2088960 # 0x001F E000 + value: 1232896 # 0x0012 D000 priority: 1000 condition: - si917_mem_config_3 @@ -135,7 +136,7 @@ - name: Main Flash page_size: 256 size: 4194304 - start: 136060928 + start: 135733248 # 0x0817 2000 type: non-volatile # TODO: Check these Values - name: RAM diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m111mgtba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m111mgtba.slcc index e9dddce62..5f40f47bc 100644 --- a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m111mgtba.slcc +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m111mgtba.slcc @@ -45,6 +45,7 @@ - name: device_supports_psram - name: device_has_stacked_flash - name: device_has_mpu + - name: device_has_chip - requires: - name: rsilib_chip - name: romdriver_clks @@ -75,7 +76,6 @@ value: 7168 - name: nvm3_size value: 65536 - - name: flash_present value: 1 @@ -134,7 +134,7 @@ - name: Main Flash page_size: 256 size: 8388608 - start: 136060928 + start: 136323072 # 0x0820 2000 type: non-volatile # TODO: Check these Values - name: RAM diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m111xgtba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m111xgtba.slcc index 00d298602..187ab9ea7 100644 --- a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m111xgtba.slcc +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m111xgtba.slcc @@ -50,6 +50,8 @@ - name: device_compute_mvp - name: device_supports_psram - name: device_has_mpu + - name: device_has_chip + - name: device_supports_external_flash - requires: - name: rsilib_chip - name: romdriver_clks diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m121xgtba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m121xgtba.slcc index a35c87c8f..69a0a729f 100644 --- a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m121xgtba.slcc +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m121xgtba.slcc @@ -52,6 +52,8 @@ - name: device_has_stacked_psram - name: device_supports_psram - name: device_has_mpu + - name: device_has_chip + - name: device_supports_external_flash - requires: - name: rsilib_chip - name: romdriver_clks diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m141xgtba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m141xgtba.slcc index 0a6e7dd8d..94cc9a0ef 100644 --- a/components/device/silabs/si91x/mcu/core/chip/component/siwg917m141xgtba.slcc +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917m141xgtba.slcc @@ -52,6 +52,8 @@ - name: device_has_stacked_psram - name: device_supports_psram - name: device_has_mpu + - name: device_has_chip + - name: device_supports_external_flash - requires: - name: rsilib_chip - name: romdriver_clks diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y110lgaba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y110lgaba.slcc new file mode 100644 index 000000000..a50ba9cb2 --- /dev/null +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y110lgaba.slcc @@ -0,0 +1,149 @@ +!!omap +- id: SIWG917Y110LGABA +- package: platform-internal-cmsis-headers +- description: Silicon Labs CMSIS-Device part headers for SIWG917Y110LGABA. +- category: Device|Si91x|MCU|Device Part|SIWG917 +- ui_hints: + visibility: never +- quality: production +- define: + - name: SIWG917Y110LGABA + unless: + - device_content_override + - name: SLI_SI917 + value: '1' + - name: SLI_SI917B0 + value: '1' + - name: SL_SI91X_ACX_MODULE + value: '1' + - name: SLI_SI91X_MCU_ENABLE_FLASH_BASED_EXECUTION + value: '1' + - name: SRAM_BASE + value: "0x0cUL" + unless: [rsilib_board] + - name: SRAM_SIZE + value: "0x2fc00UL" + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_VER2 + unless: [rsilib_board] +- source: + - path: components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c + - path: components/device/silabs/si91x/mcu/core/chip/src/startup_si91x.c + unless: [siwx917_soc_custom_startup] +- include: + - file_list: + - path: system_si91x.h + - path: si91x_device.h + path: components/device/silabs/si91x/mcu/core/chip/inc/ +- provides: + - name: siwg917y110lgaba + - name: device_si91x + - name: device_family_siwg917 + - name: si91x_platform + - name: device_arm + - name: cortexm4 + - name: armv7em + - name: device_supports_psram + - name: device_has_stacked_flash + - name: device_has_mpu + - name: device_is_module +- requires: + - name: rsilib_chip + - name: romdriver_clks + - name: si917_mem_config + - name: sl_si91x_mcu + - name: lite_image_for_4mb + - name: board_configuration_headers + - name: wiseconnect_toolchain_plugin + - name: freertos_config + condition: [freertos] + - name: si91x_32kHz_external_oscillator +- recommends: + - name: si917_mem_config_1 +- template_contribution: + - name: device_opn + value: SIWG917Y110LGABA + - name: device_arch + value: armv7em + - name: device_cpu + value: cortexm4 + - name: device_family + value: siwg917 + - name: device_fpu + value: true + - name: device_mpu + value: true + - name: default_stack_size + value: 3072 + - name: default_heap_size + value: 7168 + - name: nvm3_size + value: 65536 + - name: flash_present + value: 1 + + # Default Memory configuration + - name: device_flash_addr + value: 135733248 # 0x0817 2000 + priority: 1000 + condition: + - si917_mem_config_1 + - name: device_flash_size + value: 1232896 # 0x0012 D000 + priority: 1000 + condition: + - si917_mem_config_1 + # Medium Memory configuration + - name: device_flash_addr + value: 135733248 # 0x0817 2000 + priority: 1000 + condition: + - si917_mem_config_2 + - name: device_flash_size + value: 1232896 # 0x0012 D000 + priority: 1000 + condition: + - si917_mem_config_2 + # Advanced Memory configuration + - name: device_flash_addr + value: 135733248 # 0x0817 2000 + priority: 1000 + condition: + - si917_mem_config_3 + - name: device_flash_size + value: 1232896 # 0x0012 D000 + priority: 1000 + condition: + - si917_mem_config_3 + - name: device_flash_page_size + value: 256 + - name: device_ram_addr + value: 12 +- tag: + - device:opn:siwg917y110lgaba +- toolchain_settings: + - option: device_opn + value: siwg917y110lgaba + - option: architecture + value: armv7e-m + - option: cpu + value: cortex-m4 + - option: fpu + value: fpv4-sp +- metadata: + device: + memory: +# External flash and psram details will be provided by the External Flash and psram components + - name: Main Flash + page_size: 256 + size: 4194304 + start: 135733248 # 0x0817 2000 + type: non-volatile +# TODO: Check these Values + - name: RAM + size: 196608 + start: 12 + type: volatile + opn: siwg917y110lgaba diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y110lgnba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y110lgnba.slcc new file mode 100644 index 000000000..067aed265 --- /dev/null +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y110lgnba.slcc @@ -0,0 +1,149 @@ +!!omap +- id: SIWG917Y110LGNBA +- package: platform-internal-cmsis-headers +- description: Silicon Labs CMSIS-Device part headers for SIWG917Y110LGNBA. +- category: Device|Si91x|MCU|Device Part|SIWG917 +- ui_hints: + visibility: never +- quality: production +- define: + - name: SIWG917Y110LGNBA + unless: + - device_content_override + - name: SLI_SI917 + value: '1' + - name: SLI_SI917B0 + value: '1' + - name: SL_SI91X_ACX_MODULE + value: '1' + - name: SLI_SI91X_MCU_ENABLE_FLASH_BASED_EXECUTION + value: '1' + - name: SRAM_BASE + value: "0x0cUL" + unless: [rsilib_board] + - name: SRAM_SIZE + value: "0x2fc00UL" + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_VER2 + unless: [rsilib_board] +- source: + - path: components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c + - path: components/device/silabs/si91x/mcu/core/chip/src/startup_si91x.c + unless: [siwx917_soc_custom_startup] +- include: + - file_list: + - path: system_si91x.h + - path: si91x_device.h + path: components/device/silabs/si91x/mcu/core/chip/inc/ +- provides: + - name: siwg917y110lgnba + - name: device_si91x + - name: device_family_siwg917 + - name: si91x_platform + - name: device_arm + - name: cortexm4 + - name: armv7em + - name: device_supports_psram + - name: device_has_stacked_flash + - name: device_has_mpu + - name: device_is_module +- requires: + - name: rsilib_chip + - name: romdriver_clks + - name: si917_mem_config + - name: sl_si91x_mcu + - name: lite_image_for_4mb + - name: board_configuration_headers + - name: wiseconnect_toolchain_plugin + - name: freertos_config + condition: [freertos] + - name: si91x_32kHz_external_oscillator +- recommends: + - name: si917_mem_config_1 +- template_contribution: + - name: device_opn + value: SIWG917Y110LGNBA + - name: device_arch + value: armv7em + - name: device_cpu + value: cortexm4 + - name: device_family + value: siwg917 + - name: device_fpu + value: true + - name: device_mpu + value: true + - name: default_stack_size + value: 3072 + - name: default_heap_size + value: 7168 + - name: nvm3_size + value: 65536 + - name: flash_present + value: 1 + + # Default Memory configuration + - name: device_flash_addr + value: 135733248 # 0x0817 2000 + priority: 1000 + condition: + - si917_mem_config_1 + - name: device_flash_size + value: 1232896 # 0x0012 D000 + priority: 1000 + condition: + - si917_mem_config_1 + # Medium Memory configuration + - name: device_flash_addr + value: 135733248 # 0x0817 2000 + priority: 1000 + condition: + - si917_mem_config_2 + - name: device_flash_size + value: 1232896 # 0x0012 D000 + priority: 1000 + condition: + - si917_mem_config_2 + # Advanced Memory configuration + - name: device_flash_addr + value: 135733248 # 0x0817 2000 + priority: 1000 + condition: + - si917_mem_config_3 + - name: device_flash_size + value: 1232896 # 0x0012 D000 + priority: 1000 + condition: + - si917_mem_config_3 + - name: device_flash_page_size + value: 256 + - name: device_ram_addr + value: 12 +- tag: + - device:opn:siwg917y110lgnba +- toolchain_settings: + - option: device_opn + value: siwg917y110lgnba + - option: architecture + value: armv7e-m + - option: cpu + value: cortex-m4 + - option: fpu + value: fpv4-sp +- metadata: + device: + memory: +# External flash and psram details will be provided by the External Flash and psram components + - name: Main Flash + page_size: 256 + size: 4194304 + start: 135733248 # 0x0817 2000 + type: non-volatile +# TODO: Check these Values + - name: RAM + size: 196608 + start: 12 + type: volatile + opn: siwg917y110lgnba diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111mgab.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111mgab.slcc index 102307aac..c3adfd026 100644 --- a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111mgab.slcc +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111mgab.slcc @@ -16,7 +16,7 @@ value: '1' - name: SLI_SI91X_MCU_ENABLE_FLASH_BASED_EXECUTION value: '1' - - name: SL_SI91X_MODULE_BOARD + - name: SL_SI91X_ACX_MODULE value: '1' - name: SRAM_BASE value: "0x0cUL" @@ -47,6 +47,7 @@ - name: device_has_mpu - name: device_is_module - name: device_has_antenna + - name: device_is_module - requires: - name: rsilib_chip - name: romdriver_clks @@ -56,6 +57,7 @@ - name: wiseconnect_toolchain_plugin - name: freertos_config condition: [freertos] + - name: si91x_32kHz_external_oscillator - template_contribution: - name: device_opn value: SIWG917Y111MGAB @@ -137,7 +139,7 @@ - name: Main Flash page_size: 256 size: 8388608 - start: 136060928 + start: 136323072 # 0x0820 2000 type: non-volatile # TODO: Check these Values - name: RAM diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111mgaba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111mgaba.slcc new file mode 100644 index 000000000..4ab185ec3 --- /dev/null +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111mgaba.slcc @@ -0,0 +1,145 @@ +!!omap +- id: SIWG917Y111MGABA +- package: platform-si91x +- description: Silicon Labs CMSIS-Device part headers for SIWG917Y111MGABA. +- category: Platform|Device|Si91x|MCU|Family|SIWG917Y +- ui_hints: + visibility: never +- quality: production +- define: + - name: SIWG917Y111MGABA + unless: + - device_content_override + - name: SLI_SI917 + value: '1' + - name: SLI_SI917B0 + value: '1' + - name: SLI_SI91X_MCU_ENABLE_FLASH_BASED_EXECUTION + value: '1' + - name: SL_SI91X_ACX_MODULE + value: '1' + - name: SRAM_BASE + value: "0x0cUL" + unless: [rsilib_board] + - name: SRAM_SIZE + value: "0x2fc00UL" + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_VER2 + unless: [rsilib_board] +- source: + - path: components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c + - path: components/device/silabs/si91x/mcu/core/chip/src/startup_si91x.c + unless: [siwx917_soc_custom_startup] +- provides: + - name: siwg917y111mgaba + - name: device_si91x + - name: device_family_siwg917 + - name: si91x_platform + - name: device_arm + - name: cortexm4 + - name: armv7em + - name: device_has_mvp + - name: device_compute_mvp + - name: device_supports_psram + - name: device_has_stacked_flash + - name: device_has_mpu + - name: device_is_module + - name: device_no_antenna + - name: device_is_module +- requires: + - name: rsilib_chip + - name: romdriver_clks + - name: si917_mem_config + - name: sl_si91x_mcu + - name: board_configuration_headers + - name: wiseconnect_toolchain_plugin + - name: freertos_config + condition: [freertos] + - name: si91x_32kHz_external_oscillator +- template_contribution: + - name: device_opn + value: SIWG917Y111MGABA + - name: device_arch + value: armv7em + - name: device_cpu + value: cortexm4 + - name: device_family + value: siwg917y + - name: device_fpu + value: true + - name: device_mpu + value: true + - name: default_stack_size + value: 3072 + - name: default_heap_size + value: 7168 + - name: nvm3_size + value: 65536 + - name: flash_present + value: 1 + + # Default Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: -1 + condition: + - si917_mem_config_1 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: -1 + condition: + - si917_mem_config_1 + # Medium Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: -1 + condition: + - si917_mem_config_2 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: -1 + condition: + - si917_mem_config_2 + # Advanced Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: -1 + condition: + - si917_mem_config_3 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: -1 + condition: + - si917_mem_config_3 + - name: device_flash_page_size + value: 256 + - name: device_ram_addr + value: 12 +- tag: + - device:opn:siwg917y111mgaba +- toolchain_settings: + - option: device_opn + value: siwg917y111mgaba + - option: architecture + value: armv7e-m + - option: cpu + value: cortex-m4 + - option: fpu + value: fpv4-sp +- metadata: + device: + memory: + # External flash details will be provided by the External Flash component + - name: Main Flash + page_size: 256 + size: 8388608 + start: 136323072 # 0x0820 2000 + type: non-volatile + # TODO: Check these Values + - name: RAM + size: 196608 + start: 12 + type: volatile + opn: siwg917y111mgaba \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111mgnba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111mgnba.slcc index 5d7269c9f..105707e72 100644 --- a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111mgnba.slcc +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111mgnba.slcc @@ -16,7 +16,7 @@ value: '1' - name: SLI_SI91X_MCU_ENABLE_FLASH_BASED_EXECUTION value: '1' - - name: SL_SI91X_MODULE_BOARD + - name: SL_SI91X_ACX_MODULE value: '1' - name: SRAM_BASE value: "0x0cUL" @@ -47,6 +47,7 @@ - name: device_has_mpu - name: device_is_module - name: device_no_antenna + - name: device_is_module - requires: - name: rsilib_chip - name: romdriver_clks @@ -56,6 +57,7 @@ - name: wiseconnect_toolchain_plugin - name: freertos_config condition: [freertos] + - name: si91x_32kHz_external_oscillator - template_contribution: - name: device_opn value: SIWG917Y111MGNBA @@ -137,7 +139,7 @@ - name: Main Flash page_size: 256 size: 8388608 - start: 136060928 + start: 136323072 # 0x0820 2000 type: non-volatile # TODO: Check these Values - name: RAM diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111xgaba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111xgaba.slcc new file mode 100644 index 000000000..766c53eef --- /dev/null +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111xgaba.slcc @@ -0,0 +1,153 @@ +!!omap +- id: SIWG917Y111XGABA +- package: platform-internal-cmsis-headers +- description: Silicon Labs CMSIS-Device part headers for SIWG917Y111XGABA. +- category: Device|Si91x|MCU|Device Part|SIWG917 +- ui_hints: + visibility: never +- quality: production +- define: + - name: SIWG917Y111XGABA + unless: + - device_content_override + - name: SLI_SI917 + value: '1' + - name: SLI_SI917B0 + value: '1' + - name: SL_SI91X_ACX_MODULE + value: '1' + - name: SLI_SI91X_MCU_ENABLE_FLASH_BASED_EXECUTION + value: '1' + - name: SLI_SI91X_MCU_INTERNAL_LDO_FOR_PSRAM + value: '1' + - name: SRAM_BASE + value: "0x0cUL" + unless: [rsilib_board] + - name: SRAM_SIZE + value: "0x2fc00UL" + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_VER2 + unless: [rsilib_board] +- source: + - path: components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c + - path: components/device/silabs/si91x/mcu/core/chip/src/startup_si91x.c + unless: [siwx917_soc_custom_startup] +- include: + - file_list: + - path: system_si91x.h + - path: si91x_mvp.h + - path: si91x_device.h + path: components/device/silabs/si91x/mcu/core/chip/inc/ +- provides: + - name: siwg917y111xgaba + - name: device_si91x + - name: device_family_siwg917 + - name: si91x_platform + - name: device_arm + - name: cortexm4 + - name: armv7em + - name: device_has_mvp + - name: device_compute_mvp + - name: device_supports_psram + - name: device_has_mpu + - name: device_is_module + - name: device_supports_external_flash +- requires: + - name: rsilib_chip + - name: romdriver_clks + - name: si917_mem_config + - name: sl_si91x_mcu + - name: board_configuration_headers + - name: wiseconnect_toolchain_plugin + - name: freertos_config + condition: [freertos] + - name: si91x_32kHz_external_oscillator +- recommends: + - name: si917_mem_config_1 +- template_contribution: + - name: device_opn + value: SIWG917Y111XGABA + - name: device_arch + value: armv7em + - name: device_cpu + value: cortexm4 + - name: device_family + value: siwg917 + - name: device_fpu + value: true + - name: device_mpu + value: true + - name: default_stack_size + value: 3072 + - name: default_heap_size + value: 7168 + - name: nvm3_size + value: 65536 + +# This OPN has no internal flash +# - name: device_flash_addr +# value: 16777216 +# - name: device_flash_size +# value: 2097152 +# - name: device_flash_page_size +# value: 4096 + + - name: device_ram_addr + value: 12 + + # Default Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_1 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_1 + # Medium Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_2 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_2 + # Advanced Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_3 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_3 + +- tag: + - device:opn:siwg917y111xgaba +- toolchain_settings: + - option: device_opn + value: siwg917y111xgaba + - option: architecture + value: armv7e-m + - option: cpu + value: cortex-m4 + - option: fpu + value: fpv4-sp +- metadata: + device: + memory: +# Flash details will be provided by external flash component + - name: RAM + size: 196608 + start: 12 + type: volatile + opn: siwg917y111xgaba diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111xgnba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111xgnba.slcc new file mode 100644 index 000000000..69a6a67ab --- /dev/null +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y111xgnba.slcc @@ -0,0 +1,153 @@ +!!omap +- id: SIWG917Y111XGNBA +- package: platform-internal-cmsis-headers +- description: Silicon Labs CMSIS-Device part headers for SIWG917Y111XGNBA. +- category: Device|Si91x|MCU|Device Part|SIWG917 +- ui_hints: + visibility: never +- quality: production +- define: + - name: SIWG917Y111XGNBA + unless: + - device_content_override + - name: SLI_SI917 + value: '1' + - name: SLI_SI917B0 + value: '1' + - name: SL_SI91X_ACX_MODULE + value: '1' + - name: SLI_SI91X_MCU_ENABLE_FLASH_BASED_EXECUTION + value: '1' + - name: SLI_SI91X_MCU_INTERNAL_LDO_FOR_PSRAM + value: '1' + - name: SRAM_BASE + value: "0x0cUL" + unless: [rsilib_board] + - name: SRAM_SIZE + value: "0x2fc00UL" + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_VER2 + unless: [rsilib_board] +- source: + - path: components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c + - path: components/device/silabs/si91x/mcu/core/chip/src/startup_si91x.c + unless: [siwx917_soc_custom_startup] +- include: + - file_list: + - path: system_si91x.h + - path: si91x_mvp.h + - path: si91x_device.h + path: components/device/silabs/si91x/mcu/core/chip/inc/ +- provides: + - name: siwg917y111xgnba + - name: device_si91x + - name: device_family_siwg917 + - name: si91x_platform + - name: device_arm + - name: cortexm4 + - name: armv7em + - name: device_has_mvp + - name: device_compute_mvp + - name: device_supports_psram + - name: device_has_mpu + - name: device_is_module + - name: device_supports_external_flash +- requires: + - name: rsilib_chip + - name: romdriver_clks + - name: si917_mem_config + - name: sl_si91x_mcu + - name: board_configuration_headers + - name: wiseconnect_toolchain_plugin + - name: freertos_config + condition: [freertos] + - name: si91x_32kHz_external_oscillator +- recommends: + - name: si917_mem_config_1 +- template_contribution: + - name: device_opn + value: SIWG917Y111XGNBA + - name: device_arch + value: armv7em + - name: device_cpu + value: cortexm4 + - name: device_family + value: siwg917 + - name: device_fpu + value: true + - name: device_mpu + value: true + - name: default_stack_size + value: 3072 + - name: default_heap_size + value: 7168 + - name: nvm3_size + value: 65536 + +# This OPN has no internal flash +# - name: device_flash_addr +# value: 16777216 +# - name: device_flash_size +# value: 2097152 +# - name: device_flash_page_size +# value: 4096 + + - name: device_ram_addr + value: 12 + + # Default Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_1 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_1 + # Medium Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_2 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_2 + # Advanced Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_3 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_3 + +- tag: + - device:opn:siwg917y111xgnba +- toolchain_settings: + - option: device_opn + value: siwg917y111xgnba + - option: architecture + value: armv7e-m + - option: cpu + value: cortex-m4 + - option: fpu + value: fpv4-sp +- metadata: + device: + memory: +# Flash details will be provided by external flash component + - name: RAM + size: 196608 + start: 12 + type: volatile + opn: siwg917y111xgnba diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y121mgaba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y121mgaba.slcc new file mode 100644 index 000000000..4bcada551 --- /dev/null +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y121mgaba.slcc @@ -0,0 +1,168 @@ +!!omap +- id: SIWG917Y121MGABA +- package: platform-internal-cmsis-headers +- description: Silicon Labs CMSIS-Device part headers for SIWG917Y121MGABA. +- category: Device|Si91x|MCU|Device Part|SIWG917 +- ui_hints: + visibility: never +- quality: production +- define: + - name: SIWG917Y121MGABA + unless: + - device_content_override + - name: SLI_SI917 + value: '1' + - name: SLI_SI917B0 + value: '1' + - name: SL_SI91X_ACX_MODULE + value: '1' + - name: SLI_SI91X_MCU_ENABLE_FLASH_BASED_EXECUTION + value: '1' + - name: SLI_SI91X_MCU_INTERNAL_LDO_FOR_PSRAM + value: '1' + - name: SRAM_BASE + value: "0x0cUL" + unless: [rsilib_board] + - name: SRAM_SIZE + value: "0x2fc00UL" + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_VER2 + unless: [rsilib_board] + - name: SLI_SI91X_MCU_PSRAM_PRESENT +- source: + - path: components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c + - path: components/device/silabs/si91x/mcu/core/chip/src/startup_si91x.c + unless: [siwx917_soc_custom_startup] +- include: + - file_list: + - path: system_si91x.h + - path: si91x_mvp.h + - path: si91x_device.h + path: components/device/silabs/si91x/mcu/core/chip/inc/ +- provides: + - name: siwg917y121mgaba + - name: device_si91x + - name: device_family_siwg917 + - name: si91x_platform + - name: device_arm + - name: cortexm4 + - name: armv7em + - name: device_has_mvp + - name: device_compute_mvp + - name: device_has_stacked_psram + - name: device_supports_psram + - name: device_has_mpu + - name: device_is_module +- requires: + - name: rsilib_chip + - name: romdriver_clks + - name: si917_mem_config + - name: sl_si91x_mcu + - name: board_configuration_headers + - name: wiseconnect_toolchain_plugin + - name: psram_configuration_headers + condition: [rsilib_board] + - name: freertos_config + condition: [freertos] + - name: si91x_32kHz_external_oscillator +- recommends: + - name: si917_mem_config_1 +- template_contribution: + - name: device_opn + value: SIWG917Y121MGABA + - name: device_arch + value: armv7em + - name: device_cpu + value: cortexm4 + - name: device_family + value: siwg917 + - name: device_fpu + value: true + - name: device_mpu + value: true + - name: default_stack_size + value: 3072 + - name: default_heap_size + value: 7168 + - name: nvm3_size + value: 65536 + - name: psram_present + value: 1 + - name: flash_present + value: 1 + - name: device_psram_addr + value: 167772160 # 0x0A00_0000 + - name: device_psram_size + value: 2097152 + - name: device_ram_addr + value: 12 + + # Default Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_1 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_1 + # Medium Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_2 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_2 + # Advanced Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_3 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_3 + - name: device_flash_page_size + value: 256 + - name: device_ram_addr + value: 12 + +- tag: + - device:opn:siwg917y121mgaba +- toolchain_settings: + - option: device_opn + value: siwg917y121mgaba + - option: architecture + value: armv7e-m + - option: cpu + value: cortex-m4 + - option: fpu + value: fpv4-sp +- metadata: + device: + memory: + # External flash and psram details will be provided by the External Flash and psram components + - name: Main Flash + page_size: 256 + size: 8388608 + start: 136323072 + type: non-volatile + - name: Stacked PSRAM + size: 2097152 # 2MB + start: 167772160 # 0x0A00_0000 + type: volatile + - name: RAM + size: 196608 + start: 12 + type: volatile + opn: siwg917y121mgaba diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y121mgnb.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y121mgnb.slcc index c530c14c6..836e7293b 100644 --- a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y121mgnb.slcc +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y121mgnb.slcc @@ -18,7 +18,7 @@ value: '1' - name: SLI_SI91X_MCU_INTERNAL_LDO_FOR_PSRAM value: '1' - - name: SL_SI91X_MODULE_BOARD + - name: SL_SI91X_ACX_MODULE value: '1' - name: SRAM_BASE value: "0x0cUL" @@ -49,6 +49,7 @@ - name: device_has_mpu - name: device_is_module - name: device_no_antenna + - name: device_is_module - requires: - name: rsilib_chip - name: romdriver_clks @@ -60,6 +61,7 @@ condition: [rsilib_board] - name: freertos_config condition: [freertos] + - name: si91x_32kHz_external_oscillator - template_contribution: - name: device_opn value: SIWG917Y121MGNB @@ -151,7 +153,7 @@ - name: Main Flash page_size: 256 size: 8388608 - start: 136060928 + start: 136323072 # 0x0820 2000 type: non-volatile # TODO: Check these Values - name: RAM diff --git a/components/device/silabs/si91x/mcu/core/chip/component/siwg917y121mgnba.slcc b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y121mgnba.slcc new file mode 100644 index 000000000..b113a17c8 --- /dev/null +++ b/components/device/silabs/si91x/mcu/core/chip/component/siwg917y121mgnba.slcc @@ -0,0 +1,168 @@ +!!omap +- id: SIWG917Y121MGNBA +- package: platform-internal-cmsis-headers +- description: Silicon Labs CMSIS-Device part headers for SIWG917Y121MGNBA. +- category: Device|Si91x|MCU|Device Part|SIWG917 +- ui_hints: + visibility: never +- quality: production +- define: + - name: SIWG917Y121MGNBA + unless: + - device_content_override + - name: SLI_SI917 + value: '1' + - name: SLI_SI917B0 + value: '1' + - name: SL_SI91X_ACX_MODULE + value: '1' + - name: SLI_SI91X_MCU_ENABLE_FLASH_BASED_EXECUTION + value: '1' + - name: SLI_SI91X_MCU_INTERNAL_LDO_FOR_PSRAM + value: '1' + - name: SRAM_BASE + value: "0x0cUL" + unless: [rsilib_board] + - name: SRAM_SIZE + value: "0x2fc00UL" + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER + unless: [rsilib_board] + - name: SLI_SI91X_MCU_CONFIG_RADIO_BOARD_VER2 + unless: [rsilib_board] + - name: SLI_SI91X_MCU_PSRAM_PRESENT +- source: + - path: components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c + - path: components/device/silabs/si91x/mcu/core/chip/src/startup_si91x.c + unless: [siwx917_soc_custom_startup] +- include: + - file_list: + - path: system_si91x.h + - path: si91x_mvp.h + - path: si91x_device.h + path: components/device/silabs/si91x/mcu/core/chip/inc/ +- provides: + - name: siwg917y121mgnba + - name: device_si91x + - name: device_family_siwg917 + - name: si91x_platform + - name: device_arm + - name: cortexm4 + - name: armv7em + - name: device_has_mvp + - name: device_compute_mvp + - name: device_has_stacked_psram + - name: device_supports_psram + - name: device_has_mpu + - name: device_is_module +- requires: + - name: rsilib_chip + - name: romdriver_clks + - name: si917_mem_config + - name: sl_si91x_mcu + - name: board_configuration_headers + - name: wiseconnect_toolchain_plugin + - name: psram_configuration_headers + condition: [rsilib_board] + - name: freertos_config + condition: [freertos] + - name: si91x_32kHz_external_oscillator +- recommends: + - name: si917_mem_config_1 +- template_contribution: + - name: device_opn + value: SIWG917Y121MGNBA + - name: device_arch + value: armv7em + - name: device_cpu + value: cortexm4 + - name: device_family + value: siwg917 + - name: device_fpu + value: true + - name: device_mpu + value: true + - name: default_stack_size + value: 3072 + - name: default_heap_size + value: 7168 + - name: nvm3_size + value: 65536 + - name: psram_present + value: 1 + - name: flash_present + value: 1 + - name: device_psram_addr + value: 167772160 # 0x0A00_0000 + - name: device_psram_size + value: 2097152 + - name: device_ram_addr + value: 12 + + # Default Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_1 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_1 + # Medium Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_2 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_2 + # Advanced Memory configuration + - name: device_flash_addr + value: 136323072 # 0x0820 2000 + priority: 1000 + condition: + - si917_mem_config_3 + - name: device_flash_size + value: 2088960 # 0x001F E000 + priority: 1000 + condition: + - si917_mem_config_3 + - name: device_flash_page_size + value: 256 + - name: device_ram_addr + value: 12 + +- tag: + - device:opn:siwg917y121mgnba +- toolchain_settings: + - option: device_opn + value: siwg917y121mgnba + - option: architecture + value: armv7e-m + - option: cpu + value: cortex-m4 + - option: fpu + value: fpv4-sp +- metadata: + device: + memory: + # External flash and psram details will be provided by the External Flash and psram components + - name: Main Flash + page_size: 256 + size: 8388608 + start: 136323072 + type: non-volatile + - name: Stacked PSRAM + size: 2097152 # 2MB + start: 167772160 # 0x0A00_0000 + type: volatile + - name: RAM + size: 196608 + start: 12 + type: volatile + opn: siwg917y121mgnba diff --git a/components/device/silabs/si91x/mcu/core/chip/component/sl_si91x_external_oscillator.slcc b/components/device/silabs/si91x/mcu/core/chip/component/sl_si91x_external_oscillator.slcc new file mode 100644 index 000000000..9476ddc3f --- /dev/null +++ b/components/device/silabs/si91x/mcu/core/chip/component/sl_si91x_external_oscillator.slcc @@ -0,0 +1,15 @@ +id: si91x_32kHz_external_oscillator +label: SI91X 32kHz EXTERNAL OSCILLATOR +package: platform +description: > + This component provides the provision to select the UULP GPIO for connecting the external oscillator. +category: Device|Si91x|MCU|Core +quality: production +component_root_path: "components/device/silabs/si91x/mcu/core/chip" +config_file: + - path: config/sl_si91x_external_oscillator.h +define: + - name: SI91X_32kHz_EXTERNAL_OSCILLATOR + value: '1' +provides: + - name: si91x_32kHz_external_oscillator \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/core/chip/config/RTE_Device_917.h b/components/device/silabs/si91x/mcu/core/chip/config/RTE_Device_917.h index 4dda89a60..134a8c96e 100644 --- a/components/device/silabs/si91x/mcu/core/chip/config/RTE_Device_917.h +++ b/components/device/silabs/si91x/mcu/core/chip/config/RTE_Device_917.h @@ -55,13 +55,22 @@ #define RTE_LED0_PORT 4 #define RTE_LED0_NUMBER 0 -#define RTE_LED0_PIN (2U) +#ifdef SL_SI91X_ACX_MODULE +#define RTE_LED0_PIN (0U) +#else +#define RTE_LED0_PIN (2U) +#endif -#define RTE_LED1_PORT 0 -#define RTE_LED1_NUMBER 1 -#define RTE_LED1_PIN (10U) +#define RTE_LED1_PORT 0 +#define RTE_LED1_NUMBER 1 +#define RTE_LED1_PIN (10U) +#ifdef SL_SI91X_ACX_MODULE +#define BOARD_ACTIVITY_LED (0U) // LED0 +#else #define BOARD_ACTIVITY_LED (2U) // LED0 -#define RTE_LED1_PAD 5 +#endif + +#define RTE_LED1_PAD 5 // USART0 [Driver_USART0] // Configuration settings for Driver_USART0 in component ::CMSIS Driver:USART @@ -116,7 +125,7 @@ #endif #else //Pintool data -#define RTE_USART0_CLK_PORT USART0_CLK_PORT +#define RTE_USART0_CLK_PORT 0 #if (USART0_CLK_LOC == 0) #define RTE_USART0_CLK_PIN USART0_CLK_PIN #define RTE_USART0_CLK_MUX 2 @@ -174,7 +183,7 @@ #endif #else //Pintool data -#define RTE_USART0_TX_PORT USART0_TX_PORT +#define RTE_USART0_TX_PORT 0 #if (USART0_TX_LOC == 4) #define RTE_USART0_TX_PIN USART0_TX_PIN #define RTE_USART0_TX_MUX 2 @@ -242,7 +251,7 @@ #endif #else //Pintool data -#define RTE_USART0_RX_PORT USART0_RX_PORT +#define RTE_USART0_RX_PORT 0 #if (USART0_RX_LOC == 9) #define RTE_USART0_RX_PIN USART0_RX_PIN #define RTE_USART0_RX_MUX 2 @@ -261,8 +270,12 @@ #if (USART0_RX_LOC == 12) #define RTE_USART0_RX_PIN (USART0_RX_PIN + GPIO_MAX_PIN) #define RTE_USART0_RX_MUX 2 +#ifdef SL_SI91X_ACX_MODULE +#define RTE_USART0_RX_PAD 23 +#else #define RTE_USART0_RX_PAD 24 #endif +#endif #if (USART0_RX_LOC == 13) #define RTE_USART0_RX_PIN (USART0_RX_PIN + GPIO_MAX_PIN) #define RTE_USART0_RX_MUX 4 @@ -301,7 +314,7 @@ #endif #else //Pintool data -#define RTE_USART0_CTS_PORT USART0_CTS_PORT +#define RTE_USART0_CTS_PORT 0 #if (USART0_CTS_LOC == 14) #define RTE_USART0_CTS_PIN USART0_CTS_PIN #define RTE_USART0_CTS_MUX 2 @@ -350,7 +363,7 @@ #endif #else //Pintool data -#define RTE_USART0_RTS_PORT USART0_RTS_PORT +#define RTE_USART0_RTS_PORT 0 #if (USART0_RTS_LOC == 18) #define RTE_USART0_RTS_PIN USART0_RTS_PIN #define RTE_USART0_RTS_MUX 2 @@ -402,7 +415,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_TX_PORT USART0_IRTX_PORT +#define RTE_USART0_IR_TX_PORT 0 #if (USART0_IRTX_LOC == 22) #define RTE_USART0_IR_TX_PIN USART0_IRTX_PIN #define RTE_USART0_IR_TX_MUX 13 @@ -454,7 +467,7 @@ #endif #else //Pintool data -#define RTE_USART0_IR_RX_PORT USART0_IRRX_PORT +#define RTE_USART0_IR_RX_PORT 0 #if (USART0_IRRX_LOC == 26) #define RTE_USART0_IR_RX_PIN USART0_IRRX_PIN #define RTE_USART0_IR_RX_MUX 13 @@ -498,7 +511,7 @@ #endif #else //Pintool data -#define RTE_USART0_RI_PORT USART0_RI_PORT +#define RTE_USART0_RI_PORT 0 #if (USART0_RI_LOC == 30) #define RTE_USART0_RI_PIN USART0_RI_PIN #define RTE_USART0_RI_MUX 2 @@ -537,7 +550,7 @@ #endif #else //Pintool data -#define RTE_USART0_DSR_PORT USART0_DSR_PORT +#define RTE_USART0_DSR_PORT 0 #define RTE_USART0_DSR_PIN USART0_DSR_PIN #if (USART0_DSR_LOC == 33) #define RTE_USART0_DSR_MUX 2 @@ -556,7 +569,7 @@ #define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN 12 #else -#define RTE_USART0_DCD_PORT USART0_DCD_PORT +#define RTE_USART0_DCD_PORT 0 #define RTE_USART0_DCD_PIN USART0_DCD_PIN #if (USART0_DCD_LOC == 35) #define RTE_USART0_DCD_MUX 2 @@ -573,7 +586,7 @@ #define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN 7 #else -#define RTE_USART0_DTR_PORT USART0_DTR_PORT +#define RTE_USART0_DTR_PORT 0 #define RTE_USART0_DTR_PIN USART0_DTR_PIN #endif #define RTE_USART0_DTR_MUX 2 @@ -602,7 +615,7 @@ #define RTE_UART1_CHNL_UDMA_RX_CH 26 /*UART1 PINS*/ -// UART1_TX <0=>P0_7 <1=>P0_30 <2=>P0_67 <3=>P0_69 <4=>P0_73 <5=>P0_75 <6=>P0_34 +// UART1_TX <0=>P0_7 <1=>P0_30 <2=>P0_69 <3=>P0_73 <4=>P0_75 <5=>P0_34 // TX of UART1 #ifndef UART1_TX_LOC #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER @@ -627,15 +640,10 @@ #define RTE_UART1_TX_PAD 0 //no pad #elif (RTE_UART1_TX_PORT_ID == 2) #define RTE_UART1_TX_PORT 0 -#define RTE_UART1_TX_PIN 67 -#define RTE_UART1_TX_MUX 9 -#define RTE_UART1_TX_PAD 25 -#elif (RTE_UART1_TX_PORT_ID == 3) -#define RTE_UART1_TX_PORT 0 #define RTE_UART1_TX_PIN 73 #define RTE_UART1_TX_MUX 6 #define RTE_UART1_TX_PAD 31 -#elif (RTE_UART1_TX_PORT_ID == 4) +#elif (RTE_UART1_TX_PORT_ID == 3) #define RTE_UART1_TX_PORT 0 #define RTE_UART1_TX_PIN 75 #define RTE_UART1_TX_MUX 9 @@ -674,7 +682,7 @@ //Pintool data #endif -// UART1_RX <0=>P0_6 <1=>P0_29 <2=>P0_66 <3=>P0_68 <4=>P0_72 <5=>P0_74 <6=>P0_33 +// UART1_RX <0=>P0_6 <1=>P0_29 <2=>P0_66 <3=>P0_72 // RX of UART1 #ifndef UART1_RX_LOC #define RTE_UART1_RX_PORT_ID 0 @@ -700,16 +708,20 @@ #define RTE_UART1_RX_MUX 6 #define RTE_UART1_RX_PAD 30 #elif (RTE_UART1_RX_PORT_ID == 4) +#ifdef SL_SI91X_ACX_MODULE +#error "ULP_GPIO_10 is not available in module boards/OPNs!" +#else #define RTE_UART1_RX_PORT 0 #define RTE_UART1_RX_PIN 74 #define RTE_UART1_RX_MUX 9 #define RTE_UART1_RX_PAD 32 +#endif #else #error "Invalid UART1 RTE_UART1_RX_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_UART1_RX_PORT UART1_RX_PORT +#define RTE_UART1_RX_PORT 0 #if (UART1_RX_LOC == 5) #define RTE_UART1_RX_PIN UART1_RX_PIN #define RTE_UART1_RX_MUX 6 @@ -773,7 +785,7 @@ #endif #else //Pintool data -#define RTE_UART1_CTS_PORT UART1_CTS_PORT +#define RTE_UART1_CTS_PORT 0 #if (UART1_CTS_LOC == 10) #define RTE_UART1_CTS_PIN UART1_CTS_PIN #define RTE_UART1_CTS_MUX 6 @@ -846,7 +858,7 @@ #endif #else //Pintool data -#define RTE_UART1_RTS_PORT UART1_RTS_PORT +#define RTE_UART1_RTS_PORT 0 #if (UART1_RTS_LOC == 16) #define RTE_UART1_RTS_PIN UART1_RTS_PIN #define RTE_UART1_RTS_MUX 6 @@ -921,7 +933,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_TX_PORT ULP_UART_TX_PORT +#define RTE_ULP_UART_TX_PORT 0 #define RTE_ULP_UART_TX_PIN ULP_UART_TX_PIN #define RTE_ULP_UART_TX_MUX 3 //Pintool data @@ -948,7 +960,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_RX_PORT ULP_UART_RX_PORT +#define RTE_ULP_UART_RX_PORT 0 #define RTE_ULP_UART_RX_PIN ULP_UART_RX_PIN #define RTE_ULP_UART_RX_MUX 3 //Pintool data @@ -971,7 +983,7 @@ #endif #else //Pintool data -#define RTE_ULP_UART_CTS_PORT ULP_UART_CTS_PORT +#define RTE_ULP_UART_CTS_PORT 0 #define RTE_ULP_UART_CTS_PIN ULP_UART_CTS_PIN #define RTE_ULP_UART_CTS_MUX 3 //Pintool data @@ -988,7 +1000,7 @@ #error "Invalid ULPSS UART RTE_ULP_UART_RTS_PIN Pin Configuration!" #endif #else -#define RTE_ULP_UART_RTS_PORT ULP_UART_RTS_PORT +#define RTE_ULP_UART_RTS_PORT 0 #define RTE_ULP_UART_RTS_PIN ULP_UART_RTS_PIN #endif #define RTE_ULP_UART_RTS_MUX 8 @@ -1031,16 +1043,16 @@ #else //Pintool data #define RTE_SSI_MASTER_MISO 1 -#define RTE_SSI_MASTER_MISO_PORT SSI_MASTER_MISO_DATA1_PORT +#define RTE_SSI_MASTER_MISO_PORT 0 #define RTE_SSI_MASTER_MISO_PIN SSI_MASTER_MISO_DATA1_PIN #define RTE_SSI_MASTER_MISO_MODE EGPIO_PIN_MUX_MODE3 -#if (SSI_MASTER_DATA1_LOC == 0) +#if (SSI_MASTER_DATA1_LOC == 3) #define RTE_SSI_MASTER_MISO_PADSEL 7 #endif -#if (SSI_MASTER_DATA1_LOC == 1) +#if (SSI_MASTER_DATA1_LOC == 4) #define RTE_SSI_MASTER_MISO_PADSEL 0 //NO PAD #endif -#if (SSI_MASTER_DATA1_LOC == 2) +#if (SSI_MASTER_DATA1_LOC == 5) #define RTE_SSI_MASTER_MISO_PADSEL 21 #endif //Pintool data @@ -1074,7 +1086,7 @@ #else //Pintool data #define RTE_SSI_MASTER_MOSI 1 -#define RTE_SSI_MASTER_MOSI_PORT SSI_MASTER_MOSI_DATA0_PORT +#define RTE_SSI_MASTER_MOSI_PORT 0 #define RTE_SSI_MASTER_MOSI_PIN SSI_MASTER_MOSI_DATA0_PIN #define RTE_SSI_MASTER_MOSI_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_DATA0_LOC == 0) @@ -1117,7 +1129,7 @@ #else //Pintool data #define RTE_SSI_MASTER_SCK 1 -#define RTE_SSI_MASTER_SCK_PORT SSI_MASTER_SCK__PORT +#define RTE_SSI_MASTER_SCK_PORT 0 #define RTE_SSI_MASTER_SCK_PIN SSI_MASTER_SCK__PIN #define RTE_SSI_MASTER_SCK_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_SCK_LOC == 6) @@ -1165,7 +1177,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS0 M4_SSI_CS0 -#define RTE_SSI_MASTER_CS0_PORT SSI_MASTER_CS0__PORT +#define RTE_SSI_MASTER_CS0_PORT 0 #define RTE_SSI_MASTER_CS0_PIN SSI_MASTER_CS0__PIN #define RTE_SSI_MASTER_CS0_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS0_LOC == 9) @@ -1190,7 +1202,7 @@ #error "Invalid SSI_MASTER_CS1 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS1_PORT SSI_MASTER_CS1__PORT +#define RTE_SSI_MASTER_CS1_PORT 0 #define RTE_SSI_MASTER_CS1_PIN SSI_MASTER_CS1__PIN #endif #define RTE_SSI_MASTER_CS1 M4_SSI_CS1 @@ -1218,7 +1230,7 @@ #else //Pintool data #define RTE_SSI_MASTER_CS2 M4_SSI_CS2 -#define RTE_SSI_MASTER_CS2_PORT SSI_MASTER_CS2__PORT +#define RTE_SSI_MASTER_CS2_PORT 0 #define RTE_SSI_MASTER_CS2_PIN SSI_MASTER_CS2__PIN #define RTE_SSI_MASTER_CS2_MODE EGPIO_PIN_MUX_MODE3 #if (SSI_MASTER_CS2_LOC == 13) @@ -1240,7 +1252,7 @@ #error "Invalid SSI_MASTER_CS3 Pin Configuration!" #endif #else -#define RTE_SSI_MASTER_CS3_PORT SSI_MASTER_CS3__PORT +#define RTE_SSI_MASTER_CS3_PORT 0 #define RTE_SSI_MASTER_CS3_PIN SSI_MASTER_CS3__PIN #endif #define RTE_SSI_MASTER_CS3 M4_SSI_CS3 @@ -1302,7 +1314,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MISO 1 -#define RTE_SSI_SLAVE_MISO_PORT SSI_SLAVE_MISO__PORT +#define RTE_SSI_SLAVE_MISO_PORT 0 #define RTE_SSI_SLAVE_MISO_PIN SSI_SLAVE_MISO__PIN #define RTE_SSI_SLAVE_MISO_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MISO_LOC == 5) @@ -1360,7 +1372,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_MOSI 1 -#define RTE_SSI_SLAVE_MOSI_PORT SSI_SLAVE_MOSI__PORT +#define RTE_SSI_SLAVE_MOSI_PORT 0 #define RTE_SSI_SLAVE_MOSI_PIN SSI_SLAVE_MOSI__PIN #define RTE_SSI_SLAVE_MOSI_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_MOSI_LOC == 1) @@ -1414,7 +1426,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_SCK 1 -#define RTE_SSI_SLAVE_SCK_PORT SSI_SLAVE_SCK__PORT +#define RTE_SSI_SLAVE_SCK_PORT 0 #define RTE_SSI_SLAVE_SCK_PIN SSI_SLAVE_SCK__PIN #define RTE_SSI_SLAVE_SCK_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_SCK_LOC == 9) @@ -1434,7 +1446,11 @@ // SSI_SLAVE_CS Pin <0=>Not Used <1=>GPIO_9 <2=>GPIO_25 <3=>GPIO_46 <4=>GPIO_53 #ifndef SSI_SLAVE_CS0_LOC +#ifdef SL_SI91X_ACX_MODULE #define RTE_SSI_SLAVE_CS_PORT_ID 1 +#else +#define RTE_SSI_SLAVE_CS_PORT_ID 2 +#endif #if (RTE_SSI_SLAVE_CS_PORT_ID == 0) #define RTE_SSI_SLAVE_CS 0 @@ -1468,7 +1484,7 @@ #else //Pintool data #define RTE_SSI_SLAVE_CS 1 -#define RTE_SSI_SLAVE_CS_PORT SSI_SLAVE_CS0__PORT +#define RTE_SSI_SLAVE_CS_PORT 0 #define RTE_SSI_SLAVE_CS_PIN SSI_SLAVE_CS0__PIN #define RTE_SSI_SLAVE_CS_MODE EGPIO_PIN_MUX_MODE8 #if (SSI_SLAVE_CS0_LOC == 13) @@ -1512,7 +1528,7 @@ #define ULP_SSI_CS2 0 // SSI_ULP_MASTER_MISO Pin <0=>Not Used <1=>ULP_GPIO_2 <2=>ULP_GPIO_9 -#ifndef ULP_SPI_MISO_LOC +#if !defined(ULP_SPI_MISO_LOC) && !defined(ULP_SSI_MISO_LOC) #define RTE_SSI_ULP_MASTER_MISO_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MISO_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MISO 1 @@ -1530,14 +1546,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MISO 1 -#define RTE_SSI_ULP_MASTER_MISO_PORT ULP_SPI_MISO__PORT -#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SPI_MISO__PIN +#define RTE_SSI_ULP_MASTER_MISO_PORT 0 +#define RTE_SSI_ULP_MASTER_MISO_PIN ULP_SSI_MISO__PIN #define RTE_SSI_ULP_MASTER_MISO_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_MOSI Pin <0=>Not Used <1=>ULP_GPIO_1 <2=>ULP_GPIO_11 -#ifndef ULP_SPI_MOSI_LOC +#if !defined(ULP_SPI_MOSI_LOC) && !defined(ULP_SSI_MOSI_LOC) #define RTE_SSI_ULP_MASTER_MOSI_PORT_ID 0 #if (RTE_SSI_ULP_MASTER_MOSI_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_MOSI 1 @@ -1555,14 +1571,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_MOSI 1 -#define RTE_SSI_ULP_MASTER_MOSI_PORT ULP_SPI_MOSI__PORT -#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SPI_MOSI__PIN +#define RTE_SSI_ULP_MASTER_MOSI_PORT 0 +#define RTE_SSI_ULP_MASTER_MOSI_PIN ULP_SSI_MOSI__PIN #define RTE_SSI_ULP_MASTER_MOSI_MODE 1 //Pintool data #endif // SSI_ULP_MASTER_SCK Pin <0=>Not Used <1=>ULP_GPIO_0 <2=>ULP_GPIO_8 -#ifndef ULP_SPI_SCK_LOC +#if !defined(ULP_SPI_SCK_LOC) && !defined(ULP_SSI_SCK_LOC) #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SSI_ULP_MASTER_SCK_PORT_ID 2 #else @@ -1586,14 +1602,14 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_SCK 1 -#define RTE_SSI_ULP_MASTER_SCK_PORT ULP_SPI_SCK__PORT -#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SPI_SCK__PIN +#define RTE_SSI_ULP_MASTER_SCK_PORT 0 +#define RTE_SSI_ULP_MASTER_SCK_PIN ULP_SSI_SCK__PIN #define RTE_SSI_ULP_MASTER_SCK_MODE 1 //Pintool data #endif // CS0 -#ifndef ULP_SPI_CS0_LOC +#if !defined(ULP_SPI_CS0_LOC) && !defined(ULP_SSI_CS0_LOC) #define RTE_SSI_ULP_MASTER_CS0_PORT_ID 1 #if (RTE_SSI_ULP_MASTER_CS0_PORT_ID == 0) #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 @@ -1611,30 +1627,30 @@ #else //Pintool data #define RTE_SSI_ULP_MASTER_CS0 ULP_SSI_CS0 -#define RTE_SSI_ULP_MASTER_CS0_PORT ULP_SPI_CS0__PORT -#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SPI_CS0__PIN +#define RTE_SSI_ULP_MASTER_CS0_PORT 0 +#define RTE_SSI_ULP_MASTER_CS0_PIN ULP_SSI_CS0__PIN #define RTE_SSI_ULP_MASTER_CS0_MODE 1 //Pintool data #endif // CS1 -#ifndef ULP_SPI_CS1_LOC +#if !defined(ULP_SPI_CS1_LOC) || !defined(ULP_SSI_CS1_LOC) #define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN 4 #else -#define RTE_SSI_ULP_MASTER_CS1_PORT ULP_SPI_CS1__PORT +#define RTE_SSI_ULP_MASTER_CS1_PORT 0 #define RTE_SSI_ULP_MASTER_CS1_PIN ULP_SPI_CS1__PIN #endif #define RTE_SSI_ULP_MASTER_CS1 ULP_SSI_CS1 #define RTE_SSI_ULP_MASTER_CS1_MODE 1 // CS2 -#ifndef ULP_SPI_CS2_LOC +#if !defined(ULP_SPI_CS2_LOC) && !defined(ULP_SSI_CS2_LOC) #define RTE_SSI_ULP_MASTER_CS2_PORT 0 #define RTE_SSI_ULP_MASTER_CS2_PIN 6 #else -#define RTE_SSI_ULP_MASTER_CS2_PORT ULP_SPI_CS2__PORT -#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SPI_CS2__PIN +#define RTE_SSI_ULP_MASTER_CS2_PORT 0 +#define RTE_SSI_ULP_MASTER_CS2_PIN ULP_SSI_CS2__PIN #endif #define RTE_SSI_ULP_MASTER_CS2 ULP_SSI_CS2 #define RTE_SSI_ULP_MASTER_CS2_MODE 1 @@ -1725,7 +1741,7 @@ #endif #else //Pintool data -#define RTE_I2S0_SCLK_PORT I2S0_SCLK_PORT +#define RTE_I2S0_SCLK_PORT 0 #define RTE_I2S0_SCLK_PIN I2S0_SCLK_PIN #define RTE_I2S0_SCLK_MUX 7 #if (I2S0_SCLK_LOC == 0) @@ -1773,7 +1789,7 @@ #endif #else //Pintool data -#define RTE_I2S0_WSCLK_PORT I2S0_WSCLK_PORT +#define RTE_I2S0_WSCLK_PORT 0 #define RTE_I2S0_WSCLK_PIN I2S0_WSCLK_PIN #define RTE_I2S0_WSCLK_MUX 7 #if (I2S0_WSCLK_LOC == 4) @@ -1821,7 +1837,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT0_PORT I2S0_DOUT0_PORT +#define RTE_I2S0_DOUT0_PORT 0 #define RTE_I2S0_DOUT0_PIN I2S0_DOUT0_PIN #define RTE_I2S0_DOUT0_MUX 7 #if (I2S0_DOUT0_LOC == 8) @@ -1869,7 +1885,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN0_PORT I2S0_DIN0_PORT +#define RTE_I2S0_DIN0_PORT 0 #define RTE_I2S0_DIN0_PIN I2S0_DIN0_PIN #define RTE_I2S0_DIN0_MUX 7 #if (I2S0_DIN0_LOC == 12) @@ -1921,7 +1937,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DOUT1_PORT I2S0_DOUT1_PORT +#define RTE_I2S0_DOUT1_PORT 0 #define RTE_I2S0_DOUT1_PIN I2S0_DOUT1_PIN #define RTE_I2S0_DOUT1_MUX 7 #if (I2S0_DOUT1_LOC == 16) @@ -1969,7 +1985,7 @@ #endif #else //Pintool data -#define RTE_I2S0_DIN1_PORT I2S0_DIN1_PORT +#define RTE_I2S0_DIN1_PORT 0 #define RTE_I2S0_DIN1_PIN I2S0_DIN1_PIN #define RTE_I2S0_DIN1_MUX 7 #if (I2S0_DIN1_LOC == 20) @@ -2065,7 +2081,7 @@ #endif #else //Pintool data -#define RTE_I2S1_SCLK_PORT ULP_I2S_SCLK_PORT +#define RTE_I2S1_SCLK_PORT 0 #define RTE_I2S1_SCLK_PIN ULP_I2S_SCLK_PIN #define RTE_I2S1_SCLK_MUX 2 //Pintool data @@ -2087,7 +2103,7 @@ #endif #else //Pintool data -#define RTE_I2S1_WSCLK_PORT ULP_I2S_WSCLK_PORT +#define RTE_I2S1_WSCLK_PORT 0 #define RTE_I2S1_WSCLK_PIN ULP_I2S_WSCLK_PIN #define RTE_I2S1_WSCLK_MUX 2 //Pintool data @@ -2109,7 +2125,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DOUT0_PORT ULP_I2S_DOUT0_PORT +#define RTE_I2S1_DOUT0_PORT 0 #define RTE_I2S1_DOUT0_PIN ULP_I2S_DOUT0_PIN #define RTE_I2S1_DOUT0_MUX 2 //Pintool data @@ -2135,7 +2151,7 @@ #endif #else //Pintool data -#define RTE_I2S1_DIN0_PORT ULP_I2S_DIN0_PORT +#define RTE_I2S1_DIN0_PORT 0 #define RTE_I2S1_DIN0_PIN ULP_I2S_DIN0_PIN #define RTE_I2S1_DIN0_MUX 2 //Pintool data @@ -2229,7 +2245,7 @@ #endif #else //Pintool data -#define RTE_I2C0_SCL_PORT I2C0_SCL_PORT +#define RTE_I2C0_SCL_PORT 0 #if (I2C0_SCL_LOC == 0) #define RTE_I2C0_SCL_PIN I2C0_SCL_PIN #define RTE_I2C0_SCL_MUX 4 @@ -2251,12 +2267,14 @@ //Pintool data #endif -// I2C0_SCL Pin <0=>P0_6 <1=>P0_64 <2=>P0_67 <3=>P0_74 <4=>P0_31 +// I2C0_SCL Pin <0=>P0_6 <1=>P0_74 #ifndef I2C0_SDA_LOC #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define RTE_I2C0_SDA_PORT_ID 2 -#else +#ifdef SL_SI91X_ACX_MODULE #define RTE_I2C0_SDA_PORT_ID 0 +#else +#define RTE_I2C0_SDA_PORT_ID 1 +#endif #endif #if (RTE_I2C0_SDA_PORT_ID == 0) @@ -2266,23 +2284,21 @@ #define RTE_I2C0_SDA_PAD 1 #define RTE_I2C0_SDA_I2C_REN 6 #elif (RTE_I2C0_SDA_PORT_ID == 1) -#define RTE_I2C0_SDA_PORT 0 -#define RTE_I2C0_SDA_PIN 67 -#define RTE_I2C0_SDA_MUX 4 -#define RTE_I2C0_SDA_PAD 25 -#define RTE_I2C0_SDA_I2C_REN 3 -#elif (RTE_I2C0_SDA_PORT_ID == 2) +#ifdef SL_SI91X_ACX_MODULE +#error "ULP_GPIO_10 is not available in module boards/OPNs!" +#else #define RTE_I2C0_SDA_PORT 0 #define RTE_I2C0_SDA_PIN 74 #define RTE_I2C0_SDA_MUX 4 #define RTE_I2C0_SDA_PAD 32 #define RTE_I2C0_SDA_I2C_REN 10 +#endif #else #error "Invalid I2C0 RTE_I2C0_SDA Pin Configuration!" #endif #else //Pintool data -#define RTE_I2C0_SDA_PORT I2C0_SDA_PORT +#define RTE_I2C0_SDA_PORT 0 #if (I2C0_SDA_LOC == 3) #define RTE_I2C0_SDA_PIN I2C0_SDA_PIN #define RTE_I2C0_SDA_MUX 4 @@ -2364,7 +2380,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SCL_PORT I2C1_SCL_PORT +#define RTE_I2C1_SCL_PORT 0 #if (I2C1_SCL_LOC == 0) #define RTE_I2C1_SCL_PIN I2C1_SCL_PIN #define RTE_I2C1_SCL_MUX 5 @@ -2404,7 +2420,7 @@ //Pintool data #endif -// I2C1_SCL Pin <0=>P0_7 <1=>P0_30 <2=>P0_51 <3=>P0_55 <4=>P0_65 <4=>P0_67 <4=>P0_71 <7=>P0_34 +// I2C1_SCL Pin <0=>P0_7 <1=>P0_30 <2=>P0_51 <3=>P0_55 <4=>P0_65 <5=>P0_71 <6=>P0_34 #ifndef I2C1_SDA_LOC #define RTE_I2C1_SDA_PORT_ID 2 @@ -2440,12 +2456,6 @@ #define RTE_I2C1_SDA_REN 1 #elif (RTE_I2C1_SDA_PORT_ID == 5) #define RTE_I2C1_SDA_PORT 0 -#define RTE_I2C1_SDA_PIN 67 -#define RTE_I2C1_SDA_MUX 5 -#define RTE_I2C1_SDA_PAD 25 -#define RTE_I2C1_SDA_REN 3 -#elif (RTE_I2C1_SDA_PORT_ID == 6) -#define RTE_I2C1_SDA_PORT 0 #define RTE_I2C1_SDA_PIN 71 #define RTE_I2C1_SDA_MUX 5 #define RTE_I2C1_SDA_PAD 29 @@ -2455,7 +2465,7 @@ #endif #else //Pintool data -#define RTE_I2C1_SDA_PORT I2C1_SDA_PORT +#define RTE_I2C1_SDA_PORT 0 #if (I2C1_SDA_LOC == 6) #define RTE_I2C1_SDA_PIN I2C1_SDA_PIN #define RTE_I2C1_SDA_MUX 5 @@ -2533,7 +2543,7 @@ #endif #else //Pintool data -#define RTE_I2C2_SCL_PORT ULP_I2C_SCL_PORT +#define RTE_I2C2_SCL_PORT 0 #define RTE_I2C2_SCL_PIN ULP_I2C_SCL_PIN #define RTE_I2C2_SCL_MUX 4 #if (ULP_I2C_SCL_LOC == 0) @@ -2571,8 +2581,8 @@ #endif #else //Pintool data -#define RTE_I2C2_SDA_PORT I2C2_SDA_PORT -#define RTE_I2C2_SDA_PIN I2C2_SDA_PIN +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN ULP_I2C_SDA_PIN #define RTE_I2C2_SDA_MUX 4 #if (ULP_I2C_SDA_LOC == 4) #define RTE_I2C2_SDA_REN 0 @@ -2633,7 +2643,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_CLK_PORT GSPI_MASTER_SCK__PORT +#define RTE_GSPI_MASTER_CLK_PORT 0 #define RTE_GSPI_MASTER_CLK_PIN GSPI_MASTER_SCK__PIN #define RTE_GSPI_MASTER_CLK_MUX 4 #if (GSPI_MASTER_SCK_LOC == 0) @@ -2688,7 +2698,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS0 1 -#define RTE_GSPI_MASTER_CS0_PORT GSPI_MASTER_CS0__PORT +#define RTE_GSPI_MASTER_CS0_PORT 0 #define RTE_GSPI_MASTER_CS0_PIN GSPI_MASTER_CS0__PIN #define RTE_GSPI_MASTER_CS0_MUX 4 #if (GSPI_MASTER_CS0_LOC == 4) @@ -2742,7 +2752,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS1 1 -#define RTE_GSPI_MASTER_CS1_PORT GSPI_MASTER_CS1__PORT +#define RTE_GSPI_MASTER_CS1_PORT 0 #define RTE_GSPI_MASTER_CS1_PIN GSPI_MASTER_CS1__PIN #define RTE_GSPI_MASTER_CS1_MUX 4 #if (GSPI_MASTER_CS1_LOC == 8) @@ -2796,7 +2806,7 @@ #else //Pintool data #define RTE_GSPI_MASTER_CS2 1 -#define RTE_GSPI_MASTER_CS2_PORT GSPI_MASTER_CS2__PORT +#define RTE_GSPI_MASTER_CS2_PORT 0 #define RTE_GSPI_MASTER_CS2_PIN GSPI_MASTER_CS2__PIN #define RTE_GSPI_MASTER_CS2_MUX 4 #if (GSPI_MASTER_CS2_LOC == 12) @@ -2849,7 +2859,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MOSI_PORT GSPI_MASTER_MOSI__PORT +#define RTE_GSPI_MASTER_MOSI_PORT 0 #define RTE_GSPI_MASTER_MOSI_PIN GSPI_MASTER_MOSI__PIN #if (GSPI_MASTER_MOSI_LOC == 16) #define RTE_GSPI_MASTER_MOSI_MUX 4 @@ -2904,7 +2914,7 @@ #endif #else //Pintool data -#define RTE_GSPI_MASTER_MISO_PORT GSPI_MASTER_MISO__PORT +#define RTE_GSPI_MASTER_MISO_PORT 0 #define RTE_GSPI_MASTER_MISO_PIN GSPI_MASTER_MISO__PIN #define RTE_GSPI_MASTER_MISO_MUX 4 #if (GSPI_MASTER_MISO_LOC == 21) @@ -3066,7 +3076,7 @@ //Pintool data #endif -//SCT_IN_3 <0=>GPIO_28 <1=>GPIO_67 <2=>GPIO_71 +//SCT_IN_3 <0=>GPIO_28 <1=>GPIO_71 #ifndef SCT_IN3_LOC #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_SCT_IN_3_PORT_ID 0 @@ -3081,11 +3091,6 @@ #define RTE_SCT_IN_3_PAD 0 //no pad #elif (RTE_SCT_IN_3_PORT_ID == 1) #define RTE_SCT_IN_3_PORT 0 -#define RTE_SCT_IN_3_PIN 67 -#define RTE_SCT_IN_3_MUX 7 -#define RTE_SCT_IN_3_PAD 25 -#elif (RTE_SCT_IN_3_PORT_ID == 2) -#define RTE_SCT_IN_3_PORT 0 #define RTE_SCT_IN_3_PIN 71 #define RTE_SCT_IN_3_MUX 9 #define RTE_SCT_IN_3_PAD 29 @@ -3094,7 +3099,7 @@ #endif #else //Pintool data -#define RTE_SCT_IN_3_PORT SCT_IN3_PORT +#define RTE_SCT_IN_3_PORT 0 #if (SCT_IN3_LOC == 8) #define RTE_SCT_IN_3_PIN SCT_IN3_PIN #define RTE_SCT_IN_3_MUX 9 @@ -3121,7 +3126,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_0_PORT SCT_OUT0_PORT +#define RTE_SCT_OUT_0_PORT 0 #if (SCT_OUT0_LOC == 10) #define RTE_SCT_OUT_0_PIN SCT_OUT0_PIN #define RTE_SCT_OUT_0_MUX 9 @@ -3147,7 +3152,7 @@ #endif #else //Pintool data -#define RTE_SCT_OUT_1_PORT SCT_OUT1_PORT +#define RTE_SCT_OUT_1_PORT 0 #if (SCT_OUT1_LOC == 12) #define RTE_SCT_OUT_1_PIN SCT_OUT1_PIN #define RTE_SCT_OUT_1_MUX 9 @@ -3161,42 +3166,42 @@ #endif //Pintool data -#define RTE_SCT_OUT_2_PORT SCT_OUT2_PORT +#define RTE_SCT_OUT_2_PORT 0 #define RTE_SCT_OUT_2_PIN SCT_OUT2_PIN #define RTE_SCT_OUT_2_MUX 7 #define RTE_SCT_OUT_2_PAD 28 //Pintool data //Pintool data -#define RTE_SCT_OUT_3_PORT SCT_OUT3_PORT +#define RTE_SCT_OUT_3_PORT 0 #define RTE_SCT_OUT_3_PIN SCT_OUT3_PIN #define RTE_SCT_OUT_3_MUX 7 #define RTE_SCT_OUT_3_PAD 29 //Pintool data //Pintool data -#define RTE_SCT_OUT_4_PORT SCT_OUT4_PORT +#define RTE_SCT_OUT_4_PORT 0 #define RTE_SCT_OUT_4_PIN SCT_OUT4_PIN #define RTE_SCT_OUT_4_MUX 7 #define RTE_SCT_OUT_4_PAD 30 //Pintool data //Pintool data -#define RTE_SCT_OUT_5_PORT SCT_OUT5_PORT +#define RTE_SCT_OUT_5_PORT 0 #define RTE_SCT_OUT_5_PIN SCT_OUT5_PIN #define RTE_SCT_OUT_5_MUX 7 #define RTE_SCT_OUT_5_PAD 31 //Pintool data //Pintool data -#define RTE_SCT_OUT_6_PORT SCT_OUT6_PORT +#define RTE_SCT_OUT_6_PORT 0 #define RTE_SCT_OUT_6_PIN SCT_OUT6_PIN #define RTE_SCT_OUT_6_MUX 7 #define RTE_SCT_OUT_6_PAD 32 //Pintool data //Pintool data -#define RTE_SCT_OUT_7_PORT SCT_OUT7_PORT +#define RTE_SCT_OUT_7_PORT 0 #define RTE_SCT_OUT_7_PIN SCT_OUT7_PIN #define RTE_SCT_OUT_7_MUX 7 #define RTE_SCT_OUT_7_PAD 33 @@ -3323,10 +3328,14 @@ #define RTE_SIO_2_MUX 1 #define RTE_SIO_2_PAD 24 #elif (RTE_SIO_2_PORT_ID == 3) +#ifdef SL_SI91X_ACX_MODULE +#error "ULP_GPIO_10 is not available in module boards/OPNs!" +#else #define RTE_SIO_2_PORT 0 #define RTE_SIO_2_PIN 74 #define RTE_SIO_2_MUX 1 #define RTE_SIO_2_PAD 32 +#endif #else #error "Invalid RTE_SIO_2_PIN Pin Configuration!" #endif @@ -3585,7 +3594,7 @@ //Pintool data #endif -//PWM_2H <0=>GPIO_9 <1=>GPIO_67 <2=>GPIO_69 +//PWM_2H <0=>GPIO_9 #ifndef PWM_2H_LOC #define RTE_PWM_2H_PORT_ID 0 #if ((RTE_PWM_2H_PORT_ID == 2)) @@ -3597,17 +3606,12 @@ #define RTE_PWM_2H_PIN 9 #define RTE_PWM_2H_MUX 10 #define RTE_PWM_2H_PAD 4 -#elif (RTE_PWM_2H_PORT_ID == 1) -#define RTE_PWM_2H_PORT 0 -#define RTE_PWM_2H_PIN 67 -#define RTE_PWM_2H_MUX 8 -#define RTE_PWM_2H_PAD 25 #else #error "Invalid RTE_PWM_2H_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_PWM_2H_PORT PWM_2H_PORT +#define RTE_PWM_2H_PORT 0 #if (PWM_2H_LOC == 4) #define RTE_PWM_2H_PIN PWM_2H_PIN #define RTE_PWM_2H_MUX 10 @@ -3643,7 +3647,7 @@ #endif #else //Pintool data -#define RTE_PWM_2L_PORT PWM_2L_PORT +#define RTE_PWM_2L_PORT 0 #if (PWM_2L_LOC == 6) #define RTE_PWM_2L_PIN PWM_2L_PIN #define RTE_PWM_2L_MUX 10 @@ -3675,7 +3679,7 @@ #endif #else //Pintool data -#define RTE_PWM_3H_PORT PWM_3H_PORT +#define RTE_PWM_3H_PORT 0 #if (PWM_3H_LOC == 9) #define RTE_PWM_3H_PIN PWM_3H_PIN #define RTE_PWM_3H_MUX 10 @@ -3702,7 +3706,7 @@ #endif #else //Pintool data -#define RTE_PWM_3L_PORT PWM_3L_PORT +#define RTE_PWM_3L_PORT 0 #if (PWM_3L_LOC == 11) #define RTE_PWM_3L_PIN PWM_3L_PIN #define RTE_PWM_3L_MUX 10 @@ -3738,7 +3742,7 @@ #endif #else //Pintool data -#define RTE_PWM_4H_PORT PWM_4H_PORT +#define RTE_PWM_4H_PORT 0 #define RTE_PWM_4H_PIN (PWM_4H_PIN + GPIO_MAX_PIN) #define RTE_PWM_4H_MUX 8 #define RTE_PWM_4H_PAD 29 @@ -3768,7 +3772,7 @@ #endif #else //Pintool data -#define RTE_PWM_4L_PORT PWM_4L_PORT +#define RTE_PWM_4L_PORT 0 #if (PWM_4L_LOC == 14) #define RTE_PWM_4L_PIN PWM_4L_PIN #define RTE_PWM_4L_MUX 10 @@ -3801,7 +3805,7 @@ #endif #else //Pintool data -#define RTE_PWM_FAULTA_PORT PWM_FAULTA_PORT +#define RTE_PWM_FAULTA_PORT 0 #if (PWM_FAULTA_LOC == 16) #define RTE_PWM_FAULTA_PIN PWM_FAULTA_PIN #define RTE_PWM_FAULTA_MUX 10 @@ -3820,7 +3824,7 @@ //Pintool data #endif -// PWM_FAULTB <0=>GPIO_26 <1=>GPIO_69 <1=>GPIO_74 +// PWM_FAULTB <0=>GPIO_26 <1=>GPIO_74 #ifndef PWM_FAULTB_LOC #define RTE_PWM_FAULTB_PORT_ID 0 @@ -3829,17 +3833,21 @@ #define RTE_PWM_FAULTB_PIN 26 #define RTE_PWM_FAULTB_MUX 10 #define RTE_PWM_FAULTB_PAD 0 //no pad -#elif (RTE_PWM_FAULTB_PORT_ID == 2) +#elif (RTE_PWM_FAULTB_PORT_ID == 1) +#ifdef SL_SI91X_ACX_MODULE +#error "ULP_GPIO_10 is not available in module boards/OPNs!" +#else #define RTE_PWM_FAULTB_PORT 0 #define RTE_PWM_FAULTB_PIN 74 #define RTE_PWM_FAULTB_MUX 8 #define RTE_PWM_FAULTB_PAD 32 +#endif #else #error "Invalid RTE_PWM_FAULTB_PIN Pin Configuration!" #endif #else //Pintool data -#define RTE_PWM_FAULTB_PORT PWM_FAULTB_PORT +#define RTE_PWM_FAULTB_PORT 0 #if (PWM_FAULTB_LOC == 19) #define RTE_PWM_FAULTB_PIN PWM_FAULTB_PIN #define RTE_PWM_FAULTB_MUX 10 @@ -3864,7 +3872,7 @@ #define RTE_PWM_SLP_EVENT_TRIG_PIN 72 #else //Pintool data -#define RTE_PWM_SLP_EVENT_TRIG_PORT PWM_SLEEP_EVT_TRIG_PORT +#define RTE_PWM_SLP_EVENT_TRIG_PORT 0 #define RTE_PWM_SLP_EVENT_TRIG_PIN (PWM_SLEEP_EVT_TRIG_PIN + GPIO_MAX_PIN) //Pintool data #endif @@ -3900,7 +3908,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_1_PORT PWM_TMR_EXT_TRIG_1_PORT +#define RTE_PWM_TMR_EXT_TRIG_1_PORT 0 #if (PWM_EXTTRIG1_LOC == 22) #define RTE_PWM_TMR_EXT_TRIG_1_PIN PWM_TMR_EXT_TRIG_1_PIN #define RTE_PWM_TMR_EXT_TRIG_1_MUX 10 @@ -3948,7 +3956,7 @@ #endif #else //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_2_PORT PWM_TMR_EXT_TRIG_2_PORT +#define RTE_PWM_TMR_EXT_TRIG_2_PORT 0 #if (PWM_EXTTRIG2_LOC == 26) #define RTE_PWM_TMR_EXT_TRIG_2_PIN PWM_TMR_EXT_TRIG_2_PIN #define RTE_PWM_TMR_EXT_TRIG_2_MUX 10 @@ -3974,7 +3982,7 @@ //PWM_TMR_EXT_TRIG_3 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_3_PORT PWM_TMR_EXT_TRIG_3_PORT +#define RTE_PWM_TMR_EXT_TRIG_3_PORT 0 #if (PWM_EXTTRIG3_LOC == 30) #define RTE_PWM_TMR_EXT_TRIG_3_PIN PWM_TMR_EXT_TRIG_3_PIN #define RTE_PWM_TMR_EXT_TRIG_3_MUX 10 @@ -3994,7 +4002,7 @@ //PWM_TMR_EXT_TRIG_4 //Pintool data -#define RTE_PWM_TMR_EXT_TRIG_4_PORT PWM_TMR_EXT_TRIG_4_PORT +#define RTE_PWM_TMR_EXT_TRIG_4_PORT 0 #if (PWM_EXTTRIG4_LOC == 33) #define RTE_PWM_TMR_EXT_TRIG_4_PIN PWM_TMR_EXT_TRIG_4_PIN #define RTE_PWM_TMR_EXT_TRIG_4_MUX 10 @@ -4014,9 +4022,9 @@ //<> QEI (Quadrature Encode Interface) -//QEI_DIR <0=>GPIO_28 <1=>GPIO_49 <2=>GPIO_57 <3=>GPIO_67 <4=>GPIO_71 <5=>GPIO_73 <6=>GPIO_11 <7=>GPIO_34 +//QEI_DIR <0=>GPIO_28 <1=>GPIO_49 <2=>GPIO_57 <3=>GPIO_71 <4=>GPIO_73 <5=>GPIO_11 <6=>GPIO_34 -#define RTE_QEI_DIR_PORT_ID 4 +#define RTE_QEI_DIR_PORT_ID 3 #if (RTE_QEI_DIR_PORT_ID == 0) #define RTE_QEI_DIR_PORT 0 @@ -4035,15 +4043,10 @@ #define RTE_QEI_DIR_PAD 21 #elif (RTE_QEI_DIR_PORT_ID == 3) #define RTE_QEI_DIR_PORT 0 -#define RTE_QEI_DIR_PIN 67 -#define RTE_QEI_DIR_MUX 3 -#define RTE_QEI_DIR_PAD 25 -#elif (RTE_QEI_DIR_PORT_ID == 4) -#define RTE_QEI_DIR_PORT 0 #define RTE_QEI_DIR_PIN 71 #define RTE_QEI_DIR_MUX 3 #define RTE_QEI_DIR_PAD 29 -#elif (RTE_QEI_DIR_PORT_ID == 5) +#elif (RTE_QEI_DIR_PORT_ID == 4) #define RTE_QEI_DIR_PORT 0 #define RTE_QEI_DIR_PIN 73 #define RTE_QEI_DIR_MUX 3 @@ -4120,9 +4123,11 @@ //QEI_PHB <0=>GPIO_27 <1=>GPIO_48 <1=>GPIO_56 <1=>GPIO_66 <1=>GPIO_70 <1=>GPIO_74 <7=>GPIO_33 #ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define RTE_QEI_PHB_PORT_ID 5 -#else +#ifdef SL_SI91X_ACX_MODULE #define RTE_QEI_PHB_PORT_ID 4 +#else +#define RTE_QEI_PHB_PORT_ID 5 +#endif #endif #if (RTE_QEI_PHB_PORT_ID == 0) @@ -4151,279 +4156,26 @@ #define RTE_QEI_PHB_MUX 3 #define RTE_QEI_PHB_PAD 28 #elif (RTE_QEI_PHB_PORT_ID == 5) +#ifdef SL_SI91X_ACX_MODULE +#error "ULP_GPIO_10 is not available in module boards/OPNs!" +#else #define RTE_QEI_PHB_PORT 0 #define RTE_QEI_PHB_PIN 74 #define RTE_QEI_PHB_MUX 3 #define RTE_QEI_PHB_PAD 32 -#else -#error "Invalid RTE_QEI_PHB_PIN Pin Configuration!" -#endif - -#endif - -//ADC START - -#ifndef ADC_P0_LOC -#define RTE_ADC_P0_PORT 0 -#define RTE_ADC_P0_PIN 0 -#else -#define RTE_ADC_P0_PORT ADC_P0_PORT -#define RTE_ADC_P0_PIN ADC_P0_PIN -#endif -#define RTE_ADC_P0_MUX 1 - -#ifndef ADC_N0_LOC -#define RTE_ADC_N0_PORT 0 -#define RTE_ADC_N0_PIN 1 -#else -#define RTE_ADC_N0_PORT ADC_N0_PORT -#define RTE_ADC_N0_PIN ADC_N0_PIN -#endif -#define RTE_ADC_N0_MUX 1 - -#ifndef ADC_P1_LOC -#define RTE_ADC_P1_PORT 0 -#define RTE_ADC_P1_PIN 2 -#else -#define RTE_ADC_P1_PORT ADC_P1_PORT -#define RTE_ADC_P1_PIN ADC_P1_PIN -#endif -#define RTE_ADC_P1_MUX 1 - -#ifndef ADC_N1_LOC -#define RTE_ADC_N1_PORT 0 -#define RTE_ADC_N1_PIN 3 -#else -#define RTE_ADC_N1_PORT ADC_N1_PORT -#define RTE_ADC_N1_PIN ADC_N1_PIN -#endif -#define RTE_ADC_N1_MUX 1 - -#ifndef ADC_P2_LOC -#define RTE_ADC_P2_PORT 0 -#define RTE_ADC_P2_PIN 4 -#else -#define RTE_ADC_P2_PORT ADC_P2_PORT -#define RTE_ADC_P2_PIN ADC_P2_PIN -#endif -#define RTE_ADC_P2_MUX 1 - -#ifndef ADC_N2_LOC -#define RTE_ADC_N2_PORT 0 -#define RTE_ADC_N2_PIN 5 -#else -#define RTE_ADC_N2_PORT ADC_N2_PORT -#define RTE_ADC_N2_PIN ADC_N2_PIN -#endif -#define RTE_ADC_N2_MUX 1 - -#ifndef ADC_P3_LOC -#define RTE_ADC_P3_PORT 0 -#define RTE_ADC_P3_PIN 6 -#else -#define RTE_ADC_P3_PORT ADC_P3_PORT -#define RTE_ADC_P3_PIN ADC_P3_PIN #endif -#define RTE_ADC_P3_MUX 1 - -#ifndef ADC_N3_LOC -#define RTE_ADC_N3_PORT 0 -#define RTE_ADC_N3_PIN 11 -#else -#define RTE_ADC_N3_PORT ADC_N3_PORT -#define RTE_ADC_N3_PIN ADC_N3_PIN -#endif -#define RTE_ADC_N3_MUX 1 - -#ifndef ADC_P4_LOC -#define RTE_ADC_P4_PORT 0 -#define RTE_ADC_P4_PIN 8 -#else -#define RTE_ADC_P4_PORT ADC_P4_PORT -#define RTE_ADC_P4_PIN ADC_P4_PIN -#endif -#define RTE_ADC_P4_MUX 1 - -#ifndef ADC_N4_LOC -#define RTE_ADC_N4_PORT 0 -#define RTE_ADC_N4_PIN 9 -#else -#define RTE_ADC_N4_PORT ADC_N4_PORT -#define RTE_ADC_N4_PIN ADC_N4_PIN -#endif -#define RTE_ADC_N4_MUX 1 - -#ifndef ADC_P5_LOC -#define RTE_ADC_P5_PORT 0 -#define RTE_ADC_P5_PIN 10 -#else -#define RTE_ADC_P5_PORT ADC_P5_PORT -#define RTE_ADC_P5_PIN ADC_P5_PIN -#endif -#define RTE_ADC_P5_MUX 1 - -#ifndef ADC_N5_LOC -#define RTE_ADC_N5_PORT 0 -#define RTE_ADC_N5_PIN 7 -#else -#define RTE_ADC_N5_PORT ADC_N5_PORT -#define RTE_ADC_N5_PIN ADC_N5_PIN -#endif -#define RTE_ADC_N5_MUX 1 - -#ifndef ADC_P6_LOC -#define RTE_ADC_P6_PORT 0 -#define RTE_ADC_P6_PIN 25 -#else -#define RTE_ADC_P6_PORT ADC_P6_PORT -#define RTE_ADC_P6_PIN ADC_P6_PIN -#endif -#define RTE_ADC_P6_MUX 1 -#define RTE_ADC_P6_PAD 0 - -#ifndef ADC_N6_LOC -#define RTE_ADC_N6_PORT 0 -#define RTE_ADC_N6_PIN 26 -#else -#define RTE_ADC_N6_PORT ADC_N6_PORT -#define RTE_ADC_N6_PIN ADC_N6_PIN -#endif -#define RTE_ADC_N6_MUX 1 -#define RTE_ADC_N6_PAD 0 - -#ifndef ADC_P7_LOC -#define RTE_ADC_P7_PORT 0 -#define RTE_ADC_P7_PIN 27 -#else -#define RTE_ADC_P7_PORT ADC_P7_PORT -#define RTE_ADC_P7_PIN ADC_P7_PIN -#endif -#define RTE_ADC_P7_MUX 1 -#define RTE_ADC_P7_PAD 0 - -#ifndef ADC_N7_LOC -#define RTE_ADC_N7_PORT 0 -#define RTE_ADC_N7_PIN 28 #else -#define RTE_ADC_N7_PORT ADC_N7_PORT -#define RTE_ADC_N7_PIN ADC_N7_PIN -#endif -#define RTE_ADC_N7_MUX 1 -#define RTE_ADC_N7_PAD 0 - -#ifndef ADC_P8_LOC -#define RTE_ADC_P8_PORT 0 -#define RTE_ADC_P8_PIN 29 -#else -#define RTE_ADC_P8_PORT ADC_P8_PORT -#define RTE_ADC_P8_PIN ADC_P8_PIN -#endif -#define RTE_ADC_P8_MUX 1 -#define RTE_ADC_P8_PAD 0 - -#ifndef ADC_N8_LOC -#define RTE_ADC_N8_PORT 0 -#define RTE_ADC_N8_PIN 30 -#else -#define RTE_ADC_N8_PORT ADC_N8_PORT -#define RTE_ADC_N8_PIN ADC_N8_PIN -#endif -#define RTE_ADC_N8_MUX 1 -#define RTE_ADC_N8_PAD 0 - -#ifndef ADC_P10_LOC -#define RTE_ADC_P10_PORT 0 -#define RTE_ADC_P10_PIN 1 -#else -#define RTE_ADC_P10_PORT ADC_P10_PORT -#define RTE_ADC_P10_PIN ADC_P10_PIN -#endif -#define RTE_ADC_P10_MUX 1 - -#ifndef ADC_P11_LOC -#define RTE_ADC_P11_PORT 0 -#define RTE_ADC_P11_PIN 3 -#else -#define RTE_ADC_P11_PORT ADC_P11_PORT -#define RTE_ADC_P11_PIN ADC_P11_PIN -#endif -#define RTE_ADC_P11_MUX 1 - -#ifndef ADC_P12_LOC -#define RTE_ADC_P12_PORT 0 -#define RTE_ADC_P12_PIN 5 -#else -#define RTE_ADC_P12_PORT ADC_P12_PORT -#define RTE_ADC_P12_PIN ADC_P12_PIN -#endif -#define RTE_ADC_P12_MUX 1 - -#ifndef ADC_P13_LOC -#define RTE_ADC_P13_PORT 0 -#define RTE_ADC_P13_PIN 11 -#else -#define RTE_ADC_P13_PORT ADC_P13_PORT -#define RTE_ADC_P13_PIN ADC_P13_PIN -#endif -#define RTE_ADC_P13_MUX 1 - -#ifndef ADC_P14_LOC -#define RTE_ADC_P14_PORT 0 -#define RTE_ADC_P14_PIN 9 -#else -#define RTE_ADC_P14_PORT ADC_P14_PORT -#define RTE_ADC_P14_PIN ADC_P14_PIN -#endif -#define RTE_ADC_P14_MUX 1 - -#ifndef ADC_P15_LOC -#define RTE_ADC_P15_PORT 0 -#define RTE_ADC_P15_PIN 7 -#else -#define RTE_ADC_P15_PORT ADC_P15_PORT -#define RTE_ADC_P15_PIN ADC_P15_PIN -#endif -#define RTE_ADC_P15_MUX 1 - -#ifndef ADC_P16_LOC -#define RTE_ADC_P16_PORT 0 -#define RTE_ADC_P16_PIN 26 -#else -#define RTE_ADC_P16_PORT ADC_P16_PORT -#define RTE_ADC_P16_PIN ADC_P16_PIN -#endif -#define RTE_ADC_P16_MUX 1 -#define RTE_ADC_P16_PAD 0 - -#ifndef ADC_P17_LOC -#define RTE_ADC_P17_PORT 0 -#define RTE_ADC_P17_PIN 28 -#else -#define RTE_ADC_P17_PORT ADC_P17_PORT -#define RTE_ADC_P17_PIN ADC_P17_PIN +#error "Invalid RTE_QEI_PHB_PIN Pin Configuration!" #endif -#define RTE_ADC_P17_MUX 1 -#define RTE_ADC_P17_PAD 0 -#ifndef ADC_P18_LOC -#define RTE_ADC_P18_PORT 0 -#define RTE_ADC_P18_PIN 30 -#else -#define RTE_ADC_P18_PORT ADC_P18_PORT -#define RTE_ADC_P18_PIN ADC_P18_PIN #endif -#define RTE_ADC_P18_MUX 1 -#define RTE_ADC_P18_PAD 0 - -//ADC END - //COMPARATOR START #ifndef COMP1_P0_LOC #define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN 0 #else -#define RTE_COMP1_P0_PORT COMP1_P0_PORT +#define RTE_COMP1_P0_PORT 0 #define RTE_COMP1_P0_PIN COMP1_P0_PIN #endif #define RTE_COMP1_P0_MUX 0 @@ -4432,7 +4184,7 @@ #define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN 1 #else -#define RTE_COMP1_N0_PORT COMP1_N0_PORT +#define RTE_COMP1_N0_PORT 0 #define RTE_COMP1_N0_PIN COMP1_N0_PIN #endif #define RTE_COMP1_N0_MUX 0 @@ -4441,7 +4193,7 @@ #define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN 5 #else -#define RTE_COMP1_P1_PORT COMP1_P1_PORT +#define RTE_COMP1_P1_PORT 0 #define RTE_COMP1_P1_PIN COMP1_P1_PIN #endif #define RTE_COMP1_P1_MUX 0 @@ -4450,7 +4202,7 @@ #define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN 4 #else -#define RTE_COMP1_N1_PORT COMP1_N1_PORT +#define RTE_COMP1_N1_PORT 0 #define RTE_COMP1_N1_PIN COMP1_N1_PIN #endif #define RTE_COMP1_N1_MUX 0 @@ -4459,7 +4211,7 @@ #define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN 2 #else -#define RTE_COMP2_P0_PORT COMP2_P0_PORT +#define RTE_COMP2_P0_PORT 0 #define RTE_COMP2_P0_PIN COMP2_P0_PIN #endif #define RTE_COMP2_P0_MUX 0 @@ -4468,7 +4220,7 @@ #define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN 3 #else -#define RTE_COMP2_N0_PORT COMP2_N0_PORT +#define RTE_COMP2_N0_PORT 0 #define RTE_COMP2_N0_PIN COMP2_N0_PIN #endif #define RTE_COMP2_N0_MUX 0 @@ -4477,7 +4229,7 @@ #define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN 27 #else -#define RTE_COMP2_P1_PORT COMP2_P1_PORT +#define RTE_COMP2_P1_PORT 0 #define RTE_COMP2_P1_PIN COMP2_P1_PIN #endif #define RTE_COMP2_P1_MUX 0 @@ -4487,7 +4239,7 @@ #define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN 28 #else -#define RTE_COMP2_N1_PORT COMP2_N1_PORT +#define RTE_COMP2_N1_PORT 0 #define RTE_COMP2_N1_PIN COMP2_N1_PIN #endif #define RTE_COMP2_N1_MUX 0 @@ -4695,18 +4447,9 @@ #error "Invalid RTE_ULP_GPIO_2_PIN Pin Configuration!" #endif -#ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER #define RTE_ULP_GPIO_3_PORT_ID 1 -#else -#define RTE_ULP_GPIO_3_PORT_ID 0 -#endif -#if (RTE_ULP_GPIO_3_PORT_ID == 0) -#define RTE_ULP_GPIO_3_PORT 0 -#define RTE_ULP_GPIO_3_PAD 25 -#define RTE_ULP_GPIO_3_PIN 67 -#define RTE_ULP_GPIO_3_MODE 0 -#elif (RTE_ULP_GPIO_3_PORT_ID == 1) +#if (RTE_ULP_GPIO_3_PORT_ID == 1) #define RTE_ULP_GPIO_3_PORT 4 #define RTE_ULP_GPIO_3_PIN 3 #define RTE_ULP_GPIO_3_MODE 0 @@ -4835,10 +4578,14 @@ #endif #if (RTE_ULP_GPIO_10_PORT_ID == 0) +#ifdef SL_SI91X_ACX_MODULE +#error "ULP_GPIO_10 is not available in module boards/OPNs!" +#else #define RTE_ULP_GPIO_10_PORT 4 #define RTE_ULP_GPIO_10_PAD 32 #define RTE_ULP_GPIO_10_PIN 74 #define RTE_ULP_GPIO_10_MODE 0 +#endif #elif (RTE_ULP_GPIO_10_PORT_ID == 1) #define RTE_ULP_GPIO_10_PORT 4 #define RTE_ULP_GPIO_10_PIN 10 @@ -4891,11 +4638,17 @@ #define RTE_UULP_GPIO_5_MODE 0 // UULP GPIO as enable pin for sensors +#ifdef SL_SI91X_ACX_MODULE +#define SENSOR_ENABLE_GPIO_MAPPED_TO_ULP +#define SENSOR_ENABLE_GPIO_PORT RTE_ULP_GPIO_2_PORT +#define SENSOR_ENABLE_GPIO_PIN RTE_ULP_GPIO_2_PIN +#else #define SENSOR_ENABLE_GPIO_MAPPED_TO_UULP #define SENSOR_ENABLE_GPIO_PIN RTE_UULP_GPIO_1_PIN +#endif // Memlcd GPIOs -#ifdef SL_SI91X_MODULE_BOARD +#ifdef SL_SI91X_ACX_MODULE #define RTE_MEMLCD_CS_PIN 4 // Memlcd SPI CS pin #define RTE_MEMLCD_CS_PORT 0 // Memlcd SPI CS port diff --git a/components/device/silabs/si91x/mcu/core/chip/config/pin_config.h b/components/device/silabs/si91x/mcu/core/chip/config/pin_config.h index ab6a56743..60a6a7d20 100644 --- a/components/device/silabs/si91x/mcu/core/chip/config/pin_config.h +++ b/components/device/silabs/si91x/mcu/core/chip/config/pin_config.h @@ -25,8 +25,8 @@ // $[SSI_SLAVE] // [SSI_SLAVE]$ -// $[ULP_SPI] -// [ULP_SPI]$ +// $[ULP_SSI] +// [ULP_SSI]$ // $[GSPI_MASTER] // [GSPI_MASTER]$ @@ -46,8 +46,74 @@ // $[PWM] // [PWM]$ -// $[ADC] -// [ADC]$ +// $[PWM_CH0] +// [PWM_CH0]$ + +// $[PWM_CH1] +// [PWM_CH1]$ + +// $[PWM_CH2] +// [PWM_CH2]$ + +// $[PWM_CH3] +// [PWM_CH3]$ + +// $[ADC_CH1] +// [ADC_CH1]$ + +// $[ADC_CH2] +// [ADC_CH2]$ + +// $[ADC_CH3] +// [ADC_CH3]$ + +// $[ADC_CH4] +// [ADC_CH4]$ + +// $[ADC_CH5] +// [ADC_CH5]$ + +// $[ADC_CH6] +// [ADC_CH6]$ + +// $[ADC_CH7] +// [ADC_CH7]$ + +// $[ADC_CH8] +// [ADC_CH8]$ + +// $[ADC_CH9] +// [ADC_CH9]$ + +// $[ADC_CH10] +// [ADC_CH10]$ + +// $[ADC_CH11] +// [ADC_CH11]$ + +// $[ADC_CH12] +// [ADC_CH12]$ + +// $[ADC_CH13] +// [ADC_CH13]$ + +// $[ADC_CH14] +// [ADC_CH14]$ + +// $[ADC_CH15] +// [ADC_CH15]$ + +// $[ADC_CH16] +// [ADC_CH16]$ + +// $[ADC_CH17] +// [ADC_CH17]$ + +// $[ADC_CH18] +// [ADC_CH18]$ + +// $[ADC_CH19] +// [ADC_CH19]$ // $[COMP1] // [COMP1]$ @@ -61,6 +127,15 @@ // $[DAC1] // [DAC1]$ +// $[SYSRTC] +// [SYSRTC]$ + +// $[UULP_VBAT_GPIO] +// [UULP_VBAT_GPIO]$ + +// $[GPIO] +// [GPIO]$ + // $[CUSTOM_PIN_NAME] #ifndef _PORT #define _PORT 0 diff --git a/components/device/silabs/si91x/mcu/core/chip/config/sl_si91x_external_oscillator.h b/components/device/silabs/si91x/mcu/core/chip/config/sl_si91x_external_oscillator.h new file mode 100644 index 000000000..df6e23c70 --- /dev/null +++ b/components/device/silabs/si91x/mcu/core/chip/config/sl_si91x_external_oscillator.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * @file sl_si91x_external_oscillator.h + * @brief + ******************************************************************************* + * # License + * Copyright 2020 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ +#ifndef __SL_SI91X_EXTERANAL_OSCILLATOR__ +#define __SL_SI91X_EXTERANAL_OSCILLATOR__ + +// <<< Use Configuration Wizard in Context Menu >>> +// External Oscillator Configuration on UULP GPIOs + +// UULP_GPIO_NUMBER +// 1 +// 2 +// 3 +// 4 +// Default: UULP_GPIO_3 + +#define UULP_GPIO_1 1 +#define UULP_GPIO_2 2 +#define UULP_GPIO_3 3 +#define UULP_GPIO_4 4 +#define OSC_UULP_GPIO UULP_GPIO_3 + +#if (OSC_UULP_GPIO == 1) +#define UULP_GPIO_OSC_MODE 3 +#elif (OSC_UULP_GPIO == 2) +#define UULP_GPIO_OSC_MODE 4 +#elif (OSC_UULP_GPIO == 3) +#define UULP_GPIO_OSC_MODE 5 +#elif (OSC_UULP_GPIO == 4) +#define UULP_GPIO_OSC_MODE 6 +#endif + +// +// <<< end of configuration section >>> + +#endif //__SL_SI91X_EXTERANAL_OSCILLATOR__ diff --git a/components/device/silabs/si91x/mcu/core/chip/inc/system_si91x.h b/components/device/silabs/si91x/mcu/core/chip/inc/system_si91x.h index 7ed339e12..a5fdc7b33 100644 --- a/components/device/silabs/si91x/mcu/core/chip/inc/system_si91x.h +++ b/components/device/silabs/si91x/mcu/core/chip/inc/system_si91x.h @@ -70,6 +70,7 @@ typedef enum SLEEP_TYPE { #define DEFAULT_BYP_RC_CLOCK 32000000 #define DEFAULT_I2S_PLL_CLOCK 0 #define DEFAULT_REF_CLOCK 2 +#define MAX_INTF_PLL_FREQUENCY 180000000 /* Selecting the PLL reference clock */ /* 0 - XTAL_CLK, 1 - Reserved, 2 - RC_32MHZ_CLK, 3 - Reserved */ diff --git a/components/device/silabs/si91x/mcu/core/chip/src/rsi_deepsleep_soc.c b/components/device/silabs/si91x/mcu/core/chip/src/rsi_deepsleep_soc.c index bd92052bc..664536964 100644 --- a/components/device/silabs/si91x/mcu/core/chip/src/rsi_deepsleep_soc.c +++ b/components/device/silabs/si91x/mcu/core/chip/src/rsi_deepsleep_soc.c @@ -56,10 +56,6 @@ extern void set_scdc(uint32_t Deepsleep); #ifdef SLI_SI91X_MCU_ENABLE_PSRAM_FEATURE #include "sl_si91x_psram_config.h" -#if PSRAM_HALF_SLEEP_SUPPORTED != FALSE -extern sl_psram_return_type_t sl_si91x_psram_sleep(void); -extern sl_psram_return_type_t sl_si91x_psram_wakeup(void); -#endif #endif uint32_t nvic_enable[MAX_NVIC_REGS] = { 0 }; diff --git a/components/device/silabs/si91x/mcu/core/chip/src/startup_si91x.c b/components/device/silabs/si91x/mcu/core/chip/src/startup_si91x.c index a07278a48..72a493470 100644 --- a/components/device/silabs/si91x/mcu/core/chip/src/startup_si91x.c +++ b/components/device/silabs/si91x/mcu/core/chip/src/startup_si91x.c @@ -60,7 +60,7 @@ extern unsigned long _edata; /*!< End address for the .data section extern unsigned long __bss_start__; /*!< Start address for the .bss section */ extern unsigned long __bss_end__; /*!< End address for the .bss section */ -#if defined(NO_DATA_SEGMENT_IN_PSRAM) && (SLI_SI91X_MCU_ENABLE_PSRAM_SECTION_FEATURE == ENABLE) +#if defined(NO_DATA_SEGMENT_IN_PSRAM) && (SLI_SI91X_MCU_PSRAM_PRESENT == ENABLE) extern unsigned long _slpcode; /*!< Start address for the initialization values of the .sleep_psram_driver section. */ extern unsigned long _scode; /*!< Start address for the .sleep_psram_driver section */ @@ -210,7 +210,7 @@ void Copy_Table(void) for (pulDest = &_sdata; pulDest < &_edata;) { *(pulDest++) = *(pulSrc++); } -#if defined(NO_DATA_SEGMENT_IN_PSRAM) && (SLI_SI91X_MCU_ENABLE_PSRAM_SECTION_FEATURE == ENABLE) +#if defined(NO_DATA_SEGMENT_IN_PSRAM) && (SLI_SI91X_MCU_PSRAM_PRESENT == ENABLE) /* Copy the sleep PSRAM driver segment to SRAM */ pulSrc = &_slpcode; for (pulDest = &_scode; pulDest < &_ecode;) { @@ -244,11 +244,6 @@ void RSI_Default_Reset_Handler(void) /* Zero fill the bss segment */ Zero_Table(); - /*if C++ compilation required */ -#ifdef SUPPORT_CPLUSPLUS - extern void __libc_init_array(void); - __libc_init_array(); -#endif #if defined(SLI_SI91X_MCU_ENABLE_RAM_BASED_EXECUTION) //copying the vector table from flash to ram memcpy(ram_vector, (uint32_t *)SCB->VTOR, sizeof(__VECTOR_TABLE)); @@ -257,6 +252,13 @@ void RSI_Default_Reset_Handler(void) #endif /*Init system level initializations */ SystemInit(); + /* This macro enables support for C++ linkage in the startup code. */ +#ifdef SUPPORT_CPLUSPLUS + /* Initialize global and static C++ objects. This function must be called after SystemInit() to ensure that the hardware is + properly initialized before any global or static constructors are executed. */ + extern void __libc_init_array(void); + __libc_init_array(); +#endif /* Call the application's entry point.*/ main(); } diff --git a/components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c b/components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c index cb310a6bb..cebc31b36 100644 --- a/components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c +++ b/components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c @@ -30,9 +30,15 @@ #include "rsi_ulpss_clk.h" #include "rsi_rom_ulpss_clk.h" #include "rsi_rom_clks.h" -#if defined(NO_DATA_SEGMENT_IN_PSRAM) && (SLI_SI91X_MCU_ENABLE_PSRAM_SECTION_FEATURE == ENABLE) +#if defined(NO_DATA_SEGMENT_IN_PSRAM) && (SLI_SI91X_MCU_PSRAM_PRESENT == ENABLE) #include "rsi_d_cache.h" #endif + +#if defined(SI91X_32kHz_EXTERNAL_OSCILLATOR) +#include "sl_si91x_external_oscillator.h" +#define MCU_RETENTION_BASE_ADDRESS 0x24048600 +#define NPSS_GPIO_CTRL (MCU_RETENTION_BASE_ADDRESS + 0x1C) +#endif /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ @@ -95,7 +101,7 @@ void SystemCoreClockUpdate(void) /* Get Core Clock Frequency */ package_type = PACKAGE_TYPE_WMCU; } #endif -#if defined(NO_DATA_SEGMENT_IN_PSRAM) && (SLI_SI91X_MCU_ENABLE_PSRAM_SECTION_FEATURE == ENABLE) +#if defined(NO_DATA_SEGMENT_IN_PSRAM) && (SLI_SI91X_MCU_PSRAM_PRESENT == ENABLE) rsi_d_cache_invalidate_all(); #endif /*Initialize IPMU and MCU FSM blocks */ @@ -116,13 +122,19 @@ void SystemCoreClockUpdate(void) /* Get Core Clock Frequency */ /* Configuring MCU FSM clock for BG_PMU */ RSI_IPMU_ClockMuxSel(2); -#if defined(SL_SI91X_MODULE_BOARD) - /* Configuring RC 32KHz Clock for LF-FSM*/ +#if defined(SI91X_32kHz_EXTERNAL_OSCILLATOR) + + // Configuring the UULP_GPIOs for external oscillator + *(volatile uint32 *)(NPSS_GPIO_CTRL + (4 * OSC_UULP_GPIO)) = (BIT(3) | UULP_GPIO_OSC_MODE); + MCUAON_GEN_CTRLS_REG |= BIT(0); + MCUAON_GEN_CTRLS_REG; + + // Configuring RC 32KHz Clock for LF-FSM RSI_PS_FsmLfClkSel(KHZ_RC_CLK_SEL); #else /* Configuring XTAL 32.768kHz Clock for LF-FSM */ RSI_PS_FsmLfClkSel(KHZ_XTAL_CLK_SEL); -#endif // SL_SI91X_MODULE_BOARD +#endif // SI91X_32kHz_EXTERNAL_OSCILLATOR /* Configuring RC-32MHz Clock for HF-FSM */ RSI_PS_FsmHfClkSel(FSM_32MHZ_RC); diff --git a/components/device/silabs/si91x/mcu/core/common/component/si91x_debug.slcc b/components/device/silabs/si91x/mcu/core/common/component/si91x_debug.slcc index 1e67a65db..305669321 100644 --- a/components/device/silabs/si91x/mcu/core/common/component/si91x_debug.slcc +++ b/components/device/silabs/si91x/mcu/core/common/component/si91x_debug.slcc @@ -21,7 +21,7 @@ define: value: "1" unless: [sl_ulp_uart] - {"name":"ENABLE_DEBUG_MODULE","value":1} -- {"name": "DEBUG_ENABLE","value":1} +- {"name":"DEBUG_ENABLE","value":1} template_contribution: - name: event_handler value: @@ -29,3 +29,5 @@ template_contribution: include: rsi_debug.h handler: DEBUGINIT priority: -9995 +ui_hints: + visibility: never \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/core/common/component/si91x_debug_uc.slcc b/components/device/silabs/si91x/mcu/core/common/component/si91x_debug_uc.slcc new file mode 100644 index 000000000..783d34639 --- /dev/null +++ b/components/device/silabs/si91x/mcu/core/common/component/si91x_debug_uc.slcc @@ -0,0 +1,17 @@ +id: si91x_debug_uc +package: wiseconnect3_sdk +description: > + "Provides application prints functionality to the Si91x, configuration options for Debug UART instance and the baudrate" +label: Debug UC +category: Device|Si91x|MCU|Common +quality: production +component_root_path: components/device/silabs/si91x/mcu/core/common +config_file: + - path: config/sl_si91x_debug_uc_1_config.h + unless: [sl_ulp_uart] + - path: config/sl_si91x_debug_uc_2_config.h + condition: [sl_ulp_uart] +provides: +- name: si91x_debug_uc +define: +- name: DEBUG_UART_UC \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_calendar_config.h b/components/device/silabs/si91x/mcu/core/common/config/sl_si91x_debug_uc_1_config.h similarity index 54% rename from components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_calendar_config.h rename to components/device/silabs/si91x/mcu/core/common/config/sl_si91x_debug_uc_1_config.h index b689c30b8..24c89383a 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_calendar_config.h +++ b/components/device/silabs/si91x/mcu/core/common/config/sl_si91x_debug_uc_1_config.h @@ -1,9 +1,9 @@ /***************************************************************************/ /** - * @file sl_si91x_calendar_config.h - * @brief Calendar configuration file. + * @file sl_si91x_debug_uc_1_config.h + * @brief Debug configuration file. ******************************************************************************* * # License - * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com ******************************************************************************* * * SPDX-License-Identifier: Zlib @@ -28,43 +28,40 @@ * ******************************************************************************/ -#ifndef SL_SI91X_CALENDAR_CONFIG_H -#define SL_SI91X_CALENDAR_CONFIG_H +#ifndef SL_SI91X_DEBUG_UC_1_CONFIG_H +#define SL_SI91X_DEBUG_UC_1_CONFIG_H +/******************************* Debug UART Configuration **************************/ // <<< Use Configuration Wizard in Context Menu >>> -// Clock Configuration +// Debug Configuration -#define CALENDAR_RO_CLOCK 1 -#define CALENDAR_RC_CLOCK 2 -#define CALENDAR_XTAL_CLOCK 4 +// Enable/Disable Debug Configuration +// Enable: Enables the Debug logging +// Disable: Disables the Debug logging +#define DEBUG_UART_ENABLE 1 +#if (DEBUG_UART_ENABLE == 1) +#define DEBUG_UART 1 +#else +#undef DEBUG_UART +#endif -// CALENDAR UC Configuration -// Enable: Peripheral configuration is taken straight from the configuration set in the universal configuration (UC). -// Disable: If the application demands it to be modified during runtime, use the sl_si91x_calendar_set_configuration API to modify the peripheral configuration. -// Default: 1 -#define CALENDAR_UC 1 +#define SL_M4_USART0_INSTANCE 1 +#define SL_M4_UART1_INSTANCE 2 +#define SL_ULP_UART_INSTANCE 3 -// Clock Source -// RC Clock -// RO Clock -// XTAL Clock -// Selection of the Calendar CLK Type. -#define CALENDAR_CLOCK_TYPE CALENDAR_RC_CLOCK +// Instance +// UART0/USART0 +// UART1 +// ULP UART +// Default: ULP UART +#define SL_DEBUG_INSTANCE SL_ULP_UART_INSTANCE -// +// Baud Rate (Baud/Second) <300-7372800> +// Default: 115200 +#define SL_DEBUG_BAUD_RATE 115200 +// // // <<< end of configuration section >>> -// Structure to get value of clock config from user -typedef struct config { - uint8_t calendar_clock_type; -} config_t; - -#if (CALENDAR_CLOCK_TYPE) -config_t configuration = { - .calendar_clock_type = CALENDAR_CLOCK_TYPE, -}; -#endif - -#endif /* SL_SI91X_CALENDAR_CONFIG_H */ +#endif /* SL_SI91X_DEBUG_UC_1_CONFIG_H */ diff --git a/components/device/silabs/si91x/mcu/core/common/config/sl_si91x_debug_uc_2_config.h b/components/device/silabs/si91x/mcu/core/common/config/sl_si91x_debug_uc_2_config.h new file mode 100644 index 000000000..733405113 --- /dev/null +++ b/components/device/silabs/si91x/mcu/core/common/config/sl_si91x_debug_uc_2_config.h @@ -0,0 +1,66 @@ +/***************************************************************************/ /** + * @file sl_si91x_debug_uc_2_config.h + * @brief Debug configuration file. + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#ifndef SL_SI91X_DEBUG_UC_2_CONFIG_H +#define SL_SI91X_DEBUG_UC_2_CONFIG_H + +/******************************* Debug UART Configuration **************************/ +// <<< Use Configuration Wizard in Context Menu >>> +// Debug Configuration + +// Enable/Disable Debug Configuration +// Enable: Enables the Debug logging +// Disable: Disables the Debug logging +#define DEBUG_UART_ENABLE 0 +#if (DEBUG_UART_ENABLE == 1) +#define DEBUG_UART 1 +#else +#undef DEBUG_UART +#endif + +#define SL_M4_USART0_INSTANCE 1 +#define SL_M4_UART1_INSTANCE 2 + +// Instance (ULP UART is being used) +// UART0/USART0 +// UART1 +// Default: UART0/USART0 +// Uninstall ULP UART to use it for debug logging +#define SL_DEBUG_INSTANCE SL_M4_USART0_INSTANCE + +// Baud Rate (Baud/Second) <300-7372800> +// Default: 115200 +#define SL_DEBUG_BAUD_RATE 115200 + +// +// +// <<< end of configuration section >>> + +#endif /* SL_SI91X_DEBUG_UC_2_CONFIG_H */ diff --git a/components/device/silabs/si91x/mcu/core/common/inc/rsi_debug.h b/components/device/silabs/si91x/mcu/core/common/inc/rsi_debug.h index 30eeccf7c..b5500a2a6 100644 --- a/components/device/silabs/si91x/mcu/core/common/inc/rsi_debug.h +++ b/components/device/silabs/si91x/mcu/core/common/inc/rsi_debug.h @@ -21,6 +21,13 @@ #include #include #include "rsi_ccp_user_config.h" +#ifdef DEBUG_UART_UC +#ifndef SL_SI91X_ULP_UART +#include "sl_si91x_debug_uc_1_config.h" +#else +#include "sl_si91x_debug_uc_2_config.h" +#endif +#endif #ifdef __cplusplus extern "C" { @@ -31,6 +38,7 @@ void Board_Debug_Init(void); void Board_UARTPutSTR(const uint8_t *ptr); uint8_t Board_UARTGetChar(void); void Board_UARTPutChar(uint8_t ch); +void dummy_printf(const char *fmt, ...); #ifndef IOSTREAM_USART #ifdef DEBUG_UART @@ -40,8 +48,8 @@ void Board_UARTPutChar(uint8_t ch); #define DEBUGIN() Board_UARTGetChar() #else #define DEBUGINIT() -#define DEBUGOUT(...) -#define DEBUGSTR(str) +#define DEBUGOUT(...) dummy_printf(__VA_ARGS__) +#define DEBUGSTR(str) (void)str #define DEBUGIN() #endif #else @@ -53,4 +61,4 @@ void Board_UARTPutChar(uint8_t ch); } #endif -#endif // __RSI_DEBUG_H__ \ No newline at end of file +#endif // __RSI_DEBUG_H__ diff --git a/components/device/silabs/si91x/mcu/core/common/si91x_debug.slcc b/components/device/silabs/si91x/mcu/core/common/si91x_debug.slcc index d5baf5d9c..002cb2254 100644 --- a/components/device/silabs/si91x/mcu/core/common/si91x_debug.slcc +++ b/components/device/silabs/si91x/mcu/core/common/si91x_debug.slcc @@ -11,7 +11,8 @@ provides: source: - path: src/rsi_debug.c include: -- path: {"path":"inc/rsi_debug.h"} +- path: inc +- path: config define: - name: DEBUG_UART - name: ENABLE_DEBUG_MODULE diff --git a/components/device/silabs/si91x/mcu/core/common/src/rsi_debug.c b/components/device/silabs/si91x/mcu/core/common/src/rsi_debug.c index d5c6375d4..6902224ca 100644 --- a/components/device/silabs/si91x/mcu/core/common/src/rsi_debug.c +++ b/components/device/silabs/si91x/mcu/core/common/src/rsi_debug.c @@ -15,6 +15,7 @@ * ******************************************************************************/ +#include #include "rsi_debug.h" #include "USART.h" #include "rsi_ccp_common.h" @@ -27,33 +28,28 @@ osMutexId_t si91x_prints_mutex = NULL; void ARM_UART_SignalEvent(uint32_t event); extern void cache_uart_rx_data(const char character); -#ifdef SLI_SI91X_MCU_CONFIG_RADIO_BOARD_BASE_VER -#define M4_UART1_INSTANCE 0U //!Select m4 uart1 for prints -#if defined(SLI_SI91X_MCU_CONFIG_RADIO_BOARD_VER2) -#define ULP_UART_INSTANCE 1U //!Select m4 uart2 for prints -#else -#define M4_UART2_INSTANCE 1U //!Select ulp uart for prints -#endif -#else -#define M4_UART1_INSTANCE 1U //!Select m4 uart1 for prints -#define M4_UART2_INSTANCE 0U //!Select m4 uart2 for prints -#define ULP_UART_INSTANCE 0U //!Select ulp uart for prints -#endif -#define BOARD_BAUD_VALUE 115200 //UART baud rate -#if defined(M4_UART1_INSTANCE) && (M4_UART1_INSTANCE == 1) +#ifdef DEBUG_UART_UC +#define BOARD_BAUD_VALUE SL_DEBUG_BAUD_RATE //UART baud rate + +#if (SL_DEBUG_INSTANCE == SL_M4_USART0_INSTANCE) +#define M4_UART1_INSTANCE 1U //!Select m4 uart1 for prints. To overcome backward compatibility extern ARM_DRIVER_USART Driver_USART0; static ARM_DRIVER_USART *UARTdrv = &Driver_USART0; -#endif - -#if defined(M4_UART2_INSTANCE) && (M4_UART2_INSTANCE == 1) +#elif (SL_DEBUG_INSTANCE == SL_M4_UART1_INSTANCE) +#define M4_UART2_INSTANCE 1U //!Select m4 uart2 for prints. To overcome backward compatibility extern ARM_DRIVER_USART Driver_UART1; static ARM_DRIVER_USART *UARTdrv = &Driver_UART1; +#elif (SL_DEBUG_INSTANCE == SL_ULP_UART_INSTANCE) +#define ULP_UART_INSTANCE 1U //!Select ULP UART for prints. To overcome backward compatibility +extern ARM_DRIVER_USART Driver_ULP_UART; +static ARM_DRIVER_USART *UARTdrv = &Driver_ULP_UART; #endif - -#if defined(ULP_UART_INSTANCE) && (ULP_UART_INSTANCE == 1) +#else +#define ULP_UART_INSTANCE 1U //!Select ULP UART for prints. To overcome backward compatibility extern ARM_DRIVER_USART Driver_ULP_UART; static ARM_DRIVER_USART *UARTdrv = &Driver_ULP_UART; +#define BOARD_BAUD_VALUE 115200 //UART baud rate #endif ARM_USART_CAPABILITIES drv_ulp_capabilities; @@ -463,3 +459,17 @@ size_t __write(int handle, const unsigned char *buffer, size_t size) #endif #endif /* defined (__ICCARM__) */ + +/** + * @fn void dummy_printf(const char *fmt, ...) + * @brief It does nothing but used when DEBUG_UART is not defined, to avoid compilation errors. + * @param[in] fmt: format string + * @return none + */ +void dummy_printf(const char *fmt, ...) +{ + va_list args; + va_start(args, fmt); + // Do Nothing + va_end(args); +} diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CAN.c b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CAN.c deleted file mode 100644 index 679a2a27d..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CAN.c +++ /dev/null @@ -1,982 +0,0 @@ -/* -------------------------------------------------------------------------- - * Copyright (c) 2013-2016 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 02. March 2016 - * $Revision: V1.1 - * - * Driver: Driver_CAN1 - * Configured: via RTE_Device.h configuration file - * Project: CAN Driver for Silicon Labs MCU - * -------------------------------------------------------------------------- - * Use the following configuration settings in the middleware component - * to connect to this driver. - * - * Configuration Setting Value CAN Interface - * --------------------- ----- ------------- - * Connect to hardware via Driver_CAN# = 1 use CAN1 - * -------------------------------------------------------------------------- - * Defines used for driver configuration (at compile time): - * - * CAN_CLOCK_TOLERANCE: defines maximum allowed clock tolerance in 1/1024 steps - * - default value: 15 (approx. 1.5 %) - * CAN0_OBJ_NUM: number of message objects used by CAN0 controller - * this value can be reduced to save some RAM space - * - default value: 2 (also this is maximum value) - * CAN1_OBJ_NUM: number of message objects used by CAN1 controller - * this value can be reduced to save some RAM space - * - default value: 2 (also this is maximum value) - * -------------------------------------------------------------------------- */ - -/* History: - * Version 1.0 - * Initial release - */ -#include "rsi_ccp_user_config.h" -#if defined(CHIP_9118) -#include "CAN.h" -#if RTE_CAN1 -// Externally overridable configuration definitions - -// Maximum allowed clock tolerance in 1/1024 steps -#ifndef CAN_CLOCK_TOLERANCE -#define CAN_CLOCK_TOLERANCE (15U) ///< 15/1024 approx. 1.5 % -#endif - -// Maximum number of Message Objects used for CAN1 controller -#ifndef CAN1_OBJ_NUM -#define CAN1_OBJ_NUM (2U) ///< Number of CAN objects -#endif -#if (CAN1_OBJ_NUM > 2U) -#error Too many Message Objects defined for CAN1, maximum number of Message Objects is 32 !!! -#endif - -#define CAN_IRQ_NUM (CAN1_IRQn) ///< CAN IRQ number - -// CAN Driver ****************************************************************** - -#define ARM_CAN_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) ///< CAN driver version - -// Driver Version -static const ARM_DRIVER_VERSION can_driver_version = { ARM_CAN_API_VERSION, ARM_CAN_DRV_VERSION }; - -// Driver Capabilities -static const ARM_CAN_CAPABILITIES can_driver_capabilities = { - CAN1_OBJ_NUM, ///< Number of CAN Objects available - 1U, // Supports reentrant calls to ARM_CAN_MessageSend, ARM_CAN_MessageRead, ARM_CAN_ObjectConfigure and abort message sending used by ARM_CAN_Control. - 0U, // Does not support CAN with Flexible Data-rate mode (CAN_FD) - 0U, // Does not support restricted operation mode - 1U, // Supports bus monitoring mode - 0U, // Supports internal loopback mode - 0U, // Supports external loopback mode -}; - -// Object Capabilities -static const ARM_CAN_OBJ_CAPABILITIES can_object_capabilities_rx = { - 0U, // Object does not support transmission - 1U, // Object supports reception - 0U, // Object does not support RTR reception and automatic Data transmission - 0U, // Object does not support RTR transmission and automatic Data reception - 0U, // Object allows assignment of multiple filters to it - 1U, // Object supports exact identifier filtering - 1U, // Object supports range identifier filtering - 1U, // Object does not support mask identifier filtering - 5U // Object can buffer 5 messages -}; -static const ARM_CAN_OBJ_CAPABILITIES can_object_capabilities_tx = { - 1U, // Object supports transmission - 0U, // Object does not support reception - 0U, // Object does not support RTR reception and automatic Data transmission - 0U, // Object does not support RTR transmission and automatic Data reception - 0U, // Object does not allow assignment of multiple filters to it - 0U, // Object does not support exact identifier filtering - 0U, // Object does not support range identifier filtering - 0U, // Object does not support mask identifier filtering - 1U // Object can buffer 1 message -}; - -// Local variables and structures -static uint8_t can_driver_powered = 0U; -static uint8_t can_driver_initialized = 0U; -static ARM_CAN_SignalUnitEvent_t CAN_SignalUnitEvent = NULL; -static ARM_CAN_SignalObjectEvent_t CAN_SignalObjectEvent = NULL; -static uint8_t can_obj_cfg_msk = 0U; -static uint8_t can_last_error_code = 0U; -/* CAN PIN configuration structure*/ -static const CAN_PIN can_pins[] = { - { RTE_CAN1_TX_PORT , RTE_CAN1_TX_PIN , RTE_CAN1_TX_MODE , RTE_CAN1_TX_PAD_SEL }, - { RTE_CAN1_RX_PORT , RTE_CAN1_RX_PIN , RTE_CAN1_RX_MODE , RTE_CAN1_TX_PAD_SEL }, -}; - - -// Helper Functions - -/** - @fn void CAN_SetHwModeConfig(CAN_HW_MODE_CONFIG mode) - @brief Configures the CAN hardware mode - @param[in] mode CAN operational mode - - \ref CAN_HW_RESET_MODE_CONFIG : CAN configure in reset mode - - \ref CAN_HW_NORMAL_MODE_CONFIG : CAN configure in normal mode - - \ref CAN_HW_LISTEN_ONLY_MODE_CONFIG : CAN configure in listen only mode - - \ref CAN_HW_DUAL_FILTER_MODE_CONFIG : CAN configure in dual filter mode - - \ref CAN_HW_SINGLE_FILTER_MODE_CONFIG : CAN configure in single filter mode - - \ref CAN_HW_ACCEPTANCE_SINGLE_FILTER_MODE_CONFIG_ENABLE : CAN enable configuration in hardware acceptance for single filter mode - - \ref CAN_HW_ACCEPTANCE_DUAL_FILTER_MODE_CONFIG_ENABLE : CAN enable configuration in hardware acceptance for dual filter mode - @return none -*/ -static void CAN_SetHwModeConfig(CAN_HW_MODE_CONFIG mode) -{ - switch(mode){ - case CAN_HW_RESET_MODE_CONFIG: // Keep DCAN in RESET mode - CAN1->CAN_MR = 0x04; - break ; - case CAN_HW_NORMAL_MODE_CONFIG: // Keep DCAN in RESET mode - CAN1->CAN_MR = 0x04; - CAN1->CAN_MR = 0x00; - break ; - case CAN_HW_LISTEN_ONLY_MODE_CONFIG: // Keep CAN in soft RESET operating mode to get the write access to AFM bit - CAN1->CAN_MR = 0x04; - CAN1->CAN_MR = 0x02; // Set standard single filter mode - break ; - case CAN_HW_DUAL_FILTER_MODE_CONFIG: // Dual filter mode configuration set - CAN1->CAN_MR = 0x04; - break ; - case CAN_HW_SINGLE_FILTER_MODE_CONFIG: //Single filter mode configuration set - CAN1->CAN_MR = 0x04; // Set CAN in RESET mode - CAN1->CAN_MR = 0x05; // Set standard single filter mode - break ; - case CAN_HW_ACCEPTANCE_SINGLE_FILTER_MODE_CONFIG_ENABLE: // Enable single filter mode configuration for filters - CAN1->CAN_MR = 0x01; - break; - case CAN_HW_ACCEPTANCE_DUAL_FILTER_MODE_CONFIG_ENABLE: // Enable dual filter mode configuration for filters - CAN1->CAN_MR = 0x00; - break; - default : - break ; - } -} - -/** - @fn int32_t CAN_AddHwFilter (CAN_FILTER_TYPE filter_type, uint32_t id, uint32_t mask) { - @brief Add filter for message reception. - @param[in] filter_type Operation on filter - - \ref CAN_FILTER_TYPE_EXACT_ID : add exact id filter - - \ref CAN_FILTER_TYPE_MASKABLE_ID : add maskable id filter - @param[in] id ID or start of ID range (depending on filter type) - @param[in] mask Mask or end of ID range (depending on filter type) - @return execution status -*/ -static int32_t CAN_AddHwFilter (CAN_FILTER_TYPE filter_type, uint32_t id, uint32_t mask) { - if ((id & ARM_CAN_ID_IDE_Msk) == 0U) { // Standard Identifier (11 bit) - switch (filter_type) { - case CAN_FILTER_TYPE_EXACT_ID: - CAN_SetHwModeConfig(CAN_HW_SINGLE_FILTER_MODE_CONFIG); //Keep CAN in filter configuration mode - CAN1->CAN_ACR = 0x00; //Reset defaults - CAN1->CAN_AMR = 0x00; - CAN1->CAN_ACR_b.ACR0 = (( id >> 3) & 0xFF); - CAN1->CAN_ACR_b.ACR1 = ((((id >> 0) & 0x07) << 5) | BIT(4)); - CAN1->CAN_ACR_b.ACR2 = 0x00; - CAN1->CAN_ACR_b.ACR3 = 0x00; - CAN1->CAN_AMR_b.AMR0 = 0x00; - CAN1->CAN_AMR_b.AMR1 = BIT(4); // Mark RTR bit as don't care - CAN1->CAN_AMR_b.AMR2 = 0xFF; - CAN1->CAN_AMR_b.AMR3 = 0xFF; - // Enable hardware filter scheme - CAN_SetHwModeConfig(CAN_HW_ACCEPTANCE_SINGLE_FILTER_MODE_CONFIG_ENABLE); - break; - - case CAN_FILTER_TYPE_MASKABLE_ID: // Add code to setup peripheral to receive messages with specified maskable ID - CAN_SetHwModeConfig(CAN_HW_SINGLE_FILTER_MODE_CONFIG); //Keep CAN in filter configuration mode - CAN1->CAN_ACR = 0x00; //Reset defaults - CAN1->CAN_AMR = 0x00; - CAN1->CAN_ACR_b.ACR0 = (( id >> 3) & 0xFF); - CAN1->CAN_ACR_b.ACR1 = ((((id >> 0) & 0x07) << 5) | BIT(4)); - CAN1->CAN_ACR_b.ACR2 = 0x00; - CAN1->CAN_ACR_b.ACR3 = 0x00; - CAN1->CAN_AMR_b.AMR0 = (( mask >> 3) & 0xFF); //Configure the mask bits - CAN1->CAN_AMR_b.AMR1 = ((((mask >> 0) & 0x07) << 5) | BIT(4)); - CAN1->CAN_AMR_b.AMR2 = 0xFF; - CAN1->CAN_AMR_b.AMR3 = 0xFF; - CAN_SetHwModeConfig(CAN_HW_ACCEPTANCE_SINGLE_FILTER_MODE_CONFIG_ENABLE); // Enable hardware filter scheme - break; - default: - // Handle unknown operation code - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - }else{ // Extended Identifier (29 bit) - switch (filter_type) { - case CAN_FILTER_TYPE_EXACT_ID: - // Add code to setup peripheral to receive messages with specified exact ID - CAN_SetHwModeConfig(CAN_HW_SINGLE_FILTER_MODE_CONFIG); - //Reset defaults - CAN1->CAN_ACR = 0x00; - CAN1->CAN_AMR = 0x00; - CAN1->CAN_ACR_b.ACR0 = (( id >> 21 ) & 0xFF); - CAN1->CAN_ACR_b.ACR1 = (( id >> 13 ) & 0xFF); - CAN1->CAN_ACR_b.ACR2 = (( id >> 5 ) & 0xFF); - CAN1->CAN_ACR_b.ACR3 = (((id >> 0 ) & 0xFF) << 3) ; - CAN1->CAN_ACR_b.ACR3 |= BIT(2); - CAN1->CAN_AMR_b.AMR3 = BIT(2); - /*Apply filter logic here */ - CAN_SetHwModeConfig(CAN_HW_ACCEPTANCE_SINGLE_FILTER_MODE_CONFIG_ENABLE); - break; - - case CAN_FILTER_TYPE_MASKABLE_ID: - // Add code to setup peripheral to receive messages with specified maskable ID - CAN_SetHwModeConfig(CAN_HW_SINGLE_FILTER_MODE_CONFIG); - //Reset defaults - CAN1->CAN_ACR = 0x00; - CAN1->CAN_AMR = 0x00; - CAN1->CAN_ACR_b.ACR0 = (( id >> 21 ) & 0xFF); - CAN1->CAN_ACR_b.ACR1 = (( id >> 13 ) & 0xFF); - CAN1->CAN_ACR_b.ACR2 = (( id >> 5 ) & 0xFF); - CAN1->CAN_ACR_b.ACR3 = (((id >> 0 ) & 0xFF) << 3) ; - CAN1->CAN_ACR_b.ACR3 |= BIT(2); - //Configure the mask bits - CAN1->CAN_AMR_b.AMR0 = (( mask >> 21 ) & 0xFF); - CAN1->CAN_AMR_b.AMR1 = (( mask >> 13 ) & 0xFF); - CAN1->CAN_AMR_b.AMR2 = (( mask >> 5 ) & 0xFF); - CAN1->CAN_AMR_b.AMR3 = ((( mask >> 0 ) & 0xFF) << 3) ; - CAN1->CAN_AMR_b.AMR3 |= BIT(2); - - /*Apply filter logic here */ - CAN_SetHwModeConfig(CAN_HW_ACCEPTANCE_SINGLE_FILTER_MODE_CONFIG_ENABLE); - break; - default: - // Handle unknown operation code - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - } - return ARM_DRIVER_OK; -} - -/** - @fn int32_t CAN_RemoveFilter (CAN_FILTER_TYPE filter_type, uint32_t id, uint32_t mask) { - @brief Add filter for message reception. - @param[in] filter_type Operation on filter - - \ref CAN_FILTER_TYPE_EXACT_ID : remove exact id filter - - \ref CAN_FILTER_TYPE_MASKABLE_ID : remove maskable id filter - @param[in] id ID or start of ID range (depending on filter type) - @param[in] mask Mask or end of ID range (depending on filter type) - @return execution status -*/ -static int32_t CAN_RemoveFilter (CAN_FILTER_TYPE filter_type, uint32_t id, uint32_t mask) { - switch (filter_type) { - case CAN_FILTER_TYPE_EXACT_ID: - case CAN_FILTER_TYPE_MASKABLE_ID: - //Keep CAN in filter configuration mode - CAN_SetHwModeConfig(CAN_HW_SINGLE_FILTER_MODE_CONFIG); - CAN1->CAN_ACR = 0xFFFFFFFF; - CAN1->CAN_AMR = 0xFFFFFFFF; - // Enable hardware filter scheme - CAN_SetHwModeConfig(CAN_HW_ACCEPTANCE_SINGLE_FILTER_MODE_CONFIG_ENABLE); - break; - default: - // Handle unknown operation code - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - return ARM_DRIVER_OK; -} - - -// CAN Driver Functions - -/** - @fn ARM_DRIVER_VERSION CAN_GetVersion (void) - @brief Get driver version. - @return \ref ARM_DRIVER_VERSION -*/ -static ARM_DRIVER_VERSION CAN_GetVersion (void) { - // Return driver version - return can_driver_version; -} - -/** - @fn ARM_CAN_CAPABILITIES CAN_GetCapabilities (void) - @brief Get driver capabilities. - @return \ref ARM_CAN_CAPABILITIES -*/ -static ARM_CAN_CAPABILITIES CAN_GetCapabilities (void) { - // Return driver capabilities - return can_driver_capabilities; -} - -/** - @fn int32_t CAN_Initialize (ARM_CAN_SignalUnitEvent_t cb_unit_event, - ARM_CAN_SignalObjectEvent_t cb_object_event) - @brief Initialize CAN interface and register signal (callback) functions. - @param[in] cb_unit_event Pointer to \ref ARM_CAN_SignalUnitEvent_t callback function - @param[in] cb_object_event Pointer to \ref ARM_CAN_SignalObjectEvent_t callback function - @return execution status -*/ -static int32_t CAN_Initialize (ARM_CAN_SignalUnitEvent_t cb_unit_event, - ARM_CAN_SignalObjectEvent_t cb_object_event) { - - const CAN_PIN *io; - - if(MCU_RET->CHIP_CONFIG_MCU_READ_b.DISABLE_CAN_INTERFACE == 1U){ - return ARM_DRIVER_ERROR_UNSUPPORTED; // If CAN peripheral is not supported by this chip - } - - if (can_driver_initialized != 0U) { return ARM_DRIVER_OK; } - - for (io = can_pins; io != &can_pins[sizeof(can_pins)/sizeof(CAN_PIN)]; io++) { - if(io->pin > 63){ - RSI_EGPIO_SetPinMux(EGPIO1 ,io->port , (io->pin - 64) , 6); - RSI_EGPIO_UlpPadReceiverEnable((io->pin) - 64); - }else{ - RSI_EGPIO_PadReceiverEnable(io->pin); - } - RSI_EGPIO_SetPinMux(EGPIO,io->port,io->pin , io->mode); - RSI_EGPIO_PadSelectionEnable(io->pad_sel); - } - - CAN_SignalUnitEvent = cb_unit_event; - CAN_SignalObjectEvent = cb_object_event; - - can_driver_initialized = 1U; - - return ARM_DRIVER_OK; -} - -/** - @fn int32_t CAN_Uninitialize (void) - @brief De-initialize CAN interface. - @return execution status -*/ -static int32_t CAN_Uninitialize (void) { - const CAN_PIN *io; - - for (io = can_pins; io != &can_pins[sizeof(can_pins)/sizeof(CAN_PIN)]; io++) { - RSI_EGPIO_SetPinMux(EGPIO,io->port,io->pin , EGPIO_PIN_MUX_MODE0); - RSI_EGPIO_PadReceiverEnable(io->pin); - if(io->pin < 63){ - RSI_EGPIO_PadSelectionEnable(io->pad_sel); - } - else{ - RSI_EGPIO_SetPinMux(EGPIO1,(io->port),(io->pin - 64U),6U); - } - } - can_driver_initialized = 0U; - return ARM_DRIVER_OK; -} - -/** - @fn int32_t CAN_PowerControl (ARM_POWER_STATE state) - @brief Control CAN interface power. - @param[in] state Power state - - \ref ARM_POWER_OFF : power off : no operation possible - - \ref ARM_POWER_LOW : low power mode: retain state, detect and signal wake-up events - - \ref ARM_POWER_FULL : power on : full operation at maximum performance - @return execution status -*/ -static int32_t CAN_PowerControl (ARM_POWER_STATE state) { - switch (state) { - case ARM_POWER_OFF: - can_driver_powered = 0U; - NVIC_DisableIRQ (CAN_IRQ_NUM); // Disable CAN NVIC - CAN1->CAN_IMR = 0U; // Disable all CAN controller interrupts - // Clear bit rate - CAN1->CAN_BTIM0_b.BRP = 0U; - CAN1->CAN_BTIM0_b.SJW = 0U; - CAN1->CAN_BTIM1_b.TSEG1 = 0U; - CAN1->CAN_BTIM1_b.TSEG2 = 0U; - CAN1->CAN_MR = 4U; // Keep CAN in reset mode - case ARM_POWER_FULL: - if (can_driver_initialized == 0U) { return ARM_DRIVER_ERROR; } - if (can_driver_powered != 0U) { return ARM_DRIVER_OK; } - M4CLK->CLK_ENABLE_SET_REG3 = M4_SOC_CLK_FOR_OTHER_ENABLE; // Enable common clock for peripheral on which CAN is also workin - M4CLK->CLK_ENABLE_SET_REG2 = CAN1_CLK_ENABLE ; // Enable CAN clock - CAN1->CAN_IMR = CAN_IMR_DOIM | // Enable interrupts - CAN_IMR_BEIM | - CAN_IMR_TIM | - CAN_IMR_RIM | - CAN_IMR_EPIM | - CAN_IMR_EWIM | - CAN_IMR_ALIM ; - can_driver_powered = 1U; - NVIC_ClearPendingIRQ (CAN_IRQ_NUM); - NVIC_EnableIRQ (CAN_IRQ_NUM); - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; // Other states are not supported - } - return ARM_DRIVER_OK; -} - -/** - @fn uint32_t CAN_GetClock (void) - @brief Retrieve CAN base clock frequency. - @return base clock frequency -*/ -uint32_t CAN_GetClock (void) { - uint32_t can_div_factor = 0; - if ((M4CLK->CLK_ENABLE_SET_REG3 & M4_SOC_CLK_FOR_OTHER_ENABLE) == 0U) { // If clock to peripheral is not enabled - return 0U; - } - can_div_factor = M4CLK->CLK_CONFIG_REG3_b.CAN1_CLK_DIV_FAC; // Get CAN division factor value - if(can_div_factor == 0){ // If divider is 0 , divider is bypassed - return SystemCoreClock; - }else{ - return (SystemCoreClock /(2*can_div_factor)); - } -} - -/** - @fn CAN_SetBitrate (ARM_CAN_BITRATE_SELECT select, uint32_t bitrate, uint32_t bit_segments) - @brief Set bitrate for CAN interface. - @param[in] select Bitrate selection - - \ref ARM_CAN_BITRATE_NOMINAL : nominal (flexible data-rate arbitration) bitrate - - \ref ARM_CAN_BITRATE_FD_DATA : flexible data-rate data bitrate - @param[in] bitrate Bitrate - @param[in] bit_segments Bit segments settings - @return execution status -*/ -static int32_t CAN_SetBitrate (ARM_CAN_BITRATE_SELECT select, uint32_t bitrate, uint32_t bit_segments) { - float sjw, prop_seg, phase_seg1, phase_seg2, pclk, brp, tq_num ; - - if (select != ARM_CAN_BITRATE_NOMINAL) { return ARM_CAN_INVALID_BITRATE_SELECT; } - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - prop_seg = (bit_segments & ARM_CAN_BIT_PROP_SEG_Msk ) >> ARM_CAN_BIT_PROP_SEG_Pos; - phase_seg1 = (bit_segments & ARM_CAN_BIT_PHASE_SEG1_Msk) >> ARM_CAN_BIT_PHASE_SEG1_Pos; - phase_seg2 = (bit_segments & ARM_CAN_BIT_PHASE_SEG2_Msk) >> ARM_CAN_BIT_PHASE_SEG2_Pos; - sjw = (bit_segments & ARM_CAN_BIT_SJW_Msk ) >> ARM_CAN_BIT_SJW_Pos; - - if (((prop_seg + phase_seg1) < 1U) || ((prop_seg + phase_seg1) > 16U)) { return ARM_CAN_INVALID_BIT_PROP_SEG; } - if (( phase_seg2 < 1U) || ( phase_seg2 > 8U)) { return ARM_CAN_INVALID_BIT_PHASE_SEG2; } - if (( sjw < 1U) || ( sjw > 4U)) { return ARM_CAN_INVALID_BIT_SJW; } - - tq_num = 1U + prop_seg + phase_seg1 + phase_seg2; - pclk = CAN_GetClock(); - - if (pclk == 0U) { return ARM_DRIVER_ERROR; } - - brp = (int)((float)(1.0f/bitrate)/(float)(2.0f*(1/pclk)*tq_num)); - - if(brp > 64U) { return ARM_CAN_INVALID_BITRATE; } - - CAN_SetHwModeConfig(CAN_HW_RESET_MODE_CONFIG); // Keep CAN in reset mode - - CAN1->CAN_BTIM0_b.BRP = (brp - 1); - CAN1->CAN_BTIM0_b.SJW = (sjw - 1); - CAN1->CAN_BTIM1_b.TSEG1 = ((prop_seg + phase_seg1)- 1); - CAN1->CAN_BTIM1_b.TSEG2 = (phase_seg2 - 1); - CAN_SetHwModeConfig(CAN_HW_NORMAL_MODE_CONFIG); // Keep CAN in reset mode - - return ARM_DRIVER_OK; -} - -/** - @fn int32_t CAN_SetMode (ARM_CAN_MODE mode) - @brief Set operating mode for CAN interface. - @param[in] mode Operating mode - - \ref ARM_CAN_MODE_INITIALIZATION : initialization mode - - \ref ARM_CAN_MODE_NORMAL : normal operation mode - - \ref ARM_CAN_MODE_RESTRICTED : restricted operation mode - - \ref ARM_CAN_MODE_MONITOR : bus monitoring mode - - \ref ARM_CAN_MODE_LOOPBACK_INTERNAL : loopback internal mode - - \ref ARM_CAN_MODE_LOOPBACK_EXTERNAL : loopback external mode - @return execution status -*/ -static int32_t CAN_SetMode (ARM_CAN_MODE mode) { - - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - switch (mode) { - case ARM_CAN_MODE_INITIALIZATION: - CAN_RemoveFilter(CAN_FILTER_TYPE_EXACT_ID , 0 ,0); // Remove filters - break; - case ARM_CAN_MODE_NORMAL: - CAN_SetHwModeConfig(CAN_HW_NORMAL_MODE_CONFIG); // Configure CAN in normal mode - break; - case ARM_CAN_MODE_MONITOR: - CAN_SetHwModeConfig(CAN_HW_LISTEN_ONLY_MODE_CONFIG); // Configure the CAN in listen only mode - break; - case ARM_CAN_MODE_LOOPBACK_INTERNAL: // Not supported - case ARM_CAN_MODE_RESTRICTED: // Not supported - case ARM_CAN_MODE_LOOPBACK_EXTERNAL: // Not supported - default: - // Handle unknown mode code - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -/** - @fn ARM_CAN_OBJ_CAPABILITIES CAN_ObjectGetCapabilities (uint32_t obj_idx) - @brief Retrieve capabilities of an object. - @param[in] obj_idx Object index - @return \ref ARM_CAN_OBJ_CAPABILITIES -*/ -ARM_CAN_OBJ_CAPABILITIES CAN_ObjectGetCapabilities (uint32_t obj_idx) { - ARM_CAN_OBJ_CAPABILITIES obj_cap_null; - - if (obj_idx > 1U){ - memset (&obj_cap_null, 0U, sizeof(ARM_CAN_OBJ_CAPABILITIES)); - return obj_cap_null; - } - if (obj_idx == 0U) { - return can_object_capabilities_rx; - }else { - return can_object_capabilities_tx; - } -} - -/** - @fn CAN_ObjectSetFilter (uint32_t obj_idx, ARM_CAN_FILTER_OPERATION operation, uint32_t id, uint32_t arg) - @brief Add or remove filter for message reception. - @param[in] obj_idx Object index of object that filter should be or is assigned to - @param[in] operation Operation on filter - - \ref ARM_CAN_FILTER_ID_EXACT_ADD : add exact id filter - - \ref ARM_CAN_FILTER_ID_EXACT_REMOVE : remove exact id filter - - \ref ARM_CAN_FILTER_ID_RANGE_ADD : add range id filter - - \ref ARM_CAN_FILTER_ID_RANGE_REMOVE : remove range id filter - - \ref ARM_CAN_FILTER_ID_MASKABLE_ADD : add maskable id filter - - \ref ARM_CAN_FILTER_ID_MASKABLE_REMOVE : remove maskable id filter - @param[in] id ID or start of ID range (depending on filter type) - @param[in] arg Mask or end of ID range (depending on filter type) - @return execution status -*/ -static int32_t CAN_ObjectSetFilter (uint32_t obj_idx, ARM_CAN_FILTER_OPERATION operation, uint32_t id, uint32_t arg) { - int32_t status; - - if (obj_idx != 0U) { return ARM_DRIVER_ERROR_PARAMETER; } - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - switch (operation) { - case ARM_CAN_FILTER_ID_EXACT_ADD: - status = CAN_AddHwFilter (CAN_FILTER_TYPE_EXACT_ID, id, 0U); - break; - case ARM_CAN_FILTER_ID_MASKABLE_ADD: - status = CAN_AddHwFilter (CAN_FILTER_TYPE_MASKABLE_ID, id, arg); - break; - case ARM_CAN_FILTER_ID_EXACT_REMOVE: - status = CAN_RemoveFilter (CAN_FILTER_TYPE_EXACT_ID, id, 0U); - break; - case ARM_CAN_FILTER_ID_MASKABLE_REMOVE: - status = CAN_RemoveFilter (CAN_FILTER_TYPE_MASKABLE_ID, id, 0); - break; - case ARM_CAN_FILTER_ID_RANGE_ADD: // Not supported - case ARM_CAN_FILTER_ID_RANGE_REMOVE: // Not supported - default: - status = ARM_DRIVER_ERROR_UNSUPPORTED; - break; - } - - return status; -} - -/** - @fn int32_t CAN_ObjectConfigure (uint32_t obj_idx, ARM_CAN_OBJ_CONFIG obj_cfg) - @brief Configure object. - @param[in] obj_idx Object index - @param[in] obj_cfg Object configuration state - - \ref ARM_CAN_OBJ_INACTIVE : deactivate object - - \ref ARM_CAN_OBJ_RX : configure object for reception - - \ref ARM_CAN_OBJ_TX : configure object for transmission - - \ref ARM_CAN_OBJ_RX_RTR_TX_DATA : configure object that on RTR reception automatically transmits Data Frame - - \ref ARM_CAN_OBJ_TX_RTR_RX_DATA : configure object that transmits RTR and automatically receives Data Frame - @return execution status -*/ -static int32_t CAN_ObjectConfigure (uint32_t obj_idx, ARM_CAN_OBJ_CONFIG obj_cfg) { - - if (obj_idx > 1U) { return ARM_DRIVER_ERROR_PARAMETER; } - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - switch (obj_cfg) { - case ARM_CAN_OBJ_INACTIVE: - can_obj_cfg_msk &= ~(1U << obj_idx); - break; - case ARM_CAN_OBJ_RX_RTR_TX_DATA: - case ARM_CAN_OBJ_TX_RTR_RX_DATA: - can_obj_cfg_msk &= ~(1U << obj_idx); - return ARM_DRIVER_ERROR_UNSUPPORTED; - case ARM_CAN_OBJ_TX: - if (obj_idx != 1U) { return ARM_DRIVER_ERROR_PARAMETER; } - can_obj_cfg_msk = 2U; - break; - case ARM_CAN_OBJ_RX: - if (obj_idx != 0U) { return ARM_DRIVER_ERROR_PARAMETER; } - can_obj_cfg_msk = 1U; - break; - default: - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -/** - @fn int32_t CAN_MessageSend (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, const uint8_t *data, uint8_t size) - @brief Send message on CAN bus. - @param[in] obj_idx Object index - @param[in] msg_info Pointer to CAN message information - @param[in] data Pointer to data buffer - @param[in] size Number of data bytes to send - @return value >= 0 number of data bytes accepted to send - @return value < 0 execution status -*/ -static int32_t CAN_MessageSend (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, const uint8_t *data, uint8_t size) { - uint32_t tx_buf_reg1 = 0U; - uint32_t tx_buf_reg2 = 0U; - uint32_t tx_buf_reg3 = 0U; - - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - if (obj_idx != 1U) { return ARM_DRIVER_ERROR_PARAMETER; } - - if(CAN1->CAN_SR_b.TBS !=1U){ // Check for the previous transmission status - return ARM_DRIVER_ERROR_BUSY; - } - if (((msg_info->id) & ARM_CAN_ID_IDE_Msk) == 0U) { // Standard Identifier (11 bit) - tx_buf_reg1 = (msg_info->dlc); - tx_buf_reg1 |= ((msg_info->id >> 3) & 0xFF) << 8U ; - tx_buf_reg1 |= ((msg_info->id >> 0) & 0x07) << 21U; - if(msg_info->rtr == 0U){ // If data frame - tx_buf_reg1 |= (data[0] << 24); - CAN1->CAN_TXBUF = tx_buf_reg1; - tx_buf_reg1 = 0U; - switch(size){ - case 8: - tx_buf_reg2 |= (data[7] << 16U); - case 7: - tx_buf_reg2 |= (data[6] << 8U ); - case 6: - tx_buf_reg2 |= (data[5] << 0U ); - case 5: - tx_buf_reg1 |= (data[4] << 24U); - case 4: - tx_buf_reg1 |= (data[3] << 16U); - case 3: - tx_buf_reg1 |= (data[2] << 8U ); - case 2: - tx_buf_reg1 |= (data[1] << 0U ); - CAN1->CAN_TXBUF = tx_buf_reg1; - CAN1->CAN_TXBUF = tx_buf_reg2; - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - }else{ // Remote frame - size = 0U; - tx_buf_reg1 |= BIT(6); - CAN1->CAN_TXBUF = tx_buf_reg1; - } - }else{ // Extended Identifier (11 bit) - tx_buf_reg1 = BIT(7); - tx_buf_reg1 |= (((msg_info->id >> 21) & 0xFF ) << 8 ); - tx_buf_reg1 |= (((msg_info->id >> 13) & 0xFF ) << 16); - tx_buf_reg1 |= (((msg_info->id >> 5) & 0xFF ) << 24); - if(msg_info->rtr == 0U){ // If Data frame - tx_buf_reg1 |= msg_info->dlc; - CAN1->CAN_TXBUF = tx_buf_reg1; // Update the hardware; - tx_buf_reg1 = 0; - tx_buf_reg1 = ((msg_info->id << 3) & 0xFF); - switch(size){ - case 8: - tx_buf_reg3 |= (data[7] << 0U ); - case 7: - tx_buf_reg2 |= (data[6] << 24U); - case 6: - tx_buf_reg2 |= (data[5] << 16U); - case 5: - tx_buf_reg2 |= (data[4] << 8U ); - case 4: - tx_buf_reg2 |= (data[3] << 0U ); - case 3: - tx_buf_reg1 |= (data[2] << 24U); - case 2: - tx_buf_reg1 |= (data[1] << 16U); - case 1: - tx_buf_reg1 |= (data[0] << 8U ); - CAN1->CAN_TXBUF = tx_buf_reg1; // Update the hardware; - CAN1->CAN_TXBUF = tx_buf_reg2; // Update the hardware; - CAN1->CAN_TXBUF = tx_buf_reg3; // Update the hardware; - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - }else{ // If remote frame - size = 0U; - tx_buf_reg1 |= BIT(6); - CAN1->CAN_TXBUF = tx_buf_reg1; // Update the hardware; - tx_buf_reg1 = 0; - tx_buf_reg1 = ((msg_info->id << 3) & 0xFF); - CAN1->CAN_TXBUF = tx_buf_reg1; // Update the hardware; - } - } - - CAN1->CAN_CMR_b.TR = 1U; // Trigger transfer - - return ((int32_t)size); -} - -/** - @fn int32_t CAN_MessageRead (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, uint8_t *data, uint8_t size) { - @brief Read message received on CAN bus. - @param[in] obj_idx Object index - @param[out] msg_info Pointer to read CAN message information - @param[out] data Pointer to data buffer for read data - @param[in] size Maximum number of data bytes to read - @return value >= 0 number of data bytes read - @return value < 0 execution status -*/ -static int32_t CAN_MessageRead (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, uint8_t *data, uint8_t size) { - uint32_t rx_buf_reg0=0; - uint32_t rx_buf_reg1=0; - uint32_t rx_buf_reg2=0; - uint32_t rx_buf_reg3=0; - - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - if (obj_idx != 0U) { return ARM_DRIVER_ERROR_PARAMETER; } - - rx_buf_reg0 = CAN1->CAN_RXBUF; //Read FIFO - - if(rx_buf_reg0 & (1 << 6)){ - msg_info->rtr = 1U; - }else{ - msg_info->rtr = 0U; - } - msg_info->dlc= (rx_buf_reg0 & 0x0F); - if(rx_buf_reg0 & (1 << 7)){ // If extended ID is received - rx_buf_reg1 = CAN1->CAN_RXBUF; //Read FIFO - rx_buf_reg2 = CAN1->CAN_RXBUF; //Read FIFO - rx_buf_reg3 = CAN1->CAN_RXBUF; //Read FIFO - msg_info->id = (((rx_buf_reg0 >> 8 ) & 0xFF) << 21U); - msg_info->id |= (((rx_buf_reg0 >> 16) & 0xFF) << 13U); - msg_info->id |= (((rx_buf_reg0 >> 24) & 0xFF) << 5U); - msg_info->id |= (((rx_buf_reg1 >> 3 ) & 0x1F) << 0); - if(msg_info->rtr == 0U){ // Data frame is received - switch(size){ - case 8: - data[7] = ((rx_buf_reg3 >> 0) & 0xFF); - case 7: - data[6] = ((rx_buf_reg2 >> 24) & 0xFF); - case 6: - data[5] = ((rx_buf_reg2 >> 16) & 0xFF); - case 5: - data[4] = ((rx_buf_reg2 >> 8 ) & 0xFF); - case 4: - data[3] = ((rx_buf_reg2 >> 0 ) & 0xFF); - case 3: - data[2] = ((rx_buf_reg1 >> 24) & 0xFF); - case 2: - data[1] = ((rx_buf_reg1 >> 16) & 0xFF); - case 1: - data[0] = ((rx_buf_reg1 >> 8 ) & 0xFF); - break ; - case 0: - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - }else{ // If remote frame is received - // Nothing - size=0U; - } - }else{ // If standard ID is received - rx_buf_reg1 = CAN1->CAN_RXBUF; //Read FIFO - rx_buf_reg2 = CAN1->CAN_RXBUF; //Read FIFO - msg_info->id = ((rx_buf_reg0 & 0xFF00) >> 8 ); - msg_info->id = (msg_info->id << 3 ); - msg_info->id |= ((rx_buf_reg0 & 0xE00000) >> 21); - if(msg_info->rtr == 0U){ // If data frame received - switch(size){ - case 8: - data[7] = ((rx_buf_reg2 >> 16) & 0xFF); - case 7: - data[6] = ((rx_buf_reg2 >> 8 ) & 0xFF); - case 6: - data[5] = ((rx_buf_reg2 >> 0 ) & 0xFF); - case 5: - data[4] = ((rx_buf_reg1 >> 24) & 0xFF); - case 4: - data[3] = ((rx_buf_reg1 >> 16) & 0xFF); - case 3: - data[2] = ((rx_buf_reg1 >> 8 ) & 0xFF); - case 2: - data[1] = ((rx_buf_reg1 >> 0 ) & 0xFF); - case 1: - data[0] = ((rx_buf_reg0 >> 24) & 0xFF); - break ; - case 0: - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - }else{ - // If remote frame is received - // Nothing - size = 0U; - } - } - return ((int32_t)size); -} - -/** - @fn int32_t CAN_Control (uint32_t control, uint32_t arg) - @brief Control CAN interface. - @param[in] control Operation - - \ref ARM_CAN_SET_FD_MODE : set FD operation mode - - \ref ARM_CAN_ABORT_MESSAGE_SEND : abort sending of CAN message - - \ref ARM_CAN_CONTROL_RETRANSMISSION : enable/disable automatic retransmission - - \ref ARM_CAN_SET_TRANSCEIVER_DELAY : set transceiver delay - @param[in] arg Argument of operation - @return execution status -*/ -static int32_t CAN_Control (uint32_t control, uint32_t arg) { - - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - switch (control & ARM_CAN_CONTROL_Msk) { - case ARM_CAN_ABORT_MESSAGE_SEND: - if (arg == 1U) { - CAN1->CAN_CMR = CAN_CMR_AT; - } - break; - case ARM_CAN_CONTROL_RETRANSMISSION: - if(arg == 1U){ - CAN1->CAN_CMR = CAN_CMR_TR; - }else{ - CAN1->CAN_CMR = (CAN_CMR_AT | CAN_CMR_TR); - } - break; - case ARM_CAN_SET_FD_MODE: - case ARM_CAN_SET_TRANSCEIVER_DELAY: - default: - // Handle unknown control code - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -/** - @fn ARM_CAN_STATUS CAN_GetStatus (void) - @brief Get CAN status. - @return CAN status \ref ARM_CAN_STATUS -*/ -static ARM_CAN_STATUS CAN_GetStatus (void) { - ARM_CAN_STATUS status; - - memset(&status, 0U, sizeof(ARM_CAN_STATUS)); - - if (can_driver_powered == 0U) { - return status; - } - - status.last_error_code = can_last_error_code; - status.tx_error_count = CAN1->CAN_TXERR; // Update TX error count - status.rx_error_count = CAN1->CAN_RXERR; // Update RX error count - - if ((((CAN1->CAN_TXERR) > 127U) || ((CAN1->CAN_RXERR) > 127U))) { // If Error Passive Interrupt is active - status.unit_state = ARM_CAN_UNIT_STATE_PASSIVE; - } else { - status.unit_state = ARM_CAN_UNIT_STATE_ACTIVE; - } - return status; -} - - -/** - @fn void IRQ066_Handler (void) - @brief CAN1 Interrupt Routine (IRQ). -*/ -void IRQ066_Handler(void){ - uint8_t isr , sr; - - if (can_driver_powered != 0U) { - isr = CAN1->CAN_ISR_IACK; // Read interrupt status register - sr = CAN1->CAN_SR; - if(isr & CAN_ISR_DO){ // Data Over run interrupt is active - CAN_SignalObjectEvent(0U, ARM_CAN_EVENT_RECEIVE_OVERRUN); - CAN1->CAN_ISR_IACK = CAN_ISR_DO; - } - if(isr & CAN_ISR_BEI){ // Bus error interrupt is active - - if(CAN1->CAN_ECC_b.BER){ - can_last_error_code = ARM_CAN_LEC_BIT_ERROR; - } - if (CAN1->CAN_ECC_b.STFER) { - can_last_error_code = ARM_CAN_LEC_STUFF_ERROR; - } - if (CAN1->CAN_ECC_b.CRCER) { - can_last_error_code = ARM_CAN_LEC_CRC_ERROR; - } - if (CAN1->CAN_ECC_b.FRMER) { - can_last_error_code = ARM_CAN_LEC_FORM_ERROR; - } - if (CAN1->CAN_ECC_b.ACKER) { - can_last_error_code = ARM_CAN_LEC_ACK_ERROR; - } - CAN1->CAN_ISR_IACK = CAN_ISR_BEI; - } - if(isr & CAN_ISR_TI){ // Transmit interrupt interrupt is active - CAN_SignalObjectEvent(1U, ARM_CAN_EVENT_SEND_COMPLETE); - CAN1->CAN_ISR_IACK = CAN_ISR_TI; - } - if(isr & CAN_ISR_RI){ // Receive interrupt is triggered - - while(CAN1->CAN_RMC) // Note keep reading messages until FIFO empty - { - CAN_SignalObjectEvent(0U, ARM_CAN_EVENT_RECEIVE); - CAN1->CAN_ISR_IACK = CAN_ISR_RI; //Clear the RX Data over run interrupt - } - } - if(isr & CAN_ISR_EPI){ // Error passive interrupt is active - if ((((CAN1->CAN_TXERR) > 127U) || ((CAN1->CAN_RXERR) > 127U))) { // If Error Passive Interrupt is active - CAN_SignalUnitEvent(ARM_CAN_EVENT_UNIT_PASSIVE); - } else { - CAN_SignalUnitEvent(ARM_CAN_EVENT_UNIT_ACTIVE); - } - CAN1->CAN_ISR_IACK = CAN_ISR_EPI; - } - if(isr & CAN_ISR_EWI){ // Error warning interrupt - if(sr & CAN_SR_ES){ - CAN_SignalUnitEvent(ARM_CAN_EVENT_UNIT_WARNING); - } - CAN1->CAN_ISR_IACK = CAN_ISR_EWI; - } - if(isr & CAN_ISR_ALI){ // Arbitration lost interrupt - //FIXME: Handle this here //Added by me this handle - CAN_SignalUnitEvent(ARM_CAN_ARBITRATION_LOST); - CAN1->CAN_ISR_IACK = CAN_ISR_ALI; - } - } -} - -// CAN driver functions structure -ARM_DRIVER_CAN Driver_CAN1 = { - CAN_GetVersion, - CAN_GetCapabilities, - CAN_Initialize, - CAN_Uninitialize, - CAN_PowerControl, - CAN_GetClock, - CAN_SetBitrate, - CAN_SetMode, - CAN_ObjectGetCapabilities, - CAN_ObjectSetFilter, - CAN_ObjectConfigure, - CAN_MessageSend, - CAN_MessageRead, - CAN_Control, - CAN_GetStatus -}; - -#endif //RTE_CAN1 -#endif diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CAN.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CAN.h deleted file mode 100644 index 21369311c..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CAN.h +++ /dev/null @@ -1,136 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2015 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 9. September 2015 - * $Revision: V1.00 - * - * Project: CAN (Controller Area Network) Driver definitions - * -------------------------------------------------------------------------- */ - -/* History: - * Version 1.0 - * - Initial CMSIS Driver API V4.5.0 release - * - */ - - - -/** @defgroup CAN CAN Peripheral - * @{ - * -*/ - -#ifndef __CAN_H -#define __CAN_H - -#include "Driver_CAN.h" - -#include "RTE_Device.h" - - -#define ARM_CAN_ARBITRATION_LOST (5U) ///< Unit entered arbitration lost error FIXME: added by me - - -/** @defgroup CANIMRREG Can interrupt mask register bit fields - * @{ - */ -/****** CAN Interrupt mask bits *****/ -#define CAN_IMR_DOIM (1UL << 0) ///< mask for DOI interrupt -#define CAN_IMR_BEIM (1UL << 1) ///< mask for BEI interrupt -#define CAN_IMR_TIM (1UL << 2) ///< mask for TI interrupt -#define CAN_IMR_RIM (1UL << 3) ///< mask for RI interrupt -#define CAN_IMR_EPIM (1UL << 4) ///< mask for EPI interrupt -#define CAN_IMR_EWIM (1UL << 5) ///< mask for EWI interrupt -#define CAN_IMR_ALIM (1UL << 6) ///< mask for ALI interrupt -/* - * @} end of CAN_IMR_REG - * */ - -/** @defgroup CAN_ISR_REG: Can interrupt Status register bit fields - * \addtogroup CAN_ISR_REG - * @{ - */ -/****** CAN Interrupt status bits *****/ -#define CAN_ISR_DO (1UL << 0) ///< DOI interrupt -#define CAN_ISR_BEI (1UL << 1) ///< BEI interrupt -#define CAN_ISR_TI (1UL << 2) ///< TI interrupt -#define CAN_ISR_RI (1UL << 3) ///< RI interrupt -#define CAN_ISR_EPI (1UL << 4) ///< EPI interrupt -#define CAN_ISR_EWI (1UL << 5) ///< EWI interrupt -#define CAN_ISR_ALI (1UL << 6) ///< ALI interrupt -/* - * @} end of CAN_ISR_REG - * */ - -/** @defgroup CAN_SR_REG: Can Status register bit fields - * \addtogroup CAN_SR_REG - * @{ - */ -/****** CAN Interrupt status bits *****/ -#define CAN_SR_BS (1UL << 0) ///< Bus off Status -#define CAN_SR_ES (1UL << 1) ///< Error Status -#define CAN_SR_TS (1UL << 2) ///< Transmit Status -#define CAN_SR_RS (1UL << 3) ///< Receive Status -#define CAN_SR_TBS (1UL << 5) ///< Transmit Buffer Status -#define CAN_SR_DSO (1UL << 6) ///< Data Overrun Status -#define CAN_SR_RBS (1UL << 7) ///< Receive Buffer Status -/* - * @} end of CAN_SR_REG - * */ - -/** @defgroup CAN_MR_REG: Can mode register bit fields - * \addtogroup CAN_MR_REG - * @{ - */ -/****** CAN mode control bits *****/ -#define CAN_CMR_AT (1UL << 1) ///< Transmit Request -#define CAN_CMR_TR (1UL << 2) ///< Abort Transmission -/* - * @} end of CAN_MR_REG - * */ - -/****** CAN mode configuration codes *****/ -typedef enum { - CAN_HW_RESET_MODE_CONFIG, ///< CAN configure in reset mode - CAN_HW_NORMAL_MODE_CONFIG, ///< CAN configure in normal mode - CAN_HW_LISTEN_ONLY_MODE_CONFIG, ///< CAN configure in listen only mode - CAN_HW_DUAL_FILTER_MODE_CONFIG, ///< CAN configure in dual filter mode - CAN_HW_SINGLE_FILTER_MODE_CONFIG, ///< CAN configure in single filter mode - CAN_HW_ACCEPTANCE_SINGLE_FILTER_MODE_CONFIG_ENABLE,///< CAN enable configuration in hardware acceptance for single filter mode - CAN_HW_ACCEPTANCE_DUAL_FILTER_MODE_CONFIG_ENABLE, ///< CAN enable configuration in hardware acceptance for dual filter mode -}CAN_HW_MODE_CONFIG; - -/****** CAN filter type configuration codes *****/ -typedef enum { - CAN_FILTER_TYPE_EXACT_ID = 0U, ///< Add exact id filter - CAN_FILTER_TYPE_MASKABLE_ID = 1U ///< Add maskable id filter -} CAN_FILTER_TYPE; - -/** -\brief CAN Device Driver pin configurations -*/ -typedef struct { - uint8_t port; ///< CAN GPIO port - uint8_t pin; ///< CAN GPIO pin - uint8_t mode; ///< CAN GPIO mode - uint8_t pad_sel; ///< CAN GPIO pad selection -}CAN_PIN; - -#endif /* __CAN_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_CAN.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_CAN.h deleted file mode 100644 index 60a8094e5..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_CAN.h +++ /dev/null @@ -1,232 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2015 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 9. September 2015 - * $Revision: V1.00 - * - * Project: CAN (Controller Area Network) Driver definitions - * -------------------------------------------------------------------------- */ - -/* History: - * Version 1.00 - * Initial release - */ - -#ifndef __DRIVER_CAN_H -#define __DRIVER_CAN_H - -#include "Driver_Common.h" - -#define ARM_CAN_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0)/* API version */ - - -/****** CAN Bitrate selection codes *****/ -typedef enum _ARM_CAN_BITRATE_SELECT { - ARM_CAN_BITRATE_NOMINAL, ///< Select nominal (flexible data-rate arbitration) bitrate - ARM_CAN_BITRATE_FD_DATA ///< Select flexible data-rate data bitrate -} ARM_CAN_BITRATE_SELECT; - -/****** CAN Bit Propagation Segment codes (PROP_SEG) *****/ -#define ARM_CAN_BIT_PROP_SEG_Pos 0UL ///< bits 7..0 -#define ARM_CAN_BIT_PROP_SEG_Msk (0xFFUL << ARM_CAN_BIT_PROP_SEG_Pos) -#define ARM_CAN_BIT_PROP_SEG(x) (((x) << ARM_CAN_BIT_PROP_SEG_Pos) & ARM_CAN_BIT_PROP_SEG_Msk) - -/****** CAN Bit Phase Buffer Segment 1 (PHASE_SEG1) codes *****/ -#define ARM_CAN_BIT_PHASE_SEG1_Pos 8UL ///< bits 15..8 -#define ARM_CAN_BIT_PHASE_SEG1_Msk (0xFFUL << ARM_CAN_BIT_PHASE_SEG1_Pos) -#define ARM_CAN_BIT_PHASE_SEG1(x) (((x) << ARM_CAN_BIT_PHASE_SEG1_Pos) & ARM_CAN_BIT_PHASE_SEG1_Msk) - -/****** CAN Bit Phase Buffer Segment 2 (PHASE_SEG2) codes *****/ -#define ARM_CAN_BIT_PHASE_SEG2_Pos 16UL ///< bits 23..16 -#define ARM_CAN_BIT_PHASE_SEG2_Msk (0xFFUL << ARM_CAN_BIT_PHASE_SEG2_Pos) -#define ARM_CAN_BIT_PHASE_SEG2(x) (((x) << ARM_CAN_BIT_PHASE_SEG2_Pos) & ARM_CAN_BIT_PHASE_SEG2_Msk) - -/****** CAN Bit (Re)Synchronization Jump Width Segment (SJW) *****/ -#define ARM_CAN_BIT_SJW_Pos 24UL ///< bits 28..24 -#define ARM_CAN_BIT_SJW_Msk (0x1FUL << ARM_CAN_BIT_SJW_Pos) -#define ARM_CAN_BIT_SJW(x) (((x) << ARM_CAN_BIT_SJW_Pos) & ARM_CAN_BIT_SJW_Msk) - -/****** CAN Mode codes *****/ -typedef enum _ARM_CAN_MODE { - ARM_CAN_MODE_INITIALIZATION, ///< Initialization mode - ARM_CAN_MODE_NORMAL, ///< Normal operation mode - ARM_CAN_MODE_RESTRICTED, ///< Restricted operation mode - ARM_CAN_MODE_MONITOR, ///< Bus monitoring mode - ARM_CAN_MODE_LOOPBACK_INTERNAL, ///< Loopback internal mode - ARM_CAN_MODE_LOOPBACK_EXTERNAL ///< Loopback external mode -} ARM_CAN_MODE; - -/****** CAN Filter Operation codes *****/ -typedef enum _ARM_CAN_FILTER_OPERATION { - ARM_CAN_FILTER_ID_EXACT_ADD, ///< Add exact id filter - ARM_CAN_FILTER_ID_EXACT_REMOVE, ///< Remove exact id filter - ARM_CAN_FILTER_ID_RANGE_ADD, ///< Add range id filter - ARM_CAN_FILTER_ID_RANGE_REMOVE, ///< Remove range id filter - ARM_CAN_FILTER_ID_MASKABLE_ADD, ///< Add maskable id filter - ARM_CAN_FILTER_ID_MASKABLE_REMOVE ///< Remove maskable id filter -} ARM_CAN_FILTER_OPERATION; - -/****** CAN Object Configuration codes *****/ -typedef enum _ARM_CAN_OBJ_CONFIG { - ARM_CAN_OBJ_INACTIVE, ///< CAN object inactive - ARM_CAN_OBJ_TX, ///< CAN transmit object - ARM_CAN_OBJ_RX, ///< CAN receive object - ARM_CAN_OBJ_RX_RTR_TX_DATA, ///< CAN object that on RTR reception automatically transmits Data Frame - ARM_CAN_OBJ_TX_RTR_RX_DATA ///< CAN object that transmits RTR and automatically receives Data Frame -} ARM_CAN_OBJ_CONFIG; - -/** -\brief CAN Object Capabilities -*/ -typedef struct _ARM_CAN_OBJ_CAPABILITIES { - uint32_t tx : 1; ///< Object supports transmission - uint32_t rx : 1; ///< Object supports reception - uint32_t rx_rtr_tx_data : 1; ///< Object supports RTR reception and automatic Data Frame transmission - uint32_t tx_rtr_rx_data : 1; ///< Object supports RTR transmission and automatic Data Frame reception - uint32_t multiple_filters : 1; ///< Object allows assignment of multiple filters to it - uint32_t exact_filtering : 1; ///< Object supports exact identifier filtering - uint32_t range_filtering : 1; ///< Object supports range identifier filtering - uint32_t mask_filtering : 1; ///< Object supports mask identifier filtering - uint32_t message_depth : 8; ///< Number of messages buffers (FIFO) for that object -} ARM_CAN_OBJ_CAPABILITIES; - -/****** CAN Control Function Operation codes *****/ -#define ARM_CAN_CONTROL_Pos 0UL -#define ARM_CAN_CONTROL_Msk (0xFFUL << ARM_CAN_CONTROL_Pos) -#define ARM_CAN_SET_FD_MODE (1UL << ARM_CAN_CONTROL_Pos) ///< Set FD operation mode; arg: 0 = disable, 1 = enable -#define ARM_CAN_ABORT_MESSAGE_SEND (2UL << ARM_CAN_CONTROL_Pos) ///< Abort sending of CAN message; arg = object -#define ARM_CAN_CONTROL_RETRANSMISSION (3UL << ARM_CAN_CONTROL_Pos) ///< Enable/disable automatic retransmission; arg: 0 = disable, 1 = enable (default state) -#define ARM_CAN_SET_TRANSCEIVER_DELAY (4UL << ARM_CAN_CONTROL_Pos) ///< Set transceiver delay; arg = delay in time quanta - -/****** CAN ID Frame Format codes *****/ -#define ARM_CAN_ID_IDE_Pos 31UL -#define ARM_CAN_ID_IDE_Msk (1UL << ARM_CAN_ID_IDE_Pos) - -/****** CAN Identifier encoding *****/ -#define ARM_CAN_STANDARD_ID(id) (id & 0x000007FFUL) ///< CAN identifier in standard format (11-bits) -#define ARM_CAN_EXTENDED_ID(id) ((id & 0x1FFFFFFFUL) | ARM_CAN_ID_IDE_Msk)///< CAN identifier in extended format (29-bits) - -/** -\brief CAN Message Information -*/ -typedef struct _ARM_CAN_MSG_INFO { - uint32_t id; ///< CAN identifier with frame format specifier (bit 31) - uint32_t rtr : 1; ///< Remote transmission request frame - uint32_t edl : 1; ///< Flexible data-rate format extended data length - uint32_t brs : 1; ///< Flexible data-rate format with bitrate switch - uint32_t esi : 1; ///< Flexible data-rate format error state indicator - uint32_t dlc : 4; ///< Data length code -} ARM_CAN_MSG_INFO; - -/****** CAN specific error code *****/ -#define ARM_CAN_INVALID_BITRATE_SELECT (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< Bitrate selection not supported -#define ARM_CAN_INVALID_BITRATE (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Requested bitrate not supported -#define ARM_CAN_INVALID_BIT_PROP_SEG (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Propagation segment value not supported -#define ARM_CAN_INVALID_BIT_PHASE_SEG1 (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< Phase segment 1 value not supported -#define ARM_CAN_INVALID_BIT_PHASE_SEG2 (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Phase segment 2 value not supported -#define ARM_CAN_INVALID_BIT_SJW (ARM_DRIVER_ERROR_SPECIFIC - 6) ///< SJW value not supported -#define ARM_CAN_NO_MESSAGE_AVAILABLE (ARM_DRIVER_ERROR_SPECIFIC - 7) ///< Message is not available - -/****** CAN Status codes *****/ -#define ARM_CAN_UNIT_STATE_INACTIVE (0U) ///< Unit state: Not active on bus (initialize or error bus off) -#define ARM_CAN_UNIT_STATE_ACTIVE (1U) ///< Unit state: Active on bus (can generate active error frame) -#define ARM_CAN_UNIT_STATE_PASSIVE (2U) ///< Unit state: Error passive (can not generate active error frame) -#define ARM_CAN_LEC_NO_ERROR (0U) ///< Last error code: No error -#define ARM_CAN_LEC_BIT_ERROR (1U) ///< Last error code: Bit error -#define ARM_CAN_LEC_STUFF_ERROR (2U) ///< Last error code: Bit stuffing error -#define ARM_CAN_LEC_CRC_ERROR (3U) ///< Last error code: CRC error -#define ARM_CAN_LEC_FORM_ERROR (4U) ///< Last error code: Illegal fixed-form bit -#define ARM_CAN_LEC_ACK_ERROR (5U) ///< Last error code: Acknowledgement error - -/** -\brief CAN Status -*/ -typedef struct _ARM_CAN_STATUS { - uint32_t unit_state : 4; ///< Unit bus state - uint32_t last_error_code : 4; ///< Last error code - uint32_t tx_error_count : 8; ///< Transmitter error count - uint32_t rx_error_count : 8; ///< Receiver error count -} ARM_CAN_STATUS; - - -/****** CAN Unit Event *****/ -#define ARM_CAN_EVENT_UNIT_ACTIVE (1U) ///< Unit entered Error Active state -#define ARM_CAN_EVENT_UNIT_WARNING (2U) ///< Unit entered Error Warning state (one or both error counters >= 96) -#define ARM_CAN_EVENT_UNIT_PASSIVE (3U) ///< Unit entered Error Passive state -#define ARM_CAN_EVENT_UNIT_BUS_OFF (4U) ///< Unit entered bus off state - -/****** CAN Send/Receive Event *****/ -#define ARM_CAN_EVENT_SEND_COMPLETE (1UL << 0) ///< Send complete -#define ARM_CAN_EVENT_RECEIVE (1UL << 1) ///< Message received -#define ARM_CAN_EVENT_RECEIVE_OVERRUN (1UL << 2) ///< Received message overrun - -typedef void (*ARM_CAN_SignalUnitEvent_t) (uint32_t event); ///< Pointer to \ref ARM_CAN_SignalUnitEvent : Signal CAN Unit Event. -typedef void (*ARM_CAN_SignalObjectEvent_t) (uint32_t obj_idx, uint32_t event); ///< Pointer to \ref ARM_CAN_SignalObjectEvent : Signal CAN Object Event. - -/** -\brief CAN Device Driver Capabilities. -*/ -typedef struct _ARM_CAN_CAPABILITIES { - uint32_t num_objects : 8; ///< Number of \ref can_objects available - uint32_t reentrant_operation : 1; ///< Support for reentrant calls to \ref ARM_CAN_MessageSend, \ref ARM_CAN_MessageRead, \ref ARM_CAN_ObjectConfigure and abort message sending used by \ref ARM_CAN_Control - uint32_t fd_mode : 1; ///< Support for CAN with flexible data-rate mode (CAN_FD) (set by \ref ARM_CAN_Control) - uint32_t restricted_mode : 1; ///< Support for restricted operation mode (set by \ref ARM_CAN_SetMode) - uint32_t monitor_mode : 1; ///< Support for bus monitoring mode (set by \ref ARM_CAN_SetMode) - uint32_t internal_loopback : 1; ///< Support for internal loopback mode (set by \ref ARM_CAN_SetMode) - uint32_t external_loopback : 1; ///< Support for external loopback mode (set by \ref ARM_CAN_SetMode) -} ARM_CAN_CAPABILITIES; - - -/** -\brief Access structure of the CAN Driver. -*/ -typedef struct _ARM_DRIVER_CAN { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_CAN_GetVersion : Get driver version. - ARM_CAN_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_CAN_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_CAN_SignalUnitEvent_t cb_unit_event, - ARM_CAN_SignalObjectEvent_t cb_object_event); ///< Pointer to \ref ARM_CAN_Initialize : Initialize CAN interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_CAN_Uninitialize : De-initialize CAN interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_CAN_PowerControl : Control CAN interface power. - uint32_t (*GetClock) (void); ///< Pointer to \ref ARM_CAN_GetClock : Retrieve CAN base clock frequency. - int32_t (*SetBitrate) (ARM_CAN_BITRATE_SELECT select, - uint32_t bitrate, - uint32_t bit_segments); ///< Pointer to \ref ARM_CAN_SetBitrate : Set bitrate for CAN interface. - int32_t (*SetMode) (ARM_CAN_MODE mode); ///< Pointer to \ref ARM_CAN_SetMode : Set operating mode for CAN interface. - ARM_CAN_OBJ_CAPABILITIES (*ObjectGetCapabilities) (uint32_t obj_idx); ///< Pointer to \ref ARM_CAN_ObjectGetCapabilities : Retrieve capabilities of an object. - int32_t (*ObjectSetFilter) (uint32_t obj_idx, - ARM_CAN_FILTER_OPERATION operation, - uint32_t id, - uint32_t arg); ///< Pointer to \ref ARM_CAN_ObjectSetFilter : Add or remove filter for message reception. - int32_t (*ObjectConfigure) (uint32_t obj_idx, - ARM_CAN_OBJ_CONFIG obj_cfg); ///< Pointer to \ref ARM_CAN_ObjectConfigure : Configure object. - int32_t (*MessageSend) (uint32_t obj_idx, - ARM_CAN_MSG_INFO *msg_info, - const uint8_t *data, - uint8_t size); ///< Pointer to \ref ARM_CAN_MessageSend : Send message on CAN bus. - int32_t (*MessageRead) (uint32_t obj_idx, - ARM_CAN_MSG_INFO *msg_info, - uint8_t *data, - uint8_t size); ///< Pointer to \ref ARM_CAN_MessageRead : Read message received on CAN bus. - int32_t (*Control) (uint32_t control, - uint32_t arg); ///< Pointer to \ref ARM_CAN_Control : Control CAN interface. - ARM_CAN_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_CAN_GetStatus : Get CAN status. -} const ARM_DRIVER_CAN; - -#endif /* __DRIVER_CAN_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_ETH.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_ETH.h deleted file mode 100644 index 29b9e06e7..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_ETH.h +++ /dev/null @@ -1,85 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2014 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 7. Mar 2014 - * $Revision: V2.00 - * - * Project: Ethernet PHY and MAC Driver common definitions - * -------------------------------------------------------------------------- */ - -/* History: - * Version 2.00 - * Removed ARM_ETH_STATUS enumerator - * Removed ARM_ETH_MODE enumerator - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef __DRIVER_ETH_H -#define __DRIVER_ETH_H - -#include "Driver_Common.h" - -/** -\brief Ethernet Media Interface type -*/ -#define ARM_ETH_INTERFACE_MII 0 ///< Media Independent Interface (MII) -#define ARM_ETH_INTERFACE_RMII 1 ///< Reduced Media Independent Interface (RMII) -#define ARM_ETH_INTERFACE_SMII 2 ///< Serial Media Independent Interface (SMII) - -/** -\brief Ethernet link speed -*/ -#define ARM_ETH_SPEED_10M 0 ///< 10 Mbps link speed -#define ARM_ETH_SPEED_100M 1 ///< 100 Mbps link speed -#define ARM_ETH_SPEED_1G 2 ///< 1 Gpbs link speed - -/** -\brief Ethernet duplex mode -*/ -#define ARM_ETH_DUPLEX_HALF 0 ///< Half duplex link -#define ARM_ETH_DUPLEX_FULL 1 ///< Full duplex link - -/** -\brief Ethernet link state -*/ -typedef enum _ARM_ETH_LINK_STATE { - ARM_ETH_LINK_DOWN, ///< Link is down - ARM_ETH_LINK_UP ///< Link is up -} ARM_ETH_LINK_STATE; - -/** -\brief Ethernet link information -*/ -typedef struct _ARM_ETH_LINK_INFO { - uint32_t speed : 2; ///< Link speed: 0= 10 MBit, 1= 100 MBit, 2= 1 GBit - uint32_t duplex : 1; ///< Duplex mode: 0= Half, 1= Full -} ARM_ETH_LINK_INFO; - -/** -\brief Ethernet MAC Address -*/ -typedef struct _ARM_ETH_MAC_ADDR { - uint8_t b[6]; ///< MAC Address (6 bytes), MSB first -} ARM_ETH_MAC_ADDR; - -#endif /* __DRIVER_ETH_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_ETH_MAC.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_ETH_MAC.h deleted file mode 100644 index 775fab5d9..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_ETH_MAC.h +++ /dev/null @@ -1,301 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2014 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 30. May 2014 - * $Revision: V2.01 - * - * Project: Ethernet MAC (Media Access Control) Driver definitions - * -------------------------------------------------------------------------- */ - -/* History: - * Version 2.01 - * Added ARM_ETH_MAC_SLEEP Control - * Version 2.00 - * Changed MAC Address handling: - * moved from ARM_ETH_MAC_Initialize - * to new functions ARM_ETH_MAC_GetMacAddress and ARM_ETH_MAC_SetMacAddress - * Replaced ARM_ETH_MAC_SetMulticastAddr function with ARM_ETH_MAC_SetAddressFilter - * Extended ARM_ETH_MAC_SendFrame function with flags - * Added ARM_ETH_MAC_Control function: - * more control options (Broadcast, Multicast, Checksum offload, VLAN, ...) - * replaces ARM_ETH_MAC_SetMode - * replaces ARM_ETH_MAC_EnableTx, ARM_ETH_MAC_EnableRx - * Added optional event on transmitted frame - * Added support for PTP (Precision Time Protocol) through new functions: - * ARM_ETH_MAC_ControlTimer - * ARM_ETH_MAC_GetRxFrameTime - * ARM_ETH_MAC_GetTxFrameTime - * Changed prefix ARM_DRV -> ARM_DRIVER - * Changed return values of some functions to int32_t - * Version 1.10 - * Name space prefix ARM_ added - * Version 1.01 - * Renamed capabilities items for checksum offload - * Version 1.00 - * Initial release - */ - -#ifndef __DRIVER_ETH_MAC_H -#define __DRIVER_ETH_MAC_H - -#include "Driver_ETH.h" - -#define ARM_ETH_MAC_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,01) /* API version */ - - -#define _ARM_Driver_ETH_MAC_(n) Driver_ETH_MAC##n -#define ARM_Driver_ETH_MAC_(n) _ARM_Driver_ETH_MAC_(n) - - -/****** Ethernet MAC Control Codes *****/ - -#define ARM_ETH_MAC_CONFIGURE (0x01) ///< Configure MAC; arg = configuration -#define ARM_ETH_MAC_CONTROL_TX (0x02) ///< Transmitter; arg: 0=disabled (default), 1=enabled -#define ARM_ETH_MAC_CONTROL_RX (0x03) ///< Receiver; arg: 0=disabled (default), 1=enabled -#define ARM_ETH_MAC_FLUSH (0x04) ///< Flush buffer; arg = ARM_ETH_MAC_FLUSH_... -#define ARM_ETH_MAC_SLEEP (0x05) ///< Sleep mode; arg: 1=enter and wait for Magic packet, 0=exit -#define ARM_ETH_MAC_VLAN_FILTER (0x06) ///< VLAN Filter for received frames; arg15..0: VLAN Tag; arg16: optional ARM_ETH_MAC_VLAN_FILTER_ID_ONLY; 0=disabled (default) - -/*----- Ethernet MAC Configuration -----*/ -#define ARM_ETH_MAC_SPEED_Pos 0 -#define ARM_ETH_MAC_SPEED_Msk (3UL << ARM_ETH_MAC_SPEED_Pos) -#define ARM_ETH_MAC_SPEED_10M (ARM_ETH_SPEED_10M << ARM_ETH_MAC_SPEED_Pos) ///< 10 Mbps link speed -#define ARM_ETH_MAC_SPEED_100M (ARM_ETH_SPEED_100M << ARM_ETH_MAC_SPEED_Pos) ///< 100 Mbps link speed -#define ARM_ETH_MAC_SPEED_1G (ARM_ETH_SPEED_1G << ARM_ETH_MAC_SPEED_Pos) ///< 1 Gpbs link speed -#define ARM_ETH_MAC_DUPLEX_Pos 2 -#define ARM_ETH_MAC_DUPLEX_Msk (1UL << ARM_ETH_MAC_DUPLEX_Pos) -#define ARM_ETH_MAC_DUPLEX_HALF (ARM_ETH_DUPLEX_HALF << ARM_ETH_MAC_DUPLEX_Pos) ///< Half duplex link -#define ARM_ETH_MAC_DUPLEX_FULL (ARM_ETH_DUPLEX_FULL << ARM_ETH_MAC_DUPLEX_Pos) ///< Full duplex link -#define ARM_ETH_MAC_LOOPBACK (1UL << 4) ///< Loop-back test mode -#define ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX (1UL << 5) ///< Receiver Checksum offload -#define ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX (1UL << 6) ///< Transmitter Checksum offload -#define ARM_ETH_MAC_ADDRESS_BROADCAST (1UL << 7) ///< Accept frames with Broadcast address -#define ARM_ETH_MAC_ADDRESS_MULTICAST (1UL << 8) ///< Accept frames with any Multicast address -#define ARM_ETH_MAC_ADDRESS_ALL (1UL << 9) ///< Accept frames with any address (Promiscuous Mode) - -/*----- Ethernet MAC Flush Flags -----*/ -#define ARM_ETH_MAC_FLUSH_RX (1UL << 0) ///< Flush Receive buffer -#define ARM_ETH_MAC_FLUSH_TX (1UL << 1) ///< Flush Transmit buffer - -/*----- Ethernet MAC VLAN Filter Flag -----*/ -#define ARM_ETH_MAC_VLAN_FILTER_ID_ONLY (1UL << 16) ///< Compare only the VLAN Identifier (12-bit) - - -/****** Ethernet MAC Frame Transmit Flags *****/ -#define ARM_ETH_MAC_TX_FRAME_FRAGMENT (1UL << 0) ///< Indicate frame fragment -#define ARM_ETH_MAC_TX_FRAME_EVENT (1UL << 1) ///< Generate event when frame is transmitted -#define ARM_ETH_MAC_TX_FRAME_TIMESTAMP (1UL << 2) ///< Capture frame time stamp - - -/****** Ethernet MAC Timer Control Codes *****/ -#define ARM_ETH_MAC_TIMER_GET_TIME (0x01) ///< Get current time -#define ARM_ETH_MAC_TIMER_SET_TIME (0x02) ///< Set new time -#define ARM_ETH_MAC_TIMER_INC_TIME (0x03) ///< Increment current time -#define ARM_ETH_MAC_TIMER_DEC_TIME (0x04) ///< Decrement current time -#define ARM_ETH_MAC_TIMER_SET_ALARM (0x05) ///< Set alarm time -#define ARM_ETH_MAC_TIMER_ADJUST_CLOCK (0x06) ///< Adjust clock frequency; time->ns: correction factor * 2^31 - - -/** -\brief Ethernet MAC Time -*/ -typedef struct _ARM_ETH_MAC_TIME { - uint32_t ns; ///< Nano seconds - uint32_t sec; ///< Seconds -} ARM_ETH_MAC_TIME; - - -/****** Ethernet MAC Event *****/ -#define ARM_ETH_MAC_EVENT_RX_FRAME (1UL << 0) ///< Frame Received -#define ARM_ETH_MAC_EVENT_TX_FRAME (1UL << 1) ///< Frame Transmitted -#define ARM_ETH_MAC_EVENT_WAKEUP (1UL << 2) ///< Wake-up (on Magic Packet) -#define ARM_ETH_MAC_EVENT_TIMER_ALARM (1UL << 3) ///< Timer Alarm - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_ETH_MAC_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_ETH_MAC_CAPABILITIES ARM_ETH_MAC_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_ETH_MAC_CAPABILITIES -*/ -/** - \fn int32_t ARM_ETH_MAC_Initialize (ARM_ETH_MAC_SignalEvent_t cb_event) - \brief Initialize Ethernet MAC Device. - \param[in] cb_event Pointer to \ref ARM_ETH_MAC_SignalEvent - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_Uninitialize (void) - \brief De-initialize Ethernet MAC Device. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_PowerControl (ARM_POWER_STATE state) - \brief Control Ethernet MAC Device Power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr) - \brief Get Ethernet MAC Address. - \param[in] ptr_addr Pointer to address - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr) - \brief Set Ethernet MAC Address. - \param[in] ptr_addr Pointer to address - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, - uint32_t num_addr) - \brief Configure Address Filter. - \param[in] ptr_addr Pointer to addresses - \param[in] num_addr Number of addresses to configure - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags) - \brief Send Ethernet frame. - \param[in] frame Pointer to frame buffer with data to send - \param[in] len Frame buffer length in bytes - \param[in] flags Frame transmit flags (see ARM_ETH_MAC_TX_FRAME_...) - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_ReadFrame (uint8_t *frame, uint32_t len) - \brief Read data of received Ethernet frame. - \param[in] frame Pointer to frame buffer for data to read into - \param[in] len Frame buffer length in bytes - \return number of data bytes read or execution status - - value >= 0: number of data bytes read - - value < 0: error occurred, value is execution status as defined with \ref execution_status -*/ -/** - \fn uint32_t ARM_ETH_MAC_GetRxFrameSize (void) - \brief Get size of received Ethernet frame. - \return number of bytes in received frame -*/ -/** - \fn int32_t ARM_ETH_MAC_GetRxFrameTime (ARM_ETH_MAC_TIME *time) - \brief Get time of received Ethernet frame. - \param[in] time Pointer to time structure for data to read into - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_GetTxFrameTime (ARM_ETH_MAC_TIME *time) - \brief Get time of transmitted Ethernet frame. - \param[in] time Pointer to time structure for data to read into - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_Control (uint32_t control, uint32_t arg) - \brief Control Ethernet Interface. - \param[in] control Operation - \param[in] arg Argument of operation (optional) - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time) - \brief Control Precision Timer. - \param[in] control Operation - \param[in] time Pointer to time structure - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data) - \brief Read Ethernet PHY Register through Management Interface. - \param[in] phy_addr 5-bit device address - \param[in] reg_addr 5-bit register address - \param[out] data Pointer where the result is written to - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data) - \brief Write Ethernet PHY Register through Management Interface. - \param[in] phy_addr 5-bit device address - \param[in] reg_addr 5-bit register address - \param[in] data 16-bit data to write - \return \ref execution_status -*/ - -/** - \fn void ARM_ETH_MAC_SignalEvent (uint32_t event) - \brief Callback function that signals a Ethernet Event. - \param[in] event event notification mask - \return none -*/ - -typedef void (*ARM_ETH_MAC_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_ETH_MAC_SignalEvent : Signal Ethernet Event. - - -/** -\brief Ethernet MAC Capabilities -*/ -typedef struct _ARM_ETH_MAC_CAPABILITIES { - uint32_t checksum_offload_rx_ip4 : 1; ///< 1 = IPv4 header checksum verified on receive - uint32_t checksum_offload_rx_ip6 : 1; ///< 1 = IPv6 checksum verification supported on receive - uint32_t checksum_offload_rx_udp : 1; ///< 1 = UDP payload checksum verified on receive - uint32_t checksum_offload_rx_tcp : 1; ///< 1 = TCP payload checksum verified on receive - uint32_t checksum_offload_rx_icmp : 1; ///< 1 = ICMP payload checksum verified on receive - uint32_t checksum_offload_tx_ip4 : 1; ///< 1 = IPv4 header checksum generated on transmit - uint32_t checksum_offload_tx_ip6 : 1; ///< 1 = IPv6 checksum generation supported on transmit - uint32_t checksum_offload_tx_udp : 1; ///< 1 = UDP payload checksum generated on transmit - uint32_t checksum_offload_tx_tcp : 1; ///< 1 = TCP payload checksum generated on transmit - uint32_t checksum_offload_tx_icmp : 1; ///< 1 = ICMP payload checksum generated on transmit - uint32_t media_interface : 2; ///< Ethernet Media Interface type - uint32_t mac_address : 1; ///< 1 = driver provides initial valid MAC address - uint32_t event_rx_frame : 1; ///< 1 = callback event \ref ARM_ETH_MAC_EVENT_RX_FRAME generated - uint32_t event_tx_frame : 1; ///< 1 = callback event \ref ARM_ETH_MAC_EVENT_TX_FRAME generated - uint32_t event_wakeup : 1; ///< 1 = wakeup event \ref ARM_ETH_MAC_EVENT_WAKEUP generated - uint32_t precision_timer : 1; ///< 1 = Precision Timer supported -} ARM_ETH_MAC_CAPABILITIES; - - -/** -\brief Access structure of the Ethernet MAC Driver -*/ -typedef struct _ARM_DRIVER_ETH_MAC { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_ETH_MAC_GetVersion : Get driver version. - ARM_ETH_MAC_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_ETH_MAC_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_ETH_MAC_SignalEvent_t cb_event); ///< Pointer to \ref ARM_ETH_MAC_Initialize : Initialize Ethernet MAC Device. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_ETH_MAC_Uninitialize : De-initialize Ethernet MAC Device. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_ETH_MAC_PowerControl : Control Ethernet MAC Device Power. - int32_t (*GetMacAddress) ( ARM_ETH_MAC_ADDR *ptr_addr); ///< Pointer to \ref ARM_ETH_MAC_GetMacAddress : Get Ethernet MAC Address. - int32_t (*SetMacAddress) (const ARM_ETH_MAC_ADDR *ptr_addr); ///< Pointer to \ref ARM_ETH_MAC_SetMacAddress : Set Ethernet MAC Address. - int32_t (*SetAddressFilter)(const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr); ///< Pointer to \ref ARM_ETH_MAC_SetAddressFilter : Configure Address Filter. - int32_t (*SendFrame) (const uint8_t *frame, uint32_t len, uint32_t flags); ///< Pointer to \ref ARM_ETH_MAC_SendFrame : Send Ethernet frame. - int32_t (*ReadFrame) ( uint8_t *frame, uint32_t len); ///< Pointer to \ref ARM_ETH_MAC_ReadFrame : Read data of received Ethernet frame. - uint32_t (*GetRxFrameSize) (void); ///< Pointer to \ref ARM_ETH_MAC_GetRxFrameSize : Get size of received Ethernet frame. - int32_t (*GetRxFrameTime) (ARM_ETH_MAC_TIME *time); ///< Pointer to \ref ARM_ETH_MAC_GetRxFrameTime : Get time of received Ethernet frame. - int32_t (*GetTxFrameTime) (ARM_ETH_MAC_TIME *time); ///< Pointer to \ref ARM_ETH_MAC_GetTxFrameTime : Get time of transmitted Ethernet frame. - int32_t (*ControlTimer) (uint32_t control, ARM_ETH_MAC_TIME *time); ///< Pointer to \ref ARM_ETH_MAC_ControlTimer : Control Precision Timer. - int32_t (*Control) (uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_ETH_MAC_Control : Control Ethernet Interface. - int32_t (*PHY_Read) (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data); ///< Pointer to \ref ARM_ETH_MAC_PHY_Read : Read Ethernet PHY Register through Management Interface. - int32_t (*PHY_Write) (uint8_t phy_addr, uint8_t reg_addr, uint16_t data); ///< Pointer to \ref ARM_ETH_MAC_PHY_Write : Write Ethernet PHY Register through Management Interface. -} const ARM_DRIVER_ETH_MAC; - -#endif /* __DRIVER_ETH_MAC_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_ETH_PHY.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_ETH_PHY.h deleted file mode 100644 index d647a5d7e..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_ETH_PHY.h +++ /dev/null @@ -1,133 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2014 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 7. Mar 2014 - * $Revision: V2.00 - * - * Project: Ethernet PHY (Physical Transceiver) Driver definitions - * -------------------------------------------------------------------------- */ - -/* History: - * Version 2.00 - * changed parameter "mode" in function ARM_ETH_PHY_SetMode - * Changed prefix ARM_DRV -> ARM_DRIVER - * Changed return values of some functions to int32_t - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef __DRIVER_ETH_PHY_H -#define __DRIVER_ETH_PHY_H - -#include "Driver_ETH.h" - -#define ARM_ETH_PHY_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,00) /* API version */ - - -#define _ARM_Driver_ETH_PHY_(n) Driver_ETH_PHY##n -#define ARM_Driver_ETH_PHY_(n) _ARM_Driver_ETH_PHY_(n) - - -/****** Ethernet PHY Mode *****/ -#define ARM_ETH_PHY_SPEED_Pos 0 -#define ARM_ETH_PHY_SPEED_Msk (3UL << ARM_ETH_PHY_SPEED_Pos) -#define ARM_ETH_PHY_SPEED_10M (ARM_ETH_SPEED_10M << ARM_ETH_PHY_SPEED_Pos) ///< 10 Mbps link speed -#define ARM_ETH_PHY_SPEED_100M (ARM_ETH_SPEED_100M << ARM_ETH_PHY_SPEED_Pos) ///< 100 Mbps link speed -#define ARM_ETH_PHY_SPEED_1G (ARM_ETH_SPEED_1G << ARM_ETH_PHY_SPEED_Pos) ///< 1 Gpbs link speed -#define ARM_ETH_PHY_DUPLEX_Pos 2 -#define ARM_ETH_PHY_DUPLEX_Msk (1UL << ARM_ETH_PHY_DUPLEX_Pos) -#define ARM_ETH_PHY_DUPLEX_HALF (ARM_ETH_DUPLEX_HALF << ARM_ETH_PHY_DUPLEX_Pos) ///< Half duplex link -#define ARM_ETH_PHY_DUPLEX_FULL (ARM_ETH_DUPLEX_FULL << ARM_ETH_PHY_DUPLEX_Pos) ///< Full duplex link -#define ARM_ETH_PHY_AUTO_NEGOTIATE (1UL << 3) ///< Auto Negotiation mode -#define ARM_ETH_PHY_LOOPBACK (1UL << 4) ///< Loop-back test mode -#define ARM_ETH_PHY_ISOLATE (1UL << 5) ///< Isolate PHY from MII/RMII interface - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_ETH_PHY_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn int32_t ARM_ETH_PHY_Initialize (ARM_ETH_PHY_Read_t fn_read, - ARM_ETH_PHY_Write_t fn_write) - \brief Initialize Ethernet PHY Device. - \param[in] fn_read Pointer to \ref ARM_ETH_MAC_PHY_Read - \param[in] fn_write Pointer to \ref ARM_ETH_MAC_PHY_Write - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_PHY_Uninitialize (void) - \brief De-initialize Ethernet PHY Device. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_PHY_PowerControl (ARM_POWER_STATE state) - \brief Control Ethernet PHY Device Power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_PHY_SetInterface (uint32_t interface) - \brief Set Ethernet Media Interface. - \param[in] interface Media Interface type - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_PHY_SetMode (uint32_t mode) - \brief Set Ethernet PHY Device Operation mode. - \param[in] mode Operation Mode - \return \ref execution_status -*/ -/** - \fn ARM_ETH_LINK_STATE ARM_ETH_PHY_GetLinkState (void) - \brief Get Ethernet PHY Device Link state. - \return current link status \ref ARM_ETH_LINK_STATE -*/ -/** - \fn ARM_ETH_LINK_INFO ARM_ETH_PHY_GetLinkInfo (void) - \brief Get Ethernet PHY Device Link information. - \return current link parameters \ref ARM_ETH_LINK_INFO -*/ - - -typedef int32_t (*ARM_ETH_PHY_Read_t) (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data); ///< Pointer to \ref ARM_ETH_MAC_PHY_Read : Read Ethernet PHY Register. -typedef int32_t (*ARM_ETH_PHY_Write_t) (uint8_t phy_addr, uint8_t reg_addr, uint16_t data); ///< Pointer to \ref ARM_ETH_MAC_PHY_Write : Write Ethernet PHY Register. - - -/** -\brief Access structure of the Ethernet PHY Driver -*/ -typedef struct _ARM_DRIVER_ETH_PHY { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_ETH_PHY_GetVersion : Get driver version. - int32_t (*Initialize) (ARM_ETH_PHY_Read_t fn_read, - ARM_ETH_PHY_Write_t fn_write); ///< Pointer to \ref ARM_ETH_PHY_Initialize : Initialize PHY Device. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_ETH_PHY_Uninitialize : De-initialize PHY Device. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_ETH_PHY_PowerControl : Control PHY Device Power. - int32_t (*SetInterface) (uint32_t interface); ///< Pointer to \ref ARM_ETH_PHY_SetInterface : Set Ethernet Media Interface. - int32_t (*SetMode) (uint32_t mode); ///< Pointer to \ref ARM_ETH_PHY_SetMode : Set Ethernet PHY Device Operation mode. - ARM_ETH_LINK_STATE (*GetLinkState) (void); ///< Pointer to \ref ARM_ETH_PHY_GetLinkState : Get Ethernet PHY Device Link state. - ARM_ETH_LINK_INFO (*GetLinkInfo) (void); ///< Pointer to \ref ARM_ETH_PHY_GetLinkInfo : Get Ethernet PHY Device Link information. -} const ARM_DRIVER_ETH_PHY; - -#endif /* __DRIVER_ETH_PHY_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_MCI.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_MCI.h deleted file mode 100644 index 9565af669..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_MCI.h +++ /dev/null @@ -1,350 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2014 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 16. May 2014 - * $Revision: V2.02 - * - * Project: MCI (Memory Card Interface) Driver definitions - * -------------------------------------------------------------------------- */ - -/* History: - * Version 2.02 - * Added timeout and error flags to ARM_MCI_STATUS - * Added support for controlling optional RST_n pin (eMMC) - * Removed explicit Clock Control (ARM_MCI_CONTROL_CLOCK) - * Removed event ARM_MCI_EVENT_BOOT_ACK_TIMEOUT - * Version 2.01 - * Decoupled SPI mode from MCI driver - * Replaced function ARM_MCI_CardSwitchRead with ARM_MCI_ReadCD and ARM_MCI_ReadWP - * Version 2.00 - * Added support for: - * SD UHS-I (Ultra High Speed) - * SD I/O Interrupt - * Read Wait (SD I/O) - * Suspend/Resume (SD I/O) - * MMC Interrupt - * MMC Boot - * Stream Data transfer (MMC) - * VCCQ Power Supply Control (eMMC) - * Command Completion Signal (CCS) for CE-ATA - * Added ARM_MCI_Control function - * Added ARM_MCI_GetStatus function - * Removed ARM_MCI_BusMode, ARM_MCI_BusDataWidth, ARM_MCI_BusSingaling functions - * (replaced by ARM_MCI_Control) - * Changed ARM_MCI_CardPower function (voltage parameter) - * Changed ARM_MCI_SendCommnad function (flags parameter) - * Changed ARM_MCI_SetupTransfer function (mode parameter) - * Removed ARM_MCI_ReadTransfer and ARM_MCI_WriteTransfer functions - * Changed prefix ARM_DRV -> ARM_DRIVER - * Changed return values of some functions to int32_t - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef __DRIVER_MCI_H -#define __DRIVER_MCI_H - -#include "Driver_Common.h" - -#define ARM_MCI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,02) /* API version */ - - -/****** MCI Send Command Flags *****/ -#define ARM_MCI_RESPONSE_Pos 0 -#define ARM_MCI_RESPONSE_Msk (3UL << ARM_MCI_RESPONSE_Pos) -#define ARM_MCI_RESPONSE_NONE (0UL << ARM_MCI_RESPONSE_Pos) ///< No response expected (default) -#define ARM_MCI_RESPONSE_SHORT (1UL << ARM_MCI_RESPONSE_Pos) ///< Short response (48-bit) -#define ARM_MCI_RESPONSE_SHORT_BUSY (2UL << ARM_MCI_RESPONSE_Pos) ///< Short response with busy signal (48-bit) -#define ARM_MCI_RESPONSE_LONG (3UL << ARM_MCI_RESPONSE_Pos) ///< Long response (136-bit) - -#define ARM_MCI_RESPONSE_INDEX (1UL << 2) ///< Check command index in response -#define ARM_MCI_RESPONSE_CRC (1UL << 3) ///< Check CRC in response - -#define ARM_MCI_WAIT_BUSY (1UL << 4) ///< Wait until busy before sending the command - -#define ARM_MCI_TRANSFER_DATA (1UL << 5) ///< Activate Data transfer - -#define ARM_MCI_CARD_INITIALIZE (1UL << 6) ///< Execute Memory Card initialization sequence - -#define ARM_MCI_INTERRUPT_COMMAND (1UL << 7) ///< Send Interrupt command (CMD40 - MMC only) -#define ARM_MCI_INTERRUPT_RESPONSE (1UL << 8) ///< Send Interrupt response (CMD40 - MMC only) - -#define ARM_MCI_BOOT_OPERATION (1UL << 9) ///< Execute Boot operation (MMC only) -#define ARM_MCI_BOOT_ALTERNATIVE (1UL << 10) ///< Execute Alternative Boot operation (MMC only) -#define ARM_MCI_BOOT_ACK (1UL << 11) ///< Expect Boot Acknowledge (MMC only) - -#define ARM_MCI_CCSD (1UL << 12) ///< Send Command Completion Signal Disable (CCSD) for CE-ATA device -#define ARM_MCI_CCS (1UL << 13) ///< Expect Command Completion Signal (CCS) for CE-ATA device - - -/****** MCI Setup Transfer Mode *****/ -#define ARM_MCI_TRANSFER_READ (0UL << 0) ///< Data Read Transfer (from MCI) -#define ARM_MCI_TRANSFER_WRITE (1UL << 0) ///< Data Write Transfer (to MCI) -#define ARM_MCI_TRANSFER_BLOCK (0UL << 1) ///< Block Data transfer (default) -#define ARM_MCI_TRANSFER_STREAM (1UL << 1) ///< Stream Data transfer (MMC only) - - -/****** MCI Control Codes *****/ -#define ARM_MCI_BUS_SPEED (0x01) ///< Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s -#define ARM_MCI_BUS_SPEED_MODE (0x02) ///< Set Bus Speed Mode as specified with arg -#define ARM_MCI_BUS_CMD_MODE (0x03) ///< Set CMD Line Mode as specified with arg -#define ARM_MCI_BUS_DATA_WIDTH (0x04) ///< Set Bus Data Width as specified with arg -#define ARM_MCI_DRIVER_STRENGTH (0x05) ///< Set SD UHS-I Driver Strength as specified with arg -#define ARM_MCI_CONTROL_RESET (0x06) ///< Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active -#define ARM_MCI_CONTROL_CLOCK_IDLE (0x07) ///< Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled -#define ARM_MCI_UHS_TUNING_OPERATION (0x08) ///< Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute -#define ARM_MCI_UHS_TUNING_RESULT (0x09) ///< Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error -#define ARM_MCI_DATA_TIMEOUT (0x0A) ///< Set Data timeout; arg = timeout in bus cycles -#define ARM_MCI_CSS_TIMEOUT (0x0B) ///< Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles -#define ARM_MCI_MONITOR_SDIO_INTERRUPT (0x0C) ///< Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled -#define ARM_MCI_CONTROL_READ_WAIT (0x0D) ///< Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled -#define ARM_MCI_SUSPEND_TRANSFER (0x0E) ///< Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer -#define ARM_MCI_RESUME_TRANSFER (0x0F) ///< Resume Data transfer (SD I/O) - -/*----- MCI Bus Speed Mode -----*/ -#define ARM_MCI_BUS_DEFAULT_SPEED (0x00) ///< SD/MMC: Default Speed mode up to 25/26MHz -#define ARM_MCI_BUS_HIGH_SPEED (0x01) ///< SD/MMC: High Speed mode up to 50/52MHz -#define ARM_MCI_BUS_UHS_SDR12 (0x02) ///< SD: SDR12 (Single Data Rate) up to 25MHz, 12.5MB/s: UHS-I (Ultra High Speed) 1.8V signaling -#define ARM_MCI_BUS_UHS_SDR25 (0x03) ///< SD: SDR25 (Single Data Rate) up to 50MHz, 25 MB/s: UHS-I (Ultra High Speed) 1.8V signaling -#define ARM_MCI_BUS_UHS_SDR50 (0x04) ///< SD: SDR50 (Single Data Rate) up to 100MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling -#define ARM_MCI_BUS_UHS_SDR104 (0x05) ///< SD: SDR104 (Single Data Rate) up to 208MHz, 104 MB/s: UHS-I (Ultra High Speed) 1.8V signaling -#define ARM_MCI_BUS_UHS_DDR50 (0x06) ///< SD: DDR50 (Dual Data Rate) up to 50MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling - -/*----- MCI CMD Line Mode -----*/ -#define ARM_MCI_BUS_CMD_PUSH_PULL (0x00) ///< Push-Pull CMD line (default) -#define ARM_MCI_BUS_CMD_OPEN_DRAIN (0x01) ///< Open Drain CMD line (MMC only) - -/*----- MCI Bus Data Width -----*/ -#define ARM_MCI_BUS_DATA_WIDTH_1 (0x00) ///< Bus data width: 1 bit (default) -#define ARM_MCI_BUS_DATA_WIDTH_4 (0x01) ///< Bus data width: 4 bits -#define ARM_MCI_BUS_DATA_WIDTH_8 (0x02) ///< Bus data width: 8 bits -#define ARM_MCI_BUS_DATA_WIDTH_4_DDR (0x03) ///< Bus data width: 4 bits, DDR (Dual Data Rate) - MMC only -#define ARM_MCI_BUS_DATA_WIDTH_8_DDR (0x04) ///< Bus data width: 8 bits, DDR (Dual Data Rate) - MMC only - -/*----- MCI Driver Strength -----*/ -#define ARM_MCI_DRIVER_TYPE_A (0x01) ///< SD UHS-I Driver Type A -#define ARM_MCI_DRIVER_TYPE_B (0x00) ///< SD UHS-I Driver Type B (default) -#define ARM_MCI_DRIVER_TYPE_C (0x02) ///< SD UHS-I Driver Type C -#define ARM_MCI_DRIVER_TYPE_D (0x03) ///< SD UHS-I Driver Type D - - -/****** MCI Card Power *****/ -#define ARM_MCI_POWER_VDD_Pos 0 -#define ARM_MCI_POWER_VDD_Msk (0x0FUL << ARM_MCI_POWER_VDD_Pos) -#define ARM_MCI_POWER_VDD_OFF (0x01UL << ARM_MCI_POWER_VDD_Pos) ///< VDD (VCC) turned off -#define ARM_MCI_POWER_VDD_3V3 (0x02UL << ARM_MCI_POWER_VDD_Pos) ///< VDD (VCC) = 3.3V -#define ARM_MCI_POWER_VDD_1V8 (0x03UL << ARM_MCI_POWER_VDD_Pos) ///< VDD (VCC) = 1.8V -#define ARM_MCI_POWER_VCCQ_Pos 4 -#define ARM_MCI_POWER_VCCQ_Msk (0x0FUL << ARM_MCI_POWER_VCCQ_Pos) -#define ARM_MCI_POWER_VCCQ_OFF (0x01UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ turned off -#define ARM_MCI_POWER_VCCQ_3V3 (0x02UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ = 3.3V -#define ARM_MCI_POWER_VCCQ_1V8 (0x03UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ = 1.8V -#define ARM_MCI_POWER_VCCQ_1V2 (0x04UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ = 1.2V - - -/** -\brief MCI Status -*/ -typedef struct _ARM_MCI_STATUS { - uint32_t command_active : 1; ///< Command active flag - uint32_t command_timeout : 1; ///< Command timeout flag (cleared on start of next command) - uint32_t command_error : 1; ///< Command error flag (cleared on start of next command) - uint32_t transfer_active : 1; ///< Transfer active flag - uint32_t transfer_timeout : 1; ///< Transfer timeout flag (cleared on start of next command) - uint32_t transfer_error : 1; ///< Transfer error flag (cleared on start of next command) - uint32_t sdio_interrupt : 1; ///< SD I/O Interrupt flag (cleared on start of monitoring) - uint32_t ccs : 1; ///< CCS flag (cleared on start of next command) -} ARM_MCI_STATUS; - - -/****** MCI Card Event *****/ -#define ARM_MCI_EVENT_CARD_INSERTED (1UL << 0) ///< Memory Card inserted -#define ARM_MCI_EVENT_CARD_REMOVED (1UL << 1) ///< Memory Card removed -#define ARM_MCI_EVENT_COMMAND_COMPLETE (1UL << 2) ///< Command completed -#define ARM_MCI_EVENT_COMMAND_TIMEOUT (1UL << 3) ///< Command timeout -#define ARM_MCI_EVENT_COMMAND_ERROR (1UL << 4) ///< Command response error (CRC error or invalid response) -#define ARM_MCI_EVENT_TRANSFER_COMPLETE (1UL << 5) ///< Data transfer completed -#define ARM_MCI_EVENT_TRANSFER_TIMEOUT (1UL << 6) ///< Data transfer timeout -#define ARM_MCI_EVENT_TRANSFER_ERROR (1UL << 7) ///< Data transfer CRC failed -#define ARM_MCI_EVENT_SDIO_INTERRUPT (1UL << 8) ///< SD I/O Interrupt -#define ARM_MCI_EVENT_CCS (1UL << 9) ///< Command Completion Signal (CCS) -#define ARM_MCI_EVENT_CCS_TIMEOUT (1UL << 10) ///< Command Completion Signal (CCS) Timeout - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_MCI_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_MCI_CAPABILITIES ARM_MCI_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_MCI_CAPABILITIES -*/ -/** - \fn int32_t ARM_MCI_Initialize (ARM_MCI_SignalEvent_t cb_event) - \brief Initialize the Memory Card Interface - \param[in] cb_event Pointer to \ref ARM_MCI_SignalEvent - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_Uninitialize (void) - \brief De-initialize Memory Card Interface. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_PowerControl (ARM_POWER_STATE state) - \brief Control Memory Card Interface Power. - \param[in] state Power state \ref ARM_POWER_STATE - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_CardPower (uint32_t voltage) - \brief Set Memory Card Power supply voltage. - \param[in] voltage Memory Card Power supply voltage - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_ReadCD (void) - \brief Read Card Detect (CD) state. - \return 1:card detected, 0:card not detected, or error -*/ -/** - \fn int32_t ARM_MCI_ReadWP (void) - \brief Read Write Protect (WP) state. - \return 1:write protected, 0:not write protected, or error -*/ -/** - \fn int32_t ARM_MCI_SendCommand (uint32_t cmd, - uint32_t arg, - uint32_t flags, - uint32_t *response) - \brief Send Command to card and get the response. - \param[in] cmd Memory Card command - \param[in] arg Command argument - \param[in] flags Command flags - \param[out] response Pointer to buffer for response - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_SetupTransfer (uint8_t *data, - uint32_t block_count, - uint32_t block_size, - uint32_t mode) - \brief Setup read or write transfer operation. - \param[in,out] data Pointer to data block(s) to be written or read - \param[in] block_count Number of blocks - \param[in] block_size Size of a block in bytes - \param[in] mode Transfer mode - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_AbortTransfer (void) - \brief Abort current read/write data transfer. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_Control (uint32_t control, uint32_t arg) - \brief Control MCI Interface. - \param[in] control Operation - \param[in] arg Argument of operation (optional) - \return \ref execution_status -*/ -/** - \fn ARM_MCI_STATUS ARM_MCI_GetStatus (void) - \brief Get MCI status. - \return MCI status \ref ARM_MCI_STATUS -*/ - -/** - \fn void ARM_MCI_SignalEvent (uint32_t event) - \brief Callback function that signals a MCI Card Event. - \param[in] event \ref mci_event_gr - \return none -*/ - -typedef void (*ARM_MCI_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_MCI_SignalEvent : Signal MCI Card Event. - - -/** -\brief MCI Driver Capabilities. -*/ -typedef struct _ARM_MCI_CAPABILITIES { - uint32_t cd_state : 1; ///< Card Detect State available - uint32_t cd_event : 1; ///< Signal Card Detect change event - uint32_t wp_state : 1; ///< Write Protect State available - uint32_t vdd : 1; ///< Supports VDD Card Power Supply Control - uint32_t vdd_1v8 : 1; ///< Supports 1.8 VDD Card Power Supply - uint32_t vccq : 1; ///< Supports VCCQ Card Power Supply Control (eMMC) - uint32_t vccq_1v8 : 1; ///< Supports 1.8 VCCQ Card Power Supply (eMMC) - uint32_t vccq_1v2 : 1; ///< Supports 1.2 VCCQ Card Power Supply (eMMC) - uint32_t data_width_4 : 1; ///< Supports 4-bit data - uint32_t data_width_8 : 1; ///< Supports 8-bit data - uint32_t data_width_4_ddr : 1; ///< Supports 4-bit data, DDR (Dual Data Rate) - MMC only - uint32_t data_width_8_ddr : 1; ///< Supports 8-bit data, DDR (Dual Data Rate) - MMC only - uint32_t high_speed : 1; ///< Supports SD/MMC High Speed Mode - uint32_t uhs_signaling : 1; ///< Supports SD UHS-I (Ultra High Speed) 1.8V signaling - uint32_t uhs_tuning : 1; ///< Supports SD UHS-I tuning - uint32_t uhs_sdr50 : 1; ///< Supports SD UHS-I SDR50 (Single Data Rate) up to 50MB/s - uint32_t uhs_sdr104 : 1; ///< Supports SD UHS-I SDR104 (Single Data Rate) up to 104MB/s - uint32_t uhs_ddr50 : 1; ///< Supports SD UHS-I DDR50 (Dual Data Rate) up to 50MB/s - uint32_t uhs_driver_type_a : 1; ///< Supports SD UHS-I Driver Type A - uint32_t uhs_driver_type_c : 1; ///< Supports SD UHS-I Driver Type C - uint32_t uhs_driver_type_d : 1; ///< Supports SD UHS-I Driver Type D - uint32_t sdio_interrupt : 1; ///< Supports SD I/O Interrupt - uint32_t read_wait : 1; ///< Supports Read Wait (SD I/O) - uint32_t suspend_resume : 1; ///< Supports Suspend/Resume (SD I/O) - uint32_t mmc_interrupt : 1; ///< Supports MMC Interrupt - uint32_t mmc_boot : 1; ///< Supports MMC Boot - uint32_t rst_n : 1; ///< Supports RST_n Pin Control (eMMC) - uint32_t ccs : 1; ///< Supports Command Completion Signal (CCS) for CE-ATA - uint32_t ccs_timeout : 1; ///< Supports Command Completion Signal (CCS) timeout for CE-ATA -} ARM_MCI_CAPABILITIES; - - -/** -\brief Access structure of the MCI Driver. -*/ -typedef struct _ARM_DRIVER_MCI { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_MCI_GetVersion : Get driver version. - ARM_MCI_CAPABILITIES (*GetCapabilities)(void); ///< Pointer to \ref ARM_MCI_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_MCI_SignalEvent_t cb_event); ///< Pointer to \ref ARM_MCI_Initialize : Initialize MCI Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_MCI_Uninitialize : De-initialize MCI Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_MCI_PowerControl : Control MCI Interface Power. - int32_t (*CardPower) (uint32_t voltage); ///< Pointer to \ref ARM_MCI_CardPower : Set card power supply voltage. - int32_t (*ReadCD) (void); ///< Pointer to \ref ARM_MCI_ReadCD : Read Card Detect (CD) state. - int32_t (*ReadWP) (void); ///< Pointer to \ref ARM_MCI_ReadWP : Read Write Protect (WP) state. - int32_t (*SendCommand) (uint32_t cmd, - uint32_t arg, - uint32_t flags, - uint32_t *response); ///< Pointer to \ref ARM_MCI_SendCommand : Send Command to card and get the response. - int32_t (*SetupTransfer) (uint8_t *data, - uint32_t block_count, - uint32_t block_size, - uint32_t mode); ///< Pointer to \ref ARM_MCI_SetupTransfer : Setup data transfer operation. - int32_t (*AbortTransfer) (void); ///< Pointer to \ref ARM_MCI_AbortTransfer : Abort current data transfer. - int32_t (*Control) (uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_MCI_Control : Control MCI Interface. - ARM_MCI_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_MCI_GetStatus : Get MCI status. -} const ARM_DRIVER_MCI; - -#endif /* __DRIVER_MCI_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_NAND.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_NAND.h deleted file mode 100644 index fb41cc9f7..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_NAND.h +++ /dev/null @@ -1,403 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2014 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 30. May 2014 - * $Revision: V2.01 - * - * Project: NAND Flash Driver definitions - * -------------------------------------------------------------------------- */ - -/* History: - * Version 2.01 - * Updated ARM_NAND_ECC_INFO structure and ARM_NAND_ECC_xxx definitions - * Version 2.00 - * New simplified driver: - * complexity moved to upper layer (command agnostic) - * Added support for: - * NV-DDR & NV-DDR2 Interface (ONFI specification) - * VCC, VCCQ and VPP Power Supply Control - * WP (Write Protect) Control - * Version 1.11 - * Changed prefix ARM_DRV -> ARM_DRIVER - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef __DRIVER_NAND_H -#define __DRIVER_NAND_H - -#include "Driver_Common.h" - -#define ARM_NAND_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,01) /* API version */ - - -/****** NAND Device Power *****/ -#define ARM_NAND_POWER_VCC_Pos 0 -#define ARM_NAND_POWER_VCC_Msk (0x07UL << ARM_NAND_POWER_VCC_Pos) -#define ARM_NAND_POWER_VCC_OFF (0x01UL << ARM_NAND_POWER_VCC_Pos) ///< VCC Power off -#define ARM_NAND_POWER_VCC_3V3 (0x02UL << ARM_NAND_POWER_VCC_Pos) ///< VCC = 3.3V -#define ARM_NAND_POWER_VCC_1V8 (0x03UL << ARM_NAND_POWER_VCC_Pos) ///< VCC = 1.8V -#define ARM_NAND_POWER_VCCQ_Pos 3 -#define ARM_NAND_POWER_VCCQ_Msk (0x07UL << ARM_NAND_POWER_VCCQ_Pos) -#define ARM_NAND_POWER_VCCQ_OFF (0x01UL << ARM_NAND_POWER_VCCQ_Pos) ///< VCCQ I/O Power off -#define ARM_NAND_POWER_VCCQ_3V3 (0x02UL << ARM_NAND_POWER_VCCQ_Pos) ///< VCCQ = 3.3V -#define ARM_NAND_POWER_VCCQ_1V8 (0x03UL << ARM_NAND_POWER_VCCQ_Pos) ///< VCCQ = 1.8V -#define ARM_NAND_POWER_VPP_OFF (1UL << 6) ///< VPP off -#define ARM_NAND_POWER_VPP_ON (1Ul << 7) ///< VPP on - - -/****** NAND Control Codes *****/ -#define ARM_NAND_BUS_MODE (0x01) ///< Set Bus Mode as specified with arg -#define ARM_NAND_BUS_DATA_WIDTH (0x02) ///< Set Bus Data Width as specified with arg -#define ARM_NAND_DRIVER_STRENGTH (0x03) ///< Set Driver Strength as specified with arg -#define ARM_NAND_DEVICE_READY_EVENT (0x04) ///< Generate \ref ARM_NAND_EVENT_DEVICE_READY; arg: 0=disabled (default), 1=enabled -#define ARM_NAND_DRIVER_READY_EVENT (0x05) ///< Generate \ref ARM_NAND_EVENT_DRIVER_READY; arg: 0=disabled (default), 1=enabled - -/*----- NAND Bus Mode (ONFI - Open NAND Flash Interface) -----*/ -#define ARM_NAND_BUS_INTERFACE_Pos 4 -#define ARM_NAND_BUS_INTERFACE_Msk (0x03UL << ARM_NAND_BUS_INTERFACE_Pos) -#define ARM_NAND_BUS_SDR (0x00UL << ARM_NAND_BUS_INTERFACE_Pos) ///< Data Interface: SDR (Single Data Rate) - Traditional interface (default) -#define ARM_NAND_BUS_DDR (0x01UL << ARM_NAND_BUS_INTERFACE_Pos) ///< Data Interface: NV-DDR (Double Data Rate) -#define ARM_NAND_BUS_DDR2 (0x02UL << ARM_NAND_BUS_INTERFACE_Pos) ///< Data Interface: NV-DDR2 (Double Data Rate) -#define ARM_NAND_BUS_TIMING_MODE_Pos 0 -#define ARM_NAND_BUS_TIMING_MODE_Msk (0x0FUL << ARM_NAND_BUS_TIMING_MODE_Pos) -#define ARM_NAND_BUS_TIMING_MODE_0 (0x00UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 0 (default) -#define ARM_NAND_BUS_TIMING_MODE_1 (0x01UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 1 -#define ARM_NAND_BUS_TIMING_MODE_2 (0x02UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 2 -#define ARM_NAND_BUS_TIMING_MODE_3 (0x03UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 3 -#define ARM_NAND_BUS_TIMING_MODE_4 (0x04UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 4 (SDR EDO capable) -#define ARM_NAND_BUS_TIMING_MODE_5 (0x05UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 5 (SDR EDO capable) -#define ARM_NAND_BUS_TIMING_MODE_6 (0x06UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 6 (NV-DDR2 only) -#define ARM_NAND_BUS_TIMING_MODE_7 (0x07UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 7 (NV-DDR2 only) -#define ARM_NAND_BUS_DDR2_DO_WCYC_Pos 8 -#define ARM_NAND_BUS_DDR2_DO_WCYC_Msk (0x0FUL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos) -#define ARM_NAND_BUS_DDR2_DO_WCYC_0 (0x00UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos) ///< DDR2 Data Output Warm-up cycles: 0 (default) -#define ARM_NAND_BUS_DDR2_DO_WCYC_1 (0x01UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos) ///< DDR2 Data Output Warm-up cycles: 1 -#define ARM_NAND_BUS_DDR2_DO_WCYC_2 (0x02UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos) ///< DDR2 Data Output Warm-up cycles: 2 -#define ARM_NAND_BUS_DDR2_DO_WCYC_4 (0x03UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos) ///< DDR2 Data Output Warm-up cycles: 4 -#define ARM_NAND_BUS_DDR2_DI_WCYC_Pos 12 -#define ARM_NAND_BUS_DDR2_DI_WCYC_Msk (0x0FUL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos) -#define ARM_NAND_BUS_DDR2_DI_WCYC_0 (0x00UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos) ///< DDR2 Data Input Warm-up cycles: 0 (default) -#define ARM_NAND_BUS_DDR2_DI_WCYC_1 (0x01UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos) ///< DDR2 Data Input Warm-up cycles: 1 -#define ARM_NAND_BUS_DDR2_DI_WCYC_2 (0x02UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos) ///< DDR2 Data Input Warm-up cycles: 2 -#define ARM_NAND_BUS_DDR2_DI_WCYC_4 (0x03UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos) ///< DDR2 Data Input Warm-up cycles: 4 -#define ARM_NAND_BUS_DDR2_VEN (1UL << 16) ///< DDR2 Enable external VREFQ as reference -#define ARM_NAND_BUS_DDR2_CMPD (1UL << 17) ///< DDR2 Enable complementary DQS (DQS_c) signal -#define ARM_NAND_BUS_DDR2_CMPR (1UL << 18) ///< DDR2 Enable complementary RE_n (RE_c) signal - -/*----- NAND Data Bus Width -----*/ -#define ARM_NAND_BUS_DATA_WIDTH_8 (0x00) ///< Bus Data Width: 8 bit (default) -#define ARM_NAND_BUS_DATA_WIDTH_16 (0x01) ///< Bus Data Width: 16 bit - -/*----- NAND Driver Strength (ONFI - Open NAND Flash Interface) -----*/ -#define ARM_NAND_DRIVER_STRENGTH_18 (0x00) ///< Driver Strength 2.0x = 18 Ohms -#define ARM_NAND_DRIVER_STRENGTH_25 (0x01) ///< Driver Strength 1.4x = 25 Ohms -#define ARM_NAND_DRIVER_STRENGTH_35 (0x02) ///< Driver Strength 1.0x = 35 Ohms (default) -#define ARM_NAND_DRIVER_STRENGTH_50 (0x03) ///< Driver Strength 0.7x = 50 Ohms - - -/****** NAND ECC for Read/Write Data Mode and Sequence Execution Code *****/ -#define ARM_NAND_ECC_INDEX_Pos 0 -#define ARM_NAND_ECC_INDEX_Msk (0xFFUL << ARM_NAND_ECC_INDEX_Pos) -#define ARM_NAND_ECC(n) ((n) & ARM_NAND_ECC_INDEX_Msk) ///< Select ECC -#define ARM_NAND_ECC0 (1UL << 8) ///< Use ECC0 of selected ECC -#define ARM_NAND_ECC1 (1UL << 9) ///< Use ECC1 of selected ECC - -/****** NAND Flag for Read/Write Data Mode and Sequence Execution Code *****/ -#define ARM_NAND_DRIVER_DONE_EVENT (1UL << 16) ///< Generate \ref ARM_NAND_EVENT_DRIVER_DONE - -/****** NAND Sequence Execution Code *****/ -#define ARM_NAND_CODE_SEND_CMD1 (1UL << 17) ///< Send Command 1 -#define ARM_NAND_CODE_SEND_ADDR_COL1 (1UL << 18) ///< Send Column Address 1 -#define ARM_NAND_CODE_SEND_ADDR_COL2 (1UL << 19) ///< Send Column Address 2 -#define ARM_NAND_CODE_SEND_ADDR_ROW1 (1UL << 20) ///< Send Row Address 1 -#define ARM_NAND_CODE_SEND_ADDR_ROW2 (1UL << 21) ///< Send Row Address 2 -#define ARM_NAND_CODE_SEND_ADDR_ROW3 (1UL << 22) ///< Send Row Address 3 -#define ARM_NAND_CODE_INC_ADDR_ROW (1UL << 23) ///< Auto-increment Row Address -#define ARM_NAND_CODE_WRITE_DATA (1UL << 24) ///< Write Data -#define ARM_NAND_CODE_SEND_CMD2 (1UL << 25) ///< Send Command 2 -#define ARM_NAND_CODE_WAIT_BUSY (1UL << 26) ///< Wait while R/Bn busy -#define ARM_NAND_CODE_READ_DATA (1UL << 27) ///< Read Data -#define ARM_NAND_CODE_SEND_CMD3 (1UL << 28) ///< Send Command 3 -#define ARM_NAND_CODE_READ_STATUS (1UL << 29) ///< Read Status byte and check FAIL bit (bit 0) - -/*----- NAND Sequence Execution Code: Command -----*/ -#define ARM_NAND_CODE_CMD1_Pos 0 -#define ARM_NAND_CODE_CMD1_Msk (0xFFUL << ARM_NAND_CODE_CMD1_Pos) -#define ARM_NAND_CODE_CMD2_Pos 8 -#define ARM_NAND_CODE_CMD2_Msk (0xFFUL << ARM_NAND_CODE_CMD2_Pos) -#define ARM_NAND_CODE_CMD3_Pos 16 -#define ARM_NAND_CODE_CMD3_Msk (0xFFUL << ARM_NAND_CODE_CMD3_Pos) - -/*----- NAND Sequence Execution Code: Column Address -----*/ -#define ARM_NAND_CODE_ADDR_COL1_Pos 0 -#define ARM_NAND_CODE_ADDR_COL1_Msk (0xFFUL << ARM_NAND_CODE_ADDR_COL1_Pos) -#define ARM_NAND_CODE_ADDR_COL2_Pos 8 -#define ARM_NAND_CODE_ADDR_COL2_Msk (0xFFUL << ARM_NAND_CODE_ADDR_COL2_Pos) - -/*----- NAND Sequence Execution Code: Row Address -----*/ -#define ARM_NAND_CODE_ADDR_ROW1_Pos 0 -#define ARM_NAND_CODE_ADDR_ROW1_Msk (0xFFUL << ARM_NAND_CODE_ADDR_ROW1_Pos) -#define ARM_NAND_CODE_ADDR_ROW2_Pos 8 -#define ARM_NAND_CODE_ADDR_ROW2_Msk (0xFFUL << ARM_NAND_CODE_ADDR_ROW2_Pos) -#define ARM_NAND_CODE_ADDR_ROW3_Pos 16 -#define ARM_NAND_CODE_ADDR_ROW3_Msk (0xFFUL << ARM_NAND_CODE_ADDR_ROW3_Pos) - - -/****** NAND specific error codes *****/ -#define ARM_NAND_ERROR_ECC (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< ECC generation/correction failed - - -/** -\brief NAND ECC (Error Correction Code) Information -*/ -typedef struct _ARM_NAND_ECC_INFO { - uint32_t type : 2; ///< Type: 1=ECC0 over Data, 2=ECC0 over Data+Spare, 3=ECC0 over Data and ECC1 over Spare - uint32_t page_layout : 1; ///< Page layout: 0=|Data0|Spare0|...|DataN-1|SpareN-1|, 1=|Data0|...|DataN-1|Spare0|...|SpareN-1| - uint32_t page_count : 3; ///< Number of virtual pages: N = 2 ^ page_count - uint32_t page_size : 4; ///< Virtual Page size (Data+Spare): 0=512+16, 1=1k+32, 2=2k+64, 3=4k+128, 4=8k+256, 8=512+28, 9=1k+56, 10=2k+112, 11=4k+224, 12=8k+448 - uint32_t reserved : 14; ///< Reserved (must be zero) - uint32_t correctable_bits : 8; ///< Number of correctable bits (based on 512 byte codeword size) - uint16_t codeword_size [2]; ///< Number of bytes over which ECC is calculated - uint16_t ecc_size [2]; ///< ECC size in bytes (rounded up) - uint16_t ecc_offset [2]; ///< ECC offset in bytes (where ECC starts in Spare area) -} ARM_NAND_ECC_INFO; - - -/** -\brief NAND Status -*/ -typedef struct _ARM_NAND_STATUS { - uint32_t busy : 1; ///< Driver busy flag - uint32_t ecc_error : 1; ///< ECC error detected (cleared on next Read/WriteData or ExecuteSequence) -} ARM_NAND_STATUS; - - -/****** NAND Event *****/ -#define ARM_NAND_EVENT_DEVICE_READY (1UL << 0) ///< Device Ready: R/Bn rising edge -#define ARM_NAND_EVENT_DRIVER_READY (1UL << 1) ///< Driver Ready -#define ARM_NAND_EVENT_DRIVER_DONE (1UL << 2) ///< Driver operation done -#define ARM_NAND_EVENT_ECC_ERROR (1UL << 3) ///< ECC could not correct data - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_NAND_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_NAND_CAPABILITIES ARM_NAND_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_NAND_CAPABILITIES -*/ -/** - \fn int32_t ARM_NAND_Initialize (ARM_NAND_SignalEvent_t cb_event) - \brief Initialize the NAND Interface. - \param[in] cb_event Pointer to \ref ARM_NAND_SignalEvent - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_Uninitialize (void) - \brief De-initialize the NAND Interface. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_PowerControl (ARM_POWER_STATE state) - \brief Control the NAND interface power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_DevicePower (uint32_t voltage) - \brief Set device power supply voltage. - \param[in] voltage NAND Device supply voltage - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_WriteProtect (uint32_t dev_num, bool enable) - \brief Control WPn (Write Protect). - \param[in] dev_num Device number - \param[in] enable - - \b false Write Protect off - - \b true Write Protect on - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_ChipEnable (uint32_t dev_num, bool enable) - \brief Control CEn (Chip Enable). - \param[in] dev_num Device number - \param[in] enable - - \b false Chip Enable off - - \b true Chip Enable on - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_GetDeviceBusy (uint32_t dev_num) - \brief Get Device Busy pin state. - \param[in] dev_num Device number - \return 1=busy, 0=not busy, or error -*/ -/** - \fn int32_t ARM_NAND_SendCommand (uint32_t dev_num, uint8_t cmd) - \brief Send command to NAND device. - \param[in] dev_num Device number - \param[in] cmd Command - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_SendAddress (uint32_t dev_num, uint8_t addr) - \brief Send address to NAND device. - \param[in] dev_num Device number - \param[in] addr Address - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_ReadData (uint32_t dev_num, void *data, uint32_t cnt, uint32_t mode) - \brief Read data from NAND device. - \param[in] dev_num Device number - \param[out] data Pointer to buffer for data to read from NAND device - \param[in] cnt Number of data items to read - \param[in] mode Operation mode - \return number of data items read or \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_WriteData (uint32_t dev_num, const void *data, uint32_t cnt, uint32_t mode) - \brief Write data to NAND device. - \param[in] dev_num Device number - \param[out] data Pointer to buffer with data to write to NAND device - \param[in] cnt Number of data items to write - \param[in] mode Operation mode - \return number of data items written or \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_ExecuteSequence (uint32_t dev_num, uint32_t code, uint32_t cmd, - uint32_t addr_col, uint32_t addr_row, - void *data, uint32_t data_cnt, - uint8_t *status, uint32_t *count) - \brief Execute sequence of operations. - \param[in] dev_num Device number - \param[in] code Sequence code - \param[in] cmd Command(s) - \param[in] addr_col Column address - \param[in] addr_row Row address - \param[in,out] data Pointer to data to be written or read - \param[in] data_cnt Number of data items in one iteration - \param[out] status Pointer to status read - \param[in,out] count Number of iterations - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_AbortSequence (uint32_t dev_num) - \brief Abort sequence execution. - \param[in] dev_num Device number - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_Control (uint32_t dev_num, uint32_t control, uint32_t arg) - \brief Control NAND Interface. - \param[in] dev_num Device number - \param[in] control Operation - \param[in] arg Argument of operation - \return \ref execution_status -*/ -/** - \fn ARM_NAND_STATUS ARM_NAND_GetStatus (uint32_t dev_num) - \brief Get NAND status. - \param[in] dev_num Device number - \return NAND status \ref ARM_NAND_STATUS -*/ -/** - \fn int32_t ARM_NAND_InquireECC (int32_t index, ARM_NAND_ECC_INFO *info) - \brief Inquire about available ECC. - \param[in] index Device number - \param[out] info Pointer to ECC information \ref ARM_NAND_ECC_INFO retrieved - \return \ref execution_status -*/ - -/** - \fn void ARM_NAND_SignalEvent (uint32_t dev_num, uint32_t event) - \brief Signal NAND event. - \param[in] dev_num Device number - \param[in] event Event notification mask - \return none -*/ - -typedef void (*ARM_NAND_SignalEvent_t) (uint32_t dev_num, uint32_t event); ///< Pointer to \ref ARM_NAND_SignalEvent : Signal NAND Event. - - -/** -\brief NAND Driver Capabilities. -*/ -typedef struct _ARM_NAND_CAPABILITIES { - uint32_t event_device_ready : 1; ///< Signal Device Ready event (R/Bn rising edge) - uint32_t reentrant_operation : 1; ///< Supports re-entrant operation (SendCommand/Address, Read/WriteData) - uint32_t sequence_operation : 1; ///< Supports Sequence operation (ExecuteSequence, AbortSequence) - uint32_t vcc : 1; ///< Supports VCC Power Supply Control - uint32_t vcc_1v8 : 1; ///< Supports 1.8 VCC Power Supply - uint32_t vccq : 1; ///< Supports VCCQ I/O Power Supply Control - uint32_t vccq_1v8 : 1; ///< Supports 1.8 VCCQ I/O Power Supply - uint32_t vpp : 1; ///< Supports VPP High Voltage Power Supply Control - uint32_t wp : 1; ///< Supports WPn (Write Protect) Control - uint32_t ce_lines : 4; ///< Number of CEn (Chip Enable) lines: ce_lines + 1 - uint32_t ce_manual : 1; ///< Supports manual CEn (Chip Enable) Control - uint32_t rb_monitor : 1; ///< Supports R/Bn (Ready/Busy) Monitoring - uint32_t data_width_16 : 1; ///< Supports 16-bit data - uint32_t ddr : 1; ///< Supports NV-DDR Data Interface (ONFI) - uint32_t ddr2 : 1; ///< Supports NV-DDR2 Data Interface (ONFI) - uint32_t sdr_timing_mode : 3; ///< Fastest (highest) SDR Timing Mode supported (ONFI) - uint32_t ddr_timing_mode : 3; ///< Fastest (highest) NV_DDR Timing Mode supported (ONFI) - uint32_t ddr2_timing_mode : 3; ///< Fastest (highest) NV_DDR2 Timing Mode supported (ONFI) - uint32_t driver_strength_18 : 1; ///< Supports Driver Strength 2.0x = 18 Ohms - uint32_t driver_strength_25 : 1; ///< Supports Driver Strength 1.4x = 25 Ohms - uint32_t driver_strength_50 : 1; ///< Supports Driver Strength 0.7x = 50 Ohms -} ARM_NAND_CAPABILITIES; - - -/** -\brief Access structure of the NAND Driver. -*/ -typedef struct _ARM_DRIVER_NAND { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_NAND_GetVersion : Get driver version. - ARM_NAND_CAPABILITIES (*GetCapabilities)(void); ///< Pointer to \ref ARM_NAND_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_NAND_SignalEvent_t cb_event); ///< Pointer to \ref ARM_NAND_Initialize : Initialize NAND Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_NAND_Uninitialize : De-initialize NAND Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_NAND_PowerControl : Control NAND Interface Power. - int32_t (*DevicePower) (uint32_t voltage); ///< Pointer to \ref ARM_NAND_DevicePower : Set device power supply voltage. - int32_t (*WriteProtect) (uint32_t dev_num, bool enable); ///< Pointer to \ref ARM_NAND_WriteProtect : Control WPn (Write Protect). - int32_t (*ChipEnable) (uint32_t dev_num, bool enable); ///< Pointer to \ref ARM_NAND_ChipEnable : Control CEn (Chip Enable). - int32_t (*GetDeviceBusy) (uint32_t dev_num); ///< Pointer to \ref ARM_NAND_GetDeviceBusy : Get Device Busy pin state. - int32_t (*SendCommand) (uint32_t dev_num, uint8_t cmd); ///< Pointer to \ref ARM_NAND_SendCommand : Send command to NAND device. - int32_t (*SendAddress) (uint32_t dev_num, uint8_t addr); ///< Pointer to \ref ARM_NAND_SendAddress : Send address to NAND device. - int32_t (*ReadData) (uint32_t dev_num, void *data, uint32_t cnt, uint32_t mode); ///< Pointer to \ref ARM_NAND_ReadData : Read data from NAND device. - int32_t (*WriteData) (uint32_t dev_num, const void *data, uint32_t cnt, uint32_t mode); ///< Pointer to \ref ARM_NAND_WriteData : Write data to NAND device. - int32_t (*ExecuteSequence)(uint32_t dev_num, uint32_t code, uint32_t cmd, - uint32_t addr_col, uint32_t addr_row, - void *data, uint32_t data_cnt, - uint8_t *status, uint32_t *count); ///< Pointer to \ref ARM_NAND_ExecuteSequence : Execute sequence of operations. - int32_t (*AbortSequence) (uint32_t dev_num); ///< Pointer to \ref ARM_NAND_AbortSequence : Abort sequence execution. - int32_t (*Control) (uint32_t dev_num, uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_NAND_Control : Control NAND Interface. - ARM_NAND_STATUS (*GetStatus) (uint32_t dev_num); ///< Pointer to \ref ARM_NAND_GetStatus : Get NAND status. - int32_t (*InquireECC) ( int32_t index, ARM_NAND_ECC_INFO *info); ///< Pointer to \ref ARM_NAND_InquireECC : Inquire about available ECC. -} const ARM_DRIVER_NAND; - -#endif /* __DRIVER_NAND_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_USB.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_USB.h deleted file mode 100644 index 7f51a2ad2..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_USB.h +++ /dev/null @@ -1,95 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2014 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 20. May 2014 - * $Revision: V2.00 - * - * Project: USB Driver common definitions - * -------------------------------------------------------------------------- */ - -/* History: - * Version 2.00 - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.01 - * Added PID Types - * Version 1.00 - * Initial release - */ - -#ifndef __DRIVER_USB_H -#define __DRIVER_USB_H - -#include "Driver_Common.h" - -/* USB Role */ -#define ARM_USB_ROLE_NONE 0 -#define ARM_USB_ROLE_HOST 1 -#define ARM_USB_ROLE_DEVICE 2 - -/* USB Pins */ -#define ARM_USB_PIN_DP (1 << 0) ///< USB D+ pin -#define ARM_USB_PIN_DM (1 << 1) ///< USB D- pin -#define ARM_USB_PIN_VBUS (1 << 2) ///< USB VBUS pin -#define ARM_USB_PIN_OC (1 << 3) ///< USB OverCurrent pin -#define ARM_USB_PIN_ID (1 << 4) ///< USB ID pin - -/* USB Speed */ -#define ARM_USB_SPEED_LOW 0 ///< Low-speed USB -#define ARM_USB_SPEED_FULL 1 ///< Full-speed USB -#define ARM_USB_SPEED_HIGH 2 ///< High-speed USB - -/* USB PID Types */ -#define ARM_USB_PID_OUT 1 -#define ARM_USB_PID_IN 9 -#define ARM_USB_PID_SOF 5 -#define ARM_USB_PID_SETUP 13 -#define ARM_USB_PID_DATA0 3 -#define ARM_USB_PID_DATA1 11 -#define ARM_USB_PID_DATA2 7 -#define ARM_USB_PID_MDATA 15 -#define ARM_USB_PID_ACK 2 -#define ARM_USB_PID_NAK 10 -#define ARM_USB_PID_STALL 14 -#define ARM_USB_PID_NYET 6 -#define ARM_USB_PID_PRE 12 -#define ARM_USB_PID_ERR 12 -#define ARM_USB_PID_SPLIT 8 -#define ARM_USB_PID_PING 4 -#define ARM_USB_PID_RESERVED 0 - -/* USB Endpoint Address (bEndpointAddress) */ -#define ARM_USB_ENDPOINT_NUMBER_MASK 0x0F -#define ARM_USB_ENDPOINT_DIRECTION_MASK 0x80 - -/* USB Endpoint Type */ -#define ARM_USB_ENDPOINT_CONTROL 0 ///< Control Endpoint -#define ARM_USB_ENDPOINT_ISOCHRONOUS 1 ///< Isochronous Endpoint -#define ARM_USB_ENDPOINT_BULK 2 ///< Bulk Endpoint -#define ARM_USB_ENDPOINT_INTERRUPT 3 ///< Interrupt Endpoint - -/* USB Endpoint Maximum Packet Size (wMaxPacketSize) */ -#define ARM_USB_ENDPOINT_MAX_PACKET_SIZE_MASK 0x07FF -#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_MASK 0x1800 -#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_1 0x0000 -#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_2 0x0800 -#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_3 0x1000 - -#endif /* __DRIVER_USB_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_USBD.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_USBD.h deleted file mode 100644 index c470bb57b..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_USBD.h +++ /dev/null @@ -1,263 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2014 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 3. Jun 2014 - * $Revision: V2.01 - * - * Project: USB Device Driver definitions - * -------------------------------------------------------------------------- */ - -/* History: - * Version 2.01 - * Added ARM_USBD_ReadSetupPacket function - * Version 2.00 - * Removed ARM_USBD_DeviceConfigure function - * Removed ARM_USBD_SET_ADDRESS_STAGE parameter from ARM_USBD_DeviceSetAddress function - * Removed ARM_USBD_EndpointReadStart function - * Replaced ARM_USBD_EndpointRead and ARM_USBD_EndpointWrite functions with ARM_USBD_EndpointTransfer - * Added ARM_USBD_EndpointTransferGetResult function - * Renamed ARM_USBD_EndpointAbort function to ARM_USBD_EndpointTransferAbort - * Changed prefix ARM_DRV -> ARM_DRIVER - * Changed return values of some functions to int32_t - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef __DRIVER_USBD_H -#define __DRIVER_USBD_H - -#include "Driver_USB.h" - -#define ARM_USBD_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,01) /* API version */ - - -/** -\brief USB Device State -*/ -typedef struct _ARM_USBD_STATE { - uint32_t vbus : 1; ///< USB Device VBUS flag - uint32_t speed : 2; ///< USB Device speed setting (ARM_USB_SPEED_xxx) - uint32_t active : 1; ///< USB Device active flag -} ARM_USBD_STATE; - - -/****** USB Device Event *****/ -#define ARM_USBD_EVENT_VBUS_ON (1UL << 0) ///< USB Device VBUS On -#define ARM_USBD_EVENT_VBUS_OFF (1UL << 1) ///< USB Device VBUS Off -#define ARM_USBD_EVENT_RESET (1UL << 2) ///< USB Reset occurred -#define ARM_USBD_EVENT_HIGH_SPEED (1UL << 3) ///< USB switch to High Speed occurred -#define ARM_USBD_EVENT_SUSPEND (1UL << 4) ///< USB Suspend occurred -#define ARM_USBD_EVENT_RESUME (1UL << 5) ///< USB Resume occurred - -/****** USB Endpoint Event *****/ -#define ARM_USBD_EVENT_SETUP (1UL << 0) ///< SETUP Packet -#define ARM_USBD_EVENT_OUT (1UL << 1) ///< OUT Packet(s) -#define ARM_USBD_EVENT_IN (1UL << 2) ///< IN Packet(s) - - -#ifndef __DOXYGEN_MW__ // exclude from middleware documentation - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_USBD_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_USBD_CAPABILITIES ARM_USBD_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_USBD_CAPABILITIES -*/ -/** - \fn int32_t ARM_USBD_Initialize (ARM_USBD_SignalDeviceEvent_t cb_device_event, - ARM_USBD_SignalEndpointEvent_t cb_endpoint_event) - \brief Initialize USB Device Interface. - \param[in] cb_device_event Pointer to \ref ARM_USBD_SignalDeviceEvent - \param[in] cb_endpoint_event Pointer to \ref ARM_USBD_SignalEndpointEvent - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_Uninitialize (void) - \brief De-initialize USB Device Interface. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_PowerControl (ARM_POWER_STATE state) - \brief Control USB Device Interface Power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_DeviceConnect (void) - \brief Connect USB Device. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_DeviceDisconnect (void) - \brief Disconnect USB Device. - \return \ref execution_status -*/ -/** - \fn ARM_USBD_STATE ARM_USBD_DeviceGetState (void) - \brief Get current USB Device State. - \return Device State \ref ARM_USBD_STATE -*/ -/** - \fn int32_t ARM_USBD_DeviceRemoteWakeup (void) - \brief Trigger USB Remote Wakeup. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_DeviceSetAddress (uint8_t dev_addr) - \brief Set USB Device Address. - \param[in] dev_addr Device Address - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_ReadSetupPacket (uint8_t *setup) - \brief Read setup packet received over Control Endpoint. - \param[out] setup Pointer to buffer for setup packet - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_EndpointConfigure (uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size) - \brief Configure USB Endpoint. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \param[in] ep_type Endpoint Type (ARM_USB_ENDPOINT_xxx) - \param[in] ep_max_packet_size Endpoint Maximum Packet Size - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_EndpointUnconfigure (uint8_t ep_addr) - \brief Unconfigure USB Endpoint. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_EndpointStall (uint8_t ep_addr, bool stall) - \brief Set/Clear Stall for USB Endpoint. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \param[in] stall Operation - - \b false Clear - - \b true Set - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_EndpointTransfer (uint8_t ep_addr, uint8_t *data, uint32_t num) - \brief Read data from or Write data to USB Endpoint. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \param[out] data Pointer to buffer for data to read or with data to write - \param[in] num Number of data bytes to transfer - \return \ref execution_status -*/ -/** - \fn uint32_t ARM_USBD_EndpointTransferGetResult (uint8_t ep_addr) - \brief Get result of USB Endpoint transfer. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \return number of successfully transferred data bytes -*/ -/** - \fn int32_t ARM_USBD_EndpointTransferAbort (uint8_t ep_addr) - \brief Abort current USB Endpoint transfer. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \return \ref execution_status -*/ -/** - \fn uint16_t ARM_USBD_GetFrameNumber (void) - \brief Get current USB Frame Number. - \return Frame Number -*/ - -/** - \fn void ARM_USBD_SignalDeviceEvent (uint32_t event) - \brief Signal USB Device Event. - \param[in] event \ref USBD_dev_events - \return none -*/ -/** - \fn void ARM_USBD_SignalEndpointEvent (uint8_t ep_addr, uint32_t event) - \brief Signal USB Endpoint Event. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \param[in] event \ref USBD_ep_events - \return none -*/ - -typedef void (*ARM_USBD_SignalDeviceEvent_t) (uint32_t event); ///< Pointer to \ref ARM_USBD_SignalDeviceEvent : Signal USB Device Event. -typedef void (*ARM_USBD_SignalEndpointEvent_t) (uint8_t ep_addr, uint32_t event); ///< Pointer to \ref ARM_USBD_SignalEndpointEvent : Signal USB Endpoint Event. - - -/** -\brief USB Device Driver Capabilities. -*/ -typedef struct _ARM_USBD_CAPABILITIES { - uint32_t vbus_detection : 1; ///< VBUS detection - uint32_t event_vbus_on : 1; ///< Signal VBUS On event - uint32_t event_vbus_off : 1; ///< Signal VBUS Off event -} ARM_USBD_CAPABILITIES; - - -/** -\brief Access structure of the USB Device Driver. -*/ -typedef struct _ARM_DRIVER_USBD { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_USBD_GetVersion : Get driver version. - ARM_USBD_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_USBD_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_USBD_SignalDeviceEvent_t cb_device_event, - ARM_USBD_SignalEndpointEvent_t cb_endpoint_event); ///< Pointer to \ref ARM_USBD_Initialize : Initialize USB Device Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_USBD_Uninitialize : De-initialize USB Device Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_USBD_PowerControl : Control USB Device Interface Power. - int32_t (*DeviceConnect) (void); ///< Pointer to \ref ARM_USBD_DeviceConnect : Connect USB Device. - int32_t (*DeviceDisconnect) (void); ///< Pointer to \ref ARM_USBD_DeviceDisconnect : Disconnect USB Device. - ARM_USBD_STATE (*DeviceGetState) (void); ///< Pointer to \ref ARM_USBD_DeviceGetState : Get current USB Device State. - int32_t (*DeviceRemoteWakeup) (void); ///< Pointer to \ref ARM_USBD_DeviceRemoteWakeup : Trigger USB Remote Wakeup. - int32_t (*DeviceSetAddress) (uint8_t dev_addr); ///< Pointer to \ref ARM_USBD_DeviceSetAddress : Set USB Device Address. - int32_t (*ReadSetupPacket) (uint8_t *setup); ///< Pointer to \ref ARM_USBD_ReadSetupPacket : Read setup packet received over Control Endpoint. - int32_t (*EndpointConfigure) (uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size); ///< Pointer to \ref ARM_USBD_EndpointConfigure : Configure USB Endpoint. - int32_t (*EndpointUnconfigure) (uint8_t ep_addr); ///< Pointer to \ref ARM_USBD_EndpointUnconfigure : Unconfigure USB Endpoint. - int32_t (*EndpointStall) (uint8_t ep_addr, bool stall); ///< Pointer to \ref ARM_USBD_EndpointStall : Set/Clear Stall for USB Endpoint. - int32_t (*EndpointTransfer) (uint8_t ep_addr, uint8_t *data, uint32_t num); ///< Pointer to \ref ARM_USBD_EndpointTransfer : Read data from or Write data to USB Endpoint. - uint32_t (*EndpointTransferGetResult) (uint8_t ep_addr); ///< Pointer to \ref ARM_USBD_EndpointTransferGetResult : Get result of USB Endpoint transfer. - int32_t (*EndpointTransferAbort) (uint8_t ep_addr); ///< Pointer to \ref ARM_USBD_EndpointTransferAbort : Abort current USB Endpoint transfer. - uint16_t (*GetFrameNumber) (void); ///< Pointer to \ref ARM_USBD_GetFrameNumber : Get current USB Frame Number. -} const ARM_DRIVER_USBD; - -#endif /* __DOXYGEN_MW__ */ - -#endif /* __DRIVER_USBD_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_USBH.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_USBH.h deleted file mode 100644 index 4e02d8c54..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/Include/Driver_USBH.h +++ /dev/null @@ -1,406 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2014 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 3. September 2014 - * $Revision: V2.01 - * - * Project: USB Host Driver definitions - * -------------------------------------------------------------------------- */ - -/* History: - * Version 2.01 - * Renamed structure ARM_USBH_EP_HANDLE to ARM_USBH_PIPE_HANDLE - * Renamed functions ARM_USBH_Endpoint... to ARM_USBH_Pipe... - * Renamed function ARM_USBH_SignalEndpointEvent to ARM_USBH_SignalPipeEvent - * Version 2.00 - * Replaced function ARM_USBH_PortPowerOnOff with ARM_USBH_PortVbusOnOff - * Changed function ARM_USBH_EndpointCreate parameters - * Replaced function ARM_USBH_EndpointConfigure with ARM_USBH_EndpointModify - * Replaced function ARM_USBH_EndpointClearHalt with ARM_USBH_EndpointReset - * Replaced function ARM_USBH_URB_Submit with ARM_USBH_EndpointTransfer - * Replaced function ARM_USBH_URB_Abort with ARM_USBH_EndpointTransferAbort - * Added function ARM_USBH_EndpointTransferGetResult - * Added function ARM_USBH_GetFrameNumber - * Changed prefix ARM_DRV -> ARM_DRIVER - * Version 1.20 - * Added API for OHCI/EHCI Host Controller Interface (HCI) - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef __DRIVER_USBH_H -#define __DRIVER_USBH_H - -#include "Driver_USB.h" - -#define ARM_USBH_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,01) /* API version */ - - -/** -\brief USB Host Port State -*/ -typedef struct _ARM_USBH_PORT_STATE { - uint32_t connected : 1; ///< USB Host Port connected flag - uint32_t overcurrent : 1; ///< USB Host Port overcurrent flag - uint32_t speed : 2; ///< USB Host Port speed setting (ARM_USB_SPEED_xxx) -} ARM_USBH_PORT_STATE; - -/** -\brief USB Host Pipe Handle -*/ -typedef uint32_t ARM_USBH_PIPE_HANDLE; -#define ARM_USBH_EP_HANDLE ARM_USBH_PIPE_HANDLE /* Legacy name */ - - -/****** USB Host Packet Information *****/ -#define ARM_USBH_PACKET_TOKEN_Pos 0 -#define ARM_USBH_PACKET_TOKEN_Msk (0x0FUL << ARM_USBH_PACKET_TOKEN_Pos) -#define ARM_USBH_PACKET_SETUP (0x01UL << ARM_USBH_PACKET_TOKEN_Pos) ///< SETUP Packet -#define ARM_USBH_PACKET_OUT (0x02UL << ARM_USBH_PACKET_TOKEN_Pos) ///< OUT Packet -#define ARM_USBH_PACKET_IN (0x03UL << ARM_USBH_PACKET_TOKEN_Pos) ///< IN Packet -#define ARM_USBH_PACKET_PING (0x04UL << ARM_USBH_PACKET_TOKEN_Pos) ///< PING Packet - -#define ARM_USBH_PACKET_DATA_Pos 4 -#define ARM_USBH_PACKET_DATA_Msk (0x0FUL << ARM_USBH_PACKET_DATA_Pos) -#define ARM_USBH_PACKET_DATA0 (0x01UL << ARM_USBH_PACKET_DATA_Pos) ///< DATA0 PID -#define ARM_USBH_PACKET_DATA1 (0x02UL << ARM_USBH_PACKET_DATA_Pos) ///< DATA1 PID - -#define ARM_USBH_PACKET_SPLIT_Pos 8 -#define ARM_USBH_PACKET_SPLIT_Msk (0x0FUL << ARM_USBH_PACKET_SPLIT_Pos) -#define ARM_USBH_PACKET_SSPLIT (0x08UL << ARM_USBH_PACKET_SPLIT_Pos) ///< SSPLIT Packet -#define ARM_USBH_PACKET_SSPLIT_S (0x09UL << ARM_USBH_PACKET_SPLIT_Pos) ///< SSPLIT Packet: Data Start -#define ARM_USBH_PACKET_SSPLIT_E (0x0AUL << ARM_USBH_PACKET_SPLIT_Pos) ///< SSPLIT Packet: Data End -#define ARM_USBH_PACKET_SSPLIT_S_E (0x0BUL << ARM_USBH_PACKET_SPLIT_Pos) ///< SSPLIT Packet: Data All -#define ARM_USBH_PACKET_CSPLIT (0x0CUL << ARM_USBH_PACKET_SPLIT_Pos) ///< CSPLIT Packet - -#define ARM_USBH_PACKET_PRE (1UL << 12) ///< PRE Token - - -/****** USB Host Port Event *****/ -#define ARM_USBH_EVENT_CONNECT (1UL << 0) ///< USB Device Connected to Port -#define ARM_USBH_EVENT_DISCONNECT (1UL << 1) ///< USB Device Disconnected from Port -#define ARM_USBH_EVENT_OVERCURRENT (1UL << 2) ///< USB Device caused Overcurrent -#define ARM_USBH_EVENT_RESET (1UL << 3) ///< USB Reset completed -#define ARM_USBH_EVENT_SUSPEND (1UL << 4) ///< USB Suspend occurred -#define ARM_USBH_EVENT_RESUME (1UL << 5) ///< USB Resume occurred -#define ARM_USBH_EVENT_REMOTE_WAKEUP (1UL << 6) ///< USB Device activated Remote Wakeup - -/****** USB Host Pipe Event *****/ -#define ARM_USBH_EVENT_TRANSFER_COMPLETE (1UL << 0) ///< Transfer completed -#define ARM_USBH_EVENT_HANDSHAKE_NAK (1UL << 1) ///< NAK Handshake received -#define ARM_USBH_EVENT_HANDSHAKE_NYET (1UL << 2) ///< NYET Handshake received -#define ARM_USBH_EVENT_HANDSHAKE_MDATA (1UL << 3) ///< MDATA Handshake received -#define ARM_USBH_EVENT_HANDSHAKE_STALL (1UL << 4) ///< STALL Handshake received -#define ARM_USBH_EVENT_HANDSHAKE_ERR (1UL << 5) ///< ERR Handshake received -#define ARM_USBH_EVENT_BUS_ERROR (1UL << 6) ///< Bus Error detected - - -#ifndef __DOXYGEN_MW__ // exclude from middleware documentation - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_USBH_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_USBH_CAPABILITIES ARM_USBH_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_USBH_CAPABILITIES -*/ -/** - \fn int32_t ARM_USBH_Initialize (ARM_USBH_SignalPortEvent_t cb_port_event, - ARM_USBH_SignalPipeEvent_t cb_pipe_event) - \brief Initialize USB Host Interface. - \param[in] cb_port_event Pointer to \ref ARM_USBH_SignalPortEvent - \param[in] cb_pipe_event Pointer to \ref ARM_USBH_SignalPipeEvent - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_Uninitialize (void) - \brief De-initialize USB Host Interface. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PowerControl (ARM_POWER_STATE state) - \brief Control USB Host Interface Power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PortVbusOnOff (uint8_t port, bool vbus) - \brief Root HUB Port VBUS on/off. - \param[in] port Root HUB Port Number - \param[in] vbus - - \b false VBUS off - - \b true VBUS on - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PortReset (uint8_t port) - \brief Do Root HUB Port Reset. - \param[in] port Root HUB Port Number - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PortSuspend (uint8_t port) - \brief Suspend Root HUB Port (stop generating SOFs). - \param[in] port Root HUB Port Number - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PortResume (uint8_t port) - \brief Resume Root HUB Port (start generating SOFs). - \param[in] port Root HUB Port Number - \return \ref execution_status -*/ -/** - \fn ARM_USBH_PORT_STATE ARM_USBH_PortGetState (uint8_t port) - \brief Get current Root HUB Port State. - \param[in] port Root HUB Port Number - \return Port State \ref ARM_USBH_PORT_STATE -*/ -/** - \fn ARM_USBH_PIPE_HANDLE ARM_USBH_PipeCreate (uint8_t dev_addr, - uint8_t dev_speed, - uint8_t hub_addr, - uint8_t hub_port, - uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size, - uint8_t ep_interval) - \brief Create Pipe in System. - \param[in] dev_addr Device Address - \param[in] dev_speed Device Speed - \param[in] hub_addr Hub Address - \param[in] hub_port Hub Port - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \param[in] ep_type Endpoint Type (ARM_USB_ENDPOINT_xxx) - \param[in] ep_max_packet_size Endpoint Maximum Packet Size - \param[in] ep_interval Endpoint Polling Interval - \return Pipe Handle \ref ARM_USBH_PIPE_HANDLE -*/ -/** - \fn int32_t ARM_USBH_PipeModify (ARM_USBH_PIPE_HANDLE pipe_hndl, - uint8_t dev_addr, - uint8_t dev_speed, - uint8_t hub_addr, - uint8_t hub_port, - uint16_t ep_max_packet_size) - \brief Modify Pipe in System. - \param[in] pipe_hndl Pipe Handle - \param[in] dev_addr Device Address - \param[in] dev_speed Device Speed - \param[in] hub_addr Hub Address - \param[in] hub_port Hub Port - \param[in] ep_max_packet_size Endpoint Maximum Packet Size - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PipeDelete (ARM_USBH_PIPE_HANDLE pipe_hndl) - \brief Delete Pipe from System. - \param[in] pipe_hndl Pipe Handle - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PipeReset (ARM_USBH_PIPE_HANDLE pipe_hndl) - \brief Reset Pipe. - \param[in] pipe_hndl Pipe Handle - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PipeTransfer (ARM_USBH_PIPE_HANDLE pipe_hndl, - uint32_t packet, - uint8_t *data, - uint32_t num) - \brief Transfer packets through USB Pipe. - \param[in] pipe_hndl Pipe Handle - \param[in] packet Packet information - \param[in] data Pointer to buffer with data to send or for data to receive - \param[in] num Number of data bytes to transfer - \return \ref execution_status -*/ -/** - \fn uint32_t ARM_USBH_PipeTransferGetResult (ARM_USBH_PIPE_HANDLE pipe_hndl) - \brief Get result of USB Pipe transfer. - \param[in] pipe_hndl Pipe Handle - \return number of successfully transferred data bytes -*/ -/** - \fn int32_t ARM_USBH_PipeTransferAbort (ARM_USBH_PIPE_HANDLE pipe_hndl) - \brief Abort current USB Pipe transfer. - \param[in] pipe_hndl Pipe Handle - \return \ref execution_status -*/ -/** - \fn uint16_t ARM_USBH_GetFrameNumber (void) - \brief Get current USB Frame Number. - \return Frame Number -*/ - -/** - \fn void ARM_USBH_SignalPortEvent (uint8_t port, uint32_t event) - \brief Signal Root HUB Port Event. - \param[in] port Root HUB Port Number - \param[in] event \ref USBH_port_events - \return none -*/ -/** - \fn void ARM_USBH_SignalPipeEvent (ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t event) - \brief Signal Pipe Event. - \param[in] pipe_hndl Pipe Handle - \param[in] event \ref USBH_pipe_events - \return none -*/ - -typedef void (*ARM_USBH_SignalPortEvent_t) (uint8_t port, uint32_t event); ///< Pointer to \ref ARM_USBH_SignalPortEvent : Signal Root HUB Port Event. -typedef void (*ARM_USBH_SignalPipeEvent_t) (ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t event); ///< Pointer to \ref ARM_USBH_SignalPipeEvent : Signal Pipe Event. -#define ARM_USBH_SignalEndpointEvent_t ARM_USBH_SignalPipeEvent_t /* Legacy name */ - - -/** -\brief USB Host Driver Capabilities. -*/ -typedef struct _ARM_USBH_CAPABILITIES { - uint32_t port_mask : 15; ///< Root HUB available Ports Mask - uint32_t auto_split : 1; ///< Automatic SPLIT packet handling - uint32_t event_connect : 1; ///< Signal Connect event - uint32_t event_disconnect : 1; ///< Signal Disconnect event - uint32_t event_overcurrent : 1; ///< Signal Overcurrent event -} ARM_USBH_CAPABILITIES; - - -/** -\brief Access structure of USB Host Driver. -*/ -typedef struct _ARM_DRIVER_USBH { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_USBH_GetVersion : Get driver version. - ARM_USBH_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_USBH_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_USBH_SignalPortEvent_t cb_port_event, - ARM_USBH_SignalPipeEvent_t cb_pipe_event); ///< Pointer to \ref ARM_USBH_Initialize : Initialize USB Host Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_USBH_Uninitialize : De-initialize USB Host Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_USBH_PowerControl : Control USB Host Interface Power. - int32_t (*PortVbusOnOff) (uint8_t port, bool vbus); ///< Pointer to \ref ARM_USBH_PortVbusOnOff : Root HUB Port VBUS on/off. - int32_t (*PortReset) (uint8_t port); ///< Pointer to \ref ARM_USBH_PortReset : Do Root HUB Port Reset. - int32_t (*PortSuspend) (uint8_t port); ///< Pointer to \ref ARM_USBH_PortSuspend : Suspend Root HUB Port (stop generating SOFs). - int32_t (*PortResume) (uint8_t port); ///< Pointer to \ref ARM_USBH_PortResume : Resume Root HUB Port (start generating SOFs). - ARM_USBH_PORT_STATE (*PortGetState) (uint8_t port); ///< Pointer to \ref ARM_USBH_PortGetState : Get current Root HUB Port State. - ARM_USBH_PIPE_HANDLE (*PipeCreate) (uint8_t dev_addr, - uint8_t dev_speed, - uint8_t hub_addr, - uint8_t hub_port, - uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size, - uint8_t ep_interval); ///< Pointer to \ref ARM_USBH_PipeCreate : Create Pipe in System. - int32_t (*PipeModify) (ARM_USBH_PIPE_HANDLE pipe_hndl, - uint8_t dev_addr, - uint8_t dev_speed, - uint8_t hub_addr, - uint8_t hub_port, - uint16_t ep_max_packet_size); ///< Pointer to \ref ARM_USBH_PipeModify : Modify Pipe in System. - int32_t (*PipeDelete) (ARM_USBH_PIPE_HANDLE pipe_hndl); ///< Pointer to \ref ARM_USBH_PipeDelete : Delete Pipe from System. - int32_t (*PipeReset) (ARM_USBH_PIPE_HANDLE pipe_hndl); ///< Pointer to \ref ARM_USBH_PipeReset : Reset Pipe. - int32_t (*PipeTransfer) (ARM_USBH_PIPE_HANDLE pipe_hndl, - uint32_t packet, - uint8_t *data, - uint32_t num); ///< Pointer to \ref ARM_USBH_PipeTransfer : Transfer packets through USB Pipe. - uint32_t (*PipeTransferGetResult) (ARM_USBH_PIPE_HANDLE pipe_hndl); ///< Pointer to \ref ARM_USBH_PipeTransferGetResult : Get result of USB Pipe transfer. - int32_t (*PipeTransferAbort) (ARM_USBH_PIPE_HANDLE pipe_hndl); ///< Pointer to \ref ARM_USBH_PipeTransferAbort : Abort current USB Pipe transfer. - uint16_t (*GetFrameNumber) (void); ///< Pointer to \ref ARM_USBH_GetFrameNumber : Get current USB Frame Number. -} const ARM_DRIVER_USBH; - - -// HCI (OHCI/EHCI) - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_USBH_HCI_GetVersion (void) - \brief Get USB Host HCI (OHCI/EHCI) driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_USBH_HCI_CAPABILITIES ARM_USBH_HCI_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_USBH_HCI_CAPABILITIES -*/ -/** - \fn int32_t ARM_USBH_HCI_Initialize (ARM_USBH_HCI_Interrupt_t *cb_interrupt) - \brief Initialize USB Host HCI (OHCI/EHCI) Interface. - \param[in] cb_interrupt Pointer to Interrupt Handler Routine - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_HCI_Uninitialize (void) - \brief De-initialize USB Host HCI (OHCI/EHCI) Interface. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_HCI_PowerControl (ARM_POWER_STATE state) - \brief Control USB Host HCI (OHCI/EHCI) Interface Power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_HCI_PortVbusOnOff (uint8_t port, bool vbus) - \brief USB Host HCI (OHCI/EHCI) Root HUB Port VBUS on/off. - \param[in] port Root HUB Port Number - \param[in] vbus - - \b false VBUS off - - \b true VBUS on - \return \ref execution_status -*/ - -/** - \fn void ARM_USBH_HCI_Interrupt (void) - \brief USB Host HCI Interrupt Handler. - \return none -*/ - -typedef void (*ARM_USBH_HCI_Interrupt_t) (void); ///< Pointer to Interrupt Handler Routine. - - -/** -\brief USB Host HCI (OHCI/EHCI) Driver Capabilities. -*/ -typedef struct _ARM_USBH_HCI_CAPABILITIES { - uint32_t port_mask : 15; ///< Root HUB available Ports Mask -} ARM_USBH_HCI_CAPABILITIES; - - -/** - \brief Access structure of USB Host HCI (OHCI/EHCI) Driver. -*/ -typedef struct _ARM_DRIVER_USBH_HCI { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_USBH_HCI_GetVersion : Get USB Host HCI (OHCI/EHCI) driver version. - ARM_USBH_HCI_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_USBH_HCI_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_USBH_HCI_Interrupt_t cb_interrupt); ///< Pointer to \ref ARM_USBH_HCI_Initialize : Initialize USB Host HCI (OHCI/EHCI) Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_USBH_HCI_Uninitialize : De-initialize USB Host HCI (OHCI/EHCI) Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_USBH_HCI_PowerControl : Control USB Host HCI (OHCI/EHCI) Interface Power. - int32_t (*PortVbusOnOff) (uint8_t port, bool vbus); ///< Pointer to \ref ARM_USBH_HCI_PortVbusOnOff : USB Host HCI (OHCI/EHCI) Root HUB Port VBUS on/off. -} const ARM_DRIVER_USBH_HCI; - -#endif /* __DOXYGEN_MW__ */ - -#endif /* __DRIVER_USBH_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_can_driver.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_can_driver.slcc deleted file mode 100644 index d84d60526..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_can_driver.slcc +++ /dev/null @@ -1,16 +0,0 @@ -id: cmsis_can_driver -label: CMSIS CAN DRIVER -package: platform -description: > - CMSIS CAN Driver include path -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver" -include: - - path: "Include" - file_list: - - path: "Driver_CAN.h" -provides: - - name: cmsis_can_driver \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_eth_driver.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_eth_driver.slcc deleted file mode 100644 index 0c4fc0a12..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_eth_driver.slcc +++ /dev/null @@ -1,16 +0,0 @@ -id: cmsis_eth_driver -label: CMSIS ETH DRIVER -package: platform -description: > - CMSIS ETH Driver include path -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver" -include: - - path: "Include" - file_list: - - path: "Driver_ETH.h" -provides: - - name: cmsis_eth_driver \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_eth_mac_driver.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_eth_mac_driver.slcc deleted file mode 100644 index de5ce6a44..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_eth_mac_driver.slcc +++ /dev/null @@ -1,16 +0,0 @@ -id: cmsis_eth_mac_driver -label: CMSIS ETH MAC DRIVER -package: platform -description: > - CMSIS ETH MAC Driver include path -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver" -include: - - path: "Include" - file_list: - - path: "Driver_ETH_MAC.h" -provides: - - name: cmsis_eth_mac_driver \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_eth_phy_driver.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_eth_phy_driver.slcc deleted file mode 100644 index 7465db3bc..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_eth_phy_driver.slcc +++ /dev/null @@ -1,16 +0,0 @@ -id: cmsis_eth_phy_driver -label: CMSIS ETH PHY DRIVER -package: platform -description: > - CMSIS ETH PHY Driver include path -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver" -include: - - path: "Include" - file_list: - - path: "Driver_ETH_PHY.h" -provides: - - name: cmsis_eth_phy_driver \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_mci_driver.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_mci_driver.slcc deleted file mode 100644 index d39861fd6..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_mci_driver.slcc +++ /dev/null @@ -1,16 +0,0 @@ -id: cmsis_mci_driver -label: CMSIS MCI DRIVER -package: platform -description: > - CMSIS MCI Driver include path -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver" -include: - - path: "Include" - file_list: - - path: "Driver_MCI.h" -provides: - - name: cmsis_mci_driver \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_nand_driver.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_nand_driver.slcc deleted file mode 100644 index ba5df4110..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_nand_driver.slcc +++ /dev/null @@ -1,16 +0,0 @@ -id: cmsis_nand_driver -label: CMSIS NAND DRIVER -package: platform -description: > - CMSIS NAND Driver include path -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver" -include: - - path: "Include" - file_list: - - path: "Driver_NAND.h" -provides: - - name: cmsis_nand_driver \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_usb_driver.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_usb_driver.slcc deleted file mode 100644 index bcad1b8f0..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_usb_driver.slcc +++ /dev/null @@ -1,16 +0,0 @@ -id: cmsis_usb_driver -label: CMSIS USB DRIVER -package: platform -description: > - CMSIS USB Driver include path -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver" -include: - - path: "Include" - file_list: - - path: "Driver_USB.h" -provides: - - name: cmsis_usb_driver \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_usbd_driver.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_usbd_driver.slcc deleted file mode 100644 index 13ddfda69..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_usbd_driver.slcc +++ /dev/null @@ -1,16 +0,0 @@ -id: cmsis_usbd_driver -label: CMSIS USBD DRIVER -package: platform -description: > - CMSIS USBD Driver include path -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver" -include: - - path: "Include" - file_list: - - path: "Driver_USBD.h" -provides: - - name: cmsis_usbd_driver \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_usbh_driver.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_usbh_driver.slcc deleted file mode 100644 index 92756ade4..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver/component/cmsis_usbh_driver.slcc +++ /dev/null @@ -1,16 +0,0 @@ -id: cmsis_usbh_driver -label: CMSIS USBH DRIVER -package: platform -description: > - CMSIS USBH Driver include path -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/cmsis_driver/CMSIS/Driver" -include: - - path: "Include" - file_list: - - path: "Driver_USBH.h" -provides: - - name: cmsis_usbh_driver \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/EMAC.c b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/EMAC.c deleted file mode 100644 index 93f0691b0..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/EMAC.c +++ /dev/null @@ -1,1069 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 25. Dec 2018 - * $Revision: V1.0 - * - * Driver: Driver_ETH_MAC0 - * Configured: via RTE_Device.h configuration file - * Project: Ethernet Media Access (MAC) Driver for Silicon Labs MCU - * -------------------------------------------------------------------------- - * Use the following configuration settings in the middleware component - * to connect to this driver. - * - * Configuration Setting Value - * --------------------- ----- - * Connect to hardware via Driver_ETH_MAC# = 0 - * -------------------------------------------------------------------------- */ - -/* History: - * Version 1.0 - * Initial release - */ -#include "rsi_ccp_user_config.h" -#if defined(CHIP_9118) -/* Receive/transmit Checksum offload enable */ -#ifndef EMAC_CHECKSUM_OFFLOAD -#define EMAC_CHECKSUM_OFFLOAD 1 -#endif - -/* IEEE 1588 time stamping enable (PTP) */ -#ifndef EMAC_TIME_STAMP -#define EMAC_TIME_STAMP 0 -#endif - -#include "EMAC.h" - -#include "clock_update.h" -#include "RTE_Device.h" -#include "PHY_LAN8742A.h" -#define ARM_ETH_MAC_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) /* driver version */ - -/* Timeouts */ -#define PHY_TIMEOUT 2U /* PHY Register access timeout in ms */ - -/* ETH Memory Buffer configuration */ -#define NUM_RX_BUF 4U /* 0x1800 for Rx (4*1536=6K) */ -#define NUM_TX_BUF 2U /* 0x0C00 for Tx (2*1536=3K) */ -#define ETH_BUF_SIZE 1536U /* ETH Receive/Transmit buffer size */ -#define CLK_BIT (*(volatile uint32_t *)0x46000000) /* ETH clock enable register*/ -#define ETH_SPEED (*(volatile uint32_t *)0x46008040) /* ETH SPEED SELECTION*/ - -/* Interrupt Handler Prototype */ -void ETH_IRQHandler (void); - - -/* DMA RX Descriptor */ -typedef struct rx_desc { - uint32_t volatile Stat; - uint32_t Ctrl; - uint8_t const *Addr; - struct rx_desc *Next; -#if ((EMAC_CHECKSUM_OFFLOAD != 0) || (EMAC_TIME_STAMP != 0)) - uint32_t ExtStat; - uint32_t Reserved[1]; - uint32_t TimeLo; - uint32_t TimeHi; -#endif -} RX_Desc; - -/* DMA TX Descriptor */ -typedef struct tx_desc { - uint32_t volatile CtrlStat; - uint32_t Size; - uint8_t const *Addr; - struct tx_desc *Next; -#if ((EMAC_CHECKSUM_OFFLOAD != 0) || (EMAC_TIME_STAMP != 0)) - uint32_t Reserved[2]; - uint32_t TimeLo; - uint32_t TimeHi; -#endif -} TX_Desc; - -/*Ethernet pin definations for RMII interface*/ -static const ETH_PIN_Config eth_pins[] = { - { RTE_ETH_RMII_TXD0_PORT , RTE_ETH_RMII_TXD0_PIN , RTE_ETH_RMII_TXD0_MODE , RTE_ETH_RMII_TXD0_PAD_SEL }, - { RTE_ETH_RMII_TXD1_PORT , RTE_ETH_RMII_TXD1_PIN , RTE_ETH_RMII_TXD1_MODE , RTE_ETH_RMII_TXD1_PAD_SEL }, - { RTE_ETH_RMII_TX_EN_PORT , RTE_ETH_RMII_TX_EN_PIN , RTE_ETH_RMII_TX_EN_MODE , RTE_ETH_RMII_TX_EN_PAD_SEL }, - { RTE_ETH_RMII_RXD0_PORT , RTE_ETH_RMII_RXD0_PIN , RTE_ETH_RMII_RXD0_MODE , RTE_ETH_RMII_RXD0_PAD_SEL }, - { RTE_ETH_RMII_RXD1_PORT , RTE_ETH_RMII_RXD1_PIN , RTE_ETH_RMII_RXD1_MODE , RTE_ETH_RMII_RXD1_PAD_SEL }, - { RTE_ETH_RMII_REF_CLK_PORT , RTE_ETH_RMII_REF_CLK_PIN , RTE_ETH_RMII_REF_CLK_MODE , RTE_ETH_RMII_REF_CLK_PAD_SEL}, - { RTE_ETH_RMII_CRS_DV_PORT , RTE_ETH_RMII_CRS_DV_PIN , RTE_ETH_RMII_CRS_DV_MODE , RTE_ETH_RMII_CRS_DV_PAD_SEL }, - { RTE_ETH_MDI_MDC_PORT , RTE_ETH_MDI_MDC_PIN , RTE_ETH_MDI_MDC_MODE , RTE_ETH_MDI_MDC_PAD_SEL }, - { RTE_ETH_MDI_MDIO_PORT , RTE_ETH_MDI_MDIO_PIN , RTE_ETH_MDI_MDIO_MODE , RTE_ETH_MDI_MDIO_PAD_SEL }, -}; - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_ETH_MAC_API_VERSION, - ARM_ETH_MAC_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_ETH_MAC_CAPABILITIES DriverCapabilities = { - (EMAC_CHECKSUM_OFFLOAD != 0) ? 1U : 0U, /* checksum_offload_rx_ip4 */ - (EMAC_CHECKSUM_OFFLOAD != 0) ? 1U : 0U, /* checksum_offload_rx_ip6 */ - (EMAC_CHECKSUM_OFFLOAD != 0) ? 1U : 0U, /* checksum_offload_rx_udp */ - (EMAC_CHECKSUM_OFFLOAD != 0) ? 1U : 0U, /* checksum_offload_rx_tcp */ - (EMAC_CHECKSUM_OFFLOAD != 0) ? 1U : 0U, /* checksum_offload_rx_icmp */ - (EMAC_CHECKSUM_OFFLOAD != 0) ? 1U : 0U, /* checksum_offload_tx_ip4 */ - (EMAC_CHECKSUM_OFFLOAD != 0) ? 1U : 0U, /* checksum_offload_tx_ip6 */ - (EMAC_CHECKSUM_OFFLOAD != 0) ? 1U : 0U, /* checksum_offload_tx_udp */ - (EMAC_CHECKSUM_OFFLOAD != 0) ? 1U : 0U, /* checksum_offload_tx_tcp */ - (EMAC_CHECKSUM_OFFLOAD != 0) ? 1U : 0U, /* checksum_offload_tx_icmp */ - (ETH_MII != 0) ? - ARM_ETH_INTERFACE_MII : - ARM_ETH_INTERFACE_RMII, /* media_interface */ - 0U, /* mac_address */ - 1U, /* event_rx_frame */ - 1U, /* event_tx_frame */ - 1U, /* event_wakeup */ - (EMAC_TIME_STAMP != 0) ? 1U : 0U /* precision_timer */ -}; - -/* Local variables */ -static EMAC_CTRL Emac; - -static RX_Desc rx_desc[NUM_RX_BUF]; -static TX_Desc tx_desc[NUM_TX_BUF]; -static uint32_t rx_buf [NUM_RX_BUF][ETH_BUF_SIZE>>2]; -static uint32_t tx_buf [NUM_TX_BUF][ETH_BUF_SIZE>>2]; - - -/** - * @fn void init_rx_desc (void) - * @brief Initialize Rx DMA descriptors. - * @return none - */ -static void init_rx_desc (void) { - uint32_t i=0,next; - - for (i = 0U; i < NUM_RX_BUF; i++) { - rx_desc[i].Stat = DMA_RX_OWN; - rx_desc[i].Ctrl = DMA_RX_RCH | ETH_BUF_SIZE ; - rx_desc[i].Addr = (uint8_t *)&rx_buf[i]; - next = i + 1U; - if (next == NUM_RX_BUF) { next = 0U; } - rx_desc[i].Next = &rx_desc[next]; - } - ETH->DMA_RX_DESC_LIST_ADDR_REG = (uint32_t)&rx_desc[0]; - Emac.rx_index = 0U; -} - -/** - * @fn void init_tx_desc (void) - * @brief Initialize Tx DMA descriptors. - * @return none - */ -static void init_tx_desc (void) { - uint32_t i,next; - - for(i=0;i < NUM_TX_BUF;i++){ - tx_desc[i].Size= DMA_TX_TCH | DMA_TX_LS | DMA_TX_FS; - tx_desc[i].Addr=(uint8_t *)&tx_buf[i]; - next = i + 1U; - if(next == NUM_TX_BUF) { next = 0U; } - tx_desc[i].Next=&tx_desc[next]; - } - ETH->DMA_TX_DESC_LIST_ADDR_REG = (uint32_t)&tx_desc[0]; - Emac.tx_index = 0U; -} - -/** - * @fn void Init(void) - * @brief MDIO iniitialization. - * @param[in] dir : 1=input,0=output. - * @return None - */ -void MDIO_Init(void) -{ - /*Enable the clock*/ - RSI_CLK_PeripheralClkEnable(M4CLK,EGPIO_CLK,ENABLE_STATIC_CLK); - /*MDC*/ - RSI_EGPIO_PadSelectionEnable(RTE_ETH_MDI_MDC_PAD_SEL); - RSI_EGPIO_PadReceiverEnable(RTE_ETH_MDI_MDC_PIN); - RSI_EGPIO_SetPinMux(EGPIO,RTE_ETH_MDI_MDC_PORT,RTE_ETH_MDI_MDC_PIN,EGPIO_PIN_MUX_MODE0); - RSI_EGPIO_SetDir(EGPIO,RTE_ETH_MDI_MDC_PORT,RTE_ETH_MDI_MDC_PIN,EGPIO_PIN_MUX_MODE0); - - /*MDIO*/ - RSI_EGPIO_PadSelectionEnable(RTE_ETH_MDI_MDIO_PAD_SEL); - RSI_EGPIO_PadReceiverEnable(RTE_ETH_MDI_MDIO_PIN); - RSI_EGPIO_SetPinMux(EGPIO,RTE_ETH_MDI_MDC_PORT,RTE_ETH_MDI_MDIO_PIN,EGPIO_PIN_MUX_MODE0); -} - -/** - * @fn void MDIO_Dir(uint8_t dir) - * @brief Set MDIO dir. - * @param[in] dir : 1=input,0=output. - * @return None - */ -void MDIO_Dir(uint8_t dir) -{ - if(dir) - { - RSI_EGPIO_SetDir(EGPIO,RTE_ETH_MDI_MDC_PORT,RTE_ETH_MDI_MDIO_PIN,EGPIO_CONFIG_DIR_INPUT); - } - else - { - RSI_EGPIO_SetDir(EGPIO,RTE_ETH_MDI_MDC_PORT,RTE_ETH_MDI_MDIO_PIN,EGPIO_CONFIG_DIR_OUTPUT); - } -} - -/** - * @fn void MDIO_Write(uint32_t data,uint32_t length) - * @brief Write's the data to phy register. - * @param[in] data : Data to be written. - * @param[in] length : Length of the data. - * @return Returns data - */ -void MDIO_Write(uint32_t data,uint32_t length) -{ - volatile int x=0; - uint32_t i; - - data = data << (32-length); - for(i=0;iport,i->pin , i->mode); - RSI_EGPIO_PadReceiverEnable(i->pin); - RSI_EGPIO_PadSelectionEnable(i->pad_sel); - } - memset (&Emac, 0, sizeof (EMAC_CTRL)); - - Emac.cb_event = cb_event; - Emac.flags = EMAC_FLAG_INIT; - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t Uninitialize (void) - * @brief De-initialize Ethernet MAC Device. - * @return \ref execution_status -*/ -static int32_t Uninitialize (void) { - const ETH_PIN_Config *i; - /* Ethernet ping Unconfigure */ - for (i = eth_pins; i != ð_pins[sizeof(eth_pins)/sizeof(ETH_PIN_Config)]; i++) { - RSI_EGPIO_SetPinMux(EGPIO,i->port,i->pin , EGPIO_PIN_MUX_MODE0); - RSI_EGPIO_PadReceiverDisable(i->pin); - RSI_EGPIO_PadSelectionDisable(i->pad_sel); - } - - Emac.flags &= ~EMAC_FLAG_INIT; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t PowerControl (ARM_POWER_STATE state) - * @brief Control Ethernet MAC Device Power. - * @param[in] state : Power state - * @return \ref execution_status -*/ -static int32_t PowerControl (ARM_POWER_STATE state) { - volatile uint32_t systemclk, clkdiv; - - switch (state) { - case ARM_POWER_OFF: - - /* Disable ethernet interrupts */ - NVIC_DisableIRQ(ETHERNET_IRQn); - ETH->DMA_INTR_EN_REG = 0U; - - Emac.flags &= ~EMAC_FLAG_POWER; - break; - - case ARM_POWER_LOW: - return ARM_DRIVER_ERROR_UNSUPPORTED; - - case ARM_POWER_FULL: - /* Clock to Ethernet peripheral */ - RSI_CLK_PeripheralClkEnable1(M4CLK , ETH_HCLK_ENABLE); - - if ((Emac.flags & EMAC_FLAG_INIT) == 0U) { - /* Driver not initialized */ - return ARM_DRIVER_ERROR; - } - if ((Emac.flags & EMAC_FLAG_POWER) != 0U) { - /* Driver already powered */ - break; - } - - /* set Software reset */ - ETH->DMA_BUS_MODE_REG |= ETH_DMABMR_SR; - while (ETH->DMA_BUS_MODE_REG & ETH_DMABMR_SR) { - ; /* Wait until software reset completed */ - } - - /* MDC clock range selection */ - - systemclk=RSI_CLK_GetBaseClock(M4_ETHERNET); - - if (systemclk >= 150000000U) { - clkdiv = ETH_MACMIIAR_CR_Div102; - } else if (systemclk >= 100000000U) { - clkdiv = ETH_MACMIIAR_CR_Div62; - } else if (systemclk >= 60000000U) { - clkdiv = ETH_MACMIIAR_CR_Div42; - } else if (systemclk >= 35000000U) { - clkdiv = ETH_MACMIIAR_CR_Div26; - } else if (systemclk >= 25000000U) { - clkdiv = ETH_MACMIIAR_CR_Div16; - } else { - /* systemclock is too slow for Ethernet */ - return (ARM_DRIVER_ERROR); - } - ETH->MAC_GMII_ADDR_REG = clkdiv; - - /* Initialize MAC configuration */ - ETH->MAC_CONFIG_REG = ETH_MACCR_DO | ETH_MACCR_PS; - - /* Initialize Filter registers */ - ETH->MAC_FRAME_FILTER_REG = ETH_MACFFR_DBF; - ETH->MAC_FLOW_CTRL_REG = ETH_MACFCR_DZPQ; - - /* Initialize Address registers */ - ETH->MAC_ADDR0_HIGH_REG = 0U; ETH->MAC_ADDR0_LOW_REG = 0U; - ETH->MAC_ADDR1_HIGH_REG = 0U; ETH->MAC_ADDR1_LOW_REG = 0U; - ETH->MAC_ADDR2_HIGH_REG = 0U; ETH->MAC_ADDR2_LOW_REG = 0U; - ETH->MAC_ADDR3_HIGH_REG = 0U; ETH->MAC_ADDR3_LOW_REG = 0U; - - /* Mask pmt interrupt */ - ETH->MAC_INTR_MASK_REG |= ETH_MACIMR_PMTIM; - - /* Initialize DMA Descriptors */ - init_rx_desc (); - init_tx_desc (); - - /* Enable Rx interrupts */ - ETH->DMA_STATUS_REG = 0xFFFFFFFFU; - ETH->DMA_INTR_EN_REG = ETH_DMAIER_NIE | ETH_DMAIER_RIE | ETH_DMAIER_TIE; - - - /* Disable MMC interrupts */ - ETH->MMC_INTR_MASK_TX_REG = ETH_MMCTIMR_TGFM | ETH_MMCTIMR_TGFSCM; - ETH->MMC_INTR_MASK_RX_REG = ETH_MMCRIMR_RFCEM; - - /*Enable ETHERNET interrupt */ - NVIC_ClearPendingIRQ (ETHERNET_IRQn); - NVIC_EnableIRQ (ETHERNET_IRQn); - - Emac.frame_end = NULL; - Emac.flags |= EMAC_FLAG_POWER; - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr) - * @brief Get Ethernet MAC Address. - * @param[in] ptr_addr : Pointer to address - * @return \ref execution_status -*/ -static int32_t GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr) { - uint32_t val; - - if (ptr_addr == NULL) { - return ARM_DRIVER_ERROR_PARAMETER; - } - - if ((Emac.flags & EMAC_FLAG_POWER) == 0U) { - return ARM_DRIVER_ERROR; - } - - val = ETH->MAC_ADDR0_HIGH_REG; - ptr_addr->b[5] = (uint8_t)(val >> 8); - ptr_addr->b[4] = (uint8_t)(val); - val = ETH->MAC_ADDR0_LOW_REG; - ptr_addr->b[3] = (uint8_t)(val >> 24); - ptr_addr->b[2] = (uint8_t)(val >> 16); - ptr_addr->b[1] = (uint8_t)(val >> 8); - ptr_addr->b[0] = (uint8_t)(val); - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr) - * @brief Set Ethernet MAC Address. - * @param[in] ptr_addr : Pointer to address - * @return \ref execution_status -*/ -static int32_t SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr) { - - if (ptr_addr == NULL) { - return ARM_DRIVER_ERROR_PARAMETER; - } - - if ((Emac.flags & EMAC_FLAG_POWER) == 0U) { - return ARM_DRIVER_ERROR; - } - - /* Set Ethernet MAC Address registers */ - ETH->MAC_ADDR0_HIGH_REG = ((uint32_t)ptr_addr->b[5] << 8) | (uint32_t)ptr_addr->b[4]; - ETH->MAC_ADDR0_LOW_REG = ((uint32_t)ptr_addr->b[3] << 24) | ((uint32_t)ptr_addr->b[2] << 16) | - ((uint32_t)ptr_addr->b[1] << 8) | (uint32_t)ptr_addr->b[0]; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, - uint32_t num_addr) - * @brief Configure Address Filter. - * @param[in] ptr_addr : Pointer to addresses - * @param[in] num_addr : Number of addresses to configure - * @return \ref execution_status -*/ -static int32_t SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr) { - uint32_t crc; - - if ((ptr_addr == NULL) && (num_addr != 0)) { - return ARM_DRIVER_ERROR_PARAMETER; - } - - if ((Emac.flags & EMAC_FLAG_POWER) == 0U) { - return ARM_DRIVER_ERROR; - } - - /* Use unicast address filtering for first 3 MAC addresses */ - ETH->MAC_FRAME_FILTER_REG &= ~(ETH_MACFFR_HPF | ETH_MACFFR_HMC); - ETH->MAC_HASH_TABLE_HIGH_REG = 0U; ETH->MAC_HASH_TABLE_LOW_REG = 0U; - - if (num_addr == 0U) { - ETH->MAC_ADDR1_HIGH_REG = 0U; ETH->MAC_ADDR1_LOW_REG = 0U; - ETH->MAC_ADDR2_HIGH_REG = 0U; ETH->MAC_ADDR2_LOW_REG = 0U; - ETH->MAC_ADDR3_HIGH_REG = 0U; ETH->MAC_ADDR3_LOW_REG = 0U; - return ARM_DRIVER_OK; - } - - ETH->MAC_ADDR1_HIGH_REG = ((uint32_t)ptr_addr->b[5] << 8) | (uint32_t)ptr_addr->b[4] | ETH_MACA1HR_AE; - ETH->MAC_ADDR1_LOW_REG = ((uint32_t)ptr_addr->b[3] << 24) | ((uint32_t)ptr_addr->b[2] << 16) | - ((uint32_t)ptr_addr->b[1] << 8) | (uint32_t)ptr_addr->b[0]; - num_addr--; - if (num_addr == 0U) { - ETH->MAC_ADDR2_HIGH_REG = 0U; ETH->MAC_ADDR2_LOW_REG = 0U; - ETH->MAC_ADDR3_HIGH_REG = 0U; ETH->MAC_ADDR3_LOW_REG = 0U; - return ARM_DRIVER_OK; - } - ptr_addr++; - - ETH->MAC_ADDR2_HIGH_REG = ((uint32_t)ptr_addr->b[5] << 8) | (uint32_t)ptr_addr->b[4] | ETH_MACA2HR_AE; - ETH->MAC_ADDR2_LOW_REG = ((uint32_t)ptr_addr->b[3] << 24) | ((uint32_t)ptr_addr->b[2] << 16) | - ((uint32_t)ptr_addr->b[1] << 8) | (uint32_t)ptr_addr->b[0]; - num_addr--; - if (num_addr == 0U) { - ETH->MAC_ADDR3_HIGH_REG = 0U; ETH->MAC_ADDR3_LOW_REG = 0U; - return ARM_DRIVER_OK; - } - ptr_addr++; - - ETH->MAC_ADDR3_HIGH_REG = ((uint32_t)ptr_addr->b[5] << 8) | (uint32_t)ptr_addr->b[4] | ETH_MACA3HR_AE; - ETH->MAC_ADDR3_LOW_REG = ((uint32_t)ptr_addr->b[3] << 24) | ((uint32_t)ptr_addr->b[2] << 16) | - ((uint32_t)ptr_addr->b[1] << 8) | (uint32_t)ptr_addr->b[0]; - num_addr--; - if (num_addr == 0U) { - return ARM_DRIVER_OK; - } - ptr_addr++; - - /* Calculate 64-bit Hash table for remaining MAC addresses */ - for ( ; num_addr; ptr_addr++, num_addr--) { - crc = crc32_data (&ptr_addr->b[0], 6U) >> 26; - if (crc & 0x20U) { - ETH->MAC_HASH_TABLE_HIGH_REG |= (1U << (crc & 0x1FU)); - } - else { - ETH->MAC_HASH_TABLE_LOW_REG |= (1U << crc); - } - } - /* Enable both, unicast and hash address filtering */ - ETH->MAC_FRAME_FILTER_REG |= ETH_MACFFR_HPF | ETH_MACFFR_HMC; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags) - * @brief Send Ethernet frame. - * @param[in] frame : Pointer to frame buffer with data to send - * @param[in] len : Frame buffer length in bytes - * @param[in] flags : Frame transmit flags (see ARM_ETH_MAC_TX_FRAME_...) - * @return \ref execution_status -*/ -static int32_t SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags) { - uint8_t *dst = Emac.frame_end; - uint32_t ctrl; - uint32_t dummy =0; - - if ((frame == NULL) || (len == 0U)) { - return ARM_DRIVER_ERROR_PARAMETER; - } - - if ((Emac.flags & EMAC_FLAG_POWER) == 0U) { - return ARM_DRIVER_ERROR; - } - - if (dst == NULL) { - /* New TX frame start */ - if (tx_desc[Emac.tx_index].CtrlStat & DMA_TX_OWN) { - /* wait upto transmitter is busy */ - return ARM_DRIVER_ERROR_BUSY; - } - dst = (uint8_t *)tx_desc[Emac.tx_index].Addr; - dummy = tx_desc[Emac.tx_index].Size; - dummy = (dummy & 0xFF800000); - tx_desc[Emac.tx_index].Size = (len | dummy); - } - else { - /* Sending data fragments in progress */ - tx_desc[Emac.tx_index].Size += len; - } - /* Fast-copy data fragments to ETH-DMA buffer */ - for ( ; len > 7U; dst += 8, frame += 8, len -= 8U) { - ((__packed uint32_t *)dst)[0] = ((__packed uint32_t *)frame)[0]; - ((__packed uint32_t *)dst)[1] = ((__packed uint32_t *)frame)[1]; - } - /* Copy remaining 7 bytes */ - for ( ; len > 1U; dst += 2, frame += 2, len -= 2U) { - ((__packed uint16_t *)dst)[0] = ((__packed uint16_t *)frame)[0]; - } - if (len > 0U) { dst++[0] = frame++[0]; } - - if (flags & ARM_ETH_MAC_TX_FRAME_FRAGMENT) { - /* If more data is there copy current write position */ - Emac.frame_end = dst; - return ARM_DRIVER_OK; - } - - /* Send the frame to DMA */ - ctrl = tx_desc[Emac.tx_index].Size & ~DMA_TX_CIC; -#if (EMAC_CHECKSUM_OFFLOAD != 0) - if (Emac.tx_cks_offload) { - - uint16_t prot = (*((const __packed uint16_t *)(&tx_desc[Emac.tx_index].Addr[12]))); - uint16_t frag = (*((const __packed uint16_t *)(&tx_desc[Emac.tx_index].Addr[20])));; - if ((prot == 0x0008) && (frag & 0xFF3F)) { - /* Insert only IP header checksum in fragmented frame */ - ctrl |= DMA_TX_CIC_IP; - } - else { - /* Insert IP header and payload checksums (TCP,UDP,ICMP) */ - ctrl |= DMA_TX_CIC; - } - } -#endif - ctrl &= ~(DMA_TX_IC); - if (flags & ARM_ETH_MAC_TX_FRAME_EVENT) { ctrl |= DMA_TX_IC; } - - tx_desc[Emac.tx_index].Size = ctrl; - tx_desc[Emac.tx_index].CtrlStat = DMA_TX_OWN; - - Emac.tx_index++; - if (Emac.tx_index == NUM_TX_BUF) { Emac.tx_index = 0U; } - Emac.frame_end = NULL; - - /* Start frame transmission */ - ETH->DMA_STATUS_REG = ETH_DMASR_TPSS; - - ETH->DMA_TX_POLL_DEMAND_REG = 0U; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t ReadFrame (uint8_t *frame, uint32_t len) - * @brief Read data of received Ethernet frame. - * @param[in] frame : Pointer to frame buffer for data to read into - * @param[in] len : Frame buffer length in bytes - * @return number of data bytes read or execution status - - value >= 0: number of data bytes read - - value < 0: error occurred, value is execution status as defined with \ref execution_status -*/ -static int32_t ReadFrame (uint8_t *frame, uint32_t len) { - uint8_t const *src = rx_desc[Emac.rx_index].Addr; - int32_t cnt = (int32_t)len; - - if ((frame == NULL) && (len != 0U)) { - return ARM_DRIVER_ERROR_PARAMETER; - } - - if ((Emac.flags & EMAC_FLAG_POWER) == 0U) { - return ARM_DRIVER_ERROR; - } - - /* Fast-copy data to frame buffer */ - for ( ; len > 7U; frame += 8, src += 8, len -= 8U) { - ((__packed uint32_t *)frame)[0] = ((uint32_t *)src)[0]; - ((__packed uint32_t *)frame)[1] = ((uint32_t *)src)[1]; - } - /* Copy remaining 7 bytes */ - for ( ; len > 1U; frame += 2, src += 2, len -= 2U) { - ((__packed uint16_t *)frame)[0] = ((uint16_t *)src)[0]; - } - if (len > 0U) { frame[0] = src[0]; } - - /* Return this block back to ETH-DMA */ - rx_desc[Emac.rx_index].Stat = DMA_RX_OWN; - - Emac.rx_index++; - if (Emac.rx_index == NUM_RX_BUF) { Emac.rx_index = 0; } - - if (ETH->DMA_STATUS_REG & ETH_DMASR_RBU) { - /* Receive buffer unavailable, resume DMA */ - ETH->DMA_STATUS_REG = ETH_DMASR_RBU; - ETH->DMA_RX_POLL_DEMAND_REG = 0; - } - - return (cnt); -} - -/** - * @fn uint32_t GetRxFrameSize (void) - * @brief Get size of received Ethernet frame. - * @return number of bytes in received frame -*/ -static uint32_t GetRxFrameSize (void) { - - uint32_t stat = rx_desc[Emac.rx_index].Stat; - - if ((Emac.flags & EMAC_FLAG_POWER) == 0U) { - return (0U); - } - - if (stat & DMA_RX_OWN) { - /* Owned by DMA */ - return (0U); - } - if (((stat & DMA_RX_ES) != 0) || - ((stat & DMA_RX_FS) == 0) || - ((stat & DMA_RX_LS) == 0)) { - /* Error, this block is invalid */ - return (0xFFFFFFFFU); - } - - return (((stat & DMA_RX_FL) >> 16) - 4U); -} - -/** - * @fn int32_t GetRxFrameTime (ARM_ETH_MAC_TIME *time) - * @brief Get time of received Ethernet frame. - * @param[in] time : Pointer to time structure for data to read into - * @return \ref execution_status -*/ -static int32_t GetRxFrameTime (ARM_ETH_MAC_TIME *time) { - return ARM_DRIVER_ERROR_UNSUPPORTED; -} - -/** - * @fn int32_t GetTxFrameTime (ARM_ETH_MAC_TIME *time) - * @brief Get time of transmitted Ethernet frame. - * @param[in] time : Pointer to time structure for data to read into - * @return \ref execution_status -*/ -static int32_t GetTxFrameTime (ARM_ETH_MAC_TIME *time) { - return ARM_DRIVER_ERROR_UNSUPPORTED; -} - -/** - * @fn int32_t ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time) - * @brief Control Precision Timer. - * @param[in] control : operation - * @param[in] time : Pointer to time structure - * @return \ref execution_status -*/ -static int32_t ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time) { - return ARM_DRIVER_ERROR_UNSUPPORTED; -} - -/** - * @fn int32_t Control (uint32_t control, uint32_t arg) - * @brief Control Ethernet Interface. - * @param[in] control : operation - * @param[in] arg : argument of operation (optional) - * @return \ref execution_status -*/ -static int32_t Control (uint32_t control, uint32_t arg) { - uint32_t maccr; - uint32_t dmaomr; - uint32_t macffr; - - if ((Emac.flags & EMAC_FLAG_POWER) == 0U) { - return ARM_DRIVER_ERROR; - } - - switch (control) { - case ARM_ETH_MAC_CONFIGURE: - maccr = ETH->MAC_CONFIG_REG & ~( ETH_MACCR_DM | - ETH_MACCR_LM | ETH_MACCR_IPC); - - - /* Configure the speed of operation(10/100 mbps) */ - switch (arg & ARM_ETH_MAC_SPEED_Msk) { - case ARM_ETH_MAC_SPEED_10M: - ETH_SPEED &= ~ETH_MACCR_FES; - break; - case ARM_ETH_SPEED_100M: - ETH_SPEED |= ETH_MACCR_FES; - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - /* Confige the mode (Half/Full duplex) */ - switch (arg & ARM_ETH_MAC_DUPLEX_Msk) { - case ARM_ETH_MAC_DUPLEX_FULL: - maccr |= ETH_MACCR_DM; - break; - case ARM_ETH_MAC_DUPLEX_HALF: - maccr &= ~ETH_MACCR_DM; - break; - default: - return ARM_DRIVER_ERROR; - } - - /* Configurration of mac level loopback opearation */ - if (arg & ARM_ETH_MAC_LOOPBACK) { - maccr |= ETH_MACCR_LM; - } - - dmaomr = ETH->DMA_OPER_MODE_REG & ~(ETH_DMAOMR_RSF| ETH_DMAOMR_TSF); -#if (EMAC_CHECKSUM_OFFLOAD != 0) - /* Enable rx checksum verification */ - if (arg & ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX) { - maccr |= ETH_MACCR_IPC; - } - - /* Enable tx checksum generation */ - if (arg & ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX) { - dmaomr |= ETH_DMAOMR_TSF; - Emac.tx_cks_offload = true; - } - else { - Emac.tx_cks_offload = false; - } -#else - if ((arg & ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX) || - (arg & ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX)) { - /* Checksum offload is disabled in the driver */ - return ARM_DRIVER_ERROR; - } -#endif - ETH->DMA_OPER_MODE_REG = dmaomr; - ETH->MAC_CONFIG_REG = maccr; - - macffr = ETH->MAC_FRAME_FILTER_REG & ~(ETH_MACFFR_PR | ETH_MACFFR_PM | ETH_MACFFR_DBF); - /* Enable broadcast frame receive */ - if ((arg & ARM_ETH_MAC_ADDRESS_BROADCAST) == 0) { - macffr |= ETH_MACFFR_DBF; - } - - /* Enable all multicast frame receive */ - if (arg & ARM_ETH_MAC_ADDRESS_MULTICAST) { - macffr |= ETH_MACFFR_PM; - } - - /* Enable promiscuous mode (no filtering) */ - if (arg & ARM_ETH_MAC_ADDRESS_ALL) { - macffr |= ETH_MACFFR_PR; - } - ETH->MAC_FRAME_FILTER_REG = macffr; - break; - - case ARM_ETH_MAC_CONTROL_TX: - /* Enable/disable MAC transmitter */ - maccr = ETH->MAC_CONFIG_REG & ~ETH_MACCR_TE; - dmaomr = ETH->DMA_OPER_MODE_REG & ~ETH_DMAOMR_ST; - if (arg != 0) { - maccr |= ETH_MACCR_TE; - dmaomr |= ETH_DMAOMR_ST; - } - ETH->MAC_CONFIG_REG = maccr; - ETH->DMA_OPER_MODE_REG = dmaomr; - break; - - case ARM_ETH_MAC_CONTROL_RX: - /* Enable/disable MAC receiver */ - maccr = ETH->MAC_CONFIG_REG & ~ETH_MACCR_RE; - dmaomr = ETH->DMA_OPER_MODE_REG & ~ETH_DMAOMR_SR; - if (arg != 0) { - maccr |= ETH_MACCR_RE; - dmaomr |= ETH_DMAOMR_SR; - } - ETH->MAC_CONFIG_REG = maccr; - ETH->DMA_OPER_MODE_REG = dmaomr; - break; - - case ARM_ETH_MAC_FLUSH: - /* Flush tx and rx buffers */ - if (arg & ARM_ETH_MAC_FLUSH_RX) { - } - if (arg & ARM_ETH_MAC_FLUSH_TX) { - ETH->DMA_OPER_MODE_REG |= ETH_DMAOMR_FTF; - } - break; - - case ARM_ETH_MAC_VLAN_FILTER: - /* Configure VLAN filter */ - ETH->MAC_VLAN_TAG_REG = arg; - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - - -/** - * @fn int32_t PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data) - * @brief Read Ethernet PHY Register through Management Interface. - * @param[in] phy_addr : 5-bit device address - * @param[in] reg_addr : 5-bit register address - * @param[out] data : Pointer where the result is written to - * @return \ref execution_status -*/ -static int32_t PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data) { - - /*Initialize the mdio*/ - MDIO_Init(); - /*Set the MDIO Direction*/ - MDIO_Dir(EGPIO_CONFIG_DIR_OUTPUT); - /*32 continuous 1's*/ - MDIO_Write(0xFFFFFFFF,32); - /*Start of frame(01) and read command(10) */ - MDIO_Write(0x6,4); - /*PHY address*/ - MDIO_Write(phy_addr,5); - /*reg address*/ - MDIO_Write(reg_addr,5); - - MDIO_Dir(EGPIO_CONFIG_DIR_INPUT); - /*Turn around time*/ - MDIO_Write(0x0,2); - - *data=MDIO_Read(); - - MDIO_Dir(EGPIO_CONFIG_DIR_OUTPUT); - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data) - * @brief Write Ethernet PHY Register through Management Interface. - * @param[in] phy_addr : 5-bit device address - * @param[in] reg_addr : 5-bit register address - * @param[in] data : 16-bit data to write - * @return \ref execution_status -*/ -static int32_t PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data) { - - /*Initialize the mdio*/ - MDIO_Init(); - /*Set the MDIO Direction*/ - MDIO_Dir(EGPIO_CONFIG_DIR_OUTPUT); - /*32 continuous 1's*/ - MDIO_Write(0xFFFFFFFF,32); - /*start of frame(01) and write command(01) */ - MDIO_Write(0x5,4); - /*phy address*/ - MDIO_Write(phy_addr,5); - /*reg address*/ - MDIO_Write(reg_addr,5); - /*Turn around time*/ - MDIO_Write(0x2,2); - /*write the data*/ - MDIO_Write(data,16); - - return ARM_DRIVER_OK; -} - - -/* Ethernet IRQ Handler */ -void IRQ062_Handler (void) { - uint32_t dmasr, macsr, event = 0; - - dmasr = ETH->DMA_STATUS_REG; - ETH->DMA_STATUS_REG = dmasr & (ETH_DMASR_NIS | ETH_DMASR_RI | ETH_DMASR_TI); - - if (dmasr & ETH_DMASR_TI) { - /* Frame sent */ - event |= ARM_ETH_MAC_EVENT_TX_FRAME; - } - if (dmasr & ETH_DMASR_RI) { - /* Frame received */ - event |= ARM_ETH_MAC_EVENT_RX_FRAME; - } - macsr = ETH->MAC_STATUS_REG; - - - if (macsr & ETH_MACSR_PMTS) { - ETH->MAC_PMT_CTRL_STATUS_REG; - event |= ARM_ETH_MAC_EVENT_WAKEUP; - } - - /* Callback event notification */ - if (event && Emac.cb_event) { - Emac.cb_event (event); - } -} - - -/* MAC Driver Control Block */ -ARM_DRIVER_ETH_MAC Driver_ETH_MAC0 = { - GetVersion, - GetCapabilities, - Initialize, - Uninitialize, - PowerControl, - GetMacAddress, - SetMacAddress, - SetAddressFilter, - SendFrame, - ReadFrame, - GetRxFrameSize, - GetRxFrameTime, - GetTxFrameTime, - ControlTimer, - Control, - PHY_Read, - PHY_Write -}; -#endif - - diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/EMAC.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/EMAC.h deleted file mode 100644 index 1d4aa6c23..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/EMAC.h +++ /dev/null @@ -1,445 +0,0 @@ -/* -------------------------------------------------------------------------- - * Copyright (c) 2013-2018 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 25. Dec 2018 - * $Revision: V2.8 - * - * Project: Ethernet Media Access (MAC) Definitions - * -------------------------------------------------------------------------- */ - - -#include - -#include "Driver_ETH_MAC.h" - -#define ETH_MII 0 -/* EMAC Driver state flags */ -#define EMAC_FLAG_INIT (1 << 0) // Driver initialized -#define EMAC_FLAG_POWER (1 << 1) // Driver power on - -/* TDES0 - DMA Descriptor TX Packet Control/Status */ -#define DMA_TX_OWN 0x80000000U // Own bit 1=DMA,0=CPU - -/* TDES1 - DMA Descriptor TX Packet Control/Status */ -#define DMA_TX_IC 0x80000000U // Interrupt on completition -#define DMA_TX_LS 0x40000000U // Last segment -#define DMA_TX_FS 0x20000000U // First segment -#define DMA_TX_DC 0x04000000U // Disable CRC -#define DMA_TX_DP 0x00800000U // Disable pad -#define DMA_TX_CIC 0x18000000U // Checksum insertion control -#define DMA_TX_CIC_IP 0x08000000U //Checksum insertion control for IP header only -#define DMA_TX_CIC_BYPASS 0x00000000U -#define DMA_TX_TER 0x02000000U // Transmit end of ring -#define DMA_TX_TCH 0x01000000U // Second address chained -#define DMA_TX_TTSS 0x00020000U // Transmit time stamp status -#define DMA_TX_IHE 0x00010000U // IP header error status -#define DMA_TX_ES 0x00008000U // Error summary -#define DMA_TX_JT 0x00004000U // Jabber timeout -#define DMA_TX_FF 0x00002000U // Frame flushed -#define DMA_TX_IPE 0x00001000U // IP payload error -#define DMA_TX_LC 0x00000800U // Loss of carrier -#define DMA_TX_NC 0x00000400U // No carrier -#define DMA_TX_LCOL 0x00000200U // Late collision -#define DMA_TX_EC 0x00000100U // Excessive collision -#define DMA_TX_VF 0x00000080U // VLAN frame -#define DMA_TX_CC 0x00000078U // Collision count -#define DMA_TX_ED 0x00000004U // Excessive deferral -#define DMA_TX_UF 0x00000002U // Underflow error -#define DMA_TX_DB 0x00000001U // Deferred bit - -/* TDES1 - DMA Descriptor TX Packet Control */ -#define DMA_TX_TBS2 0x1FFF0000U // Transmit buffer 2 size -#define DMA_TX_TBS1 0x00001FFFU // Transmit buffer 1 size - -/* RDES0 - DMA Descriptor RX Packet Status */ -#define DMA_RX_OWN 0x80000000U // Own bit 1=DMA,0=CPU -#define DMA_RX_AFM 0x40000000U // Destination address filter fail -#define DMA_RX_FL 0x3FFF0000U // Frame length mask -#define DMA_RX_ES 0x00008000U // Error summary -#define DMA_RX_DE 0x00004000U // Descriptor error -#define DMA_RX_SAF 0x00002000U // Source address filter fail -#define DMA_RX_LE 0x00001000U // Length error -#define DMA_RX_OE 0x00000800U // Overflow error -#define DMA_RX_VLAN 0x00000400U // VLAN tag -#define DMA_RX_FS 0x00000200U // First descriptor -#define DMA_RX_LS 0x00000100U // Last descriptor -#define DMA_RX_IPHCE 0x00000080U // IPv4 header checksum error -#define DMA_RX_LC 0x00000040U // late collision -#define DMA_RX_FT 0x00000020U // Frame type -#define DMA_RX_RWT 0x00000010U // Receive watchdog timeout -#define DMA_RX_RE 0x00000008U // Receive error -#define DMA_RX_DRE 0x00000004U // Dribble bit error -#define DMA_RX_CE 0x00000002U // CRC error -#define DMA_RX_RMAM 0x00000001U // Rx MAC adr.match/payload cks.error - -/* RDES1 - DMA Descriptor RX Packet Control */ -#define DMA_RX_DIC 0x80000000U // Disable interrupt on completion -#define DMA_RX_RBS2 0x1FFF0000U // Receive buffer 2 size -#define DMA_RX_RER 0x02000000U // Receive end of ring -#define DMA_RX_RCH 0x01000000U // Second address chained -#define DMA_RX_RBS1 0x00001FFFU // Receive buffer 1 size - -/* Ethernet MAC configuration register */ -#define ETH_MACCR_WD 0x00800000U /* Watchdog disable */ -#define ETH_MACCR_JD 0x00400000U /* Jabber disable */ -#define ETH_MACCR_IFG 0x000E0000U /* Inter-frame gap mask*/ -#define ETH_MACCR_IFG_96Bit 0x00000000U /* Minimum IFG between frames during transmission is 96Bit */ -#define ETH_MACCR_IFG_88Bit 0x00020000U /* Minimum IFG between frames during transmission is 88Bit */ -#define ETH_MACCR_IFG_80Bit 0x00040000U /* Minimum IFG between frames during transmission is 80Bit */ -#define ETH_MACCR_IFG_72Bit 0x00060000U /* Minimum IFG between frames during transmission is 72Bit */ -#define ETH_MACCR_IFG_64Bit 0x00080000U /* Minimum IFG between frames during transmission is 64Bit */ -#define ETH_MACCR_IFG_56Bit 0x000A0000U /* Minimum IFG between frames during transmission is 56Bit */ -#define ETH_MACCR_IFG_48Bit 0x000C0000U /* Minimum IFG between frames during transmission is 48Bit */ -#define ETH_MACCR_IFG_40Bit 0x000E0000U /* Minimum IFG between frames during transmission is 40Bit */ -#define ETH_MACCR_DCRS 0x00010000U /* Disable Carrier sense during transmission */ -#define ETH_MACCR_PS 0x00008000U /* PORT Select */ -#define ETH_MACCR_FES 0x00000010U /* Fast ethernet speed */ -#define ETH_MACCR_DO 0x00002000U /* Disable Receive own */ -#define ETH_MACCR_LM 0x00001000U /* loopback mode */ -#define ETH_MACCR_DM 0x00000800U /* Duplex mode */ -#define ETH_MACCR_IPC 0x00000400U /* IP Checksum offload */ -#define ETH_MACCR_DR 0x00000200U /* Disable Retry */ -#define ETH_MACCR_APCS 0x00000080U /* Automatic Pad/CRC stripping */ -#define ETH_MACCR_BL 0x00000060U /* Back-off limit mask The random integer (r) of slot time delays where r takes the value in the range 0 = r < 2k*/ - -#define ETH_MACCR_BL_10 0x00000000U /* k = min (n, 10) */ -#define ETH_MACCR_BL_8 0x00000020U /* k = min (n, 8) */ -#define ETH_MACCR_BL_4 0x00000040U /* k = min (n, 4) */ -#define ETH_MACCR_BL_1 0x00000060U /* k = min (n, 1) */ -#define ETH_MACCR_DC 0x00000010U /* Defferal check */ -#define ETH_MACCR_TE 0x00000008U /* Transmitter enable */ -#define ETH_MACCR_RE 0x00000004U /* Receiver enable */ - - -/* Ethernet MAC Frame Filter Register */ -#define ETH_MACFFR_RA 0x80000000U /* Receive all */ -#define ETH_MACFFR_HPF 0x00000400U /* Hash or perfect filter */ -#define ETH_MACFFR_SAF 0x00000200U /* Source address filter enable */ -#define ETH_MACFFR_SAIF 0x00000100U /* SA inverse filtering */ -#define ETH_MACFFR_PCF 0x000000C0U /* Pass control frames: 3 cases */ -#define ETH_MACFFR_PCF_BlockAll 0x00000040U /* MAC filters all control frames from reaching the application */ -#define ETH_MACFFR_PCF_ForwardAll 0x00000080U /* MAC forwards all control frames to application even if they fail the Address Filter */ -#define ETH_MACFFR_PCF_ForwardPassedAddrFilter 0x000000C0U /* MAC forwards control frames that pass the Address Filter. */ -#define ETH_MACFFR_DBF 0x00000020U /* Disable Broadcast Frames */ -#define ETH_MACFFR_PM 0x00000010U /* Pass all mutlicast */ -#define ETH_MACFFR_DAIF 0x00000008U /* DA Inverse filtering */ -#define ETH_MACFFR_HMC 0x00000004U /* Hash multicast */ -#define ETH_MACFFR_HUC 0x00000002U /* Hash unicast */ -#define ETH_MACFFR_PR 0x00000001U /* Promiscuous mode */ - -/*Ethernet MAC Hash Table High Register */ -#define ETH_MACHTHR_HTH 0xFFFFFFFFU /* Hash table high */ - - -/*Ethernet MAC Hash Table Low Register */ -#define ETH_MACHTLR_HTL 0xFFFFFFFFU /* Hash table low */ - -/*Ethernet MAC MII Address Register */ -#define ETH_MACMIIAR_PA 0x0000F800U /* Physical layer address */ -#define ETH_MACMIIAR_MR 0x000007C0U /* MII register in the selected PHY */ -#define ETH_MACMIIAR_CR 0x0000001CU /* CR clock range: 6 cases */ -#define ETH_MACMIIAR_CR_Div42 0x00000000U /* HCLK:60-100 MHz; MDC clock= HCLK/42 */ -#define ETH_MACMIIAR_CR_Div62 0x00000004U /* HCLK:100-150 MHz; MDC clock= HCLK/62 */ -#define ETH_MACMIIAR_CR_Div16 0x00000008U /* HCLK:20-35 MHz; MDC clock= HCLK/16 */ -#define ETH_MACMIIAR_CR_Div26 0x0000000CU /* HCLK:35-60 MHz; MDC clock= HCLK/26 */ -#define ETH_MACMIIAR_CR_Div102 0x00000010U /* HCLK:150-180 MHz; MDC clock= HCLK/102 */ -#define ETH_MACMIIAR_MW 0x00000002U /* MII write */ -#define ETH_MACMIIAR_MB 0x00000002U /* MII busy */ - -/*Ethernet MAC MII Data Register */ -#define ETH_MACMIIDR_GD 0x0000FFFFU /* MII data: read/write data from/to PHY */ - -/*Ethernet MAC Flow Control Register */ -#define ETH_MACFCR_PT 0xFFFF0000U /* Pause time */ -#define ETH_MACFCR_DZPQ 0x00000080U /* Disable Zero-Quanta Pause */ -#define ETH_MACFCR_PLT 0x00000030U /* Pause low threshold */ -#define ETH_MACFCR_PLT_Minus4 0x00000000U /* Pause time minus 4 slot times */ -#define ETH_MACFCR_PLT_Minus28 0x00000010U /* Pause time minus 28 slot times */ -#define ETH_MACFCR_PLT_Minus144 0x00000020U /* Pause time minus 144 slot times */ -#define ETH_MACFCR_PLT_Minus256 0x00000030U /* Pause time minus 256 slot times */ -#define ETH_MACFCR_UP 0x00000008U /* Unicast pause frame detect */ -#define ETH_MACFCR_RFE 0x00000004U /* Receive flow control enable */ -#define ETH_MACFCR_TFE 0x00000002U /* Transmit flow control enable */ -#define ETH_MACFCR_FCBBPA 0x00000001U /* Flow control busy/backpressure activate */ - -/*Ethernet MAC VLAN Tag Register */ -#define ETH_MACVLANTR_VLANTI 0x0000FFFFU /* VLAN tag identifier (for receive frames) */ - -/*Ethernet MAC Remote Wake-UpFrame Filter Register */ -#define ETH_MACRWUFFR_D 0xFFFFFFFF /* Wake-up frame filter register data */ - -/*Ethernet MAC PMT Control and Status Register */ -#define ETH_MACPMTCSR_WFFRPR 0x80000000 /* Wake-Up Frame Filter Register Pointer Reset */ -#define ETH_MACPMTCSR_GU 0x00000200 /* Global Unicast */ -#define ETH_MACPMTCSR_WFR 0x00000040 /* Wake-Up Frame Received */ -#define ETH_MACPMTCSR_MPR 0x00000020 /* Magic Packet Received */ -#define ETH_MACPMTCSR_WFE 0x00000004 /* Wake-Up Frame Enable */ -#define ETH_MACPMTCSR_MPE 0x00000002 /* Magic Packet Enable */ -#define ETH_MACPMTCSR_PD 0x00000001 /* Power Down */ - -/*Ethernet MAC Status Register */ -#define ETH_MACSR_MMCTS 0x00000040U /* MMC transmit status */ -#define ETH_MACSR_MMCRS 0x00000020U /* MMC receive status */ -#define ETH_MACSR_MMCS 0x00000010U /* MMC status */ -#define ETH_MACSR_PMTS 0x00000008U /* PMT status */ - -/* Ethernet MAC Interrupt Mask Register */ -#define ETH_MACIMR_PMTIM 0x00000008U /* PMT interrupt mask */ - -/* Ethernet MAC Address0 High Register */ -#define ETH_MACA0HR_MACA0H 0x0000FFFFU /* MAC address0 high */ - -/* Ethernet MAC Address0 Low Register */ -#define ETH_MACA0LR_MACA0L 0xFFFFFFFFU /* MAC address0 low */ - -/* Ethernet MAC Address1 High Register */ -#define ETH_MACA1HR_AE 0x80000000U /* Address enable */ -#define ETH_MACA1HR_SA 0x40000000U /* Source address */ -#define ETH_MACA1HR_MBC 0x3F000000U /* Mask byte control: bits to mask for comparison of the MAC Address bytes */ -#define ETH_MACA1HR_MBC_HBits15_8 0x20000000U /* Mask MAC Address high reg bits [15:8] */ -#define ETH_MACA1HR_MBC_HBits7_0 0x10000000U /* Mask MAC Address high reg bits [7:0] */ -#define ETH_MACA1HR_MBC_LBits31_24 0x08000000U /* Mask MAC Address low reg bits [31:24] */ -#define ETH_MACA1HR_MBC_LBits23_16 0x04000000U /* Mask MAC Address low reg bits [23:16] */ -#define ETH_MACA1HR_MBC_LBits15_8 0x02000000U /* Mask MAC Address low reg bits [15:8] */ -#define ETH_MACA1HR_MBC_LBits7_0 0x01000000U /* Mask MAC Address low reg bits [7:0] */ -#define ETH_MACA1HR_MACA1H 0x0000FFFFU /* MAC address1 high */ - -/* Ethernet MAC Address1 Low Register */ -#define ETH_MACA1LR_MACA1L 0xFFFFFFFFU /* MAC address1 low */ - -/* Ethernet MAC Address2 High Register */ -#define ETH_MACA2HR_AE 0x80000000U /* Address enable */ -#define ETH_MACA2HR_SA 0x40000000U /* Source address */ -#define ETH_MACA2HR_MBC 0x3F000000U /* Mask byte control */ -#define ETH_MACA2HR_MBC_HBits15_8 0x20000000U /* Mask MAC Address high reg bits [15:8] */ -#define ETH_MACA2HR_MBC_HBits7_0 0x10000000U /* Mask MAC Address high reg bits [7:0] */ -#define ETH_MACA2HR_MBC_LBits31_24 0x08000000U /* Mask MAC Address low reg bits [31:24] */ -#define ETH_MACA2HR_MBC_LBits23_16 0x04000000U /* Mask MAC Address low reg bits [23:16] */ -#define ETH_MACA2HR_MBC_LBits15_8 0x02000000U /* Mask MAC Address low reg bits [15:8] */ -#define ETH_MACA2HR_MBC_LBits7_0 0x01000000U /* Mask MAC Address low reg bits [70] */ -#define ETH_MACA2HR_MACA2H 0x0000FFFFU /* MAC address1 high */ - -/*Ethernet MAC Address2 Low Register */ -#define ETH_MACA2LR_MACA2L 0xFFFFFFFFU /* MAC address2 low */ - -/* Ethernet MAC Address3 High Register */ -#define ETH_MACA3HR_AE 0x80000000U /* Address enable */ -#define ETH_MACA3HR_SA 0x40000000U /* Source address */ -#define ETH_MACA3HR_MBC 0x3F000000U /* Mask byte control */ -#define ETH_MACA3HR_MBC_HBits15_8 0x20000000U /* Mask MAC Address high reg bits [15:8] */ -#define ETH_MACA3HR_MBC_HBits7_0 0x10000000U /* Mask MAC Address high reg bits [7:0] */ -#define ETH_MACA3HR_MBC_LBits31_24 0x08000000U /* Mask MAC Address low reg bits [31:24] */ -#define ETH_MACA3HR_MBC_LBits23_16 0x04000000U /* Mask MAC Address low reg bits [23:16] */ -#define ETH_MACA3HR_MBC_LBits15_8 0x02000000U /* Mask MAC Address low reg bits [15:8] */ -#define ETH_MACA3HR_MBC_LBits7_0 0x01000000U /* Mask MAC Address low reg bits [70] */ -#define ETH_MACA3HR_MACA3H 0x0000FFFFU /* MAC address3 high */ - -/* Ethernet MAC Address3 Low Register */ -#define ETH_MACA3LR_MACA3L 0xFFFFFFFFU /* MAC address3 low */ - -/* Ethernet MMC Contol Register */ -#define ETH_MMCCR_MCF 0x00000008U /* MMC Counter Freeze */ -#define ETH_MMCCR_ROR 0x00000004U /* Reset on Read */ -#define ETH_MMCCR_CSR 0x00000002U /* Counter Stop Rollover */ -#define ETH_MMCCR_CR 0x00000001U /* Counters Reset */ - -/* Ethernet MMC Receive Interrupt Register */ -#define ETH_MMCRIR_RFCES 0x00000020U /* Set when Rx crc error counter reaches half the maximum value */ - -/* MMC Transmit Interrupt Register */ -#define ETH_MMCTIR_TGFS 0x00200000U /* Set when Tx good frame count counter reaches half the maximum value */ -#define ETH_MMCTIR_TGFSCS 0x00004000U /* Set when Tx good single col counter reaches half the maximum value */ - -/*Ethernet MMC Receive Interrupt Mask Register */ -#define ETH_MMCRIMR_RFCEM 0x00000020U /* Mask the interrupt when Rx crc error counter reaches half the maximum value */ - -/*Ethernet MMC Transmit Interrupt Mask Register */ -#define ETH_MMCTIMR_TGFM 0x00200000U /* Mask the interrupt when Tx good frame count counter reaches half the maximum value */ -#define ETH_MMCTIMR_TGFSCM 0x00004000U /* Mask the interrupt when Tx good single col counter reaches half the maximum value */ - -/* DMA Bus Mode Register */ -#define ETH_DMABMR_AAB 0x02000000U /* Address-Aligned beats */ -#define ETH_DMABMR_FPM 0x01000000U /* 4xPBL mode */ -#define ETH_DMABMR_USP 0x00800000U /* Use separate PBL */ -#define ETH_DMABMR_RDP 0x007E0000U /* RxDMA PBL */ -#define ETH_DMABMR_RDP_1Beat 0x00020000U /* maximum number of beats to be transferred in one RxDMA transaction is 1 */ -#define ETH_DMABMR_RDP_2Beat 0x00040000U /* maximum number of beats to be transferred in one RxDMA transaction is 2 */ -#define ETH_DMABMR_RDP_4Beat 0x00080000U /* maximum number of beats to be transferred in one RxDMA transaction is 4 */ -#define ETH_DMABMR_RDP_8Beat 0x00100000U /* maximum number of beats to be transferred in one RxDMA transaction is 8 */ -#define ETH_DMABMR_RDP_16Beat 0x00200000U /* maximum number of beats to be transferred in one RxDMA transaction is 16 */ -#define ETH_DMABMR_RDP_32Beat 0x00400000U /* maximum number of beats to be transferred in one RxDMA transaction is 32 */ -#define ETH_DMABMR_RDP_4xPBL_4Beat 0x01020000U /* maximum number of beats to be transferred in one RxDMA transaction is 4 */ -#define ETH_DMABMR_RDP_4xPBL_8Beat 0x01040000U /* maximum number of beats to be transferred in one RxDMA transaction is 8 */ -#define ETH_DMABMR_RDP_4xPBL_16Beat 0x01080000U /* maximum number of beats to be transferred in one RxDMA transaction is 16 */ -#define ETH_DMABMR_RDP_4xPBL_32Beat 0x01100000U /* maximum number of beats to be transferred in one RxDMA transaction is 32 */ -#define ETH_DMABMR_RDP_4xPBL_64Beat 0x01200000U /* maximum number of beats to be transferred in one RxDMA transaction is 64 */ -#define ETH_DMABMR_RDP_4xPBL_128Beat 0x01400000U /* maximum number of beats to be transferred in one RxDMA transaction is 128 */ -#define ETH_DMABMR_FB 0x00010000U /* Fixed Burst */ -#define ETH_DMABMR_RTPR 0x0000C000U /* Rx Tx priority ratio */ -#define ETH_DMABMR_RTPR_1_1 0x00000000U /* Rx Tx priority ratio */ -#define ETH_DMABMR_RTPR_2_1 0x00004000U /* Rx Tx priority ratio */ -#define ETH_DMABMR_RTPR_3_1 0x00008000U /* Rx Tx priority ratio */ -#define ETH_DMABMR_RTPR_4_1 0x0000C000U /* Rx Tx priority ratio */ -#define ETH_DMABMR_PBL 0x00003F00U /* Programmable burst length */ -#define ETH_DMABMR_PBL_1Beat 0x00000100U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 1 */ -#define ETH_DMABMR_PBL_2Beat 0x00000200U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 2 */ -#define ETH_DMABMR_PBL_4Beat 0x00000400U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */ -#define ETH_DMABMR_PBL_8Beat 0x00000800U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */ -#define ETH_DMABMR_PBL_16Beat 0x00001000U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */ -#define ETH_DMABMR_PBL_32Beat 0x00002000U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */ -#define ETH_DMABMR_PBL_4xPBL_4Beat 0x01000100U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */ -#define ETH_DMABMR_PBL_4xPBL_8Beat 0x01000200U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */ -#define ETH_DMABMR_PBL_4xPBL_16Beat 0x01000400U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */ -#define ETH_DMABMR_PBL_4xPBL_32Beat 0x01000800U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */ -#define ETH_DMABMR_PBL_4xPBL_64Beat 0x01001000U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 64 */ -#define ETH_DMABMR_PBL_4xPBL_128Beat 0x01002000U /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 128 */ -#define ETH_DMABMR_DSL 0x0000007CU /* Descriptor Skip Length */ -#define ETH_DMABMR_DA 0x00000002U /* DMA arbitration scheme */ -#define ETH_DMABMR_SR 0x00000001U /* Software reset */ - -/* DMA Transmit Poll Demand Register */ -#define ETH_DMATPDR_TPD 0xFFFFFFFFU /* Transmit poll demand */ - -/* DMA Receive Poll Demand Register */ -#define ETH_DMARPDR_RPD 0xFFFFFFFFU - -/* DMA Receive Descriptor List Address Register */ -#define ETH_DMARDLAR_SRL 0xFFFFFFFFU /* Start of receive list */ - -/* DMA Transmit Descriptor List Address Register */ -#define ETH_DMATDLAR_STL 0xFFFFFFFFU /* Start of transmit list */ - -/* DMA Status Register */ -#define ETH_DMASR_PMTS 0x10000000U /* PMT status */ -#define ETH_DMASR_MMCS 0x08000000U /* MMC status */ -#define ETH_DMASR_EBS 0x03800000U /* Error bits status */ -#define ETH_DMASR_EBS_DescAccess 0x02000000U /* Error bits 0-data buffer, 1-desc. access */ -#define ETH_DMASR_EBS_ReadTransf 0x01000000U /* Error bits 0-write trnsfer, 1-read transfer */ -#define ETH_DMASR_EBS_DataTransfTx 0x00800000U /* Error bits 0-Data transfer by Rx DMA, 1-Tx DMA */ -#define ETH_DMASR_TPS 0x00700000U /* Transmit process state */ -#define ETH_DMASR_TPS_Stopped 0x00000000U /* Stopped - Reset or Stop Tx Command issued */ -#define ETH_DMASR_TPS_Fetching 0x00100000U /* Running - fetching the Tx descriptor */ -#define ETH_DMASR_TPS_Waiting 0x00200000U /* Running - waiting for status */ -#define ETH_DMASR_TPS_Reading 0x00300000U /* Running - reading the data from host memory */ -#define ETH_DMASR_TPS_Suspended 0x00600000U /* Suspended - Tx Descriptor unavailabe */ -#define ETH_DMASR_TPS_Closing 0x00700000U /* Running - closing Rx descriptor */ -#define ETH_DMASR_RPS 0x000E0000U /* Receive process state */ -#define ETH_DMASR_RPS_Stopped 0x00000000U /* Stopped - Reset or Stop Rx Command issued */ -#define ETH_DMASR_RPS_Fetching 0x00020000U /* Running - fetching the Rx descriptor */ -#define ETH_DMASR_RPS_Waiting 0x00060000U /* Running - waiting for packet */ -#define ETH_DMASR_RPS_Suspended 0x00080000U /* Suspended - Rx Descriptor unavailable */ -#define ETH_DMASR_RPS_Closing 0x000A0000U /* Running - closing descriptor */ -#define ETH_DMASR_RPS_Queuing 0x000E0000U /* Running - queuing the recieve frame into host memory */ -#define ETH_DMASR_NIS 0x00010000U /* Normal interrupt summary */ -#define ETH_DMASR_AIS 0x00008000U /* Abnormal interrupt summary */ -#define ETH_DMASR_ERI 0x00004000U /* Early receive interrupt */ -#define ETH_DMASR_FBEI 0x00002000U /* Fatal bus error Interrupt */ -#define ETH_DMASR_ETI 0x00000400U /* Early transmit Interrupt */ -#define ETH_DMASR_RWT 0x00000200U /* Receive watchdog timeout status */ -#define ETH_DMASR_RPSS 0x00000100U /* Receive process stopped status */ -#define ETH_DMASR_RBU 0x00000080U /* Receive buffer unavailable status */ -#define ETH_DMASR_RI 0x00000040U /* Receive interrupt status */ -#define ETH_DMASR_TUNF 0x00000020U /* Transmit underflow status */ -#define ETH_DMASR_ROVF 0x00000010U /* Receive overflow status */ -#define ETH_DMASR_TJT 0x00000008U /* Transmit jabber timeout status */ -#define ETH_DMASR_TBU 0x00000004U /* Transmit buffer unavailable status */ -#define ETH_DMASR_TPSS 0x00000002U /* Transmit process stopped status */ -#define ETH_DMASR_TI 0x00000001U /* Transmit interrupt status */ - -/* DMA Operation Mode Register */ -#define ETH_DMAOMR_DT 0x04000000U /* Disable Dropping of TCP/IP checksum error frames */ -#define ETH_DMAOMR_RSF 0x02000000U /* Receive store and forward */ -#define ETH_DMAOMR_DFF 0x01000000U /* Disable flushing of received frames */ -#define ETH_DMAOMR_TSF 0x00200000U /* Transmit store and forward */ -#define ETH_DMAOMR_FTF 0x00100000U /* Flush transmit FIFO */ -#define ETH_DMAOMR_TTC 0x0001C000U /* Transmit threshold control */ -#define ETH_DMAOMR_TTC_64Bytes 0x00000000U /* threshold level of the MTL Transmit FIFO is 64 Bytes */ -#define ETH_DMAOMR_TTC_128Bytes 0x00004000U /* threshold level of the MTL Transmit FIFO is 128 Bytes */ -#define ETH_DMAOMR_TTC_192Bytes 0x00008000U /* threshold level of the MTL Transmit FIFO is 192 Bytes */ -#define ETH_DMAOMR_TTC_256Bytes 0x0000C000U /* threshold level of the MTL Transmit FIFO is 256 Bytes */ -#define ETH_DMAOMR_TTC_40Bytes 0x00010000U /* threshold level of the MTL Transmit FIFO is 40 Bytes */ -#define ETH_DMAOMR_TTC_32Bytes 0x00014000U /* threshold level of the MTL Transmit FIFO is 32 Bytes */ -#define ETH_DMAOMR_TTC_24Bytes 0x00018000U /* threshold level of the MTL Transmit FIFO is 24 Bytes */ -#define ETH_DMAOMR_TTC_16Bytes 0x0001C000U /* threshold level of the MTL Transmit FIFO is 16 Bytes */ -#define ETH_DMAOMR_ST 0x00002000U /* Start/stop transmission command */ -#define ETH_DMAOMR_FEF 0x00000080U /* Forward error frames */ -#define ETH_DMAOMR_FUF 0x00000040U /* Forward undersized good frames */ -#define ETH_DMAOMR_RTC 0x00000018U /* receive threshold control */ -#define ETH_DMAOMR_RTC_64Bytes 0x00000000U /* threshold level of the MTL Receive FIFO is 64 Bytes */ -#define ETH_DMAOMR_RTC_32Bytes 0x00000008U /* threshold level of the MTL Receive FIFO is 32 Bytes */ -#define ETH_DMAOMR_RTC_96Bytes 0x00000010U /* threshold level of the MTL Receive FIFO is 96 Bytes */ -#define ETH_DMAOMR_RTC_128Bytes 0x00000018U /* threshold level of the MTL Receive FIFO is 128 Bytes */ -#define ETH_DMAOMR_OSF 0x00000004U /* operate on second frame */ -#define ETH_DMAOMR_SR 0x00000002U /* Start/stop receive */ - -/* DMA Interrupt Enable Register */ -#define ETH_DMAIER_NIE 0x00010000U /* Normal interrupt summary enable */ -#define ETH_DMAIER_AIE 0x00008000U /* Abnormal interrupt summary enable */ -#define ETH_DMAIER_ERIE 0x00004000U /* Early receive interrupt enable */ -#define ETH_DMAIER_FBIE 0x00002000U /* Fatal bus error interrupt enable */ -#define ETH_DMAIER_ETIE 0x00000400U /* Early transmit interrupt enable */ -#define ETH_DMAIER_RWIE 0x00000200U /* Receive watchdog timeout interrupt enable */ -#define ETH_DMAIER_RSIE 0x00000100U /* Receive process stopped interrupt enable */ -#define ETH_DMAIER_RUIE 0x00000080U /* Receive buffer unavailable interrupt enable */ -#define ETH_DMAIER_RIE 0x00000040U /* Receive interrupt enable */ -#define ETH_DMAIER_TUIE 0x00000020U /* Transmit Underflow interrupt enable */ -#define ETH_DMAIER_ROIE 0x00000010U /* Receive Overflow interrupt enable */ -#define ETH_DMAIER_TJIE 0x00000008U /* Transmit jabber timeout interrupt enable */ -#define ETH_DMAIER_TBUIE 0x00000004U /* Transmit buffer unavailable interrupt enable */ -#define ETH_DMAIER_TSIE 0x00000002U /* Transmit process stopped interrupt enable */ -#define ETH_DMAIER_TIE 0x00000001U /* Transmit interrupt enable */ - -/* DMA Missed Frame and Buffer Overflow Counter Register */ -#define ETH_DMAMFBOCR_OFOC 0x10000000U /* Overflow bit for FIFO overflow counter */ -#define ETH_DMAMFBOCR_MFA 0x0FFE0000U /* Number of frames missed by the application */ -#define ETH_DMAMFBOCR_OMFC 0x00010000U /* Overflow bit for missed frame counter */ -#define ETH_DMAMFBOCR_MFC 0x0000FFFFU /* Number of frames missed by the controller */ - -/* DMA Current Host Transmit Descriptor Register */ -#define ETH_DMACHTDR_HTDAP 0xFFFFFFFFU /* Host transmit descriptor address pointer */ - -/* DMA Current Host Receive Descriptor Register */ -#define ETH_DMACHRDR_HRDAP 0xFFFFFFFFU /* Host receive descriptor address pointer */ - -/* DMA Current Host Transmit Buffer Address Register */ -#define ETH_DMACHTBAR_HTBAP 0xFFFFFFFFU /* Host transmit buffer address pointer */ - -/* DMA Current Host Receive Buffer Address Register */ -#define ETH_DMACHRBAR_HRBAP 0xFFFFFFFFU /* Host receive buffer address pointer */ - -typedef struct _ETH_PIN_config { - uint8_t port; - uint8_t pin; - uint8_t mode; - uint8_t pad_sel; -} ETH_PIN_Config; - -/* EMAC Driver Control Information */ -typedef struct { - ARM_ETH_MAC_SignalEvent_t cb_event; // Event callback - uint8_t flags; // Control and state flags - uint8_t tx_index; // Transmit descriptor index - uint8_t rx_index; // Receive descriptor index -#if (EMAC_CHECKSUM_OFFLOAD) - bool tx_cks_offload; // Checksum offload enabled/disabled -#endif -#if (EMAC_TIME_STAMP) - uint8_t tx_ts_index; // Transmit Timestamp descriptor index -#endif - uint8_t *frame_end; // End of assembled frame fragments -} EMAC_CTRL; - diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/MCI.c b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/MCI.c deleted file mode 100644 index a5069308d..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/MCI.c +++ /dev/null @@ -1,1118 +0,0 @@ - /* -------------------------------------------------------------------------- - * Copyright (c) 2013-2016 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 02. March 2016 - * $Revision: V1.1 - * - * Driver: Driver_MCI0 - * Configured: via RTE_Device.h configuration file - * Project: MCI Driver for RS1xxxx - */ - -/* History: - * Version 1.0 - * Initial release - */ -#include "rsi_ccp_user_config.h" -#if defined(CHIP_9118) -#include "MCI.h" - - - -#define SDHC_IRQHandler IRQ068_Handler -#define ARM_MCI_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,2) /* driver version */ -static MCI_CTRL MCI; - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_MCI_API_VERSION, - ARM_MCI_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_MCI_CAPABILITIES DriverCapabilities = { - RTE_MCI_CD_PIN, /* cd_state */ - 0, /* cd_event */ - RTE_MCI_WP_PIN, /* wp_state */ - 0, /* vdd */ - 0, /* vdd_1v8 */ - 0, /* vccq */ - 0, /* vccq_1v8 */ - 0, /* vccq_1v2 */ - RTE_MCI_BUS_WIDTH_4, /* data_width_4 */ - RTE_MCI_BUS_WIDTH_8, /* data_width_8 */ - 0, /* data_width_4_ddr */ - 0, /* data_width_8_ddr */ - 1, /* high_speed */ - 0, /* uhs_signaling */ - 0, /* uhs_tuning */ - 0, /* uhs_sdr50 */ - 0, /* uhs_sdr104 */ - 0, /* uhs_ddr50 */ - 0, /* uhs_driver_type_a */ - 0, /* uhs_driver_type_c */ - 0, /* uhs_driver_type_d */ - 0, /* sdio_interrupt */ - 0, /* read_wait */ - 0, /* suspend_resume */ - 0, /* mmc_interrupt */ - 0, /* mmc_boot */ - 0, /* rst_n */ - 0, /* ccs */ - 0 /* ccs_timeout */ -}; - -/*********functions************/ -static MCI_ADMA_DESC_TABLE_T Adma2DescriptorTable[2] = { 0 }; - -/** - * @fn ARM_DRIVER_VERSION MCI_GetVersion(void) - * @brief Get Driver Version. - * @param[in] none - * @return ARM DRIVER VERSION - */ -static ARM_DRIVER_VERSION MCI_GetVersion(void) -{ - return DriverVersion; -} - -/** - * @fn ARM_MCI_CAPABILITIES MCI_GetCapabilities(void) - * @brief Get Driver capabilities. - * @param[in] none - * @return ARM_MCI_CAPABILITIES - */ -static ARM_MCI_CAPABILITIES MCI_GetCapabilities(void) -{ - return DriverCapabilities; -} - -/** - * @fn int32_t MCI_Initialize(ARM_MCI_SignalEvent_t cb_event) - * @brief Initialize the Memory Card Interface. - * @param[in] cb_event Pointer to the ARM_MCI_SignalEvent - * @return excecution status - */ -static int32_t MCI_Initialize(ARM_MCI_SignalEvent_t cb_event) -{ - if (MCI.flags & MCI_INIT) - { - return ARM_DRIVER_OK; - } - - MCI.cb_event = cb_event; - - /* Clear status */ - MCI.status.command_active = 0U; - MCI.status.command_timeout = 0U; - MCI.status.command_error = 0U; - MCI.status.transfer_active = 0U; - MCI.status.transfer_timeout = 0U; - MCI.status.transfer_error = 0U; - MCI.status.sdio_interrupt = 0U; - MCI.status.ccs = 0U; - - /*Configure clock gpio pin*/ - if(RTE_MCI_CLK_PIN == 25) - { - RSI_EGPIO_HostPadsGpioModeEnable(25); - } - RSI_EGPIO_PadSelectionEnable(RTE_MCI_CLOCK_PAD); - RSI_EGPIO_PadReceiverEnable(RTE_MCI_CLK_PIN); - RSI_EGPIO_SetPinMux(EGPIO,RTE_MCI_CLOCK_PORT,RTE_MCI_CLK_PIN,EGPIO_PIN_MUX_MODE8); - - if(RTE_MCI_CD_PIN) - { - /*Configure cd gpio pin*/ - RSI_EGPIO_PadSelectionEnable(RTE_MCI_CDD_PAD); - RSI_EGPIO_PadReceiverEnable(RTE_MCI_CDD_PIN); - RSI_EGPIO_PadDriverDisableState(RTE_MCI_CDD_PIN,Pulldown); - RSI_EGPIO_SetPinMux(EGPIO,RTE_MCI_CD_PORT,RTE_MCI_CDD_PIN,EGPIO_PIN_MUX_MODE8); - } - if(RTE_MCI_WP_PIN) - { - /*Configure write protect gpio pin*/ - RSI_EGPIO_PadSelectionEnable(RTE_MCI_WPP_PAD); - RSI_EGPIO_PadReceiverEnable(RTE_MCI_WPP_PIN); - RSI_EGPIO_PadDriverDisableState(RTE_MCI_WPP_PIN,Pulldown); - RSI_EGPIO_SetPinMux(EGPIO,RTE_MCI_WP_PORT,RTE_MCI_WPP_PIN,EGPIO_PIN_MUX_MODE8); - } - - /*Configure command gpio pin*/ - if(RTE_MCI_CMD_PIN == 26) - { - RSI_EGPIO_HostPadsGpioModeEnable(26); - } - RSI_EGPIO_PadSelectionEnable(RTE_MCI_CMD_PAD); - RSI_EGPIO_PadReceiverEnable(RTE_MCI_CMD_PIN); - RSI_EGPIO_PadDriverDisableState(RTE_MCI_CMD_PIN,Pullup); - RSI_EGPIO_SetPinMux(EGPIO,RTE_MCI_CMD_PORT,RTE_MCI_CMD_PIN,EGPIO_PIN_MUX_MODE8); - - /*Configure data0 gpio pin*/ - if(RTE_MCI_DATA0_PIN == 27) - { - RSI_EGPIO_HostPadsGpioModeEnable(27); - } - RSI_EGPIO_PadSelectionEnable(RTE_MCI_DATA0_PAD); - RSI_EGPIO_PadReceiverEnable(RTE_MCI_DATA0_PIN); - RSI_EGPIO_PadDriverDisableState(RTE_MCI_DATA0_PIN,Pullup); - RSI_EGPIO_SetPinMux(EGPIO,RTE_MCI_DATA0_PORT,RTE_MCI_DATA0_PIN,EGPIO_PIN_MUX_MODE8); - -#if(RTE_SDMMC_BUS_WIDTH_4) /* SD_DAT[3..1] */ - /*Configure data1 gpio pin*/ - if(RTE_MCI_DATA1_PIN == 28) - { - RSI_EGPIO_HostPadsGpioModeEnable(28); - } - RSI_EGPIO_PadSelectionEnable(RTE_MCI_DATA1_PAD); - RSI_EGPIO_PadReceiverEnable(RTE_MCI_DATA1_PIN); - RSI_EGPIO_PadDriverDisableState(RTE_MCI_DATA1_PIN,Pullup); - RSI_EGPIO_SetPinMux(EGPIO,RTE_MCI_DATA1_PORT,RTE_MCI_DATA1_PIN,EGPIO_PIN_MUX_MODE8); - - /*Configure data2 gpio pin*/ - if(RTE_MCI_DATA2_PIN == 29) - { - RSI_EGPIO_HostPadsGpioModeEnable(29); - } - RSI_EGPIO_PadSelectionEnable(RTE_MCI_DATA2_PAD); - RSI_EGPIO_PadReceiverEnable(RTE_MCI_DATA2_PIN); - RSI_EGPIO_PadDriverDisableState(RTE_MCI_DATA2_PIN,Pullup); - RSI_EGPIO_SetPinMux(EGPIO,RTE_MCI_DATA2_PORT,RTE_MCI_DATA2_PIN,EGPIO_PIN_MUX_MODE8); - - /*Configure data3 gpio pin*/ - if(RTE_MCI_DATA3_PIN == 30) - { - RSI_EGPIO_HostPadsGpioModeEnable(30); - } - RSI_EGPIO_PadSelectionEnable(RTE_MCI_DATA3_PAD); - RSI_EGPIO_PadReceiverEnable(RTE_MCI_DATA3_PIN); - RSI_EGPIO_PadDriverDisableState(RTE_MCI_DATA3_PIN,Pullup); - RSI_EGPIO_SetPinMux(EGPIO,RTE_MCI_DATA3_PORT,RTE_MCI_DATA3_PIN,EGPIO_PIN_MUX_MODE8); - -#if(RTE_SDMMC_BUS_WIDTH_8) /* RTE_SDMMC_BUS_WIDTH_8 */ - - /*Configure data4 gpio pin*/ - RSI_EGPIO_PadSelectionEnable(RTE_MCI_DATA4_PAD); - RSI_EGPIO_PadReceiverEnable(RTE_MCI_DATA4_PIN); - RSI_EGPIO_PadDriverDisableState(RTE_MCI_DATA4_PIN,Pullup); - RSI_EGPIO_SetPinMux(EGPIO,RTE_MCI_DATA4_PORT,RTE_MCI_DATA4_PIN,RTE_MCI_DATA6_MODE); - - /*Configure data5 gpio pin*/ - RSI_EGPIO_PadSelectionEnable(RTE_MCI_DATA5_PAD); - RSI_EGPIO_PadReceiverEnable(RTE_MCI_DATA5_PIN); - RSI_EGPIO_PadDriverDisableState(RTE_MCI_DATA5_PIN,Pullup); - RSI_EGPIO_SetPinMux(EGPIO,RTE_MCI_DATA5_PORT,RTE_MCI_DATA5_PIN,RTE_MCI_DATA5_MODE); - - /*Configure data6 gpio pin*/ - RSI_EGPIO_PadSelectionEnable(RTE_MCI_DATA6_PAD); - RSI_EGPIO_PadReceiverEnable(RTE_MCI_DATA6_PIN); - RSI_EGPIO_PadDriverDisableState(RTE_MCI_DATA6_PIN,Pullup); - RSI_EGPIO_SetPinMux(EGPIO,RTE_MCI_DATA6_PORT,RTE_MCI_DATA6_PIN,RTE_MCI_DATA6_MODE); - -#endif /* RTE_SDMMC_BUS_WIDTH_8 */ -#endif /* RTE_SDMMC_BUS_WIDTH_4 */ - - MCI.flags = MCI_INIT; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t MCI_UnInitialize(ARM_MCI_SignalEvent_t cb_event) - * @brief DeInitialize the Memory Card Interface. - * @param[in] none - * @return excecution status - */ -int32_t MCI_Uninitialize(void) -{ - MCI.flags = 0; - - /*Disable sdmem clock */ - SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.SD_CLOCK_ENABLE = 0u; - - return ARM_DRIVER_OK; -} -boolean_t sdioh_wait_for_card_insert( ) -{ - /* Wait until card is stable */ - while(SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_STATE_STABLE != 0x1); - return (boolean_t)SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_INSERTED; -} - -/** - * @fn int32_t MCI_PowerControl(ARM_POWER_STATE state) - * @brief Control Memory Card Interface Power. - * @param[in] state Power state - * @return excecution status - */ -int32_t MCI_PowerControl(ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - /* Disable SDHC interrupt in NVIC */ - NVIC_DisableIRQ(SDMEM_IRQn); - - /* Clear flags */ - MCI.flags = MCI_POWER; - - /* Clear status */ - MCI.status.command_active = 0U; - MCI.status.command_timeout = 0U; - MCI.status.command_error = 0U; - MCI.status.transfer_active = 0U; - MCI.status.transfer_timeout = 0U; - MCI.status.transfer_error = 0U; - MCI.status.sdio_interrupt = 0U; - MCI.status.ccs = 0U; - break; - - case ARM_POWER_FULL: - if ((MCI.flags & MCI_POWER) == 0) - { - /* Clear response variable */ - MCI.response = NULL; - - /* sleepclock prog */ - *(volatile uint32_t *) (0x46000024) = (0x0<<21); - - /* wait for clock switch */ - while((M4CLK->PLL_STAT_REG_b.SLEEP_CLK_SWITCHED) != 1); - - /* Wait for card insert */ - while (sdioh_wait_for_card_insert()==0); - - /* enable adma*/ - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.DMA_SELECT = 0x2; - - /* Enable normal interrupts*/ - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_ENABLE_REGISTER = ( - COMMAND_COMPLETE_STATUS_ENABLE | - TRANSFER_COMPLETE_STATUS_ENABLE | - BLOCK_GAP_EVENT_STATUS_ENABLE | - DMA_INTERRUPT_STATUS_ENABLE | - BUFFER_WRITE_READY_STATUS_ENABLE| - BUFFER_READ_READY_STATUS_ENABLE | - CARD_INSERTION_STATUS_ENABLE | - CARD_REMOVAL_STATUS_ENABLE | - CARD_INTERRUPT_STATUS_ENABLE | - INT_A_STATUS_ENABLE | - INT_B_STATUS_ENABLE | - INT_C_STATUS_ENABLE | - RE_TUNING_EVENT_STATUS_ENABLE ); - - /* Enable error interrupts*/ - SMIH->SMIH_ERROR_INTERRUPT_STATUS_ENABLE_REGISTER = ( - COMMAND_TIMEOUT_ERROR_STATUS_ENABLE | - COMMAND_CRC_ERROR_STATUS_ENABLE | - COMMAND_END_BIT_ERROR_STATUS_ENABLE | - COMMAND_INDEX_ERROR_STATUS_ENABLE | - DATA_TIMEOUT_ERROR_STATUS_ENABLE | - DATA_CRC_ERROR_STATUS_ENABLE | - DATA_END_BIT_ERROR_STATUS_ENABLE | - CURRENT_LIMIT_ERROR_STATUS_ENABLE | - AUTO_CMD_ERROR_STATUS_ENABLE | - ADMA_ERROR_STATUS_ENABLE | - TUNING_ERROR_STATUS_ENABLE ); - - /* Enable normal interrupts signals*/ - SMIH->SMIH_NORMAL_INTERRUPT_SIGNAL_ENABLE_REGISTER = (COMMAND_COMPLETE_SIGNAL_ENABLE | - TRANSFER_COMPLETE_SIGNAL_ENABLE | - BUFFER_WRITE_READY_SIGNAL_ENABLE | - BUFFER_READ_READY_SIGNAL_ENABLE | - CARD_REMOVAL_SIGNAL_ENABLE ); - - SMIH->SMIH_ERROR_INTERRUPT_SIGNAL_ENABLE_REGISTER = 0x1; - - /* select voltage to 3.3v*/ - SMIH->SMIH_POWER_CONTROL_REGISTER_b.SD_BUS_VOLTAGE_SELECT = 7U; - - /*power on bus*/ - SMIH->SMIH_POWER_CONTROL_REGISTER_b.SD_BUS_POWER = 0x1; - - /*configure data timeout counter value*/ - SMIH->SMIH_TIMEOUT_CONTROL_REGISTER_b.DATA_TIMEOUT_COUNTER_VALUE = 0xE; - - /* NVIC Enable*/ - NVIC_ClearPendingIRQ (SDMEM_IRQn); - NVIC_EnableIRQ (SDMEM_IRQn); - - MCI.flags |= MCI_POWER; - } - break; - case ARM_POWER_LOW: - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t MCI_CardPower(uint32_t voltage) - * @brief Set Memory Card Power supply voltage. - * @param[in] voltage : Memory Card Power supply voltage - * @return excecution status - */ -int32_t MCI_CardPower(uint32_t voltage) -{ - if ((MCI.flags & MCI_POWER) == 0U) - { - return ARM_DRIVER_ERROR; - } - return ARM_DRIVER_ERROR_UNSUPPORTED; -} - -/** - * @fn int32_t MCI_ReadCD(void) - * @brief Read Card Detect (CD) state. - * @param[in] none - * @return excecution status - */ -int32_t MCI_ReadCD(void) -{ - if(RTE_MCI_CD_PIN != 0) - { - if (MCI.flags & MCI_POWER) { - if((RSI_EGPIO_GetPin(EGPIO,RTE_MCI_CD_PORT,RTE_MCI_CDD_PIN) == 0)) - { - return (1); - } - } - } - return (0); -} - -/** - * @fn int32_t MCI_ReadWP(void) - * @brief Read Write Protect (WP) state. - * @param[in] none - * @return excecution status - */ -int32_t MCI_ReadWP(void) -{ - if(RTE_MCI_WP_PIN != 0) - { - if (MCI.flags & MCI_POWER) { - if((RSI_EGPIO_GetPin(EGPIO,RTE_MCI_WP_PORT,RTE_MCI_WPP_PIN) == 0)) - { - return (1); - } - } - } - return (0); -} - -/** - * @fn int32_t MCI_SendCommand(uint32_t cmd, uint32_t arg, uint32_t flags, uint32_t *response) - * @brief Send Command to card and get the response. - * @param[in] cmd : Memory Card command - * @param[in] arg : Command argument - * @param[in] flags : Command flags - * @param[in] response : Pointer to buffer for response - * @return excecution status - */ -int32_t MCI_SendCommand(uint32_t cmd, uint32_t arg, uint32_t flags, uint32_t *response) -{ - MCI_COMMAND_FRAME_CONFIG_T CommandCfg = { 0 }; - MCI_DATA_CONFIG_T DataCfg = { 0 }; - uint32_t i=0; - if (((flags & MCI_RESPONSE_EXPECTED) != 0U) && (response == NULL)) - { - return ARM_DRIVER_ERROR_PARAMETER; - } - if ((MCI.flags & MCI_SETUP) == 0U) - { - return ARM_DRIVER_ERROR; - } - if (MCI.status.command_active) - { - return ARM_DRIVER_ERROR_BUSY; - } - /* wait for data line free */ - if (flags & ARM_MCI_TRANSFER_DATA) { - - while( SMIH->SMIH_PRESENT_STATE_REGISTER_b.COMMAND_INHIBIT_DAT == 1); - } - while(SMIH->SMIH_PRESENT_STATE_REGISTER_b.COMMAND_INHIBIT_CMD == 1); - - MCI.status.command_active = 1U; - MCI.status.command_timeout = 0U; - MCI.status.command_error = 0U; - MCI.status.transfer_timeout = 0U; - MCI.status.transfer_error = 0U; - MCI.status.ccs = 0U; - - if (flags & ARM_MCI_CARD_INITIALIZE) - { - /* Configure sdmem internal clock */ - RSI_MCI_ClockCnfig(400000); - - /*wait for some time*/ - for(i=0;i<20000;i++); - } - CommandCfg.argument =arg; - CommandCfg.cmdIndex = cmd & 0xFF; - DataCfg.blockSize = MCI.bl_sz; - DataCfg.blockCount = MCI.bl_cnt; - - if (CommandCfg.cmdIndex == 0x0C) - { - //abort command - CommandCfg.cmdType = 3; - } - MCI.response = response; - MCI.flags &= ~MCI_RESP_LONG; - - switch (flags & ARM_MCI_RESPONSE_Msk) - { - case ARM_MCI_RESPONSE_NONE: - /* No response expected */ - break; - case ARM_MCI_RESPONSE_SHORT: - /* Short response expected */ - CommandCfg.responseType = MCI_RESPONSE_48BIT; - break; - case ARM_MCI_RESPONSE_SHORT_BUSY: - /* Short response with busy expected */ - CommandCfg.responseType = MCI_RESPONSE_48BIT_BUSY_CHECK; - break; - case ARM_MCI_RESPONSE_LONG: - MCI.flags |= MCI_RESP_LONG; - /* Long response expected */ - CommandCfg.responseType = MCI_RESPONSE_136BIT; - break; - default: - return ARM_DRIVER_ERROR; - } - if (flags & ARM_MCI_RESPONSE_INDEX) - { - /* Check for command index error */ - CommandCfg.checkCmdIndex = 1; - } - if (flags & ARM_MCI_RESPONSE_CRC) - { - /* Check for CRC error */ - CommandCfg.checkCmdCrc = 1; - } - - DataCfg.admaDespTableAddress = (uint32_t)&Adma2DescriptorTable[0]; - if (flags & ARM_MCI_TRANSFER_DATA) - { - /* Enable data transfer */ - CommandCfg.dataPresent = 1; - if (MCI.flags & MCI_DATA_READ) - { - /* Read transfer */ - DataCfg.dataTransferDirection = MCI_READ_DIRECTION; - } - if(MCI.flags & MCI_DATA_MULB) - { - /* Multiple block transfer */ - DataCfg.blockCountEnable = 1; - DataCfg.multiBlock = 1; - } - MCI.status.transfer_active = 1U; - } - /* initialize data transfer */ - RSI_MCI_DataTransferInitialization(&DataCfg); - - /* send command */ - RSI_MCI_SendCommand(&CommandCfg); - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t MCI_SetupTransfer(uint8_t *data, uint32_t block_count, uint32_t block_size, uint32_t mode) - * @brief Setup read or write transfer operation. - * @param[in] data : Pointer to data block(s) to be written or read - * @param[in] block_count : Number of blocks - * @param[in] block_size : Size of a block in bytes - * @param[in] mode : Transfer mode - * @return excecution status - */ -int32_t MCI_SetupTransfer(uint8_t *data, uint32_t block_count, uint32_t block_size, uint32_t mode) -{ - if ((data == NULL) || (block_count == 0U) || (block_size == 0U)) - { - return ARM_DRIVER_ERROR_PARAMETER; - } - if ((MCI.flags & MCI_SETUP) == 0U) - { - return ARM_DRIVER_ERROR; - } - if (MCI.status.transfer_active) - { - return ARM_DRIVER_ERROR_BUSY; - } - if (mode & ARM_MCI_TRANSFER_STREAM) - { - /* Stream or SDIO multibyte data transfer not supported by peripheral */ - return ARM_DRIVER_ERROR; - } - - SMIH->TRANSFER_MODE_REGISTER_b.DMA_ENABLE=0x1; - - memset(Adma2DescriptorTable, 0x0, sizeof(Adma2DescriptorTable)); - - /*Fill adma descriptor table*/ - Adma2DescriptorTable[0].attributeValid = 1; - Adma2DescriptorTable[0].attributeEnd = 1; - Adma2DescriptorTable[0].attributeInt = 0; - Adma2DescriptorTable[0].attributeAct = 2; - Adma2DescriptorTable[0].length = (block_size * block_count); - Adma2DescriptorTable[0]._32BIT_Adress = (uint32_t)data; - - /* Set transfer block count and size */ - MCI.bl_cnt = block_count; - MCI.bl_sz = block_size; - - if (block_count == 1) - { - /* Single block transfer */ - MCI.flags &= ~MCI_DATA_MULB; - } - else - { - /* Multiple block transfer */ - MCI.flags |= MCI_DATA_MULB; - } - - if (mode & ARM_MCI_TRANSFER_WRITE) - { - /* Direction: From controller to card */ - MCI.flags &= ~MCI_DATA_READ; - } - else - { - /* Direction: From card to controller */ - MCI.flags |= MCI_DATA_READ; - } - while( SMIH->SMIH_PRESENT_STATE_REGISTER_b.COMMAND_INHIBIT_DAT == 0x1); - return (ARM_DRIVER_OK); -} - -/** - * @fn int32_t MCI_AbortTransfer(void) - * @brief Abort current read/write data transfer. - * @param[in] none - * @return excecution status - */ -int32_t MCI_AbortTransfer(void) -{ - int32_t status; - if ((MCI.flags & MCI_SETUP) == 0U) - { - return ARM_DRIVER_ERROR; - } - status = ARM_DRIVER_OK; - - /* Disable normal interrupts*/ - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_ENABLE_REGISTER &= ~( - COMMAND_COMPLETE_STATUS_ENABLE | - TRANSFER_COMPLETE_STATUS_ENABLE | - BLOCK_GAP_EVENT_STATUS_ENABLE | - DMA_INTERRUPT_STATUS_ENABLE | - BUFFER_WRITE_READY_STATUS_ENABLE| - BUFFER_READ_READY_STATUS_ENABLE | - CARD_INSERTION_STATUS_ENABLE | - CARD_REMOVAL_STATUS_ENABLE | - CARD_INTERRUPT_STATUS_ENABLE | - INT_A_STATUS_ENABLE | - INT_B_STATUS_ENABLE | - INT_C_STATUS_ENABLE | - RE_TUNING_EVENT_STATUS_ENABLE ); - - /* Disable error interrupts*/ - SMIH->SMIH_ERROR_INTERRUPT_STATUS_ENABLE_REGISTER &= ~ ( - COMMAND_TIMEOUT_ERROR_STATUS_ENABLE | - COMMAND_CRC_ERROR_STATUS_ENABLE | - COMMAND_END_BIT_ERROR_STATUS_ENABLE | - COMMAND_INDEX_ERROR_STATUS_ENABLE | - DATA_TIMEOUT_ERROR_STATUS_ENABLE | - DATA_CRC_ERROR_STATUS_ENABLE | - DATA_END_BIT_ERROR_STATUS_ENABLE | - CURRENT_LIMIT_ERROR_STATUS_ENABLE | - AUTO_CMD_ERROR_STATUS_ENABLE | - ADMA_ERROR_STATUS_ENABLE | - TUNING_ERROR_STATUS_ENABLE ); - - /* Disable normal interrupts signals*/ - SMIH->SMIH_NORMAL_INTERRUPT_SIGNAL_ENABLE_REGISTER &= ~ (COMMAND_COMPLETE_SIGNAL_ENABLE | - TRANSFER_COMPLETE_SIGNAL_ENABLE | - BUFFER_WRITE_READY_SIGNAL_ENABLE | - BUFFER_READ_READY_SIGNAL_ENABLE | - CARD_REMOVAL_SIGNAL_ENABLE ); - SMIH->SMIH_ERROR_INTERRUPT_SIGNAL_ENABLE_REGISTER = 0x0; - - MCI.status.command_active = 0U; - MCI.status.transfer_active = 0U; - MCI.status.sdio_interrupt = 0U; - MCI.status.ccs = 0U; - - return status; -} - -/** - * @fn int32_t MCI_Control(uint32_t control, uint32_t arg) - * @brief Control MCI Interface. - * @param[in] control : Operation - * @param[in] arg : Argument of operation (optional) - * @return excecution status - */ -int32_t MCI_Control(uint32_t control, uint32_t arg) -{ - if ((MCI.flags & MCI_POWER) == 0U) - { - return ARM_DRIVER_ERROR; - } - switch (control) - { - case ARM_MCI_BUS_SPEED: - /* Bus speed configured */ - MCI.flags |= MCI_SETUP; - break; - case ARM_MCI_BUS_SPEED_MODE: - switch (arg) - { - case ARM_MCI_BUS_DEFAULT_SPEED: - /* Speed mode up to 25MHz */ - RSI_MCI_ClockCnfig(25000000); - break; - case ARM_MCI_BUS_HIGH_SPEED: - /* Speed mode up to 50MHz */ - break; - default: return ARM_DRIVER_ERROR_UNSUPPORTED; - } - break; - - case ARM_MCI_BUS_CMD_MODE: - switch (arg) - { - - case ARM_MCI_BUS_CMD_OPEN_DRAIN: - /* Configure command line in open-drain mode */ - break; - - case ARM_MCI_BUS_CMD_PUSH_PULL: - /* Configure command line in push-pull mode */ - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - break; - - case ARM_MCI_BUS_DATA_WIDTH: - switch (arg) - { - case ARM_MCI_BUS_DATA_WIDTH_1: - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.DATA_TRANSFER_WIDTH =0x0; - break; - case ARM_MCI_BUS_DATA_WIDTH_4: - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.DATA_TRANSFER_WIDTH =0x1; - break; - case ARM_MCI_BUS_DATA_WIDTH_8: - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - break; - case ARM_MCI_CONTROL_CLOCK_IDLE: - if (arg) - { - - } - else - { - - } - break; - - case ARM_MCI_DATA_TIMEOUT: - SMIH->SMIH_TIMEOUT_CONTROL_REGISTER_b.DATA_TIMEOUT_COUNTER_VALUE=0xE; - break; - - case ARM_MCI_MONITOR_SDIO_INTERRUPT: - MCI.status.sdio_interrupt = 0U; - - /* Enable card interrupt*/ - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_ENABLE_REGISTER |= CARD_INTERRUPT_STATUS_ENABLE; - - break; - - default: return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -/** - * @fn ARM_MCI_STATUS MCI_GetStatus(void) - * @brief Get MCI status. - * @param[in] none - * @return ARM_MCI_STATUS - */ -ARM_MCI_STATUS MCI_GetStatus(void) -{ - return MCI.status; -} - -/*SDHC IRQ Handler*/ -void SDHC_IRQHandler (void) -{ - uint32_t msk, event; - uint16_t normal_intr_status; - uint16_t error_intr_status; - uint32_t int_status; - - event = 0U; - /*read normal interrupt status reg*/ - normal_intr_status = SMIH->SMIH_NORMAL_INTERRUPT_STATUS_REGISTER; - - /*read error interrupt status reg*/ - error_intr_status = SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER; - - int_status = error_intr_status << 16; - int_status |= normal_intr_status; - - if (int_status & COMMANDS_INTERRUPTS) - { - int_status &= COMMANDS_INTERRUPTS; - - /* Command interrupts status */ - MCI.status.command_active = 0U; - - if ((int_status & ((COMMAND_TIMEOUT_ERROR_STATUS_ENABLE |COMMAND_CRC_ERROR_STATUS_ENABLE)<<16)) == (COMMAND_TIMEOUT_ERROR_STATUS_ENABLE <<16)) - { - /* command timeout error */ - MCI.status.command_timeout = 1U; - event = ARM_MCI_EVENT_COMMAND_TIMEOUT; - } - else if ((int_status & ((COMMAND_TIMEOUT_ERROR_STATUS_ENABLE | COMMAND_CRC_ERROR_STATUS_ENABLE) <<16)) == (COMMAND_CRC_ERROR_STATUS_ENABLE << 16)) - { - /* cmd crc error */ - MCI.status.command_error = 1U; - event = ARM_MCI_EVENT_COMMAND_ERROR; - } - else if (int_status & (COMMAND_INDEX_ERROR_STATUS_ENABLE << 16)) - { - /* Command index error */ - MCI.status.command_error = 1U; - event = ARM_MCI_EVENT_COMMAND_ERROR; - } - else if (int_status & (COMMAND_END_BIT_ERROR_STATUS_ENABLE << 16)) - { - /* Command end bit error */ - event = ARM_MCI_EVENT_COMMAND_ERROR; - } - else - { - msk = COMMAND_COMPLETE_STATUS_ENABLE | (( COMMAND_TIMEOUT_ERROR_STATUS_ENABLE | COMMAND_CRC_ERROR_STATUS_ENABLE ) << 16); - if ((int_status & msk) == COMMAND_COMPLETE_STATUS_ENABLE) - { - /* Command complete */ - if (MCI.response) - { - if (MCI.flags & MCI_RESP_LONG) - { - /* read response registers */ - MCI.response[3] = ((SMIH->SMIH_RESPONSE_REGISTER7 | SMIH->SMIH_RESPONSE_REGISTER6) << 8) | ((SMIH->SMIH_RESPONSE_REGISTER5 | SMIH->SMIH_RESPONSE_REGISTER4) >> 24); - MCI.response[2] = ((SMIH->SMIH_RESPONSE_REGISTER5 | SMIH->SMIH_RESPONSE_REGISTER4) << 8) | ((SMIH->SMIH_RESPONSE_REGISTER3 | SMIH->SMIH_RESPONSE_REGISTER2) >> 24); - MCI.response[1] = ((SMIH->SMIH_RESPONSE_REGISTER3 | SMIH->SMIH_RESPONSE_REGISTER2) << 8) | ((SMIH->SMIH_RESPONSE_REGISTER1 | SMIH->SMIH_RESPONSE_REGISTER0) >> 24); - MCI.response[0] = ((SMIH->SMIH_RESPONSE_REGISTER1 |SMIH->SMIH_RESPONSE_REGISTER0) << 8); - } - else - { - MCI.response[0] = SDMEM_RESPONSE_REG; - } - } - event = ARM_MCI_EVENT_COMMAND_COMPLETE; - } - } - } - if (int_status & DATA_INTERRUPTS) - { - int_status &= DATA_INTERRUPTS; - /* Data interrupts status */ - MCI.status.transfer_active = 0U; - - msk = ((DATA_CRC_ERROR_STATUS_ENABLE | DATA_END_BIT_ERROR_STATUS_ENABLE | ADMA_ERROR_STATUS_ENABLE) << 16); - if (int_status & msk) { - /* data crc or data end bit or DMA errors */ - MCI.status.transfer_error = 1U; - event = ARM_MCI_EVENT_TRANSFER_ERROR; - } - else if (int_status & (DATA_TIMEOUT_ERROR_STATUS_ENABLE << 16)) { - /* Data transfer timeout error */ - MCI.status.transfer_timeout = 1U; - event = ARM_MCI_EVENT_TRANSFER_TIMEOUT; - } - else { - if (int_status & TRANSFER_COMPLETE_STATUS_ENABLE) { - /* transfer complete interrupt */ - event = ARM_MCI_EVENT_TRANSFER_COMPLETE; - } - } - } - else { - if (int_status & CARD_INTERRUPT_STATUS_ENABLE) { - /* SDIO interrupt */ - MCI.status.sdio_interrupt = 1U; - event = ARM_MCI_EVENT_SDIO_INTERRUPT; - - /* Disable SDIO Interrupt */ - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_ENABLE_REGISTER = CARD_INTERRUPT_STATUS_ENABLE; - } - } - /*clear interrupts*/ - SDMEM_INTR_STATUS_REG = int_status; - - /*send events*/ - if (event && (MCI.cb_event != NULL)) { - MCI.cb_event (event); - } -} - -/** - * @fn void RSI_MCI_ClockCnfig(uint32_t freq) - * @brief This API is used to configure the MCI clock - */ -void RSI_MCI_ClockCnfig(uint32_t freq) -{ - uint16_t u16Div = 0; - - uint32_t u32ClockInput = RTE_INPUT_CLOCK; - - u16Div = u32ClockInput /2/ (freq); - - /*Disable sdmem clock */ - SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.SD_CLOCK_ENABLE = 0u; - - /*set division value to the card*/ - SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.SDCLK_FREQUENCY_SELECT = (u16Div & 0xFFu); - SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.UPPER_BITS_OF_SDCLK_FREQUENCY_SELECT = ((u16Div >> 8u) & 0x03u); - - /*Enable Smih internal clock*/ - SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.INTERNAL_CLOCK_ENABLE = 0x1; - while(0x1 != SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.INTERNAL_CLOCK_STABLE); - - /*enables SDMEM clock*/ - SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.SD_CLOCK_ENABLE = 0x1; -} - -/** - * @fn rsi_error_t RSI_MCI_SendCommand( MCI_COMMAND_FRAME_CONFIG_T* pConfig ) - * @brief This API is used to send the command. - * @param[in] pConfig pointer to the command structure - * @return RSI_OK If command sent properly. - * INVALID_PARAMETERS If pConfig==NULL - */ -rsi_error_t RSI_MCI_SendCommand(MCI_COMMAND_FRAME_CONFIG_T* pConfig ) -{ - MCI_COMMAND_REG_T CmdData; - - memset(&CmdData, 0, sizeof(CmdData)); - - if (pConfig == NULL) - { - return INVALID_PARAMETERS ; - } - /* Set command CRC check */ - if(pConfig->checkCmdCrc) - { - CmdData.cmdCrcCheckEnable = 0x1; - } - else - { - CmdData.cmdCrcCheckEnable = 0x0; - } - /* Set command index check */ - if(pConfig->checkCmdIndex) - { - CmdData.cmdIndexCheckEnable = 0x1; - } - else - { - CmdData.cmdIndexCheckEnable = 0x0; - } - - /* Set data present or not when sending the command */ - if(pConfig->dataPresent) - { - CmdData.dataPresentSelect = 0x1; - } - else - { - CmdData.dataPresentSelect = 0x0; - } - /* Configure command type */ - switch (pConfig->cmdType) - { - case MCI_NORMAL_CMD: - CmdData.cmdType = 0u; - break; - case MCI_SUSPEND_CMD: - CmdData.cmdType = 1u; - break; - case MCI_RESUME_CMD: - CmdData.cmdType = 2u; - break; - case MCI_ABORT_CMD: - CmdData.cmdType = 3u; - break; - default: - return INVALID_PARAMETERS ; - } - /* Set command response type */ - switch (pConfig->responseType) - { - case MCI_RESPONSE_NONE: - CmdData.respType = 0u; - break; - case MCI_RESPONSE_136BIT: - CmdData.respType = 1u; - break; - case MCI_RESPONSE_48BIT: - CmdData.respType = 2u; - break; - case MCI_RESPONSE_48BIT_BUSY_CHECK: - CmdData.respType = 3u; - break; - default: - return INVALID_PARAMETERS ; - } - - /* Set command index */ - CmdData.cmdIndex = pConfig->cmdIndex; - - /* Auto command setting */ - switch (pConfig->autoCmdType) - { - case MCI_DISABLE_AUTO_CMD : - SMIH->TRANSFER_MODE_REGISTER_b.AUTO_CMD_ENABLE = 0u; - break; - case MCI_ENABLE_AUTO_CMD12 : - SMIH->TRANSFER_MODE_REGISTER_b.AUTO_CMD_ENABLE = 1u; - break; - case MCI_ENABLE_AUTO_CMD23 : - SMIH->TRANSFER_MODE_REGISTER_b.AUTO_CMD_ENABLE = 2u; - break; - default: - return INVALID_PARAMETERS ; - } - /* Configure argument register */ - SMIH->SMIH_ARGUMENT1_REGISTER = pConfig->argument; - - if(pConfig->cmdIndex == 5) - { - if((pConfig->argument & (1 << 24))) - { - SMIH->SMIH_HOST_CONTROL_2_REGISTER = (1 << 3); - } - } - /* assign fiiled data to the command register */ - SMIH->SMIH_COMMAND_REGISTER = *((uint16_t *)&CmdData); - return RSI_OK; -} -/** - * @fn rsi_error_t RSI_MCI_DataTransferInitialization(MCI_DATA_CONFIG_T* pDataConfig) - * @brief This API is used to initialize the data transfer(this must be called before data transfer). - * @param[in] pDataConfig pointer to the data transfer configuration - * @return RSI_OK data initialized properly. - * INVALID_PARAMETERS If pDataConfig==NULL - */ -rsi_error_t RSI_MCI_DataTransferInitialization(MCI_DATA_CONFIG_T* pDataConfig) -{ - if (pDataConfig == 0) - { - return INVALID_PARAMETERS ; - } - /* Configure multiple block or single block transfer */ - if(pDataConfig->multiBlock) - { - SMIH->TRANSFER_MODE_REGISTER_b.MULTI_OR_SINGLE_BLOCK_SELECT = 0x1; - } - else - { - SMIH->TRANSFER_MODE_REGISTER_b.MULTI_OR_SINGLE_BLOCK_SELECT = 0x0; - } - /* Confgure data transfer direction */ - if(pDataConfig->dataTransferDirection) - { - SMIH->TRANSFER_MODE_REGISTER_b.DATA_TRANSFER_DIRECTION_SELECT = 0x1; - } - else - { - SMIH->TRANSFER_MODE_REGISTER_b.DATA_TRANSFER_DIRECTION_SELECT = 0x0; - } - /* Configure block size */ - SMIH->SMIH_BLOCK_SIZE_REGISTER_b.TRANSFER_BLOCK_SIZE = pDataConfig->blockSize; - - /* Configure block count */ - if(pDataConfig->blockCount == 0) - { - SMIH->SMIH_BLOCK_COUNT_REGISTER = 1; - } - else - { - SMIH->SMIH_BLOCK_COUNT_REGISTER = pDataConfig->blockCount; - } - /*enable block count*/ - if(pDataConfig->blockCountEnable) - { - SMIH->TRANSFER_MODE_REGISTER_b.BLOCK_COUNT_ENABLE = 0x1; - } - else - { - SMIH->TRANSFER_MODE_REGISTER_b.BLOCK_COUNT_ENABLE = 0x0; - } - /* Enable DMA mode */ - if(pDataConfig->dmaEnable) - { - SMIH->TRANSFER_MODE_REGISTER_b.DMA_ENABLE = 0x1; - } - else - { - SMIH->TRANSFER_MODE_REGISTER_b.DMA_ENABLE = 0x1; - } - - /* Configure descriptor table for ADMA */ - SMIH->SMIH_ADMA_SYSTEM_ADDRESS0_REGISTER = (uint16_t) pDataConfig->admaDespTableAddress; - SMIH->SMIH_ADMA_SYSTEM_ADDRESS1_REGISTER = (uint16_t)(pDataConfig->admaDespTableAddress >> 16u); - - return RSI_OK; -} -// End MCI Interface -ARM_DRIVER_MCI Driver_MCI0 = -{ - MCI_GetVersion, - MCI_GetCapabilities, - MCI_Initialize, - MCI_Uninitialize, - MCI_PowerControl, - MCI_CardPower, - MCI_ReadCD, - MCI_ReadWP, - MCI_SendCommand, - MCI_SetupTransfer, - MCI_AbortTransfer, - MCI_Control, - MCI_GetStatus -}; -#endif diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/MCI.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/MCI.h deleted file mode 100644 index bf841d135..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/MCI.h +++ /dev/null @@ -1,195 +0,0 @@ - /* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2014 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 24. Nov 2014 - * $Revision: V2.02 - * - * Project: MCI (Memory Card Interface) - * Driver definitions - * -------------------------------------------------------------------------- */ -/* - * Version 1.00 - * Initial release - */ - - -#include "Driver_MCI.h" - -#include "RTE_Device.h" - - -typedef void (*ARM_MCI_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_MCI_SignalEvent : Signal MCI Event. - - - -/* MCI Driver State Definition */ -typedef struct MCI_Ctrl { - ARM_MCI_SignalEvent_t cb_event; /* Driver event callback function */ - ARM_MCI_STATUS status; /* Driver status */ - uint32_t *response; /* Pointer to response buffer */ - uint32_t bl_sz; - uint32_t bl_cnt; - uint8_t volatile flags; /* Driver state flags */ -} MCI_CTRL; - -/* Driver flag definitions */ -#define MCI_INIT ((uint8_t)0x01 ) /* MCI initialized */ -#define MCI_POWER ((uint8_t)0x02 ) /* MCI powered on */ -#define MCI_SETUP ((uint8_t)0x04 ) /* MCI configured */ -#define MCI_RESP_LONG ((uint8_t)0x08 ) /* Long response expected */ - - - -#define MCI_DATA_READ ((uint8_t)0x10) /* Read transfer */ -#define MCI_DATA_MULB ((uint8_t)0x20) /* Multiple block transfer */ - -/* Normal interrupt status enable reg */ -#define COMMAND_COMPLETE_STATUS_ENABLE BIT(0) -#define TRANSFER_COMPLETE_STATUS_ENABLE BIT(1) -#define BLOCK_GAP_EVENT_STATUS_ENABLE BIT(2) -#define DMA_INTERRUPT_STATUS_ENABLE BIT(3) -#define BUFFER_WRITE_READY_STATUS_ENABLE BIT(4) -#define BUFFER_READ_READY_STATUS_ENABLE BIT(5) -#define CARD_INSERTION_STATUS_ENABLE BIT(6) -#define CARD_REMOVAL_STATUS_ENABLE BIT(7) -#define CARD_INTERRUPT_STATUS_ENABLE BIT(8) -#define INT_A_STATUS_ENABLE BIT(9) -#define INT_B_STATUS_ENABLE BIT(10) -#define INT_C_STATUS_ENABLE BIT(11) -#define RE_TUNING_EVENT_STATUS_ENABLE BIT(12) - -/* Error interrupt status enables */ -#define COMMAND_TIMEOUT_ERROR_STATUS_ENABLE BIT(0) -#define COMMAND_CRC_ERROR_STATUS_ENABLE BIT(1) -#define COMMAND_END_BIT_ERROR_STATUS_ENABLE BIT(2) -#define COMMAND_INDEX_ERROR_STATUS_ENABLE BIT(3) -#define DATA_TIMEOUT_ERROR_STATUS_ENABLE BIT(4) -#define DATA_CRC_ERROR_STATUS_ENABLE BIT(5) -#define DATA_END_BIT_ERROR_STATUS_ENABLE BIT(6) -#define CURRENT_LIMIT_ERROR_STATUS_ENABLE BIT(7) -#define AUTO_CMD_ERROR_STATUS_ENABLE BIT(8) -#define ADMA_ERROR_STATUS_ENABLE BIT(9) -#define TUNING_ERROR_STATUS_ENABLE BIT(10) - -/* Normal interrupt status enable reg */ -#define COMMAND_COMPLETE_SIGNAL_ENABLE BIT(0) -#define TRANSFER_COMPLETE_SIGNAL_ENABLE BIT(1) -#define BLOCK_GAP_EVENT_SIGNAL_ENABLE BIT(2) -#define DMA_INTERRUPT_SIGNAL_ENABLE BIT(3) -#define BUFFER_WRITE_READY_SIGNAL_ENABLE BIT(4) -#define BUFFER_READ_READY_SIGNAL_ENABLE BIT(5) -#define CARD_INSERTION_SIGNAL_ENABLE BIT(6) -#define CARD_REMOVAL_SIGNAL_ENABLE BIT(7) -#define CARD_INTERRUPT_SIGNAL_ENABLE BIT(8) -#define INT_A_SIGNAL_ENABLE BIT(9) -#define INT_B_SIGNAL_ENABLE BIT(10) -#define INT_C_SIGNALS_ENABLE BIT(11) -#define RE_TUNING_EVENT_SIGNAL_ENABLE BIT(12) - -typedef struct MCI_COMMAND_FRAME_CONFIG -{ - uint8_t cmdIndex; - uint32_t argument; - uint8_t cmdType; - boolean_t dataPresent; - boolean_t checkCmdIndex; - boolean_t checkCmdCrc; - uint8_t responseType; - uint8_t autoCmdType; -}MCI_COMMAND_FRAME_CONFIG_T; -typedef struct MCI_ADMA_DESC_TABLE -{ - uint16_t attributeValid :1; - uint16_t attributeEnd :1; - uint16_t attributeInt :1; - uint16_t reserved1 :1; - uint16_t attributeAct :2; - uint16_t reserved2 :10; - uint16_t length; - uint32_t _32BIT_Adress; -} MCI_ADMA_DESC_TABLE_T; - -/*Command type defines */ -#define MCI_ABORT_CMD 3 -#define MCI_RESUME_CMD 2 -#define MCI_SUSPEND_CMD 1 -#define MCI_NORMAL_CMD 0 - -#define MCI_DISABLE_AUTO_CMD 0 -#define MCI_ENABLE_AUTO_CMD12 1 -#define MCI_ENABLE_AUTO_CMD23 2 - -/*response type defines*/ -#define MCI_RESPONSE_NONE 0 -#define MCI_RESPONSE_136BIT 1 -#define MCI_RESPONSE_48BIT 2 -#define MCI_RESPONSE_48BIT_BUSY_CHECK 3 - -/*data direction defines*/ -#define MCI_WRITE_DIRECTION 0x0 -#define MCI_READ_DIRECTION 0x1 - -#define MCI_RESPONSE_EXPECTED (ARM_MCI_RESPONSE_SHORT | \ - ARM_MCI_RESPONSE_SHORT_BUSY | \ - ARM_MCI_RESPONSE_LONG) - - -/* MCI data configuration structure*/ -typedef struct MCI_DATA_CONFIG -{ - boolean_t multiBlock; - boolean_t dataTransferDirection; - uint16_t blockSize; - uint16_t blockCount; - boolean_t blockCountEnable; - boolean_t dmaEnable; - uint32_t admaDespTableAddress; - uint8_t dataTimeout; -}MCI_DATA_CONFIG_T; - -/* MCI command reg structure*/ -typedef struct MCI_COMMAND_REG -{ - uint16_t respType : 2; - uint16_t resrvd : 1; - uint16_t cmdCrcCheckEnable : 1; - uint16_t cmdIndexCheckEnable : 1; - uint16_t dataPresentSelect : 1; - uint16_t cmdType : 2; - uint16_t cmdIndex : 6; -} MCI_COMMAND_REG_T; - - -#define COMMANDS_INTERRUPTS (((COMMAND_TIMEOUT_ERROR_STATUS_ENABLE | COMMAND_CRC_ERROR_STATUS_ENABLE | COMMAND_END_BIT_ERROR_STATUS_ENABLE |COMMAND_INDEX_ERROR_STATUS_ENABLE | AUTO_CMD_ERROR_STATUS_ENABLE) << 16) | \ - COMMAND_COMPLETE_STATUS_ENABLE ) - -#define DATA_INTERRUPTS (((DATA_TIMEOUT_ERROR_STATUS_ENABLE |DATA_CRC_ERROR_STATUS_ENABLE |DATA_END_BIT_ERROR_STATUS_ENABLE ) << 16) | TRANSFER_COMPLETE_STATUS_ENABLE | \ - BUFFER_READ_READY_STATUS_ENABLE | \ - BUFFER_WRITE_READY_STATUS_ENABLE | \ - DMA_INTERRUPT_STATUS_ENABLE) - -#define SDMEM_INTR_STATUS_REG (*(uint32_t *)(0x20220000 + 0x30)) -#define SDMEM_RESPONSE_REG ((*(uint32_t *)(0x20220000 + 0x10)) ) - -/* Function Prototypes */ -void RSI_MCI_ClockCnfig(uint32_t freq); -rsi_error_t RSI_MCI_SendCommand(MCI_COMMAND_FRAME_CONFIG_T* pConfig ); -rsi_error_t RSI_MCI_DataTransferInitialization(MCI_DATA_CONFIG_T* pDataConfig); - diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/PHY_LAN8742A.c b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/PHY_LAN8742A.c deleted file mode 100644 index c3ce23dff..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/PHY_LAN8742A.c +++ /dev/null @@ -1,292 +0,0 @@ - -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2016 ARM Ltd. - * - * This software is provided 'as-is', without any express or implied warranty. - * In no event will the authors be held liable for any damages arising from - * the use of this software. Permission is granted to anyone to use this - * software for any purpose, including commercial applications, and to alter - * it and redistribute it freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software in - * a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * - * 3. This notice may not be removed or altered from any source distribution. - * - * - * $Date: 1 AUG 2017 - * $Revision: V1.0 - * - * Driver: Driver_ETH_PHYn (default: Driver_ETH_PHY0) - * Project: Ethernet Physical Layer Transceiver (PHY) - * Driver for LAN8742A - * ---------------------------------------------------------------------- - * Use the following configuration settings in the middleware component - * to connect to this driver. - * - * Configuration Setting Value - * --------------------- ----- - * Connect to hardware via Driver_ETH_PHY# = n (default: 0) - * -------------------------------------------------------------------- - * - */ - -#include "rsi_ccp_user_config.h" -#if defined(CHIP_9118) -#include "PHY_LAN8742A.h" -/* driver version */ - - -#define ARM_ETH_PHY_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) -#ifndef ETH_PHY_NUM -#define ETH_PHY_NUM 0 /* Default driver number */ -#endif - -#ifndef ETH_PHY_ADDR -#define ETH_PHY_ADDR 0x00 /* Default device address */ -#endif - - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_ETH_PHY_API_VERSION, - ARM_ETH_PHY_DRV_VERSION -}; - -/* Ethernet PHY control structure */ -static PHY_CTRL PHY = { NULL, NULL, 0, 0 }; - - -/** - \fn ARM_DRIVER_VERSION GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION - */ -static ARM_DRIVER_VERSION GetVersion (void) { - return DriverVersion; -} - - -/** - \fn int32_t Initialize (ARM_ETH_PHY_Read_t fn_read, - ARM_ETH_PHY_Write_t fn_write) - \brief Initialize Ethernet PHY Device. - \param[in] fn_read : Pointer to \ref ARM_ETH_MAC_PHY_Read - \param[in] fn_write : Pointer to \ref ARM_ETH_MAC_PHY_Write - \return \ref execution_status - */ -static int32_t Initialize (ARM_ETH_PHY_Read_t fn_read, ARM_ETH_PHY_Write_t fn_write) { - - if ((fn_read == NULL) || (fn_write == NULL)) { return ARM_DRIVER_ERROR_PARAMETER; } - - if ((PHY.flags & PHY_INIT) == 0U) { - /* Register PHY read/write functions. */ - PHY.reg_rd = fn_read; - PHY.reg_wr = fn_write; - - PHY.bcr = 0U; - PHY.flags = PHY_INIT; - } - - return ARM_DRIVER_OK; -} - -/** - \fn int32_t Uninitialize (void) - \brief De-initialize Ethernet PHY Device. - \return \ref execution_status - */ -static int32_t Uninitialize (void) { - - PHY.reg_rd = NULL; - PHY.reg_wr = NULL; - PHY.bcr = 0U; - PHY.flags = 0U; - - return ARM_DRIVER_OK; -} - -/** - \fn int32_t PowerControl (ARM_POWER_STATE state) - \brief Control Ethernet PHY Device Power. - \param[in] state : Power state - \return \ref execution_status - */ -static int32_t PowerControl (ARM_POWER_STATE state) { - uint16_t val; - - switch (state) { - case ARM_POWER_OFF: - if ((PHY.flags & PHY_INIT) == 0U) { - /* Initialize must provide register access function pointers */ - return ARM_DRIVER_ERROR; - } - - PHY.flags &= ~PHY_POWER; - PHY.bcr = BCR_POWER_DOWN; - - return (PHY.reg_wr(ETH_PHY_ADDR, REG_BCR, PHY.bcr)); - - case ARM_POWER_FULL: - if ((PHY.flags & PHY_INIT) == 0U) { - return ARM_DRIVER_ERROR; - } - if (PHY.flags & PHY_POWER) { - return ARM_DRIVER_OK; - } - - /* Check Device Identification. */ - PHY.reg_rd(ETH_PHY_ADDR, REG_PHYIDR1, &val); - - if (val != PHY_ID1) { - /* Invalid PHY ID */ - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - PHY.reg_rd(ETH_PHY_ADDR, REG_PHYIDR2, &val); - - if ((val & 0xFFF0) != PHY_ID2) { - /* Invalid PHY ID */ - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - PHY.bcr = 0U; - - if (PHY.reg_wr(ETH_PHY_ADDR, REG_BCR, PHY.bcr) != ARM_DRIVER_OK) { - return ARM_DRIVER_ERROR; - } - - PHY.flags |= PHY_POWER; - - return ARM_DRIVER_OK; - - case ARM_POWER_LOW: - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -/** - \fn int32_t SetInterface (uint32_t interface) - \brief Set Ethernet Media Interface. - \param[in] interface : Media Interface type - \return \ref execution_status - */ -static int32_t SetInterface (uint32_t interface) { - - if ((PHY.flags & PHY_POWER) == 0U) { return ARM_DRIVER_ERROR; } - - switch (interface) { - case ARM_ETH_INTERFACE_RMII: - break; - case ARM_ETH_INTERFACE_MII: - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - return(0); -} - -/** - \fn int32_t SetMode (uint32_t mode) - \brief Set Ethernet PHY Device Operation mode. - \param[in] mode : Operation Mode - \return \ref execution_status - */ -static int32_t SetMode (uint32_t mode) { - uint16_t val; - - if ((PHY.flags & PHY_POWER) == 0U) { return ARM_DRIVER_ERROR; } - - val = PHY.bcr & BCR_POWER_DOWN; - - switch (mode & ARM_ETH_PHY_SPEED_Msk) { - case ARM_ETH_PHY_SPEED_10M: - break; - case ARM_ETH_PHY_SPEED_100M: - val |= BCR_SPEED_SEL; - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - switch (mode & ARM_ETH_PHY_DUPLEX_Msk) { - case ARM_ETH_PHY_DUPLEX_HALF: - break; - case ARM_ETH_PHY_DUPLEX_FULL: - val |= BCR_DUPLEX; - break; - } - - if (mode & ARM_ETH_PHY_AUTO_NEGOTIATE) { - val |= BCR_ANEG_EN; - } - - if (mode & ARM_ETH_PHY_LOOPBACK) { - val |= BCR_LOOPBACK; - } - - if (mode & ARM_ETH_PHY_ISOLATE) { - val |= BCR_ISOLATE; - } - - PHY.bcr = val; - - return (PHY.reg_wr(ETH_PHY_ADDR, REG_BCR, PHY.bcr)); -} - -/** - \fn ARM_ETH_LINK_STATE GetLinkState (void) - \brief Get Ethernet PHY Device Link state. - \return current link status \ref ARM_ETH_LINK_STATE - */ -static ARM_ETH_LINK_STATE GetLinkState (void) { - ARM_ETH_LINK_STATE state; - uint16_t val = 0U; - - if (PHY.flags & PHY_POWER) { - PHY.reg_rd(ETH_PHY_ADDR, REG_BSR, &val); - } - state = (val & BSR_LINK_STAT) ? ARM_ETH_LINK_UP : ARM_ETH_LINK_DOWN; - - return (state); -} - -/** - \fn ARM_ETH_LINK_INFO GetLinkInfo (void) - \brief Get Ethernet PHY Device Link information. - \return current link parameters \ref ARM_ETH_LINK_INFO - */ -static ARM_ETH_LINK_INFO GetLinkInfo (void) { - ARM_ETH_LINK_INFO info; - uint16_t val = 0U; - - if (PHY.flags & PHY_POWER) { - PHY.reg_rd(ETH_PHY_ADDR, REG_PSCS, &val); - } - - info.speed = (val & PSCS_SPEED) ? ARM_ETH_SPEED_10M : ARM_ETH_SPEED_100M; - info.duplex = (val & PSCS_DUPLEX) ? ARM_ETH_DUPLEX_FULL : ARM_ETH_DUPLEX_HALF; - - return (info); -} - - -/* PHY Driver Control Block */ -extern -ARM_DRIVER_ETH_PHY ARM_Driver_ETH_PHY0; -ARM_DRIVER_ETH_PHY ARM_Driver_ETH_PHY0= { - GetVersion, - Initialize, - Uninitialize, - PowerControl, - SetInterface, - SetMode, - GetLinkState, - GetLinkInfo -}; -#endif diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/PHY_LAN8742A.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/PHY_LAN8742A.h deleted file mode 100644 index ca9f44204..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/PHY_LAN8742A.h +++ /dev/null @@ -1,91 +0,0 @@ -/* --------------------------------------------------------------------------- - * Copyright (C) 2013-2016 ARM Limited. All rights reserved. - * - * $Date: 28. June 2016 - * $Revision: V1.2 - * - * Project: Ethernet Physical Layer Transceiver (PHY) - * Definitions for LAN8742A - * --------------------------------------------------------------------------*/ - -#ifndef __PHY_LAN8742A_H -#define __PHY_LAN8742A_H - -#include "Driver_ETH_PHY.h" - -/* Basic Registers */ -#define REG_BCR 0 /* Basic Control Register */ -#define REG_BSR 1 /* Basic Status Register */ - -/* Extended Registers */ -#define REG_PHYIDR1 2 /* PHY Identifier 1 */ -#define REG_PHYIDR2 3 /* PHY Identifier 2 */ -#define REG_ANAR 4 /* Auto-Negotiation Advertisement */ -#define REG_ANLPAR 5 /* Auto-Neg. Link Partner Ability */ -#define REG_ANER 6 /* Auto-Neg. Expansion Register */ -#define REG_ANEG_NP_TX 7 /* Auto-Neg. Next Page Tx */ -#define REG_ANEG_NP_RX 8 /* Auto-Neg. Next Page Rx */ -#define REG_MMD_ACCES_CTRL 13 /* MMD Access Control */ -#define REG_MMD_ACCES_AD 14 /* MMD Access Address/Data */ - -/* Vendor-specific Registers */ -#define REG_MCSR 17 /* Mode Control/Status Register */ -#define REG_SPEC_MODE 18 /* Special Modes Register */ -#define REG_TDR_PAT_DEL 24 /* TDR Patterns/Delay Control Reg. */ -#define REG_TDR_CTRL_STAT 25 /* TDR Control/Status Register */ -#define REG_SEC 26 /* System Error Counter Register */ -#define REG_SC_SI 27 /* Specifal Control/Status Indication*/ -#define REG_CABLE_LEN 28 /* Cable Length Register */ -#define REG_ISF 29 /* Interrupt Source Flag Register */ -#define REG_IM 30 /* Interrupt Mask Register */ -#define REG_PSCS 31 /* PHY Special Ctrl/Status Register */ - -/* Basic Control Register */ -#define BCR_RESET 0x8000 /* Software Reset */ -#define BCR_LOOPBACK 0x4000 /* Loopback mode */ -#define BCR_SPEED_SEL 0x2000 /* Speed Select (1=100Mb/s) */ -#define BCR_ANEG_EN 0x1000 /* Auto Negotiation Enable */ -#define BCR_POWER_DOWN 0x8000 /* Power Down (1=power down mode) */ -#define BCR_ISOLATE 0x0400 /* Isolate Media interface */ -#define BCR_REST_ANEG 0x0200 /* Restart Auto Negotiation */ -#define BCR_DUPLEX 0x0100 /* Duplex Mode (1=Full duplex) */ -#define BCR_COL_TEST 0x0080 /* Enable Collision Test */ - -/* Basic Status Register */ -#define BSR_100B_T4 0x8000 /* 100BASE-T4 Capable */ -#define BSR_100B_TX_FD 0x4000 /* 100BASE-TX Full Duplex Capable */ -#define BSR_100B_TX_HD 0x2000 /* 100BASE-TX Half Duplex Capable */ -#define BSR_10B_T_FD 0x1000 /* 10BASE-T Full Duplex Capable */ -#define BSR_10B_T_HD 0x0800 /* 10BASE-T Half Duplex Capable */ -#define BSR_100B_T2_FD 0x0400 /* 1000BASE-T2 Full Duplex Capable */ -#define BSR_100B_T2_HD 0x0200 /* 1000BASE-T2 Half Duplex Capable */ -#define BSR_EXTENDED_STAT 0x0100 /* Extended Status in register 15 */ -#define BSR_ANEG_COMPL 0x0020 /* Auto Negotiation Complete */ -#define BSR_REM_FAULT 0x0010 /* Remote Fault */ -#define BSR_ANEG_ABIL 0x0008 /* Auto Negotiation Ability */ -#define BSR_LINK_STAT 0x0004 /* Link Status (1=link us up) */ -#define BSR_JABBER_DET 0x0002 /* Jabber Detect */ -#define BSR_EXT_CAPAB 0x0001 /* Extended Capabilities */ - -/* PHY Identifier Registers */ -#define PHY_ID1 0x0007 /* LAN8742A Device Identifier MSB */ -#define PHY_ID2 0xC130 /* LAN8742A Device Identifier LSB */ - -/* PHY Special Control/Status Register */ -#define PSCS_AUTODONE 0x1000 /* Auto-negotiation is done */ -#define PSCS_DUPLEX 0x0010 /* Duplex Status (1=Full duplex) */ -#define PSCS_SPEED 0x0004 /* Speed10 Status (1=10MBit/s) */ - -/* PHY Driver State Flags */ -#define PHY_INIT 0x01U /* Driver initialized */ -#define PHY_POWER 0x02U /* Driver power is on */ - -/* PHY Driver Control Structure */ -typedef struct phy_ctrl { - ARM_ETH_PHY_Read_t reg_rd; /* PHY register read function */ - ARM_ETH_PHY_Write_t reg_wr; /* PHY register write function */ - uint16_t bcr; /* BCR register value */ - uint8_t flags; /* Control flags */ -} PHY_CTRL; - -#endif /* __PHY_LAN8742A_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/SAI.c b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/SAI.c index 2edee17a6..473e07e50 100644 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/SAI.c +++ b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/SAI.c @@ -34,9 +34,9 @@ extern uint32_t dma_rom_buff0[30], dma_rom_buff1[30]; //we can keep wrapeers #define RESOLUTION_16_BIT 16 #define I2S0_CHANNEL1_CHANNEL_OFFSET 2 -#define I2S0_CLK_SRC ULP_I2S_REF_CLK +#define I2S0_CLK_SRC ULP_I2S_PLL_CLK #define I2S0_CLK_DIV_FACT 0 -#define I2S1_CLK_SRC ULP_I2S_ULP_32MHZ_RC_CLK +#define I2S1_CLK_SRC ULP_I2S_REF_CLK #define I2S1_CLK_DIV_FACT 0 /* IAR support */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/SPI.c b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/SPI.c index 55384c467..86885bda5 100644 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/SPI.c +++ b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/SPI.c @@ -364,7 +364,15 @@ static SPI_PIN SSI_ULP_MASTER_miso = {SSI_ULP_MASTER_MISO_PORT, SSI_ULP_MASTER_M static SPI_PIN SSI_ULP_MASTER_sck = {SSI_ULP_MASTER_SCK_PORT, SSI_ULP_MASTER_SCK_PIN, SSI_ULP_MASTER_SCK_MODE, 0}; #endif #ifdef SSI_ULP_MASTER_CS0_SEL -static SPI_PIN SSI_ULP_MASTER_cs = {SSI_ULP_MASTER_CS0_PORT, SSI_ULP_MASTER_CS0_PIN, SSI_ULP_MASTER_CS0_MODE, 0}; +static SPI_PIN SSI_ULP_MASTER_cs0 = {SSI_ULP_MASTER_CS0_PORT, SSI_ULP_MASTER_CS0_PIN, SSI_ULP_MASTER_CS0_MODE, 0}; +#endif +#ifdef SPI_MULTI_SLAVE +#ifdef SSI_ULP_MASTER_CS1_SEL +static SPI_PIN SSI_ULP_MASTER_cs1 = {SSI_ULP_MASTER_CS1_PORT, SSI_ULP_MASTER_CS1_PIN, SSI_ULP_MASTER_CS1_MODE, 0}; +#endif +#ifdef SSI_ULP_MASTER_CS2_SEL +static SPI_PIN SSI_ULP_MASTER_cs2 = {SSI_ULP_MASTER_CS2_PORT, SSI_ULP_MASTER_CS2_PIN, SSI_ULP_MASTER_CS2_MODE, 0}; +#endif #endif #if defined(SSI_ULP_MASTER_TX_DMA_Instance) && (SSI_ULP_MASTER_TX_DMA_Instance == 1) @@ -421,18 +429,18 @@ static const SPI_RESOURCES SSI_ULP_MASTER_Resources = { NULL, #endif #ifdef SSI_ULP_MASTER_CS0_SEL - &SSI_ULP_MASTER_cs, + &SSI_ULP_MASTER_cs0, #else NULL, #endif #ifdef SPI_MULTI_SLAVE -#ifdef SSI_SLAVE_CS1_SEL - &SSI_SLAVE_cs, +#ifdef SSI_ULP_MASTER_CS1_SEL + &SSI_ULP_MASTER_cs1, #else NULL, #endif -#ifdef SSI_SLAVE_CS2_SEL - &SSI_SLAVE_cs, +#ifdef SSI_ULP_MASTER_CS2_SEL + &SSI_ULP_MASTER_cs2, #else NULL, #endif diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USB.c b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USB.c deleted file mode 100644 index c29fb928e..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USB.c +++ /dev/null @@ -1,80 +0,0 @@ -/* -------------------------------------------------------------------------- - * Copyright (c) 2013-2018 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 01. Oct 2018 - * $Revision: V1.0 - * - * Project: Common file for both USB(Device and Host) - * -------------------------------------------------------------------------- */ - -/* History: - * Version 1.0 - * Initial release - */ - -#include "rsi_ccp_user_config.h" -#if defined(CHIP_9118) - - - -#include "Driver_USB.h" -#include "USB.h" -#include "RTE_Device.h" - - -volatile uint8_t USB_role = ARM_USB_ROLE_NONE; -volatile uint8_t USB_state = 0U; - -#ifdef RTE_Drivers_USBH -extern void USBH0_IRQ (void); -#endif -#ifdef RTE_Drivers_USBD -extern void USBD0_IRQ (void); -#endif - - -// Common IRQ Routine ********************************************************** - -/** - \fn void IRQ073_Handler (void) - \brief USB Interrupt Routine (IRQ). -*/ -void IRQ073_Handler (void) { -#if(defined(RTE_Drivers_USBH) && defined(RTE_Drivers_USBD)) - switch (USB_role) { -#ifdef RTE_Drivers_USBH - case ARM_USB_ROLE_HOST: - USBH_IRQ (); - break; -#endif -#ifdef RTE_Drivers_USBD - case ARM_USB_ROLE_DEVICE: - USBD_IRQ (); - break; -#endif - default: - break; - } -#else -#ifdef RTE_Drivers_USBH - USBH_IRQ (); -#else - USBD_IRQ (); -#endif -#endif -} -#endif diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USB.h b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USB.h deleted file mode 100644 index 96a6f4a40..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USB.h +++ /dev/null @@ -1,210 +0,0 @@ -/* -------------------------------------------------------------------------- - * Copyright (c) 2013-2018 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 12. Dec 2018 - * $Revision: V1.0 - * - * Project: USB Driver Definitions for Silicon Labs MCU - * -------------------------------------------------------------------------- */ - -/* History: - * Version 1.0 - * - Initial release - */ - -#ifndef __USB_H -#define __USB_H - -#include - -#ifndef USB_ENDPT_MSK -#define USB_ENDPT_MSK (0x3FU) -#endif - -// USB Device Command Register -#define USB_USBCMD_D_RS (1U ) -#define USB_USBCMD_D_RST (1U << 1U) -#define USB_USBCMD_D_SUTW (1U << 13U) -#define USB_USBCMD_D_ATDTW (1U << 14U) -#define USB_USBCMD_D_ITC_POS ( 16U) -#define USB_USBCMD_D_ITC_MSK (0xFFU << USB_USBCMD_D_ITC_POS) -#define USB_USBCMD_D_ITC(n) (((n) << USB_USBCMD_D_ITC_POS) & USB_USBCMD_D_ITC_MSK) - -// USB Device Status Register -#define USB_USBSTS_D_UI (1U ) -#define USB_USBSTS_D_UEI (1U << 1U) -#define USB_USBSTS_D_PCI (1U << 2U) -#define USB_USBSTS_D_URI (1U << 6U) -#define USB_USBSTS_D_SRI (1U << 7U) -#define USB_USBSTS_D_SLI (1U << 8U) -#define USB_USBSTS_D_NAKI (1U << 16U) - -// USB Device Interrupt Register -#define USB_USBINTR_D_UE (1U ) -#define USB_USBINTR_D_UEE (1U << 1U) -#define USB_USBINTR_D_PCE (1U << 2U) -#define USB_USBINTR_D_URE (1U << 6U) -#define USB_USBINTR_D_SRE (1U << 7U) -#define USB_USBINTR_D_SLE (1U << 8U) -#define USB_USBINTR_D_NAKE (1U << 16U) - -// USB Device Frame Index Register -#define USB_FRINDEX_D_FRINDEX2_0_POS ( 0U) -#define USB_FRINDEX_D_FRINDEX2_0_MSK (7U ) -#define USB_FRINDEX_D_FRINDEX13_3_POS ( 3U) -#define USB_FRINDEX_D_FRINDEX13_3_MSK (0x7FFU << USB_FRINDEX_D_FRINDEX13_3_POS) - -// USB Device Address Register -#define USB_DEVICEADDR_USBADRA (1U << 24U) -#define USB_DEVICEADDR_USBADR_POS ( 25U) -#define USB_DEVICEADDR_USBADR_MSK (0x7FUL << USB_DEVICEADDR_USBADR_POS) - -// USB Endpoint List Address Register -#define USB_ENDPOINTLISTADDR_EPBASE31_11_POS ( 11U) -#define USB_ENDPOINTLISTADDR_EPBASE_MSK (0x1FFFFFUL << USB_ENDPOINTLISTADDR_EPBASE31_11_POS) - -// USB Burst Size Register -#define USB_BURSTSIZE_RXPBURST_POS ( 0U) -#define USB_BURSTSIZE_RXPBURST_MSK (0xFFU ) -#define USB_BURSTSIZE_TXPBURST_POS ( 8U) -#define USB_BURSTSIZE_TXPBURST_MSK (0xFFU << USB_BURSTSIZE_TXPBURST_POS) - -// USB BInterval Register -#define USB_BINTERVAL_BINT_POS ( 0U) -#define USB_BINTERVAL_BINT_MSK (0x0FU << USB_BINTERVAL_BINT_POS) - -// USB Endpoint NAK Register -#define USB_ENDPTNAK_EPRN_POS ( 0U) -#define USB_ENDPTNAK_EPRN_MSK (USB_ENDPT_MSK) -#define USB_ENDPTNAK_EPTN_POS ( 16U) -#define USB_ENDPTNAK_EPTN_MSK (USB_ENDPT_MSK << USB_ENDPTNAK_EPTN_POS) - -// USB Endpoint NAK Enable Register -#define USB_ENDPTNAKEN_EPRNE_POS ( 0U) -#define USB_ENDPTNAKEN_EPRNE_MSK (USB_ENDPT_MSK) -#define USB_ENDPTNAKEN_EPTNE_POS ( 16U) -#define USB_ENDPTNAKEN_EPTNE_MSK (USB_ENDPT_MSK << USB_ENDPTNAKEN_EPTNE_POS) - -// USB Device Port Status and Control Register -#define USB_PORTSC1_D_CCS (1U ) -#define USB_PORTSC1_D_PE (1U << 2U) -#define USB_PORTSC1_D_PEC (1U << 3U) -#define USB_PORTSC1_D_FPR (1U << 6U) -#define USB_PORTSC1_D_SUSP (1U << 7U) -#define USB_PORTSC1_D_PR (1U << 8U) -#define USB_PORTSC1_D_HSP (1U << 9U) -#define USB_PORTSC1_D_PIC15_14_POS ( 14U) -#define USB_PORTSC1_D_PIC15_14_MSK (3U << USB_PORTSC1_D_PIC15_14_POS) -#define USB_PORTSC1_D_PIC15_14(n) (((n) << USB_PORTSC1_D_PIC15_14_POS) & USB_PORTSC1_D_PIC15_14_MSK) -#define USB_PORTSC1_D_PTC19_16_POS ( 16U) -#define USB_PORTSC1_D_PTC19_16_MSK (0x0FU << USB_PORTSC1_D_PTC19_16_POS) -#define USB_PORTSC1_D_PHCD (1U << 23U) -#define USB_PORTSC1_D_PFSC (1U << 24U) -#define USB_PORTSC1_D_PSPD_POS ( 26U) -#define USB_PORTSC1_D_PSPD_MSK (3U << USB_PORTSC1_D_PSPD_POS) -#define USB_PORTSC1_D_PTS_POS ( 30U) -#define USB_PORTSC1_D_PTS_MSK (3UL << USB_PORTSC1_D_PTS_POS) -#define USB_PORTSC1_D_PTS(n) (((n) << USB_PORTSC1_D_PTS_POS) & USB_PORTSC1_D_PTS_MSK) - -// USB Device Mode Register -#define USB_USBMODE_D_CM1_0_POS ( 0U) -#define USB_USBMODE_D_CM1_0_MSK (3U ) -#define USB_USBMODE_D_CM1_0(n) ((n) & USB_USBMODE_D_CM1_0_MSK) -#define USB_USBMODE_D_ES (1U << 2U) -#define USB_USBMODE_D_SLOM (1U << 3U) -#define USB_USBMODE_D_SDIS (1U << 4U) - -// USB Endpoint Setup Status Register -#define USB_ENDPTSETUPSTAT_POS ( 0U) -#define USB_ENDPTSETUPSTAT_MSK (USB_ENDPT_MSK << USB_ENDPTSETUPSTAT_POS) - -// USB Endpoint Prime Register -#define USB_ENDPTRPRIME_PERB_POS ( 0U) -#define USB_ENDPTRPRIME_PERB_MSK (USB_ENDPT_MSK) -#define USB_ENDPTRPRIME_PETB_POS ( 16U) -#define USB_ENDPTRPRIME_PETB_MSK (USB_ENDPT_MSK << USB_ENDPTRPRIME_PETB_POS) - -// USB Endpoint Flush Register -#define USB_ENDPTFLUSH_FERB_POS ( 0U) -#define USB_ENDPTFLUSH_FERB_MSK (USB_ENDPT_MSK) -#define USB_ENDPTFLUSH_FETB_POS ( 16U) -#define USB_ENDPTFLUSH_FETB_MSK (USB_ENDPT_MSK << USB_ENDPTFLUSH_FETB_POS) - -// USB Endpoint Status Register -#define USB_ENDPTSTAT_ERBR_POS ( 0U) -#define USB_ENDPTSTAT_ERBR_MSK (USB_ENDPT_MSK) -#define USB_ENDPTSTAT_ETBR_POS ( 16U) -#define USB_ENDPTSTAT_ETBR_MSK (USB_ENDPT_MSK << USB_ENDPTSTAT_ETBR_POS) - -// USB Endpoint Complete Register -#define USB_ENDPTCOMPLETE_ERCE_POS ( 0U) -#define USB_ENDPTCOMPLETE_ERCE_MSK (USB_ENDPT_MSK) -#define USB_ENDPTCOMPLETE_ETCE_POS ( 16U) -#define USB_ENDPTCOMPLETE_ETCE_MSK (USB_ENDPT_MSK << USB_ENDPTCOMPLETE_ETCE_POS) - -// USB Endpoint Control Register -#define USB_ENDPTCTRL_RXS (1U ) -#define USB_ENDPTCTRL_RXT_POS ( 2U) -#define USB_ENDPTCTRL_RXT_MSK (3U << USB_ENDPTCTRL_RXT_POS) -#define USB_ENDPTCTRL_RXT(n) (((n) << USB_ENDPTCTRL_RXT_POS) & USB_ENDPTCTRL_RXT_MSK) -#define USB_ENDPTCTRL_RXI (1U << 5U) -#define USB_ENDPTCTRL_RXR (1U << 6U) -#define USB_ENDPTCTRL_RXE (1U << 7U) -#define USB_ENDPTCTRL_TXS (1U << 16U) -#define USB_ENDPTCTRL_TXT_POS ( 18U) -#define USB_ENDPTCTRL_TXT_MSK (3U << USB_ENDPTCTRL_TXT_POS) -#define USB_ENDPTCTRL_TXT(n) (((n) << USB_ENDPTCTRL_TXT_POS) & USB_ENDPTCTRL_TXT_MSK) -#define USB_ENDPTCTRL_TXI (1U << 21U) -#define USB_ENDPTCTRL_TXR (1U << 22U) -#define USB_ENDPTCTRL_TXE (1U << 23U) - -// Endpoint Queue Head Capabilities and Characteristics -#define USB_EPQH_CAP_IOS (1U << 15U) -#define USB_EPQH_CAP_MAX_PACKET_LEN_POS ( 16U) -#define USB_EPQH_CAP_MAX_PACKET_LEN_MSK (0x7FFU << USB_EPQH_CAP_MAX_PACKET_LEN_POS) -#define USB_EPQH_CAP_MAX_PACKET_LEN(n) (((n) << USB_EPQH_CAP_MAX_PACKET_LEN_POS) & USB_EPQH_CAP_MAX_PACKET_LEN_MSK) -#define USB_EPQH_CAP_ZLT (1U << 29U) -#define USB_EPQH_CAP_MULT_POS ( 30U) -#define USB_EPQH_CAP_MULT_MSK (3UL << USB_EPQH_CAP_MULT_POS) - -// Transfer Descriptor Token -#define USB_dTD_TOKEN_STATUS_POS ( 0U) -#define USB_dTD_TOKEN_STATUS_MSK (0xFFU ) -#define USB_dTD_TOKEN_STATUS(n) (n & USB_dTD_TOKEN_STATUS_MSK) -#define USB_dTD_TOKEN_STATUS_TRAN_ERROR (0x08U & USB_dTD_TOKEN_STATUS_MSK) -#define USB_dTD_TOKEN_STATUS_BUFFER_ERROR (0x20U & USB_dTD_TOKEN_STATUS_MSK) -#define USB_dTD_TOKEN_STATUS_HALTED (0x40U & USB_dTD_TOKEN_STATUS_MSK) -#define USB_dTD_TOKEN_STATUS_ACTIVE (0x80U & USB_dTD_TOKEN_STATUS_MSK) -#define USB_dTD_TOKEN_MULTO_POS ( 10U) -#define USB_dTD_TOKEN_MULTO_MSK (3U << USB_dTD_TOKEN_MULTO_POS) -#define USB_dTD_TOKEN_MULTO(n) (((n) << USB_dTD_TOKEN_MULTO_POS) & USB_dTD_TOKEN_MULTO_MSK) -#define USB_dTD_TOKEN_IOC (1U << 15U) -#define USB_dTD_TOKEN_TOTAL_BYTES_POS ( 16U) -#define USB_dTD_TOKEN_TOTAL_BYTES_MSK (0x7FFFU<< USB_dTD_TOKEN_TOTAL_BYTES_POS) -#define USB_dTD_TOKEN_TOTAL_BYTES(n) (((n) << USB_dTD_TOKEN_TOTAL_BYTES_POS) & USB_dTD_TOKEN_TOTAL_BYTES_MSK) - -// USB Host and Device Driver status flags -#define USBD_DRIVER_INITIALIZED (1U ) -#define USBD_DRIVER_POWERED (1U << 1U) - -#define USBH_DRIVER_INITIALIZED (1U << 4U) -#define USBH_DRIVER_POWERED (1U << 5U) - -//USB Host and Device function declaration -void USBH_IRQ (void); -void USBD_IRQ (void); -#endif /* __USB_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USBD.c b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USBD.c deleted file mode 100644 index a7d7574fd..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USBD.c +++ /dev/null @@ -1,886 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * - * $Date: 12. Dec 2018 - * $Revision: V1.0 - * - * Driver: Driver_USBD0 - * Configured: via RTE_Device.h configuration file - * Project: USB High-Speed Device Driver for Silicon Labs RS1xxxx - * -------------------------------------------------------------------------- - * Use the following configuration settings in the middleware component - * to connect to this driver. - * - * Configuration Setting Value - * --------------------- ----- - * Connect to hardware via Driver_USBD# = 0 - * -------------------------------------------------------------------------- - * Defines used for driver configuration (at compile time): - * - * USBD_MAX_ENDPOINT_NUM: defines maximum number of IN/OUT Endpoint pairs - * that driver will support with Control Endpoint 0 - * not included, this value impacts driver memory - * requirements - * - default value: 5 - * - maximum value: 5 - * -------------------------------------------------------------------------- */ - -/* History: - * Version 1.0 - * Initial release - */ - -#include "rsi_ccp_user_config.h" -#if defined(CHIP_9118) - -#include -#include - -#include "Driver_USBD.h" - - -#include "USB.h" -#include "RTE_Device.h" - - -#ifndef USBD_MAX_ENDPOINT_NUM -#define USBD_MAX_ENDPOINT_NUM 5U -#endif -#if (USBD_MAX_ENDPOINT_NUM > 6) -#error Too many Endpoints, maximum IN/OUT Endpoint pairs that this driver supports is 5 !!! -#endif - - -extern uint8_t USB_role; -extern uint8_t USB_state; - - -// USBD Driver ***************************************************************** - -#define ARM_USBD_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR (1,0) - -// Driver Version -static const ARM_DRIVER_VERSION usbd_driver_version = { ARM_USBD_API_VERSION, ARM_USBD_DRV_VERSION }; - -// Driver Capabilities -static const ARM_USBD_CAPABILITIES usbd_driver_capabilities = { - 1U, // VBUS Detection - 1U, // Event VBUS On - 1U // Event VBUS Off -}; - -#define ENDPTCTRL(ep_num) (*(volatile uint32_t *)((uint32_t)(&USB->USB_ENDPTCTRL0) + 4U * ep_num)) - -#define EP_NUM(ep_addr) (ep_addr & ARM_USB_ENDPOINT_NUMBER_MASK) -#define EP_DIR(ep_addr) ((ep_addr >> 7) & 1U) -#define EP_SLL(ep_addr) (EP_DIR(ep_addr) * 16U) -#define EP_QHNUM(ep_addr) ((EP_NUM(ep_addr) * 2U) + EP_DIR(ep_addr)) -#define EP_MSK(ep_addr) (1UL << (EP_NUM(ep_addr) + EP_SLL(ep_addr))) - -/*USB Device endpoint Queue Head*/ -typedef struct { - uint32_t cap; - uint32_t curr_dTD; - uint32_t next_dTD; - uint32_t dTD_token; - uint32_t buf[5]; - uint32_t reserved; - uint32_t setup[2]; - uint8_t *data; - uint32_t num; - uint32_t num_transferred_total; - uint16_t num_transferring; - uint8_t ep_type; - uint8_t ep_active; -} dQH_t; - -/*USB Device Endpoint transfer descriptor*/ -typedef struct { - uint32_t next_dTD; - uint32_t dTD_token; - uint32_t buf[5]; - uint32_t reserved; -} dTD_t; - -static dQH_t __align(2048) dQH[(USBD_MAX_ENDPOINT_NUM + 1U) * 2U]; /* Queue Heads aligned to 2k boundary */ -static dTD_t __align( 32) dTD[(USBD_MAX_ENDPOINT_NUM + 1U) * 2U]; /* Transfer Descriptors */ - -static ARM_USBD_SignalDeviceEvent_t SignalDeviceEvent; -static ARM_USBD_SignalEndpointEvent_t SignalEndpointEvent; - -static ARM_USBD_STATE usbd_state; -/* Setup packet data buffer */ -static uint32_t setup_packet[2]; -/* Setup packet received */ -static volatile uint8_t setup_packet_recv; - -// Function prototypes -static int32_t USBD_EndpointConfigure (uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size); - -#define M4SS_CLK_PWR_CTRL_BASE_ADDR 0x46000000 -#define USB_SYSCLK_CLKCLNR_ON (1 << 23) -#define M4SS_CLOCK_CONFIG_REG4 *(volatile uint32_t *)(M4SS_CLK_PWR_CTRL_BASE_ADDR + 0x24) -#define M4SS_CLOCK_CONFIG_REG5 *(volatile uint32_t *)(M4SS_CLK_PWR_CTRL_BASE_ADDR + 0x28) - -#define M4SS_MISC_REG_BASE 0x46008000 - -#define MISC_USB_CONFIG_REG *((volatile uint32_t *)(M4SS_MISC_REG_BASE + 0x1C)) -#define NWPAON_ACCESS_CTRL_CLEAR *((volatile uint32_t *)(NWPAON_MEM_HOST_ACCESS_CTRL_CLEAR)) -#define MISC_CFG_RST_LATCH_STATUS *((volatile uint32_t *)(M4SS_MISC_REG_BASE + 0x10)) -#define MISC_CFG_HOST_CTRL *((volatile uint32_t *)(M4SS_MISC_REG_BASE + 0x0C)) - -#define MISC_USB_SET_REG1 *((volatile uint32_t *)(M4SS_MISC_REG_BASE + 0xF0)) -#define MISC_USB_CLEAR_REG1 *((volatile uint32_t *)(M4SS_MISC_REG_BASE + 0xF4)) - -// Auxiliary functions - -/** - * @fn void USBD_HW_EndpointFlush (uint8_t ep_addr) - * @brief Flush Endpoint. - * @param[in] ep_addr : Endpoint Address - * - ep_addr.0..3: Address - * - ep_addr.7: Direction - * -*/ -static void USBD_HW_EndpointFlush (uint8_t ep_addr) { - uint32_t ep_msk=0; - - ep_msk = EP_MSK(ep_addr); - /*USB endpoint flush*/ - USB->USB_ENDPTFLUSH = ep_msk; - while (USB->USB_ENDPTFLUSH & ep_msk); -} - -/** - * @fn void USBD_Reset (void) - * @brief Reset USB Endpoint settings and variables. -*/ -static void USBD_Reset (void) { - uint8_t i; - - setup_packet[0] = 0U; - setup_packet[1] = 0U; - setup_packet_recv = 0U; - memset((void *)dQH, 0, sizeof(dQH)); - memset((void *)dTD, 0, sizeof(dTD)); - - /*Disable all the supported endpoint for tx and rx*/ - for (i = 1U; i <= USBD_MAX_ENDPOINT_NUM; i++) { - ENDPTCTRL(i) &= ~(USB_ENDPTCTRL_RXE | USB_ENDPTCTRL_TXE); - } - - /* Clear interrupts*/ - USB->USB_ENDPTNAK = 0xFFFFFFFFUL; - USB->USB_ENDPTNAKEN = 0U; - USB->USBSTS_D = 0xFFFFFFFFUL; - /*Clearing all setup tokens*/ - USB->USB_ENDPTSETUPSTAT = USB->USB_ENDPTSETUPSTAT; - /*Clearing all endpoint complete status bits*/ - USB->USB_ENDPTCOMPLETE = USB->USB_ENDPTCOMPLETE; - - /*Clear all prime status*/ - while (USB->USB_ENDPTPRIME); - /*Clear all primed buffers*/ - USB->USB_ENDPTFLUSH = 0xFFFFFFFFUL; - while (USB->USB_ENDPTFLUSH); - - /*Interupt threshold control to isusue an interrupt*/ - USB->USBCMD_D &= ~(USB_USBCMD_D_ITC(0xFFUL)); - - /* Initialization of an control Endpoint0*/ - if (usbd_state.speed == ARM_USB_SPEED_HIGH) { - USBD_EndpointConfigure (0x00U, ARM_USB_ENDPOINT_CONTROL, 64U); - USBD_EndpointConfigure (0x80U, ARM_USB_ENDPOINT_CONTROL, 64U); - } else { - /*for full/low speed*/ - USBD_EndpointConfigure (0x00U, ARM_USB_ENDPOINT_CONTROL, 8U); - USBD_EndpointConfigure (0x80U, ARM_USB_ENDPOINT_CONTROL, 8U); - } - - /*Assign the start of endpoint list address register*/ - USB->USB_ENDPOINTLISTADDR = (uint32_t)dQH; - - /*setup lockout mode off*/ - USB->USBMODE_D |= USB_USBMODE_D_SLOM; -} - -/** - * @fn void USBD_HW_ReadSetupPacket (void) - * @brief Read Setup Packet to buffer. -*/ -static void USBD_HW_ReadSetupPacket (void) { - - do { - /*Setup tripwire*/ - USB->USBCMD_D |= USB_USBCMD_D_SUTW; - /*Copy the setup packet data received to buffer */ - setup_packet[0] = dQH[0].setup[0]; - setup_packet[1] = dQH[0].setup[1]; - } while (!(USB->USBCMD_D & USB->USBCMD_D)); - /*Clear the setup tripwire*/ - USB->USBCMD_D &= ~USB_USBCMD_D_SUTW; - /*clear the setup endpoint status bit*/ - USB->USB_ENDPTSETUPSTAT = 1U; - -} - -/** - * @fn void USBD_HW_EndpointTransfer (uint8_t ep_addr) - * @brief Start transfer on Endpoint. - * @param[in] ep_addr : Endpoint Address - * - ep_addr.0..3: Address - * - ep_addr.7: Direction -*/ -static void USBD_HW_EndpointTransfer (uint8_t ep_addr) { - dQH_t *ptr_dqh; - dTD_t *ptr_dtd; - uint8_t *data; - uint32_t ep_msk=0, num=0; - uint8_t ep_qhnum=0; - - ep_qhnum = EP_QHNUM(ep_addr); - ep_msk = EP_MSK(ep_addr); - ptr_dqh = &dQH[ep_qhnum]; - ptr_dtd = &dTD[ep_qhnum]; - - data = ptr_dqh->data + ptr_dqh->num_transferred_total; - num = ptr_dqh->num - ptr_dqh->num_transferred_total; - /* max transfer length is 16k*/ - if (num > 0x4000U) { num = 0x4000U; } - - while (USB->USB_ENDPTSTAT & ep_msk); - - memset (ptr_dtd, 0, sizeof(dTD_t)); - - /* Driver does not support linked endpoint descriptors next address is invalid*/ - ptr_dtd->next_dTD = 1U; - - /* Configure Transfer Descriptor */ - ptr_dtd->dTD_token |= USB_dTD_TOKEN_TOTAL_BYTES(num) | - USB_dTD_TOKEN_IOC | - USB_dTD_TOKEN_STATUS_ACTIVE ; - - /* Set Buffer Addresses */ - ptr_dtd->buf[0] = (uint32_t)(data ); - ptr_dtd->buf[1] = (uint32_t)(data + 0x1000U); - ptr_dtd->buf[2] = (uint32_t)(data + 0x2000U); - ptr_dtd->buf[3] = (uint32_t)(data + 0x3000U); - ptr_dtd->buf[4] = (uint32_t)(data + 0x4000U); - /*clear status*/ - ptr_dqh->dTD_token &= ~USB_dTD_TOKEN_STATUS_MSK; - /* Save Transfer Descriptor address to overlay area of queue heads*/ - ptr_dqh->next_dTD = (uint32_t)(ptr_dtd); - - ptr_dqh->num_transferring = num; - /*start the endpoint transfer*/ - USB->USB_ENDPTPRIME |= ep_msk; -} - - -// USBD Driver functions - -/** - * @fn ARM_DRIVER_VERSION USBD_GetVersion (void) - * @brief Get driver version. - * @return \ref ARM_DRIVER_VERSION -*/ -static ARM_DRIVER_VERSION USBD_GetVersion (void) { return usbd_driver_version; } - -/** - * @fn ARM_USBD_CAPABILITIES USBD_GetCapabilities (void) - * @brief Get driver capabilities. - * @return \ref ARM_USBD_CAPABILITIES -*/ -static ARM_USBD_CAPABILITIES USBD_GetCapabilities (void) { return usbd_driver_capabilities; } - -/** - * @fn int32_t USBD_Initialize (ARM_USBD_SignalDeviceEvent_t cb_device_event, - ARM_USBD_SignalEndpointEvent_t cb_endpoint_event) - * @brief Initialize USB Device Interface. - * @param[in] cb_device_event : Pointer to \ref ARM_USBD_SignalDeviceEvent - * @param[in] cb_endpoint_event : Pointer to \ref ARM_USBD_SignalEndpointEvent - * @return \ref execution_status -*/ -static int32_t USBD_Initialize (ARM_USBD_SignalDeviceEvent_t cb_device_event, - ARM_USBD_SignalEndpointEvent_t cb_endpoint_event) { - - if(MCU_RET->CHIP_CONFIG_MCU_READ_b.DISABLE_USB == 1U){ - /* If USB peripheral is not supported by this chip*/ - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - if ((USB_state & USBD_DRIVER_INITIALIZED) != 0U) { return ARM_DRIVER_OK; } - - SignalDeviceEvent = cb_device_event; - SignalEndpointEvent = cb_endpoint_event; - - USB_role = ARM_USB_ROLE_DEVICE; - - USB_state = USBD_DRIVER_INITIALIZED; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBD_Uninitialize (void) - * @brief De-initialize USB Device Interface. - * @return \ref execution_status -*/ -static int32_t USBD_Uninitialize (void) { - - USB_role = ARM_USB_ROLE_NONE; - USB_state &= ~USBD_DRIVER_INITIALIZED; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBD_PowerControl (ARM_POWER_STATE state) - * @brief Control USB Device Interface Power. - * @param[in] state : Power state - * @return \ref execution_status -*/ -static int32_t USBD_PowerControl (ARM_POWER_STATE state) { - - switch (state) { - case ARM_POWER_OFF: - /*Disable interrupt*/ - NVIC_DisableIRQ (USB_IRQn); - NVIC_ClearPendingIRQ (USB_IRQn); - USB_state &= ~USBD_DRIVER_POWERED; - - setup_packet_recv = 0U; - memset((void *)&usbd_state, 0, sizeof(usbd_state)); - memset((void *)dQH, 0, sizeof(dQH)); - memset((void *)dTD, 0, sizeof(dTD)); - break; - - case ARM_POWER_FULL: - if ((USB_state & USBD_DRIVER_INITIALIZED) == 0U) { return ARM_DRIVER_ERROR; } - if ((USB_state & USBD_DRIVER_POWERED) != 0U) { return ARM_DRIVER_OK; } - - /*USB Config*/ - MISC_USB_CONFIG_REG =0x11; - /*Enable M4 USB*/ - NWPAON_ACCESS_CTRL_CLEAR = BIT(4); - - // Reset USB Controller - USB->USBCMD_D = USB_USBCMD_D_RST; - - while ((USB->USBCMD_D & (USB_USBCMD_D_RS | USB_USBCMD_D_RST)) != 0U); - - /*Set the usb in device mode and setup lockout mode*/ - USB->USBMODE_D = USB_USBMODE_D_CM1_0(2U) | USB_USBMODE_D_SLOM; - /* USB device reset*/ - USBD_Reset (); - -#if (RTE_USB_USB0_HS_EN) - USB->USB_PORTSC1_D &= ~USB_PORTSC1_D_PFSC; -#else - USB->USB_PORTSC1_D |= USB_PORTSC1_D_PFSC; -#endif - - /* Set all the usb interrupts*/ - USB->USBINTR_D = (USB_USBINTR_D_UE | - USB_USBINTR_D_PCE | - USB_USBINTR_D_SLE | - USB_USBINTR_D_URE); - - /*Set power flag*/ - USB_state |= USBD_DRIVER_POWERED; - /*Enable the usb interrupt */ - NVIC_EnableIRQ (USB_IRQn); - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBD_DeviceConnect (void) - * @brief Connect USB Device. - * @return \ref execution_status -*/ -static int32_t USBD_DeviceConnect (void) { - - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return ARM_DRIVER_ERROR; } - - USB->USBCMD_D |= USB_USBCMD_D_RS; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBD_DeviceDisconnect (void) - * @brief Disconnect USB Device. - * @return \ref execution_status -*/ -static int32_t USBD_DeviceDisconnect (void) { - - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return ARM_DRIVER_ERROR; } - - USB->USBCMD_D &= ~USB_USBCMD_D_RS; - -#if (RTE_USB0_IND0_PIN_EN) - USB->PORTSC1_D &= ~USB_PORTSC1_D_PIC1_0(1); // Clear indicator LED0 :FIXME :led indication dedicated pin not there -#endif - - return ARM_DRIVER_OK; -} - -/** - * @fn ARM_USBD_STATE USBD_DeviceGetState (void) - * @brief Get current USB Device State. - * @return Device State \ref ARM_USBD_STATE -*/ -static ARM_USBD_STATE USBD_DeviceGetState (void) { - ARM_USBD_STATE dev_state = { 0U, 0U, 0U }; - uint32_t portsc1_d=0; - - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return dev_state; } - - portsc1_d = USB->USB_PORTSC1_D; - dev_state = usbd_state; - /*Current status of usb device connection and usb device bus status*/ - dev_state.active = ((portsc1_d & USB_PORTSC1_D_CCS) != 0U) && - ((portsc1_d & USB_USBSTS_D_SLI) == 0U) ; - - return dev_state; -} - -/** - * @fn int32_t USBD_DeviceRemoteWakeup (void) - * @brief Trigger USB Remote Wakeup. - * @return \ref execution_status -*/ -static int32_t USBD_DeviceRemoteWakeup (void) { - - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return ARM_DRIVER_ERROR; } - /*Enable the phy clock*/ - USB->USB_PORTSC1_D &= ~USB_PORTSC1_D_PHCD; - /* Force Port Resume*/ - USB->USB_PORTSC1_D |= USB_PORTSC1_D_FPR; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBD_DeviceSetAddress (uint8_t dev_addr) - * @brief Set USB Device Address. - * @param[in] dev_addr : Device Address - * @return \ref execution_status -*/ -static int32_t USBD_DeviceSetAddress (uint8_t dev_addr) { - - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return ARM_DRIVER_ERROR; } - - USB->USB_DEVICEADDR = (dev_addr << USB_DEVICEADDR_USBADR_POS) & USB_DEVICEADDR_USBADR_MSK; - USB->USB_DEVICEADDR |= USB_DEVICEADDR_USBADRA; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBD_ReadSetupPacket (uint8_t *setup) - * @brief Read setup packet received over Control Endpoint. - * @param[out] setup : Pointer to buffer for setup packet - * @return \ref execution_status -*/ -static int32_t USBD_ReadSetupPacket (uint8_t *setup) { - - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return ARM_DRIVER_ERROR; } - if (setup_packet_recv == 0U) { return ARM_DRIVER_ERROR; } - - setup_packet_recv = 0U; - memcpy(setup, setup_packet, 8); - /* If new setup packet was received while this was being read*/ - if (setup_packet_recv != 0U) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBD_EndpointConfigure (uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size) - * @brief Configure USB Endpoint. - * @param[in] ep_addr : Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - * @param[in] ep_type : Endpoint Type (ARM_USB_ENDPOINT_xxx) - * @param[in] ep_max_packet_size : Endpoint Maximum Packet Size - * @return \ref execution_status -*/ -static int32_t USBD_EndpointConfigure (uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size) { - dQH_t *ptr_dqh; - uint32_t ep_mult=0; - uint32_t ep_packet_size=0; - uint8_t ep_num=0,ep_sll=0; - - ep_num = EP_NUM(ep_addr); - if (ep_num > USBD_MAX_ENDPOINT_NUM) { return ARM_DRIVER_ERROR; } - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return ARM_DRIVER_ERROR; } - - ptr_dqh = &dQH[EP_QHNUM(ep_addr)]; - if (ptr_dqh->ep_active != 0U) { return ARM_DRIVER_ERROR_BUSY; } - - ep_num = EP_NUM(ep_addr); - ep_sll = EP_SLL(ep_addr); - ep_mult = (ep_max_packet_size & ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_MASK) >> 11; - ep_packet_size = ep_max_packet_size & ARM_USB_ENDPOINT_MAX_PACKET_SIZE_MASK; - - memset((void *)ptr_dqh, 0, sizeof(dQH_t)); - - ptr_dqh->ep_type = ep_type; - if (ep_type == ARM_USB_ENDPOINT_ISOCHRONOUS) { - /* For isochronous endpoints number of transactions per microframe in high-speed (or frame in full-speed)*/ - /* has to be 1 more than additional transactions per microframe for high-speed (or 1 for full-speed)*/ - ep_mult++; - } - - if ((ep_mult > 1U) && (usbd_state.speed == ARM_USB_SPEED_FULL)) { ep_mult = 1U; } - - ptr_dqh->cap = ((ep_mult << USB_EPQH_CAP_MULT_POS) & USB_EPQH_CAP_MULT_MSK) | - (USB_EPQH_CAP_MAX_PACKET_LEN(ep_packet_size)) | - (USB_EPQH_CAP_ZLT) | - ((ep_addr == 0U) * USB_EPQH_CAP_IOS); - ptr_dqh->next_dTD = 1U; - ptr_dqh->dTD_token = 0U; - - USBD_HW_EndpointFlush(ep_addr); - - /*clear all the enpoint settings*/ - ENDPTCTRL(ep_num) &= ~((USB_ENDPTCTRL_RXS | - USB_ENDPTCTRL_RXT_MSK | - USB_ENDPTCTRL_RXI | - USB_ENDPTCTRL_RXR | - USB_ENDPTCTRL_RXE ) - << ep_sll); - - /*set the enpoint setting*/ - ENDPTCTRL(ep_num) |= (USB_ENDPTCTRL_RXT(ep_type) | - USB_ENDPTCTRL_RXR | - USB_ENDPTCTRL_RXE ) - << ep_sll; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBD_EndpointUnconfigure (uint8_t ep_addr) - * @brief Unconfigure USB Endpoint. - * @param[in] ep_addr : Endpoint Address - * - ep_addr.0..3: Address - * - ep_addr.7: Direction - * @return \ref execution_status -*/ -static int32_t USBD_EndpointUnconfigure (uint8_t ep_addr) { - dQH_t *ptr_dqh; - dTD_t *ptr_dtd; - uint8_t ep_qhnum=0, ep_num=0, ep_sll=0; - - ep_num = EP_NUM(ep_addr); - if (ep_num > USBD_MAX_ENDPOINT_NUM) { return ARM_DRIVER_ERROR; } - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return ARM_DRIVER_ERROR; } - - ep_qhnum = EP_QHNUM(ep_addr); - ptr_dqh = &dQH[ep_qhnum]; - if (ptr_dqh->ep_active != 0U) { return ARM_DRIVER_ERROR_BUSY; } - - ptr_dtd = &dTD[ep_qhnum]; - ep_sll = EP_SLL(ep_addr); - - /*clear all the enpoint settings*/ - ENDPTCTRL(ep_num) &= ~((USB_ENDPTCTRL_RXS | - USB_ENDPTCTRL_RXT_MSK | - USB_ENDPTCTRL_RXI | - USB_ENDPTCTRL_RXR | - USB_ENDPTCTRL_RXE ) - << ep_sll); - - ENDPTCTRL(ep_num) |= (USB_ENDPTCTRL_RXR << ep_sll); - - memset((void *)ptr_dqh, 0, sizeof(dQH_t)); - memset((void *)ptr_dtd, 0, sizeof(dTD_t)); - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBD_EndpointStall (uint8_t ep_addr, bool stall) - * @brief Set/Clear Stall for USB Endpoint. - * @param[in] ep_addr : Endpoint Address - * - ep_addr.0..3: Address - * - ep_addr.7: Direction - * @param[in] stall : Operation - * - \b false Clear - * - \b true Set - * @return \ref execution_status -*/ -static int32_t USBD_EndpointStall (uint8_t ep_addr, bool stall) { - dQH_t *ptr_dqh; - uint8_t ep_num=0, ep_sll=0; - - ep_num = EP_NUM(ep_addr); - if (ep_num > USBD_MAX_ENDPOINT_NUM) { return ARM_DRIVER_ERROR; } - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return ARM_DRIVER_ERROR; } - - ptr_dqh = &dQH[EP_QHNUM(ep_addr)]; - if (ptr_dqh->ep_active != 0U) { return ARM_DRIVER_ERROR_BUSY; } - /*check the endppoint is IN packet or OUT packet*/ - ep_sll = EP_SLL(ep_addr); - - if (stall != 0U) { - /*Set endpoint stall for IN or OUT packet*/ - ENDPTCTRL(ep_num) |= (USB_ENDPTCTRL_RXS << ep_sll); - } else { - /*Clear the endpoint stalling*/ - ENDPTCTRL(ep_num) &= ~(USB_ENDPTCTRL_RXS << ep_sll); - - ptr_dqh->dTD_token = 0U; - - USBD_HW_EndpointFlush(ep_addr); - /*Set data toggle reset */ - ENDPTCTRL(ep_num) |= (USB_ENDPTCTRL_RXR << ep_sll); - } - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBD_EndpointTransfer (uint8_t ep_addr, uint8_t *data, uint32_t num) - * @brief Read data from or Write data to USB Endpoint. - * @param[in] ep_addr : Endpoint Address - * - ep_addr.0..3: Address - * - ep_addr.7: Direction - * @param[out] data : Pointer to buffer for data to read or with data to write - * @param[in] num : Number of data bytes to transfer - * @return \ref execution_status -*/ -static int32_t USBD_EndpointTransfer (uint8_t ep_addr, uint8_t *data, uint32_t num) { - dQH_t *ptr_dqh; - - if (EP_NUM(ep_addr) > USBD_MAX_ENDPOINT_NUM) { return ARM_DRIVER_ERROR; } - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return ARM_DRIVER_ERROR; } - - ptr_dqh = &dQH[EP_QHNUM(ep_addr)]; - if (ptr_dqh->ep_active != 0U) { return ARM_DRIVER_ERROR_BUSY; } - - ptr_dqh->ep_active = 1U; - - ptr_dqh->data = data; - ptr_dqh->num = num; - ptr_dqh->num_transferred_total = 0U; - ptr_dqh->num_transferring = 0U; - /* Start transfer*/ - USBD_HW_EndpointTransfer(ep_addr); - - return ARM_DRIVER_OK; -} - -/** - * @fn uint32_t USBD_EndpointTransferGetResult (uint8_t ep_addr) - * @brief Get result of USB Endpoint transfer. - * @param[in] ep_addr : Endpoint Address - * - ep_addr.0..3: Address - * - ep_addr.7: Direction - * @return number of successfully transferred data bytes -*/ -static uint32_t USBD_EndpointTransferGetResult (uint8_t ep_addr) { - - if (EP_NUM(ep_addr) > USBD_MAX_ENDPOINT_NUM) { return 0U; } - - return (dQH[EP_QHNUM(ep_addr)].num_transferred_total); -} - -/** - * @fn int32_t USBD_EndpointTransferAbort (uint8_t ep_addr) - * @brief Abort current USB Endpoint transfer. - * @param[in] ep_addr : Endpoint Address - * - ep_addr.0..3: Address - * - ep_addr.7: Direction - * @return \ref execution_status -*/ -static int32_t USBD_EndpointTransferAbort (uint8_t ep_addr) { - dQH_t *ptr_dqh; - uint32_t ep_msk=0; - uint8_t ep_num=0, ep_sll=0; - - ep_num = EP_NUM(ep_addr); - if (ep_num > USBD_MAX_ENDPOINT_NUM) { return ARM_DRIVER_ERROR; } - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return ARM_DRIVER_ERROR; } - - ptr_dqh = &dQH[EP_QHNUM(ep_addr)]; - ep_msk = EP_MSK(ep_addr); - ep_sll = EP_SLL(ep_addr); - - USBD_HW_EndpointFlush(ep_addr); - /*Clear completed Flag*/ - USB->USB_ENDPTCOMPLETE = ep_msk; - ENDPTCTRL(ep_num) |= (USB_ENDPTCTRL_RXR << ep_sll); - - ptr_dqh->dTD_token &= ~0xFFU; - - ptr_dqh->ep_active = 0U; - - return ARM_DRIVER_OK; -} - -/** - * @fn uint16_t USBD_GetFrameNumber (void) - * @brief Get current USB Frame Number. - * @return Frame Number -*/ -static uint16_t USBD_GetFrameNumber (void) { - - if ((USB_state & USBD_DRIVER_POWERED) == 0U) { return 0U; } - - return ((USB->USB_FRINDEX_D & USB_FRINDEX_D_FRINDEX13_3_MSK) >> USB_FRINDEX_D_FRINDEX13_3_POS); -} - -/** - * @fn void USBD0_IRQ (void) - * @brief USB0 Device Interrupt Routine (IRQ). -*/ -void USBD_IRQ (void) { - dQH_t *ptr_dqh; - uint32_t status=0 , complete=0; - uint16_t ep_packet_size=0, received_data=0; - uint8_t ep_num=0, ep_addr=0; - - status = USB->USBSTS_D & USB->USBINTR_D; - /*Read the enpoint complete status*/ - complete = USB->USB_ENDPTCOMPLETE; - - /*Clear all active interrupts*/ - USB->USBSTS_D = status; - /*Endpoint complete status clear*/ - USB->USB_ENDPTCOMPLETE = complete; - - /*Reset interrupt*/ - if ((status & USB_USBSTS_D_URI) != 0U) { - USBD_Reset(); - usbd_state.speed = ARM_USB_SPEED_FULL; - SignalDeviceEvent(ARM_USBD_EVENT_RESET); - } - - /* Suspend interrupt */ - if ((status & USB_USBSTS_D_SLI) != 0U) { - SignalDeviceEvent(ARM_USBD_EVENT_SUSPEND); - -#if (RTE_USB0_IND0_PIN_EN) - USB->USB_PORTSC1_D &= ~USB_PORTSC1_D_PIC15_14(1); // Clear indicator LED0 -#endif - } - /* Port change detect interrupt*/ - if ((status & USB_USBSTS_D_PCI) != 0U) { - if ((( USB->USB_PORTSC1_D & USB_PORTSC1_D_PSPD_MSK) >> USB_PORTSC1_D_PSPD_POS) == 2U) { - usbd_state.speed = ARM_USB_SPEED_HIGH; - SignalDeviceEvent(ARM_USBD_EVENT_HIGH_SPEED); - } else { - usbd_state.speed = ARM_USB_SPEED_FULL; - } - -#if (RTE_USB0_IND0_PIN_EN) - USB->USB_PORTSC1_D |= USB_PORTSC1_D_PIC15_14(1); // Set indicator LED0 -#endif - SignalDeviceEvent(ARM_USBD_EVENT_RESUME); - } - - if ((status & USB_USBSTS_D_UI) != 0U) { /* USB interrupt on short packet rx*/ - if (( USB->USB_ENDPTSETUPSTAT) != 0U) { /* Setup Packet Received*/ - USBD_HW_ReadSetupPacket(); - setup_packet_recv = 1U; - SignalEndpointEvent(0, ARM_USBD_EVENT_SETUP); - } - - if ((complete & USB_ENDPTCOMPLETE_ETCE_MSK) != 0U) { - /*IN packet data sent*/ - for (ep_num = 0U; ep_num <= USBD_MAX_ENDPOINT_NUM; ep_num++) { - if ((complete & USB_ENDPTCOMPLETE_ETCE_MSK) & (1U << (ep_num + USB_ENDPTCOMPLETE_ETCE_POS))) { - ep_addr = ep_num | ARM_USB_ENDPOINT_DIRECTION_MASK; - ptr_dqh = &dQH[EP_QHNUM(ep_addr)]; - - ptr_dqh->num_transferred_total += ptr_dqh->num_transferring; - - /*Max packet data sent ot not*/ - if (ptr_dqh->num == ptr_dqh->num_transferred_total) { - ptr_dqh->ep_active = 0U; - SignalEndpointEvent(ep_addr, ARM_USBD_EVENT_IN); - } else if (ptr_dqh->ep_active != 0U) { - /*Transfer remaining data if max packet data is not transmitted*/ - USBD_HW_EndpointTransfer (ep_addr); - } - } - } - } - /*OUT packet data received*/ - if ((complete & USB_ENDPTCOMPLETE_ERCE_MSK) != 0U) { - for (ep_num = 0U; ep_num <= USBD_MAX_ENDPOINT_NUM; ep_num++) { - if ((complete & USB_ENDPTCOMPLETE_ERCE_MSK) & (1 << ep_num)) { - ep_addr = ep_num; - ptr_dqh = &dQH[EP_QHNUM(ep_addr)]; - ep_packet_size = (ptr_dqh->cap & USB_EPQH_CAP_MAX_PACKET_LEN_MSK) >> USB_EPQH_CAP_MAX_PACKET_LEN_POS; - - received_data = ptr_dqh->num_transferring - - ((ptr_dqh->dTD_token & USB_dTD_TOKEN_TOTAL_BYTES_MSK) >> USB_dTD_TOKEN_TOTAL_BYTES_POS); - ptr_dqh->num_transferred_total += received_data; - - /* check for the All data received and data terminated with zero length packet*/ - if (((received_data % ep_packet_size) != 0U) || (ptr_dqh->num == ptr_dqh->num_transferred_total)) { - ptr_dqh->ep_active = 0U; - SignalEndpointEvent(ep_addr, ARM_USBD_EVENT_OUT); - } else if (ptr_dqh->ep_active != 0U) { - /*if all data is not received receive next*/ - USBD_HW_EndpointTransfer (ep_addr); - } - } - } - } - } -} - - -ARM_DRIVER_USBD Driver_USBD0 = { - USBD_GetVersion, - USBD_GetCapabilities, - USBD_Initialize, - USBD_Uninitialize, - USBD_PowerControl, - USBD_DeviceConnect, - USBD_DeviceDisconnect, - USBD_DeviceGetState, - USBD_DeviceRemoteWakeup, - USBD_DeviceSetAddress, - USBD_ReadSetupPacket, - USBD_EndpointConfigure, - USBD_EndpointUnconfigure, - USBD_EndpointStall, - USBD_EndpointTransfer, - USBD_EndpointTransferGetResult, - USBD_EndpointTransferAbort, - USBD_GetFrameNumber -}; -#endif diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USBH.c b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USBH.c deleted file mode 100644 index d1b946312..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/USBH.c +++ /dev/null @@ -1,244 +0,0 @@ -/* -------------------------------------------------------------------------- - * Copyright (c) 2013-2016 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 01. Oct 2018 - * $Revision: V1.0 - * - * Driver: Driver_USBH0_HCI - * Configured: via RTE_Device.h configuration file - * Project: USB Host 0 HCI Controller (EHCI) Driver for Silicon Labs MCU - * -------------------------------------------------------------------------- - * Use the following configuration settings in the middleware component - * to connect to this driver. - * - * Configuration Setting Value - * --------------------- ----- - * Connect to hardware via Driver_USBH# = 0 - * USB Host controller interface = EHCI - * -------------------------------------------------------------------------- */ - -/* History: - * Version 1.0 - * - Initial CMSIS Driver API V5.4.0 release - */ -#include "rsi_ccp_user_config.h" -#if defined(CHIP_9118) -#include "Driver_USBH.h" - - -#include "USB.h" -#include "RTE_Device.h" - - -extern uint8_t USB_role; -extern uint8_t USB_state; - -#define M4SS_CLK_PWR_CTRL_BASE_ADDR 0x46000000 -#define USB_SYSCLK_CLKCLNR_ON (1 << 23) -#define M4SS_CLOCK_CONFIG_REG4 *(volatile uint32_t *)(M4SS_CLK_PWR_CTRL_BASE_ADDR + 0x24) -#define M4SS_CLOCK_CONFIG_REG5 *(volatile uint32_t *)(M4SS_CLK_PWR_CTRL_BASE_ADDR + 0x28) - -#define M4SS_MISC_REG_BASE 0x46008000 - -#define MISC_USB_CONFIG_REG *((volatile uint32_t *)(M4SS_MISC_REG_BASE + 0x1C)) -#define NWPAON_ACCESS_CTRL_CLEAR *((volatile uint32_t *)(NWPAON_MEM_HOST_ACCESS_CTRL_CLEAR)) -#define MISC_CFG_RST_LATCH_STATUS *((volatile uint32_t *)(M4SS_MISC_REG_BASE + 0x10)) -#define MISC_CFG_HOST_CTRL *((volatile uint32_t *)(M4SS_MISC_REG_BASE + 0x0C)) - -#define MISC_USB_SET_REG1 *((volatile uint32_t *)(M4SS_MISC_REG_BASE + 0xF0)) -#define MISC_USB_CLEAR_REG1 *((volatile uint32_t *)(M4SS_MISC_REG_BASE + 0xF4)) - -// USBH EHCI Driver ************************************************************ - -#define ARM_USBH_EHCI_DRIVER_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) - -// Driver Version -static const ARM_DRIVER_VERSION usbh_ehci_driver_version = { ARM_USBH_API_VERSION, ARM_USBH_EHCI_DRIVER_VERSION }; - -// Driver Capabilities -static const ARM_USBH_HCI_CAPABILITIES usbh_ehci_driver_capabilities = { - 0x0001U // Root HUB available Ports Mask -}; - -static ARM_USBH_HCI_Interrupt_t EHCI_IRQ; - -/** - * @fn void RSI_TimerDelayUs(uint32_t delay_ms) - * @brief This API is used create delay in micro seconds. - * @param[in] delay_ms : timer delay in micro seconds - * @return None - */ -void RSI_DelayUs(uint32_t delay_us) -{ - /**/ - RSI_ULPSS_TimerClkConfig( ULPCLK ,ENABLE_STATIC_CLK,0,ULP_TIMER_32MHZ_RC_CLK,0); - - /* Sets periodic mode */ - RSI_TIMERS_SetTimerMode(TIMERS, ONESHOT_TIMER, TIMER_0); - - /* Sets timer in 1 Micro second mode */ - RSI_TIMERS_SetTimerType(TIMERS, MICRO_SEC_MODE, TIMER_0); - - /* 1 Micro second timer configuration */ - RSI_TIMERS_MicroSecTimerConfig(TIMERS, TIMER_0, 32, 0 ,MICRO_SEC_MODE); - - RSI_TIMERS_SetMatch(TIMERS, TIMER_0,delay_us); - - RSI_TIMERS_TimerStart(TIMERS, TIMER_0); - - while(!RSI_TIMERS_InterruptStatus(TIMERS,TIMER_0 )); -} - - -// USBH EHCI Driver functions - -/** - * @fn ARM_DRIVER_VERSION USBH_HCI_GetVersion (void) - * @brief Get USB Host HCI (OHCI/EHCI) driver version. - * @return \ref ARM_DRIVER_VERSION -*/ -static ARM_DRIVER_VERSION USBH_HCI_GetVersion (void) { return usbh_ehci_driver_version; } - -/** - * @fn ARM_USBH_HCI_CAPABILITIES USBH_HCI_GetCapabilities (void) - * @brief Get driver capabilities. - * @return \ref ARM_USBH_HCI_CAPABILITIES -*/ -static ARM_USBH_HCI_CAPABILITIES USBH_HCI_GetCapabilities (void) { return usbh_ehci_driver_capabilities; } - -/** - * @fn int32_t USBH_HCI_Initialize (ARM_USBH_HCI_Interrupt_t cb_interrupt) - * @brief Initialize USB Host HCI (OHCI/EHCI) Interface. - * @param[in] cb_interrupt : Pointer to Interrupt Handler Routine - * @return \ref execution_status -*/ -static int32_t USBH_HCI_Initialize (ARM_USBH_HCI_Interrupt_t cb_interrupt) { - - if ((USB_state & USBH_DRIVER_INITIALIZED) != 0U) { return ARM_DRIVER_OK; } - - EHCI_IRQ = cb_interrupt; - - USB_role = ARM_USB_ROLE_HOST; - - /*USB_PinsConfigure*/ - RSI_EGPIO_SetPinMux(EGPIO,RTE_USB_OTG_PORT,RTE_USB_OTG_PIN,EGPIO_PIN_MUX_MODE0); - - RSI_EGPIO_SetDir(EGPIO,RTE_USB_OTG_PORT,RTE_USB_OTG_PIN,EGPIO_CONFIG_DIR_OUTPUT); - - RSI_EGPIO_SetPin(EGPIO,RTE_USB_OTG_PORT,RTE_USB_OTG_PIN,RTE_USB_OTG_STATUS_HIGH); - - USB_state = USBH_DRIVER_INITIALIZED; - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBH_HCI_Uninitialize (void) - * @brief De-initialize USB Host HCI (OHCI/EHCI) Interface. - * @return \ref execution_status -*/ -static int32_t USBH_HCI_Uninitialize (void) { - - - USB_role = ARM_USB_ROLE_NONE; - USB_state &= ~USBH_DRIVER_INITIALIZED; - - /*Uninitialize the USB pin configuration*/ - RSI_EGPIO_SetPin(EGPIO,RTE_USB_OTG_MODE,RTE_USB_OTG_PIN,RTE_USB_OTG_STATUS_LOW); - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBH_HCI_PowerControl (ARM_POWER_STATE state) - * @brief Control USB Host HCI (OHCI/EHCI) Interface Power. - * @param[in] state : Power state - * @return \ref execution_status -*/ -static int32_t USBH_HCI_PowerControl (ARM_POWER_STATE state) { - - switch (state) { - case ARM_POWER_OFF: - NVIC_DisableIRQ (USB_IRQn); // Disable interrupt - NVIC_ClearPendingIRQ (USB_IRQn); // Clear pending interrupt - /*USB Host detection disable through software */ - MISC_CFG_HOST_CTRL |=(BIT(14) & (~BIT(12))); - USB_state &= ~USBH_DRIVER_POWERED; // Clear powered flag - break; - - case ARM_POWER_FULL: - if ((USB_state & USBH_DRIVER_INITIALIZED) == 0U) { return ARM_DRIVER_ERROR; } - if ((USB_state & USBH_DRIVER_POWERED) != 0U) { return ARM_DRIVER_OK; } - - /*USB configuration*/ - MISC_USB_CONFIG_REG =0x11; - /*USB Host detection through software */ - MISC_CFG_HOST_CTRL |=(BIT(14) | BIT(12)); - /*USB in m4*/ - NWPAON_ACCESS_CTRL_CLEAR = BIT(4); - /*USB is in soft reset*/ - MISC_USB_SET_REG1 =BIT(0); - /*100ms delay*/ - RSI_DelayUs(100000); - /*USB soft reset release after 100ms*/ - MISC_USB_CLEAR_REG1 =BIT(0); - - USB_state |= USBH_DRIVER_POWERED; // Set powered flag - NVIC_EnableIRQ (USB_IRQn); - - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -/** - * @fn int32_t USBH_HCI_PortVbusOnOff (uint8_t port, bool vbus) - * @brief USB Host HCI (OHCI/EHCI) Root HUB Port VBUS on/off. - * @param[in] port : Root HUB Port Number - * @param[in] vbus : - - \b false VBUS off - - \b true VBUS on - \return \ref execution_status -*/ -static int32_t USBH_HCI_PortVbusOnOff (uint8_t port, bool power) { - - /*VBUS signal is controlled by ehci only*/ - if (((1U << port) & usbh_ehci_driver_capabilities.port_mask) == 0U) { return ARM_DRIVER_ERROR; } - return ARM_DRIVER_OK; -} - -/** - * @fn void USBH0_IRQ (void) - * @brief USB0 Host Interrupt Routine (IRQ). -*/ -void USBH_IRQ (void) { - EHCI_IRQ(); -} - -ARM_DRIVER_USBH_HCI Driver_USBH0_HCI = { - USBH_HCI_GetVersion, - USBH_HCI_GetCapabilities, - USBH_HCI_Initialize, - USBH_HCI_Uninitialize, - USBH_HCI_PowerControl, - USBH_HCI_PortVbusOnOff -}; -#endif diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_can.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_can.slcc deleted file mode 100644 index b86d70a87..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_can.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: cmsis_can -label: CMSIS CAN -package: platform -description: > - Controller Area Network Driver API's -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -component_root_path: "components/device/silabs/si91x/mcu/drivers" -ui_hints: - visibility: never -source: - - path: "cmsis_driver/CAN.c" -include: - - path: "cmsis_driver" - file_list: - - path: "CAN.h" -provides: - - name: cmsis_can \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_emac.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_emac.slcc deleted file mode 100644 index 4f9388f2b..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_emac.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: cmsis_emac -label: CMSIS EMAC -package: platform -description: > - EMAC Driver API's -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers" -source: - - path: "cmsis_driver/EMAC.c" -include: - - path: "cmsis_driver" - file_list: - - path: "EMAC.h" -provides: - - name: cmsis_emac \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_mci.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_mci.slcc deleted file mode 100644 index 09b9c868b..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_mci.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: cmsis_mci -label: CMSIS MCI -package: platform -description: > - MCI Driver API's -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers" -source: - - path: "cmsis_driver/MCI.c" -include: - - path: "cmsis_driver" - file_list: - - path: "MCI.h" -provides: - - name: cmsis_mci \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_phy_lan.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_phy_lan.slcc deleted file mode 100644 index 3cbcc29fc..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_phy_lan.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: cmsis_phy_lan -label: CMSIS PHY LAN 8742A -package: platform -description: > - CMSIS PHY LAN 8742A Driver API's -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers" -source: - - path: "cmsis_driver/PHY_LAN8742A.c" -include: - - path: "cmsis_driver" - file_list: - - path: "PHY_LAN8742A.h" -provides: - - name: cmsis_phy_lan \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_usb.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_usb.slcc deleted file mode 100644 index 83c3da890..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_usb.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: cmsis_usb -label: CMSIS USB -package: platform -description: > - Universal Serial Bus Driver API's -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers" -source: - - path: "cmsis_driver/USB.c" -include: - - path: "cmsis_driver" - file_list: - - path: "USB.h" -provides: - - name: cmsis_usb \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_usbd.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_usbd.slcc deleted file mode 100644 index 58230c6ba..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_usbd.slcc +++ /dev/null @@ -1,14 +0,0 @@ -id: cmsis_usbd -label: CMSIS USBD -package: platform -description: > - USBD Driver APIs's -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers" -source: - - path: "cmsis_driver/USBD.c" -provides: - - name: cmsis_usbd \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_usbh.slcc b/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_usbh.slcc deleted file mode 100644 index 222e0c6f8..000000000 --- a/components/device/silabs/si91x/mcu/drivers/cmsis_driver/component/cmsis_usbh.slcc +++ /dev/null @@ -1,14 +0,0 @@ -id: cmsis_usbh -label: CMSIS USBH -package: platform -description: > - USBH Driver API's -category: Device|Si91x|MCU|Internal|CMSIS Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers" -source: - - path: "cmsis_driver/USBH.c" -provides: - - name: cmsis_usbh \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/component/sl_si91x_button_917.slcc b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/component/sl_si91x_button_917.slcc index 2da60fb7a..3bb447e42 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/component/sl_si91x_button_917.slcc +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/component/sl_si91x_button_917.slcc @@ -14,7 +14,8 @@ instantiable: prefix: instance config_file: - path: "config/sl_si91x_button_pin_config.h" - - path: "config/sl_si91x_button_{{instance}}_config.h" + - path: "config/sl_si91x_button_init_{{instance}}_config.h" + file_id: button_config include: - path: "inc" file_list: diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/config/sl_si91x_button_init_instance_config.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/config/sl_si91x_button_init_instance_config.h new file mode 100644 index 000000000..e2457c339 --- /dev/null +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/config/sl_si91x_button_init_instance_config.h @@ -0,0 +1,47 @@ +/***************************************************************************/ /** + * @file sl_si91x_button_init_inst_config.h + * @brief Button Driver Configuration + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_BUTTON_INIT_INST_CONFIG_H +#define SL_SI91X_BUTTON_INIT_INST_CONFIG_H + +#warning \ + "For an OPN or SoC project, button instance not defined. Installing the [ENABLE USER CONFIGURATION] component or defining USER_CONFIGURATION_ENABLE MACRO to 1 is the first step towards configuring the board macros. Then, define the macros in the header file in accordance with the board connections.." + +#if USER_CONFIGURATION_ENABLE +// <<< Use Configuration Wizard in Context Menu >>> + +// Button Interrupt Configuration +// High level interrupt +// Low level interrupt +// High level and low level interrupt +// Rise edge interrupt +// Fall edge interrupt +// Rise edge and fall edge interrupt +// Default: RISE_EDGE_AND_FALL_EDGE_INTERRUPT +#define SL_BUTTON_CONFIG_BTN0_INTR RISE_EDGE_AND_FALL_EDGE_INTERRUPT + +// <<< end of configuration section >>> + +// <<< sl:start pin_tool >>> +// SL_SI91X_BUTTON_0 +// $[GPIO_SL_SI91X_BUTTON_0] +#ifndef SL_SI91X_BUTTON_0_PORT +#define SL_SI91X_BUTTON_0_PORT UULP_VBAT +#endif +#ifndef SL_SI91X_BUTTON_0_PIN +#define SL_SI91X_BUTTON_0_PIN 2 +#endif +// [GPIO_SL_SI91X_BUTTON_0]$ +// <<< sl:end pin_tool >>> + +#define SL_BUTTON_BTN0_PIN SL_SI91X_BUTTON_0_PIN +#define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT +#define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER + +#endif // USER_CONFIGURATION_ENABLE +#endif // SL_SI91X_BUTTON_INIT_INST_CONFIG_H diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/config/sl_si91x_button_pin_config.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/config/sl_si91x_button_pin_config.h index b9e2c6548..d51c4cfc8 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/config/sl_si91x_button_pin_config.h +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/config/sl_si91x_button_pin_config.h @@ -10,16 +10,21 @@ #define SL_SI91X_BUTTON_PIN_CONFIG_H #include "RTE_Device_917.h" +#include "sl_si91x_button_instances.h" #define SL_SI91x_BUTTON_COUNT (2) +#ifndef SL_SI91X_BUTTON_0_PORT #define SL_BUTTON_BTN0_PIN RTE_BUTTON0_PIN #define SL_BUTTON_BTN0_PORT RTE_BUTTON0_PORT #define SL_BUTTON_BTN0_NUMBER RTE_BUTTON0_NUMBER +#endif +#ifndef SL_SI91X_BUTTON_1_PORT #define SL_BUTTON_BTN1_PIN RTE_BUTTON1_PIN #define SL_BUTTON_BTN1_PORT RTE_BUTTON1_PORT #define SL_BUTTON_BTN1_NUMBER RTE_BUTTON1_NUMBER #define SL_BUTTON_BTN1_PAD RTE_BUTTON1_PAD +#endif #endif // SL_SI91X_BUTTON_PIN_CONFIG_H \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/inst/sl_si91x_button_instances.c.jinja b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/inst/sl_si91x_button_instances.c.jinja index 307cceff8..3c6802205 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/inst/sl_si91x_button_instances.c.jinja +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/inst/sl_si91x_button_instances.c.jinja @@ -30,9 +30,6 @@ #include "sl_si91x_button_pin_config.h" #include "sl_si91x_button_instances.h" -{% for inst in simple_button_instance -%} -#include "sl_si91x_button_{{ inst | lower }}_config.h" -{% endfor %} {%- for inst in simple_button_instance | sort %} sl_button_t const button_{{ inst | lower }} = { diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/inst/sl_si91x_button_instances.h.jinja b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/inst/sl_si91x_button_instances.h.jinja index a18fdcac2..b8b89eaed 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/inst/sl_si91x_button_instances.h.jinja +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/inst/sl_si91x_button_instances.h.jinja @@ -32,6 +32,9 @@ #define SL_SI91X_BUTTON_INSTANCES_H #include "sl_si91x_button.h" +{% for inst in simple_button_instance -%} +#include "sl_si91x_button_init_{{ inst | lower }}_config.h" +{% endfor %} {% for inst in simple_button_instance -%} extern const sl_button_t button_{{ inst | lower }}; diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/src/sl_si91x_button.c b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/src/sl_si91x_button.c index 7dc7817e9..557e7adcd 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/src/sl_si91x_button.c +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/button/src/sl_si91x_button.c @@ -22,6 +22,7 @@ #include "sl_common.h" #include "sl_si91x_button.h" #include "sl_si91x_button_pin_config.h" +#include "sl_si91x_button_instances.h" #include "si91x_device.h" #include "sl_driver_gpio.h" #include "sl_si91x_driver_gpio.h" diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627/component/sl_icm40627.slcc b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627/component/sl_icm40627.slcc index 67bfb2dfc..634d2b912 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627/component/sl_icm40627.slcc +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627/component/sl_icm40627.slcc @@ -6,6 +6,9 @@ description: > category: Device|Si91x|MCU|Hardware quality: production component_root_path: "components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627" +config_file: + - path: config/sl_si91x_icm40627_config.h + file_id: icm40627_config source: - path: "src/sl_si91x_icm40627.c" include: diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627/config/sl_si91x_icm40627_config.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627/config/sl_si91x_icm40627_config.h new file mode 100644 index 000000000..ffc294c69 --- /dev/null +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627/config/sl_si91x_icm40627_config.h @@ -0,0 +1,43 @@ +/***************************************************************************/ /** +* @file sl_si91x_icm40627_config.h +* * @brief SSI Master/Slave API configuration +* ******************************************************************************* +* * # License +* * Copyright 2023 Silicon Laboratories Inc. www.silabs.com +* ******************************************************************************* +* * +* * SPDX-License-Identifier: Zlib +* * +* * The licensor of this software is Silicon Laboratories Inc. +* * +* * This software is provided 'as-is', without any express or implied +* * warranty. In no event will the authors be held liable for any damages +* * arising from the use of this software. +* * +* * Permission is granted to anyone to use this software for any purpose, +* * including commercial applications, and to alter it and redistribute it +* * freely, subject to the following restrictions: +* * +* * 1. The origin of this software must not be misrepresented; you must not +* * claim that you wrote the original software. If you use this software +* * in a product, an acknowledgment in the product documentation would be +* * appreciated but is not required. +* * 2. Altered source versions must be plainly marked as such, and must not be +* * misrepresented as being the original software. +* * 3. This notice may not be removed or altered from any source distribution. +* * +* ******************************************************************************/ + +#ifndef SL_SI91X_ICM40627_CONFIG_H +#define SL_SI91X_ICM40627_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +#warning "ICM40267 is not supported on this board" + +#ifdef __cplusplus +} +#endif +#endif /* SL_SI91X_ICM40627_CONFIG_H */ diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627/src/sl_si91x_icm40627.c b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627/src/sl_si91x_icm40627.c index a1c0d7646..e3f230ec9 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627/src/sl_si91x_icm40627.c +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/icm40627/src/sl_si91x_icm40627.c @@ -691,7 +691,7 @@ sl_status_t sl_si91x_icm40627_calibrate_accel_and_gyro(sl_ssi_handle_t ssi_drive icm40627_read_register(ssi_driver_handle, SL_ICM40627_REG_OFFSET_USER1, data, sizeof(data)); uint8_t temp = data[1]; gyro_bias_stored[0] |= (int16_t)((temp & 0x0F) << 8); - gyro_bias_stored[1] = (int16_t)((temp & 0xF0) << 8); + gyro_bias_stored[1] = (int16_t)((temp & 0xF0) << 4); icm40627_read_register(ssi_driver_handle, SL_ICM40627_REG_OFFSET_USER2, data, sizeof(data)); gyro_bias_stored[1] |= (int16_t)data[1]; @@ -721,7 +721,7 @@ sl_status_t sl_si91x_icm40627_calibrate_accel_and_gyro(sl_ssi_handle_t ssi_drive /* Subtract from the factory calibration value */ /* Read factory accelerometer trim values */ - accel_bias_factory[0] = (int16_t)((temp & 0xF0) << 8); + accel_bias_factory[0] = (int16_t)((temp & 0xF0) << 4); icm40627_read_register(ssi_driver_handle, SL_ICM40627_REG_OFFSET_USER5, data, sizeof(data)); accel_bias_factory[0] |= (int16_t)data[1]; @@ -731,7 +731,7 @@ sl_status_t sl_si91x_icm40627_calibrate_accel_and_gyro(sl_ssi_handle_t ssi_drive icm40627_read_register(ssi_driver_handle, SL_ICM40627_REG_OFFSET_USER7, data, sizeof(data)); temp = data[1]; accel_bias_factory[1] |= (int16_t)((temp & 0x0F) << 8); - accel_bias_factory[2] = (int16_t)((temp & 0xF0) << 8); + accel_bias_factory[2] = (int16_t)((temp & 0xF0) << 4); icm40627_read_register(ssi_driver_handle, SL_ICM40627_REG_OFFSET_USER8, data, sizeof(data)); accel_bias_factory[2] |= (int16_t)data[1]; @@ -741,15 +741,15 @@ sl_status_t sl_si91x_icm40627_calibrate_accel_and_gyro(sl_ssi_handle_t ssi_drive accel_bias_factory[2] -= ((accel_bias[2] / 8) & ~1); /* Split the values into two bytes */ - data[0] = gyro_bias_stored[0] >> 8; - data[1] = (((gyro_bias_stored[0]) & 0xF0) >> 8) | ((gyro_bias_stored[1]) & 0xF0); - data[2] = gyro_bias_stored[1] >> 8; - data[3] = gyro_bias_stored[2] >> 8; - data[4] = (((gyro_bias_stored[2]) & 0xF0) >> 8) | ((accel_bias_factory[0]) & 0xF0); - data[5] = accel_bias_factory[0] >> 8; - data[6] = accel_bias_factory[1] >> 8; - data[7] = (((accel_bias_factory[2]) & 0xF0) >> 8) | ((accel_bias_factory[1]) & 0xF0); - data[8] = accel_bias_factory[2] >> 8; + data[0] = gyro_bias_stored[0] & 0xFF; + data[1] = ((gyro_bias_stored[0]) >> 8) | ((gyro_bias_stored[1] >> 4) & 0xF0); + data[2] = gyro_bias_stored[1] & 0xFF; + data[3] = gyro_bias_stored[2] & 0xFF; + data[4] = ((gyro_bias_stored[2]) >> 8) | ((accel_bias_factory[0] >> 4) & 0xF0); + data[5] = accel_bias_factory[0] & 0xFF; + data[6] = accel_bias_factory[1] & 0xFF; + data[7] = (((accel_bias_factory[1])) >> 8) | ((accel_bias_factory[2] >> 4) & 0xF0); + data[8] = accel_bias_factory[2] & 0xFF; /* Write the gyro and accel bias values to the chip */ icm40627_write_register(ssi_driver_handle, SL_ICM40627_REG_OFFSET_USER0, &data[0], 1); diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/component/sl_si91x_led_917.slcc b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/component/sl_si91x_led_917.slcc index aeb5a51bf..86c43f882 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/component/sl_si91x_led_917.slcc +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/component/sl_si91x_led_917.slcc @@ -9,35 +9,80 @@ description: > Instances should be named as 'led0' or 'led1'. category: Device|Si91x|MCU|Hardware quality: production -component_root_path: "components/device/silabs/si91x/mcu/drivers/hardware_drivers/led" +component_root_path: "components/device/silabs/si91x/mcu/drivers/hardware_drivers" instantiable: prefix: instance config_file: - - path: "config/sl_si91x_led_config.h" + - path: "led/config/sl_si91x_led_init_{{instance}}_config.h" + file_id: led_config + unless: [si917_dev_board] + - path: "led/config/sl_si91x_led_config.h" + unless: [si917_dev_board] + - path: "rgb_led/config/sl_si91x_rgb_led_config.h" + condition: [si917_dev_board] include: - - path: inc + - path: led/inc file_list: - path: sl_si91x_led.h + unless: [si917_dev_board] + - path: rgb_led/inc + file_list: + - path: sl_si91x_rgb_led.h + condition: [si917_dev_board] source: - - path: src/sl_si91x_led.c + - path: led/src/sl_si91x_led.c + unless: [si917_dev_board] + - path: rgb_led/src/sl_si91x_rgb_led.c + condition: [si917_dev_board] requires: - name: sl_gpio + - name: sleeptimer + condition: [si917_dev_board] provides: - name: sl_si91x_led_917 template_file: - - path: "inst/sl_si91x_led_instances.c.jinja" - - path: "inst/sl_si91x_led_instances.h.jinja" + - path: "led/inst/sl_si91x_led_instances.c.jinja" + unless: [si917_dev_board] + - path: "led/inst/sl_si91x_led_instances.h.jinja" + unless: [si917_dev_board] + - path: "rgb_led/inst/sl_si91x_rgb_led_instances.c.jinja" + condition: [si917_dev_board] + - path: "rgb_led/inst/sl_si91x_rgb_led_instances.h.jinja" + condition: [si917_dev_board] template_contribution: - name: simple_led_instance value: "{{instance}}" + unless: [si917_dev_board] - name: component_catalog value: "{{instance}}" + unless: [si917_dev_board] - name: component_catalog value: simple_led + unless: [si917_dev_board] - name: component_catalog value: "simple_led_{{instance}}" + unless: [si917_dev_board] - name: event_handler value: event: driver_init include: sl_si91x_led_instances.h - handler: led_init_instances \ No newline at end of file + handler: led_init_instances + unless: [si917_dev_board] + - name: event_handler + value: + event: driver_init + include: sl_si91x_rgb_led_instances.h + handler: rgb_led_init_instances + condition: [si917_dev_board] + - name: led_instance + value: "{{instance}}" + condition: [si917_dev_board] + - name: component_catalog + value: "{{instance}}" + condition: [si917_dev_board] + - name: component_catalog + value: led + condition: [si917_dev_board] + - name: component_catalog + value: "led_{{instance}}" + condition: [si917_dev_board] diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/config/sl_si91x_led_config.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/config/sl_si91x_led_config.h index 8f1427463..419ec7fb3 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/config/sl_si91x_led_config.h +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/config/sl_si91x_led_config.h @@ -10,27 +10,21 @@ #define SL_SI91X_LED_CONFIG_H #include "RTE_Device_917.h" +#include "sl_si91x_led_instances.h" #define SL_SI91x_LED_COUNT 2 -#ifndef SI917_DEVKIT - +#ifndef SL_SI91X_LED_0_PORT #define SL_LED_LED0_PIN RTE_LED0_PIN #define SL_LED_LED0_PORT RTE_LED0_PORT #define SL_LED_LED0_NUMBER RTE_LED0_NUMBER +#endif +#ifndef SL_SI91X_LED_1_PORT #define SL_LED_LED1_PIN RTE_LED1_PIN #define SL_LED_LED1_PORT RTE_LED1_PORT #define SL_LED_LED1_NUMBER RTE_LED1_NUMBER #define SL_LED_LED1_PAD RTE_LED1_PAD - -#else - -#define SL_LED_LEDB_PIN RTE_LEDB_PIN -#define SL_LED_LEDB_PORT RTE_LEDB_PORT -#define SL_LED_LEDB_NUMBER RTE_LEDB_NUMBER -#define SL_LED_LEDB_PAD RTE_LEDB_PAD - #endif #endif // SL_SI91X_LED_CONFIG_H diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/config/sl_si91x_led_init_instance_config.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/config/sl_si91x_led_init_instance_config.h new file mode 100644 index 000000000..761178a31 --- /dev/null +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/config/sl_si91x_led_init_instance_config.h @@ -0,0 +1,49 @@ +/***************************************************************************/ /** + * @file sl_si91x_led_init_inst_config.h + * @brief Led Driver Configuration + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + *******************************************************************************/ + +#ifndef SL_SI91X_LED_INIT_INST_CONFIG_H +#define SL_SI91X_LED_INIT_INST_CONFIG_H + +#warning "Simple LED Driver GPIO pins not configured-Appropriate pins should be selected for OPN" + +#if USER_CONFIGURATION_ENABLE +#ifdef SL_SI91X_ACX_MODULE +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_0 +// $[GPIO_SL_SI91X_LED_0] +#ifndef SL_SI91X_LED_0_PORT +#define SL_SI91X_LED_0_PORT ULP +#endif +#ifndef SL_SI91X_LED_0_PIN +#define SL_SI91X_LED_0_PIN 0 +#endif +// [GPIO_SL_SI91X_LED_0]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED0_PIN SL_SI91X_LED_0_PIN +#define SL_LED_LED0_PORT RTE_LED0_PORT +#define SL_LED_LED0_NUMBER RTE_LED0_NUMBER +#else +// <<< sl:start pin_tool >>> +// SL_SI91X_LED_1 +// $[GPIO_SL_SI91X_LED_1] +#ifndef SL_SI91X_LED_1_PORT +#define SL_SI91X_LED_1_PORT ULP +#endif +#ifndef SL_SI91X_LED_1_PIN +#define SL_SI91X_LED_1_PIN 2 +#endif +// [GPIO_SL_SI91X_LED_1]$ +// <<< sl:end pin_tool >>> + +#define SL_LED_LED1_PIN SL_SI91X_LED_1_PIN +#define SL_LED_LED1_PORT RTE_LED1_PORT +#define SL_LED_LED1_NUMBER RTE_LED1_NUMBER +#endif // SL_SI91X_ACX_MODULE +#endif // USER_CONFIGURATION_ENABLE +#endif // SL_SI91X_LED_INIT_INST_CONFIG_H \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inc/sl_si91x_led.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inc/sl_si91x_led.h index afe566d69..22c09385c 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inc/sl_si91x_led.h +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inc/sl_si91x_led.h @@ -18,9 +18,9 @@ #ifndef __SL_SI91X_LED_H__ #define __SL_SI91X_LED_H__ -#include "sl_si91x_led_config.h" #include #include +#include "sl_si91x_led_instances.h" /** * @addtogroup LED LED @@ -28,19 +28,6 @@ * @{ */ -/** - * @brief Structure representing an LED configuration. - * - * This structure contains the configuration parameters for an LED, including - * the port and pin numbers, as well as an identifier for the LED. It is used - * to initialize and control the LED hardware. - */ -typedef struct { - uint8_t pin; ///< Pin number of the LED. - uint8_t port; ///< Port number of the LED. - uint8_t led_number; ///< LED number for identification. -} sl_led_t; - /***************************************************************************/ /** * @brief To configure GPIOs pertaining to the control of LEDs and initializes the selected LED GPIO and mode. @@ -48,7 +35,7 @@ typedef struct { * @details This API initializes the selected GPIOs, sets their operation modes, and configures them for controlling the LEDs. * It ensures that the GPIOs are properly configured to drive the LEDs as per the specified settings in the handle. * - * @param[in] handle The pointer to an @ref sl_led_t structure that contains the specific LED information. + * @param[in] handle The pointer to an sl_led_t structure that contains the specific LED information. * * @pre The GPIO peripheral must be enabled and clocked before calling this function. * @post The specified GPIO pin will be configured and set to the initial state as defined in the handle. @@ -127,8 +114,8 @@ void sl_si91x_led_StackIndicateActivity(bool turnOn); * * @section led_config Configuration * -* All LED instances are configured with an @ref sl_led_t struct. This struct along with a function definition for initializing LED is automatically generated when an LED is set up using Simplicity Studio's wizard. -* This struct @ref sl_led_t struct is automatically generated into the following files sl_si91x_led_instances.h and sl_si91x_led_instances.c. +* All LED instances are configured with an sl_led_t struct. This struct along with a function definition for initializing LED is automatically generated when an LED is set up using Simplicity Studio's wizard. +* This struct sl_led_t struct is automatically generated into the following files sl_si91x_led_instances.h and sl_si91x_led_instances.c. * The samples below are for a single instance called "led0". * * @code{.c} diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inst/sl_si91x_led_instances.c.jinja b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inst/sl_si91x_led_instances.c.jinja index 44551fe01..8ee560663 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inst/sl_si91x_led_instances.c.jinja +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inst/sl_si91x_led_instances.c.jinja @@ -28,9 +28,9 @@ * ******************************************************************************/ -#include "sl_si91x_led.h" #include "sl_si91x_led_config.h" #include "sl_si91x_led_instances.h" +#include "sl_si91x_led.h" {%- for inst in simple_led_instance | sort %} sl_led_t const led_{{ inst | lower }} = { diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inst/sl_si91x_led_instances.h.jinja b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inst/sl_si91x_led_instances.h.jinja index fb94da953..391f8dd16 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inst/sl_si91x_led_instances.h.jinja +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/inst/sl_si91x_led_instances.h.jinja @@ -31,7 +31,16 @@ #ifndef SL_SI91x_LED_INSTANCES_H #define SL_SI91x_LED_INSTANCES_H -#include "sl_si91x_led.h" +#include +{% for inst in simple_led_instance | sort -%} +#include "sl_si91x_led_init_{{ inst }}_config.h" +{% endfor %} + +typedef struct { + uint8_t pin; ///< Pin number of the LED. + uint8_t port; ///< Port number of the LED. + uint8_t led_number; ///< LED number for identification. +} sl_led_t; {% for inst in simple_led_instance -%} extern const sl_led_t led_{{ inst | lower }}; diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/src/sl_si91x_led.c b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/src/sl_si91x_led.c index fd5ac2559..76c6c96e9 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/src/sl_si91x_led.c +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/led/src/sl_si91x_led.c @@ -18,10 +18,10 @@ #include "si91x_device.h" #include "sl_driver_gpio.h" #include "sl_si91x_driver_gpio.h" +#include "sl_si91x_led_config.h" void sl_si91x_led_init(const sl_led_t *handle) { -#ifndef SI917_DEVKIT if (handle->led_number == 0U) { /*Enable clock*/ sl_si91x_gpio_driver_enable_clock((sl_si91x_gpio_select_clock_t)ULPCLK_GPIO); @@ -29,10 +29,6 @@ void sl_si91x_led_init(const sl_led_t *handle) /*Enable clock*/ sl_si91x_gpio_driver_enable_clock((sl_si91x_gpio_select_clock_t)M4CLK_GPIO); } -#else - /*Enable clock*/ - sl_si91x_gpio_driver_enable_clock((sl_si91x_gpio_select_clock_t)M4CLK_GPIO); -#endif sl_si91x_gpio_pin_config_t sl_gpio_pin_config = { { handle->port, handle->pin }, GPIO_OUTPUT }; sl_gpio_set_configuration(sl_gpio_pin_config); } @@ -41,48 +37,34 @@ void sl_si91x_led_set(uint8_t pin) { sl_gpio_t led_gpio_port_pin; led_gpio_port_pin.pin = pin; -#ifndef SI917_DEVKIT if (pin == SL_LED_LED0_PIN) { led_gpio_port_pin.port = SL_LED_LED0_PORT; } else { led_gpio_port_pin.port = SL_LED_LED1_PORT; } sl_gpio_driver_set_pin(&led_gpio_port_pin); -#else - led_gpio_port_pin.port = SL_LED_LEDB_PORT; - sl_gpio_driver_clear_pin(&led_gpio_port_pin); -#endif } void sl_si91x_led_clear(uint8_t pin) { sl_gpio_t led_gpio_port_pin; led_gpio_port_pin.pin = pin; -#ifndef SI917_DEVKIT if (pin == SL_LED_LED0_PIN) { led_gpio_port_pin.port = SL_LED_LED0_PORT; } else { led_gpio_port_pin.port = SL_LED_LED1_PORT; } sl_gpio_driver_clear_pin(&led_gpio_port_pin); -#else - led_gpio_port_pin.port = SL_LED_LEDB_PORT; - sl_gpio_driver_set_pin(&led_gpio_port_pin); -#endif } void sl_si91x_led_toggle(uint8_t pin) { sl_gpio_t led_gpio_port_pin; led_gpio_port_pin.pin = pin; -#ifndef SI917_DEVKIT if (pin == SL_LED_LED0_PIN) { led_gpio_port_pin.port = SL_LED_LED0_PORT; } else { led_gpio_port_pin.port = SL_LED_LED1_PORT; } -#else - led_gpio_port_pin.port = SL_LED_LEDB_PORT; -#endif sl_gpio_driver_toggle_pin(&led_gpio_port_pin); } diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/component/memlcd_917.slcc b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/component/memlcd_917.slcc index 110215522..e39048b43 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/component/memlcd_917.slcc +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/component/memlcd_917.slcc @@ -6,6 +6,9 @@ description: > category: Device|Si91x|MCU|Hardware quality: production component_root_path: "components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd" +config_file: + - path: config/sl_si91x_memlcd_config.h + file_id: memlcd_config include: - path: inc file_list: diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/config/sl_si91x_memlcd_config.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/config/sl_si91x_memlcd_config.h new file mode 100644 index 000000000..4a6c8c29f --- /dev/null +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/config/sl_si91x_memlcd_config.h @@ -0,0 +1,112 @@ +/***************************************************************************/ /** +* @file sl_si91x_memlcd_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_MEMLCD_CONFIG_H +#define SL_SI91X_MEMLCD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif +#warning \ + "For an OPN or SoC project, memlcd instances not defined. Installing the [ENABLE USER CONFIGURATION] component or defining USER_CONFIGURATION_ENABLE MACRO to 1 is the first step towards configuring the board macros. Then, define the macros in the header file in accordance with the board connections.." + +#if USER_CONFIGURATION_ENABLE +// <<< sl:start pin_tool >>> +// SL_MEMLCD +// $[SSI_SL_MEMLCD] +#ifndef SL_MEMLCD_PERIPHERAL +#define SL_MEMLCD_PERIPHERAL ULP_SSI +#endif + +// ULP_SSI MOSI_ on ULP_GPIO_1/GPIO_65 +#ifndef SL_MEMLCD_MOSI__PORT +#define SL_MEMLCD_MOSI__PORT ULP +#endif +#ifndef SL_MEMLCD_MOSI__PIN +#define SL_MEMLCD_MOSI__PIN 1 +#endif +#ifndef SL_MEMLCD_MOSI_LOC +#define SL_MEMLCD_MOSI_LOC 0 +#endif + +// ULP_SSI SCK_ on ULP_GPIO_8/GPIO_72 +#ifndef SL_MEMLCD_SCK__PORT +#define SL_MEMLCD_SCK__PORT ULP +#endif +#ifndef SL_MEMLCD_SCK__PIN +#define SL_MEMLCD_SCK__PIN 8 +#endif +#ifndef SL_MEMLCD_SCK_LOC +#define SL_MEMLCD_SCK_LOC 7 +#endif + +// ULP_SSI CS0_ on ULP_GPIO_10/GPIO_74 +#ifndef SL_MEMLCD_CS0__PORT +#define SL_MEMLCD_CS0__PORT ULP +#endif +#ifndef SL_MEMLCD_CS0__PIN +#define SL_MEMLCD_CS0__PIN 10 +#endif +#ifndef SL_MEMLCD_CS0_LOC +#define SL_MEMLCD_CS0_LOC 9 +#endif +// [SSI_SL_MEMLCD]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_ENABLE +// $[GPIO_SL_MEMLCD_DISP_ENABLE] +#ifndef SL_MEMLCD_DISP_ENABLE_PORT +#define SL_MEMLCD_DISP_ENABLE_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_ENABLE_PIN +#define SL_MEMLCD_DISP_ENABLE_PIN 0 +#endif +// [GPIO_SL_MEMLCD_DISP_ENABLE]$ +// <<< sl:end pin_tool >>> + +// <<< sl:start pin_tool >>> +// SL_MEMLCD_DISP_EXT_COMIN +// $[GPIO_SL_MEMLCD_DISP_EXT_COMIN] +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PORT +#define SL_MEMLCD_DISP_EXT_COMIN_PORT UULP_VBAT +#endif +#ifndef SL_MEMLCD_DISP_EXT_COMIN_PIN +#define SL_MEMLCD_DISP_EXT_COMIN_PIN 3 +#endif +// [GPIO_SL_MEMLCD_DISP_EXT_COMIN]$ +// <<< sl:end pin_tool >>> + +#ifdef __cplusplus +} +#endif +#endif // SL_SI91X_MEMLCD_CONFIG_H +#endif // USER_CONFIGURATION_ENABLE \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/inc/sl_memlcd.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/inc/sl_memlcd.h index 697b9ac27..a7a8891a6 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/inc/sl_memlcd.h +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/inc/sl_memlcd.h @@ -75,30 +75,37 @@ typedef struct sl_memlcd_t { * - SL_STATUS_FAIL (0x0001) - Failure. ******************************************************************************/ sl_status_t sl_memlcd_configure(struct sl_memlcd_t *device); - /***************************************************************************/ /** - * @brief Enables the memory LCD display. - * - * @details This API enables the memory LCD display. It must be called to enable the MEMLCD display. - ******************************************************************************/ + * @brief To enable the memory LCD display. + * + * @details This API must be called to enable MEMLCD display. +******************************************************************************/ void sl_memlcd_display_enable(void); /***************************************************************************/ /** - * @brief Enables or disables the display. - * + * @brief To disable the memory LCD display. + * + * @details This API must be called to disable MEMLCD display. +******************************************************************************/ +void sl_memlcd_display_disable(void); + +/***************************************************************************/ +/** + * @brief To enable or disable the display. + * * @details This API enables or disables the display. Disabling the display * does not result in data loss. Note that this API does not control the * DISP pin on the display. This pin is managed by board-specific code. - * - * @param[in] device Memory LCD Display device pointer. - * @param[in] on Boolean value to enable (true) or disable (false) the display. - * - * @return Status code of the operation: - * - SL_STATUS_OK (0x0000) - Success. - * - SL_STATUS_FAIL (0x0001) - Failure. - ******************************************************************************/ + * + * @param[in] device Display device pointer. + * + * @param[in] on Set this parameter to 'true' to enable the display. Set to 'false' in + * order to disable the display. + * + * @return status code of the operation. +******************************************************************************/ sl_status_t sl_memlcd_power_on(const struct sl_memlcd_t *device, bool on); @@ -182,20 +189,20 @@ const sl_memlcd_t *sl_memlcd_get(void); * * @details * -* @section MEMLCD_Custom Custom-Memory-LCD +* @n @section MEMLCD_Custom Custom-Memory-LCD * -* - The custom memory LCD module provides a way to add support for an LCD driver -* - that is incompatible with existing interfaces. -* - To accomplish this, the following conditions must be fulfilled. +* The custom memory LCD module enables the implementation of an +* LCD driver that is incompatible with existing interfaces. To +* accomplish this, the following conditions must be fulfilled. * * The LCD driver and the communication needs to be implemented manually. * However, some APIs must be implemented and the @ref sl_memlcd_t * structure must be initialized for the GLIB library to work properly. -* The APIs to implement are [sl_memlcd_init](https://docs.silabs.com/gecko-platform/latest/platform-hardware-driver/memlcd#sl-memlcd-init), @ref sl_memlcd_power_on, +* The APIs to implement are [sl_memlcd_init](https://docs.silabs.com/gecko-platform/5.0.1/platform-hardware-driver/memlcd#sl-memlcd-init), @ref sl_memlcd_power_on, * @ref sl_memlcd_draw and @ref sl_memlcd_get and they must follow the same * declaration as shown in the documentation. * -* In the [sl_memlcd_init](https://docs.silabs.com/gecko-platform/latest/platform-hardware-driver/memlcd#sl-memlcd-init) API, it is important to initialize a +* In the [sl_memlcd_init](https://docs.silabs.com/gecko-platform/5.0.1/platform-hardware-driver/memlcd#sl-memlcd-init) API, it is important to initialize a * @ref sl_memlcd_t type variable and fill in the "height" and "width" fields * with the real specifications of the LCD display. This same variable must be * accessible from the @ref sl_memlcd_get API as the GLIB library will @@ -205,7 +212,6 @@ const sl_memlcd_t *sl_memlcd_get(void); * custom structure needed for the implementation of the driver. * * @} end group MEMLCD ********************************************************/ - #ifdef __cplusplus } #endif diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/src/sl_memlcd.c b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/src/sl_memlcd.c index 1ad80eb71..6359e8176 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/src/sl_memlcd.c +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/memlcd/src/sl_memlcd.c @@ -115,11 +115,20 @@ sl_status_t sl_memlcd_configure(struct sl_memlcd_t *device) sl_gpio_clear_pin_output(EGPIO_ULP_PORT, SL_MEMLCD_SPI_CS_PIN); #if defined(SL_MEMLCD_EXTCOMIN_PORT) +#if (SL_SI91X_ACX_MODULE == 1) + /* Setup GPIOs */ + sl_gpio_set_pin_mode(EGPIO_ULP_PORT, SL_MEMLCD_EXTCOMIN_PIN, SL_GPIO_MODE_0, 0); + // Set output direction + sl_si91x_gpio_set_pin_direction(EGPIO_ULP_PORT, SL_MEMLCD_EXTCOMIN_PIN, GPIO_OUTPUT); + //clearing the GPIO pin + sl_gpio_clear_pin_output(EGPIO_ULP_PORT, SL_MEMLCD_EXTCOMIN_PIN); +#else // NPSS GPIO sl_si91x_gpio_select_uulp_npss_receiver(SL_MEMLCD_EXTCOMIN_PIN, GPIO_RECEIVER_EN); sl_si91x_gpio_set_uulp_npss_pin_mux(SL_MEMLCD_EXTCOMIN_PIN, NPSS_GPIO_PIN_MUX_MODE0); sl_si91x_gpio_set_uulp_npss_direction(SL_MEMLCD_EXTCOMIN_PIN, GPIO_OUTPUT); sl_si91x_gpio_set_uulp_npss_pin_value(SL_MEMLCD_EXTCOMIN_PIN, GPIO_PIN_CLEAR); +#endif #endif memlcd_instance = *device; @@ -139,12 +148,35 @@ sl_status_t sl_memlcd_refresh(const struct sl_memlcd_t *device) void sl_memlcd_display_enable(void) { // Enabling LCD display + //enable the display pin in reciever mode sl_si91x_gpio_select_uulp_npss_receiver(SL_BOARD_ENABLE_DISPLAY_PIN, GPIO_RECEIVER_EN); + + //set the pin mux mode sl_si91x_gpio_set_uulp_npss_pin_mux(SL_BOARD_ENABLE_DISPLAY_PIN, NPSS_GPIO_PIN_MUX_MODE0); + + // set the direction of the display pin in UULP GPIO instance sl_si91x_gpio_set_uulp_npss_direction(SL_BOARD_ENABLE_DISPLAY_PIN, GPIO_OUTPUT); + + //set the display pin in UULP GPIO instance sl_si91x_gpio_set_uulp_npss_pin_value(SL_BOARD_ENABLE_DISPLAY_PIN, GPIO_PIN_SET); } +void sl_memlcd_display_disable(void) +{ + // Disabling LCD display + //enable the display pin in reciever mode + sl_si91x_gpio_select_uulp_npss_receiver(SL_BOARD_ENABLE_DISPLAY_PIN, GPIO_RECEIVER_EN); + + //set the pin mux mode + sl_si91x_gpio_set_uulp_npss_pin_mux(SL_BOARD_ENABLE_DISPLAY_PIN, NPSS_GPIO_PIN_MUX_MODE0); + + // set the direction of the display pin in UULP GPIO instance + sl_si91x_gpio_set_uulp_npss_direction(SL_BOARD_ENABLE_DISPLAY_PIN, GPIO_OUTPUT); + + //clear the display pin in UULP GPIO instance + sl_si91x_gpio_set_uulp_npss_pin_value(SL_BOARD_ENABLE_DISPLAY_PIN, GPIO_PIN_CLEAR); +} + sl_status_t sl_memlcd_power_on(const struct sl_memlcd_t *device, bool on) { (void)device; @@ -301,11 +333,20 @@ sl_status_t sl_memlcd_post_wakeup_init(void) sl_gpio_clear_pin_output(EGPIO_ULP_PORT, SL_MEMLCD_SPI_CS_PIN); #if defined(SL_MEMLCD_EXTCOMIN_PORT) +#if (SL_SI91X_ACX_MODULE == 1) + /* Setup GPIOs */ + sl_gpio_set_pin_mode(EGPIO_ULP_PORT, SL_MEMLCD_EXTCOMIN_PIN, SL_GPIO_MODE_0, 0); + // Set output direction + sl_si91x_gpio_set_pin_direction(EGPIO_ULP_PORT, SL_MEMLCD_EXTCOMIN_PIN, GPIO_OUTPUT); + //clearing the GPIO pin + sl_gpio_clear_pin_output(EGPIO_ULP_PORT, SL_MEMLCD_EXTCOMIN_PIN); +#else // NPSS GPIO sl_si91x_gpio_select_uulp_npss_receiver(SL_MEMLCD_EXTCOMIN_PIN, GPIO_RECEIVER_EN); sl_si91x_gpio_set_uulp_npss_pin_mux(SL_MEMLCD_EXTCOMIN_PIN, NPSS_GPIO_PIN_MUX_MODE0); sl_si91x_gpio_set_uulp_npss_direction(SL_MEMLCD_EXTCOMIN_PIN, GPIO_OUTPUT); sl_si91x_gpio_set_uulp_npss_pin_value(SL_MEMLCD_EXTCOMIN_PIN, GPIO_PIN_CLEAR); +#endif #endif status = sl_memlcd_power_on(memlcd_post_wakeup_handle, true); @@ -337,10 +378,25 @@ static void extcomin_toggle(sl_sleeptimer_timer_handle_t *handle, void *data) { (void)handle; (void)data; + +#if (SL_SI91X_ACX_MODULE == 1) + /* Setup GPIOs */ + sl_gpio_set_pin_mode(EGPIO_ULP_PORT, SL_MEMLCD_EXTCOMIN_PIN, SL_GPIO_MODE_0, 0); + // Set output direction + sl_si91x_gpio_set_pin_direction(EGPIO_ULP_PORT, SL_MEMLCD_EXTCOMIN_PIN, GPIO_OUTPUT); + if (sl_gpio_get_pin_input(SL_GPIO_ULP_PORT, SL_MEMLCD_EXTCOMIN_PIN) == true) { + //clearing the GPIO pin + sl_gpio_clear_pin_output(EGPIO_ULP_PORT, SL_MEMLCD_EXTCOMIN_PIN); + } else { + //clearing the GPIO pin + sl_gpio_set_pin_output(EGPIO_ULP_PORT, SL_MEMLCD_EXTCOMIN_PIN); + } +#else if (sl_si91x_gpio_get_uulp_npss_pin(SL_MEMLCD_EXTCOMIN_PIN) == true) { sl_si91x_gpio_set_uulp_npss_pin_value(SL_MEMLCD_EXTCOMIN_PIN, GPIO_PIN_CLEAR); } else { sl_si91x_gpio_set_uulp_npss_pin_value(SL_MEMLCD_EXTCOMIN_PIN, GPIO_PIN_SET); } +#endif } #endif \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/component/sl_si91x_rgb_led_917.slcc b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/component/sl_si91x_rgb_led_917.slcc index 34d92a52f..d4a85dfb6 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/component/sl_si91x_rgb_led_917.slcc +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/component/sl_si91x_rgb_led_917.slcc @@ -6,6 +6,9 @@ description: > This driver supports controlling GPIO-based on/off type RGB LEDs. This component is instantiable, meaning that several named instances can be created. For each instance a configuration is generated along with an initialization struct set according to this configuration. + This driver file is now deprecated. + To ensure future-proofing and compatibility with upcoming features, + users are encouraged to migrate to the LED driver by taking reference from the sl_si91x_rgb_led application. category: Device|Si91x|MCU|Hardware quality: production component_root_path: "components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led" @@ -13,6 +16,7 @@ instantiable: prefix: instance config_file: - path: "config/sl_si91x_rgb_led_config.h" + unless: [sl_si91x_led_917] include: - path: inc file_list: @@ -21,22 +25,33 @@ source: - path: src/sl_si91x_rgb_led.c requires: - name: sl_gpio + - name: sleeptimer provides: - name: sl_si91x_rgb_led_917 +define: + - name: SI917_RGB_DRIVER_OLD + value: '1' template_file: - path: "inst/sl_si91x_rgb_led_instances.c.jinja" + unless: [sl_si91x_led_917] - path: "inst/sl_si91x_rgb_led_instances.h.jinja" + unless: [sl_si91x_led_917] template_contribution: - name: led_instance value: "{{instance}}" + unless: [sl_si91x_led_917] - name: component_catalog value: "{{instance}}" + unless: [sl_si91x_led_917] - name: component_catalog value: led + unless: [sl_si91x_led_917] - name: component_catalog value: "led_{{instance}}" + unless: [sl_si91x_led_917] - name: event_handler value: event: driver_init include: sl_si91x_rgb_led_instances.h - handler: rgb_led_init_instances \ No newline at end of file + handler: rgb_led_init_instances + unless: [sl_si91x_led_917] diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/config/sl_si91x_rgb_led_config.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/config/sl_si91x_rgb_led_config.h index c334057d4..be7f19e9c 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/config/sl_si91x_rgb_led_config.h +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/config/sl_si91x_rgb_led_config.h @@ -11,21 +11,37 @@ #include "RTE_Device_917.h" -#define SL_SI91x_LED_COUNT 2 - -#define SL_LED_RED_PIN RTE_LEDR_PIN -#define SL_LED_RED_PORT RTE_LEDR_PORT -#define SL_LED_RED_NUMBER RTE_LEDR_NUMBER -#define SL_LED_RED_PAD RTE_LEDR_PAD - -#define SL_LED_GREEN_PIN RTE_LEDG_PIN -#define SL_LED_GREEN_PORT RTE_LEDG_PORT -#define SL_LED_GREEN_NUMBER RTE_LEDG_NUMBER -#define SL_LED_GREEN_PAD RTE_LEDG_PAD - -#define SL_LED_BLUE_PIN RTE_LEDB_PIN -#define SL_LED_BLUE_PORT RTE_LEDB_PORT -#define SL_LED_BLUE_NUMBER RTE_LEDB_NUMBER -#define SL_LED_BLUE_PAD RTE_LEDB_PAD +#define SL_SI91X_RGB_LED_COUNT 1 // Define the number of RGB LEDs + +#define SL_LED_LED0_RED_PIN RTE_LED0_LEDR_PIN +#define SL_LED_LED0_RED_PORT RTE_LED0_LEDR_PORT +#define SL_LED_LED0_RED_NUMBER RTE_LED0_LEDR_NUMBER +#define SL_LED_LED0_RED_PAD RTE_LED0_LEDR_PAD + +#define SL_LED_LED0_GREEN_PIN RTE_LED0_LEDG_PIN +#define SL_LED_LED0_GREEN_PORT RTE_LED0_LEDG_PORT +#define SL_LED_LED0_GREEN_NUMBER RTE_LED0_LEDG_NUMBER +#define SL_LED_LED0_GREEN_PAD RTE_LED0_LEDG_PAD + +#define SL_LED_LED0_BLUE_PIN RTE_LED0_LEDB_PIN +#define SL_LED_LED0_BLUE_PORT RTE_LED0_LEDB_PORT +#define SL_LED_LED0_BLUE_NUMBER RTE_LED0_LEDB_NUMBER +#define SL_LED_LED0_BLUE_PAD RTE_LED0_LEDB_PAD + +// To support exisiting RGB LED instances. +#define SL_LED_RED_PIN RTE_LED0_LEDR_PIN +#define SL_LED_RED_PORT RTE_LED0_LEDR_PORT +#define SL_LED_RED_NUMBER RTE_LED0_LEDR_NUMBER +#define SL_LED_RED_PAD RTE_LED0_LEDR_PAD + +#define SL_LED_GREEN_PIN RTE_LED0_LEDG_PIN +#define SL_LED_GREEN_PORT RTE_LED0_LEDG_PORT +#define SL_LED_GREEN_NUMBER RTE_LED0_LEDG_NUMBER +#define SL_LED_GREEN_PAD RTE_LED0_LEDG_PAD + +#define SL_LED_BLUE_PIN RTE_LED0_LEDB_PIN +#define SL_LED_BLUE_PORT RTE_LED0_LEDB_PORT +#define SL_LED_BLUE_NUMBER RTE_LED0_LEDB_NUMBER +#define SL_LED_BLUE_PAD RTE_LED0_LEDB_PAD #endif // SL_SI91X_LED_CONFIG_H diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inc/sl_si91x_rgb_led.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inc/sl_si91x_rgb_led.h index 58ca9179c..f0417f6fe 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inc/sl_si91x_rgb_led.h +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inc/sl_si91x_rgb_led.h @@ -1,4 +1,5 @@ -/***************************************************************************/ /** +/***************************************************************************/ +/** * @file sl_si91x_rgb_led.h * @brief See @ref led for documentation. ******************************************************************************* @@ -18,7 +19,6 @@ #define __SL_SI91X_RGB_LED_H__ #include "sl_si91x_rgb_led_config.h" -#include #include typedef struct { @@ -28,50 +28,232 @@ typedef struct { uint8_t pad; } sl_led_t; -#define LED_ON 0 -#define LED_OFF 1 - -#define RGB_LED_PORT 0 +typedef struct { + sl_led_t *red; + sl_led_t *green; + sl_led_t *blue; +} sl_rgb_led_t; /** @addtogroup RGB LED * @ingroup SI91X_HARDWARE_DRIVER_APIS - * @brief Sample API funtions for controlling RGB LEDs. + * @brief Sample API functions for controlling RGB LEDs. * * See sl_si91x_led.c for source code. *@{ */ -/** @brief Configures GPIOs pertaining to the control of RGB LEDs. - * - * @param[in] handle The pointer to RGB LED structure that has the specific led information. - */ +/***************************************************************************/ +/** + * @brief Configures GPIOs pertaining to the control of RGB LEDs. + * + * @details This function initializes the GPIOs required to control the RGB LEDs. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific LED information. + * + * @note This function must be called before any other RGB LED control functions. + ******************************************************************************/ +void sl_si91x_simple_rgb_led_init(const sl_rgb_led_t *handle); + +/***************************************************************************/ +/** + * @brief Turns on the RGB LED. + * + * @details This function sets the GPIO pins connected to the specified RGB LED + * and starts the sleeptimer, turning it on. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific LED information. + * + * @pre Pre-conditions: + * - The RGB LED structure must be properly initialized before calling this function. + * + * @note Ensure that the GPIO pin is configured correctly before using this function. + ******************************************************************************/ +void sl_si91x_simple_rgb_led_on(const sl_rgb_led_t *handle); + +/***************************************************************************/ +/** + * @brief Turns off (clears) the RGB LED. + * + * @details This function clears the GPIO pins connected to the specified RGB LED + * and stops the sleeptimer, turning it off. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific RGB LED information. + * + * @pre Pre-conditions: + * - The RGB LED structure must be properly initialized before calling this function. + * + * @note Ensure that the GPIO pin is configured correctly before using this function. + ******************************************************************************/ +void sl_si91x_simple_rgb_led_off(const sl_rgb_led_t *handle); + +/***************************************************************************/ +/** + * @brief Atomically wraps an XOR or similar operation for the RGB LED. + * + * @details This function performs an atomic XOR operation on the RGB LED, toggling its state. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific LED information. + * + * @pre Pre-conditions: + * - The RGB LED structure must be properly initialized before calling this function. + * + * @note Ensure that the GPIO pin is configured correctly before using this function. + ******************************************************************************/ +void sl_si91x_simple_rgb_led_toggle(const sl_rgb_led_t *handle); + +/***************************************************************************/ +/** + * @brief Displays the user-defined color hex code on the RGB LED. + * + * @details This function sets the RGB LED to display the specified color hex code. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific LED information. + * + * @param[in] rgb_colour + * The color hex code to be displayed. + * + * @pre Pre-conditions: + * - The RGB LED structure must be properly initialized before calling this function. + * + * @note Ensure that the color hex code is valid and within the acceptable range. + ******************************************************************************/ +void sl_si91x_simple_rgb_led_set_colour(const sl_rgb_led_t *handle, int rgb_colour); + +/***************************************************************************/ +/** + * @brief Returns the current state of the RGB LED. + * + * @details This function retrieves the current state of the specified RGB LED. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific RGB LED information. + * + * @pre Pre-conditions: + * - The RGB LED structure must be properly initialized before calling this function. + * + * @return uint8_t + * The current state of the RGB LED. + * + * @note The returned state indicates whether the RGB LED is on or off. + ******************************************************************************/ +uint8_t sl_si91x_simple_rgb_led_get_current_state(const sl_rgb_led_t *handle); + +/***************************************************************************/ +/** + * @brief Returns the current colour of the RGB LED. + * + * @details This function retrieves the current color values of the specified RGB LED. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific RGB LED information. + * + * @param[out] red + * The pointer to the variable to store the red LED color value. + * + * @param[out] green + * The pointer to the variable to store the green LED color value. + * + * @param[out] blue + * The pointer to the variable to store the blue LED color value. + * + * @pre Pre-conditions: + * - The RGB LED structure must be properly initialized before calling this function. + * + * @note Ensure that the pointers for red, green, and blue are valid and not null. + ******************************************************************************/ +void sl_si91x_simple_rgb_led_get_colour(const sl_rgb_led_t *handle, uint16_t *red, uint16_t *green, uint16_t *blue); + +/***************************************************************************/ +/** + * @brief Older API - Not recommended to use. + * + * @details This API is deprecated in favor of the new `sl_si91x_simple_` series of APIs. + * Consider using `sl_si91x_simple_rgb_led_init`. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific LED information. + * + * @pre Pre-conditions: + * - The RGB LED structure must be properly initialized before calling this function. + * + * @note This function is deprecated and should be replaced with `sl_si91x_simple_rgb_led_init`. + ******************************************************************************/ void sl_si91x_rgb_led_init(const sl_led_t *handle); -/** @brief Turns on (sets) a GPIO pin connected to an LED so that the RGB LED - * turns on. - * - * @param[in] handle The pointer to RGB LED structure that has the specific led information. - */ +/***************************************************************************/ +/** + * @brief Older API - Not recommended to use. + * + * @details This API is deprecated in favor of the new `sl_si91x_simple_` series of APIs. + * Consider using `sl_si91x_simple_rgb_led_on`. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific LED information. + * + * @pre Pre-conditions: + * - The RGB LED structure must be properly initialized before calling this function. + * + * @note This function is deprecated and should be replaced with `sl_si91x_simple_rgb_led_on`. + ******************************************************************************/ void sl_si91x_rgb_led_on(const sl_led_t *handle); -/** @brief Turns off (clears) a GPIO pin connected to an RGB LED, which turns - * off the RGB LED. - * - * @param[in] handle The pointer to RGB LED structure that has the specific RGB led information. - */ +/***************************************************************************/ +/** + * @brief Older API - Not recommended to use. + * + * @details This API is deprecated in favor of the new `sl_si91x_simple_` series of APIs. + * Consider using `sl_si91x_simple_rgb_led_off`. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific RGB LED information. + * + * @pre Pre-conditions: + * - The RGB LED structure must be properly initialized before calling this function. + * + * @note This function is deprecated and should be replaced with `sl_si91x_simple_rgb_led_off`. + ******************************************************************************/ void sl_si91x_rgb_led_off(const sl_led_t *handle); -/** @brief Gets the current status of the RGB LED i.e. On or OFF - * - * @param[in] handle The pointer to RGB LED structure that has the specific RGB led information. - */ +/***************************************************************************/ +/** + * @brief Older API - Not recommended to use. + * + * @details This API is deprecated in favor of the new `sl_si91x_simple_` series of APIs. + * Consider using `sl_si91x_simple_rgb_led_get_current_state`. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific LED information. + * + * @pre Pre-conditions: + * - The RGB LED structure must be properly initialized before calling this function. + * + * @return uint8_t + * The current state of the RGB LED. + * + * @note This function is deprecated and should be replaced with `sl_si91x_simple_rgb_led_get_current_state`. + ******************************************************************************/ uint8_t sl_si91x_rgb_led_get_current_state(const sl_led_t *handle); -/** @brief Atomically wraps an XOR or similar operation for a single GPIO - * pin attached to an RGB LED. - * - * @param[in] handle The pointer to RGB LED structure that has the specific led information. - */ +/***************************************************************************/ +/** + * @brief Older API - Not recommended to use. + * + * @details This API is deprecated in favor of the new `sl_si91x_simple_` series of APIs. + * Consider using `sl_si91x_simple_rgb_led_toggle`. + * + * @param[in] handle + * The pointer to the RGB LED structure that contains the specific LED information. + * + * @pre Pre-conditions: + * - The RGB LED structure must be properly initialized before calling this function. + * + * @note This function is deprecated and should be replaced with `sl_si91x_simple_rgb_led_toggle`. + ******************************************************************************/ void sl_si91x_rgb_led_toggle(const sl_led_t *handle); #endif // __SL_SI91X_RGB_LED_H__ diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inst/sl_si91x_rgb_led_instances.c.jinja b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inst/sl_si91x_rgb_led_instances.c.jinja index 8fb7bb781..a3444509b 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inst/sl_si91x_rgb_led_instances.c.jinja +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inst/sl_si91x_rgb_led_instances.c.jinja @@ -1,4 +1,5 @@ -/***************************************************************************/ /** +/***************************************************************************/ +/** * @file sl_si91x_rgb_led_instances.c.jinja * @brief RGB LED Instances ******************************************************************************* @@ -31,18 +32,67 @@ #include "sl_si91x_rgb_led.h" #include "sl_si91x_rgb_led_config.h" -{%- for inst in led_instance | sort %} -sl_led_t led_{{ inst | lower }} = { - .port = SL_LED_{{ inst | upper }}_PORT, - .pin = SL_LED_{{ inst | upper }}_PIN, - .led_number = SL_LED_{{ inst | upper }}_NUMBER, - .pad = SL_LED_{{ inst | upper }}_PAD, +#ifdef SI917_RGB_DRIVER_OLD +sl_led_t led_red = { + .port = SL_LED_RED_PORT, + .pin = SL_LED_RED_PIN, + .led_number = SL_LED_RED_NUMBER, + .pad = SL_LED_RED_PAD, +}; + +sl_led_t led_green = { + .port = SL_LED_GREEN_PORT, + .pin = SL_LED_GREEN_PIN, + .led_number = SL_LED_GREEN_NUMBER, + .pad = SL_LED_GREEN_PAD, +}; + +sl_led_t led_blue = { + .port = SL_LED_BLUE_PORT, + .pin = SL_LED_BLUE_PIN, + .led_number = SL_LED_BLUE_NUMBER, + .pad = SL_LED_BLUE_PAD, }; +#else +{%- for inst in led_instance | sort %} + sl_led_t led_{{ inst | lower }}_red = { + .port = SL_LED_{{ inst | upper }}_RED_PORT, + .pin = SL_LED_{{ inst | upper }}_RED_PIN, + .led_number = SL_LED_{{ inst | upper }}_RED_NUMBER, + .pad = SL_LED_{{ inst | upper }}_RED_PAD, + }; + + sl_led_t led_{{ inst | lower }}_green = { + .port = SL_LED_{{ inst | upper }}_GREEN_PORT, + .pin = SL_LED_{{ inst | upper }}_GREEN_PIN, + .led_number = SL_LED_{{ inst | upper }}_GREEN_NUMBER, + .pad = SL_LED_{{ inst | upper }}_GREEN_PAD, + }; + + sl_led_t led_{{ inst | lower }}_blue = { + .port = SL_LED_{{ inst | upper }}_BLUE_PORT, + .pin = SL_LED_{{ inst | upper }}_BLUE_PIN, + .led_number = SL_LED_{{ inst | upper }}_BLUE_NUMBER, + .pad = SL_LED_{{ inst | upper }}_BLUE_PAD, + }; + + const sl_rgb_led_t led_{{ inst | lower }} = { + .red = &led_{{ inst | lower }}_red, + .green = &led_{{ inst | lower }}_green, + .blue = &led_{{ inst | lower }}_blue, + }; {%- endfor %} +#endif void rgb_led_init_instances(void) { - {%- for inst in led_instance %} - sl_si91x_rgb_led_init(&led_{{ inst | lower }}); - {%- endfor %} -} \ No newline at end of file +#ifdef SI917_RGB_DRIVER_OLD +sl_si91x_rgb_led_init(&led_red); +sl_si91x_rgb_led_init(&led_green); +sl_si91x_rgb_led_init(&led_blue); +#else +{%- for inst in led_instance %} +sl_si91x_simple_rgb_led_init(&led_{{ inst | lower }}); +{%- endfor %} +#endif +} diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inst/sl_si91x_rgb_led_instances.h.jinja b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inst/sl_si91x_rgb_led_instances.h.jinja index 11eb13c17..82dab05e5 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inst/sl_si91x_rgb_led_instances.h.jinja +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/inst/sl_si91x_rgb_led_instances.h.jinja @@ -33,9 +33,15 @@ #include "sl_si91x_rgb_led.h" -{% for inst in led_instance -%} -extern const sl_led_t led_{{ inst | lower }}; -{% endfor %} +#ifdef SI917_RGB_DRIVER_OLD +extern const sl_led_t led_red; +extern const sl_led_t led_green; +extern const sl_led_t led_blue; +#else +{%- for inst in led_instance %} + extern const sl_rgb_led_t led_{{ inst | lower }}; +{%- endfor %} +#endif void rgb_led_init_instances(void); diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/src/sl_si91x_rgb_led.c b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/src/sl_si91x_rgb_led.c index c6ea71d0d..4440840c1 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/src/sl_si91x_rgb_led.c +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/rgb_led/src/sl_si91x_rgb_led.c @@ -15,11 +15,276 @@ * ******************************************************************************/ #include "sl_si91x_rgb_led.h" +#include "sl_si91x_rgb_led_instances.h" #include "si91x_device.h" #include "sl_driver_gpio.h" #include "sl_si91x_driver_gpio.h" +#include "sl_sleeptimer.h" -sl_status_t status; +/******************************************************************************* + ******************************* DEFINES *********************************** + ******************************************************************************/ +/*Delay for PWM simulation*/ +#ifndef TICK_DELAY +#define TICK_DELAY 2 +#endif + +/*Total delay for each PWM cycle*/ +#ifndef PULSE_PERIOD +#define PULSE_PERIOD (TICK_DELAY * 0xFF) +#endif + +typedef enum { COLOUR_RED, COLOUR_GREEN, COLOUR_BLUE } rgb_colour_t; + +#define LED_ON 0 +#define LED_OFF 1 + +/*Default colour white*/ +#define RGB_DEFAULT_COLOUR 0xFFFFFF + +#define INVALID_HANDLE -1 + +/******************************************************************************* + *************************** LOCAL VARIABLES ******************************** + ******************************************************************************/ +typedef struct { + int32_t red; + int32_t blue; + int32_t green; +} rgb_values_t; // Represents both duty cycle and timer counter for software PWM + +typedef struct { + rgb_values_t timer_counter; // Timer counter for each color + rgb_values_t duty_cycle; // Duty cycle for each color + bool on_state; // ON state of each LED + sl_sleeptimer_timer_handle_t pwm_timer; // Sleeptimer handle for each LED +} rgb_led_params_t; + +rgb_led_params_t rgb_led_params[SL_SI91X_RGB_LED_COUNT]; + +/******************************************************************************* + ********************* LOCAL FUNCTION PROTOTYPES *************************** + ******************************************************************************/ +static void rgb_led_callback(sl_sleeptimer_timer_handle_t *timer, void *data); + +/******************************************************************************* + ************************** GLOBAL FUNCTIONS ******************************* + ******************************************************************************/ + +void sl_si91x_simple_rgb_led_init(const sl_rgb_led_t *handle) +{ + /* Check for null pointer */ + if (handle == NULL || handle->red == NULL || handle->green == NULL || handle->blue == NULL) { + return; // Exit if any handle is null + } + + /*Enable clock*/ + sl_si91x_gpio_driver_enable_clock((sl_si91x_gpio_select_clock_t)M4CLK_GPIO); + + sl_si91x_gpio_pin_config_t sl_gpio_red_pin_config = { { handle->red->port, handle->red->pin }, GPIO_OUTPUT }; + sl_gpio_set_configuration(sl_gpio_red_pin_config); + + sl_si91x_gpio_pin_config_t sl_gpio_green_pin_config = { { handle->green->port, handle->green->pin }, GPIO_OUTPUT }; + sl_gpio_set_configuration(sl_gpio_green_pin_config); + + sl_si91x_gpio_pin_config_t sl_gpio_blue_pin_config = { { handle->blue->port, handle->blue->pin }, GPIO_OUTPUT }; + sl_gpio_set_configuration(sl_gpio_blue_pin_config); + + // Set default color white color + sl_si91x_simple_rgb_led_set_colour(handle, RGB_DEFAULT_COLOUR); +} + +void sl_si91x_simple_rgb_led_on(const sl_rgb_led_t *handle) +{ + sl_status_t status; + + /* Check for null pointer */ + if (handle == NULL || handle->red == NULL || handle->green == NULL || handle->blue == NULL) { + return; // Exit if any handle is null + } + + // Timer associated with the RGB LED instance + uint8_t led_instance = handle->red->led_number; + + /*Start Sleeptimer*/ + status = sl_sleeptimer_start_periodic_timer(&rgb_led_params[led_instance].pwm_timer, + TICK_DELAY, + rgb_led_callback, + (void *)handle, + 0, + SL_SLEEPTIMER_NO_HIGH_PRECISION_HF_CLOCKS_REQUIRED_FLAG); + + /*change the on_state of LED*/ + if (status == SL_STATUS_OK) { + rgb_led_params[led_instance].on_state = true; + } +} + +static void led_colour_on_off(const sl_rgb_led_t *handle, rgb_colour_t colour, int operation) +{ + sl_gpio_t gpio_port_pin; + + /* Check for null pointer */ + if (handle == NULL || handle->red == NULL || handle->green == NULL || handle->blue == NULL) { + return; // Exit if any handle is null + } + + switch (colour) { + case COLOUR_RED: + gpio_port_pin.port = handle->red->port; + gpio_port_pin.pin = handle->red->pin; + break; + + case COLOUR_GREEN: + gpio_port_pin.port = handle->green->port; + gpio_port_pin.pin = handle->green->pin; + break; + + case COLOUR_BLUE: + gpio_port_pin.port = handle->blue->port; + gpio_port_pin.pin = handle->blue->pin; + break; + + default: + break; + } + + if (operation == LED_ON) { + sl_gpio_driver_clear_pin(&gpio_port_pin); + } else { + sl_gpio_driver_set_pin(&gpio_port_pin); + } +} + +void sl_si91x_simple_rgb_led_off(const sl_rgb_led_t *handle) +{ + /* Check for null pointer */ + if (handle == NULL || handle->red == NULL || handle->green == NULL || handle->blue == NULL) { + return; // Exit if any handle is null + } + + // Timer associated with the RGB LED instance + uint8_t led_instance = handle->red->led_number; + + sl_gpio_t red_gpio_port_pin = { handle->red->port, handle->red->pin }; + sl_gpio_t green_gpio_port_pin = { handle->green->port, handle->green->pin }; + sl_gpio_t blue_gpio_port_pin = { handle->blue->port, handle->blue->pin }; + + sl_gpio_driver_set_pin(&red_gpio_port_pin); + sl_gpio_driver_set_pin(&green_gpio_port_pin); + sl_gpio_driver_set_pin(&blue_gpio_port_pin); + + /*Stop Sleeptimer*/ + sl_sleeptimer_stop_timer(&rgb_led_params[led_instance].pwm_timer); + + /*Change the on_state of LED*/ + rgb_led_params[led_instance].on_state = false; +} + +void sl_si91x_simple_rgb_led_toggle(const sl_rgb_led_t *handle) +{ + /* Check for null pointer */ + if (handle == NULL || handle->red == NULL || handle->green == NULL || handle->blue == NULL) { + return; // Exit if any handle is null + } + + // Timer associated with the RGB LED instance + uint8_t led_instance = handle->red->led_number; + + if (rgb_led_params[led_instance].on_state == true) { + sl_si91x_simple_rgb_led_off(handle); + } else { + sl_si91x_simple_rgb_led_on(handle); + } +} + +void sl_si91x_simple_rgb_led_set_colour(const sl_rgb_led_t *handle, int rgb_colour) +{ + /* Check for null pointer */ + if (handle == NULL || handle->red == NULL || handle->green == NULL || handle->blue == NULL) { + return; // Exit if any handle is null + } + + /*Extract duty cycle values from the colour hex code*/ + rgb_led_params[handle->red->led_number].duty_cycle.red = ((rgb_colour >> 16) & 0xFF) * TICK_DELAY; + rgb_led_params[handle->green->led_number].duty_cycle.green = ((rgb_colour >> 8) & 0xFF) * TICK_DELAY; + rgb_led_params[handle->blue->led_number].duty_cycle.blue = (rgb_colour & 0xFF) * TICK_DELAY; +} + +uint8_t sl_si91x_simple_rgb_led_get_current_state(const sl_rgb_led_t *handle) +{ + /* Check for null pointer */ + if (handle == NULL || handle->red == NULL || handle->green == NULL || handle->blue == NULL) { + return INVALID_HANDLE; // Exit if any handle is null + } + + // Timer associated with the RGB LED instance + uint8_t led_instance = handle->red->led_number; + + return (uint8_t)rgb_led_params[led_instance].on_state; +} + +void sl_si91x_simple_rgb_led_get_colour(const sl_rgb_led_t *handle, uint16_t *red, uint16_t *green, uint16_t *blue) +{ + /* Check for null pointer */ + if (handle == NULL || handle->red == NULL || handle->green == NULL || handle->blue == NULL) { + return; // Exit if any handle is null + } + + // Retrieve the current duty cycle (intensity) values for each color + *red = (uint16_t)(rgb_led_params[handle->red->led_number].duty_cycle.red); + *green = (uint16_t)(rgb_led_params[handle->green->led_number].duty_cycle.green); + *blue = (uint16_t)(rgb_led_params[handle->blue->led_number].duty_cycle.blue); +} + +/** + * This function simulates a software-based PWM to pulse RGB LEDs based on their + * respective duty cycle levels. + */ +static void rgb_led_callback(sl_sleeptimer_timer_handle_t *timer_handle, void *data) +{ + sl_rgb_led_t *handle = (sl_rgb_led_t *)data; + + uint8_t led_instance = handle->red->led_number; + + if (timer_handle == &rgb_led_params[led_instance].pwm_timer) { + /*Pulse drive for red*/ + if (rgb_led_params[led_instance].timer_counter.red == rgb_led_params[led_instance].duty_cycle.red) { + led_colour_on_off(handle, COLOUR_RED, LED_OFF); + } else { + if (rgb_led_params[led_instance].timer_counter.red > PULSE_PERIOD) { + led_colour_on_off(handle, COLOUR_RED, LED_ON); + rgb_led_params[led_instance].timer_counter.red = -1; + } + } + + /*Pulse drive for green*/ + if (rgb_led_params[led_instance].timer_counter.green == rgb_led_params[led_instance].duty_cycle.green) { + led_colour_on_off(handle, COLOUR_GREEN, LED_OFF); + } else { + if (rgb_led_params[led_instance].timer_counter.green > PULSE_PERIOD) { + led_colour_on_off(handle, COLOUR_GREEN, LED_ON); + rgb_led_params[led_instance].timer_counter.green = -1; + } + } + + /*Pulse drive for blue*/ + if (rgb_led_params[led_instance].timer_counter.blue == rgb_led_params[led_instance].duty_cycle.blue) { + led_colour_on_off(handle, COLOUR_BLUE, LED_OFF); + } else { + if (rgb_led_params[led_instance].timer_counter.blue > PULSE_PERIOD) { + led_colour_on_off(handle, COLOUR_BLUE, LED_ON); + rgb_led_params[led_instance].timer_counter.blue = -1; + } + } + + rgb_led_params[led_instance].timer_counter.red++; + rgb_led_params[led_instance].timer_counter.green++; + rgb_led_params[led_instance].timer_counter.blue++; + } +} + +/*Older version APIs (Not recommended to use)*/ void sl_si91x_rgb_led_init(const sl_led_t *handle) { @@ -28,7 +293,7 @@ void sl_si91x_rgb_led_init(const sl_led_t *handle) /*Set the GPIO pin MUX */ sl_gpio_t rgb_gpio_port_pin = { handle->port, handle->pin }; - status = sl_gpio_driver_set_pin_mode(&rgb_gpio_port_pin, 0, 1); + sl_gpio_driver_set_pin_mode(&rgb_gpio_port_pin, 0, 1); /*PAD selection*/ sl_si91x_gpio_driver_enable_pad_selection(handle->pad); @@ -62,4 +327,4 @@ void sl_si91x_rgb_led_toggle(const sl_led_t *handle) { sl_gpio_t rgb_gpio_port_pin = { handle->port, handle->pin }; sl_gpio_driver_toggle_pin(&rgb_gpio_port_pin); -} +} \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/si70xx_sensor/component/sl_si70xx.slcc b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/si70xx_sensor/component/sl_si70xx.slcc index 3dcbeb41a..a8867d907 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/si70xx_sensor/component/sl_si70xx.slcc +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/si70xx_sensor/component/sl_si70xx.slcc @@ -6,6 +6,9 @@ description: > category: Device|Si91x|MCU|Hardware quality: production component_root_path: "components/device/silabs/si91x/mcu/drivers/hardware_drivers/si70xx_sensor" +config_file: + - path: config/sl_si91x_i2c_init_i2c2_config.h + file_id: si70xx_config source: - path: "src/sl_si91x_si70xx.c" include: diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/si70xx_sensor/config/sl_si91x_i2c_init_i2c2_config.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/si70xx_sensor/config/sl_si91x_i2c_init_i2c2_config.h new file mode 100644 index 000000000..6d15bfb86 --- /dev/null +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/si70xx_sensor/config/sl_si91x_i2c_init_i2c2_config.h @@ -0,0 +1,118 @@ +/***************************************************************************/ /** +* @file sl_si91x_i2c_init_i2c2_config.h +* @brief I2c driver instance configuration file. +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* SPDX-License-Identifier: Zlib +* +* The licensor of this software is Silicon Laboratories Inc. +* +* This software is provided 'as-is', without any express or implied +* warranty. In no event will the authors be held liable for any damages +* arising from the use of this software. +* +* Permission is granted to anyone to use this software for any purpose, +* including commercial applications, and to alter it and redistribute it +* freely, subject to the following restrictions: +* +* 1. The origin of this software must not be misrepresented; you must not +* claim that you wrote the original software. If you use this software +* in a product, an acknowledgment in the product documentation would be +* appreciated but is not required. +* 2. Altered source versions must be plainly marked as such, and must not be +* misrepresented as being the original software. +* 3. This notice may not be removed or altered from any source distribution. +* +******************************************************************************/ + +#ifndef SL_SI91X_I2C_INIT_I2C2_CONFIG_H +#define SL_SI91X_I2C_INIT_I2C2_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> +#ifdef __cplusplus +extern "C" { +#endif + +#warning \ + "For an OPN or SoC project, I2C instances not defined. Installing the [ENABLE USER CONFIGURATION] component or defining USER_CONFIGURATION_ENABLE MACRO to 1 is the first step towards configuring the board macros. Then, define the macros in the header file in accordance with the board connections.." + +#if USER_CONFIGURATION_ENABLE +#include "sl_si91x_i2c.h" +/******************************************************************************/ +/******************************* I2C Configuration **************************/ +// I2C2 Configuration +// Mode +// Leader mode +// Follower mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_MODE SL_I2C_LEADER_MODE + +// Operating Mode +// Standard mode +// Fast mode +// Fast plus mode +// High speed mode +// Selection of the I2C Mode. +#define SL_I2C_I2C2_OPERATING_MODE SL_I2C_STANDARD_MODE + +// Transfer Type +// Using Interrupt +// Using DMA +// Selection of the I2C Mode. +#define SL_I2C_I2C2_TRANSFER_TYPE SL_I2C_USING_INTERRUPT + +// End I2C2 Configuration +/******************************************************************************/ +// <<< end of configuration section >>> +// <<< sl:start pin_tool >>> +// SL_SI70XX +// $[I2C_SL_SI70XX] +#ifndef SL_SI70XX_PERIPHERAL +#define SL_SI70XX_PERIPHERAL ULP_I2C +#endif + +// ULP_I2C SCL on ULP_GPIO_7/GPIO_71 +#ifndef SL_SI70XX_SCL_PORT +#define SL_SI70XX_SCL_PORT ULP +#endif +#ifndef SL_SI70XX_SCL_PIN +#define SL_SI70XX_SCL_PIN 7 +#endif +#ifndef SL_SI70XX_SCL_LOC +#define SL_SI70XX_SCL_LOC 2 +#endif + +// ULP_I2C SDA on ULP_GPIO_6/GPIO_70 +#ifndef SL_SI70XX_SDA_PORT +#define SL_SI70XX_SDA_PORT ULP +#endif +#ifndef SL_SI70XX_SDA_PIN +#define SL_SI70XX_SDA_PIN 6 +#endif +#ifndef SL_SI70XX_SDA_LOC +#define SL_SI70XX_SDA_LOC 6 +#endif +// [I2C_SL_SI70XX]$ +// <<< sl:end pin_tool >>> + +#define SL_I2C_I2C2_SCL_PORT 0 +#define SL_I2C_I2C2_SCL_PIN SL_SI70XX_SCL_PIN +#define SL_I2C_I2C2_SCL_MUX SL_SI91X_I2C2_SCL_MUX +#define SL_I2C_I2C2_SCL_PAD SL_SI91X_I2C2_SCL_PAD +#define SL_I2C_I2C2_SCL_REN SL_SI91X_I2C2_SCL_REN + +#define SL_I2C_I2C2_SDA_PORT 0 +#define SL_I2C_I2C2_SDA_PIN SL_SI70XX_SDA_PIN +#define SL_I2C_I2C2_SDA_MUX SL_SI91X_I2C2_SDA_MUX +#define SL_I2C_I2C2_SDA_PAD SL_SI91X_I2C2_SDA_PAD +#define SL_I2C_I2C2_SDA_REN SL_SI91X_I2C2_SDA_REN + +#ifdef __cplusplus +} +#endif + +#endif // USER_CONFIGURATION_ENABLE +#endif // SL_SI91X_I2C_INIT_I2C2_CONFIG_H \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/sl_joystick/config/sl_si91x_joystick_config.h b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/sl_joystick/config/sl_si91x_joystick_config.h index bb9a48b1a..1bfa8536b 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/sl_joystick/config/sl_si91x_joystick_config.h +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/sl_joystick/config/sl_si91x_joystick_config.h @@ -33,6 +33,29 @@ // <<< Use Configuration Wizard in Context Menu >>> +// Channel selection + +// Joystick ADC channel (make sure to install selected ADC channel/instance) +// channel_1 +// channel_2 +// channel_3 +// channel_4 +// channel_5 +// channel_6 +// channel_7 +// channel_8 +// channel_9 +// channel_10 +// channel_11 +// channel_12 +// channel_13 +// channel_14 +// channel_15 +// channel_16 +#define JOYSTICK_ADC_CHANNEL SL_ADC_CHANNEL_1 + +// + // Joystick Voltage value Configuration // Reference voltage diff --git a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/sl_joystick/src/sl_si91x_joystick.c b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/sl_joystick/src/sl_si91x_joystick.c index 72a91f69b..1b04c6427 100644 --- a/components/device/silabs/si91x/mcu/drivers/hardware_drivers/sl_joystick/src/sl_si91x_joystick.c +++ b/components/device/silabs/si91x/mcu/drivers/hardware_drivers/sl_joystick/src/sl_si91x_joystick.c @@ -62,6 +62,7 @@ static void callback_event(uint8_t channel_no, uint8_t event); sl_status_t sl_si91x_joystick_init(void) { sl_status_t status = 0; + sl_adc_channel_config.channel = JOYSTICK_ADC_CHANNEL; uint8_t adc_channel = sl_adc_channel_config.channel; sl_adc_config.num_of_channel_enable = 1; sl_adc_config.operation_mode = SL_ADC_STATIC_MODE; @@ -106,38 +107,41 @@ sl_status_t sl_si91x_joystick_get_position(sl_joystick_state_t state, sl_joystic status = SL_STATUS_NOT_READY; break; } - //Read the ADC sampling data. - status = sl_si91x_adc_read_data_static(sl_adc_channel_config, sl_adc_config, &adc_value); - if (status != SL_STATUS_OK) { - break; - } - if (adc_value & AUXADC_DATA_TWELFTH) { - adc_value = (int16_t)(adc_value & (ADC_MASK_VALUE)); - } else { - adc_value = adc_value | AUXADC_DATA_TWELFTH; - } - sample_data = (((float)adc_value / (float)ADC_MAX_OP_VALUE) * vref_value); - sample_data = (sample_data * DIVISION_MULTIPLIER); - // determine which direction pad was pressed - if ((sample_data >= JOYSTICK_MV_C - JOYSTICK_MV_ERROR) && (sample_data <= JOYSTICK_MV_C + JOYSTICK_MV_ERROR)) { - joystick_direction = SL_JOYSTICK_C; - } else if ((sample_data >= JOYSTICK_MV_N - JOYSTICK_MV_ERROR) - && (sample_data <= JOYSTICK_MV_N + JOYSTICK_MV_ERROR)) { - joystick_direction = SL_JOYSTICK_N; - } else if ((sample_data >= JOYSTICK_MV_E - JOYSTICK_MV_ERROR) - && (sample_data <= JOYSTICK_MV_E + JOYSTICK_MV_ERROR)) { - joystick_direction = SL_JOYSTICK_E; - } else if ((sample_data >= JOYSTICK_MV_S - JOYSTICK_MV_ERROR) - && (sample_data <= JOYSTICK_MV_S + JOYSTICK_MV_ERROR)) { - joystick_direction = SL_JOYSTICK_S; - } else if ((sample_data >= JOYSTICK_MV_W - JOYSTICK_MV_ERROR) - && (sample_data <= JOYSTICK_MV_W + JOYSTICK_MV_ERROR)) { - joystick_direction = SL_JOYSTICK_W; - } else { - joystick_direction = SL_JOYSTICK_NONE; + // Check ADC start. + if (AUX_ADC_DAC_COMP->AUXADC_CTRL_1_b.ADC_ENABLE == ENABLE) { + //Read the ADC sampling data. + status = sl_si91x_adc_read_data_static(sl_adc_channel_config, sl_adc_config, &adc_value); + if (status != SL_STATUS_OK) { + break; + } + if (adc_value & AUXADC_DATA_TWELFTH) { + adc_value = (int16_t)(adc_value & (ADC_MASK_VALUE)); + } else { + adc_value = adc_value | AUXADC_DATA_TWELFTH; + } + sample_data = (((float)adc_value / (float)ADC_MAX_OP_VALUE) * vref_value); + sample_data = (sample_data * DIVISION_MULTIPLIER); + // determine which direction pad was pressed + if ((sample_data >= JOYSTICK_MV_C - JOYSTICK_MV_ERROR) && (sample_data <= JOYSTICK_MV_C + JOYSTICK_MV_ERROR)) { + joystick_direction = SL_JOYSTICK_C; + } else if ((sample_data >= JOYSTICK_MV_N - JOYSTICK_MV_ERROR) + && (sample_data <= JOYSTICK_MV_N + JOYSTICK_MV_ERROR)) { + joystick_direction = SL_JOYSTICK_N; + } else if ((sample_data >= JOYSTICK_MV_E - JOYSTICK_MV_ERROR) + && (sample_data <= JOYSTICK_MV_E + JOYSTICK_MV_ERROR)) { + joystick_direction = SL_JOYSTICK_E; + } else if ((sample_data >= JOYSTICK_MV_S - JOYSTICK_MV_ERROR) + && (sample_data <= JOYSTICK_MV_S + JOYSTICK_MV_ERROR)) { + joystick_direction = SL_JOYSTICK_S; + } else if ((sample_data >= JOYSTICK_MV_W - JOYSTICK_MV_ERROR) + && (sample_data <= JOYSTICK_MV_W + JOYSTICK_MV_ERROR)) { + joystick_direction = SL_JOYSTICK_W; + } else { + joystick_direction = SL_JOYSTICK_NONE; + } + //Update direction on pointer variable. + *pos = joystick_direction; } - //Update direction on pointer variable. - *pos = joystick_direction; } while (false); return status; } diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_cci.slcc b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_cci.slcc deleted file mode 100644 index e066a598c..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_cci.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: rsilib_cci -label: CCI -package: platform -description: > - Companion Chip Interface Peripheral API's -category: Device|Si91x|MCU|Internal|RSI Peripheral Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/peripheral_drivers" -source: - - path: "src/rsi_cci.c" -include: - - path: "inc" - file_list: - - path: "rsi_cci.h" -provides: - - name: rsilib_cci \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_fim.slcc b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_fim.slcc deleted file mode 100644 index cde564b4f..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_fim.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: rsilib_fim -label: FIM -package: platform -description: > - Filter Interpolation Matrix Multiplication Peripheral API's -category: Device|Si91x|MCU|Internal|RSI Peripheral Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/peripheral_drivers" -source: - - path: "src/rsi_fim.c" -include: - - path: "inc" - file_list: - - path: "rsi_fim.h" -provides: - - name: rsilib_fim diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_ir.slcc b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_ir.slcc deleted file mode 100644 index 78d6e7ad1..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_ir.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: rsilib_ir -label: IR -package: platform -description: > - Infrared Peripheral API's -category: Device|Si91x|MCU|Internal|RSI Peripheral Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/peripheral_drivers" -source: - - path: "src/rsi_ir.c" -include: - - path: "inc" - file_list: - - path: "rsi_ir.h" -provides: - - name: rsilib_ir diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_sdioh.slcc b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_sdioh.slcc deleted file mode 100644 index bbd342d98..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_sdioh.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: rsilib_sdioh -label: SDIOH -package: platform -description: > - SDIOH Peripheral API's -category: Device|Si91x|MCU|Internal|RSI Peripheral Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/peripheral_drivers" -source: - - path: "src/rsi_sdioh.c" -include: - - path: "inc" - file_list: - - path: "rsi_sdioh.h" -provides: - - name: rsilib_sdioh diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_sdmem.slcc b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_sdmem.slcc deleted file mode 100644 index 12fbc8268..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_sdmem.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: rsilib_sdmem -label: SDMEM -package: platform -description: > - SDMEM Peripheral API's -category: Device|Si91x|MCU|Internal|RSI Peripheral Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/peripheral_drivers" -source: - - path: "src/rsi_sdmem.c" -include: - - path: "inc" - file_list: - - path: "rsi_sdmem.h" -provides: - - name: rsilib_sdmem diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_smih.slcc b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_smih.slcc deleted file mode 100644 index 081f4762b..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_smih.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: rsilib_smih -label: SMIH -package: platform -description: > - SMIH Peripheral API's -category: Device|Si91x|MCU|Internal|RSI Peripheral Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/peripheral_drivers" -source: - - path: "src/rsi_smih.c" -include: - - path: "inc" - file_list: - - path: "rsi_smih.h" -provides: - - name: rsilib_smih \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_vad.slcc b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_vad.slcc deleted file mode 100644 index 8619fad02..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_vad.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: rsilib_vad -label: VAD -package: platform -description: > - Voice Activity Detection API's -category: Device|Si91x|MCU|Internal|RSI Peripheral Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/peripheral_drivers" -source: - - path: "src/rsi_vad.c" -include: - - path: "inc" - file_list: - - path: "rsi_vad.h" -provides: - - name: rsilib_vad \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_wurx.slcc b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_wurx.slcc deleted file mode 100644 index 5332277cf..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/component/rsilib_wurx.slcc +++ /dev/null @@ -1,18 +0,0 @@ -id: rsilib_wurx -label: WURX -package: platform -description: > - WURX Peripheral API's -category: Device|Si91x|MCU|Internal|RSI Peripheral Drivers -quality: production -ui_hints: - visibility: never -component_root_path: "components/device/silabs/si91x/mcu/drivers/peripheral_drivers" -source: - - path: "src/rsi_wurx.c" -include: - - path: "inc" - file_list: - - path: "rsi_wurx.h" -provides: - - name: rsilib_wurx \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_cci.h b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_cci.h deleted file mode 100644 index 04d9bd2d4..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_cci.h +++ /dev/null @@ -1,104 +0,0 @@ -/******************************************************************************* -* @file rsi_cci.h -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Includes Files - -#include "RS1xxxx.h" -#include "rsi_error.h" - -#ifndef RSI_CCI_H -#define RSI_CCI_H - -#ifdef __cplusplus -extern "C" { -#endif - -#define AMS_EN *(volatile uint32_t *)(0x46008000 + 0x14) - -#define CCI_AHB_SLAVE0_ADDRESS 0x80000000 -#define CCI_AHB_SLAVE1_ADDRESS 0x60000000 - -#define CCI_LSB_ADDRESS_S0 0x00000000 -#define CCI_MSB_ADDRESS_S0 0x0001FFFF - -#define CCI_LSB_ADDRESS_S1 0x00000000 -#define CCI_MSB_ADDRESS_S1 0x00000004 // 0x0001FFFF FIXME: Out of RANGE INDEX COMPARISION - -#define CCI_LSB_ADDRESS_S2 0x00000000 -#define CCI_MSB_ADDRESS_S2 0x00000004 // 0x0001FFFF FIXME: Out of RANGE INDEX COMPARISION - -#define CCI_LSB_ADDRESS_S3 0x00000000 -#define CCI_MSB_ADDRESS_S3 0x00000004 // 0x0001FFFF FIXME: Out of RANGE INDEX COMPARISION - -// CCI configuration structure -typedef struct RSI_CCI_Init_s { - - uint8_t slave_enable; // number of CCI Slaves to be supported 1,2,3 - uint8_t early_bus_termination; // Support early bus termination - // 0 - disable - // 1 - enable - uint8_t address_width_config; // Address width configuration - // b'11 -> 40 bit width (32 bit address and 8 bit command) - // b'10 -> 32 bit width (24 bit address and 8 bit command) - // b'01 -> 24 bit width (16 bit address and 8 bit command) - // b'00 -> 16 bit width (8 bit address and 8 bit command) - uint8_t translation_enable; // Enable/Disable translation - // 0 - Disable - // 1 - Enable - uint32_t translation_address; // load translation address - uint8_t mode; // Mode of the interface - // 0 - SDR mode - // 1 - DDR mode - uint8_t prog_calib; - uint8_t interface_width; // Width of the interface - // 0 - quad mode - // 1 - octa mode - // 2 - Word mode - uint8_t slave_priority; // This bits will represents priority of the slaves - // 1 : slave 0 has highest priority - // 4 : slave 1 has highest priority - // 8 : slave 2 has highest priority - uint16_t slave_timeout; // configurable time out value for response - uint32_t slave_lsb_address[3]; // Slave lower and higher address range for the each slave by programming - uint32_t slave_msb_address[3]; // Slave lower and higher address range for the each slave by programming - uint8_t cci_cntrl_en; -} RSI_CCI_Init_t; - -void RSI_CCI_AmsEnable(void); - -rsi_error_t RSI_CCI_AMS_Initialise(RSI_CCI_Init_t *p_cci_config); - -uint32_t RSI_CCI_SetFifoThreshlod(volatile CCI_Type *pstcCCI, uint8_t val); - -uint32_t RSI_CCI_PrefetchEnable(volatile CCI_Type *pstcCCI); - -uint32_t RSI_CCI_MessageInterruptEnable(volatile CCI_Type *pstcCCI); - -void RSI_CCI_CalibMode(volatile CCI_Type *pstcCCI); - -void RSI_CCI_LowPowerMode(volatile CCI_Type *pstcCCI); - -uint32_t RSI_CCI_IntStat(volatile CCI_Type *pstcCCI); - -uint32_t RSI_CCI_IntClear(volatile CCI_Type *pstcCCI, uint8_t interrupt); - -uint32_t RSI_CCI_SlaveResetMode(volatile CCI_Type *pstcCCI); -#ifdef __cplusplus -} -#endif - -#endif // RSI_CCI_H diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_fim.h b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_fim.h deleted file mode 100644 index ab47a2c01..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_fim.h +++ /dev/null @@ -1,725 +0,0 @@ -/******************************************************************************* -* @file rsi_fim.h -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Includes Files - -#include "base_types.h" -#include "rsi_error.h" -#include "rsi_ccp_common.h" - -#ifdef ARM_MATH_DEF -#include "arm_math.h" -#endif - -#ifndef RSI_FIM_H -#define RSI_FIM_H - -#ifdef __cplusplus -extern "C" { -#endif - -typedef float float32_t; - -// brief 8-bit fractional data type in 1.7 format. - -typedef int8_t q7_t; - -// brief 16-bit fractional data type in 1.15 format. - -typedef int16_t q15_t; - -// brief 32-bit fractional data type in 1.31 format. -typedef int32_t q31_t; - -typedef enum { - ULP_FIM_COP_DATA_REAL_REAL = 0, - ULP_FIM_COP_DATA_CPLX_REAL, - ULP_FIM_COP_DATA_REAL_CPLX, - ULP_FIM_COP_DATA_CPLX_CPLX -} typ_data_t; - -#define ULP_FIM_COP_START_TRIG 0x01 -#define XMAX(x, y) (((x) > (y)) ? (x) : (y)) -#define MEM_BANK 0x24060000 - -// For 9117 FIM -#define ENHANCED_FIM_BANK0 0x24060000 -#define ENHANCED_FIM_BANK1 0x24060800 -#define ENHANCED_FIM_BANK2 0x24061000 -#define ENHANCED_FIM_BANK3 0x24061800 - -#define ULPSS_RAM_ADDR_SRC ENHANCED_FIM_BANK0 -#define ULPSS_RAM_ADDR_DST ENHANCED_FIM_BANK2 - -#define ULPSS_RAM_ADDR_SRC1 ENHANCED_FIM_BANK0 -#define ULPSS_RAM_ADDR_SRC2 ENHANCED_FIM_BANK1 -#define ULP_MEMORY_ADDR 0x24060000 - -// For 9116 FIM -#define BANK0 0x00 -#define BANK1 (0x0800 >> 2) -#define BANK2 (0x1000 >> 2) -#define BANK3 (0x1800 >> 2) -#define BANK4 (0x2000 >> 2) -#define BANK5 (0x2800 >> 2) -#define BANK6 (0x3000 >> 2) -#define BANK7 (0x3800 >> 2) -#define STRS(sat, trunc, round, shift) ((round << 16) | (shift << 10) | (trunc << 5) | sat) - -typedef enum mode { - FIR = 0x01, - IIR = 0x02, - INTERPOLATE = 0x63, - ADD_SCALAR = 0x44, - SUB_SCALAR = 0x45, - MUL_SCALAR = 0x46, - ADD_VECTOR = 0x47, - SUB_VECTOR = 0x49, - MUL_VECTOR = 0x4A, - NORM_SQUARE = 0xAB, - MUL_MAT = 0x4C, -#ifdef ENHANCED_FIM - CORRELATION = 0x3, - DECIMATION = 0x4, - FFT = 0x8, - ADD_MAT = 0x4D, - SUB_MAT = 0x4E, - MAT_HADAMARD = 0x4F, - MAT_TRANSPOSE = 0x50, - COR_SINE = 0x51, - COR_COSINE = 0x52, - COR_INV_TAN = 0x54, - COR_SINH = 0x55, - COR_COSH = 0x56, - COR_INV_TANH = 0x57, - SQ_ROOT = 0x58, - NAT_LOG = 0x59, -#endif -} present_mode; - -#define FORMAT_Q7 2 -#define FORMAT_Q15 3 -#define FORMAT_Q31 1 -#define FORMAT_F32 0 - -#define NOT_MATRIX 0 -#define M4SS_ADDR_SHIFT_VAL 2 - -// list of variables for matrix multiplication -typedef struct { - int16_t nRows; - int16_t nColumns; - int32_t *pData; -} arm_matrix_instance_f32_opt; - -typedef struct { - uint16_t nRows; - uint16_t nColumns; - q31_t *pData; -} arm_matrix_instance_q31_opt; - -typedef struct { - int16_t nRows; - int16_t nColumns; - q15_t *pData; -} arm_matrix_instance_q15_opt; - -// list of variables for fir filter -typedef struct { - uint16_t numTaps; - int32_t *pState; - int32_t *pCoeffs; -} arm_fir_instance_f32_opt; - -typedef struct { - uint16_t numTaps; - q31_t *pState; - q31_t *pCoeffs; -} arm_fir_instance_q31_opt; - -typedef struct { - uint16_t numTaps; - q15_t *pState; - q15_t *pCoeffs; -} arm_fir_instance_q15_opt; - -typedef struct { - uint16_t numTaps; - q7_t *pState; - q7_t *pCoeffs; -} arm_fir_instance_q7_opt; - -// list of variables for Iir filter -typedef struct { - uint16_t numStages; - int32_t *pState; - int32_t *pkCoeffs; - int32_t *pvCoeffs; -} fim_iir_instance_f32; - -typedef struct { - uint16_t numStages; - q31_t *pState; - q31_t *pkCoeffs; - q31_t *pvCoeffs; -} fim_iir_instance_q31; - -typedef struct { - uint16_t numStages; - q15_t *pState; - q15_t *pkCoeffs; - q15_t *pvCoeffs; -} fim_iir_instance_q15; - -typedef struct { - uint8_t L; // upsample factor. - uint16_t phaseLength; // length of each polyphase filter component. - int32_t *pCoeffs; // points to the coefficient array. The array is of length L*phaseLength. - int32_t *pState; // points to the state variable array. The array is of length phaseLength+numTaps-1. -} arm_fir_interpolate_instance_f32_opt; - -#ifndef ARM_MATH_DEF -typedef enum { - ARM_MATH_SUCCESS = 0, // No error - ARM_MATH_ARGUMENT_ERROR = -1, // One or more arguments are incorrect - ARM_MATH_LENGTH_ERROR = -2, // Length of data buffer is incorrect - ARM_MATH_SIZE_MISMATCH = -3, // Size of matrices is not compatible with the operation. - ARM_MATH_NANINF = -4, // Not-a-number (NaN) or infinity is generated - ARM_MATH_SINGULAR = -5, // Generated by matrix inversion if the input matrix is singular and cannot be inverted. - ARM_MATH_TEST_FAILURE = -6 // Test Failed -} arm_status; -#endif - -// brief Instance structure for the Q15 FIR interpolator. -typedef struct { - uint8_t L; // upsample factor. - uint16_t phaseLength; // length of each polyphase filter component - q15_t *pCoeffs; // points to the coefficient array. The array is of length L*phaseLength. - q15_t *pState; // points to the state variable array. The array is of length blockSize+phaseLength-1. -} arm_fir_interpolate_instance_q15_opt; - -// brief Instance structure for the Q31 FIR interpolator. -typedef struct { - uint8_t L; // upsample factor. - uint16_t phaseLength; // length of each polyphase filter component. - q31_t *pCoeffs; // points to the coefficient array. The array is of length L*phaseLength. - q31_t *pState; // points to the state variable array. The array is of length blockSize+phaseLength-1. -} arm_fir_interpolate_instance_q31_opt; - -#ifdef ENHANCED_FIM - -// brief Instance structure for the Q15 FIR decimate. -typedef struct { - uint8_t M; // decimation factor.. - uint16_t numTaps; // number of coefficients in the filter. - const q15_t *pCoeffs; // points to the coefficient array. The array is of length numTaps. - q15_t *pState; // points to the state variable array. The array is of length numTaps+blockSize-1. -} arm_fir_decimate_instance_q15; - -typedef struct { - uint8_t M; // decimation factor. - uint16_t numTaps; // number of coefficients in the filter. - const q31_t *pCoeffs; // points to the coefficient array. The array is of length numTaps. - q31_t *pState; // points to the state variable array. The array is of length numTaps+blockSize-1. -} arm_fir_decimate_instance_q31; - -typedef struct { - uint16_t fftLen; // length of the FFT. - const q15_t *pTwiddle; // points to the Twiddle factor table. - const uint16_t *pBitRevTable; // points to the bit reversal table. - uint16_t bitRevLength; // bit reversal table length. -} arm_cfft_radix2_instance_q15; -#endif - -// FIM Function Prototypes -void rsi_arm_offset_f32_opt(int32_t *pSrc, - int32_t scale, - int32_t *pDst, - uint32_t length, - uint16_t inBank, - uint16_t outBank); - -void rsi_arm_offset_q7_opt(q7_t *pSrc, q7_t scale, q7_t *pDst, uint32_t length, uint16_t inBank, uint16_t outBank); - -void rsi_arm_offset_q15_opt(q15_t *pSrc, q15_t scale, q15_t *pDst, uint32_t length, uint16_t inBank, uint16_t outBank); - -void rsi_arm_offset_q31_opt(q31_t *pSrc, q31_t scale, q31_t *pDst, uint32_t length, uint16_t inBank, uint16_t outBank); - -void rsi_fim_scalar_add_q15(q15_t *pSrc, - q15_t *scale, - uint32_t blockSize, - typ_data_t typ_data, - uint16_t inBank, - uint16_t outBank); - -void rsi_fim_scalar_sub_q7(q7_t *pSrc, q7_t scale, q7_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank); - -void rsi_fim_scalar_sub_q15(q15_t *pSrc, - q15_t *scale, - q15_t *pDst, - uint32_t blockSize, - typ_data_t typ_data, - uint16_t inBank, - uint16_t outBank); - -void rsi_fim_scalar_sub_q31(q31_t *pSrc, - q31_t scale, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank); - -void rsi_fim_scalar_sub_f32(int32_t *pSrc, - int32_t scale, - int32_t *pDst, - uint32_t length, - uint16_t inBank, - uint16_t outBank); - -void rsi_arm_scale_f32_opt(int32_t *pSrc, - int32_t scale, - int32_t *pDst, - uint32_t length, - uint16_t inBank, - uint16_t outBank); - -void rsi_arm_scale_q7_opt(q7_t *pSrc, - q7_t scaleFract, - int8_t shift, - q7_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank); - -void rsi_arm_scale_q15_opt(q15_t *pSrc, - q15_t scaleFract, - int8_t shift, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank); - -void rsi_arm_scale_q31_opt(q31_t *pSrc, - q31_t scaleFract, - int8_t shift, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank); - -void rsi_fim_scalar_mul_q15(q15_t *pSrc, - q15_t *scale, - q15_t *pDst, - uint32_t blockSize, - typ_data_t typ_data, - uint16_t inBank, - uint16_t outBank); - -void rsi_fim_interrupt_handler(volatile FIM_Type *ptFim); - -void rsi_arm_add_f32_opt(int32_t *pSrcA, - int32_t *pSrcB, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_add_q7_opt(q7_t *pSrcA, - q7_t *pSrcB, - q7_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_add_q15_opt(q15_t *pSrcA, - q15_t *pSrcB, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_add_q31_opt(q31_t *pSrcA, - q31_t *pSrcB, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_fim_vector_add_q15(q15_t *pIn1, - q15_t *pIn2, - q15_t *pDst, - uint32_t blockSize, - typ_data_t typ_data, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_sub_f32_opt(int32_t *pSrcA, - int32_t *pSrcB, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_sub_q7_opt(q7_t *pSrcA, - q7_t *pSrcB, - q7_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_sub_q15_opt(q15_t *pSrcA, - q15_t *pSrcB, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_sub_q31_opt(q31_t *pSrcA, - q31_t *pSrcB, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_fim_read_data(uint32_t bank, uint32_t length, volatile void *pDst, uint8_t data_type, typ_data_t type_data); - -void rsi_fim_vector_sub_q15(q15_t *pIn1, - q15_t *pIn2, - q15_t *pDst, - uint32_t blockSize, - typ_data_t typ_data, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_mult_f32_opt(int32_t *pIn1, - int32_t *pIn2, - int32_t *pDst, - uint32_t SatTruncRound, - uint32_t length, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_mult_q7_opt(q7_t *pSrcA, - q7_t *pSrcB, - q7_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_mult_q15_opt(q15_t *pSrcA, - q15_t *pSrcB, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_mult_q31_opt(q31_t *pSrcA, - q31_t *pSrcB, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_fim_vector_mul_q15(q15_t *pIn1, - q15_t *pIn2, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_cmplx_mult_real_q15_opt(q15_t *pSrcCmplx, - q15_t *pSrcReal, - q15_t *pDst, - uint32_t numSamples, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_cmplx_mult_cmplx_q15_opt(q15_t *pSrcA, - q15_t *pSrcB, - q15_t *pDst, - uint32_t numSamples, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_cmplx_mag_squared_q15_opt(q15_t *pSrc, - q15_t *pDst, - uint32_t numSamples, - uint16_t inBank, - uint16_t outBank); - -void rsi_fim_absSqr_q7(q7_t *pSrc, q7_t *pDst1, uint32_t blockSize, uint16_t inBank, uint16_t outBank); -void rsi_fim_absSqr_q15(q15_t *pSrc, q15_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank); -void rsi_fim_absSqr_q31(q31_t *pSrc, q31_t *pDst, uint32_t length, uint16_t inBank, uint16_t outBank); -void rsi_fim_absSqr_f32(int32_t *pSrc, int32_t *pDst, uint32_t length, uint16_t inBank, uint16_t outBank); - -rsi_error_t rsi_arm_mat_mult_f32_opt(const arm_matrix_instance_f32_opt *pSrcA, - const arm_matrix_instance_f32_opt *pSrcB, - arm_matrix_instance_f32_opt *pDst, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -rsi_error_t rsi_arm_mat_mult_q31_opt(const arm_matrix_instance_q31_opt *pSrcA, - const arm_matrix_instance_q31_opt *pSrcB, - arm_matrix_instance_q31_opt *pDst, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -rsi_error_t rsi_arm_mat_mult_q15_opt(const arm_matrix_instance_q15_opt *pSrcA, - const arm_matrix_instance_q15_opt *pSrcB, - arm_matrix_instance_q15_opt *pDst, - q15_t *pState, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_fir_init_f32_opt(arm_fir_instance_f32_opt *S, - uint16_t numTaps, - int32_t *pCoeffs, - int32_t *pState, - uint32_t blockSize); - -void rsi_arm_fir_f32_opt(arm_fir_instance_f32_opt *S, - int32_t *pSrc, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_fir_init_q31_opt(arm_fir_instance_q31_opt *S, - uint16_t numTaps, - q31_t *pCoeffs, - q31_t *pState, - uint32_t blockSize); - -void rsi_arm_fir_q31_opt(arm_fir_instance_q31_opt *S, - q31_t *pSrc, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_fir_init_q15_opt(arm_fir_instance_q15_opt *S, - uint16_t numTaps, - q15_t *pCoeffs, - q15_t *pState, - uint32_t blockSize); - -void rsi_arm_fir_q15_opt(arm_fir_instance_q15_opt *S, - q15_t *pSrc, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_fim_fir_q15(arm_fir_instance_q15_opt *S, - q15_t *pSrc, - q15_t *pDst, - uint32_t blockSize, - typ_data_t typ_data, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_fir_init_q7_opt(arm_fir_instance_q7_opt *S, - uint16_t numTaps, - q7_t *pCoeffs, - q7_t *pState, - uint32_t blockSize); - -void rsi_arm_fir_q7_opt(arm_fir_instance_q7_opt *S, - q7_t *pSrc, - q7_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_fim_Iir_init_f32(fim_iir_instance_f32 *S, - uint16_t numStages, - int32_t *pCoeffs, - int32_t *pvCoeffs, - int32_t *pState); - -void rsi_fim_Iir_init_q31(fim_iir_instance_q31 *S, - uint16_t numStages, - q31_t *pCoeffs, - q31_t *pvCoeffs, - uint32_t *pState); - -void rsi_fim_Iir_q31(fim_iir_instance_q31 *S, - int32_t *pSrc, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_fim_Iir_init_q15(fim_iir_instance_q15 *S, uint16_t numStages, q15_t *pCoeffs, q15_t *pvCoeffs, q15_t *pState); - -void rsi_fim_Iir_q15(fim_iir_instance_q15 *S, - q15_t *pSrc, - q15_t *pDst, - uint32_t blockSize, - typ_data_t typ_data, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_fim_Iir_f32(fim_iir_instance_f32 *S, - int32_t *pSrc, - int32_t *pDst, - uint32_t length, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_fir_interpolate_f32_opt(const arm_fir_interpolate_instance_f32_opt *S, - int32_t *pSrc, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -arm_status rsi_arm_fir_interpolate_init_f32_opt(arm_fir_interpolate_instance_f32_opt *S, - uint8_t L, - uint16_t numTaps, - int32_t *pCoeffs, - int32_t *pState, - uint32_t blockSize); - -arm_status rsi_arm_fir_interpolate_init_q15_opt(arm_fir_interpolate_instance_q15_opt *S, - uint8_t L, - uint16_t numTaps, - q15_t *pCoeffs, - q15_t *pState, - uint32_t blockSize); - -arm_status rsi_arm_fir_interpolate_init_q31_opt(arm_fir_interpolate_instance_q31_opt *S, - uint8_t L, - uint16_t numTaps, - q31_t *pCoeffs, - q31_t *pState, - uint32_t blockSize); - -void rsi_arm_fir_interpolate_q15_opt(arm_fir_interpolate_instance_q15_opt *S, - q15_t *pSrc, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_fim_fir_interpolate_q15(arm_fir_interpolate_instance_q15_opt *S, - q15_t *pSrc, - q15_t *pDst, - uint32_t blockSize, - typ_data_t typ_data, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void rsi_arm_fir_interpolate_q31_opt(const arm_fir_interpolate_instance_q31_opt *S, - q31_t *pSrc, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank); - -void RSI_FIM_EnableSaturation(void); -void RSI_FIM_SetSatTruncRound(uint32_t SatTruncRoundShift); - -// New feature -#ifdef ENHANCED_FIM -void rsi_arm_correlate_q15(const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst); -void rsi_arm_correlate_q31(const q31_t *pSrcA, uint32_t srcALen, const q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst); -void rsi_arm_correlate_q7(const q7_t *pSrcA, uint32_t srcALen, const q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst); -arm_status arm_fir_decimate_init_q31(arm_fir_decimate_instance_q31 *S, - uint16_t numTaps, - uint8_t M, - q31_t *pCoeffs, - q31_t *pState, - uint32_t blockSize); -arm_status arm_fir_decimate_init_q15(arm_fir_decimate_instance_q15 *S, - uint16_t numTaps, - uint8_t M, - q15_t *pCoeffs, - q15_t *pState, - uint32_t blockSize); -void arm_fir_decimate_q15(const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize); -void arm_fir_decimate_q31(const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize); -void rsi_arm_cfft_radix2(q31_t *pSrc); -void rsi_arm_sin_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize); -void rsi_arm_cos_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize); -void rsi_arm_Inverse_Tan_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize); -void rsi_arm_Sinh_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize); -void rsi_arm_cosh_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize); -void rsi_arm_Inverse_Tanh_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize); -rsi_error_t rsi_arm_mat_add_q15(const arm_matrix_instance_q15_opt *pSrcA, - const arm_matrix_instance_q15_opt *pSrcB, - arm_matrix_instance_q15_opt *pDst); -rsi_error_t arm_mat_add_q31(const arm_matrix_instance_q31_opt *pSrcA, - const arm_matrix_instance_q31_opt *pSrcB, - arm_matrix_instance_q31_opt *pDst); -rsi_error_t arm_mat_sub_q15(const arm_matrix_instance_q15_opt *pSrcA, - const arm_matrix_instance_q15_opt *pSrcB, - arm_matrix_instance_q15_opt *pDst); -rsi_error_t arm_mat_sub_q31(const arm_matrix_instance_q31_opt *pSrcA, - const arm_matrix_instance_q31_opt *pSrcB, - arm_matrix_instance_q31_opt *pDst); -rsi_error_t arm_mat_trans_q15(const arm_matrix_instance_q15_opt *pSrc, arm_matrix_instance_q15_opt *pDst); -rsi_error_t rsi_arm_mat_trans_q31(const arm_matrix_instance_q31_opt *pSrc, arm_matrix_instance_q31_opt *pDst); -rsi_error_t rsi_arm_mat_Hadamard_prod_q15(const arm_matrix_instance_q15_opt *pSrcA, - const arm_matrix_instance_q15_opt *pSrcB, - arm_matrix_instance_q15_opt *pDst); -rsi_error_t arm_mat_Hadamard_prod_q31(const arm_matrix_instance_q31_opt *pSrcA, - const arm_matrix_instance_q31_opt *pSrcB, - arm_matrix_instance_q31_opt *pDst); -void rsi_arm_VSqrt_q15(q15_t *pSrc, q15_t *pDst, uint32_t blockSize); -void rsi_arm_log_q15(q15_t *pSrc, q15_t *pDst, uint16_t blockSize); -void rsi_enable_inst_buff(void); -void RSI_FIM_InputData(void *pSrcA, uint32_t bank, uint32_t blockSize, uint8_t data_type); -void rsi_fim_copy_fim_reg_to_ulp_memory(void); -#endif - -#ifdef __cplusplus -} -#endif -#endif // RSI_FIM_H diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_ir.h b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_ir.h deleted file mode 100644 index e43d27703..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_ir.h +++ /dev/null @@ -1,227 +0,0 @@ -/******************************************************************************* -* @file rsi_ir.h -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Includes Files - -#include "rsi_ccp_common.h" - -#ifndef RSI_IR_H -#define RSI_IR_H - -#ifdef __cplusplus -extern "C" { -#endif - -#define CONFIG_SREST_IR_CORE (1U << 16) // Soft reset IR core block -#define CONFIG_EN_CONT_IR_DET (1U << 8) // Continuous IR detection enable -#define CONFIG_EN_CLK_IR_CORE (1U << 2) // Enable 32KHz clock to IR Core -#define CONFIG_EN_IR_DET_RSTART (1U << 1) // Enable IR detection Re-start Logic -#define CONFIG_EN_IR_DET (1U << 0) // Enable IR detection Logic -#define MAX_MEMORY_ADDRESS 128 -#define MAX_OFF_DURATION 131072 -#define MAX_ON_DURATION 4096 -#define MAX_FRAMEDONE_THRESHOLD 32768 -#define MAX_DETECTION_THRESHOLD 128 -/** @addtogroup SOC23 -* @{ -*/ -/*===================================================*/ -/** - * @fn rsi_error_t RSI_IR_OffDuration(IR_Type* pIr , uint32_t off_duration) - * @brief This API is used to configure the off duration of IR decoder - * @param[in] pIr : IR type pointer - * @param[in] off_duration : IR Sleep duration timer value. Programmable value for OFF duration - for power cycling on External IR Sensor. - Count to be programmed write to clock ticks of 32KHz clock. - Programmed value is (1/32K)*off_duration - * @return return zero \ref RSI_OK on success and return error code on failure. - * - * @b Example - * - RSI_IR_OffDuration(IR , 20); \n - * - In the above parameter we get off time of (1/32K)*20 = 0.625ms - */ -STATIC INLINE rsi_error_t RSI_IR_OffDuration(IR_Type *pIr, uint32_t off_duration) -{ - if (off_duration > MAX_OFF_DURATION) { - return INVALID_PARAMETERS; - } - pIr->IR_OFF_TIME_DURATION_b.IR_OFF_TIME_DURATION = (unsigned int)(off_duration & 0x1FFFF); - return RSI_OK; -} - -/*===================================================*/ -/** - * @fn rsi_error_t RSI_IR_OnDuration(IR_Type* pIr , uint16_t on_duration) - * @brief This API is used to configure the off duration of IR decoder - * @param[in] pIr : IR type pointer - * @param[in] on_duration : IR Sleep duration timer value. Programmable value for ON duration - * for power cycling on External IR Sensor. - * Count to be programmed write to clock ticks of 32KHz clock. - * Programmed value is (1/32K)*on_duration - * @return return zero \ref RSI_OK on success and return error code on failure. - * - * @b Example - * - RSI_IR_OnDuration(IR , 20); \n - * - In the above parameter we get off time of (1/32K)*20 = 0.625ms - */ -STATIC INLINE rsi_error_t RSI_IR_OnDuration(IR_Type *pIr, uint16_t on_duration) -{ - if (on_duration > MAX_ON_DURATION) { - return INVALID_PARAMETERS; - } - pIr->IR_ON_TIME_DURATION_b.IR_ON_TIME_DURATION = (unsigned int)(on_duration & 0x0FFF); - return RSI_OK; -} - -/*===================================================*/ -/** - * @fn void RSI_IR_SetConfiguration(IR_Type* pIr , uint32_t flags) - * @brief This API is used set the configure the IR modes - * @param[in] pIr : IR type pointer - * @param[in] flags : Ored values of IR configuration flags - * - \ref CONFIG_SREST_IR_CORE - * - \ref CONFIG_EN_CONT_IR_DET - * - \ref CONFIG_EN_CONT_IR_DET - * - \ref CONFIG_EN_CONT_IR_DET - * - \ref CONFIG_EN_CONT_IR_DET - * @return none - * - * @b Example - * - RSI_IR_SetConfiguration(IR , (CONFIG_SREST_IR_CORE | CONFIG_EN_CONT_IR_DET)); - */ -STATIC INLINE void RSI_IR_SetConfiguration(IR_Type *pIr, uint32_t flags) -{ - pIr->IR_CONFIG |= flags; -} - -/*===================================================*/ -/** - * @fn void RSI_IR_ClrConfiguration(IR_Type* pIr , uint32_t flags) - * @brief This API is used clear configure the IR modes - * @param[in] pIr : IR type pointer - * @param[in] flags : Ored values of IR configuration flags - * - \ref CONFIG_SREST_IR_CORE - * - \ref CONFIG_EN_CONT_IR_DET - * - \ref CONFIG_EN_CONT_IR_DET - * - \ref CONFIG_EN_CONT_IR_DET - * - \ref CONFIG_EN_CONT_IR_DET - * @return none - * - * @b Example - * - RSI_IR_SetConfiguration(IR , (CONFIG_SREST_IR_CORE | CONFIG_EN_CONT_IR_DET)); - */ -STATIC INLINE void RSI_IR_ClrConfiguration(IR_Type *pIr, uint32_t flags) -{ - pIr->IR_CONFIG &= ~flags; -} - -/*===================================================*/ -/** - * @fn void RSI_IR_Restart(IR_Type* pIr) - * @brief This API is used clear configure the IR modes - * @param[in] pIr : IR type pointer - * @return none - * - * @b Example - * - RSI_IR_SetConfiguration(IR); - */ -STATIC INLINE void RSI_IR_Restart(IR_Type *pIr) -{ - pIr->IR_CONFIG_b.IR_DET_RSTART = 1U; -} - -/*===================================================*/ -/** - * @fn rsi_error_t RSI_IR_Framedonethreshold(IR_Type* pIr,uint16_t frame_threshold) - * @brief This API is used count with respect to 32KHz clock after not more toggle are expected to a - * given pattern. - * @param[in] pIr : IR type pointer - * @param[in] frame_threshold : frame done threshold value. - * @return return zero \ref RSI_OK on success and return error code on failure. - * - * @b Example - * - RSI_IR_Framedonethreshold(IR,20); - */ -STATIC INLINE rsi_error_t RSI_IR_Framedonethreshold(IR_Type *pIr, uint16_t frame_threshold) -{ - if (frame_threshold > MAX_FRAMEDONE_THRESHOLD) { - return INVALID_PARAMETERS; - } - pIr->IR_FRAME_DONE_THRESHOLD_b.IR_FRAME_DONE_THRESHOLD = (unsigned int)(frame_threshold & 0x7FFF); - return RSI_OK; -} - -/*===================================================*/ -/** - * @fn rsi_error_t RSI_IR_Detectionthreshold(IR_Type* pIr,uint16_t detection_threshold) - * @brief This API is used minimum number of edges to detected during on-time failing which - * IR detection is re-stated. - * @param[in] pIr : IR type pointer - * @param[in] detection_threshold : detection threshold value. - * @return return zero \ref RSI_OK on success and return error code on failure. - * - * @b Example - * - RSI_IR_Detectionthreshold(IR,20); - */ -STATIC INLINE rsi_error_t RSI_IR_Detectionthreshold(IR_Type *pIr, uint16_t detection_threshold) -{ - if (detection_threshold > MAX_DETECTION_THRESHOLD) { - return INVALID_PARAMETERS; - } - pIr->IR_DET_THRESHOLD_b.IR_DET_THRESHOLD = (unsigned int)(detection_threshold & 0x7F); - return RSI_OK; -} - -/*===================================================*/ -/** - * @fn void RSI_IR_MemoryReadEnable(IR_Type* pIr) - * @brief This API is used enable the memory read option. - * @param[in] pIr : IR type pointer - * @return return zero \ref RSI_OK on success and return error code on failure. - * - * @b Example - * - RSI_IR_MemoryReadEnable(IR); - */ -STATIC INLINE void RSI_IR_MemoryReadEnable(IR_Type *pIr) -{ - pIr->IR_MEM_ADDR_ACCESS_b.IR_MEM_RD_EN = 1U; -} - -/*===================================================*/ -/** - * @fn uint32_t RSI_IR_GetMemoryDepth(IR_Type* pIr) - * @brief This API returns the IR data samples depth - * @param[in] pIr : IR type pointer - * @return number samples received - * - * @b Example - * - memory_depth = RSI_IR_GetMemoryDepth(IR); - */ -STATIC INLINE uint32_t RSI_IR_GetMemoryDepth(IR_Type *pIr) -{ - return pIr->IR_MEM_READ_b.IR_DATA_MEM_DEPTH; -} - -uint16_t RSI_IR_ReadData(IR_Type *pIr, uint16_t memory_address); -void RSI_IR_SoftwareRestart(IR_Type *pIr); -void IRQ015_Handler(void); -#ifdef __cplusplus -} -#endif - -#endif //RSI_IR_H -/** @} */ diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_sdioh.h b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_sdioh.h deleted file mode 100644 index ed810fbfb..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_sdioh.h +++ /dev/null @@ -1,205 +0,0 @@ -/******************************************************************************* -* @file rsi_sdioh.h -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Include Files - -#include "RS1xxxx.h" -#include "base_types.h" -#include "rsi_smih.h" - -#ifndef RSI_SDIOH_H -#define RSI_SDIOH_H - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(__CC_ARM) -#pragma push -#pragma anon_unions -#elif defined(__ICCARM__) -#pragma language = extended -#elif defined(__GNUC__) -// anonymous unions are enabled by default -#elif defined(__TMS470__) -// anonymous unions are enabled by default -#elif defined(__TASKING__) -#pragma warning 586 -#else -#warning Not supported compiler type -#endif - -#define MAX_SD_RETRY_TIME (500) -#define BIT4_BUS_WIDTH_ARG (0x80000E82) -#define BIT4_BUS_WIDTH_SET_ARG (0x00000E00) -#define LOW_SPEED_CHECK_ARG (0x00001000) -#define IO_BLOCKSIZE_ARG (0x80022000) -#define IO_BLOCKSIZE_ARG_1 (0x80022201) -#define HIGH_SPEED_SPRT_ARG (0x00002600) -#define SELECT_FUNC_ARG (0x00001A00) -#define RESET_ARG (0x80000C08) -#define CCCR_BYTE_READ (0x04000016) -#define CD_DISABLE_ARG (0x80000E80) -// Function1 argument -#define FUCNTION1_CHECK_ARG (0x00000400) -#define FUCNTION1_ENB_ARG (0x80000402) -#define FUCNTION1_READY_ARG (0x00000600) -#define FUNCTION1_INTR_ENB_ARG (0x80000803) -#define FUNCTION1_INTR_CHECK_ARG (0x00000800) -#define FUNCTION1_READY (1 << 1) -#define FUNCTION1_ENABLE (1 << 1) -#define CSA_SUPPORT_ARG (0x00020000) -#define CSA_ENABLE_ARG (0x80020080) - -// Function2 argument -#define FUCNTION2_CHECK_ARG (0x00000400) -#define FUCNTION2_ENB_ARG (0x80000404) -#define FUCNTION2_READY_ARG (0x00000600) -#define FUNCTION2_INTR_ENB_ARG (0x80000805) -#define FUNCTION2_READY (1 << 2) -#define FUNCTION2_ENABLE (1 << 2) -#define LOW_SPEED_CHECK (1 << 6) -#define BIT4_MODE_CHECK (1 << 7) -#define BUS_BIT (1 << 1) - -#define SD_ACMD_OFFSET (0x40) -#define MMC_CMD_TAG (0x80) -#define ARG_ACMD41_BUSY (0x80000000) -#define OCR_CAPACITY_MASK (0x40000000) - -#define CHECK_HIGH_SPEED_SUPPORT (0x00002600) -#define ENABLE_HIGH_SPEED_MODE_ARG \ - (0x80002602) // SDIO_CMD52 ARG(CCR REG OFFSET IS 0X13 IE:13 LEFT SHIF BY 9,HERE 9 MEANS 8 BITS DATA AND 1 BIT STUFF IN CMD 52(SETTING BIT 1 IN 13TH PFFSET)) - -#define CHECK_UHS_SUPPORT_MODES \ - (0x00002800) // SDIO_CMD52 ARG(CCR REG OFFSET IS 0X14 IE:14 LEFT SHIF BY 9,HERE 9 MEANS 8 BITS DATA AND 1 BIT STUFF IN CMD 52) (CHECK ARGMENT) -#define UHS_1_SDR25_MODE_ARG \ - (0x80002602) // SDIO_CMD52 ARG(CCR REG OFFSET IS 0X13 IE:13 LEFT SHIF BY 9,HERE 9 MEANS 8 BITS DATA AND 1 BIT STUFF IN CMD 52(SETTING BIT 1 IN 13TH PFFSET)) -#define UHS_1_SDR50_MODE_ARG (0x80002604) // BIT 2 SETTING IN 13TH OFFSET -#define UHS_1_SDR104_MODE_ARG (0x80002606) // SETTING BIT 1 AND 2 IN 13TH OFFSET (CCCR REG) -#define UHS_1_DDR50_MODE_ARG (0x80002608) // SETTING BIT 3 IN 13TH OFFSET - -#define HIGH_SPEED_BIT BIT(0) -#define UHS_SUPPORT_BITS 0x7 // bit 0,1,2 - -#define SDIO_SET1 1 - -#if SDIO_SET1 -#define SDIO_CLK_PIN 46 -#define SDIO_CLK_PAD 11 -#define SDIO_CLK_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_CMD_PIN 47 -#define SDIO_CMD_PAD 11 -#define SDIO_CMD_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_D0_PIN 48 -#define SDIO_D0_PAD 11 -#define SDIO_D0_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_D1_PIN 49 -#define SDIO_D1_PAD 12 -#define SDIO_D1_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_D2_PIN 50 -#define SDIO_D2_PAD 12 -#define SDIO_D2_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_D3_PIN 51 -#define SDIO_D3_PAD 12 -#define SDIO_D3_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_CD_PIN 53 -#define SDIO_CD_PAD 13 -#define SDIO_CD_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_WP_PIN 52 -#define SDIO_WP_PAD 13 -#define SDIO_WP_MUX EGPIO_PIN_MUX_MODE8 -#else -#define SDIO_CLK_PIN 25 -#define SDIO_CLK_PAD 0 // no pad -#define SDIO_CLK_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_CMD_PIN 26 -#define SDIO_CMD_PAD 0 // no pad -#define SDIO_CMD_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_D0_PIN 27 -#define SDIO_D0_PAD 0 // no pad -#define SDIO_D0_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_D1_PIN 28 -#define SDIO_D1_PAD 0 // no pad -#define SDIO_D1_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_D2_PIN 29 -#define SDIO_D2_PAD 0 // no pad -#define SDIO_D2_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_D3_PIN 30 -#define SDIO_D3_PAD 0 // no pad -#define SDIO_D3_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_CD_PIN 53 -#define SDIO_CD_PAD 13 -#define SDIO_CD_MUX EGPIO_PIN_MUX_MODE8 - -#define SDIO_WP_PIN 52 -#define SDIO_WP_PAD 13 -#define SDIO_WP_MUX EGPIO_PIN_MUX_MODE8 -#endif - -// COMMMANDS VALUE -#define CMD_53 53 -#define CMD_52 52 -#define CMD_5 5 - -#if defined(__CC_ARM) -#pragma pop -#elif defined(__ICCARM__) -// leave anonymous unions enabled -#elif defined(__GNUC__) -// anonymous unions are enabled by default -#elif defined(__TMS470__) -// anonymous unions are enabled by default -#elif defined(__TASKING__) -#pragma warning restore -#else -#warning Not supported compiler type -#endif -void RSI_SDIOH_PinMux(void); -rsi_error_t RSI_SDIOH_Enumeration(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event); -rsi_error_t RSI_SDIOH_RegisterInfo(SMIH_CARD_CONFIG_T *pSmihConfig, SMIH_CCCR_REG_INFO_T *pRegInfo); -rsi_error_t RSI_SDIOH_WriteCommandCmd52(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument); -rsi_error_t RSI_SDIOH_ReadCommandCmd52(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument); -rsi_error_t RSI_SDIOH_SetBusWidthCmd52(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg); -rsi_error_t RSI_SDIOH_BusWidthConfig(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t BusWidth); -rsi_error_t RSI_SDIOH_GoIdleStateCmd0(SMIH_CARD_CONFIG_T *pSmihConfig); -rsi_error_t RSI_SDIOH_SendRelativeCardAddressCmd3(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg); -rsi_error_t RSI_SDIOH_SwitchVoltageCmd11(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg); -rsi_error_t RSI_SDIOH_SelectCardCmd7(SMIH_CARD_CONFIG_T *pSmihConfig); -rsi_error_t RSI_SDIOH_ByteBlockWriteCmd53(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t *pData, uint32_t Addr); -rsi_error_t RSI_SDIOH_ByteBlockReadCmd53(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t *pData, uint32_t Addr); -rsi_error_t RSI_SDIOH_ReInitializationCmd5(SMIH_CARD_CONFIG_T *pSmihConfig); -rsi_error_t RSI_SDIOH_InitializationCmd5(SMIH_CARD_CONFIG_T *pSmihConfig); - -#ifdef __cplusplus -} -#endif - -#endif // RSI_SDIOH_H diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_sdmem.h b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_sdmem.h deleted file mode 100644 index 985705257..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_sdmem.h +++ /dev/null @@ -1,219 +0,0 @@ -/******************************************************************************* -* @file rsi_sdmem.h -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Include Files - -#include "RS1xxxx.h" -#include "base_types.h" -#include "rsi_smih.h" - -#ifndef RSI_SDMEM_H -#define RSI_SDMEM_H - -#ifdef __cplusplus -extern "C" { -#endif - -#define MMC_CARDS 0 // Enable this if MMC card is using -#define _8BIT_MODE 0 -#define _1BIT_MODE 0 -#define GPIO_SET1 1 -#define CD_WPP_SET1 0 - -#define HIGH_SPEED_EN 0 -#define ADMA_ENABLE 0 -#define SD_CLOCK 25000000 -#define __1P8_VOLTAGE_EN 0 - -#if GPIO_SET1 -#define SD_CLK_PIN 46 -#define SD_CLK_PAD 11 -#define SD_CLK_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_CMD_PIN 47 -#define SD_CMD_PAD 11 -#define SD_CMD_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_D0_PIN 48 -#define SD_D0_PAD 11 -#define SD_D0_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_D1_PIN 49 -#define SD_D1_PAD 12 -#define SD_D1_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_D2_PIN 50 -#define SD_D2_PAD 12 -#define SD_D2_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_D3_PIN 51 -#define SD_D3_PAD 12 -#define SD_D3_MUX EGPIO_PIN_MUX_MODE8 - -#if CD_WPP_SET1 -#define SD_CD_PIN 6 -#define SD_CD_PAD 1 -#define SD_CD_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_WP_PIN 7 -#define SD_WP_PAD 1 -#define SD_WP_MUX EGPIO_PIN_MUX_MODE8 -#else -#define SD_CD_PIN 53 -#define SD_CD_PAD 13 -#define SD_CD_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_WP_PIN 52 -#define SD_WP_PAD 13 -#define SD_WP_MUX EGPIO_PIN_MUX_MODE8 -#endif - -#else -#define SD_CLK_PIN 25 -#define SD_CLK_PAD 0 // no pad -#define SD_CLK_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_CMD_PIN 26 -#define SD_CMD_PAD 0 // no pad -#define SD_CMD_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_D0_PIN 27 -#define SD_D0_PAD 0 // no pad -#define SD_D0_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_D1_PIN 28 -#define SD_D1_PAD 0 // no pad -#define SD_D1_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_D2_PIN 29 -#define SD_D2_PAD 0 // no pad -#define SD_D2_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_D3_PIN 30 -#define SD_D3_PAD 0 // no pad -#define SD_D3_MUX EGPIO_PIN_MUX_MODE8 -#if CD_WPP_SET1 -#define SD_CD_PIN 6 -#define SD_CD_PAD 1 -#define SD_CD_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_WP_PIN 7 -#define SD_WP_PAD 1 -#define SD_WP_MUX EGPIO_PIN_MUX_MODE8 -#else -#define SD_CD_PIN 53 -#define SD_CD_PAD 13 -#define SD_CD_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_WP_PIN 52 -#define SD_WP_PAD 13 -#define SD_WP_MUX EGPIO_PIN_MUX_MODE8 -#endif - -#endif - -#if _8BIT_MODE -#if (PACKAGE_TYPE == CC0) || (PACKAGE_TYPE == SB0N_B00) || (PACKAGE_TYPE == SB00_B00) -#define SD_D4_PIN 54 -#define SD_D4_PAD 13 -#define SD_D4_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_D5_PIN 55 -#define SD_D5_PAD 13 -#define SD_D5_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_D6_PIN 56 -#define SD_D6_PAD 14 -#define SD_D6_MUX EGPIO_PIN_MUX_MODE8 - -#define SD_D7_PIN 57 -#define SD_D7_PAD 14 -#define SD_D7_MUX EGPIO_PIN_MUX_MODE8 -#else -#error "8BIT mode not supported in this package" -#endif -#endif - -#define ACMD41_VOLTAGE (0x00FF8000) -#define ACMD41_UHS_REQ (0x41FF8000) -#define ACMD41_HCS (1 << 30) - -#define SD_ACMD_OFFSET (0x40) -#define MMC_CMD_TAG (0x80) -#define ACMD41_BUSY_BIT BIT(31) -#define ACMD41_OCR_BIT BIT(30) - -// COMMMANDS VALUE -#define CMD_8 8 -#define CMD_55 55 -#define CMD_11 11 -#define CMD_1 1 -#define CMD_2 2 -#define CMD_3 3 -#define CMD_9 9 -#define CMD_7 7 -#define CMD_6 6 -#define CMD_24 24 -#define CMD_25 25 -#define CMD_18 18 -#define CMD_17 17 -#define CMD_80_hex 0x80 -#define CMD_40_hex 0x40 -#define CMD_8 8 -#define CMD_41 41 - -// POSITION VALUE -#define BLOCK_SIZE_512 512 - -// SDMEM related function prototypes -void RSI_SDMEM_PinMux(void); -rsi_error_t RSI_SDMEM_GoIdleStateCmd0(SMIH_CARD_CONFIG_T *pSmihConfig); -rsi_error_t RSI_SDMEM_SendCardInterfaceConditionCmd8(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg); -rsi_error_t RSI_SDMEM_SendApplicationCommandCmd55(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg); -rsi_error_t RSI_SDMEM_SetCardOperationConditionAcmd41(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg); -rsi_error_t RSI_SDMEM_SwitchVoltageCmd11(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg); -rsi_error_t RSI_SDMEM_SendCidCmd2(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg); -rsi_error_t RSI_SDIOH_SendRelativeAddressCmd3(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg); -rsi_error_t RSI_SDMEM_SendCsdCmd9(SMIH_CARD_CONFIG_T *pSmihConfig); -rsi_error_t RSI_SDMEM_SelectCardCmd7(SMIH_CARD_CONFIG_T *pSmihConfig); -rsi_error_t RSI_SDMEM_SetBusWidthAcmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg); -rsi_error_t RSI_SDMEM_OperationSwitchFunctionReadCmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument); -rsi_error_t RSI_SDMEM_GetCardOperationConditionAcmd41(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg); -rsi_error_t RSI_SDMEM_CardBusWidthConfig(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t BusWidth); -rsi_error_t RSI_SDMEM_OperationSwitchFunctionWriteCmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument); -rsi_error_t RSI_SDMEM_BlocksWrite(SMIH_CARD_CONFIG_T *pSmihConfig, - const uint8_t *DataIn, - uint32_t BlockIndex, - uint32_t BlockCount); -rsi_error_t RSI_SDMEM_BlocksRead(SMIH_CARD_CONFIG_T *pSmihConfig, - uint8_t *DataOut, - uint32_t BlockIndex, - uint32_t BlockCount); -rsi_error_t RSI_SDMEM_EnableHighSpeed(SMIH_CARD_CONFIG_T *pSmihConfig, boolean_t HighSpeed, uint32_t Clock); -rsi_error_t RSI_SDMEM_Enumeration(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event); -rsi_error_t RSI_SDMMC_Enumeration(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event); -rsi_error_t RSI_SDMMC_SendOperationConditionCmd1(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg); -rsi_error_t RSI_SDMMC_SendExtentCsdCmd(SMIH_CARD_CONFIG_T *pSmihConfig); -rsi_error_t RSI_SDMMC_ChangeBusWidthMode(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t bus_wdith); -rsi_error_t RSI_SDMMC_SwitchFunctionCmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg); -rsi_error_t RSI_SDMMC_HighSpeedMode(SMIH_CARD_CONFIG_T *pSmihConfig, boolean_t HighSpeed, uint32_t Clock); - -#ifdef __cplusplus -} -#endif - -#endif // RSI_SDMEM_H diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_smih.h b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_smih.h deleted file mode 100644 index 6309cf662..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_smih.h +++ /dev/null @@ -1,486 +0,0 @@ -/******************************************************************************* -* @file rsi_smih.h -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Include Files - -#include "RS1xxxx.h" -#include "base_types.h" - -#ifndef RSI_SMIH_H -#define RSI_SMIH_H - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(__CC_ARM) -#pragma push -#pragma anon_unions -#elif defined(__ICCARM__) -#pragma language = extended -#elif defined(__GNUC__) -// anonymous unions are enabled by default -#elif defined(__TMS470__) -// anonymous unions are enabled by default -#elif defined(__TASKING__) -#pragma warning 586 -#else -#warning Not supported compiler type -#endif - -#define ACMD41_VOLTAGE (0x00FF8000) -#define ACMD41_UHS_REQ (0x41FF8000) -#define ACMD41_HCS (1 << 30) - -// SMIH Controller related defines and structures -typedef void (*ARM_SMIH_SignalEvent_t)(uint32_t event); // Pointer to \ref ARM_USART_SignalEvent : Signal USART Event. - -#define LOOP_COUNT_TIME (500) - -// Normal interrupt status enable reg -#define COMMAND_COMPLETE_STATUS_ENABLE BIT(0) -#define TRANSFER_COMPLETE_STATUS_ENABLE BIT(1) -#define BLOCK_GAP_EVENT_STATUS_ENABLE BIT(2) -#define DMA_INTERRUPT_STATUS_ENABLE BIT(3) -#define BUFFER_WRITE_READY_STATUS_ENABLE BIT(4) -#define BUFFER_READ_READY_STATUS_ENABLE BIT(5) -#define CARD_INSERTION_STATUS_ENABLE BIT(6) -#define CARD_REMOVAL_STATUS_ENABLE BIT(7) -#define CARD_INTERRUPT_STATUS_ENABLE BIT(8) -#define INT_A_STATUS_ENABLE BIT(9) -#define INT_B_STATUS_ENABLE BIT(10) -#define INT_C_STATUS_ENABLE BIT(11) -#define RE_TUNING_EVENT_STATUS_ENABLE BIT(12) - -// Error interrupt status enables -#define COMMAND_TIMEOUT_ERROR_STATUS_ENABLE BIT(0) -#define COMMAND_CRC_ERROR_STATUS_ENABLE BIT(1) -#define COMMAND_END_BIT_ERROR_STATUS_ENABLE BIT(2) -#define COMMAND_INDEX_ERROR_STATUS_ENABLE BIT(3) -#define DATA_TIMEOUT_ERROR_STATUS_ENABLE BIT(4) -#define DATA_CRC_ERROR_STATUS_ENABLE BIT(5) -#define DATA_END_BIT_ERROR_STATUS_ENABLE BIT(6) -#define CURRENT_LIMIT_ERROR_STATUS_ENABLE BIT(7) -#define AUTO_CMD_ERROR_STATUS_ENABLE BIT(8) -#define ADMA_ERROR_STATUS_ENABLE BIT(9) -#define TUNING_ERROR_STATUS_ENABLE BIT(10) - -// Normal interrupt status enable reg -#define COMMAND_COMPLETE_SIGNAL_ENABLE BIT(0) -#define TRANSFER_COMPLETE_SIGNAL_ENABLE BIT(1) -#define BLOCK_GAP_EVENT_SIGNAL_ENABLE BIT(2) -#define DMA_INTERRUPT_SIGNAL_ENABLE BIT(3) -#define BUFFER_WRITE_READY_SIGNAL_ENABLE BIT(4) -#define BUFFER_READ_READY_SIGNAL_ENABLE BIT(5) -#define CARD_INSERTION_SIGNAL_ENABLE BIT(6) -#define CARD_REMOVAL_SIGNAL_ENABLE BIT(7) -#define CARD_INTERRUPT_SIGNAL_ENABLE BIT(8) -#define INT_A_SIGNAL_ENABLE BIT(9) -#define INT_B_SIGNAL_ENABLE BIT(10) -#define INT_C_SIGNALS_ENABLE BIT(11) -#define RE_TUNING_EVENT_SIGNAL_ENABLE BIT(12) - -#define DISABLE_AUTO_CMD 0 -#define ENABLE_AUTO_CMD12 1 -#define ENABLE_AUTO_CMD23 2 - -// Command type defines -#define ABORT_CMD 0 -#define RESUME_CMD 1 -#define SUSPEND_CMD 2 -#define NORMAL_CMD 3 - -// response type defines -#define SMIH_NO_RESPONSE 0 -#define SMIH_RESPONSE_LENGTH_136 1 -#define SMIH_RESPONSE_LENGTH_48 2 -#define SMIH_RESPONSE_LENGTH_48BIT_BUSY_CHECK 3 - -// ultra high speed mode defines -#define UHS_NONE 0x0 -#define UHS_SDR12 0x1 -#define UHS_SDR25 0x2 -#define UHS_SDR50 0x3 -#define UHS_SDR104 0x4 -#define UHS_DDR50 0x5 - -// response types to the commands -#define SMIH_RESPONSE_NONE 0x0 -#define SMIH_RESPONSE_R2 0x1 -#define SMIH_RESPONSE_R3R4 0x2 -#define SMIH_RESPONSE_R1R5R6R7 0x3 -#define SMIH_RESPONSE_R1BR5B 0x5 - -// smih volatge level defines -#define VOLTAGE_18V 0x0 -#define VOLTAGE_30V 0x1 -#define VOLTAGE_33V 0x2 - -// reset defines -#define SMIH_DATA_LINE_RESET 0x0 -#define SMIH_COMMAND_LINE_RESET 0x1 -#define SMIH_ALL_RESET 0x2 - -#define SMIH_CARD_STANDARD 0x0 -#define SMIH_CARD_HIGH_CAPACITY 0x1 - -// data direction defines -#define SMIH_WRITE_DIRECTION 0x0 -#define SMIH_READ_DIRECTION 0x1 - -// command events defines -#define SMIH_CMD_COMPLETE_EVENT 0x1 -#define SMIH_TRANSFER_COMPLETE_EVENT 0x2 -#define SMIH_BUFFER_READ_READY_EVENT 0x3 -#define SMIH_BUFFER_WRITE_READY_EVENT 0x4 - -// bus width mode defines -#define SMIH_BUS_WIDTH1 0x0 -#define SMIH_BUS_WIDTH4 0x1 -#define SMIH_BUS_WIDTH8 0x2 -typedef struct SMIH_COMMAND_REG { - uint16_t respType : 2; - uint16_t resrvd : 1; - uint16_t cmdCrcCheckEnable : 1; - uint16_t cmdIndexCheckEnable : 1; - uint16_t dataPresentSelect : 1; - uint16_t cmdType : 2; - uint16_t cmdIndex : 6; -} SMIH_COMMAND_REG_T; - -typedef struct SMIH_COMMAND_FRAME_CONFIG { - uint8_t cmdIndex; - uint32_t cmdArgument; - uint8_t cmdType; - boolean_t dataPresentSelect; - boolean_t cmdIndexCheckEn; - boolean_t cmdCrcCheckEn; - uint8_t responseTypeSelect; - uint8_t autoCmdType; -} SMIH_COMMAND_FRAME_CONFIG_T; - -typedef struct SMIH_EVENT { - uint8_t commandComplete; - uint8_t transferComplete; - uint8_t dmaInterrupt; - uint8_t bufferWriteReady; - uint8_t bufferReadReady; - uint8_t cardInsertion; - uint8_t cardRemoval; - uint8_t cardInterrupt; - uint8_t commandTimeoutError; - uint8_t commandCrcError; - uint8_t commandEndBitError; - uint8_t commandIndexError; - uint8_t dataTimeoutError; - uint8_t dataEndbitError; - uint8_t dataCrcError; - uint8_t currentLimitError; - uint8_t autoCommandError; - uint8_t admaError; - uint8_t tuningError; - ARM_SMIH_SignalEvent_t callb_event; -} SMIH_EVENT_T; - -#define COMMAND_COMPLETE 0 -#define TRANSFER_COMPLETE 1 -#define DMA_INTR 2 -#define BUFFER_WRITE_READY 3 -#define BUFFER_READ_READY 4 -#define CARD_INSERTION 5 -#define CARD_REMOVAL 6 -#define CARD_INTERRUPT 7 -#define CMD_TIMEOUT_ERROR 8 -#define CMD_CRC_ERROR 9 -#define CMD_END_BIT_ERROR 10 -#define CMD_INDEX_ERROR 11 -#define DATA_TIMEOUT_ERROR 12 -#define DATA_END_BIT_ERROR 13 -#define DATA_CRC_ERROR 14 -#define CURRENT_LIMIT_ERROR 15 -#define AUTO_CMD_ERROR 16 -#define ADMA_ERROR 17 -#define TUNING_ERROR 18 - -typedef struct SMIH_CMD_FEILD { - uint32_t cmdIdx; - uint32_t cmdArg; - uint8_t responseTypeSelect; - uint32_t response[4]; - SMIH_EVENT_T event; -} SMIH_CMD_FEILD_T; - -typedef struct SMIH_DATA_FEILD { - const uint8_t *data; - uint32_t blockSize; - uint32_t blockCount; - uint8_t direction; -} SMIH_DATA_FEILD_T; - -typedef struct SMIH_TRANSFER { - SMIH_CMD_FEILD_T *command; - SMIH_DATA_FEILD_T *data; - -} SMIH_TRANSFER_T; - -typedef struct SMIH_DATA_CONFIG { - boolean_t multiBlock; - boolean_t dataTransferDirection; - uint16_t blockSize; - uint16_t blockCount; - boolean_t blockCountEnable; - boolean_t dmaEnable; - uint32_t admaDespTableAddress; - uint8_t dataTimeout; -} SMIH_DATA_CONFIG_T; - -typedef struct SMIH_CONFIG_MODES { - uint8_t busWidthMode; - uint32_t clock; - boolean_t highSpeedEnable; - boolean_t admaMode; -} SMIH_CONFIG_MODES_T; - -typedef struct SMIH_ADMA_DESC_TABLE { - uint16_t attributeValid : 1; - uint16_t attributeEnd : 1; - uint16_t attributeInt : 1; - uint16_t reserved1 : 1; - uint16_t attributeAct : 2; - uint16_t reserved2 : 10; - uint16_t length; - uint32_t _32BIT_Adress; -} SMIH_ADMA_DESC_TABLE_T; - -typedef struct SMIH_CMD_OCR { - uint32_t reserved1 : 8; - uint32_t v20_21 : 1; - uint32_t v21_22 : 1; - uint32_t v22_23 : 1; - uint32_t v23_24 : 1; - uint32_t v24_25 : 1; - uint32_t v25_26 : 1; - uint32_t v26_27 : 1; - uint32_t v27_28 : 1; - uint32_t v28_29 : 1; - uint32_t v29_30 : 1; - uint32_t v30_31 : 1; - uint32_t v31_32 : 1; - uint32_t v32_33 : 1; - uint32_t v33_34 : 1; - uint32_t v34_35 : 1; - uint32_t v35_36 : 1; - uint32_t s18A : 1; - uint32_t reserved2 : 2; - uint32_t memPresent : 1; - uint32_t ioNum : 3; - uint32_t cardReady : 1; -} SMIH_CMD_OCR_T; -// command transfer function. -typedef rsi_error_t (*cmd_transfer_function_t)(SMIH_TRANSFER_T *Transfer); - -typedef struct SMIH_CARD_CONFIG { - uint8_t busWidthMode; - uint32_t clock; - boolean_t highSpeedEnable; - uint8_t uhsModeSelect; - uint32_t voltage; - boolean_t admaMode; - uint16_t byteBlockSize; - uint16_t numberOfBlocks; - uint8_t funcNum : 3; - uint8_t blockModeEnable : 1; - uint8_t opCode : 1; - SMIH_CMD_OCR_T ocr; - uint8_t cardType; - uint32_t maxSectorNum; - uint8_t cid[16]; - uint8_t csd[16]; - uint16_t rca; - uint8_t response[4]; - cmd_transfer_function_t cmd_transfer; - -} SMIH_CARD_CONFIG_T; - -typedef struct SMIH_CCCR_REG_INFO { - __IO uint8_t ccidSdioRevReg; - __IO uint8_t sdSpecRevReg; - __IO uint8_t ioEnableReg; - __IO uint8_t ioReady; - __IO uint8_t intEnable; - __IO uint8_t intrPending; - __IO uint8_t ioAbort; - __IO uint8_t busControl; - __IO uint8_t cardCapacity; - __IO uint8_t commonCisPointer; - __IO uint8_t commonCisPointer1; - __IO uint8_t commonCisPointer2; - __IO uint8_t busSped; - __IO uint8_t funcSelect; - __IO uint8_t execFlags; - __IO uint8_t redayFlags; - __IO uint16_t funcoBlockSize; - __IO uint8_t powerControl; - __IO uint8_t busSpeddSelect; - __IO uint8_t uhs1Support; - __IO uint8_t driverStrength; - __IO uint8_t intrExtension; -} SMIH_CCCR_REG_INFO_T; - -typedef struct SD_CARD_STATUS_REG { - uint32_t reserved1 : 3; - uint32_t sequenceEerror : 1; - uint32_t reserved2 : 1; - uint32_t applicationCmd : 1; - uint32_t reserved3 : 2; - uint32_t readyForData : 1; - uint32_t currentStatus : 4; - uint32_t eraseReset : 1; - uint32_t cardEccDisable : 1; - uint32_t wpEraseSkip : 1; - uint32_t csdOverwrite : 1; - uint32_t reserved4 : 2; - uint32_t error : 1; - uint32_t ccError : 1; - uint32_t cardEccFail : 1; - uint32_t illegalCmd : 1; - uint32_t commandCrcError : 1; - uint32_t lockUnlockFail : 1; - uint32_t cradIsLOcked : 1; - uint32_t wpViolation : 1; - uint32_t erasePram : 1; - uint32_t eraseSeqError : 1; - uint32_t blockLenghtError : 1; - uint32_t addressError : 1; - uint32_t outOfRange : 1; -} SD_CARD_STATUS_REG_T; - -typedef struct CSD_REG_VERSION1 { - uint8_t reserved1 : 2; - uint8_t fileFormat : 2; - uint8_t temporaryWriteProtect : 1; - uint8_t permanantWriteProtect : 1; - uint8_t copy : 1; - uint8_t fileFormatGroup : 1; - uint8_t reserved2 : 5; - uint8_t writeBlockLengthPartial : 1; - uint8_t writeBlockLength : 4; - uint8_t R2WFactor : 3; - uint8_t reserved3 : 2; - uint8_t wpGrpEnable : 1; - uint8_t wpGrpSize : 7; - uint8_t sectorSize : 7; - uint8_t eraseBlockEn : 1; - uint8_t deviceSizeMultiplier1 : 1; - uint8_t deviceSizeMultiplier2 : 2; - uint8_t vddWCrrMax : 3; - uint8_t vddWcurrMin : 3; - uint8_t vddRcurrMax : 3; - uint8_t vddRcurrmin : 3; - uint8_t deviceSize1 : 2; - uint8_t deviceSize2 : 8; - uint8_t deviceSize3 : 2; - uint8_t reserved4 : 2; - uint8_t dsrIMP : 1; - uint8_t readBlockMisallign : 1; - uint8_t writeBlockMisallign : 1; - uint8_t readBlockPartial : 1; - uint8_t readBlockLength : 4; - uint8_t ccc1 : 4; - uint8_t ccc2 : 8; - uint8_t transferSpeed : 8; - uint8_t nsac : 8; - uint8_t taac : 8; - uint8_t RESERVE5 : 6; - uint8_t csdStructure : 2; -} CSD_REG_VERSION1_T; - -typedef struct CSD_REG_VERSION2 { - uint8_t RESERVED1 : 2; - uint8_t fileFormat : 2; - uint8_t temporaryWriteProtect : 1; - uint8_t permanantWriteProtect : 1; - uint8_t copy : 1; - uint8_t fileFormatGroup : 1; - uint8_t reserved2 : 5; - uint8_t writeBlockLengthPartial : 1; - uint8_t writeBlockLength : 4; - uint8_t R2WFactor : 3; - uint8_t reserved3 : 2; - uint8_t wpGrpEnable : 1; - uint8_t wpGrpSize : 7; - uint8_t sectorSize : 7; - uint8_t eraseBlockEnable : 1; - uint8_t reserved4 : 1; - uint8_t deviceSize1 : 8; - uint8_t deviceSize2 : 8; - uint8_t deviceSize3 : 6; - uint8_t reserved5 : 2; - uint8_t reserved6 : 4; - uint8_t dsrIMP : 1; - uint8_t readBlockMisallign : 1; - uint8_t writeBlockMisallign : 1; - uint8_t readBlockPartial : 1; - uint8_t readBlockLength : 4; - uint8_t ccc1 : 4; - uint8_t ccc2 : 8; - uint8_t transferSpeed : 8; - uint8_t nsac : 8; - uint8_t taac : 8; - uint8_t reserved7 : 6; - uint8_t csdStructure : 2; -} CSD_REG_VERSION2_T; - -#if defined(__CC_ARM) -#pragma pop -#elif defined(__ICCARM__) -// leave anonymous unions enabled -#elif defined(__GNUC__) -// anonymous unions are enabled by default -#elif defined(__TMS470__) -// anonymous unions are enabled by default -#elif defined(__TASKING__) -#pragma warning restore -#else -#warning Not supported compiler type -#endif - -rsi_error_t RSI_SD_HostInit(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event, uint8_t MemType); -rsi_error_t Smih_DeInitialization(void); -rsi_error_t smih_bus_width_set(uint8_t BusWidthMode); -rsi_error_t smih_bus_voltage_select(uint8_t enVoltage); -rsi_error_t smih_send_command(SMIH_COMMAND_FRAME_CONFIG_T *pConfig); -rsi_error_t smih_get_response(uint16_t *pResponseData, uint8_t ResponseRegCount); -rsi_error_t smih_stop_at_block_gap(void); -rsi_error_t smih_transfer_restart(void); -void smih_18v_signal_enable(void); -rsi_error_t smih_uhs_mode_select(uint8_t UhsMode); -void smih_irq_handler(void); -rsi_error_t smih_modes_configuration(SMIH_CONFIG_MODES_T *pSmihConfig); -rsi_error_t smih_clock_config(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t freq); -rsi_error_t smih_check_for_error_interrupt(void); -rsi_error_t smih_send_data(SMIH_TRANSFER_T *pTransfer); -rsi_error_t smih_receive_data(SMIH_TRANSFER_T *pTransfer); -rsi_error_t smih_memory_command_transfer(SMIH_TRANSFER_T *pTransfer); -rsi_error_t smih_io_command_transfer(SMIH_TRANSFER_T *pTransfer); -void RegisterCallBack(ARM_SMIH_SignalEvent_t Event); - -#ifdef __cplusplus -} -#endif - -#endif // RSI_SMIH_H diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_vad.h b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_vad.h deleted file mode 100644 index 87fcd3bbc..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_vad.h +++ /dev/null @@ -1,164 +0,0 @@ -/******************************************************************************* -* @file rsi_vad.h -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -//Include Files - -#include "rsi_ccp_common.h" -#include "rsi_error.h" - -#ifndef RSI_VAD_H -#define RSI_VAD_H - -#ifdef __cplusplus -extern "C" { -#endif - -// VAD algorithm select enum -typedef enum VAD_ALGORITHM_SELECT { - ZCR, // select the ZCR algorithm for VAD detection - ACF, // select the ACF algorithm for VAD detection - AMDF, // select the AMDF algorithm for VAD detection - WACF, // select the WACF algorithm for VAD detection - ZCR_ACF_AMDF_WACF, // select the ZCR,ACF,AMDF and WACF algorithm for VAD detection - ZCR_ACF, // select the ZCR and ACF algorithm for VAD detection - ZCR_AMDF, // select the ZCR and ACF algorithm for VAD detection - ZCR_WACF // select the ZCR and WACF algorithm for VAD detection -} VAD_ALGORITHM_SELECT_T; - -// AMDF threshold configuration structure (Future usage) -typedef struct { - uint32_t null_threshold : 12; - uint32_t null_threshold_count : 10; - uint32_t peak_threshold : 10; - uint32_t peak_threshold_count : 10; -} VAD_AMDF_THRESHOLD_T; - -typedef VAD_Type RSI_VAD_T; - -#define VAD_PING_IRQHandler IRQ000_Handler // VAD ping interrupt -#define VAD_1SMPLS_PER_ADDR 0x2 -#define VAD_2SMPLS_PER_ADDR 0x1 -#define VAD_4SMPLS_PER_ADDR 0x0 -#define VAD_INTREG_SOURCE 0x0 // Feed voice data to VAD through VAD input register -#define VAD_AUXADC_SOURCE 0x3 // Directly feed ADC data to VAD (This feature not available) -#define VAD_METHOD_ZCR 0x0 -#define VAD_METHOD_ACF 0x1 -#define VAD_METHOD_AMDF 0x2 -#define VAD_METHOD_WACF 0x3 -#define VAD_METHOD_ZCR_ACF_AMDF_WACF 0x4 -#define VAD_METHOD_ZCR_ACF 0x5 -#define VAD_METHOD_ZCR_AMDF 0x6 -#define VAD_METHOD_ZCR_WACF 0x7 - -// Algorithm level threshold -#define VAD_ACF_START 0x05 -#define VAD_ACF_END 0x50 -#define VAD_ACF_THRSHOLD 1000 -#define VAD_ZCR_THRSHOLD 0x190 - -// Energy detection threshold -#define VAD_ENERGY_THRSHOLD 0x32 - -#define MAXIMUM_VALUE_1024 1024 -#define MAXIMUM_VALUE_4096 4096 -#define MAXIMUM_VALUE_4 4 -#define MAXIMUM_VALUE_8 8 - -#define VAD_DIGITAL_GAIN_FAC \ - 4 /*Digital multiplication value,if this value is 5 then each ADC sample will multiply by 32. - data = data << VAD_DIGITAL_GAIN_FAC */ -#define ULP_MEMORY_BASE 0x24060000 -#define TEST_SAMPL_VAL 32 -#define VAD_MASK_VALUE 0xFC00 - -#define DATA_FROM_INTER_ADC \ - 1 /* For feeding voice data to VAD from Si917 ADC then make this macro as 1, - This macro will enable the conversion of 12 bit ADC data to 16 bit data, - VAD is required 16 bit 2s complement data so if input to VAD not using - Si917 ADC output then make this macro as 0 and give proper input data to VAD */ -#define VAD_INTR 0 // VAD interrupt event -#define VAD_ENERGY_DETECT 1 // energy detection event -#define NUMBER_OF_SAMPLE_IN_FRAME 1023 // Maximum number of samples can process in VAD block -#define VAD_SCRT_PAD 0x1800 // Configure the BANK3 for VAD data processing - -typedef void (*VAD_SignalEvent_t)(uint32_t event); // Pointer to VAD Event. - -typedef struct VAD_EVENT { - uint8_t vad_intr; - uint8_t energy_detect; - uint8_t clk_config; - VAD_SignalEvent_t callb_event; -} VAD_EVENT_T; - -// User APIs -rsi_error_t VAD_Init(VAD_SignalEvent_t Event); - -int32_t VAD_Process(int16_t *wr_buf, int32_t dc_est); - -rsi_error_t VAD_Deinit(void); - -// Internal APIs -void RSI_VAD_PingPongMemoryAddrConfig(RSI_VAD_T *pVAD, - uint32_t ping_addr, - uint32_t pong_addr, - uint8_t ping_enable, - uint8_t pong_enable); - -rsi_error_t RSI_VAD_Config(RSI_VAD_T *ptrvad, - uint16_t samples_per_frame, - uint16_t samples_per_address, - bool fullwidth, - uint8_t datasourceselect); - -void RSI_VAD_Enable(RSI_VAD_T *ptrvad); - -void RSI_VAD_InterruptClr(RSI_VAD_T *ptrvad, uint16_t ping_interrupt); - -rsi_error_t RSI_VAD_SetAlgorithmThreshold(RSI_VAD_T *ptrvad, - uint16_t algorithm_type, - uint32_t zcr_threshold, - uint32_t acf_threshold, - uint32_t wacf_threshold, - VAD_AMDF_THRESHOLD_T *config); - -rsi_error_t RSI_VAD_Set_Delay(RSI_VAD_T *ptrvad, uint16_t startdelayval, uint16_t enddelayval); - -rsi_error_t RSI_VAD_Input(RSI_VAD_T *ptrVad, int16_t data); - -rsi_error_t RSI_VAD_FrameEnergyConfig(RSI_VAD_T *ptrvad, - uint32_t threshold_frame_energy, - uint32_t threshold_smpl_collect, - uint32_t prog_smpls_for_energy_check); - -void RSI_VAD_Stop(RSI_VAD_T *pVAD); - -uint8_t RSI_VAD_ProccessDone(RSI_VAD_T *pVAD); - -void RSI_VAD_FastClkEnable(uint16_t fast_clk_sel, uint16_t clk_div_factor); - -int32_t RSI_VAD_ProcessData(RSI_VAD_T *pVAD, - uint32_t vad_addr, - uint32_t adc_data_addr, - int32_t dc_est, - uint32_t dig_scale, - uint32_t sample_len); - -#ifdef __cplusplus -} -#endif - -#endif // RSI_VAD_H diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_wurx.h b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_wurx.h deleted file mode 100644 index 3ed64f256..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_wurx.h +++ /dev/null @@ -1,143 +0,0 @@ -/******************************************************************************* -* @file rsi_wurx.h -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -//Include Files - -#ifndef RSI_WURX_H -#define RSI_WURX_H - -#ifdef __cplusplus -extern "C" { -#endif - -#define PMU_SPI_BASE_ADDR 0x24050000 - -#define WURX_COMP_OFFSET_CALIB_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x080) * 4) -#define WURX_LCO_FREQ_CALIB_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x081) * 4) -#define WURX_AAC_MODE_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x082) * 4) -#define WURX_CLK_GEN_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x083) * 4) -#define WURX_LNA_IF_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x084) * 4) -#define WURX_ENABLE_AND_AAC_DET_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x085) * 4) -#define WURX_TEST_MUX_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x086) * 4) -#define WURX_TEST_MODE_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x087) * 4) - -#define WURX_PATTERN1_REG_MSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x089) * 4) -#define WURX_PATTERN1_REG_MID *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x08A) * 4) -#define WURX_PATTERN1_REG_LSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x08B) * 4) -#define WURX_PATTERN2_REG_MSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x08C) * 4) -#define WURX_PATTERN2_REG_MID *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x08D) * 4) -#define WURX_PATTERN2_REG_LSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x08E) * 4) -#define WURX_CORR_DET_READ_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x08F) * 4) -#define WURX_ODD_PATTERN1_REG_LSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x090) * 4) -#define WURX_ODD_PATTERN1_REG_MID *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x091) * 4) -#define WURX_ODD_PATTERN1_REG_MSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x092) * 4) -#define WURX_EVEN_PATTERN1_REG_LSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x093) * 4) -#define WURX_EVEN_PATTERN1_REG_MID *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x094) * 4) -#define WURX_EVEN_PATTERN1_REG_MSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x095) * 4) -#define WURX_ODD_PATTERN2_REG_LSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x096) * 4) -#define WURX_ODD_PATTERN2_REG_MID *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x097) * 4) -#define WURX_ODD_PATTERN2_REG_MSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x098) * 4) -#define WURX_EVEN_PATTERN2_REG_LSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x099) * 4) -#define WURX_EVEN_PATTERN2_REG_MID *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x09A) * 4) -#define WURX_EVEN_PATTERN2_REG_MSB *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x09B) * 4) -#define WURX_LEVEL1_PATTERN_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x09C) * 4) -#define WURX_BYPASS_LEVEL1_AND_FREQ *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x09D) * 4) -#define WURX_MANUAL_CALIB_MODE_REG1 *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x09E) * 4) -#define WURX_MANUAL_CALIB_MODE_REG2 *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x09F) * 4) -#define WURX_CORR_CALIB_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x088) * 4) -#define ULPCLKS_REFCLK_REG *(volatile uint32_t *)(PMU_SPI_BASE_ADDR + 0xa000 + (0x106) * 4) - -#define BG_SAMPLING_ADDR 0x41300140 -#define BG_SAMPLING_VALUE 0x3 -#define TAIL_DATA_VALUE_CHECK 0x3 -#define SYNC_32KHZ_RESET_VALUE 0x000001 -#define RESET_CALB_CLOCK 0x000002 -#define LCO_CALB_STATUS 0x000002 - -#define VAL0 0 -#define VAL1 1 -#define VAL2 2 -#define VAL3 3 -#define VAL4 4 -#define VAL5 5 -#define VAL6 6 -#define VAL7 7 -#define VAL10 10 -#define VAL100 100 - -#define POS1 1 -#define POS3 3 -#define POS4 4 -#define POS7 7 -#define POS9 9 -#define POS10 10 -#define POS9 9 -#define POS11 11 -#define POS12 12 -#define POS13 13 -#define POS16 16 -#define POS15 15 -#define POS17 17 -#define POS18 18 -#define POS19 19 -#define POS20 20 -#define POS21 21 -#define POS22 22 - -#define IPMU_SPARE_REG2 0x141 -#define DC_OFFSET_VALUE 0x40 -#define REF_CLOCK_FREQ 0x400 -#define DETECTION_REF_SHIFT 0x1FC1FF -#define TAIL_DATA_DECODE_64BIT 0x0 -#define TAIL_DATA_DECODE_128BIT 0x1 -#define TAIL_DATA_DECODE_192BIT 0x2 -#define TAIL_DATA_DECODE_256BIT 0x3 -#define LDO_ON_MODE 0xA8000020 -#define PATTERN_LEN_MASK 0x38000 -#define PATTERN_LEN_CLR_MASK 0x7 -#define THRESH_CLR_MASK_VAL 0x3F - -uint8_t RSI_WURX_GetPatternDetectedType(void); -void RSI_WURX_ConfigL2Patttern(uint8_t freq_div); -void RSI_IPMU_DCCalib(void); -uint16_t RSI_WURX_ReadPatternLength(void); -void RSI_WURX_AnalogOff(void); -void RSI_WURX_DigitalOff(void); -void RSI_WURX_Init(uint16_t bypass_l1_enable, uint16_t l1_freq_div, uint16_t l2_freq_div); -void RSI_WURX_ReadPattern2Even(uint32_t *tail_data); -void RSI_WURX_ReadPattern1Even(uint32_t *tail_data); -void RSI_WURX_ReadPattern1Odd(uint32_t *tail_data); -void RSI_WURX_ReadPattern2Odd(uint32_t *tail_data); -void RSI_WURX_Pattern1MatchValue(uint32_t *match_value); -void RSI_WURX_Pattern2MatchValue(uint32_t *match_value); -uint16_t RSI_WURX_TaildataPresent(void); -void RSI_WURX_CorrEnable(uint16_t wurx_enable); -void RSI_WURX_SetPatternLength(uint16_t enable, uint16_t l1_len, uint16_t l2_len); -void RSI_WURX_SetWakeUpThreshold(uint16_t threshold_1, uint16_t threshold_2); -void RSI_WURX_TailDataDecodeEnable(uint16_t enable, uint16_t data_len); -rsi_error_t RSI_WURX_GetTailData(uint32_t *tail_data, uint16_t tail_data_len); -void RSI_IPMU_40MhzClkCalib(uint16_t clk_enable, uint32_t channel_selection_value); -uint32_t RSI_WURX_CalThershValue(uint32_t bit_length, uint32_t percentage); -void RSI_WURX_SoftwareRestart(void); -int32_t RSI_WURX_GetPatternType(void); -void RSI_WURX_BGSamplingEnable(void); - -#ifdef __cplusplus -} -#endif - -#endif // RSI_WURX_H diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_adc.c b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_adc.c index a5086b38c..def3add5d 100644 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_adc.c +++ b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_adc.c @@ -27,10 +27,10 @@ #include #include #include "sl_si91x_dma.h" +#include "clock_update.h" //---------------------- Macros -----------------// #define ADC_CLK_SOURCE_32KHZ 32000 #define ADC_CLK_SOURCE_20MHZ 20000000 -#define ADC_CLK_SOURCE_32MHZ 32000000 #define ADC_CLK_SOURCE_40MHZ 40000000 #define MAXIMUM_ADC_SAMPLE_LEN 1023 #define MINIMUM_ADC_SAMPLE_LEN 1 @@ -173,25 +173,17 @@ rsi_error_t ADC_Init(adc_ch_config_t adcChConfig, adc_config_t adcConfig, adccal } // Configure 32MHz RC clock to ADC else if (clk_sel >= SAMPLE_RATE_32KSPS && clk_sel <= SAMPLE_RATE_800KSPS) { - // Select 32MHz RC clock for ADC + // Select MHz RC clock for ADC RSI_ULPSS_AuxClkConfig(ULPCLK, ENABLE_STATIC_CLK, ULP_AUX_32MHZ_RC_CLK); - - adc_commn_config.adc_clk_src = ADC_CLK_SOURCE_32MHZ; + /* Update the ADC clock source variable */ + adc_commn_config.adc_clk_src = RSI_CLK_GetBaseClock(ULPSS_AUX); } else { // Configure the 32MHz RC clock to ADC if (!(M4_ULP_SLP_STATUS_REG & ULP_MODE_SWITCHED_NPSS)) { -#ifdef SIMULATION - RSI_ULPSS_AuxClkConfig(ULPCLK, ENABLE_STATIC_CLK, ULP_AUX_32MHZ_RC_CLK); - adc_commn_config.adc_clk_src = ADC_CLK_SOURCE_32MHZ; -#else - // Select 32MHz RC ULP reference clock - RSI_ULPSS_RefClkConfig(ULPSS_ULP_32MHZ_RC_CLK); - // Select 40MHz XTAL clock for ADC RSI_ULPSS_AuxClkConfig(ULPCLK, ENABLE_STATIC_CLK, ULP_AUX_REF_CLK); - - adc_commn_config.adc_clk_src = ADC_CLK_SOURCE_40MHZ; -#endif + /* Update the ADC clock source variable */ + adc_commn_config.adc_clk_src = RSI_CLK_GetBaseClock(ULPSS_AUX); } else { adc_commn_config.adc_clk_src = ADC_CLK_SOURCE_20MHZ; } @@ -210,13 +202,13 @@ rsi_error_t ADC_Init(adc_ch_config_t adcChConfig, adc_config_t adcConfig, adccal // Single ended gain integer_val = RSI_IPMU_Auxadcgain_SeEfuse(); - frac = (float)((integer_val) & (0x3FFF)); + frac = (float)((integer_val) & (0x3FFF)); frac /= 1000; adc_commn_config.adc_sing_gain = ((float)(integer_val >> 14) + frac); // Differential ended gain integer_val = RSI_IPMU_Auxadcgain_DiffEfuse(); - frac = (float)((integer_val) & (0x3FFF)); + frac = (float)((integer_val) & (0x3FFF)); frac /= 1000; adc_commn_config.adc_diff_gain = (((float)(integer_val >> 14)) + frac); #endif @@ -292,22 +284,14 @@ rsi_error_t ADC_Per_Channel_Init(adc_ch_config_t adcChConfig, adc_config_t adcCo // Select 32MHz RC clock for ADC RSI_ULPSS_AuxClkConfig(ULPCLK, ENABLE_STATIC_CLK, ULP_AUX_32MHZ_RC_CLK); - adc_commn_config.adc_clk_src = ADC_CLK_SOURCE_32MHZ; + adc_commn_config.adc_clk_src = RSI_CLK_GetBaseClock(ULPSS_AUX); } else { // Configure the 32MHz RC clock to ADC if (!(M4_ULP_SLP_STATUS_REG & ULP_MODE_SWITCHED_NPSS)) { -#ifdef SIMULATION - RSI_ULPSS_AuxClkConfig(ULPCLK, ENABLE_STATIC_CLK, ULP_AUX_32MHZ_RC_CLK); - adc_commn_config.adc_clk_src = ADC_CLK_SOURCE_32MHZ; -#else - // Select 32MHz RC ULP reference clock - RSI_ULPSS_RefClkConfig(ULPSS_ULP_32MHZ_RC_CLK); - - // Select 32MHz RC clock for ADC - RSI_ULPSS_AuxClkConfig(ULPCLK, ENABLE_STATIC_CLK, ULP_AUX_32MHZ_RC_CLK); - - adc_commn_config.adc_clk_src = ADC_CLK_SOURCE_32MHZ; -#endif + // Select 40MHz XTAL clock for ADC + RSI_ULPSS_AuxClkConfig(ULPCLK, ENABLE_STATIC_CLK, ULP_AUX_REF_CLK); + /* Update the ADC clock source variable */ + adc_commn_config.adc_clk_src = RSI_CLK_GetBaseClock(ULPSS_AUX); } else { adc_commn_config.adc_clk_src = ADC_CLK_SOURCE_20MHZ; } @@ -325,13 +309,13 @@ rsi_error_t ADC_Per_Channel_Init(adc_ch_config_t adcChConfig, adc_config_t adcCo // Single ended gain integer_val = RSI_IPMU_Auxadcgain_SeEfuse(); - frac = (float)((integer_val) & (0x3FFF)); + frac = (float)((integer_val) & (0x3FFF)); frac /= 1000; adc_commn_config.adc_sing_gain = ((float)(integer_val >> 14) + frac); // Differential ended gain integer_val = RSI_IPMU_Auxadcgain_DiffEfuse(); - frac = (float)((integer_val) & (0x3FFF)); + frac = (float)((integer_val) & (0x3FFF)); frac /= 1000; adc_commn_config.adc_diff_gain = (((float)(integer_val >> 14)) + frac); #endif @@ -888,19 +872,19 @@ rsi_error_t ADC_Deinit(void) rsi_error_t ADC_Deinit(adc_config_t adcConfig) #endif { - // Power down the ADC block - RSI_ADC_PowerControl(ADC_POWER_OFF); - + (void)adcConfig; #ifdef CHIP_9118 // Stop ADC operation RSI_ADC_Stop(AUX_ADC_DAC_COMP); #endif -#ifdef SLI_SI917 - RSI_ADC_Stop(AUX_ADC_DAC_COMP, adcConfig.operation_mode); -#endif + // Disable IRQ + NVIC_DisableIRQ(ADC_IRQn); + if (sl_si91x_dma_unregister_callbacks(DMA_INSTANCE, DMA_CHANNEL, SL_DMA_TRANSFER_DONE_CB | SL_DMA_ERROR_CB)) { return ARM_DRIVER_ERROR; } + // Power down the ADC block + RSI_ADC_PowerControl(ADC_POWER_OFF); return RSI_OK; } @@ -932,9 +916,9 @@ rsi_error_t ADC_Stop(void) */ rsi_error_t ADC_Stop(adc_config_t adcConfig) { - - RSI_ADC_Stop(AUX_ADC_DAC_COMP, adcConfig.operation_mode); - return RSI_OK; + rsi_error_t error_status; + error_status = RSI_ADC_Stop(AUX_ADC_DAC_COMP, adcConfig.operation_mode); + return error_status; } #endif @@ -1937,6 +1921,9 @@ rsi_error_t RSI_ADC_Stop(AUX_ADC_DAC_COMP_Type *pstcADC) pstcADC->AUXADC_CONFIG_2_b.AUXADC_DYN_ENABLE = 0; } #endif + if (AUX_ADC_DAC_COMP->AUXADC_CTRL_1_b.ADC_ENABLE != 1U) { + return RSI_FAIL; + } pstcADC->AUXADC_CTRL_1_b.ADC_ENABLE = 0; return RSI_OK; } diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_cci.c b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_cci.c deleted file mode 100644 index 69bcb979d..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_cci.c +++ /dev/null @@ -1,174 +0,0 @@ -/******************************************************************************* -* @file rsi_cci.c -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Include Files - -#if defined(CHIP_9118) - -/*==============================================*/ -/** - * @fn void RSI_CCI_AmsEnable() - * @brief This API enables the CCI in the master mode - * @return None - */ -void RSI_CCI_AmsEnable() -{ - AMS_EN |= (1 << 15); -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_CCI_AMS_Initialise(RSI_CCI_Init_t *p_cci_config) - * @brief This API configures the CCI peripheral - * @param[in] p_cci_config CCI configuration structure pointer - * \n - * \ref RSI_CCI_Init_t - * \ref CCI_CONTROL_REG_b - * \ref CCI_LSB_A_S1_REG - * @return \ref RSI_OK if success full or - * else error code - */ -rsi_error_t RSI_CCI_AMS_Initialise(RSI_CCI_Init_t *p_cci_config) -{ - CCI_Type *pcci = CCI; - - //Choose the SDR or DDR mode, Address translation enable, address width config and number of slaves by programming the CCI_CONTROL register. - pcci->CCI_CONTROL_b.MODE = (p_cci_config->mode << 2); - pcci->CCI_CONTROL_b.TRANSLATE_ENABLE = p_cci_config->translation_enable; - pcci->CCI_CONTROL_b.ADDR_WIDTH_CONFIG = p_cci_config->address_width_config; - pcci->CCI_CONTROL_b.MODE = (p_cci_config->interface_width << 0); - pcci->CCI_CONTROL_b.ENABLED_SLAVES = p_cci_config->slave_enable; - pcci->CCI_CONTROL_b.SLAVE_PRIORITY = p_cci_config->slave_priority; - pcci->CCI_CONTROL_b.TIME_OUT_PRG = p_cci_config->slave_timeout; - pcci->CCI_CONTROL_b.CCI_CTRL_ENABLE = p_cci_config->cci_cntrl_en; - - if (p_cci_config->mode == 1) // if mode is ddr then load 2x clock enable - { - // 2x clock enable for ddr mode - pcci->CCI_PREFETCH_CTRL_b.CCI_2X_CLK_ENABLE_FOR_DDR_MODE = 1; - } - - // Allocate the lower and higher address range for the each slave by programming in the following registers - switch (p_cci_config->slave_enable) { - case 0: { - if (p_cci_config->slave_lsb_address[0] < p_cci_config->slave_msb_address[0]) { - // Load LSB address supportes and MSB address supported - pcci->CCI_LSB_A_S1 = p_cci_config->slave_lsb_address[0]; - pcci->CCI_MSB_A_S1 = p_cci_config->slave_msb_address[0]; - } else { - return ERROR_CCI_ADDRESS_ERR; - } - break; - } - case 1: { - if (p_cci_config->slave_lsb_address[0] < p_cci_config->slave_msb_address[0]) { - // Load LSB address supportes and MSB address supported - pcci->CCI_LSB_A_S1 = p_cci_config->slave_lsb_address[0]; - pcci->CCI_MSB_A_S1 = p_cci_config->slave_msb_address[0]; - } else { - return ERROR_CCI_ADDRESS_ERR; - } - break; - } - case 2: { - if (p_cci_config->slave_lsb_address[1] < p_cci_config->slave_msb_address[1]) { - // Load LSB address supportes and MSB address supported - pcci->CCI_LSB_A_S2 = p_cci_config->slave_lsb_address[1]; - pcci->CCI_MSB_A_S2 = p_cci_config->slave_msb_address[1]; - } else { - return ERROR_CCI_ADDRESS_ERR; - } - break; - } - - case 3: { - if (p_cci_config->slave_lsb_address[0] < p_cci_config->slave_msb_address[0]) { - // Load LSB address supportes and MSB address supported - pcci->CCI_LSB_A_S1 = p_cci_config->slave_lsb_address[0]; - pcci->CCI_MSB_A_S1 = p_cci_config->slave_msb_address[0]; - } else { - return ERROR_CCI_ADDRESS_ERR; - } - - if (p_cci_config->slave_lsb_address[1] < p_cci_config->slave_msb_address[1]) { - // Load LSB address supportes and MSB address supported - pcci->CCI_LSB_A_S2 = p_cci_config->slave_lsb_address[1]; - pcci->CCI_MSB_A_S2 = p_cci_config->slave_msb_address[1]; - } else { - return ERROR_CCI_ADDRESS_ERR; - } - break; - } - } - - // Load the translation address if address translation feature is enabled by programming the - // cci_translation_address. - if ((p_cci_config->translation_enable) == 1) { - pcci->CCI_TRANS_ADDRESS = p_cci_config->translation_address; - } - - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn uint32_t RSI_CCI_SetFifoThreshlod(volatile CCI_Type *pstcCCI,uint8_t val) - * @brief This API sets the CCI threshhold fifo value - * @param[in] pstcCCI CCI configuration structure pointer \ref CCI_Type - * \ref CCI_FIFO_THRESHOLD_REG - * @param[in] val Threshold value - * @return \ref RSI_OK if success full or - * \n else error code - */ -uint32_t RSI_CCI_SetFifoThreshlod(volatile CCI_Type *pstcCCI, uint8_t val) -{ - pstcCCI->CCI_FIFO_THRESHOLD_REG |= val; - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn uint32_t RSI_CCI_PrefetchEnable(volatile CCI_Type *pstcCCI) - * @brief This API is used for prefetct enable - * @param[in] pstcCCI CCI configuration structure pointer - * \ref CCI_Type - * @return \ref RSI_OK if success full or - * \n else error code - */ - -uint32_t RSI_CCI_PrefetchEnable(volatile CCI_Type *pstcCCI) -{ - pstcCCI->CCI_PREFETCH_CTRL_b.CCI_PREFETCH_EN = 0x1; - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn uint32_t RSI_CCI_IntClear(volatile CCI_Type *pstcCCI,uint8_t interrupt) - * @brief This API is used to clear the interrupts - * @param[in] pstcCCI CCI configuration structure pointer - * \ref CCI_Type - * @param[in] interrupt 0-2 for interrupt from peer chips - * \n 3 for message interrupt from slave - * @return \ref RSI_OK if success full or - * \n else error code - */ -uint32_t RSI_CCI_IntClear(volatile CCI_Type *pstcCCI, uint8_t interrupt) -{ - return pstcCCI->CCI_MODE_INTR_STATUS_b.INTR_CLEAR = (0x1 << interrupt); -} -#endif diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_dac.c b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_dac.c index 6f4d6c105..2abc216da 100644 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_dac.c +++ b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_dac.c @@ -255,7 +255,7 @@ uint32_t dac_set_clock(uint32_t sampl_rate) // Program in PS2 state Need to integrate // Configured DAC clock as 32Mhz RC RSI_ULPSS_AuxClkConfig(ULPCLK, ENABLE_STATIC_CLK, ULP_AUX_32MHZ_RC_CLK); - clk_div_fac = (uint16_t)ceil((2 * DAC_CLK_SRC_32MHZ) / sampl_rate); + clk_div_fac = (uint16_t)ceil((2 * RSI_CLK_GetBaseClock(ULPSS_AUX)) / sampl_rate); // Configure the DAC division factor for required sampling rate RSI_DAC_ClkDivFactor(AUX_ADC_DAC_COMP, clk_div_fac); return (uint32_t)((clk_div_fac * sampl_rate) / 2); @@ -263,7 +263,7 @@ uint32_t dac_set_clock(uint32_t sampl_rate) if (sampl_rate > DAC_SAMPLE_RATE_32KSPS && sampl_rate < DAC_SAMPLE_RATE_80KSPS) { // Configured DAC clock as 32Mhz RC RSI_ULPSS_AuxClkConfig(ULPCLK, ENABLE_STATIC_CLK, ULP_AUX_32MHZ_RC_CLK); - clk_div_fac = (uint16_t)ceil((2 * DAC_CLK_SRC_32MHZ) / sampl_rate); + clk_div_fac = (uint16_t)ceil((2 * RSI_CLK_GetBaseClock(ULPSS_AUX)) / sampl_rate); if (clk_div_fac > 0x03FF) { clk_div_fac = 0x03FF; } @@ -271,10 +271,9 @@ uint32_t dac_set_clock(uint32_t sampl_rate) RSI_DAC_ClkDivFactor(AUX_ADC_DAC_COMP, clk_div_fac); return (uint32_t)((clk_div_fac * sampl_rate) / 2); } else { - RSI_ULPSS_RefClkConfig(ULPSS_ULP_32MHZ_RC_CLK); // Configured DAC clock as 32Mhz RC RSI_ULPSS_AuxClkConfig(ULPCLK, ENABLE_STATIC_CLK, ULP_AUX_32MHZ_RC_CLK); - clk_div_fac = (uint16_t)ceil((2 * DAC_CLK_SRC_32MHZ) / sampl_rate); + clk_div_fac = (uint16_t)ceil((2 * RSI_CLK_GetBaseClock(ULPSS_AUX)) / sampl_rate); // Configure the DAC division factor for required sampling rate RSI_DAC_ClkDivFactor(AUX_ADC_DAC_COMP, clk_div_fac); return (uint32_t)((clk_div_fac * sampl_rate) / 2); diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_fim.c b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_fim.c deleted file mode 100644 index 189b37e45..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_fim.c +++ /dev/null @@ -1,4223 +0,0 @@ -/******************************************************************************* -* @file rsi_fim.c -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Include files - -#ifdef ENHANCED_FIM -#include "rsi_enhanced_fim.h" -#endif - -#ifdef ENHANCED_FIM -/*==============================================*/ -/** - *@fn void RSI_FIM_EnableSaturation(void) - *@brief This API is used to enable saturation . - *@return none - */ -void RSI_FIM_EnableSaturation(void) -{ - FIM->FIM_SAT_SHIFT_b.SAT_EN = ENABLE; -} -#endif -/*==============================================*/ -/** - *@fn static void RSI_FIM_InputData(void *pSrcA,uint32_t bank,uint32_t blockSize,uint8_t data_type) - *@brief This API is used to store data in ulp memories - *@param[in] :pSrcA is input vector - *@param[in] :bank is in which memory data samples are stored - *@param[in] :data_type specifies q7,q15 , q31 formats - * \ref FORMAT_F32 - * \ref FORMAT_Q31 - * \ref FORMAT_Q7 - * \ref FORMAT_Q15 - *@param[in] :blockSize is size of the input array - *@return none -*/ -void RSI_FIM_InputData(void *pSrcA, uint32_t bank, uint32_t blockSize, uint8_t data_type) -{ - uint32_t var; - q31_t *pSrcA32; - q15_t *pSrcA16; - q7_t *pSrcA8; - - switch (data_type) { - case FORMAT_F32: - case FORMAT_Q31: - pSrcA32 = (q31_t *)pSrcA; - for (var = 0; var < blockSize; var++) { -#ifdef ENHANCED_FIM - *(volatile uint32_t *)(bank + (var * 4)) = *pSrcA32; -#else - *(volatile uint32_t *)((MEM_BANK + (bank << 2)) + (var * 4)) = *pSrcA32; -#endif - pSrcA32++; - } - break; - - case FORMAT_Q7: - pSrcA8 = (q7_t *)pSrcA; - for (var = 0; var < blockSize; var++) { -#ifdef ENHANCED_FIM - *(volatile uint32_t *)(bank + (var * 4)) = *pSrcA8; -#else - *(volatile uint32_t *)((MEM_BANK + (bank << 2)) + (var * 4)) = *pSrcA8; -#endif - pSrcA8++; - } - break; - - case FORMAT_Q15: - pSrcA16 = (q15_t *)pSrcA; - - for (var = 0; var < blockSize; var++) { -#ifdef ENHANCED_FIM - *(volatile uint32_t *)(bank + (var * 4)) = *pSrcA16; -#else - *(volatile uint32_t *)((MEM_BANK + (bank << 2)) + (var * 4)) = *pSrcA16; -#endif - pSrcA16++; - } - break; - } -} -/*==============================================*/ -/** - *@fn static void RSI_FIM_InputDataCmplx(volatile q15_t *pReal,uint32_t bank,volatile uint32_t var,uint8_t flag) - *@brief This API is used to store data in ulp memories - *@param[in] :pReal is input vector - *@param[in] :bank is in which memory data samples are stored - *@param[in] :flag is set depending on complex-real and real-complex values - *@param[in] :var is for address increment -**/ -static void RSI_FIM_InputDataCmplx(volatile q15_t *pReal, uint32_t bank, volatile uint32_t var, uint8_t flag) -{ - - if (flag) { -#ifdef ENHANCED_FIM - *(volatile uint16_t *)((bank) + ((var + 1) * 2)) = *pReal; -#else - *(volatile uint16_t *)((MEM_BANK + (bank << 2)) + ((var + 1) * 2)) = *pReal; -#endif - pReal++; -#ifdef ENHANCED_FIM - *(volatile uint16_t *)((bank) + (var)*2) = *pReal; -#else - *(volatile uint16_t *)((MEM_BANK + (bank << 2)) + (var)*2) = *pReal; -#endif - pReal++; - } else { -#ifdef ENHANCED_FIM - *(volatile uint16_t *)((bank) + ((var + 1) * 2)) = *pReal; - *(volatile uint16_t *)((bank) + (var)*2) = 0x0000; -#else - *(volatile uint16_t *)((MEM_BANK + (bank << 2)) + ((var + 1) * 2)) = *pReal; - *(volatile uint16_t *)((MEM_BANK + (bank << 2)) + (var)*2) = 0x0000; -#endif - } -} -/*==============================================*/ -/** - *@fn static void RSI_FIM_ComplxOutputConvert(uint32_t blockSize, uint32_t bank,volatile q15_t *pDst) - *@brief This API is used to set the FIM to convert the complex output - *@param[in] :bank is output bank address - *@param[out] :pDst is required output array - *@param[in] :blockSize is size of the input array - *@return :none - */ -static void RSI_FIM_ComplxOutputConvert(uint32_t blockSize, uint32_t bank, volatile q15_t *pDst) -{ - volatile uint32_t i, a; - - for (i = 0; i < blockSize; i++) { - a = i * 2; -#ifdef ENHANCED_FIM - *pDst = *(volatile uint16_t *)((bank) + ((a + 1)) * 2); -#else - *pDst = *(volatile uint16_t *)((MEM_BANK + (bank << 2)) + ((a + 1)) * 2); -#endif - pDst++; -#ifdef ENHANCED_FIM - *pDst = *(volatile uint16_t *)((bank) + (a)*2); -#else - *pDst = *(volatile uint16_t *)((MEM_BANK + (bank << 2)) + (a)*2); -#endif - *pDst++; - } -} -/*==============================================*/ -/** - *@fn void rsi_fim_read_data(uint32_t bank, uint32_t blockSize, volatile void *pDst, uint8_t data_type, typ_data_t type_data) - *@brief This API is used to set the FIM to read the output - *@param[in] bank : is output bank address - *@param[out] pDst : is required output array - *@param[in] data_type : specifies q7,q15 , q31 formats - *@param[in] type_data : is to specify real-complex , complex-real or complex-complex data - *@param[in] length : is size of the input array - *@return none - */ - -void rsi_fim_read_data(uint32_t bank, uint32_t blockSize, volatile void *pDst, uint8_t data_type, typ_data_t type_data) -{ - volatile uint32_t var; - - if ((data_type == FORMAT_F32) || (data_type == FORMAT_Q31)) { - for (var = 0; var < blockSize; var++) { -#ifdef ENHANCED_FIM - ((q31_t *)pDst)[var] = *(volatile uint32_t *)(bank + (var * 4)); -#else - ((q31_t *)pDst)[var] = *(volatile uint32_t *)((MEM_BANK + (bank << 2)) + (var * 4)); -#endif - } - } - - if (data_type == FORMAT_Q7) { - for (var = 0; var < blockSize; var++) { -#ifdef ENHANCED_FIM - ((q7_t *)pDst)[var] = *(volatile uint32_t *)(bank + (var * 4)); -#else - ((q7_t *)pDst)[var] = *(volatile uint32_t *)((MEM_BANK + (bank << 2)) + (var * 4)); -#endif - } - } - if (data_type == FORMAT_Q15) { - if (type_data) { - RSI_FIM_ComplxOutputConvert(blockSize, bank, (q15_t *)pDst); - } else { - for (var = 0; var < blockSize; var++) { -#ifdef ENHANCED_FIM - ((q15_t *)pDst)[var] = *(volatile uint32_t *)(bank) + (var * 4); -#else - ((q15_t *)pDst)[var] = *(volatile uint32_t *)((MEM_BANK + (bank << 2)) + (var * 4)); -#endif - } - } - } -} - -/*==============================================*/ -/** - *@fn static void RSI_FIM_SetDataLen(uint32_t ColAorfilterLen,uint32_t bufferLen1,uint32_t bufferLen2) - *@brief RSI_FIM_SetDataLen API is used to set data blockSize of buffers in the FIM module - *@param[in] :ColAorfilterLen is used for configuring number of columns of first matrix or - * \n filter coefficients for fir , iir and fir interpolator filters. - *@param[in] :bufferLen1 is the blockSize of data used for input1 - * \n for scalar only bufferLen1 need to be configured. - * \n for filter - *@param[in] :bufferLen2 is the blockSize of data used for input2 i.e. only for vector operations this is used. - *@return none - * - */ -static void RSI_FIM_SetDataLen(uint32_t ColAorfilterLen, uint32_t bufferLen1, uint32_t bufferLen2) -{ - FIM->FIM_CONFIG_REG1_b.INP1_LEN = bufferLen1; - FIM->FIM_CONFIG_REG1_b.INP2_LEN = bufferLen2; - FIM->FIM_CONFIG_REG1_b.MAT_LEN = ColAorfilterLen; -} - -/*==============================================*/ -/** - *@fn static void RSI_FIM_SetSatTruncRound(uint32_t SatTruncRoundShift) - *@brief RSI_FIM_SetSatTruncRound API is used to set sat trunc values to FIM module for corresponding inputs - *@param[in] :SatTruncRoundShift is saturate truncation and round value that need to be to get appropriate output - * saturate - to confine msb to limited value - * truncate - to confine lsb to limited value - * - * round - approximating to near value - *@return none - */ -void RSI_FIM_SetSatTruncRound(uint32_t SatTruncRoundShift) -{ - // Shift truncate saturate and round - FIM->FIM_SAT_SHIFT |= SatTruncRoundShift; -} - -/*==============================================*/ -/** - *@fn :static void RSI_FIM_DatTypTrig(uint32_t numRow1, uint32_t numCol2, typ_data_t typData) - *@brief :RSI_FIM_DatTypTrig API is used to trigger the FIM module - *@param[in] :numRow1 is number of rows of first matrix - *@param[in] :numCol2 is number of columns of second matrix - *@param[in] :typData is to select which type of data is given as input i.e. real-real , real-complex , complex-real and complex-complex - * In case of vectors, for real-complx, data in second memory is considered as real and 1st as cmplx. - * for complx-real, data in 1st memory is considered as real and second as cmplx. - * In case of scalar, for real-complx, data in memory is taken as complex and scalar as real. - *@return none -*/ -static void RSI_FIM_DatTypTrig(uint32_t numRow1, uint32_t numCol2, typ_data_t typData) -{ - uint32_t x; - x = 0x0FC00000 & FIM->FIM_CONFIG_REG2; - switch (typData) { - case ULP_FIM_COP_DATA_REAL_REAL: - FIM->FIM_CONFIG_REG2 = x | (numRow1 << 16) | (numCol2 << 10) | typData << 8 | ULP_FIM_COP_START_TRIG; - break; - case ULP_FIM_COP_DATA_CPLX_REAL: - FIM->FIM_CONFIG_REG2 = x | (numRow1 << 16) | (numCol2 << 10) | typData << 8 | ULP_FIM_COP_START_TRIG; - break; - case ULP_FIM_COP_DATA_REAL_CPLX: - FIM->FIM_CONFIG_REG2 = x | (numRow1 << 16) | (numCol2 << 10) | typData << 8 | ULP_FIM_COP_START_TRIG; - break; - case ULP_FIM_COP_DATA_CPLX_CPLX: - FIM->FIM_CONFIG_REG2 = x | (numRow1 << 16) | (numCol2 << 10) | typData << 8 | ULP_FIM_COP_START_TRIG; - break; - } -} - -/*==============================================*/ -/** - *@fn void rsi_arm_offset_f32_opt(int32_t *pSrc, - int32_t scale, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank) - *@brief This API is used to set the FIM Scalar Multiplication for real data - *@param[in] *pSrc : points to input vector - *@param[out] *pDst : points to output vector - *@param[in] scale : is constant value that need to be addedd for each elements of vector array. - *@param[in] length : is size of the input array - *@return none - * - */ -void rsi_arm_offset_f32_opt(int32_t *pSrc, - int32_t scale, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, 0); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = scale; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((ADD_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_offset_q7_opt(q7_t *pSrc, q7_t scale, q7_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) - *@brief This API is used to set the FIM Scalar Multiplication for real data - *@param[in] *pSrc : points to input vector - *@param[out] *pDst : points to output vector - *@param[in] scale : is constant value that need to be addedd for each elements of vector array. - *@param[in] length : is size of the input array - *@return none - * - */ -void rsi_arm_offset_q7_opt(q7_t *pSrc, q7_t scale, q7_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, 0); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = scale; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((ADD_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} -/*==============================================*/ - -/** - *@fn void rsi_arm_offset_q15_opt(q15_t *pSrc, - * q15_t scale, - * q15_t *pDst, - * uint32_t blockSize, - * uint16_t inBank, - * uint16_t outBank) - *@brief This API is used to set the FIM Scalar Multiplication for real data - *@param[in] *pSrc : points to input vector - *@param[out] *pDst : points to output vector - *@param[in] scale : is constant value that need to be addedd for each elements of vector array. - *@param[in] length : is size of the input array - *@return none - * - */ - -void rsi_arm_offset_q15_opt(q15_t *pSrc, - q15_t scale, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, 0); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = scale; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((ADD_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_offset_q31_opt(q31_t *pSrc, - * q31_t scale, - * q31_t *pDst, - * uint32_t blockSize, - * uint16_t inBank, - * uint16_t outBank) - *@brief This API is used to set the FIM Scalar Multiplication for real data - *@param[in] *pSrc : points to input vector - *@param[out] *pDst : points to output vector - *@param[in] scale : is constant value that need to be addedd for each elements of vector array. - *@param[in] length : is size of the input array - *return none - * - */ -void rsi_arm_offset_q31_opt(q31_t *pSrc, - q31_t scale, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, 0); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = scale; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((ADD_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_fim_scalar_sub_f32(int32_t *pSrc, - * int32_t scale, - * int32_t *pDst, - * uint32_t blockSize, - * uint16_t inBank, - * uint16_t outBank) - *@brief This API is used to set the FIM Scalar Subtraction - *@param[in] *pSrc :points to input vector - *@param[out] *pDst : points to output vector - *@param[in] scale : is constant value that need to be subtracted from each elements of vector array. - *@param[in] length :is size of the input array - *@return none - */ -void rsi_fim_scalar_sub_f32(int32_t *pSrc, - int32_t scale, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, 0); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = scale; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((SUB_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ - -/** - *@fn void rsi_fim_scalar_sub_q7(q7_t *pSrc, q7_t scale, q7_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) - *@brief This API is used to set the FIM Scalar Subtraction - *@param[in] *pSrc :points to input vector - *@param[out] *pDst : points to output vector - *@param[in] scale : is constant value that need to be subtracted from each elements of vector array. - *@param[in] length :is size of the input array - *@return none - */ - -void rsi_fim_scalar_sub_q7(q7_t *pSrc, q7_t scale, q7_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, 0); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = scale; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((SUB_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_fim_scalar_sub_q31(q31_t *pSrc, - * q31_t scale, - * q31_t *pDst, - * uint32_t blockSize, - * uint16_t inBank, - * uint16_t outBank) - *@brief This API is used to set the FIM Scalar Subtraction - *@param[in] *pSrc :points to input vector - *@param[out] *pDst : points to output vector - *@param[in] scale : is constant value that need to be subtracted from each elements of vector array. - *@param[in] length :is size of the input array - *@return none - */ -void rsi_fim_scalar_sub_q31(q31_t *pSrc, - q31_t scale, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, 0); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = scale; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((SUB_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_scale_f32_opt(int32_t *pSrc, - * int32_t scale, - * int32_t *pDst, - * uint32_t blockSize, - * uint16_t inBank, - * uint16_t outBank) - *@brief This API is used to set the FIM Scalar Multiplication for real data - *@param[in] *pSrc : points to input vector - *@param[out] *pDst : points to output vector - *@param[in] scale : is constant value that need to be multiplied for each elements of vector array. - *@param[in] length : is size of the input array - *@return none - * - */ -void rsi_arm_scale_f32_opt(int32_t *pSrc, - int32_t scale, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, 0); - RSI_FIM_SetSatTruncRound(STRS(0x9, 0, 0, 0)); - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = scale; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_scale_q7_opt(q7_t *pSrc, - * q7_t scaleFract, - * int8_t shift, - * q7_t *pDst, - * uint32_t blockSize, - * uint16_t inBank, - * uint16_t outBank) - *@brief This API is used to set the FIM Scalar Multiplication - *@param[in] pSrc : is input vector A - *@param[in] scale : is constant value that need to be multiplied for each elements of vector array. - *@param[in] blockSize : is size of the input array - *@param[in] typ_data : is to select which type of data is given as input - * \n i.e. real complex , complex real and complex complex - * \n real complex real vector, complex scalar - * \n complex real real scalar, complex vector - *@return none - */ -void rsi_arm_scale_q7_opt(q7_t *pSrc, - q7_t scaleFract, - int8_t shift, - q7_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, 0); - RSI_FIM_SetSatTruncRound(shift + 0x19); - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = scaleFract; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_scale_q15_opt(q15_t *pSrc, - * q15_t scaleFract, - * int8_t shift, - * q15_t *pDst, - * uint32_t blockSize, - * uint16_t inBank, - * uint16_t outBank) - *@brief This API is used to set the FIM Scalar Multiplication - *@param[in] pSrc : is input vector A - *@param[in] scale : is constant value that need to be multiplied for each elements of vector array. - *@param[in] blockSize : is size of the input array - *@param[in] typ_data : is to select which type of data is given as input - * \n i.e. real complex , complex real and complex complex - * \n real complex real vector, complex scalar - * \n complex real real scalar, complex vector - *@return none - */ -void rsi_arm_scale_q15_opt(q15_t *pSrc, - q15_t scaleFract, - int8_t shift, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, 0); - RSI_FIM_SetSatTruncRound(shift + 0x11); - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = scaleFract; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_scale_q31_opt(q31_t *pSrc, - * q31_t scaleFract, - * int8_t shift, - * q31_t *pDst, - * uint32_t blockSize, - * uint16_t inBank, - * uint16_t outBank) - *@brief This API is used to set the FIM Scalar Multiplication - *@param[in] pSrc : is input vector A - *@param[in] scale : is constant value that need to be multiplied for each elements of vector array. - *@param[in] blockSize : is size of the input array - *@param[in] typ_data : is to select which type of data is given as input - * \n i.e. real complex , complex real and complex complex - * \n real complex real vector, complex scalar - * \n complex real real scalar, complex vector - *@return none - */ - -void rsi_arm_scale_q31_opt(q31_t *pSrc, - q31_t scaleFract, - int8_t shift, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, 0); - RSI_FIM_SetSatTruncRound(shift + 0x1); - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = scaleFract; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_fim_scalar_mul_q15(q15_t *pSrc, - * q15_t *scale, - * q15_t *pDst, - * uint32_t blockSize, - * typ_data_t typ_data, - * uint16_t inBank, - * uint16_t outBank) - *@brief This API is used to set the FIM Scalar Multiplication - *@param[in] pSrc : is input vector A - *@param[in] scale : is constant value that need to be multiplied for each elements of vector array. - *@param[in] blockSize : is size of the input array - *@param[in] typ_data : is to select which type of data is given as input - * \n i.e. real complex , complex real and complex complex - * \n real complex real vector, complex scalar - * \n complex real real scalar, complex vector - *@return none - */ -void rsi_fim_scalar_mul_q15(q15_t *pSrc, - q15_t *scale, - q15_t *pDst, - uint32_t blockSize, - typ_data_t typ_data, - uint16_t inBank, - uint16_t outBank) -{ - uint32_t i; - q15_t scalarReal; - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize / 2, 0); - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); - - switch (typ_data) { - case ULP_FIM_COP_DATA_CPLX_REAL: - for (i = 0; i < blockSize / 2; i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputDataCmplx(pSrc, ULPSS_RAM_ADDR_SRC, i * 2, 1); -#endif -#else - // For 9116 - RSI_FIM_InputDataCmplx(pSrc, inBank, i * 2, 1); -#endif - pSrc++; - pSrc++; - } - scalarReal = *scale; - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = (scalarReal << 16) | 0x0000; - break; - - case ULP_FIM_COP_DATA_REAL_CPLX: - for (i = 0; i < blockSize / 2; i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pSrc, ULPSS_RAM_ADDR_SRC, i * 2, 1); -#endif -#else - RSI_FIM_InputDataCmplx(pSrc, inBank, i * 2, 0); -#endif - pSrc++; - } - scalarReal = *scale; - scale++; - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = (scalarReal << 16) | *scale; - break; - - case ULP_FIM_COP_DATA_CPLX_CPLX: - for (i = 0; i < blockSize / 2; i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pSrc, ULPSS_RAM_ADDR_SRC, i * 2, 1); -#endif -#else - RSI_FIM_InputDataCmplx(pSrc, inBank, i * 2, 1); -#endif - pSrc++; - pSrc++; - } - scalarReal = *scale; - scale++; - FIM->FIM_SCALAR_POLE_DATA1_b.SCALAR_POLE_DATA1 = (scalarReal << 16) | *scale; - - break; - - default: - break; - } -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_SCALAR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, typ_data); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_add_f32_opt(int32_t *pSrcA, - * int32_t *pSrcB, - * int32_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Addition for real data - *@param[in] pSrcA : points to input vector A - *@param[in] pSrcB : points to input vector B - *@param[out] pDst : points to output vector - *@param[in] blockSize : is size of the input array - *@return none - */ -void rsi_arm_add_f32_opt(int32_t *pSrcA, - int32_t *pSrcB, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrcA, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_F32); - RSI_FIM_InputData(pSrcB, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrcA, inBank1, blockSize, FORMAT_F32); - RSI_FIM_InputData(pSrcB, inBank2, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((ADD_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_add_q7_opt(q7_t *pSrcA, - * q7_t *pSrcB, - * q7_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Addition for real data - *@param[in] pSrcA : points to input vector A - *@param[in] pSrcB : points to input vector B - *@param[out] pDst : points to output vector - *@param[in] blockSize : is size of the input array - *@return none - */ -void rsi_arm_add_q7_opt(q7_t *pSrcA, - q7_t *pSrcB, - q7_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrcA, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q7); - RSI_FIM_InputData(pSrcB, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrcA, inBank1, blockSize, FORMAT_Q7); - RSI_FIM_InputData(pSrcB, inBank2, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((ADD_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_add_q15_opt(q15_t *pSrcA, - * q15_t *pSrcB, - * q15_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Addition for real data - *@param[in] pSrcA : points to input vector A - *@param[in] pSrcB : points to input vector B - *@param[out] pDst : points to output vector - *@param[in] blockSize : is size of the input array - *@return none - */ -void rsi_arm_add_q15_opt(q15_t *pSrcA, - q15_t *pSrcB, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrcA, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q15); - RSI_FIM_InputData(pSrcB, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrcA, inBank1, blockSize, FORMAT_Q15); - RSI_FIM_InputData(pSrcB, inBank2, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((ADD_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_add_q31_opt(q31_t *pSrcA, - * q31_t *pSrcB, - * q31_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Addition for real data - *@param[in] pSrcA : points to input vector A - *@param[in] pSrcB : points to input vector B - *@param[out] pDst : points to output vector - *@param[in] blockSize : is size of the input array - *@return none - */ -void rsi_arm_add_q31_opt(q31_t *pSrcA, - q31_t *pSrcB, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrcA, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q31); - RSI_FIM_InputData(pSrcB, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrcA, inBank1, blockSize, FORMAT_Q31); - RSI_FIM_InputData(pSrcB, inBank2, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((ADD_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_fim_vector_add_q15(q15_t *pIn1, - * q15_t *pIn2, - * q15_t *pDst, - * uint32_t blockSize, - * typ_data_t typ_data, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Addition - *@param[in] pIn1 : points to input vector A - *@param[in] pIn2 : points to input vector B - *@param[in] blockSize : is size of the input array - *@param[out] pDst : points to output vector - *@param[in] typ_data : is to select which type of data is given as input - * \n i.e. real complex , complex real and complex complex - * \n real complex 1st vector is real vector i.e pIn1, 2nd vector is complex i.e pIn2 - * \n complex real 1st vector is complex vector i.e pIn1, 2nd vector is real i.e pIn2 - *@return none - */ -void rsi_fim_vector_add_q15(q15_t *pIn1, - q15_t *pIn2, - q15_t *pDst, - uint32_t blockSize, - typ_data_t typ_data, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - uint32_t i; - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize / 2, blockSize / 2); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); - - switch (typ_data) { - case ULP_FIM_COP_DATA_CPLX_REAL: - for (i = 0; i < blockSize / 2; i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn2, ULPSS_RAM_ADDR_SRC2, i * 2, 0); -#endif -#else - RSI_FIM_InputDataCmplx(pIn2, inBank2, i * 2, 0); -#endif - pIn2++; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn1, ULPSS_RAM_ADDR_SRC1, i * 2, 1); -#endif -#else - RSI_FIM_InputDataCmplx(pIn1, inBank1, i * 2, 1); -#endif - pIn1++; - pIn1++; - } - break; - - case ULP_FIM_COP_DATA_REAL_CPLX: - for (i = 0; i < blockSize / 2; i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn1, ULPSS_RAM_ADDR_SRC1, i * 2, 0); -#endif -#else - RSI_FIM_InputDataCmplx(pIn1, inBank1, i * 2, 0); -#endif - pIn1++; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn2, ULPSS_RAM_ADDR_SRC2, i * 2, 1); -#endif -#else - RSI_FIM_InputDataCmplx(pIn2, inBank2, i * 2, 1); -#endif - pIn2++; - pIn2++; - } - break; - - case ULP_FIM_COP_DATA_CPLX_CPLX: - for (i = 0; i < blockSize / 2; i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn1, ULPSS_RAM_ADDR_SRC1, i * 2, 1); -#endif -#else - RSI_FIM_InputDataCmplx(pIn1, inBank1, i * 2, 1); -#endif - pIn1++; - pIn1++; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn1, ULPSS_RAM_ADDR_SRC2, i * 2, 1); -#endif -#else - RSI_FIM_InputDataCmplx(pIn2, inBank2, i * 2, 1); -#endif - pIn2++; - pIn2++; - } - - break; - - default: - break; - } -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pIn1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pIn2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((ADD_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, typ_data); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_sub_f32_opt(int32_t *pSrcA, - * int32_t *pSrcB, - * int32_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Subtraction for real data - *@param[in] pSrcA : points to input vector A - *@param[in] pSrcB : points to input vector B - *@param[out] pDst : points to output vector - *@param[in] blockSize : is size of the input array - *@return none - * - */ -void rsi_arm_sub_f32_opt(int32_t *pSrcA, - int32_t *pSrcB, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrcA, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_F32); - RSI_FIM_InputData(pSrcB, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrcA, inBank1, blockSize, FORMAT_F32); - RSI_FIM_InputData(pSrcB, inBank2, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((SUB_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_sub_q7_opt(q7_t *pSrcA, - * q7_t *pSrcB, - * q7_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Subtraction for real data - *@param[in] pSrcA : points to input vector A - *@param[in] pSrcB : points to input vector B - *@param[out] pDst : points to output vector - *@param[in] blockSize : is size of the input array - *@return none - */ -void rsi_arm_sub_q7_opt(q7_t *pSrcA, - q7_t *pSrcB, - q7_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrcA, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q7); - RSI_FIM_InputData(pSrcB, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrcA, inBank1, blockSize, FORMAT_Q7); - RSI_FIM_InputData(pSrcB, inBank2, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((SUB_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_sub_q15_opt(q15_t *pSrcA, - * q15_t *pSrcB, - * q15_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Subtraction for real data - *@param[in] pSrcA : points to input vector A - *@param[in] pSrcB : points to input vector B - *@param[out] pDst : points to output vector - *@param[in] blockSize : is size of the input array - *@return none - * - */ -void rsi_arm_sub_q15_opt(q15_t *pSrcA, - q15_t *pSrcB, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrcA, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q15); - RSI_FIM_InputData(pSrcB, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrcA, inBank1, blockSize, FORMAT_Q15); - RSI_FIM_InputData(pSrcB, inBank2, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((SUB_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_sub_q31_opt(q31_t *pSrcA, - * q31_t *pSrcB, - * q31_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Subtraction for real data - *@param[in] pSrcA : points to input vector A - *@param[in] pSrcB : points to input vector B - *@param[out] pDst : points to output vector - *@param[in] blockSize : is size of the input array - *@return none - */ -void rsi_arm_sub_q31_opt(q31_t *pSrcA, - q31_t *pSrcB, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrcA, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q31); - RSI_FIM_InputData(pSrcB, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrcA, inBank1, blockSize, FORMAT_Q31); - RSI_FIM_InputData(pSrcB, inBank2, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((SUB_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_fim_vector_sub_q15(q15_t *pIn1, - * q15_t *pIn2, - * q15_t *pDst, - * uint32_t blockSize, - * typ_data_t typ_data, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Subtraction - *@param[in] pIn1 : is input vector A - *@param[in] pIn2 : is input vector B - *@param[out] pDst : is required output array - *@param[in] typ_data : is to specify real-complex , complex-real or complex-complex data - *@param[in] blockSize : is size of the input array - *@return none - */ -void rsi_fim_vector_sub_q15(q15_t *pIn1, - q15_t *pIn2, - q15_t *pDst, - uint32_t blockSize, - typ_data_t typ_data, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - uint32_t i; - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize / 2, blockSize / 2); - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); - - switch (typ_data) { - case ULP_FIM_COP_DATA_CPLX_REAL: - - for (i = 0; i < (blockSize / 2); i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn2, ULPSS_RAM_ADDR_SRC2, i * 2, 0); -#endif -#else - RSI_FIM_InputDataCmplx(pIn2, inBank2, i * 2, 0); -#endif - pIn2++; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn1, ULPSS_RAM_ADDR_SRC1, i * 2, 1); -#endif -#else - RSI_FIM_InputDataCmplx(pIn1, inBank1, i * 2, 1); -#endif - pIn1++; - pIn1++; - } - break; - - case ULP_FIM_COP_DATA_REAL_CPLX: - for (i = 0; i < (blockSize / 2); i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn1, ULPSS_RAM_ADDR_SRC1, i * 2, 0); -#endif -#else - RSI_FIM_InputDataCmplx(pIn1, inBank1, i * 2, 0); -#endif - pIn1++; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn2, ULPSS_RAM_ADDR_SRC2, i * 2, 1); -#endif -#else - RSI_FIM_InputDataCmplx(pIn2, inBank2, i * 2, 1); -#endif - pIn2++; - pIn2++; - } - break; - - case ULP_FIM_COP_DATA_CPLX_CPLX: - for (i = 0; i < blockSize / 2; i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn1, ULPSS_RAM_ADDR_SRC1, i * 2, 1); -#endif -#else - RSI_FIM_InputDataCmplx(pIn1, inBank1, i * 2, 1); -#endif - pIn1++; - pIn1++; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn2, ULPSS_RAM_ADDR_SRC2, i * 2, 1); -#endif - RSI_FIM_InputDataCmplx(pIn2, inBank2, i * 2, 1); -#endif - pIn2++; - pIn2++; - } - - break; - - default: - break; - } -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pIn1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pIn2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((SUB_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, typ_data); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_mult_f32_opt(int32_t *pIn1, - * int32_t *pIn2, - * int32_t *pDst, - * uint32_t SatTruncRound, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Multiplication for real data - *@param[in] pIn1 : is input vector A - *@param[in] pIn2 : is input vector B - *@param[in] length : is size of the input array - *@param[in] SatTruncRound : is used to limit the output as required - *@return none - */ -void rsi_arm_mult_f32_opt(int32_t *pIn1, - int32_t *pIn2, - int32_t *pDst, - uint32_t SatTruncRound, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(SatTruncRound); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pIn1, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_F32); - RSI_FIM_InputData(pIn2, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pIn1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pIn2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pIn1, inBank1, blockSize, FORMAT_F32); - RSI_FIM_InputData(pIn2, inBank2, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_mult_q7_opt(q7_t *pSrcA, - * q7_t *pSrcB, - * q7_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used for Q7 vector multiplication - *@param[in] *pSrcA : points to the first input vector - *@param[in] *pSrcB : points to the second input vector - *@param[out] *pDst : points to the output vector - *@param[in] blockSize : number of samples in each vector - *@return none - */ -void rsi_arm_mult_q7_opt(q7_t *pSrcA, - q7_t *pSrcB, - q7_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x19, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrcA, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q7); - RSI_FIM_InputData(pSrcB, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrcA, inBank1, blockSize, FORMAT_Q7); - RSI_FIM_InputData(pSrcB, inBank2, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_mult_q15_opt(q15_t *pSrcA, - * q15_t *pSrcB, - * q15_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used for Q15 vector multiplication - *@param[in] *pSrcA : points to the first input vector - *@param[in] *pSrcB : points to the second input vector - *@param[out] *pDst : points to the output vector - *@param[in] blockSize : number of samples in each vector - *@return none - */ - -void rsi_arm_mult_q15_opt(q15_t *pSrcA, - q15_t *pSrcB, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrcA, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q15); - RSI_FIM_InputData(pSrcB, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrcA, inBank1, blockSize, FORMAT_Q15); - RSI_FIM_InputData(pSrcB, inBank2, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_mult_q31_opt(q31_t *pSrcA, - * q31_t *pSrcB, - * q31_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used for Vector Multiplication for complex-real data - *@param[in] pIn1 : is input vector A - *@param[in] pIn2 : is input vector B - *@param[out] *pDst : points to the output vector - *@param[in] blockSize : is size of the input array - *@return none - */ -void rsi_arm_mult_q31_opt(q31_t *pSrcA, - q31_t *pSrcB, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x1, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrcA, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q31); - RSI_FIM_InputData(pSrcB, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrcA, inBank1, blockSize, FORMAT_Q31); - RSI_FIM_InputData(pSrcB, inBank2, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_cmplx_mult_real_q15_opt(q15_t *pSrcCmplx, - * q15_t *pSrcReal, - * q15_t *pDst, - * uint32_t numSamples, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Multiplication for complex-real data - *@param[in] pSrcCmplx : is input vector A - *@param[in] pSrcReal : is input vector B - *@param *pDst : points to the real output vector - *@param numSamples : number of complex samples in the input vector - *@return none - */ -void rsi_fim_vector_mul_q15(q15_t *pIn1, - q15_t *pIn2, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - uint32_t i; - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize / 2, blockSize / 2); - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); - for (i = 0; i < (blockSize / 2); i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn2, ULPSS_RAM_ADDR_SRC2, i * 2, 1); -#endif -#else - RSI_FIM_InputDataCmplx(pIn2, inBank2, i * 2, 1); -#endif - pIn2++; - pIn2++; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pIn1, ULPSS_RAM_ADDR_SRC1, i * 2, 0); -#endif -#else - RSI_FIM_InputDataCmplx(pIn1, inBank1, i * 2, 0); -#endif - pIn1++; - } -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pIn2; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pIn2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_CPLX); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_cmplx_mult_real_q15_opt(q15_t *pSrcCmplx, - * q15_t *pSrcReal, - * q15_t *pDst, - * uint32_t numSamples, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Vector Multiplication for complex-real data - *@param[in] pSrcCmplx : is input vector A - *@param[in] pSrcReal : is input vector B - *@param *pDst : points to the real output vector - *@param numSamples : number of complex samples in the input vector - *@return none - */ - -void rsi_arm_cmplx_mult_real_q15_opt(q15_t *pSrcCmplx, - q15_t *pSrcReal, - q15_t *pDst, - uint32_t numSamples, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - uint32_t i; - RSI_FIM_SetDataLen(NOT_MATRIX, numSamples / 2, numSamples / 2); - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); - for (i = 0; i < (numSamples / 2); i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pSrcCmplx, ULPSS_RAM_ADDR_SRC1, i * 2, 1); -#endif -#else - RSI_FIM_InputDataCmplx(pSrcCmplx, inBank1, i * 2, 1); -#endif - pSrcCmplx++; - pSrcCmplx++; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pSrcReal, ULPSS_RAM_ADDR_SRC2, i * 2, 0); -#endif -#else - RSI_FIM_InputDataCmplx(pSrcReal, inBank2, i * 2, 0); -#endif - pSrcReal++; - } -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcCmplx; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcReal; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_CPLX_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_cmplx_mult_cmplx_q15_opt(q15_t *pSrcA, - * q15_t *pSrcB, - * q15_t *pDst, - * uint32_t numSamples, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used for Q15 complex-by-complex multiplication - *@param[in] *pSrcA : points to the first input vector - *@param[in] *pSrcB : points to the second input vector - *@param[out] *pDst : points to the output vector - *@param[in] numSamples : number of complex samples in each vector - *@return none - */ -void rsi_arm_cmplx_mult_cmplx_q15_opt(q15_t *pSrcA, - q15_t *pSrcB, - q15_t *pDst, - uint32_t numSamples, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - uint32_t i; - RSI_FIM_SetDataLen(NOT_MATRIX, numSamples / 2, numSamples / 2); - RSI_FIM_SetSatTruncRound(STRS(0x10, 0, 0, 1)); - for (i = 0; i < (numSamples / 2); i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pSrcA, ULPSS_RAM_ADDR_SRC1, i * 2, ULP_FIM_COP_DATA_CPLX_CPLX); -#endif -#else - RSI_FIM_InputDataCmplx(pSrcA, inBank1, i * 2, ULP_FIM_COP_DATA_CPLX_CPLX); -#endif - pSrcA++; - pSrcA++; -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pSrcB, ULPSS_RAM_ADDR_SRC2, i * 2, ULP_FIM_COP_DATA_CPLX_CPLX); -#endif -#else - RSI_FIM_InputDataCmplx(pSrcB, inBank2, i * 2, ULP_FIM_COP_DATA_CPLX_CPLX); -#endif - pSrcB++; - pSrcB++; - } -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_VECTOR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_CPLX_CPLX); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_cmplx_mag_squared_q15_opt(q15_t *pSrc, q15_t *pDst, uint32_t numSamples, uint16_t inBank, uint16_t outBank) - *@brief This API is used to set the FIM Absolute Squaring for real number - *@param[in] pSrc : is input for squaring a number - *@param[in] length : is size of the input array - *@return none - */ - -void rsi_arm_cmplx_mag_squared_q15_opt(q15_t *pSrc, q15_t *pDst, uint32_t numSamples, uint16_t inBank, uint16_t outBank) -{ - uint32_t i; - RSI_FIM_SetDataLen(NOT_MATRIX, numSamples / 2, numSamples / 2); - RSI_FIM_SetSatTruncRound(STRS(0x10, 0, 0, 1)); - for (i = 0; i < (numSamples / 2); i++) { -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputDataCmplx(pSrc, ULPSS_RAM_ADDR_SRC, i * 2, ULP_FIM_COP_DATA_CPLX_CPLX); -#endif -#else - RSI_FIM_InputDataCmplx(pSrc, inBank, i * 2, ULP_FIM_COP_DATA_CPLX_CPLX); -#endif - pSrc++; - pSrc++; - } -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((NORM_SQUARE << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_CPLX_CPLX); -} - -/*==============================================*/ -/** - *@fn void rsi_fim_absSqr_q7(q7_t *pSrc, q7_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) - *@brief This API is used to set the FIM Absolute Squaring for real number - *@param[in] pSrc : is input for squaring a number - *@param[in] length : is size of the input array - *@return none - */ - -void rsi_fim_absSqr_q7(q7_t *pSrc, q7_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x19, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_Q7); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((NORM_SQUARE << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_fim_absSqr_q15(q15_t *pSrc, q15_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) - *@brief This API is used to set the FIM Absolute Squaring for real number - *@param[in] pSrc : is input for squaring a number - *@param[in] length : is size of the input array - *@return none - */ -void rsi_fim_absSqr_q15(q15_t *pSrc, q15_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((NORM_SQUARE << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_fim_absSqr_q31(q31_t *pSrc, q31_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) - *@brief This API is used to set the FIM Absolute Squaring for real number - *@param[in] pSrc : is input for squaring a number - *@param[in] length : is size of the input array - *@return none - */ -void rsi_fim_absSqr_q31(q31_t *pSrc, q31_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x1, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((NORM_SQUARE << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_fim_absSqr_f32(int32_t *pSrc, int32_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) - *@brief This API is used to set the FIM Absolute Squaring for real number - *@param[in] pSrc : is input for squaring a number - *@param[in] length : is size of the input array - *@return none - */ -void rsi_fim_absSqr_f32(int32_t *pSrc, int32_t *pDst, uint32_t blockSize, uint16_t inBank, uint16_t outBank) -{ - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, blockSize); - RSI_FIM_SetSatTruncRound(STRS(0x9, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank, blockSize, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((NORM_SQUARE << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn rsi_error_t rsi_arm_mat_mult_q31_opt(const arm_matrix_instance_q31_opt *pSrcA, - * const arm_matrix_instance_q31_opt *pSrcB, - * arm_matrix_instance_q31_opt *pDst, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Matrix Multiplication for real numbers - *@param[in] *pSrcA : points to the first input matrix structure - *@param[in] *pSrcB : points to the second input matrix structure - *@param[out] *pDst : points to output matrix structure - *@return none - */ - -rsi_error_t rsi_arm_mat_mult_f32_opt(const arm_matrix_instance_f32_opt *pSrcA, - const arm_matrix_instance_f32_opt *pSrcB, - arm_matrix_instance_f32_opt *pDst, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - // Number of rows of input matrix A - uint16_t numRowsA = pSrcA->nRows; - // Number of columns of input matrix B - uint16_t numColsB = pSrcB->nColumns; - // Number of columns of input matrix A - uint16_t numColsA = pSrcA->nColumns; - if ((pSrcA != NULL) && (pSrcB != NULL)) { - if (pSrcA->nColumns == pSrcB->nRows) { - RSI_FIM_SetDataLen(numColsA, 0, 0); - RSI_FIM_SetSatTruncRound(STRS(0x9, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData((pSrcA->pData), ULPSS_RAM_ADDR_SRC1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_Q31); - RSI_FIM_InputData((pSrcB->pData), ULPSS_RAM_ADDR_SRC2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ((uint32_t)pSrcA->pData); - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ((uint32_t)pSrcB->pData); - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ((uint32_t)pDst->pData); -#endif -#else - // For 9116 - RSI_FIM_InputData((pSrcA->pData), inBank1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_F32); - RSI_FIM_InputData((pSrcB->pData), inBank2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_MAT << 1) | 1); - RSI_FIM_DatTypTrig(numRowsA, numColsB, ULP_FIM_COP_DATA_REAL_REAL); - } else { - return ERROR_FIM_MATRIX_INVALID_ARG; - } - } - return RSI_OK; -} - -/*==============================================*/ -/** - *@fn rsi_error_t rsi_arm_mat_mult_q31_opt(const arm_matrix_instance_q31_opt *pSrcA, - * const arm_matrix_instance_q31_opt *pSrcB, - * arm_matrix_instance_q31_opt *pDst, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Matrix Multiplication for real numbers - *@param[in] *pSrcA : points to the first input matrix structure - *@param[in] *pSrcB : points to the second input matrix structure - *@param[out] *pDst : points to output matrix structure - *@return none - */ -rsi_error_t rsi_arm_mat_mult_q31_opt(const arm_matrix_instance_q31_opt *pSrcA, - const arm_matrix_instance_q31_opt *pSrcB, - arm_matrix_instance_q31_opt *pDst, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - // Number of rows of input matrix A - uint16_t numRowsA = pSrcA->nRows; - // Number of columns of input matrix B - uint16_t numColsB = pSrcB->nColumns; - // Number of columns of input matrix A - uint16_t numColsA = pSrcA->nColumns; - if ((pSrcA != NULL) && (pSrcB != NULL)) { - if (pSrcA->nColumns == pSrcB->nRows) { - RSI_FIM_SetDataLen(numColsA, 0, 0); - RSI_FIM_SetSatTruncRound(STRS(0x1, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData((pSrcA->pData), ULPSS_RAM_ADDR_SRC1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_Q31); - RSI_FIM_InputData((pSrcB->pData), ULPSS_RAM_ADDR_SRC2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ((uint32_t)pSrcA->pData); - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ((uint32_t)pSrcB->pData); - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ((uint32_t)pDst->pData); -#endif -#else - // For 9116 - RSI_FIM_InputData((pSrcA->pData), inBank1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_Q31); - RSI_FIM_InputData((pSrcB->pData), inBank2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((MUL_MAT << 1) | 1); - RSI_FIM_DatTypTrig(numRowsA, numColsB, ULP_FIM_COP_DATA_REAL_REAL); - } else { - return ERROR_FIM_MATRIX_INVALID_ARG; - } - } - return RSI_OK; -} - -/*==============================================*/ -/** - *@fn rsi_error_t rsi_arm_mat_mult_q15_opt(const arm_matrix_instance_q15_opt *pSrcA, - * const arm_matrix_instance_q15_opt *pSrcB, - * arm_matrix_instance_q15_opt *pDst, - * q15_t *pState, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM Matrix Multiplication for real numbers - *@param[in] *pSrcA : points to the first input matrix structure - *@param[in] *pSrcB : points to the second input matrix structure - *@param[out] *pDst : points to output matrix structure - *@param[in] *pState : points to the array for storing intermediate results (Unused) - *@return none - */ -rsi_error_t rsi_arm_mat_mult_q15_opt(const arm_matrix_instance_q15_opt *pSrcA, - const arm_matrix_instance_q15_opt *pSrcB, - arm_matrix_instance_q15_opt *pDst, - q15_t *pState, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - // Number of rows of input matrix A - uint16_t numRowsA = pSrcA->nRows; - // Number of columns of input matrix B - uint16_t numColsB = pSrcB->nColumns; - // Number of columns of input matrix A - uint16_t numColsA = pSrcA->nColumns; - if ((pSrcA != NULL) && (pSrcB != NULL)) { - if (pSrcA->nColumns == pSrcB->nRows) { - RSI_FIM_SetDataLen(numColsA, 0, 0); - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData((pSrcA->pData), ULPSS_RAM_ADDR_SRC1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_Q15); - RSI_FIM_InputData((pSrcB->pData), ULPSS_RAM_ADDR_SRC2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ((uint32_t)pSrcA->pData); - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ((uint32_t)pSrcB->pData); - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ((uint32_t)pDst->pData); -#endif -#else - // For 9116 - RSI_FIM_InputData((pSrcA->pData), inBank1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_Q15); - RSI_FIM_InputData((pSrcB->pData), inBank2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - - FIM->FIM_MODE_INTERRUPT = ((MUL_MAT << 1) | 1); - RSI_FIM_DatTypTrig(numRowsA, numColsB, ULP_FIM_COP_DATA_REAL_REAL); - } else { - return ERROR_FIM_MATRIX_INVALID_ARG; - } - } - return RSI_OK; -} - -/*==============================================*/ -/** - *@fn void rsi_arm_fir_init_f32_opt(arm_fir_instance_f32_opt *S, - * uint16_t numTaps, - * int32_t *pCoeffs, - * int32_t *pState, - * uint32_t blockSize) - *@brief This API is used to initialize the FIM filters - *@param[in,out] *S : points to an instance of the floating-point FIR filter structure. - *@param[in] numTaps : Number of filter coefficients in the filter. - *@param[in] *pCoeffs : points to the filter coefficients buffer. - *@param[in] *pState : points to the state buffer. - *@param[in] blockSize : number of samples that are processed per call. - *@return none - */ -void rsi_arm_fir_init_f32_opt(arm_fir_instance_f32_opt *S, - uint16_t numTaps, - int32_t *pCoeffs, - int32_t *pState, - uint32_t blockSize) -{ - // Assign filter taps - S->numTaps = numTaps; - - // Assign coefficient pointer - S->pCoeffs = pCoeffs; - // Assign state pointer - S->pState = pState; -} - -/*==============================================*/ -/** - *@fn void rsi_arm_fir_f32_opt(arm_fir_instance_f32_opt *S, - * int32_t *pSrc, - * int32_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM FIR Filter - *@param[in] *S : points to an instance of the floating-point FIR filter structure. - *@param[in] *pSrc : points to the block of input data. - *@param[out] *pDst : points to the block of output data. - *@param[in] blockSize : number of samples to process per call. - *@return none - */ -void rsi_arm_fir_f32_opt(arm_fir_instance_f32_opt *S, - int32_t *pSrc, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - if (S->numTaps > blockSize) { - RSI_FIM_SetDataLen(blockSize, blockSize, (S->numTaps)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_F32); - RSI_FIM_InputData(S->pCoeffs, ULPSS_RAM_ADDR_SRC2, S->numTaps, FORMAT_F32); -#endif -#else - RSI_FIM_InputData(pSrc, inBank1, blockSize, FORMAT_F32); - RSI_FIM_InputData(S->pCoeffs, inBank2, S->numTaps, FORMAT_F32); -#endif - } else { - RSI_FIM_SetDataLen((S->numTaps), (S->numTaps), blockSize); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_F32); - RSI_FIM_InputData(S->pCoeffs, ULPSS_RAM_ADDR_SRC1, S->numTaps, FORMAT_F32); -#endif -#else - RSI_FIM_InputData(pSrc, inBank2, blockSize, FORMAT_F32); - RSI_FIM_InputData(S->pCoeffs, inBank1, S->numTaps, FORMAT_F32); -#endif - } - RSI_FIM_SetSatTruncRound(STRS(0x9, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)S->pCoeffs; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((FIR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_fir_init_q31_opt(arm_fir_instance_q31_opt *S, - * uint16_t numTaps, - * q31_t *pCoeffs, - * q31_t *pState, - * uint32_t blockSize) - *@brief This API is used to initialize the FIM filters - *@param[in,out] *S : points to an instance of the Q31 FIR filter structure. - *@param[in] numTaps : Number of filter coefficients in the filter. - *@param[in] *pCoeffs : points to the filter coefficients buffer. - *@param[in] *pState : points to the state buffer. - *@param[in] blockSize : number of samples that are processed per call. - *@return none - */ - -void rsi_arm_fir_init_q31_opt(arm_fir_instance_q31_opt *S, - uint16_t numTaps, - q31_t *pCoeffs, - q31_t *pState, - uint32_t blockSize) -{ - // Assign filter taps - S->numTaps = numTaps; - // Assign coefficient pointer - S->pCoeffs = pCoeffs; - // Assign state pointer - S->pState = pState; -} - -/*==============================================*/ -/** - *@fn void rsi_arm_fir_q31_opt(arm_fir_instance_q31_opt *S, - * q31_t *pSrc, - * q31_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM FIR Filter - *@param[in] *S : points to an instance of the Q31 FIR filter structure. - *@param[in] *pSrc : points to the block of input data. - *@param[out] *pDst : points to the block of output data. - *@param[in] blockSize : number of samples to process per call - *@return none - */ -void rsi_arm_fir_q31_opt(arm_fir_instance_q31_opt *S, - q31_t *pSrc, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - if (S->numTaps > blockSize) { - RSI_FIM_SetDataLen(blockSize, blockSize, (S->numTaps)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q31); - RSI_FIM_InputData(S->pCoeffs, ULPSS_RAM_ADDR_SRC2, S->numTaps, FORMAT_Q31); -#endif -#else - RSI_FIM_InputData(pSrc, inBank1, blockSize, FORMAT_Q31); - RSI_FIM_InputData(S->pCoeffs, inBank2, S->numTaps, FORMAT_Q31); -#endif - } else { - RSI_FIM_SetDataLen((S->numTaps), (S->numTaps), blockSize); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q31); - RSI_FIM_InputData(S->pCoeffs, ULPSS_RAM_ADDR_SRC1, S->numTaps, FORMAT_Q31); -#endif -#else - RSI_FIM_InputData(pSrc, inBank2, blockSize, FORMAT_Q31); - RSI_FIM_InputData(S->pCoeffs, inBank1, S->numTaps, FORMAT_Q31); -#endif - } - RSI_FIM_SetSatTruncRound(STRS(0x1, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)S->pCoeffs; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((FIR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *fn void rsi_arm_fir_init_q15_opt(arm_fir_instance_q15_opt *S, - * uint16_t numTaps, - * q15_t *pCoeffs, - * q15_t *pState, - * uint32_t blockSize) - *@brief This API is used to initialise the FIM filters - *@param[in,out] *S : points to an instance of the Q15 FIR filter structure. - *@param[in] numTaps : Number of filter coefficients in the filter. Must be even and greater than or equal to 4. - *@param[in] *pCoeffs : points to the filter coefficients buffer. - *@param[in] *pState : points to the state buffer. - *@param[in] blockSize : is number of samples processed per call. - *@return none - * - */ -void rsi_arm_fir_init_q15_opt(arm_fir_instance_q15_opt *S, - uint16_t numTaps, - q15_t *pCoeffs, - q15_t *pState, - uint32_t blockSize) -{ - // Assign filter taps - S->numTaps = numTaps; - - // Assign coefficient pointer - S->pCoeffs = pCoeffs; - // Assign state pointer - S->pState = pState; -} - -/*==============================================*/ -/** - *@fn void rsi_arm_fir_q15_opt(arm_fir_instance_q15_opt *S, - * q15_t *pSrc, - * q15_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM FIR Filter - *@param[in] *S : points to an instance of the Q15 FIR structure. - *@param[in] *pSrc : points to the block of input data. - *@param[out] *pDst : points to the block of output data. - *@param[in] blockSize : number of samples to process per call. - *@return none - */ - -void rsi_arm_fir_q15_opt(arm_fir_instance_q15_opt *S, - q15_t *pSrc, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - - if (S->numTaps > blockSize) { - RSI_FIM_SetDataLen(blockSize, blockSize, (S->numTaps)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q15); - RSI_FIM_InputData(S->pCoeffs, ULPSS_RAM_ADDR_SRC2, S->numTaps, FORMAT_Q15); -#endif -#else - RSI_FIM_InputData(pSrc, inBank1, blockSize, FORMAT_Q15); - RSI_FIM_InputData(S->pCoeffs, inBank2, S->numTaps, FORMAT_Q15); -#endif - } else { - RSI_FIM_SetDataLen((S->numTaps), (S->numTaps), blockSize); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q15); - RSI_FIM_InputData(S->pCoeffs, ULPSS_RAM_ADDR_SRC1, S->numTaps, FORMAT_Q15); -#endif -#else - RSI_FIM_InputData(pSrc, inBank2, blockSize, FORMAT_Q15); - RSI_FIM_InputData(S->pCoeffs, inBank1, S->numTaps, FORMAT_Q15); -#endif - } - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)S->pCoeffs; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((FIR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_fir_init_q7_opt(arm_fir_instance_q7_opt *S, - * uint16_t numTaps, - * q7_t *pCoeffs, - * q7_t *pState, - * uint32_t blockSize) - *@brief This API is used to initialise the FIM filters - *@param[in,out] *S : points to an instance of the Q7 FIR filter structure. - *@param[in] numTaps : Number of filter coefficients in the filter. - *@param[in] *pCoeffs : points to the filter coefficients buffer. - *@param[in] *pState : points to the state buffer. - *@param[in] blockSize : number of samples that are processed per call. - *@return none - */ -void rsi_arm_fir_init_q7_opt(arm_fir_instance_q7_opt *S, - uint16_t numTaps, - q7_t *pCoeffs, - q7_t *pState, - uint32_t blockSize) -{ - // Assign filter taps - S->numTaps = numTaps; - // Assign coefficient pointer - S->pCoeffs = pCoeffs; - // Assign state pointer - S->pState = pState; -} - -/*==============================================*/ -/** - *@fn void rsi_arm_fir_q7_opt(arm_fir_instance_q7_opt *S, - * q7_t *pSrc, - * q7_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to set the FIM FIR Filter - *@param[in] *S : points to an instance of the Q7 FIR filter structure. - *@param[in] *pSrc : points to the block of input data. - *@param[out] *pDst : points to the block of output data. - *@param[in] blockSize : number of samples to process per call. - *@return none - */ -void rsi_arm_fir_q7_opt(arm_fir_instance_q7_opt *S, - q7_t *pSrc, - q7_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - if (S->numTaps > blockSize) { - RSI_FIM_SetDataLen(blockSize, blockSize, (S->numTaps)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q7); - RSI_FIM_InputData(S->pCoeffs, ULPSS_RAM_ADDR_SRC2, S->numTaps, FORMAT_Q7); -#endif -#else - RSI_FIM_InputData(pSrc, inBank1, blockSize, FORMAT_Q7); - RSI_FIM_InputData(S->pCoeffs, inBank2, S->numTaps, FORMAT_Q7); -#endif - } else { - RSI_FIM_SetDataLen((S->numTaps), (S->numTaps), blockSize); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC2, blockSize, FORMAT_Q7); - RSI_FIM_InputData(S->pCoeffs, ULPSS_RAM_ADDR_SRC1, S->numTaps, FORMAT_Q7); -#endif -#else - RSI_FIM_InputData(pSrc, inBank2, blockSize, FORMAT_Q7); - RSI_FIM_InputData(S->pCoeffs, inBank1, S->numTaps, FORMAT_Q7); -#endif - } - RSI_FIM_SetSatTruncRound(STRS(0x19, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)S->pCoeffs; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((FIR << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn arm_status rsi_arm_fir_interpolate_init_f32_opt(arm_fir_interpolate_instance_f32_opt *S, - * uint8_t L, - * uint16_t numTaps, - * int32_t *pCoeffs, - * int32_t *pState, - * uint32_t blockSize) - *@brief This API is used to initialization function for the floating-point FIR interpolator. - *@param[in,out] *S : points to an instance of the floating-point FIR interpolator structure. - *@param[in] L :upsample factor. - *@param[in] numTaps : number of filter coefficients in the filter. - *@param[in] *pCoeffs : points to the filter coefficient buffer. - *@param[in] *pState : points to the state buffer. - *@param[in] blockSize : number of input samples to process per call. - * - *@return The function returns \ref ARM_MATH_SUCCESS if initialization was successful or \ref ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L. - */ -arm_status rsi_arm_fir_interpolate_init_f32_opt(arm_fir_interpolate_instance_f32_opt *S, - uint8_t L, - uint16_t numTaps, - int32_t *pCoeffs, - int32_t *pState, - uint32_t blockSize) -{ - arm_status status; - - // The filter length must be a multiple of the interpolation factor - if ((numTaps % L) != 0u) { - // Set status as ARM_MATH_LENGTH_ERROR - status = ARM_MATH_LENGTH_ERROR; - } else { - // Assign coefficient pointer - S->pCoeffs = pCoeffs; - // Assign Interpolation factor - S->L = L; - // Assign polyPhaseLength - S->phaseLength = numTaps / L; - // Assign state pointer - S->pState = pState; - status = ARM_MATH_SUCCESS; - } - return (status); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_fir_interpolate_f32_opt(const arm_fir_interpolate_instance_f32_opt *S, - * int32_t *pSrc, - * int32_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used Processing function for the floating-point FIR interpolator. - *@param[in] *S : points to an instance of the floating-point FIR interpolator structure. - *@param[in] *pSrc : points to the block of input data. - *@param[out] *pDst : points to the block of output data. - *@param[in] blockSize : number of input samples to process per call. - *@return none - */ -void rsi_arm_fir_interpolate_f32_opt(const arm_fir_interpolate_instance_f32_opt *S, - int32_t *pSrc, - int32_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - - uint32_t numTaps; - numTaps = (S->phaseLength) * (S->L); - - RSI_FIM_SetDataLen(numTaps, blockSize, numTaps); - RSI_FIM_SetSatTruncRound(STRS(0x9, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_F32); - RSI_FIM_InputData(S->pCoeffs, ULPSS_RAM_ADDR_SRC2, numTaps, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)S->pCoeffs; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank1, blockSize, FORMAT_F32); - RSI_FIM_InputData(S->pCoeffs, inBank2, numTaps, FORMAT_F32); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_CONFIG_REG2 |= (S->L) << 22; - FIM->FIM_MODE_INTERRUPT = ((INTERPOLATE << 1) | 1); - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn arm_status rsi_arm_fir_interpolate_init_q15_opt(arm_fir_interpolate_instance_q15_opt *S, - * uint8_t L, - * uint16_t numTaps, - * q15_t *pCoeffs, - * q15_t *pState, - * uint32_t blockSize) - *@brief This API is used to initialization function for the Q31 FIR interpolator. - *@param[in,out] *S : points to an instance of the Q31 FIR interpolator structure. - *@param[in] L : upsample factor. - *@param[in] numTaps : number of filter coefficients in the filter. - *@param[in] *pCoeffs : points to the filter coefficient buffer. - *@param[in] *pState : points to the state buffer. - *@param[in] blockSize : number of input samples to process per call. - *@return The function returns \ref ARM_MATH_SUCCESS if initialization was successful or \ref ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L. - * - */ -arm_status rsi_arm_fir_interpolate_init_q15_opt(arm_fir_interpolate_instance_q15_opt *S, - uint8_t L, - uint16_t numTaps, - q15_t *pCoeffs, - q15_t *pState, - uint32_t blockSize) -{ - arm_status status; - - // The filter length must be a multiple of the interpolation factor - if ((numTaps % L) != 0u) { - // Set status as ARM_MATH_LENGTH_ERROR - status = ARM_MATH_LENGTH_ERROR; - } else { - // Assign coefficient pointer - S->pCoeffs = pCoeffs; - - // Assign Interpolation factor - S->L = L; - - // Assign polyPhaseLength - S->phaseLength = numTaps / L; - - // Assign state pointer - S->pState = pState; - status = ARM_MATH_SUCCESS; - } - return (status); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_fir_interpolate_q15_opt(arm_fir_interpolate_instance_q15_opt *S, - * q15_t *pSrc, - * q15_t *pDst, - * uint32_t blockSize, - * uint16_t inBank1, - * uint16_t inBank2, - * uint16_t outBank) - *@brief This API is used to Processing function for the Q15 FIR interpolator - *@param[in] *S : points to an instance of the Q15 FIR interpolator structure. - *@param[in] *pSrc : points to the block of input data. - *@param[out] *pDst : points to the block of output data. - *@param[in] blockSize : number of input samples to process per call. - *@return none - */ -void rsi_arm_fir_interpolate_q15_opt(arm_fir_interpolate_instance_q15_opt *S, - q15_t *pSrc, - q15_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - - uint32_t numTaps; - numTaps = (S->phaseLength) * (S->L); - - RSI_FIM_SetDataLen(numTaps, blockSize, numTaps); - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q15); - RSI_FIM_InputData(S->pCoeffs, ULPSS_RAM_ADDR_SRC2, numTaps, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)S->pCoeffs; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank1, blockSize, FORMAT_Q15); - RSI_FIM_InputData(S->pCoeffs, inBank2, numTaps, FORMAT_Q15); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((INTERPOLATE << 1) | 1); - FIM->FIM_CONFIG_REG2 |= (S->L) << 22; - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn arm_status rsi_arm_fir_interpolate_init_q31_opt(arm_fir_interpolate_instance_q31_opt *S, - * uint8_t L, - * uint16_t numTaps, - * q31_t *pCoeffs, - * q31_t *pState, - * uint32_t blockSize) - *@brief This API is used to initialization function for the Q31 FIR interpolator. - *@param[in,out] *S : points to an instance of the Q31 FIR interpolator structure. - *@param[in] L : upsample factor. - *@param[in] numTaps : number of filter coefficients in the filter. - *@param[in] *pCoeffs : points to the filter coefficient buffer. - *@param[in] *pState : points to the state buffer. - *@param[in] blockSize : number of input samples to process per call. - *@return The function returns \ref ARM_MATH_SUCCESS if initialization was successful or \ref ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L. - * - */ -arm_status rsi_arm_fir_interpolate_init_q31_opt(arm_fir_interpolate_instance_q31_opt *S, - uint8_t L, - uint16_t numTaps, - q31_t *pCoeffs, - q31_t *pState, - uint32_t blockSize) -{ - arm_status status; - // The filter length must be a multiple of the interpolation factor - if ((numTaps % L) != 0u) { - // Set status as ARM_MATH_LENGTH_ERROR - status = ARM_MATH_LENGTH_ERROR; - } else { - // Assign coefficient pointer - S->pCoeffs = pCoeffs; - - // Assign Interpolation factor - S->L = L; - - // Assign polyPhaseLength - S->phaseLength = numTaps / L; - - // Assign state pointer - S->pState = pState; - - status = ARM_MATH_SUCCESS; - } - - return (status); -} - -/*==============================================*/ -/** - *@fn rsi_arm_fir_interpolate_q31_opt(const arm_fir_interpolate_instance_q31_opt *S, - q31_t *pSrc, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) - *@brief This API is used for Q31 FIR interpolator. - *@param[in,out] *S : points to an instance of the Q31 FIR interpolator structure. - *@param[in] *pSrc : Source Pointer. - *@param[in] *pDst : Destination pointer - *@param[in] blockSize : number of input samples to process per call - *@param[in] inBank1 - *@param[in] inBank2 - *@param[in] outBank - *@return None - * - */ -void rsi_arm_fir_interpolate_q31_opt(const arm_fir_interpolate_instance_q31_opt *S, - q31_t *pSrc, - q31_t *pDst, - uint32_t blockSize, - uint16_t inBank1, - uint16_t inBank2, - uint16_t outBank) -{ - uint32_t numTaps; - numTaps = (S->phaseLength) * (S->L); - - RSI_FIM_SetDataLen(numTaps, blockSize, numTaps); - RSI_FIM_SetSatTruncRound(STRS(0x1, 0, 0, 0)); -#ifdef ENHANCED_FIM -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q31); - RSI_FIM_InputData(S->pCoeffs, ULPSS_RAM_ADDR_SRC2, numTaps, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)S->pCoeffs; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif -#else - // For 9116 - RSI_FIM_InputData(pSrc, inBank1, blockSize, FORMAT_Q31); - RSI_FIM_InputData(S->pCoeffs, inBank2, numTaps, FORMAT_Q31); - FIM->FIM_INP1_ADDR_b.INP1_ADDR = inBank1; - FIM->FIM_INP2_ADDR_b.INP2_ADDR = inBank2; - FIM->FIM_OUT_ADDR_b.OUT_ADDR = outBank; -#endif - FIM->FIM_MODE_INTERRUPT = ((INTERPOLATE << 1) | 1); - FIM->FIM_CONFIG_REG2 |= (S->L) << 22; - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_fim_interrupt_handler(volatile FIM_Type *ptFim) - *@brief This API Clears interrupt status of fim - *@param[in] ptFim is pointer to the FIM register instance - *@return none - */ -void rsi_fim_interrupt_handler(volatile FIM_Type *ptFim) -{ - ptFim->FIM_MODE_INTERRUPT_b.INTR_CLEAR = 0x1; -} - -#ifdef ENHANCED_FIM - -/*==============================================*/ -/** - * @fn void rsi_arm_correlate_q15(const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst) - * @brief This API is used to set FIM Correlation Operation of Q15 sequence. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @return none. - */ -void rsi_arm_correlate_q15(const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst) -{ - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, srcALen, srcBLen); - // Set saturation,trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x01, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store Input data1 in ulp memories - RSI_FIM_InputData((void *)pSrcA, ULPSS_RAM_ADDR_SRC1, srcALen, FORMAT_Q15); - // Store Input data2 in ulp memories - RSI_FIM_InputData((void *)pSrcB, ULPSS_RAM_ADDR_SRC2, srcBLen, FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif - // Set the Mode of Operation to be performed.Enable latch mode - FIM->FIM_MODE_INTERRUPT = ((CORRELATION << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - * @fn void rsi_arm_correlate_q31(const q31_t *pSrcA, uint32_t srcALen, const q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst) - * @brief This API is used to set FIM Correlation Operation of Q31 sequence. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @return none. - */ -void rsi_arm_correlate_q31(const q31_t *pSrcA, uint32_t srcALen, const q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst) -{ - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, srcALen, srcBLen); - // Set saturation,trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x01, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store Input data1 in ulp memories - RSI_FIM_InputData((void *)pSrcA, ULPSS_RAM_ADDR_SRC1, srcALen, FORMAT_Q31); - // Store Input data1 in ulp memories - RSI_FIM_InputData((void *)pSrcB, ULPSS_RAM_ADDR_SRC2, srcBLen, FORMAT_Q31); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif - // Set the Mode of Operation to be performed.Enable latch mode - FIM->FIM_MODE_INTERRUPT = ((CORRELATION << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - * @fn void rsi_arm_correlate_q7(const q7_t *pSrcA, uint32_t srcALen, const q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst) - * @brief This API is used to set FIM Correlation Operation of Q7 sequence. - * @param[in] *pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] *pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] *pDst points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. - * @return none. - */ -void rsi_arm_correlate_q7(const q7_t *pSrcA, uint32_t srcALen, const q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst) -{ - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, srcALen, srcBLen); - // Set saturation,trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x01, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store Input data1 in ulp memories - RSI_FIM_InputData((void *)pSrcA, ULPSS_RAM_ADDR_SRC1, srcALen, FORMAT_Q7); - // Store Input data2 in ulp memories - RSI_FIM_InputData((void *)pSrcB, ULPSS_RAM_ADDR_SRC2, srcBLen, FORMAT_Q7); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrcA; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)pSrcB; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif - // Set the Mode of Operation to be performed.Enable latch mode - FIM->FIM_MODE_INTERRUPT = ((CORRELATION << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - * @fn arm_status arm_fir_decimate_init_q31(arm_fir_decimate_instance_q31 *S, - * uint16_t numTaps, - * uint8_t M, - * q31_t *pCoeffs, - * q31_t *pState, - * uint32_t blockSize) - * @brief Initialization function for the Q31 FIR decimator. - * @param[in,out] *S points to an instance of the Q31 FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] *pCoeffs points to the filter coefficients. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - */ -arm_status arm_fir_decimate_init_q31(arm_fir_decimate_instance_q31 *S, - uint16_t numTaps, - uint8_t M, - q31_t *pCoeffs, - q31_t *pState, - uint32_t blockSize) -{ - arm_status status; - - // The size of the input block must be a multiple of the decimation factor - if ((blockSize % M) != 0u) { - // Set status as ARM_MATH_LENGTH_ERROR - status = ARM_MATH_LENGTH_ERROR; - } else { - // Assign filter taps - S->numTaps = numTaps; - - // Assign coefficient pointer - S->pCoeffs = pCoeffs; - - // Clear the state buffer. The size is always (blockSize + numTaps - 1) - memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(q31_t)); - - // Assign state pointer - S->pState = pState; - - // Assign Decimation factor - S->M = M; - - status = ARM_MATH_SUCCESS; - } - return (status); -} - -/*==============================================*/ -/** - * @fn arm_status arm_fir_decimate_init_q15(arm_fir_decimate_instance_q15 *S, - * uint16_t numTaps, - * uint8_t M, - * q15_t *pCoeffs, - * q15_t *pState, - * uint32_t blockSize) - * @brief Initialization function for the Q15 FIR decimator. - * @param[in,out] *S points to an instance of the Q15 FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] *pCoeffs points to the filter coefficients. - * @param[in] *pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - */ -arm_status arm_fir_decimate_init_q15(arm_fir_decimate_instance_q15 *S, - uint16_t numTaps, - uint8_t M, - q15_t *pCoeffs, - q15_t *pState, - uint32_t blockSize) -{ - - arm_status status; - - // The size of the input block must be a multiple of the decimation factor - if ((blockSize % M) != 0u) { - // Set status as ARM_MATH_LENGTH_ERROR - status = ARM_MATH_LENGTH_ERROR; - } else { - // Assign filter taps - S->numTaps = numTaps; - - // Assign coefficient pointer - S->pCoeffs = pCoeffs; - - // Clear the state buffer. The size of buffer is always (blockSize + numTaps - 1) - memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t)); - - // Assign state pointer - S->pState = pState; - - // Assign Decimation factor - S->M = M; - - status = ARM_MATH_SUCCESS; - } - return (status); -} - -/*==============================================*/ -/** - * @fn void arm_fir_decimate_q15(const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize) - * @brief Processing function for the Q15 FIR decimator. - * @param[in] *S points to an instance of the Q15 FIR decimator structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the location where the output result is written. - * @param[in] blockSize number of input samples to process per call. - * @return none. - */ -void arm_fir_decimate_q15(const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize) -{ - uint32_t numTaps; - numTaps = (S->numTaps); - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, numTaps); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q15); - RSI_FIM_InputData((void *)S->pCoeffs, ULPSS_RAM_ADDR_SRC2, numTaps, FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - // Start Address of 1st coefficient for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)S->pCoeffs; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((DECIMATION << 1) | 1); - /* Set Decimation Factor */ - FIM->FIM_CONFIG_REG1_b.DECIM_FAC = S->M; - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - * @fn void arm_fir_decimate_q31(const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize) - * @brief Processing function for the Q31 FIR decimator. - * @param[in] *S points to an instance of the Q31 FIR decimator structure. - * @param[in] *pSrc points to the block of input data. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - * @return none - */ -void arm_fir_decimate_q31(const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize) -{ - uint32_t numTaps; - numTaps = (S->numTaps); - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, numTaps); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q31); - /* Store pCoeffs in ulp memories */ - RSI_FIM_InputData((void *)S->pCoeffs, ULPSS_RAM_ADDR_SRC2, numTaps, FORMAT_Q31); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of 1st coefficients for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - // Start Address of 1st coefficients for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)S->pCoeffs; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((DECIMATION << 1) | 1); - // Set Decimation Factor - FIM->FIM_CONFIG_REG1_b.DECIM_FAC = S->M; - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** -* @details -* @fn void rsi_arm_cfft_radix2(q31_t *pSrc) -* @brief Processing function for complex FFT. -* @param[in] *S points to an instance of the CFFT structure. -* @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place. -* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. -* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. -* @return none. -*/ -void rsi_arm_cfft_radix2(q31_t *pSrc) -{ - uint32_t i = 0; - q31_t pSrc_even[LOOKUP_LENGTH]; - q31_t pSrc_odd[LOOKUP_LENGTH]; - uint32_t pSrc_even_len = LOOKUP_LENGTH; -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - uint32_t pSrc_odd_len = LOOKUP_LENGTH; -#endif - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, FFT_LENGTH, NO_OF_STAGES); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1, 0, 0, 0)); - for (i = 0; i < pSrc_even_len; i++) { - pSrc_even[i] = (pSrc[LOOKUP_TABLE_EVEN_BANK[i]]); - pSrc_odd[i] = (pSrc[LOOKUP_TABLE_ODD_BANK[i]]); - } -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store even address data in ulp memories - RSI_FIM_InputData(pSrc_even, ULPSS_RAM_ADDR_SRC1, pSrc_even_len, FORMAT_Q31); - // Store odd address data in ulp memories - RSI_FIM_InputData((void *)pSrc_odd, ULPSS_RAM_ADDR_SRC2, pSrc_odd_len, FORMAT_Q31); - // Twiddle factor - RSI_FIM_InputData((void *)TWIDDLE_FACTOR_TABLE, ULPSS_RAM_ADDR_DST, TWIDDLE_FACTOR_LEN, FORMAT_Q31); - // Start Address of even address Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of odd address for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of twiddle factor Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; //twiddle -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((FFT << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_CPLX_CPLX); -} - -/*==============================================*/ -/** - * @fn void rsi_arm_sin_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) - * @brief Fast approximation to the trigonometric sine function for Q15 data. - * @param[in] *pSrc Scaled input value in radians. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - * @return none - */ -void rsi_arm_sin_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) -{ - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, blocksize, TRIG_LUT_LEN); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blocksize, FORMAT_Q15); - // Store data in ulp memories - RSI_FIM_InputData(Trig_lut1, ULPSS_RAM_ADDR_SRC2, TRIG_LUT_LEN, FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)Trig_lut1; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; - -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((COR_SINE << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - * @fn void rsi_arm_cos_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) - * @brief Fast approximation to the trigonometric Cosine function for Q15 data. - * @param[in] *pSrc Scaled input value in radians. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - * @return none - */ -void rsi_arm_cos_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) -{ - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, blocksize, TRIG_LUT_LEN); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blocksize, FORMAT_Q15); - // Store data in ulp memories - RSI_FIM_InputData(Trig_lut1, ULPSS_RAM_ADDR_SRC2, TRIG_LUT_LEN, FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)Trig_lut1; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((COR_COSINE << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - * @fn void rsi_arm_Inverse_Tan_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) - * @brief Fast approximation to the trigonometric Inverse Tan function for Q15 data. - * @param[in] *pSrc Scaled input value in radians. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - * @return none - */ -void rsi_arm_Inverse_Tan_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) -{ - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, blocksize, TRIG_LUT_LEN); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blocksize, FORMAT_Q15); - // Store data in ulp memories - RSI_FIM_InputData(Trig_lut1, ULPSS_RAM_ADDR_SRC2, TRIG_LUT_LEN, FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)Trig_lut1; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((COR_INV_TAN << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - * @fn void rsi_arm_Sinh_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) - * @brief Fast approximation to the trigonometric Sinh function for Q15 data. - * @param[in] *pSrc Scaled input value in radians. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - * @return none - */ -void rsi_arm_Sinh_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) -{ - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, blocksize, TRIG_LUT_LEN); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blocksize, FORMAT_Q15); - // Store data in ulp memories - RSI_FIM_InputData(Trig_lut2, ULPSS_RAM_ADDR_SRC2, TRIG_LUT_LEN, FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)Trig_lut2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; - -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((COR_SINH << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - * @fn void rsi_arm_cosh_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) - * @brief Fast approximation to the trigonometric cosh function for Q15 data. - * @param[in] *pSrc Scaled input value in radians. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - * @return none - */ -void rsi_arm_cosh_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) -{ - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, blocksize, TRIG_LUT_LEN); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blocksize, FORMAT_Q15); - // Store data in ulp memories - RSI_FIM_InputData(Trig_lut2, ULPSS_RAM_ADDR_SRC2, TRIG_LUT_LEN, FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)Trig_lut2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((COR_COSH << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - * @fn void rsi_arm_Inverse_Tanh_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) - * @brief Fast approximation to the trigonometric Inverse Tanh function for Q15 data. - * @param[in] *pSrc Scaled input value in radians. - * @param[out] *pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - * @return none - */ -void rsi_arm_Inverse_Tanh_q15(q15_t *pSrc, q15_t *pDst, uint32_t blocksize) -{ - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, blocksize, TRIG_LUT_LEN); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blocksize, FORMAT_Q15); - // Store data in ulp memories - RSI_FIM_InputData(Trig_lut2, ULPSS_RAM_ADDR_SRC2, TRIG_LUT_LEN, FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)Trig_lut2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((COR_INV_TANH << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - * @fn rsi_error_t rsi_arm_mat_add_q15(const arm_matrix_instance_q15_opt *pSrcA, - const arm_matrix_instance_q15_opt *pSrcB, - arm_matrix_instance_q15_opt *pDst) - * @brief Q15 matrix addition. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ERROR_FIM_MATRIX_INVALID_ARG or RSI_OK based on the outcome of size checking. - * - */ -rsi_error_t rsi_arm_mat_add_q15(const arm_matrix_instance_q15_opt *pSrcA, - const arm_matrix_instance_q15_opt *pSrcB, - arm_matrix_instance_q15_opt *pDst) -{ - - // Number of rows of input matrix A - uint16_t numRowsA = pSrcA->nRows; - // Number of columns of input matrix B - uint16_t numColsB = pSrcB->nColumns; - // Number of columns of input matrix A - uint16_t numColsA = pSrcA->nColumns; - if ((pSrcA != NULL) && (pSrcB != NULL)) { - if ((pSrcA->nColumns == pSrcB->nColumns) && (pSrcA->nRows == pSrcB->nRows)) { - /* Set column size of buffers in the FIM module */ - RSI_FIM_SetDataLen(numColsA, 0, 0); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData((pSrcA->pData), ULPSS_RAM_ADDR_SRC1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_Q15); - // Store data in ulp memories - RSI_FIM_InputData((pSrcB->pData), ULPSS_RAM_ADDR_SRC2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ((uint32_t)pSrcA->pData); - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ((uint32_t)pSrcB->pData); - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ((uint32_t)pDst->pData); -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((ADD_MAT << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(numRowsA, numColsB, ULP_FIM_COP_DATA_REAL_REAL); - } else { - return ERROR_FIM_MATRIX_INVALID_ARG; - } - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t arm_mat_add_q31(const arm_matrix_instance_q31_opt *pSrcA, - const arm_matrix_instance_q31_opt *pSrcB, - arm_matrix_instance_q31_opt *pDst) - * @brief Q31 matrix addition. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ERROR_FIM_MATRIX_INVALID_ARG or RSI_OK based on the outcome of size checking. - */ -rsi_error_t arm_mat_add_q31(const arm_matrix_instance_q31_opt *pSrcA, - const arm_matrix_instance_q31_opt *pSrcB, - arm_matrix_instance_q31_opt *pDst) -{ - - // Number of rows of input matrix A - uint16_t numRowsA = pSrcA->nRows; - // Number of columns of input matrix B - uint16_t numColsB = pSrcB->nColumns; - // Number of columns of input matrix A - uint16_t numColsA = pSrcA->nColumns; - if ((pSrcA != NULL) && (pSrcB != NULL)) { - if ((pSrcA->nColumns == pSrcB->nColumns) && (pSrcA->nRows == pSrcB->nRows)) { - /* Set column size of buffers in the FIM module */ - RSI_FIM_SetDataLen(numColsA, 0, 0); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData((pSrcA->pData), ULPSS_RAM_ADDR_SRC1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_Q31); - // Store data in ulp memories - RSI_FIM_InputData((pSrcB->pData), ULPSS_RAM_ADDR_SRC2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_Q31); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ((uint32_t)pSrcA->pData); - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ((uint32_t)pSrcB->pData); - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ((uint32_t)pDst->pData); -#endif - - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((ADD_MAT << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(numRowsA, numColsB, ULP_FIM_COP_DATA_REAL_REAL); - } else { - return ERROR_FIM_MATRIX_INVALID_ARG; - } - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t arm_mat_sub_q15(const arm_matrix_instance_q15_opt *pSrcA, - const arm_matrix_instance_q15_opt *pSrcB, - arm_matrix_instance_q15_opt *pDst) - * @brief Q15 matrix subtraction. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ERROR_FIM_MATRIX_INVALID_ARG or RSI_OK based on the outcome of size checking. - */ -rsi_error_t arm_mat_sub_q15(const arm_matrix_instance_q15_opt *pSrcA, - const arm_matrix_instance_q15_opt *pSrcB, - arm_matrix_instance_q15_opt *pDst) -{ - // Number of rows of input matrix A - uint16_t numRowsA = pSrcA->nRows; - // Number of columns of input matrix B - uint16_t numColsB = pSrcB->nColumns; - // Number of columns of input matrix A - uint16_t numColsA = pSrcA->nColumns; - if ((pSrcA != NULL) && (pSrcB != NULL)) { - if ((pSrcA->nColumns == pSrcB->nColumns) && (pSrcA->nRows == pSrcB->nRows)) { - /* Set column size of buffers in the FIM module */ - RSI_FIM_SetDataLen(numColsA, 0, 0); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData((pSrcA->pData), ULPSS_RAM_ADDR_SRC1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_Q15); - // Store data in ulp memories - RSI_FIM_InputData((pSrcB->pData), ULPSS_RAM_ADDR_SRC2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ((uint32_t)pSrcA->pData); - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ((uint32_t)pSrcB->pData); - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ((uint32_t)pDst->pData); -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((SUB_MAT << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(numRowsA, numColsB, ULP_FIM_COP_DATA_REAL_REAL); - } else { - return ERROR_FIM_MATRIX_INVALID_ARG; - } - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t arm_mat_sub_q31(const arm_matrix_instance_q31_opt *pSrcA, - const arm_matrix_instance_q31_opt *pSrcB, - arm_matrix_instance_q31_opt *pDst) - * @brief Q31 matrix subtraction. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ERROR_FIM_MATRIX_INVALID_ARG or RSI_OK based on the outcome of size checking. - */ -rsi_error_t arm_mat_sub_q31(const arm_matrix_instance_q31_opt *pSrcA, - const arm_matrix_instance_q31_opt *pSrcB, - arm_matrix_instance_q31_opt *pDst) -{ - // Number of rows of input matrix A - uint16_t numRowsA = pSrcA->nRows; - // Number of columns of input matrix B - uint16_t numColsB = pSrcB->nColumns; - // Number of columns of input matrix A - uint16_t numColsA = pSrcA->nColumns; - if ((pSrcA != NULL) && (pSrcB != NULL)) { - if ((pSrcA->nColumns == pSrcB->nColumns) && (pSrcA->nRows == pSrcB->nRows)) { - /* Set column size of buffers in the FIM module */ - RSI_FIM_SetDataLen(numColsA, 0, 0); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData((pSrcA->pData), ULPSS_RAM_ADDR_SRC1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_Q31); - // Store data in ulp memories - RSI_FIM_InputData((pSrcB->pData), ULPSS_RAM_ADDR_SRC2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_Q31); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - /* ULPSS buffers from application */ - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ((uint32_t)pSrcA->pData); - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ((uint32_t)pSrcB->pData); - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ((uint32_t)pDst->pData); -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((SUB_MAT << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(numRowsA, numColsB, ULP_FIM_COP_DATA_REAL_REAL); - } else { - return ERROR_FIM_MATRIX_INVALID_ARG; - } - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t arm_mat_trans_q15(const arm_matrix_instance_q15_opt *pSrc, arm_matrix_instance_q15_opt *pDst) - * @brief Q15 matrix transpose. - * @param[in] *pSrc points to the input matrix - * @param[out] *pDst points to the output matrix - * @return The function returns either ERROR_FIM_MATRIX_INVALID_ARG - * or RSI_OK based on the outcome of size checking. - */ -rsi_error_t arm_mat_trans_q15(const arm_matrix_instance_q15_opt *pSrc, arm_matrix_instance_q15_opt *pDst) -{ - // Number of rows of input matrix A - uint16_t numRows = pSrc->nRows; - // Number of columns of input matrix B - uint16_t numCols = pSrc->nColumns; - if (pSrc == NULL) { - return ERROR_FIM_MATRIX_INVALID_ARG; - } else { - // Set column size of buffers in the FIM module - RSI_FIM_SetDataLen(numCols, 0, 0); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData((pSrc->pData), ULPSS_RAM_ADDR_SRC1, ((pSrc->nRows) * (pSrc->nColumns)), FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // ULPSS buffers from application - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ((uint32_t)pSrc->pData); - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ((uint32_t)pDst->pData); - -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((MAT_TRANSPOSE << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(numRows, numCols, ULP_FIM_COP_DATA_REAL_REAL); - return RSI_OK; - } -} - -/*==============================================*/ -/** - * @fn rsi_error_t rsi_arm_mat_trans_q31(const arm_matrix_instance_q31_opt *pSrc, arm_matrix_instance_q31_opt *pDst) - * @brief Q31 matrix transpose. - * @param[in] *pSrc points to the input matrix - * @param[out] *pDst points to the output matrix - * @return The function returns either ERROR_FIM_MATRIX_INVALID_ARG - * or RSI_OK based on the outcome of size checking. - */ - -rsi_error_t rsi_arm_mat_trans_q31(const arm_matrix_instance_q31_opt *pSrc, arm_matrix_instance_q31_opt *pDst) -{ - // Number of rows of input matrix A - uint16_t numRows = pSrc->nRows; - // Number of columns of input matrix B - uint16_t numCols = pSrc->nColumns; - if (pSrc == NULL) { - return ERROR_FIM_MATRIX_INVALID_ARG; - } else { - /* Set column size of buffers in the FIM module */ - RSI_FIM_SetDataLen(numCols, 0, 0); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData((pSrc->pData), ULPSS_RAM_ADDR_SRC1, ((pSrc->nRows) * (pSrc->nColumns)), FORMAT_Q31); - /* Start Address of 1st Input Data for FIM Operations */ - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - /* ULPSS buffers from application */ - /* Start Address of 1st Input Data for FIM Operations */ - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ((uint32_t)pSrc->pData); - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ((uint32_t)pDst->pData); -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((MAT_TRANSPOSE << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(numRows, numCols, ULP_FIM_COP_DATA_REAL_REAL); - return RSI_OK; - } -} - -/*==============================================*/ -/** - * @fn rsi_error_t rsi_arm_mat_Hadamard_prod_q15(const arm_matrix_instance_q15_opt *pSrcA, - const arm_matrix_instance_q15_opt *pSrcB, - arm_matrix_instance_q15_opt *pDst) - * @brief Q15 matrix Hadamard product. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ERROR_FIM_MATRIX_INVALID_ARG or RSI_OK based on the outcome of size checking. - */ -rsi_error_t rsi_arm_mat_Hadamard_prod_q15(const arm_matrix_instance_q15_opt *pSrcA, - const arm_matrix_instance_q15_opt *pSrcB, - arm_matrix_instance_q15_opt *pDst) -{ - // Number of rows of input matrix A - uint16_t numRowsA = pSrcA->nRows; - // Number of columns of input matrix B - uint16_t numColsB = pSrcB->nColumns; - // Number of columns of input matrix A - uint16_t numColsA = pSrcA->nColumns; - if ((pSrcA != NULL) && (pSrcB != NULL)) { - if ((pSrcA->nColumns == pSrcB->nColumns) && (pSrcA->nRows == pSrcB->nRows)) { - /* Set column size of buffers in the FIM module */ - RSI_FIM_SetDataLen(numColsA, 0, 0); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData((pSrcA->pData), ULPSS_RAM_ADDR_SRC1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_Q15); - // Store data in ulp memories - RSI_FIM_InputData((pSrcB->pData), ULPSS_RAM_ADDR_SRC2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ((uint32_t)pSrcA->pData); - // Start Address of 2nd Input Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ((uint32_t)pSrcB->pData); - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ((uint32_t)pDst->pData); -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((MAT_HADAMARD << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(numRowsA, numColsB, ULP_FIM_COP_DATA_REAL_REAL); - } else { - return ERROR_FIM_MATRIX_INVALID_ARG; - } - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t arm_mat_Hadamard_prod_q31(const arm_matrix_instance_q31_opt *pSrcA, - const arm_matrix_instance_q31_opt *pSrcB, - arm_matrix_instance_q31_opt *pDst) - * @brief Q31 matrix Hadamard product. - * @param[in] *pSrcA points to the first input matrix structure - * @param[in] *pSrcB points to the second input matrix structure - * @param[out] *pDst points to output matrix structure - * @return The function returns either - * ERROR_FIM_MATRIX_INVALID_ARG or RSI_OK based on the outcome of size checking. - */ -rsi_error_t arm_mat_Hadamard_prod_q31(const arm_matrix_instance_q31_opt *pSrcA, - const arm_matrix_instance_q31_opt *pSrcB, - arm_matrix_instance_q31_opt *pDst) -{ - - // Number of rows of input matrix A - uint16_t numRowsA = pSrcA->nRows; - // Number of columns of input matrix B - uint16_t numColsB = pSrcB->nColumns; - // Number of columns of input matrix A - uint16_t numColsA = pSrcA->nColumns; - if ((pSrcA != NULL) && (pSrcB != NULL)) { - if ((pSrcA->nColumns == pSrcB->nColumns) && (pSrcA->nRows == pSrcB->nRows)) { - /* Set column size of buffers in the FIM module */ - RSI_FIM_SetDataLen(numColsA, 0, 0); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x11, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData((pSrcA->pData), ULPSS_RAM_ADDR_SRC1, ((pSrcA->nRows) * (pSrcA->nColumns)), FORMAT_Q31); - // Store data in ulp memories - RSI_FIM_InputData((pSrcB->pData), ULPSS_RAM_ADDR_SRC2, ((pSrcB->nRows) * (pSrcB->nColumns)), FORMAT_Q31); - /* Start Address of 1st Input Data for FIM Operations */ - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - /* Start Address of 2nd Input Data for FIM Operations */ - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - /* Start Address of 1st Input Data for FIM Operations */ - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ((uint32_t)pSrcA->pData); - /* Start Address of 2nd Input Data for FIM Operations */ - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ((uint32_t)pSrcB->pData); - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ((uint32_t)pDst->pData); -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((MAT_HADAMARD << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(numRowsA, numColsB, ULP_FIM_COP_DATA_REAL_REAL); - } else { - return ERROR_FIM_MATRIX_INVALID_ARG; - } - } - return RSI_OK; -} - -/*==============================================*/ -/** - *@fn void rsi_arm_VSqrt_q15(q15_t *pSrc, q15_t *pDst, uint32_t blockSize) - *@brief This API is used to set the FIM Q15 Square root for real number - *@param[in] *pSrc points input for squaring a number - *@param[in] *pDst points to the block of output data - *@param[in] blockSize is size of the input array - *@return none - */ -void rsi_arm_VSqrt_q15(q15_t *pSrc, q15_t *pDst, uint32_t blockSize) -{ - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, TRIG_LUT_LEN); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q15); - // Store data in ulp memories - RSI_FIM_InputData(Trig_lut2, ULPSS_RAM_ADDR_SRC2, TRIG_LUT_LEN, FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - /* Start Address of lookup table Data for FIM Operations */ - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)Trig_lut2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((SQ_ROOT << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_arm_log_q15(q15_t *pSrc, q15_t *pDst, uint16_t blockSize) - *@brief This API is used to set the FIM Q15 Natural Log Operation for real number - *@param[in] *pSrc points input for squaring a number - *@param[in] *pDst points to the block of output data - *@param[in] blockSize is size of the input array - *@return none - */ -void rsi_arm_log_q15(q15_t *pSrc, q15_t *pDst, uint16_t blockSize) -{ - // Set data blockSize of buffers in the FIM module - RSI_FIM_SetDataLen(NOT_MATRIX, blockSize, TRIG_LUT_LEN); - // Set sat trunc values to FIM module for corresponding inputs - RSI_FIM_SetSatTruncRound(STRS(0x1F, 0, 0, 0)); -#if ULPSS_MEMORY_WITH_M4_MEM_BUFFRS - // Use application buffer which are in M4 RAM and copy them to ulpss RAM ,point ulpss RAM address to FIM - // Store data in ulp memories - RSI_FIM_InputData(pSrc, ULPSS_RAM_ADDR_SRC1, blockSize, FORMAT_Q15); - // Store data in ulp memories - RSI_FIM_InputData(Trig_lut2, ULPSS_RAM_ADDR_SRC2, TRIG_LUT_LEN, FORMAT_Q15); - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = ULPSS_RAM_ADDR_SRC1; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = ULPSS_RAM_ADDR_SRC2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = ULPSS_RAM_ADDR_DST; -#else - // Start Address of 1st Input Data for FIM Operations - FIM->FIM_INP1_ADDR_b.INP1_ADDR = (uint32_t)pSrc; - // Start Address of lookup table Data for FIM Operations - FIM->FIM_INP2_ADDR_b.INP2_ADDR = (uint32_t)Trig_lut2; - // Start Address of Output Data for FIM Operations - FIM->FIM_OUT_ADDR_b.OUT_ADDR = (uint32_t)pDst; -#endif - // Set the Mode of Operation to be performed. - FIM->FIM_MODE_INTERRUPT = ((NAT_LOG << 1) | 1); - // Set the data type and Trigger the FIM module - RSI_FIM_DatTypTrig(NOT_MATRIX, NOT_MATRIX, ULP_FIM_COP_DATA_REAL_REAL); -} - -/*==============================================*/ -/** - *@fn void rsi_enable_inst_buff(void) - *@brief This API is used to select instruction buffer for performing more than one operations at a time. - *@return none - */ -void rsi_enable_inst_buff(void) -{ - // Instruction buffer enable - FIM->FIM_CONFIG_REG2_b.INSTR_BUFF_ENABLE = ENABLE; -} - -#ifdef INST_BUFF_ENABLE -/*==============================================*/ -/** - *@fn void rsi_fim_copy_fim_reg_to_ulp_memory(void) - *@brief This API is used to copy FIM configuration to ulpss memory when instruction buffer is enabled . - *@return none - */ -void rsi_fim_copy_fim_reg_to_ulp_memory(void) -{ - static int reg_copy_count; - memcpy((void *)(ULP_MEMORY_ADDR + (reg_copy_count * 9 * 4)), (const char *)FIM_BASE, 36); - memset((void *)(ULP_MEMORY_ADDR + (((reg_copy_count + 1) * 0x24))), 0xFFFFFFFF, sizeof(int)); - reg_copy_count++; -} -#endif -#endif diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_i2s.c b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_i2s.c index 13b767601..0250afe60 100644 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_i2s.c +++ b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_i2s.c @@ -374,23 +374,13 @@ int32_t I2S_Control(uint32_t control, } if (i2s->reg == I2S1) { if (i2s->clk->clk_src == ULP_I2S_REF_CLK) { - val = 32000000 / bit_freq; + val = system_clocks.ulpss_ref_clk / bit_freq; RSI_ULPSS_UlpI2sClkConfig(ULPCLK, ULP_I2S_REF_CLK, (uint16_t)val / 2); } if (i2s->clk->clk_src == ULP_I2S_ULP_32MHZ_RC_CLK) { - val = 32000000 / bit_freq; + val = system_clocks.rc_32mhz_clock / bit_freq; RSI_ULPSS_UlpI2sClkConfig(ULPCLK, ULP_I2S_ULP_32MHZ_RC_CLK, (uint16_t)val / 2); } - if (i2s->clk->clk_src == ULP_I2S_ULP_20MHZ_RO_CLK) { - val = 20000000 / bit_freq; - RSI_ULPSS_UlpI2sClkConfig(ULPCLK, ULP_I2S_ULP_20MHZ_RO_CLK, (uint16_t)val); - } - if (i2s->clk->clk_src == ULP_I2S_SOC_CLK) { - // TODO: This source is not working - //freq = GetSOCClockFreq(); - val = 32000000 / bit_freq; - //RSI_ULPSS_UlpI2sClkConfig(ULPCLK ,RTE_I2S1_CLK_SRC,val/2); - } if (i2s->clk->clk_src == ULP_I2S_PLL_CLK) { val = 6250000 / bit_freq; RSI_ULPSS_UlpI2sClkConfig(ULPCLK, ULP_I2S_PLL_CLK, (uint16_t)val / 2); diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_ir.c b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_ir.c deleted file mode 100644 index 8c4668c6e..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_ir.c +++ /dev/null @@ -1,59 +0,0 @@ -/******************************************************************************* -* @file rsi_ir.c -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Include files - -#include "rsi_ir.h" - -/** @addtogroup SOC23 -* @{ -*/ -/*==============================================*/ -/** - * @fn uint16_t RSI_IR_ReadData(IR_Type* pIr,uint16_t memory_address) - * @brief This API is used read IR address. - * @param[in] pIr : IR type pointer - * @param[in] memory_address : memory address value (0 .. 128). - * @return 16-Bit IR data received (BIT[15] in received data will indicate the polarity of pulse) - * \n remaining bit will contain the incremented counter value of the pulse. - */ -uint16_t RSI_IR_ReadData(IR_Type *pIr, uint16_t memory_address) -{ - if (memory_address > MAX_MEMORY_ADDRESS) { - return INVALID_PARAMETERS; - } - pIr->IR_MEM_ADDR_ACCESS_b.IR_MEM_ADDR = (unsigned int)(memory_address & 0x007F); - pIr->IR_MEM_ADDR_ACCESS_b.IR_MEM_RD_EN = 1U; - return pIr->IR_MEM_READ_b.IR_MEM_DATA_OUT; -} - -/*==============================================*/ -/** - * @fn void RSI_IR_SoftwareRestart(IR_Type* pIr) - * @brief This API restart the IR operation. - * @param[in] pIr : IR type pointer - */ -void RSI_IR_SoftwareRestart(IR_Type *pIr) -{ - uint8_t i; - pIr->IR_CONFIG_b.SREST_IR_CORE = 1U; - for (i = 0; i < 10; i++) { - __ASM("nop"); - } - pIr->IR_CONFIG_b.SREST_IR_CORE = 0U; -} -/** @} */ \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_sdioh.c b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_sdioh.c deleted file mode 100644 index 93e3a9f0c..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_sdioh.c +++ /dev/null @@ -1,798 +0,0 @@ -/******************************************************************************* -* @file rsi_sdioh.c -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Include Files - -#include "rsi_ccp_user_config.h" -#if defined(CHIP_9118) - -#include "clock_update.h" - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_RegisterInfo(SMIH_CARD_CONFIG_T *pSmihConfig, SMIH_CCCR_REG_INFO_T *pRegInfo) - * @brief This API is used to know the register info of the card. - * @param[in] pSmihConfig : Pointer to the card command information structure - * @param[in] pRegInfo : Pointer to the Command info structure - * @return RSI_OK : command sent succesfully - * ERROR_SMIH : If Parameter is invalid. - */ -rsi_error_t RSI_SDIOH_RegisterInfo(SMIH_CARD_CONFIG_T *pSmihConfig, SMIH_CCCR_REG_INFO_T *pRegInfo) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - uint8_t cccr[22] = { 0 }; - - cmd.cmdIdx = CMD_53; - cmd.cmdArg = CCCR_BYTE_READ; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - data.data = cccr; - data.blockSize = 0x16; - data.blockCount = 1; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - data.direction = SMIH_READ_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer command to the slave - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - memset((void *)pRegInfo, 0x0, 22); - memcpy((void *)pRegInfo, &transfer.data->data, 22); - - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_WriteCommandCmd52(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument) - * @brief This API is used to send the SDIO_CMD52 to the card. - * @param[in] pSmihConfig : Pointer to the card command information structure - * @param[in] Argument : Argument to the command - * @return RSI_OK : command sent succesfully - * ERROR_SMIH : If Parameter is invalid. - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDIOH_WriteCommandCmd52(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - cmd.cmdIdx = CMD_52; - cmd.cmdArg = Argument; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - data.data = 0; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_WRITE_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - memset((void *)&pSmihConfig->response[0], 0x0, sizeof(pSmihConfig->response)); - - // transfer command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } else { - memcpy((void *)&pSmihConfig->response[0], &transfer.command->response[0], sizeof(pSmihConfig->response)); - return RSI_OK; - } -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_ReadCommandCmd52(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument) - * @brief This API is used to send the SDIO_CMD52 to the card. - * @param[in] pcmdInfo : Pointer to the card information strut - * @param[in] Argument : Argument to the command - * @return RSI_OK : In case of command sent succesfully - * ERROR_SMIH : If Parameter is invalid. - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDIOH_ReadCommandCmd52(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - cmd.cmdIdx = CMD_52; - cmd.cmdArg = Argument; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - data.data = 0; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_READ_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } else { - memset((void *)&pSmihConfig->response[0], 0x0, sizeof(pSmihConfig->response)); - memcpy((void *)&pSmihConfig->response[0], &transfer.command->response[0], sizeof(pSmihConfig->response)); - return RSI_OK; - } -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_SetBusWidthCmd52(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg) - * @brief This API is used to send the SDIO_CMD52 to set bus width to the IO card. - * @param[in] pSmihConfig : Pointer to the card info struct - * @param[in] CmdArg : Command Argument - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDIOH_SetBusWidthCmd52(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - cmd.cmdIdx = CMD_52; - cmd.cmdArg = CmdArg; - data.data = NULL; - data.blockSize = 0; - data.blockCount = 0; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - data.direction = SMIH_WRITE_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_BusWidthConfig(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t BusWidth) - * @brief This API is used to change the bus width. - * @param[in] pcmdInfo : Pointer to the card information strut - * @param[in] BusWidth : Width of the bus - * \n possible values are - * \n SMIH_BUS_WIDTH1 = 0u, - * \n SMIH_BUS_WIDTH4 = 1u, - * \n SMIH_BUS_WIDTH8 = 2u, - * @return RSI_OK : If bus width set properly - * ERROR_SMIH : If Parameter is invalid. - */ -rsi_error_t RSI_SDIOH_BusWidthConfig(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t BusWidth) -{ - uint32_t cmdArg = 0; - boolean_t host4BitMode = FALSE; - - if (BusWidth == SMIH_BUS_WIDTH4) { - cmdArg = BIT4_BUS_WIDTH_ARG; - host4BitMode = TRUE; - } else { - cmdArg = 0; - host4BitMode = FALSE; - } - if (RSI_OK != RSI_SDIOH_SetBusWidthCmd52(pSmihConfig, cmdArg)) { - return ERROR_SMIH; - } else { - // host side setting - smih_bus_width_set(host4BitMode); - return RSI_OK; - } -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_GoIdleStateCmd0(SMIH_CARD_CONFIG_T *pSmihConfig) - * @brief This API is used to send the cmd0 to the io card. - * @param[in] pSmihConfig : Pointer to the Command info structure - * @return RSI_OK : If command sent successfully - * ERROR_TIMEOUT : If command error timeout occures. - */ -rsi_error_t RSI_SDIOH_GoIdleStateCmd0(SMIH_CARD_CONFIG_T *pSmihConfig) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - cmd.cmdIdx = 0; - cmd.cmdArg = 0x0; - cmd.responseTypeSelect = SMIH_NO_RESPONSE; - data.data = NULL; - data.blockSize = 0x0; - data.blockCount = 0x0; - data.direction = SMIH_WRITE_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_SendRelativeCardAddressCmd3(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg) - * @brief This API is used to send the SDIO_CMD3(Get relative card address) to the IO card. - * @param[in] pSmihConfig : Pointer to the card info struct - * @param[in] CmdArg : Command argument to send - * @return RSI_OK : If command sent successfully - * ERROR_TIMEOUT : If command error timeout occures. - */ -rsi_error_t RSI_SDIOH_SendRelativeCardAddressCmd3(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - cmd.cmdIdx = CMD_3; - cmd.cmdArg = CmdArg; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - data.data = NULL; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_WRITE_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - if (CmdArg == 0x0) { - pSmihConfig->rca = transfer.command->response[0] >> 16; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_SwitchVoltageCmd11(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg) - * @brief This API is used to send the SDIO_CMD11(Voltage switch command in case of uhs modes) to the io card. - * @param[in] pSmihConfig : Pointer to the card info struct - * @param[in] CmdArg : Command argument to send - * @return RSI_OK : If command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDIOH_SwitchVoltageCmd11(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - cmd.cmdIdx = CMD_11; - cmd.cmdArg = 0; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - data.data = NULL; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_WRITE_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_SelectCardCmd7(SMIH_CARD_CONFIG_T *pSmihConfig) - * @brief This API is used to send the cmd 7(select the cards) to the IO card. - * @param[in] pSmihConfig : Pointer to the Command info structure - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDIOH_SelectCardCmd7(SMIH_CARD_CONFIG_T *pSmihConfig) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - cmd.cmdIdx = CMD_7; - cmd.cmdArg = pSmihConfig->rca << 16; - cmd.responseTypeSelect = SMIH_RESPONSE_R1BR5B; - data.data = NULL; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_WRITE_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_ByteBlockWriteCmd53(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t *pData, uint32_t Addr) - * @brief This API is used to send the SDIO_CMD53 to write data to the IO card. - * @param[in] pSmihConfig : Pointer to the smih config struct - * @param[in] pData : Pointer to the buffer data to write - * @param[in] Addr : Address to write the data - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occured. - */ -rsi_error_t RSI_SDIOH_ByteBlockWriteCmd53(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t *pData, uint32_t Addr) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - if ((NULL == pData)) { - return INVALID_PARAMETERS; - } - cmd.cmdIdx = CMD_53; - if (pSmihConfig->blockModeEnable) { - cmd.cmdArg = (pSmihConfig->numberOfBlocks); - } else { - cmd.cmdArg = (pSmihConfig->byteBlockSize); - } - cmd.cmdArg |= (((Addr)&0x0001FFFF) << 9); - cmd.cmdArg |= (pSmihConfig->opCode << 26); - cmd.cmdArg |= (pSmihConfig->blockModeEnable << 27); - cmd.cmdArg |= (pSmihConfig->funcNum << 28); - cmd.cmdArg |= BIT(31); - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - data.data = pData; - data.blockSize = pSmihConfig->byteBlockSize; - data.blockCount = pSmihConfig->numberOfBlocks; - data.direction = SMIH_WRITE_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_ByteBlockReadCmd53(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t *pData, uint32_t Addr) - * @brief This API is used to send the SDIO_CMD53 to read data from the IO card. - * @param[in] pSmihConfig : Pointer to the smih config struct - * @param[in] pData : Pointer to the buffer data to read - * @param[in] Addr : Address to read the data - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDIOH_ByteBlockReadCmd53(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t *pData, uint32_t Addr) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - cmd.cmdIdx = CMD_53; - if (pSmihConfig->blockModeEnable == 1) { - cmd.cmdArg = (pSmihConfig->numberOfBlocks); - } else { - cmd.cmdArg = (pSmihConfig->byteBlockSize); - } - cmd.cmdArg |= (((Addr)&0x0001FFFF) << 9); - cmd.cmdArg |= (pSmihConfig->opCode << 26); - cmd.cmdArg |= (pSmihConfig->blockModeEnable << 27); - cmd.cmdArg |= (pSmihConfig->funcNum << 28); - cmd.cmdArg |= (((0 << 0)) << 31); - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - data.data = pData; - data.blockSize = pSmihConfig->byteBlockSize; - data.blockCount = pSmihConfig->numberOfBlocks; - data.direction = SMIH_READ_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_ReInitializationCmd5(SMIH_CARD_CONFIG_T *pSmihConfig) - * @brief This API is used to send the SDIO_CMD5 to reinitialize the SDIO card. - * @param[in] pSmihConfig : Pointer to the smih config struct - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDIOH_ReInitializationCmd5(SMIH_CARD_CONFIG_T *pSmihConfig) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - cmd.cmdIdx = CMD_5; - cmd.cmdArg = *(uint32_t *)(&pSmihConfig->ocr); - if (pSmihConfig->voltage == 1) { - cmd.cmdArg |= 0x01100000; - } else { - cmd.cmdArg |= 0x00100000; - } - cmd.responseTypeSelect = SMIH_RESPONSE_R3R4; - data.data = NULL; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_WRITE_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - // gtransfer Command - if (RSI_OK == pSmihConfig->cmd_transfer(&transfer)) { - memcpy((void *)&pSmihConfig->ocr, &transfer.command->response[0], sizeof(pSmihConfig->ocr)); - return RSI_OK; - } - return ERROR_SMIH; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_InitializationCmd5(SMIH_CARD_CONFIG_T *pSmihConfig) - * @brief This API is used to send the SDIO_CMD5 to initialize the SDIO card. - * @param[in] pSmihConfig : Pointer to the smih card information struct - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDIOH_InitializationCmd5(SMIH_CARD_CONFIG_T *pSmihConfig) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - cmd.cmdIdx = CMD_5; - cmd.cmdArg = *(uint32_t *)&pSmihConfig->ocr; - cmd.cmdArg = (cmd.cmdArg & 0x00000000); - cmd.responseTypeSelect = SMIH_RESPONSE_R3R4; - data.data = NULL; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_WRITE_DIRECTION; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK == pSmihConfig->cmd_transfer(&transfer)) { - memcpy((void *)&pSmihConfig->ocr, &transfer.command->response[0], sizeof(pSmihConfig->ocr)); - return RSI_OK; - } - return ERROR_SMIH; -} - -/*==============================================*/ -/** - * @fn void RSI_SDIOH_PinMux(void) - * @brief This API is used to configure GPIOs for SDIOH operations. - * @return none - */ -void RSI_SDIOH_PinMux(void) -{ - // enable pads for pins -#if SDIO_SET1 - RSI_EGPIO_PadSelectionEnable(SDIO_CLK_PAD); - RSI_EGPIO_PadSelectionEnable(SDIO_CMD_PAD); - RSI_EGPIO_PadSelectionEnable(SDIO_D0_PAD); - RSI_EGPIO_PadSelectionEnable(SDIO_D1_PAD); - RSI_EGPIO_PadSelectionEnable(SDIO_D2_PAD); - RSI_EGPIO_PadSelectionEnable(SDIO_D3_PAD); -#else - // Enable Host Pad Gpio modes - // SDIO Connected to Tass - (*(volatile uint32_t *)(0x41300004)) = (0x1 << 5); - RSI_EGPIO_HostPadsGpioModeEnable(SDIO_CLK_PIN); - RSI_EGPIO_HostPadsGpioModeEnable(SDIO_CMD_PIN); - RSI_EGPIO_HostPadsGpioModeEnable(SDIO_D0_PIN); - RSI_EGPIO_HostPadsGpioModeEnable(SDIO_D1_PIN); - RSI_EGPIO_HostPadsGpioModeEnable(SDIO_D2_PIN); - RSI_EGPIO_HostPadsGpioModeEnable(SDIO_D3_PIN); -#endif - - RSI_EGPIO_PadSelectionEnable(SDIO_WP_PAD); - RSI_EGPIO_PadSelectionEnable(SDIO_CD_PAD); - - // Ren enables for Gpios - RSI_EGPIO_PadReceiverEnable(SDIO_CLK_PIN); - RSI_EGPIO_PadReceiverEnable(SDIO_CMD_PIN); - RSI_EGPIO_PadReceiverEnable(SDIO_D0_PIN); - RSI_EGPIO_PadReceiverEnable(SDIO_D1_PIN); - RSI_EGPIO_PadReceiverEnable(SDIO_D2_PIN); - RSI_EGPIO_PadReceiverEnable(SDIO_D3_PIN); - RSI_EGPIO_PadReceiverEnable(SDIO_CD_PIN); - RSI_EGPIO_PadReceiverEnable(SDIO_WP_PIN); - - // Configure software pull ups for cmd ,d0,d1,d2,d3 - RSI_EGPIO_PadDriverDisableState(SDIO_CMD_PIN, Pullup); - RSI_EGPIO_PadDriverDisableState(SDIO_D0_PIN, Pullup); - RSI_EGPIO_PadDriverDisableState(SDIO_D1_PIN, Pullup); - RSI_EGPIO_PadDriverDisableState(SDIO_D2_PIN, Pullup); - RSI_EGPIO_PadDriverDisableState(SDIO_D3_PIN, Pullup); - - RSI_EGPIO_PadDriverDisableState(SDIO_WP_PIN, Pulldown); - RSI_EGPIO_PadDriverDisableState(SDIO_CD_PIN, Pulldown); - - // Configure Mux - RSI_EGPIO_SetPinMux(EGPIO, 0, SDIO_CLK_PIN, SDIO_CLK_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SDIO_CMD_PIN, SDIO_CMD_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SDIO_D0_PIN, SDIO_D0_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SDIO_D1_PIN, SDIO_D1_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SDIO_D2_PIN, SDIO_D2_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SDIO_D3_PIN, SDIO_D3_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SDIO_CD_PIN, SDIO_CD_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SDIO_WP_PIN, SDIO_WP_MUX); -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_Enumeration(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event) - * @brief This API is used to initialize the IO card - * @param[in] pSmihConfig : Pointer to the smih card configuration - * Event : event handler to be register - * @return RSI_OK : IO card initialized successfully - * INVALID_PARAMETERS : if pSmihConfig == NULL - */ -rsi_error_t RSI_SDIOH_Enumeration(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event) -{ - if (pSmihConfig == 0) { - return INVALID_PARAMETERS; - } - - // Configure gpios in smih mode - RSI_SDIOH_PinMux(); - - // initialize the host - if (RSI_OK != RSI_SD_HostInit(pSmihConfig, Event, 0)) { - return ERROR_SMIH; - } else { - // Commands for sdio enumeration - - rsi_delay_ms(5); - -init: - // Reset Card - if (RSI_OK != RSI_SDIOH_GoIdleStateCmd0(pSmihConfig)) { - goto init; - } - // Get Operational voltage - if (RSI_OK != RSI_SDIOH_InitializationCmd5(pSmihConfig)) { - goto init; - } - // Set Operational voltage and get ocr - if (RSI_OK != RSI_SDIOH_ReInitializationCmd5(pSmihConfig)) { - return ERROR_SMIH; - } - if (!(pSmihConfig->ocr.cardReady)) { - goto init; - } - if ((pSmihConfig->ocr.memPresent)) { - return CARD_TYPE_MEMCARD; - } - if (!(pSmihConfig->ocr.ioNum)) { - return ERROR_INAVLID_MODE; - } - if (pSmihConfig->highSpeedEnable == 1) { - // disable clock to the sd - M4CLK->SD_MEM_CLOCK_REG_b.SD_MEM_INTF_CLK_SEL = 0x7; - - // wait for some time - rsi_delay_ms(5); - - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.HIGH_SPEED_ENABLE = 0x1; - - // enable clock - RSI_CLK_SdMemClkConfig(M4CLK, 1, SDMEM_SOCPLLCLK, 1); - - // wait for some time - rsi_delay_ms(2); - } - if (pSmihConfig->uhsModeSelect != 0) { - // works only with 1.8 volatge level - if (!(pSmihConfig->ocr.s18A)) { - return ERROR_INAVLID_MODE; - } - // send volatge switching command in case of uhs modes - if (RSI_OK != RSI_SDIOH_SwitchVoltageCmd11(pSmihConfig, 0x0)) { - return ERROR_SMIH; - } - //disable clock to the sd - M4CLK->SD_MEM_CLOCK_REG_b.SD_MEM_INTF_CLK_SEL = 0x7; - - // wait for some time - rsi_delay_ms(5); - - // enable 1.8 volt bit in controller - smih_18v_signal_enable(); - - // select uhs mode - smih_uhs_mode_select(pSmihConfig->uhsModeSelect); - - // enable clock - RSI_CLK_SdMemClkConfig(M4CLK, 1, SDMEM_SOCPLLCLK, 1); - - // wait for some time - rsi_delay_ms(2); - } - - // Get relative card address - if (RSI_OK != RSI_SDIOH_SendRelativeCardAddressCmd3(pSmihConfig, 0x0)) { - return ERROR_SMIH; - } - - // Select Card (send cmd7) :send rca as argument - if (RSI_OK != RSI_SDIOH_SelectCardCmd7(pSmihConfig)) { - return ERROR_SMIH; - } - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, CD_DISABLE_ARG)) { - return ERROR_SMIH; - } -bus_send_again: - - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, LOW_SPEED_CHECK_ARG)) { - return ERROR_SMIH; - } - if (pSmihConfig->response[0] & LOW_SPEED_CHECK) { - if (pSmihConfig->response[0] & BIT4_MODE_CHECK) { - if (SMIH_BUS_WIDTH4 == pSmihConfig->busWidthMode) { - // configure 4bit mode - RSI_SDIOH_BusWidthConfig(pSmihConfig, SMIH_BUS_WIDTH4); - } - } else { - } - } else { - if (SMIH_BUS_WIDTH4 == pSmihConfig->busWidthMode) { - if (RSI_OK != RSI_SDIOH_BusWidthConfig(pSmihConfig, SMIH_BUS_WIDTH4)) { - return ERROR_SMIH; - } - } - } - while (1) { - // Enable function1 - if (RSI_OK == RSI_SDIOH_WriteCommandCmd52(pSmihConfig, FUCNTION1_CHECK_ARG)) { - if (!((pSmihConfig->response[0]) & FUNCTION1_ENABLE)) { - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, FUCNTION1_ENB_ARG)) { - return ERROR_SMIH; - } else { - break; - } - } else - break; - } - } - while (1) { - // Check for function ready - if (RSI_OK == RSI_SDIOH_WriteCommandCmd52(pSmihConfig, FUCNTION1_READY_ARG)) { - if (pSmihConfig->response[0] & FUNCTION1_READY) { - break; - } - } - } - // Interrupt Enable - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, FUNCTION1_INTR_ENB_ARG)) { - return ERROR_SMIH; - ; - } - // Check interrupts are enabled or not - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, FUNCTION1_INTR_CHECK_ARG)) { - return ERROR_SMIH; - } - // Check for 1bit or 4bit mode of I/O - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, BIT4_BUS_WIDTH_SET_ARG)) { - return ERROR_SMIH; - } - if (SMIH_BUS_WIDTH4 == pSmihConfig->busWidthMode) { - if (!(pSmihConfig->response[0] & BUS_BIT)) { - goto bus_send_again; - } - } - // Check for CD Disable - if (!(pSmihConfig->response[0] & (1 << 7))) { - return RSI_OK; - } - if (RSI_OK == RSI_SDIOH_WriteCommandCmd52(pSmihConfig, CSA_SUPPORT_ARG)) { - if (pSmihConfig->response[0] & (1 << 6)) { - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, CSA_ENABLE_ARG)) { - return ERROR_SMIH; - } - } - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, IO_BLOCKSIZE_ARG)) { - return ERROR_SMIH; - } - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, IO_BLOCKSIZE_ARG_1)) { - return ERROR_SMIH; - } - } - // High speed mode configuration - if (pSmihConfig->highSpeedEnable) { - while (1) { - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, CHECK_HIGH_SPEED_SUPPORT)) { - return ERROR_SMIH; - } - - if ((pSmihConfig->response[0] & HIGH_SPEED_BIT)) { - break; - } - } - // high speed mode switching command - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, ENABLE_HIGH_SPEED_MODE_ARG)) { - return ERROR_SMIH; - } - } - // uhs mode configuration - if (pSmihConfig->uhsModeSelect != 0) { - while (1) { - // ask card about uhs support modes capability - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, CHECK_UHS_SUPPORT_MODES)) { - return ERROR_SMIH; - } - if ((pSmihConfig->response[0] & UHS_SUPPORT_BITS)) { - // card supports uhs modes - break; - } - } - // Send UHS mode to the slave - switch (pSmihConfig->uhsModeSelect) { - // configure uhs modes - case UHS_SDR12: - break; - case UHS_SDR25: - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, UHS_1_SDR25_MODE_ARG)) { - return ERROR_SMIH; - } - break; - case UHS_SDR50: - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, UHS_1_SDR50_MODE_ARG)) { - return ERROR_SMIH; - } - break; - case UHS_SDR104: - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, UHS_1_SDR104_MODE_ARG)) { - return ERROR_SMIH; - } - break; - case UHS_DDR50: - if (RSI_OK != RSI_SDIOH_WriteCommandCmd52(pSmihConfig, UHS_1_DDR50_MODE_ARG)) { - return ERROR_SMIH; - } - break; - default: - return INVALID_PARAMETERS; - } - } - } - return RSI_OK; -} -#endif diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_sdmem.c b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_sdmem.c deleted file mode 100644 index 621253722..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_sdmem.c +++ /dev/null @@ -1,1242 +0,0 @@ -/******************************************************************************* -* @file rsi_sdmem.c -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Include Files - -#include "rsi_ccp_user_config.h" -#if defined(CHIP_9118) - -#include "clock_update.h" - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_GoIdleStateCmd0(SMIH_CARD_CONFIG_T *pSmihConfig) - * @brief This API is used to send the CMD0 to the memory card. - * @param[in] pSmihConfig : Pointer to the smih config structure. - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMEM_GoIdleStateCmd0(SMIH_CARD_CONFIG_T *pSmihConfig) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.blockSize = 0x0; - data.blockCount = 0x0; - data.data = NULL; - data.direction = SMIH_WRITE_DIRECTION; - cmd.cmdIdx = 0; - cmd.cmdArg = 0x0; - cmd.responseTypeSelect = SMIH_NO_RESPONSE; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_SendCardInterfaceConditionCmd8(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) - * @brief This API is used to send interface condition command(Cmd8). - * @param[in] pSmihConfig : Pointer to the smih config structure. - * @param[in] Arg : Command argument to send - * @return RSI_OK : If command sent successfully - * ERROR_TIMEOUT : If command error timeout occures. - */ -rsi_error_t RSI_SDMEM_SendCardInterfaceConditionCmd8(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.blockSize = 0x0; - data.blockCount = 0x0; - data.data = NULL; - data.direction = SMIH_WRITE_DIRECTION; - cmd.cmdArg = Arg; - cmd.cmdIdx = CMD_8; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_SendApplicationCommandCmd55(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) - * @brief This API is used to send the application command(CMD55) to the memory card. - * @param[in] pSmihConfig : Pointer to the smih config structure. - * @param[in] Arg : Argument to the command - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMEM_SendApplicationCommandCmd55(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.data = NULL; - data.blockSize = 0x0; - data.blockCount = 0x0; - data.direction = SMIH_WRITE_DIRECTION; - cmd.cmdIdx = CMD_55; - cmd.cmdArg = Arg << 16; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_SetCardOperationConditionAcmd41(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) - * @brief This API is used to send operation condition command(Acmd41). - * @param[in] Arg : Command argument to send - * @param[in] pSmihConfig : Pointer to the Command info structure - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMEM_SetCardOperationConditionAcmd41(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.data = NULL; - data.blockSize = 0x0; - data.blockCount = 0x0; - data.direction = SMIH_WRITE_DIRECTION; - cmd.cmdIdx = (CMD_40_hex + CMD_41); - cmd.cmdArg = Arg; - cmd.responseTypeSelect = SMIH_RESPONSE_R3R4; - - transfer.command = &cmd; - transfer.data = &data; - - if (RSI_OK == RSI_SDMEM_SendApplicationCommandCmd55(pSmihConfig, pSmihConfig->rca)) { - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - } else { - return ERROR_SMIH; - } - memcpy((void *)&pSmihConfig->ocr, &transfer.command->response[0], sizeof(pSmihConfig->ocr)); - if (0 == (transfer.command->response[0] & ACMD41_BUSY_BIT)) { - return ERROR_SMIH; //operation is in progress - } - pSmihConfig->cardType = SMIH_CARD_STANDARD; - if (0 != (transfer.command->response[0] & ACMD41_OCR_BIT)) { - pSmihConfig->cardType = SMIH_CARD_HIGH_CAPACITY; - } else { - pSmihConfig->cardType = SMIH_CARD_STANDARD; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_SwitchVoltageCmd11(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg) - * @brief This API is used to send voltage switch command(SDIO_CMD11). - * @param[in] pSmihConfig : Pointer to the Command info structure - * @param[in] Arg : Command argument to send - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMEM_SwitchVoltageCmd11(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.data = NULL; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_WRITE_DIRECTION; - cmd.cmdIdx = CMD_11; - cmd.cmdArg = 0; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } else { - // set Relative Card Address - pSmihConfig->rca = transfer.command->response[0] >> 16; - return RSI_OK; - } -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_SendCidCmd2(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) - * @brief This API is used to send CMD2(to get CID of the card). - * @param[in] pSmihConfig : Pointer to the Command info structure - * @param[in] Arg : Command argument to send - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMEM_SendCidCmd2(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) -{ - uint32_t i = 0; - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.data = NULL; - data.blockSize = 0x0; - data.blockCount = 0x0; - data.direction = SMIH_WRITE_DIRECTION; - cmd.cmdIdx = CMD_2; - cmd.cmdArg = 0; - cmd.responseTypeSelect = SMIH_RESPONSE_R2; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK == pSmihConfig->cmd_transfer(&transfer)) { - for (i = 0; i < 15; i++) { - pSmihConfig->cid[i] = *((uint8_t *)(transfer.command->response) + (14 - i)); - } - return RSI_OK; - } - return ERROR_SMIH; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDIOH_SendRelativeAddressCmd3(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg) - * @brief This API is used to send CMD3(send card relative address). - * @param[in] pSmihConfig : Pointer to the Command info structure - * @param[in] CmdArg : Command argument to send - * @return RSI_OK : If command sent successfully - * ERROR_TIMEOUT : If command error timeout occures. - */ -rsi_error_t RSI_SDIOH_SendRelativeAddressCmd3(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t CmdArg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.data = NULL; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_WRITE_DIRECTION; - cmd.cmdIdx = CMD_3; - cmd.cmdArg = 0; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK == pSmihConfig->cmd_transfer(&transfer)) { - // set Relative card address - pSmihConfig->rca = (transfer.command->response[0] >> 16); - return RSI_OK; - } else { - return ERROR_SMIH; - } -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_SendCsdCmd9(SMIH_CARD_CONFIG_T *pSmihConfig) - * @brief This API is used to send CMD9(CSD) to the sd card - * @param[in] pSmihConfig : Pointer to the Command info structure - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMEM_SendCsdCmd9(SMIH_CARD_CONFIG_T *pSmihConfig) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - CSD_REG_VERSION1_T *pSdCsd = NULL; - CSD_REG_VERSION2_T *pSdhcCsd = NULL; - uint32_t u32NumSector = 0; - uint32_t u32Csize = 0; - uint32_t u32CsizeMulti = 0; - - data.data = NULL; - data.blockSize = 0x0; - data.blockCount = 0x0; - data.direction = SMIH_WRITE_DIRECTION; - cmd.cmdIdx = CMD_9; - cmd.cmdArg = pSmihConfig->rca << 16; - cmd.responseTypeSelect = SMIH_RESPONSE_R2; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - memcpy(pSmihConfig->csd, transfer.command->response, sizeof(transfer.command->response)); - - pSdCsd = (CSD_REG_VERSION1_T *)&pSmihConfig->csd[0]; - pSdhcCsd = (CSD_REG_VERSION2_T *)&pSmihConfig->csd[0]; - - if (pSmihConfig->cardType == SMIH_CARD_STANDARD) { - // Standard Capacity card - u32Csize = - ((unsigned int)pSdCsd->deviceSize3 << 10) + ((unsigned int)pSdCsd->deviceSize2 << 2) + pSdCsd->deviceSize1; - u32CsizeMulti = (pSdCsd->deviceSizeMultiplier2 << 1) + pSdCsd->deviceSizeMultiplier1; - u32NumSector = (u32Csize + 1) << (u32CsizeMulti + 2); - if (pSdCsd->readBlockLength == 0x0A) { - u32NumSector *= 2; - } else if (pSdCsd->readBlockLength == 0x0B) { - u32NumSector *= 4; - } - } else { - // high capacity card - u32Csize = - ((unsigned int)pSdhcCsd->deviceSize3 << 16) + ((unsigned int)pSdhcCsd->deviceSize2 << 8) + pSdhcCsd->deviceSize1; - u32NumSector = (u32Csize + 1) * 1024; - } - pSmihConfig->maxSectorNum = u32NumSector; - - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_SelectCardCmd7(SMIH_CARD_CONFIG_T *pSmihConfig) - * @brief This API is used to send SDIO_CMD7(to select the card). - * @param[in] pSmihConfig : Pointer to the Command info structure - * @return RSI_OK : If command sent successfully - * ERROR_TIMEOUT : If command error timeout occures. - */ -rsi_error_t RSI_SDMEM_SelectCardCmd7(SMIH_CARD_CONFIG_T *pSmihConfig) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.data = NULL; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_WRITE_DIRECTION; - - cmd.cmdIdx = CMD_7; - cmd.cmdArg = pSmihConfig->rca << 16; - cmd.responseTypeSelect = SMIH_RESPONSE_R1BR5B; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_SetBusWidthAcmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) - * @brief This API is used to send ACMD6(set bus width command to the card). - * @param[in] pSmihConfig : Pointer to the Command info structure - * @param[in] Arg : Command argument to send - * @return RSI_OK : If command sent successfully - * ERROR_TIMEOUT : If command error timeout occures. - */ -rsi_error_t RSI_SDMEM_SetBusWidthAcmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.data = NULL; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_WRITE_DIRECTION; - - cmd.cmdIdx = (CMD_40_hex + CMD_6); - cmd.cmdArg = Arg; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != RSI_SDMEM_SendApplicationCommandCmd55(pSmihConfig, pSmihConfig->rca)) { - return ERROR_SMIH; - } - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_OperationSwitchFunctionReadCmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument) - * @brief This API is used to send the switch function read command(asks card about its capability). - * @param[in] pSmihConfig : Pointer to the Command info structure - * @param[in] Argument : Argument to the command - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMEM_OperationSwitchFunctionReadCmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.data = 0; - data.blockSize = 1; - data.blockCount = 1; - data.direction = SMIH_READ_DIRECTION; - - cmd.cmdIdx = CMD_6; - cmd.cmdArg = Argument; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_GetCardOperationConditionAcmd41(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) - * @brief This API is used to send operation condition command(ACMD41). - * @param[in] pSmihConfig : Pointer to the smih command info structure - * @param[in] Arg : Command argument to send - * @return RSI_OK : If command sent successfully - * ERROR_TIMEOUT : If command error timeout occures. - */ -rsi_error_t RSI_SDMEM_GetCardOperationConditionAcmd41(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.data = NULL; - data.blockSize = 0x0; - data.blockCount = 0x0; - data.direction = SMIH_WRITE_DIRECTION; - - cmd.cmdIdx = (CMD_40_hex + CMD_41); - cmd.cmdArg = Arg; - cmd.responseTypeSelect = SMIH_RESPONSE_R3R4; - - // transfer Command - if (RSI_OK != RSI_SDMEM_SendApplicationCommandCmd55(pSmihConfig, pSmihConfig->rca)) { - return ERROR_SMIH; - } - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - - memcpy((void *)&pSmihConfig->ocr, &transfer.command->response[0], sizeof(pSmihConfig->ocr)); - if (0 == Arg) { - - } else if ((transfer.command->response[0] & ACMD41_BUSY_BIT) == 0) { - // set mode - return ERROR_SMIH; //operation is in progress - } - pSmihConfig->cardType = SMIH_CARD_STANDARD; - if ((transfer.command->response[0] & ACMD41_OCR_BIT) != 0) { - pSmihConfig->cardType = SMIH_CARD_HIGH_CAPACITY; - } else { - pSmihConfig->cardType = SMIH_CARD_STANDARD; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_CardBusWidthConfig(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t BusWidth) - * @brief This API is used to configure the bus width. - * @param[in] pSmihConfig : Pointer to the Command info structure - * @param[in] BusWidth : bus width mode - * possible values are 0-1bit - * 1-4bit - * 2-8bit - * @return RSI_OK : If command sent successfully - * ERROR_TIMEOUT : If command error timeout occures. - */ -rsi_error_t RSI_SDMEM_CardBusWidthConfig(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t BusWidth) -{ - uint32_t cmdArg = 0; - boolean_t hostMode; - if (BusWidth == SMIH_BUS_WIDTH1) { - cmdArg = 0; - hostMode = FALSE; - } else if (BusWidth == SMIH_BUS_WIDTH4) { - cmdArg = 0x2; //Need to talk with spandana - hostMode = TRUE; - } else if (BusWidth == SMIH_BUS_WIDTH8) { - cmdArg = 0x2; - hostMode = TRUE; - } - // Ask card about its capability - if (RSI_OK != RSI_SDMEM_SetBusWidthAcmd6(pSmihConfig, cmdArg)) { - return ERROR_SMIH; - } else { - // set bus width mode in controller - smih_bus_width_set(hostMode); - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_OperationSwitchFunctionWriteCmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument) - * @brief This API is used to send the switch function command. - * @param[in] pSmihConfig : Pointer to the Command info structure - * @param[in] Argument : Argument to the command - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMEM_OperationSwitchFunctionWriteCmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Argument) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.data = 0; - data.blockSize = 0; - data.blockCount = 0; - data.direction = SMIH_WRITE_DIRECTION; - - cmd.cmdIdx = CMD_6; - cmd.cmdArg = Argument; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_BlocksWrite(SMIH_CARD_CONFIG_T *pSmihConfig, - const uint8_t *DataIn, - uint32_t BlockIndex, - uint32_t BlockCount) - * @brief This API is used to write multiple blocks of data to the sd card. - * @param[in] pSmihConfig : Pointer to the sd card config structure - * @param[in] DataIn : Data buffer to send - * @param[in] BlockIndex : block index value - * @param[in] BlockCount : blocks count value - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMEM_BlocksWrite(SMIH_CARD_CONFIG_T *pSmihConfig, - const uint8_t *DataIn, - uint32_t BlockIndex, - uint32_t BlockCount) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - if (pSmihConfig == NULL || DataIn == NULL) { - return INVALID_PARAMETERS; - } - if (SMIH_CARD_STANDARD == pSmihConfig->cardType) { - BlockIndex = BlockIndex << 9; - } - if (BlockCount == 1) { - // single block write - if (pSmihConfig->maxSectorNum < BlockIndex) { - return INVALID_PARAMETERS; - } - data.data = DataIn; - data.blockSize = BLOCK_SIZE_512; - data.blockCount = 1; - data.direction = SMIH_WRITE_DIRECTION; - - cmd.cmdIdx = CMD_24; - cmd.cmdArg = BlockIndex; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - } else { - // multiple block write - if (((pSmihConfig->maxSectorNum - BlockIndex) < BlockCount) - || (pSmihConfig->maxSectorNum < (BlockIndex + BlockCount))) { - return INVALID_PARAMETERS; - } - data.data = DataIn; - data.blockSize = BLOCK_SIZE_512; - data.blockCount = BlockCount; - data.direction = SMIH_WRITE_DIRECTION; - - cmd.cmdIdx = CMD_25; - cmd.cmdArg = BlockIndex; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - } - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_BlocksRead(SMIH_CARD_CONFIG_T *pSmihConfig, - uint8_t *DataOut, - uint32_t BlockIndex, - uint32_t BlockCount) - * @brief This API is used to read multiple blocks of data from the sd card. - * @param[in] pSmihConfig : Pointer to the sd card config structure - * @param[in] DataIn : Data buffer to send - * @param[in] BlockIndex : block index value - * @param[in] BlockCount : blocks count value - * @return RSI_OK : Command sent successfully - * ERROR_TIMEOUT : Command error timeout occured. - */ -rsi_error_t RSI_SDMEM_BlocksRead(SMIH_CARD_CONFIG_T *pSmihConfig, - uint8_t *DataOut, - uint32_t BlockIndex, - uint32_t BlockCount) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - if (NULL == pSmihConfig || NULL == DataOut) { - return INVALID_PARAMETERS; - } - if (SMIH_CARD_STANDARD == pSmihConfig->cardType) { - BlockIndex = BlockIndex << 9; - } - if (BlockCount == 1) { - // single block read - if (pSmihConfig->maxSectorNum < BlockIndex) { - return INVALID_PARAMETERS; - } - cmd.cmdIdx = CMD_17; - cmd.cmdArg = BlockIndex; - data.data = DataOut; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - - data.blockSize = BLOCK_SIZE_512; - data.blockCount = 1; - data.direction = SMIH_READ_DIRECTION; - } else { - // multiple block read - if (((pSmihConfig->maxSectorNum - BlockIndex) < BlockCount) - || (pSmihConfig->maxSectorNum < (BlockIndex + BlockCount))) { - return INVALID_PARAMETERS; - } - data.data = DataOut; - data.blockSize = BLOCK_SIZE_512; - data.blockCount = BlockCount; - data.direction = SMIH_READ_DIRECTION; - cmd.cmdIdx = CMD_18; - cmd.cmdArg = BlockIndex; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - } - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_EnableHighSpeed(SMIH_CARD_CONFIG_T *pSmihConfig, boolean_t HighSpeed, uint32_t Clock) - * @brief This API is used to enable high speed mode - * @param[in] pSmihConfig : Pointer to the smih card configuration structure - * @param[in] HighSpeed : High speed enable bit - * 1- for high speed enable. - * 0- for high speed disable. - * @param[in] Clock : Clock frequency - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMEM_EnableHighSpeed(SMIH_CARD_CONFIG_T *pSmihConfig, boolean_t HighSpeed, uint32_t Clock) -{ - uint32_t actualClock = 0; - uint32_t highSpeedValue = 0; - uint32_t arg = 0; - - if (HighSpeed == 0) { - actualClock = 400000; - } else { - actualClock = Clock; - highSpeedValue = 1; - } - arg = (BIT(31) | 0xFFF0); - arg |= (highSpeedValue)&0xF; - - // Send switch command - if (RSI_OK != RSI_SDMEM_OperationSwitchFunctionWriteCmd6(pSmihConfig, arg)) { - return ERROR_SMIH; - } else { - smih_clock_config(pSmihConfig, actualClock); - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.HIGH_SPEED_ENABLE = 0x1; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn void RSI_SDMEM_PinMux(void) - * @brief This API is used to configure GPIOs for SDMEM operations. - * @return none - */ -void RSI_SDMEM_PinMux(void) -{ - // If GPIO_SET1 is equals to 0 then set2 gpios of sdmem will be used -#if (GPIO_SET1 == 0) - RSI_EGPIO_HostPadsGpioModeEnable(SD_CLK_PIN); - RSI_EGPIO_HostPadsGpioModeEnable(SD_CMD_PIN); - RSI_EGPIO_HostPadsGpioModeEnable(SD_D0_PIN); - RSI_EGPIO_HostPadsGpioModeEnable(SD_D1_PIN); - RSI_EGPIO_HostPadsGpioModeEnable(SD_D2_PIN); - RSI_EGPIO_HostPadsGpioModeEnable(SD_D3_PIN); -#endif - RSI_EGPIO_PadSelectionEnable(SD_CLK_PAD); - RSI_EGPIO_PadSelectionEnable(SD_CMD_PAD); - RSI_EGPIO_PadSelectionEnable(SD_D0_PAD); - RSI_EGPIO_PadSelectionEnable(SD_D1_PAD); - RSI_EGPIO_PadSelectionEnable(SD_D2_PAD); - RSI_EGPIO_PadSelectionEnable(SD_D3_PAD); - - RSI_EGPIO_PadReceiverEnable(SD_CLK_PIN); - RSI_EGPIO_PadReceiverEnable(SD_CMD_PIN); - RSI_EGPIO_PadReceiverEnable(SD_D0_PIN); - RSI_EGPIO_PadReceiverEnable(SD_D1_PIN); - RSI_EGPIO_PadReceiverEnable(SD_D2_PIN); - RSI_EGPIO_PadReceiverEnable(SD_D3_PIN); - - RSI_EGPIO_PadDriverDisableState(SD_CMD_PIN, Pullup); - RSI_EGPIO_PadDriverDisableState(SD_D0_PIN, Pullup); - RSI_EGPIO_PadDriverDisableState(SD_D1_PIN, Pullup); - RSI_EGPIO_PadDriverDisableState(SD_D2_PIN, Pullup); - RSI_EGPIO_PadDriverDisableState(SD_D3_PIN, Pullup); - - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_CLK_PIN, SD_CLK_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_CMD_PIN, SD_CMD_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_D0_PIN, SD_D0_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_D1_PIN, SD_D1_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_D2_PIN, SD_D2_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_D3_PIN, SD_D3_MUX); - -#if _8BIT_MODE - RSI_EGPIO_PadSelectionEnable(SD_D4_PAD); - RSI_EGPIO_PadSelectionEnable(SD_D5_PAD); - RSI_EGPIO_PadSelectionEnable(SD_D6_PAD); - RSI_EGPIO_PadSelectionEnable(SD_D7_PAD); - - RSI_EGPIO_PadReceiverEnable(SD_D4_PIN); - RSI_EGPIO_PadReceiverEnable(SD_D5_PIN); - RSI_EGPIO_PadReceiverEnable(SD_D6_PIN); - RSI_EGPIO_PadReceiverEnable(SD_D7_PIN); - - RSI_EGPIO_PadDriverDisableState(SD_D4_PIN, Pullup); - RSI_EGPIO_PadDriverDisableState(SD_D5_PIN, Pullup); - RSI_EGPIO_PadDriverDisableState(SD_D6_PIN, Pullup); - RSI_EGPIO_PadDriverDisableState(SD_D7_PIN, Pullup); - - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_D4_PIN, SD_D4_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_D5_PIN, SD_D5_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_D6_PIN, SD_D6_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_D7_PIN, SD_D7_MUX); -#endif - RSI_EGPIO_PadSelectionEnable(SD_WP_PAD); - RSI_EGPIO_PadSelectionEnable(SD_CD_PAD); - - RSI_EGPIO_PadReceiverEnable(SD_CD_PIN); - RSI_EGPIO_PadReceiverEnable(SD_WP_PIN); - - RSI_EGPIO_PadDriverDisableState(SD_WP_PIN, Pulldown); - RSI_EGPIO_PadDriverDisableState(SD_CD_PIN, Pulldown); - - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_CD_PIN, SD_CD_MUX); - RSI_EGPIO_SetPinMux(EGPIO, 0, SD_WP_PIN, SD_WP_MUX); -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMEM_Enumeration(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event) - * @brief This API is used for SD memory enumeration process - * @param[in] pSmihConfig : Pointer to the smih card configuration structure - * @param[in] Event : event handler to be register - * @return RSI_OK : If commands sent successfully in enumeration process. - * ERROR_TIMEOUT : If commands error timeout occures. - */ -rsi_error_t RSI_SDMEM_Enumeration(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event) -{ - uint8_t val = 0; - uint32_t arg = 0; - uint32_t i; - SMIH_CARD_CONFIG_T *SmihInfo = NULL; - if (pSmihConfig == 0) { - return INVALID_PARAMETERS; - } - // Configure gpios in smih mode - RSI_SDMEM_PinMux(); - - if (RSI_OK != RSI_SD_HostInit(pSmihConfig, Event, 1)) { - return ERROR_SMIH; - } else { - // Commands for sdio enumeration - rsi_delay_ms(5); - - // Reset card(send command 0) - if (RSI_OK != RSI_SDMEM_GoIdleStateCmd0(pSmihConfig)) { - return ERROR_SMIH; - } - - // send interface condition - if (RSI_OK != RSI_SDMEM_SendCardInterfaceConditionCmd8(pSmihConfig, 0x1AA)) { - val = 0; - } else { - val = 1; - } - // send ACMD41 - if (RSI_OK != RSI_SDMEM_GetCardOperationConditionAcmd41(pSmihConfig, 0x0)) { - return ERROR_SMIH; - } - if (pSmihConfig->uhsModeSelect == 0) { - arg = ACMD41_VOLTAGE; - if (1 == val) { - arg |= ACMD41_HCS; - } - } else { - arg = ACMD41_UHS_REQ; - if (1 == val) { - arg |= ACMD41_HCS; - } - } - // send operation condition - i = 5000; - while (i != 0) { - if (RSI_SDMEM_SetCardOperationConditionAcmd41(pSmihConfig, arg) == RSI_OK) { - break; - } - i--; - } - // configure uhs mode if enabled - if (pSmihConfig->uhsModeSelect != 0) { - rsi_delay_ms(5); - RSI_SDMEM_SwitchVoltageCmd11(SmihInfo, 0x0); - M4CLK->SD_MEM_CLOCK_REG_b.SD_MEM_INTF_CLK_SEL = 0x7; - // wait for some time - rsi_delay_ms(5); - switch (pSmihConfig->uhsModeSelect) { - case UHS_NONE: - break; - case UHS_SDR12: - break; - case UHS_SDR25: - SMIH->SMIH_HOST_CONTROL_2_REGISTER_b.UHS_MODE_SELECT = 0x1; - break; - case UHS_SDR50: - SMIH->SMIH_HOST_CONTROL_2_REGISTER_b.UHS_MODE_SELECT = 0x2; - break; - case UHS_SDR104: - SMIH->SMIH_HOST_CONTROL_2_REGISTER_b.UHS_MODE_SELECT = 0x3; - break; - case UHS_DDR50: - break; - default: - return INVALID_PARAMETERS; - } - // enable 1.8v signalling bit - SMIH->SMIH_HOST_CONTROL_2_REGISTER_b._1_8V_SIGNALING_ENABLE = 0x1; - RSI_CLK_SdMemClkConfig(M4CLK, 1, SDMEM_SOCPLLCLK, 1); - - // wait for some - rsi_delay_ms(5); - } - // send cmd2 - if (RSI_OK != RSI_SDMEM_SendCidCmd2(pSmihConfig, 0x0)) { - return ERROR_SMIH; - } - // send cmd3 - if (RSI_OK != RSI_SDIOH_SendRelativeAddressCmd3(pSmihConfig, 0x0)) { - return ERROR_SMIH; - } - // send cmd9 - if (RSI_OK != RSI_SDMEM_SendCsdCmd9(pSmihConfig)) { - return ERROR_SMIH; - } - // select card :send rca as argument - if (RSI_OK != RSI_SDMEM_SelectCardCmd7(pSmihConfig)) { - return ERROR_SMIH; - } - // bus width configuration - if (pSmihConfig->busWidthMode == 1) { - if (RSI_OK != RSI_SDMEM_CardBusWidthConfig(pSmihConfig, SMIH_BUS_WIDTH4)) { - return ERROR_SMIH; - } - } - // enable high speed mode - if (TRUE == pSmihConfig->highSpeedEnable) { - rsi_delay_ms(1); - if (RSI_OK != RSI_SDMEM_EnableHighSpeed(pSmihConfig, TRUE, 20000000)) { - return ERROR_SMIH; - } - rsi_delay_ms(10); - } - if (pSmihConfig->uhsModeSelect != 0) { - switch (pSmihConfig->uhsModeSelect) { - case UHS_SDR12: - break; - case UHS_SDR25: - // uhs support asking to card - if (RSI_OK != RSI_SDMEM_OperationSwitchFunctionReadCmd6(pSmihConfig, 0x00000001)) { - return ERROR_SMIH; - } - // switching mode - if (RSI_OK != RSI_SDMEM_OperationSwitchFunctionWriteCmd6(pSmihConfig, 0x00000001)) { - return ERROR_SMIH; - } - break; - case UHS_SDR50: - // uhs support asking to card - if (RSI_OK != RSI_SDMEM_OperationSwitchFunctionReadCmd6(pSmihConfig, 0x00000002)) { - return ERROR_SMIH; - } - // switching mode - if (RSI_OK != RSI_SDMEM_OperationSwitchFunctionWriteCmd6(pSmihConfig, 0x00000002)) { - return ERROR_SMIH; - } - break; - case UHS_SDR104: - // uhs support asking to card - if (RSI_OK != RSI_SDMEM_OperationSwitchFunctionReadCmd6(pSmihConfig, 0x00000003)) { - return ERROR_SMIH; - } - // switching mode - if (RSI_OK != RSI_SDMEM_OperationSwitchFunctionWriteCmd6(pSmihConfig, 0x00000003)) { - return ERROR_SMIH; - } - break; - default: - return INVALID_PARAMETERS; - } - } - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMMC_Enumeration(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event) - * @brief This API is used for SD MMC card enumeration process - * @param[in] pSmihConfig : Pointer to the smih card configuration structure - * @param[in] Event : event handler to be register - * @return RSI_OK : If MMC card enumeration successfully done - * ERROR_TIMEOUT : If the commands error timeout occures. - */ -rsi_error_t RSI_SDMMC_Enumeration(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event) -{ - if (pSmihConfig == 0) { - return INVALID_PARAMETERS; - } - // Configure gpios in smih mode - RSI_SDMEM_PinMux(); - - if (RSI_OK != RSI_SD_HostInit(pSmihConfig, Event, 1)) { - return ERROR_SMIH; - } else { - // Commands for sdio enumeration - rsi_delay_ms(5); - - // Reset card(send command 0) - if (RSI_OK != RSI_SDMEM_GoIdleStateCmd0(pSmihConfig)) { - return ERROR_SMIH; - } - while (1) { - if (RSI_OK == RSI_SDMMC_SendOperationConditionCmd1(pSmihConfig, 0x40FF8000)) { - break; - } - } - // send cmd2 - if (RSI_OK != RSI_SDMEM_SendCidCmd2(pSmihConfig, 0x0)) { - return ERROR_SMIH; - } - // send cmd3 - if (RSI_OK != RSI_SDIOH_SendRelativeAddressCmd3(pSmihConfig, 0x0)) { - return ERROR_SMIH; - } - // select card :send rca as argument - if (RSI_OK != RSI_SDMEM_SelectCardCmd7(pSmihConfig)) { - return ERROR_SMIH; - } - // send csd command to card - if (RSI_OK != RSI_SDMMC_SendExtentCsdCmd(pSmihConfig)) { - return ERROR_SMIH; - } - // bus width configuration - if (pSmihConfig->busWidthMode == 1) { - if (RSI_OK != RSI_SDMMC_ChangeBusWidthMode(pSmihConfig, SMIH_BUS_WIDTH4)) { - return ERROR_SMIH; - } - rsi_delay_ms(5); - } else if (pSmihConfig->busWidthMode == 2) { - if (RSI_OK != RSI_SDMMC_ChangeBusWidthMode(pSmihConfig, SMIH_BUS_WIDTH8)) { - return ERROR_SMIH; - } - rsi_delay_ms(5); - } - // enable high speed mode - if (TRUE == pSmihConfig->highSpeedEnable) { - rsi_delay_ms(1); - if (RSI_OK != RSI_SDMMC_HighSpeedMode(pSmihConfig, TRUE, pSmihConfig->clock)) { - return ERROR_SMIH; - } - rsi_delay_ms(1); - } - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMMC_SendOperationConditionCmd1(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) - * @brief This API is used to send MMC operation condition command. - * @param[in] pSmihConfig : Pointer to the smih card configuration structure - * @param[in] Arg : Argument to the command - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMMC_SendOperationConditionCmd1(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.blockSize = 0x0; - data.blockCount = 0x0; - data.data = NULL; - data.direction = SMIH_WRITE_DIRECTION; - - cmd.cmdIdx = CMD_1; - cmd.cmdArg = Arg; - cmd.responseTypeSelect = SMIH_RESPONSE_R3R4; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - if (transfer.command->response[0] & BIT(31)) { - pSmihConfig->cardType = SMIH_CARD_STANDARD; - if (transfer.command->response[0] & BIT(30)) { - pSmihConfig->cardType = SMIH_CARD_HIGH_CAPACITY; - } - } else { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMMC_SendExtentCsdCmd(SMIH_CARD_CONFIG_T *pSmihConfig) - * @brief This API is used to send csd command to the MMC card. - * @param[in] pSmihConfig : Pointer to the smih card configuration structure - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMMC_SendExtentCsdCmd(SMIH_CARD_CONFIG_T *pSmihConfig) -{ - uint8_t ext_csd[BLOCK_SIZE_512] = { 0 }; - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - uint32_t *preadVal = NULL; - - data.blockSize = BLOCK_SIZE_512; - data.blockCount = 1; - data.data = ext_csd; - data.direction = SMIH_READ_DIRECTION; - - cmd.cmdIdx = (CMD_80_hex | CMD_8); //mmc cmd 8 - cmd.cmdArg = pSmihConfig->rca << 16; - cmd.responseTypeSelect = SMIH_RESPONSE_R1R5R6R7; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - rsi_delay_ms(10); - - preadVal = (uint32_t *)&ext_csd[212]; - pSmihConfig->maxSectorNum = *preadVal; - - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMMC_ChangeBusWidthMode(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t bus_wdith) - * @brief This API is used to change bus width mode to MMC card. - * @param[in] pSmihConfig : Pointer to the smih card configuration structure - * @param[in] bus_wdith : bus width mode to be configured - * possible values are SMIH_BUS_WIDTH1 : 1 bit width - * SMIH_BUS_WIDTH4 : 4 bit width - * SMIH_BUS_WIDTH8 : 8 bit width - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMMC_ChangeBusWidthMode(SMIH_CARD_CONFIG_T *pSmihConfig, uint8_t bus_wdith) -{ - uint32_t argument = 0; - switch (bus_wdith) { - case SMIH_BUS_WIDTH1: - argument = (0x3 << 24) | (0xB7 << 16) | (0x0 << 8) | (0x0 << 0); - break; - case SMIH_BUS_WIDTH4: - argument = (0x3 << 24) | (0xB7 << 16) | (0x1 << 8) | (0x0 << 0); - break; - case SMIH_BUS_WIDTH8: - argument = (0x3 << 24) | (0xB7 << 16) | (0x2 << 8) | (0x0 << 0); - break; - default: - return INVALID_PARAMETERS; - } - // send switch command - if (RSI_OK != RSI_SDMMC_SwitchFunctionCmd6(pSmihConfig, argument)) { - return ERROR_SMIH; - } - // set bus width - smih_bus_width_set(bus_wdith); - - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMMC_SwitchFunctionCmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) - * @brief This API is used to send switch mode function command to MMC card. - * @param[in] pSmihConfig : Pointer to the smih card configuration structure - * @param[in] Arg : Command argument to send - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMMC_SwitchFunctionCmd6(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t Arg) -{ - SMIH_TRANSFER_T transfer = { 0 }; - SMIH_CMD_FEILD_T cmd = { 0 }; - SMIH_DATA_FEILD_T data = { 0 }; - - data.blockSize = 0; - data.blockCount = 0; - data.data = NULL; - data.direction = SMIH_WRITE_DIRECTION; - cmd.cmdIdx = CMD_6; - cmd.cmdArg = Arg; - cmd.responseTypeSelect = SMIH_RESPONSE_R1BR5B; - - transfer.command = &cmd; - transfer.data = &data; - - // transfer Command - if (RSI_OK != pSmihConfig->cmd_transfer(&transfer)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SDMMC_HighSpeedMode(SMIH_CARD_CONFIG_T *pSmihConfig, boolean_t HighSpeed, uint32_t Clock) - * @brief This API is used to enable high speed mode to MMC card. - * @param[in] pSmihConfig : Pointer to the smih card configuration structure - * @param[in] HighSpeed : high speed value : 1 for enbale - * 0 for disable - * @param[in] Clock : Clock frequency - * @return RSI_OK : If the command sent successfully - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t RSI_SDMMC_HighSpeedMode(SMIH_CARD_CONFIG_T *pSmihConfig, boolean_t HighSpeed, uint32_t Clock) -{ - uint32_t clk = 0; - uint32_t arg = 0; - uint32_t highspeed = 0; - if (HighSpeed == 1) { - highspeed = 1; - clk = Clock; - arg = (0x3 << 24) | (0xB9 << 16) | (0x0 << 8) | (0x0 << 0); - } else { - highspeed = 0; - clk = 400 * 1000; - arg = (0x3 << 24) | (0xB9 << 16) | (0x0 << 8) | (0x0 << 0); - } - // Send switch mode command to card - if (RSI_OK != RSI_SDMMC_SwitchFunctionCmd6(pSmihConfig, arg)) { - return ERROR_SMIH; - } - // Configure clock - smih_clock_config(pSmihConfig, clk); - - // Enable or disable high speed mode - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.HIGH_SPEED_ENABLE = highspeed; - - return RSI_OK; -} -#endif diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_smih.c b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_smih.c deleted file mode 100644 index 42fa7bba3..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_smih.c +++ /dev/null @@ -1,1184 +0,0 @@ -/******************************************************************************* -* @file rsi_smih.c -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Include Files - -#include "rsi_ccp_user_config.h" -#if defined(CHIP_9118) - -static SMIH_TRANSFER_T *CommandInProgress = 0; -static SMIH_CONFIG_MODES_T *modesConfig = 0; -static SMIH_CONFIG_MODES_T modeConfig; -static SMIH_ADMA_DESC_TABLE_T Adma2DescriptorTable[2] = { 0 }; -volatile static SMIH_EVENT_T event; - -#define SD_IRQHandler IRQ068_Handler - -// SMIH CONTROLLER RELATED FUNCTIONS -/*==============================================*/ -/** - * @fn rsi_error_t RSI_SD_HostInit(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event, uint8_t MemType) - * @brief This API is used to initialize the smih host configuration - * @param[in] pSmihConfig : Pointer to the smih card configuration structure - * @param[in] Event : event handler to be register - * @param[in] MemType : type of operation to be pragram - * 1 for memory operations , - * 0 for IO operations - * @return RSI_OK : If host initialized successfully - */ -rsi_error_t RSI_SD_HostInit(SMIH_CARD_CONFIG_T *pSmihConfig, ARM_SMIH_SignalEvent_t Event, uint8_t MemType) -{ - SMIH_CONFIG_MODES_T commandCfg; - if (pSmihConfig == 0) { - return INVALID_PARAMETERS; - } - // sleepclock prog - *(volatile uint32_t *)(0x46000024) = (0x0 << 21); - - // wait for clock switch - while ((M4CLK->PLL_STAT_REG_b.SLEEP_CLK_SWITCHED) != 1) - ; - - // Wait until card inserts - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_STATE_STABLE != 0x1) - ; - if (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_INSERTED == 0) { - return ERROR_SMIH; - } - - // Register callbacks - event.callb_event = Event; - - if (MemType) { - pSmihConfig->cmd_transfer = smih_memory_command_transfer; - } else { - pSmihConfig->cmd_transfer = smih_io_command_transfer; - } - - // Set bus violtage - if (pSmihConfig->voltage) { - smih_bus_voltage_select(VOLTAGE_18V); - } else { - smih_bus_voltage_select(VOLTAGE_33V); - } - - SMIH->SMIH_POWER_CONTROL_REGISTER_b.SD_BUS_POWER = 0x1; - - if (pSmihConfig->busWidthMode) { - // SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.DATA_TRANSFER_WIDTH = 0x1; //fix for MMC - } else { - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.DATA_TRANSFER_WIDTH = 0x0; - } - - // Configure ADMA or IO mode - if (pSmihConfig->admaMode) { - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.DMA_SELECT = 0x2; - } else { - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.DMA_SELECT = 0x0; - } - - // Configure high speed mode - if (pSmihConfig->highSpeedEnable) { - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.HIGH_SPEED_ENABLE = 0x1; - } else { - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.HIGH_SPEED_ENABLE = 0x0; - } - - smih_clock_config(pSmihConfig, 400000); - - // Enable normal interrupts - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_ENABLE_REGISTER = - (COMMAND_COMPLETE_STATUS_ENABLE | TRANSFER_COMPLETE_STATUS_ENABLE | BLOCK_GAP_EVENT_STATUS_ENABLE - | DMA_INTERRUPT_STATUS_ENABLE | BUFFER_WRITE_READY_STATUS_ENABLE | BUFFER_READ_READY_STATUS_ENABLE - | CARD_INSERTION_STATUS_ENABLE | CARD_REMOVAL_STATUS_ENABLE | CARD_INTERRUPT_STATUS_ENABLE | INT_A_STATUS_ENABLE - | INT_B_STATUS_ENABLE | INT_C_STATUS_ENABLE | RE_TUNING_EVENT_STATUS_ENABLE); - - // Enable error interrupts - SMIH->SMIH_ERROR_INTERRUPT_STATUS_ENABLE_REGISTER = - (COMMAND_TIMEOUT_ERROR_STATUS_ENABLE | COMMAND_CRC_ERROR_STATUS_ENABLE | COMMAND_END_BIT_ERROR_STATUS_ENABLE - | COMMAND_INDEX_ERROR_STATUS_ENABLE | DATA_TIMEOUT_ERROR_STATUS_ENABLE | DATA_CRC_ERROR_STATUS_ENABLE - | DATA_END_BIT_ERROR_STATUS_ENABLE | CURRENT_LIMIT_ERROR_STATUS_ENABLE | AUTO_CMD_ERROR_STATUS_ENABLE - | ADMA_ERROR_STATUS_ENABLE | TUNING_ERROR_STATUS_ENABLE); - - // Enable normal interrupts signals - SMIH->SMIH_NORMAL_INTERRUPT_SIGNAL_ENABLE_REGISTER = - (COMMAND_COMPLETE_SIGNAL_ENABLE | TRANSFER_COMPLETE_SIGNAL_ENABLE | BUFFER_WRITE_READY_SIGNAL_ENABLE - | BUFFER_READ_READY_SIGNAL_ENABLE | CARD_REMOVAL_SIGNAL_ENABLE | CARD_INTERRUPT_SIGNAL_ENABLE); - SMIH->SMIH_ERROR_INTERRUPT_SIGNAL_ENABLE_REGISTER = 0x1; - - // Enable Irq - NVIC_EnableIRQ(SDMEM_IRQn); - - memset(&commandCfg, 0, sizeof(commandCfg)); - commandCfg.highSpeedEnable = pSmihConfig->highSpeedEnable; - commandCfg.admaMode = pSmihConfig->admaMode; - commandCfg.busWidthMode = pSmihConfig->busWidthMode; - commandCfg.clock = pSmihConfig->clock; - - if (RSI_OK != smih_modes_configuration(&commandCfg)) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t Smih_DeInitialization(void) - * @brief This API is used to Deinitialize the host controller. * - * @return RSI_OK : If host deinitialized successfully. - */ -rsi_error_t Smih_DeInitialization(void) -{ - // Clear clock control and power control registers - SMIH->SMIH_CLOCK_CONTROL_REGISTER = 0x0000; - SMIH->SMIH_POWER_CONTROL_REGISTER = 0x00; - - SMIH->SMIH_NORMAL_INTERRUPT_SIGNAL_ENABLE_REGISTER = 0x0000; - SMIH->SMIH_ERROR_INTERRUPT_SIGNAL_ENABLE_REGISTER = 0x0000; - - // disable nvic - NVIC_DisableIRQ(SDMEM_IRQn); - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_bus_width_set(uint8_t BusWidthMode) - * @brief This API is used to set the smih bus width. - * @param[in] BusWidthMode : bus width mode - * possible values are 0 for 1bit mode - * 1 for 4bit mode - * 2 for 8bit mode - * @return RSI_OK : If bus width set successfully. - */ -rsi_error_t smih_bus_width_set(uint8_t BusWidthMode) -{ - // Configure bus width - if (BusWidthMode == 0) { - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.DATA_TRANSFER_WIDTH = 0x0; - } else if (BusWidthMode == 1) { - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.DATA_TRANSFER_WIDTH = 0x1; - } else if (BusWidthMode == 2) { - SMIH->SMIH_HOST_CONTROL_1_REGISTER_b.EXTENDED_DATA_TRANSFER_WIDTH = 0x1; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_bus_voltage_select(uint8_t enVoltage) - * @brief This API is used to select the smih voltage. - * @param[in] enVoltage : voltage selection - * possbile selections are - * VOLTAGE_18V 1.8v voltage selection for sdio interface - * VOLTAGE_30V 3.0v voltage selection for sdio interface - * VOLTAGE_33V 3.3v voltage selection for sdio interface - * @return RSI_OK : If voltage configured Successfully. - */ -rsi_error_t smih_bus_voltage_select(uint8_t enVoltage) -{ - if (enVoltage == VOLTAGE_18V) { - SMIH->SMIH_POWER_CONTROL_REGISTER_b.SD_BUS_VOLTAGE_SELECT = 0x5; - } else if (enVoltage == VOLTAGE_30V) { - SMIH->SMIH_POWER_CONTROL_REGISTER_b.SD_BUS_VOLTAGE_SELECT = 0x6; - } else if (enVoltage == VOLTAGE_33V) { - SMIH->SMIH_POWER_CONTROL_REGISTER_b.SD_BUS_VOLTAGE_SELECT = 0x7; - } else { - return INVALID_PARAMETERS; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_command_xfer(SMIH_COMMAND_FRAME_CONFIG_T *pConfig) - * @brief This API is used to send the command. - * @param[in] pConfig : pointer to the command structure - * @return RSI_OK : If command sent properly. - * INVALID_PARAMETERS : If pConfig == NULL - */ -rsi_error_t smih_command_xfer(SMIH_COMMAND_FRAME_CONFIG_T *pConfig) -{ - SMIH_COMMAND_REG_T cmdData; - - memset(&cmdData, 0, sizeof(cmdData)); - - if (pConfig == NULL) { - return INVALID_PARAMETERS; - } - - // Set command response type - switch (pConfig->responseTypeSelect) { - case SMIH_NO_RESPONSE: - cmdData.respType = 0x0; - break; - case SMIH_RESPONSE_LENGTH_136: - cmdData.respType = 0x1; - break; - case SMIH_RESPONSE_LENGTH_48: - cmdData.respType = 0x2; - break; - case SMIH_RESPONSE_LENGTH_48BIT_BUSY_CHECK: - cmdData.respType = 0x3; - break; - default: - return INVALID_PARAMETERS; - } - - // Set command CRC check - if (pConfig->cmdCrcCheckEn) { - cmdData.cmdCrcCheckEnable = 0x1; - } else { - cmdData.cmdCrcCheckEnable = 0x0; - } - - // Set command index check - if (pConfig->cmdIndexCheckEn) { - cmdData.cmdIndexCheckEnable = 0x1; - } else { - cmdData.cmdIndexCheckEnable = 0x0; - } - - // Set data present or not when sending the command - if (pConfig->dataPresentSelect) { - cmdData.dataPresentSelect = 0x1; - } else { - cmdData.dataPresentSelect = 0x0; - } - - // Configure command type - switch (pConfig->cmdType) { - case NORMAL_CMD: - cmdData.cmdType = 0x0; - break; - case SUSPEND_CMD: - cmdData.cmdType = 0x1; - break; - case RESUME_CMD: - cmdData.cmdType = 0x2; - break; - case ABORT_CMD: - cmdData.cmdType = 0x3; - break; - default: - return INVALID_PARAMETERS; - } - - // Set command index - cmdData.cmdIndex = pConfig->cmdIndex; - - // Auto command setting - switch (pConfig->autoCmdType) { - case DISABLE_AUTO_CMD: - SMIH->TRANSFER_MODE_REGISTER_b.AUTO_CMD_ENABLE = 0x0; - break; - case ENABLE_AUTO_CMD12: - SMIH->TRANSFER_MODE_REGISTER_b.AUTO_CMD_ENABLE = 0x1; - break; - case ENABLE_AUTO_CMD23: - SMIH->TRANSFER_MODE_REGISTER_b.AUTO_CMD_ENABLE = 0x2; - break; - default: - return INVALID_PARAMETERS; - } - // Configure argument register - SMIH->SMIH_ARGUMENT1_REGISTER = pConfig->cmdArgument; - - if (pConfig->cmdIndex == 5) { - if ((pConfig->cmdArgument & (1 << 24))) { - SMIH->SMIH_HOST_CONTROL_2_REGISTER = (1 << 3); - } - } - // assign fiiled data to the command register - SMIH->SMIH_COMMAND_REGISTER = *((uint16_t *)&cmdData); - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_get_response(uint16_t *pResponseData, uint8_t ResponseRegCount) - * @brief This API is used to receive response on cmd line. - * @param[in] pResponseData : pointer to the response data - * @return RSI_OK : If command sent properly. - * INVALID_PARAMETERS : If pConfig==NULL or ResponseRegCount >8 - */ -rsi_error_t smih_get_response(uint16_t *pResponseData, uint8_t ResponseRegCount) -{ - uint16_t *pResponseBaseAddr; - uint8_t i; - - if ((pResponseData == 0) || (ResponseRegCount > 8u)) { - return INVALID_PARAMETERS; - } - pResponseBaseAddr = (uint16_t *)&SMIH->SMIH_RESPONSE_REGISTER0; - - for (i = 0; i < ResponseRegCount; i++) { - *pResponseData++ = *pResponseBaseAddr++; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_stop_at_block_gap(void) - * @brief This API is used to stop multiple block transfer. - * @return RSI_OK : Stops data transfer. - */ -rsi_error_t smih_stop_at_block_gap(void) -{ - SMIH->SMIH_BLOCK_GAP_CONTROL_REGISTER_b.STOP_AT_BLOCK_GAP_REQUEST = 0x1; - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_transfer_restart(void) - * @brief This API is used to restart the transfer when the transfer is pending. - * @return RSI_OK : If data restarts transfer successfully. - */ -rsi_error_t smih_transfer_restart(void) -{ - SMIH->SMIH_BLOCK_GAP_CONTROL_REGISTER_b.CONTINUE_REQUEST = 0x1; - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn void smih_18v_signal_enable(void) - * @brief This API is used to enable 1.8v signal enable bit. - * @return void - */ -void smih_18v_signal_enable(void) -{ - SMIH->SMIH_HOST_CONTROL_2_REGISTER_b._1_8V_SIGNALING_ENABLE = 0x1; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_uhs_mode_select(uint8_t UhsMode) - * @brief This API is used to select the smih UHS(ULTRA HIGH SPEED) mode. - * @param[in] UhsMode : Uhs mode selection - * possbile selections are - * UHS_NONE no uhs mode - * UHS_SDR12 in case of SDR12 mode requirement - * UHS_SDR25 in case of SDR25 mode requirement - * UHS_SDR50 in case of SDR50 mode requirement - * UHS_SDR104 in case of SDR104 mode requirement - * UHS_DDR50 in case of DDR50 mode requirement - * @return RSI_OK : If uhs mode configured properly. - */ -rsi_error_t smih_uhs_mode_select(uint8_t UhsMode) -{ - switch (UhsMode) { - case UHS_SDR12: - SMIH->SMIH_HOST_CONTROL_2_REGISTER_b.UHS_MODE_SELECT = 0x0; - break; - case UHS_SDR25: - SMIH->SMIH_HOST_CONTROL_2_REGISTER_b.UHS_MODE_SELECT = 0x1; - break; - case UHS_SDR50: - SMIH->SMIH_HOST_CONTROL_2_REGISTER_b.UHS_MODE_SELECT = 0x2; - break; - case UHS_SDR104: - SMIH->SMIH_HOST_CONTROL_2_REGISTER_b.UHS_MODE_SELECT = 0x3; - break; - case UHS_DDR50: - SMIH->SMIH_HOST_CONTROL_2_REGISTER_b.UHS_MODE_SELECT = 0x4; - break; - default: - return INVALID_PARAMETERS; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn void smih_irq_handler(void) - * @brief This is smih Irq Handler - * @return none -*/ -void smih_irq_handler(void) -{ - uint32_t normal_intr_status; - uint32_t error_intr_status; - - // read normal interrupt status reg - normal_intr_status = SMIH->SMIH_NORMAL_INTERRUPT_STATUS_REGISTER; - - // read error interrupt status reg - error_intr_status = SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER; - - // Command complete - if (normal_intr_status & BIT(0)) { - event.commandComplete = 1; - if (event.callb_event != NULL) { - event.callb_event(COMMAND_COMPLETE); - } - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_REGISTER = BIT(0); - } - // Transfer complete - if (normal_intr_status & BIT(1)) { - event.transferComplete = 1; - if (event.callb_event != NULL) { - event.callb_event(TRANSFER_COMPLETE); - } - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_REGISTER = BIT(1); - } - // block gap event - if (normal_intr_status & BIT(2)) { - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_REGISTER = BIT(2); - } - // DMA event - if (normal_intr_status & BIT(3)) { - if (event.callb_event != NULL) { - event.callb_event(DMA_INTR); - } - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_REGISTER = BIT(3); - } - // Buffer write ready - if (normal_intr_status & BIT(4)) { - event.bufferWriteReady = 1; - if (event.callb_event != NULL) { - event.callb_event(BUFFER_WRITE_READY); - } - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_REGISTER = BIT(4); - } - // Buffer read ready - if (normal_intr_status & BIT(5)) { - event.bufferReadReady = 1; - if (event.callb_event != NULL) { - event.callb_event(BUFFER_READ_READY); - } - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_REGISTER = BIT(5); - } - // Card insetion - if (normal_intr_status & BIT(6)) { - if (event.callb_event != NULL) { - event.callb_event(CARD_INSERTION); - } - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_REGISTER = BIT(6); - } - // Card removal - if (normal_intr_status & BIT(7)) { - event.cardRemoval = 1; - if (event.callb_event != NULL) { - event.callb_event(CARD_REMOVAL); - } - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_REGISTER = BIT(7); - } - // Card interrupt - if (normal_intr_status & BIT(8)) { - event.cardInterrupt = 1; - if (event.callb_event != NULL) { - event.callb_event(CARD_INTERRUPT); - } - SMIH->SMIH_NORMAL_INTERRUPT_STATUS_REGISTER = BIT(8); - } - // Command timeout error - if (error_intr_status & BIT(0)) { - event.commandTimeoutError = 1; - if (event.callb_event != NULL) { - event.callb_event(CMD_TIMEOUT_ERROR); - } - SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER = BIT(0); - } - // Command CRC error - if (error_intr_status & BIT(1)) { - event.commandCrcError = 1; - if (event.callb_event != NULL) { - event.callb_event(CMD_CRC_ERROR); - } - SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER = BIT(1); - } - // Command end bit error - if (error_intr_status & BIT(2)) { - event.commandEndBitError = 1; - if (event.callb_event != NULL) { - event.callb_event(CMD_END_BIT_ERROR); - } - SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER = BIT(2); - } - // Command index error - if (error_intr_status & BIT(3)) { - event.commandIndexError = 1; - if (event.callb_event != NULL) { - event.callb_event(CMD_INDEX_ERROR); - } - SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER = BIT(3); - } - // data timeout error - if (error_intr_status & BIT(4)) { - event.dataTimeoutError = 1; - if (event.callb_event != NULL) { - event.callb_event(DATA_TIMEOUT_ERROR); - } - SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER = BIT(4); - } - // data end bit error - if (error_intr_status & BIT(5)) { - event.dataEndbitError = 1; - if (event.callb_event != NULL) { - event.callb_event(DATA_END_BIT_ERROR); - } - SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER = BIT(5); - } - // data CRC error - if (error_intr_status & BIT(6)) { - event.dataCrcError = 1; - if (event.callb_event != NULL) { - event.callb_event(DATA_CRC_ERROR); - } - SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER = BIT(6); - } - // Current limitation error - if (error_intr_status & BIT(7)) { - event.currentLimitError = 1; - if (event.callb_event != NULL) { - event.callb_event(CURRENT_LIMIT_ERROR); - } - SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER = BIT(7); - } - // Auto CMD12 error - if (error_intr_status & BIT(8)) { - event.autoCommandError = 1; - if (event.callb_event != NULL) { - event.callb_event(AUTO_CMD_ERROR); - } - SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER = BIT(8); - } - // ADMA error - if (error_intr_status & BIT(9)) { - event.admaError = 1; - if (event.callb_event != NULL) { - event.callb_event(ADMA_ERROR); - } - SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER = BIT(9); - } - // Tuning error - if (error_intr_status & BIT(10)) { - event.tuningError = 1; - if (event.callb_event != NULL) { - event.callb_event(TUNING_ERROR); - } - SMIH->SMIH_ERROR_INTERRUPT_STATUS_REGISTER = BIT(10); - } - return; -} - -/*==============================================*/ -/** - * @fn void SD_IRQHandler(void) - * @brief SMIH Interrupt Handler - * @return none -*/ -void SD_IRQHandler(void) -{ - smih_irq_handler(); -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_modes_configuration(SMIH_CONFIG_MODES_T *pSmihConfig) - * @brief This API is used to configure modes to SMIH - * @param[in] pSmihConfig : Pointer to the IO card configuration - * @return RSI_OK : IO command configuration structure initialized successfully - * INVALID_PARAMETERS : In case of Invalid parameter - */ -rsi_error_t smih_modes_configuration(SMIH_CONFIG_MODES_T *pSmihConfig) -{ - if (modesConfig == NULL) { - modesConfig = &modeConfig; - } - if (pSmihConfig != NULL) { - memcpy(modesConfig, pSmihConfig, sizeof(SMIH_CONFIG_MODES_T)); - return RSI_OK; - } - return ERROR_SMIH; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_clock_config(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t freq) - * @brief This API is used to configure the host controller clock - * @param[in] freq : clock frequency to the host - * @return RSI_OK : If new frequency is set - */ -rsi_error_t smih_clock_config(SMIH_CARD_CONFIG_T *pSmihConfig, uint32_t freq) -{ - uint16_t Div = 0; - uint32_t clockInput = pSmihConfig->clock; - Div = clockInput / 2 / (freq); - - // disables smih clock - SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.SD_CLOCK_ENABLE = 0u; - - // set division value to the clock - SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.SDCLK_FREQUENCY_SELECT = (Div & 0xFF); - SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.UPPER_BITS_OF_SDCLK_FREQUENCY_SELECT = ((Div >> 8) & 0x03); - - // Enable Smih internal clock - SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.INTERNAL_CLOCK_ENABLE = 0x1; - - // wait for inter clock to be stable - while (0x1 != SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.INTERNAL_CLOCK_STABLE) - ; - - // enables smih clock - SMIH->SMIH_CLOCK_CONTROL_REGISTER_b.SD_CLOCK_ENABLE = 0x1; - - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_check_for_error_interrupt(void) - * @brief This API is used to check perticular error event happend or not. - * @return RSI_OK : If error event not occured. - * ERROR_TIMEOUT : If event occured - */ -rsi_error_t smih_check_for_error_interrupt(void) -{ - if (event.cardRemoval) { - event.cardRemoval = 0; - return ERROR_ACCESS_RIGHTS; - } - if (event.commandTimeoutError || event.commandCrcError || event.commandEndBitError || event.commandIndexError - || event.dataTimeoutError || event.dataEndbitError || event.dataCrcError) { - return ERROR_TIMEOUT; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_send_data(SMIH_TRANSFER_T *pTransfer) - * @brief This API is used to write the data to the SMIH FIFO - * @param[in] pTransfer : Pointer to the command and data structure - * @return RSI_OK : If the data sent properly. - * ERROR_TIMEOUT : If the write data time out occurs. - */ -rsi_error_t smih_send_data(SMIH_TRANSFER_T *pTransfer) -{ - uint32_t blocksize = 0; - uint32_t blockcnt = 0; - uint32_t i = 0; - uint32_t *pBuffer = NULL; - - if (modesConfig->admaMode != 1) // IO mode - { - while (1) { - if (event.bufferWriteReady) { - event.bufferWriteReady = 0; - break; - } - // check for error interrupt - if (RSI_OK != smih_check_for_error_interrupt()) { - return ERROR_TIMEOUT; - } - // wait until card inserts - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_STATE_STABLE != 0x1) - ; - - if (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_INSERTED == 0) { - return ERROR_SMIH; - } - } - blockcnt = pTransfer->data->blockCount; - blocksize = pTransfer->data->blockSize; - pBuffer = (uint32_t *)pTransfer->data->data; - - while (blockcnt > 0) { - while (0x0 == SMIH->SMIH_PRESENT_STATE_REGISTER_b.BUFFER_WRITE_ENABLE) - ; - if (0x0 == SMIH->SMIH_PRESENT_STATE_REGISTER_b.BUFFER_WRITE_ENABLE) { - return ERROR_TIMEOUT; - } - // write data to the fifo - for (i = 0; i < (blocksize >> 2); i++) { - SMIH->SMIH_BUFFER_DATA_PORT_REGISTER = (*pBuffer++); - } - blockcnt--; - } - // wait for transfer completion event to be occur - while (1) { - if (event.transferComplete) { - event.transferComplete = 0; - break; - } - // check for error interrupt - if (RSI_OK != smih_check_for_error_interrupt()) { - return ERROR_TIMEOUT; - } - // wait until card inserts - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_STATE_STABLE != 0x1) - ; - - if (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_INSERTED == 0) { - return ERROR_SMIH; - } - } - } else //adm2 mode - { - // wait for transfer done - while (1) { - if (event.transferComplete) { - event.transferComplete = 0; - break; - } - // check for error interrupt - if (RSI_OK != smih_check_for_error_interrupt()) { - return ERROR_TIMEOUT; - } - // wait until card inserts - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_STATE_STABLE != 0x1) - ; - - if (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_INSERTED == 0) { - return ERROR_SMIH; - } - } - } - // Wait for data line to be free - while ((SMIH->SMIH_PRESENT_STATE_REGISTER_b.DAT_LINE_ACTIVE) != 0) - ; - - if ((SMIH->SMIH_PRESENT_STATE_REGISTER_b.DAT_LINE_ACTIVE) == 0x1) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_receive_data(SMIH_TRANSFER_T *pTransfer) - * @brief This API is used to read the data from SMIH FIFO - * @param[in] pTransfer : Pointer to the command and data structure - * @return RSI_OK : If the data read properly. - * ERROR_TIMEOUT : If data timeout occurs. - */ -rsi_error_t smih_receive_data(SMIH_TRANSFER_T *pTransfer) -{ - uint32_t blocksize = 0; - static uint32_t blockcnt = 0; - uint32_t i = 0; - uint32_t *pBuffer = NULL; - - if (modesConfig->admaMode != 1) // IO mode - { - // wait for read ready event - while (1) { - if (event.bufferReadReady) { - event.bufferReadReady = 0; - break; - } - // check for error interrupt - if (RSI_OK != smih_check_for_error_interrupt()) { - return ERROR_TIMEOUT; - } - - // wait until card inserts - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_STATE_STABLE != 0x1) - ; - - if (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_INSERTED == 0) { - return ERROR_SMIH; - } - } - pBuffer = (uint32_t *)pTransfer->data->data; - blockcnt = pTransfer->data->blockCount; - blocksize = pTransfer->data->blockSize; - - // read data from fifo - while (blockcnt > 0) { - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.BUFFER_READ_ENABLE == 0) - ; - if (SMIH->SMIH_PRESENT_STATE_REGISTER_b.BUFFER_READ_ENABLE == 0) { - break; - } - for (i = 0; i < (blocksize >> 2); i++) { - *pBuffer++ = SMIH->SMIH_BUFFER_DATA_PORT_REGISTER; - } - blockcnt--; - } - - // wait until data transfer done - while (1) { - if (event.transferComplete) { - event.transferComplete = 0; - break; - } - // check for error interrupt - if (RSI_OK != smih_check_for_error_interrupt()) { - return ERROR_TIMEOUT; - } - // wait until card inserts - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_STATE_STABLE != 0x1) - ; - if (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_INSERTED == 0) { - return ERROR_SMIH; - } - } - } else // adma2 mode - { - while (1) { - if (event.transferComplete) { - event.transferComplete = 0; - break; - } - // check for error interrupt - if (RSI_OK != smih_check_for_error_interrupt()) { - return ERROR_TIMEOUT; - } - // wait until card inserts - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_STATE_STABLE != 0x1) - ; - if (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_INSERTED == 0) { - return ERROR_SMIH; - } - } - } - // Wait for data line to be free - while ((SMIH->SMIH_PRESENT_STATE_REGISTER_b.DAT_LINE_ACTIVE) != 0) - ; - - if ((SMIH->SMIH_PRESENT_STATE_REGISTER_b.DAT_LINE_ACTIVE) == 0x1) { - return ERROR_SMIH; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_memory_command_transfer(SMIH_TRANSFER_T *pTransfer) - * @brief This API is used to send memory command. - * @param[in] pTransfer : Pointer to the command and data structure - * @return ERROR_SMIH : If Parameter is invalid. - * ERROR_TIMEOUT : If the command error timeout occures. - * RSI_OK : If command sent succesfully. - */ -rsi_error_t smih_memory_command_transfer(SMIH_TRANSFER_T *pTransfer) -{ - uint32_t admaDespTableAddress; - SMIH_COMMAND_FRAME_CONFIG_T commandCfg = { 0 }; - - if (NULL == modesConfig) { - return INVALID_PARAMETERS; - } - // wait for command line to be stable - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.COMMAND_INHIBIT_CMD != 0) - ; - - // wait for data line to be stable - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.COMMAND_INHIBIT_DAT != 0) - ; - - // cnfigure adma2 descriptor table - if ((modesConfig->admaMode) && (pTransfer->data->data != NULL)) { - memset(Adma2DescriptorTable, 0x0, sizeof(Adma2DescriptorTable)); - - Adma2DescriptorTable[0].attributeValid = 1; - Adma2DescriptorTable[0].attributeEnd = 1; - Adma2DescriptorTable[0].attributeInt = 0; - Adma2DescriptorTable[0].attributeAct = 2; - Adma2DescriptorTable[0].length = (pTransfer->data->blockSize * pTransfer->data->blockCount); - Adma2DescriptorTable[0]._32BIT_Adress = (uint32_t)pTransfer->data->data; - admaDespTableAddress = (uint32_t)&Adma2DescriptorTable[0]; - SMIH->SMIH_ADMA_SYSTEM_ADDRESS0_REGISTER = (uint16_t)admaDespTableAddress; - SMIH->SMIH_ADMA_SYSTEM_ADDRESS1_REGISTER = (uint16_t)(admaDespTableAddress >> 16u); - } - SMIH->SMIH_BLOCK_SIZE_REGISTER_b.TRANSFER_BLOCK_SIZE = pTransfer->data->blockSize; - SMIH->TRANSFER_MODE_REGISTER_b.DATA_TRANSFER_DIRECTION_SELECT = pTransfer->data->direction; - commandCfg.cmdArgument = pTransfer->command->cmdArg; - - // Configure the CMD register to send the command. - if (pTransfer->data->data == NULL) { - commandCfg.dataPresentSelect = 0; - } else { - commandCfg.dataPresentSelect = 1; - } - if ((modesConfig->admaMode) && (pTransfer->data->data != NULL)) { - SMIH->TRANSFER_MODE_REGISTER_b.DMA_ENABLE = 1; - } else { - SMIH->TRANSFER_MODE_REGISTER_b.DMA_ENABLE = 0; - } - commandCfg.cmdIndex = pTransfer->command->cmdIdx & 0x3F; - if ((commandCfg.cmdIndex == 18) || (commandCfg.cmdIndex == 25)) { - // multiple block mode - commandCfg.autoCmdType = ENABLE_AUTO_CMD12; - SMIH->TRANSFER_MODE_REGISTER_b.BLOCK_COUNT_ENABLE = 0x1; - SMIH->TRANSFER_MODE_REGISTER_b.MULTI_OR_SINGLE_BLOCK_SELECT = 0x1; - SMIH->SMIH_BLOCK_COUNT_REGISTER = pTransfer->data->blockCount; - } else { - // single block mode - commandCfg.autoCmdType = DISABLE_AUTO_CMD; - SMIH->TRANSFER_MODE_REGISTER_b.BLOCK_COUNT_ENABLE = 0x0; - SMIH->TRANSFER_MODE_REGISTER_b.MULTI_OR_SINGLE_BLOCK_SELECT = 0x0; - SMIH->SMIH_BLOCK_COUNT_REGISTER = pTransfer->data->blockCount; - } - switch (pTransfer->command->responseTypeSelect) { - case SMIH_NO_RESPONSE: - commandCfg.responseTypeSelect = SMIH_NO_RESPONSE; - commandCfg.cmdIndexCheckEn = 0; - commandCfg.cmdCrcCheckEn = 0; - break; - case SMIH_RESPONSE_R2: - commandCfg.responseTypeSelect = SMIH_RESPONSE_LENGTH_136; - commandCfg.cmdIndexCheckEn = 0; - commandCfg.cmdCrcCheckEn = 1; - break; - case SMIH_RESPONSE_R3R4: - commandCfg.responseTypeSelect = SMIH_RESPONSE_LENGTH_48; - commandCfg.cmdIndexCheckEn = 0; - commandCfg.cmdCrcCheckEn = 0; - break; - case SMIH_RESPONSE_R1R5R6R7: - commandCfg.responseTypeSelect = SMIH_RESPONSE_LENGTH_48; - commandCfg.cmdIndexCheckEn = 1; - commandCfg.cmdCrcCheckEn = 1; - break; - case SMIH_RESPONSE_R1BR5B: - commandCfg.responseTypeSelect = SMIH_RESPONSE_LENGTH_48BIT_BUSY_CHECK; - commandCfg.cmdIndexCheckEn = 1; - commandCfg.cmdCrcCheckEn = 1; - break; - default: - return INVALID_PARAMETERS; - } - - if (CommandInProgress != NULL) { - return ERROR_OPERATION_INPROGRESS; - } - - SMIH->SMIH_TIMEOUT_CONTROL_REGISTER_b.DATA_TIMEOUT_COUNTER_VALUE = 0xC; - - commandCfg.cmdType = NORMAL_CMD; - - // set current command to global value for callback - CommandInProgress = pTransfer; - - // send command - smih_command_xfer(&commandCfg); - - // wait command line to be stable - while (1) { - if (event.commandComplete) { - event.commandComplete = 0; - break; - } - // check for error interrupt - if (RSI_OK != smih_check_for_error_interrupt()) { - return ERROR_SMIH; - } - // wait until card inserts - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_STATE_STABLE != 0x1) - ; - - if (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_INSERTED == 0) { - return ERROR_TIMEOUT; - } - } - - // get response data - if (RSI_OK != smih_get_response((uint16_t *)pTransfer->command->response, sizeof(pTransfer->command->response) / 2)) { - return ERROR_SMIH; - } - if (pTransfer->data->data != 0) { - if ((pTransfer->command->cmdIdx == 24) || (pTransfer->command->cmdIdx == 25)) { - // send data to card - if (RSI_OK != smih_send_data(pTransfer)) { - return ERROR_SMIH; - } - } - if ((pTransfer->command->cmdIdx == 17) || (pTransfer->command->cmdIdx == 18) - || (pTransfer->command->cmdIdx == (0x80 | 8) /*mmc command 8*/) - || (pTransfer->command->cmdIdx == (0x40 + 51) /*sd ACMD51*/)) { - /* read data from card */ - if (RSI_OK != smih_receive_data(pTransfer)) { - return ERROR_SMIH; - } - } - } - CommandInProgress = NULL; - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t smih_io_command_transfer(SMIH_TRANSFER_T *pTransfer) - * @brief This API is used to transfer SMIH command. - * @param[in] pTransfer : Pointer to the command and data structure - * @return ERROR_SMIH : If Parameter is invalid. - * ERROR_TIMEOUT : If the command error timeout occures. - */ -rsi_error_t smih_io_command_transfer(SMIH_TRANSFER_T *pTransfer) -{ - SMIH_COMMAND_FRAME_CONFIG_T commandCfg = { 0 }; - uint32_t admaDespTableAddress; - if (NULL == modesConfig) { - return INVALID_PARAMETERS; - } - // wait for command line to be stable - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.COMMAND_INHIBIT_CMD != 0) - ; - - // wait for data line to be stable - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.COMMAND_INHIBIT_DAT != 0) - ; - - // cnfigure adma2 descriptor table - if ((modesConfig->admaMode) && (pTransfer->data->data != NULL)) { - memset(Adma2DescriptorTable, 0x0, sizeof(Adma2DescriptorTable)); - Adma2DescriptorTable[0].attributeValid = 1; - Adma2DescriptorTable[0].attributeEnd = 1; - Adma2DescriptorTable[0].attributeInt = 0; - Adma2DescriptorTable[0].attributeAct = 2; - Adma2DescriptorTable[0].length = pTransfer->data->blockSize * pTransfer->data->blockCount; - Adma2DescriptorTable[0]._32BIT_Adress = (uint32_t)pTransfer->data->data; - admaDespTableAddress = (uint32_t)&Adma2DescriptorTable[0]; - // Update descriptor address - SMIH->SMIH_ADMA_SYSTEM_ADDRESS0_REGISTER = (uint16_t)admaDespTableAddress; - SMIH->SMIH_ADMA_SYSTEM_ADDRESS1_REGISTER = (uint16_t)(admaDespTableAddress >> 16u); - } - // Configure block size - SMIH->SMIH_BLOCK_SIZE_REGISTER_b.TRANSFER_BLOCK_SIZE = pTransfer->data->blockSize; - SMIH->TRANSFER_MODE_REGISTER_b.DATA_TRANSFER_DIRECTION_SELECT = pTransfer->data->direction; - - if ((modesConfig->admaMode) && (pTransfer->data->data != NULL)) { - SMIH->TRANSFER_MODE_REGISTER_b.DMA_ENABLE = 1; - } else { - SMIH->TRANSFER_MODE_REGISTER_b.DMA_ENABLE = 0; - } - - SMIH->SMIH_TIMEOUT_CONTROL_REGISTER_b.DATA_TIMEOUT_COUNTER_VALUE = 0xC; - - // Configure the CMD register to send the command. - if (pTransfer->data->data == NULL) { - commandCfg.dataPresentSelect = 0; - } else { - commandCfg.dataPresentSelect = 1; - } - commandCfg.cmdArgument = pTransfer->command->cmdArg; - commandCfg.cmdIndex = pTransfer->command->cmdIdx & 0x3F; - - if ((commandCfg.cmdIndex == 53) && (pTransfer->command->cmdArg & BIT(27))) { - // multiple block mode - SMIH->TRANSFER_MODE_REGISTER_b.BLOCK_COUNT_ENABLE = 0x1; - SMIH->TRANSFER_MODE_REGISTER_b.MULTI_OR_SINGLE_BLOCK_SELECT = 0x1; - SMIH->SMIH_BLOCK_COUNT_REGISTER = pTransfer->data->blockCount; - } else { - // single block mode - SMIH->TRANSFER_MODE_REGISTER_b.BLOCK_COUNT_ENABLE = 0x0; - SMIH->TRANSFER_MODE_REGISTER_b.MULTI_OR_SINGLE_BLOCK_SELECT = 0x0; - SMIH->SMIH_BLOCK_COUNT_REGISTER = pTransfer->data->blockCount; - } - - switch (pTransfer->command->responseTypeSelect) { - case SMIH_NO_RESPONSE: - commandCfg.responseTypeSelect = SMIH_NO_RESPONSE; - commandCfg.cmdIndexCheckEn = 0; - commandCfg.cmdCrcCheckEn = 0; - break; - case SMIH_RESPONSE_R2: - commandCfg.responseTypeSelect = SMIH_RESPONSE_LENGTH_136; - commandCfg.cmdIndexCheckEn = 0; - commandCfg.cmdCrcCheckEn = 1; - break; - case SMIH_RESPONSE_R3R4: - commandCfg.responseTypeSelect = SMIH_RESPONSE_LENGTH_48; - commandCfg.cmdIndexCheckEn = 0; - commandCfg.cmdCrcCheckEn = 0; - break; - case SMIH_RESPONSE_R1R5R6R7: - commandCfg.responseTypeSelect = SMIH_RESPONSE_LENGTH_48; - commandCfg.cmdIndexCheckEn = 1; - commandCfg.cmdCrcCheckEn = 1; - break; - case SMIH_RESPONSE_R1BR5B: - commandCfg.responseTypeSelect = SMIH_RESPONSE_LENGTH_48BIT_BUSY_CHECK; - commandCfg.cmdIndexCheckEn = 1; - commandCfg.cmdCrcCheckEn = 1; - break; - default: - return INVALID_PARAMETERS; - } - - commandCfg.autoCmdType = DISABLE_AUTO_CMD; - - if (CommandInProgress != NULL) { - return ERROR_OPERATION_INPROGRESS; - } - commandCfg.cmdType = NORMAL_CMD; - - // set current command to global value for callback - CommandInProgress = pTransfer; - - // send command - smih_command_xfer(&commandCfg); - - // wait command line to be stable - while (1) { - if (event.commandComplete) { - event.commandComplete = 0; - break; - } - // check for error interrupt - if (RSI_OK != smih_check_for_error_interrupt()) { - return ERROR_SMIH; - } - - // wait until card inserts - while (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_STATE_STABLE != 0x1) - ; - if (SMIH->SMIH_PRESENT_STATE_REGISTER_b.CARD_INSERTED == 0) { - return ERROR_TIMEOUT; - } - } - // get response data - if (RSI_OK != smih_get_response((uint16_t *)pTransfer->command->response, sizeof(pTransfer->command->response) / 2)) { - return ERROR_SMIH; - } - if (pTransfer->data->data != 0) { - if (pTransfer->command->cmdIdx == 53) { - if ((pTransfer->command->cmdArg) & BIT(31)) { - // send data to card - if (RSI_OK != smih_send_data(pTransfer)) { - return ERROR_SMIH; - } - } else { - // read data from card - if (RSI_OK != smih_receive_data(pTransfer)) { - return ERROR_SMIH; - } - } - } - } - CommandInProgress = NULL; - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn void RegisterCallBack(ARM_SMIH_SignalEvent_t Event) - * @brief This API is used to register the call back handler - * @param[in] Event : Call back handler to register - * @return none - */ -void RegisterCallBack(ARM_SMIH_SignalEvent_t Event) -{ - event.callb_event = Event; -} -#endif diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_vad.c b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_vad.c deleted file mode 100644 index 16a9b4eb0..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_vad.c +++ /dev/null @@ -1,516 +0,0 @@ -/******************************************************************************* -* @file rsi_vad.c -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Include Files - -#include "rsi_ccp_user_config.h" - -volatile static VAD_EVENT_T event; -#if 1 - -/*==============================================*/ -/** - * @fn VAD_PING_IRQHandler() - * @brief VAD IRQ handler , clear the VAD interrupt. - * @return none - */ -void VAD_PING_IRQHandler() -{ - RSI_VAD_InterruptClr(VAD, 1); - event.callb_event(VAD_INTR); -} -#endif - -/*==============================================*/ -/** - * @fn rsi_error_t VAD_Init(VAD_SignalEvent_t Event) - * @brief This API is used to configure the VAD related parameters. - * @param[in] Event : Register callback event. - * @return Execution status - If success - */ -rsi_error_t VAD_Init(VAD_SignalEvent_t Event) -{ - // Register callback event - event.callb_event = Event; -#if defined(CHIP_9118) - RSI_PS_UlpssPeriPowerUp(ULPSS_PWRGATE_ULP_VAD); -#endif - - if (!(event.clk_config)) { - // Configure the fast and slow clock for VAD - RSI_ULPSS_VadClkConfig(ULPCLK, ULP_VAD_32KHZ_RC_CLK, ULP_VAD_32MHZ_RC_CLK, 4); - event.clk_config = 1U; - } - - // Select the algorithm and algorithm threshold for VAD - RSI_VAD_SetAlgorithmThreshold(VAD, VAD_METHOD_ZCR_ACF, VAD_ZCR_THRSHOLD, VAD_ACF_THRSHOLD, 0, 0); - - // Configure the sample per frame and sample per address for VAD - RSI_VAD_Config(VAD, NUMBER_OF_SAMPLE_IN_FRAME, VAD_2SMPLS_PER_ADDR, 1, VAD_INTREG_SOURCE); - - // Set the start delay and end delay for ACF algorithm - RSI_VAD_Set_Delay(VAD, VAD_ACF_START, VAD_ACF_END); - - // Set energy threshold value */ - RSI_VAD_FrameEnergyConfig(VAD, VAD_ENERGY_THRSHOLD, 1, 1); - - RSI_VAD_PingPongMemoryAddrConfig(VAD, VAD_SCRT_PAD, 0, 1, 0); - - // Enable Nvic - NVIC_EnableIRQ(VAD_INTR_PING_IRQn); - - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn int32_t VAD_Process(int16_t *wr_buf, int32_t dc_est) - * @brief This API is used to process VAD data. - * @param[in] wr_buf : Input data buffer - * @param[in] dc_est : dc estimation value of previous 1023 samples. - * @return The dc estimation value of current 1023 samples - If success - */ -int32_t VAD_Process(int16_t *wr_buf, int32_t dc_est) -{ - uint8_t energy_status = 0; - uint16_t index; - int32_t dc_est1 = 0; - int16_t temp_data = 0, data_in1 = 0; - static uint8_t flag = 1; - RSI_VAD_Stop(VAD); - dc_est = dc_est >> 10; - - for (index = 0; index < (NUMBER_OF_SAMPLE_IN_FRAME); index++) { - data_in1 = wr_buf[index]; -#if DATA_FROM_INTER_ADC - if (data_in1 & BIT(11)) { - data_in1 = data_in1 | (VAD_MASK_VALUE); - } else { - data_in1 = data_in1; - } -#else - data_in1 = data_in1; -#endif - dc_est1 = dc_est1 + data_in1; - temp_data = data_in1 - dc_est; - temp_data = temp_data << VAD_DIGITAL_GAIN_FAC; - // fill data in VAD ping memory - ((*(volatile uint16_t *)(ULP_MEMORY_BASE + VAD_SCRT_PAD + index * 2))) = temp_data; - } - - if ((dc_est == 0) && (flag == 1)) { - RSI_VAD_Stop(VAD); - flag = 0; - } else { - for (index = 0; index < (32); index++) { - // fill data in VAD register - VAD->VAD_CONF_REG8 = ((*(volatile uint16_t *)(ULP_MEMORY_BASE + VAD_SCRT_PAD + index * 2))) | BIT(10); - } - for (index = 0; index < (NUMBER_OF_SAMPLE_IN_FRAME); index++) { - // fill data in VAD register - VAD->VAD_CONF_REG8 = ((*(volatile uint16_t *)(ULP_MEMORY_BASE + VAD_SCRT_PAD + index * 2))) | BIT(10); - } - } - - energy_status = RSI_VAD_ProccessDone(VAD); - - if (energy_status) { - // Enable Fast clock for VAD for fast post processing - RSI_VAD_FastClkEnable(ULP_VAD_32MHZ_RC_CLK, 0); - event.callb_event(VAD_ENERGY_DETECT); - } - return dc_est1; -} - -/*==============================================*/ -/** - * @fn rsi_error_t VAD_Deinit(void) - * @brief This API is used to deinitialize the VAD related parameters. - * @return Execution status - If success - */ -rsi_error_t VAD_Deinit(void) -{ - RSI_ULPSS_PeripheralDisable(ULPCLK, ULP_VAD_CLK); -#if defined(CHIP_9118) - RSI_PS_UlpssPeriPowerDown(ULPSS_PWRGATE_ULP_VAD); -#endif - event.clk_config = 0U; - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn void RSI_VAD_PingPongMemoryAddrConfig(RSI_VAD_T *pVAD, - * uint32_t ping_addr, - * uint32_t pong_addr, - * uint8_t ping_enable, - * uint8_t pong_enable) - * @brief This API is used to write the ulp mem address for pong buffer and ping buffer - * @param[in] pVAD : Pointer to the VAD_Type structure. - * @param[in] ping_addr : 13 bit ulp mem address offset for ping buffer - * @param[in] pong_addr : 13 bit ulp mem address offset for pong buffer - * @param[in] ping_enable : This parameter enable the ping address configuration. - * @param[in] pong_enable : This parameter enable the pong address configuration. - * @return none - */ -void RSI_VAD_PingPongMemoryAddrConfig(RSI_VAD_T *pVAD, - uint32_t ping_addr, - uint32_t pong_addr, - uint8_t ping_enable, - uint8_t pong_enable) -{ - if (ping_enable) { - pVAD->VAD_CONF_REG9_b.PING_ADDR = (ping_addr >> 2); - } - if (pong_enable) { - pVAD->VAD_CONF_REG9_b.PONG_ADDR = (pong_addr >> 2); - } -} - -/*==============================================*/ -/** - * @fn RSI_VAD_Config() - * @brief This API is used to configure the VAD parameter - * @param[in] pVAD : Pointer to the VAD_Type structure. - * @param[in] samples_per_frame : Number of samples in one processing frame, maximum value is 1023 and - * default is 512 - * @param[in] samples_per_address : Number of samples for address \n - * 0 - 4 samples per address - * 1 - 2 Samples per address - * 2 - 1 Sample per address - * @param[in] fullwidth : 0 - 12/24 when VAD_REG1_ADDR[21:20] - * 1 - 2 Samples per address - * @param[in] datasourceselect : Source of Data for VAD processing - * 00/10: Internal Register - * 11: ADC as source - * 01: Reserved - * @return RSI_OK - If success - */ -rsi_error_t RSI_VAD_Config(RSI_VAD_T *pVAD, - uint16_t samples_per_frame, - uint16_t samples_per_address, - bool fullwidth, - uint8_t datasourceselect) -{ - if ((samples_per_frame > MAXIMUM_VALUE_1024) || (samples_per_address > MAXIMUM_VALUE_4) - || (datasourceselect > MAXIMUM_VALUE_4)) { - return INVALID_PARAMETERS; - } - // Set the samples_per_frame and samples per address for VAD - pVAD->VAD_CONF_REG1_b.SAMPLS_PER_FRAME = samples_per_frame; - pVAD->VAD_CONF_REG1_b.SMPLS_PER_ADDR = samples_per_address; - pVAD->VAD_CONF_REG1_b.FULL_WIDTH = fullwidth; //need to be review this parameter - // selecting the Source of Data for VAD processing - pVAD->VAD_CONF_REG7_b.DATA_SOURCE_SELECT = datasourceselect; - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn void RSI_VAD_Enable(RSI_VAD_T *pVAD) - * @brief This API is used to Enable Processing of VAD - * @param[in] pVAD : Pointer to the VAD_Type structure. - * @return none - */ -void RSI_VAD_Enable(RSI_VAD_T *pVAD) -{ - pVAD->VAD_CONF_REG8_b.EN_VAD_PROCESS = 1U; -} - -/*==============================================*/ -/** - * @fn RSI_VAD_InterruptClr() - * @brief This API is used to clear the interrupt of VAD - * @param[in] pVAD : Pointer to the VAD_Type structure. - * @param[in] ping_interrupt : This parameter define which interrupt want to be clear. - * ping_interrupt = 1 , To clear the VAD ping interrupt. - * ping_interrupt = 0 , To clear the VAD pong interrupt. - * @return none - */ -void RSI_VAD_InterruptClr(RSI_VAD_T *pVAD, uint16_t ping_interrupt) -{ - if (ping_interrupt) { - // clear the ping interrupt in VAD_CONF_REG9 register - pVAD->VAD_CONF_REG9_b.PING_INT_CLEAR = 1U; - } else { - // clear the pong interrupt in VAD_CONF_REG9 register - pVAD->VAD_CONF_REG9_b.PONG_INT_CLEAR = 1U; - } -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_VAD_SetAlgorithmThreshold(RSI_VAD_T *pVAD, - * uint16_t algorithm_type, - * uint32_t zcr_threshold, - * uint32_t acf_threshold, - * uint32_t wacf_threshold, - * VAD_AMDF_THRESHOLD_T *config) - * @brief This API is used to set algorithm and threshold value for that algorithm. - * @param[in] pVAD : Pointer to the VAD_Type structure. - * @param[in] algorithm_type : Select the algorithm type here refer this #VAD_ALGORITHM_SELECT_T enum. - * pass the specific value for selection of algorithm - * @param[in] zcr_threshold : This parameter define threshold value for zcr algorithm maximum value is 1023 - * and default value is 50. - * @param[in] acf_threshold : This parameter define threshold value for acf algorithm maximum value is 4095 - * and default value is 1024. - * @param[in] admf_threshold : This parameter define threshold value for acf algorithm maximum value is 4095 - * and default value is 1024. - * @param[in] wacf_threshold : This parameter define threshold value for wacf_threshold algorithm maximum value is 4095 - * and default value is 51. - * @param[in] config : VAD_AMDF_THRESHOLD_T structure veriable, configure this structure - * for AMDF algorithm delay. - * @return RSI_OK - If success - */ -rsi_error_t RSI_VAD_SetAlgorithmThreshold(RSI_VAD_T *pVAD, - uint16_t algorithm_type, - uint32_t zcr_threshold, - uint32_t acf_threshold, - uint32_t wacf_threshold, - VAD_AMDF_THRESHOLD_T *config) -{ - if ((algorithm_type > MAXIMUM_VALUE_8) || (zcr_threshold > MAXIMUM_VALUE_1024) || (acf_threshold > MAXIMUM_VALUE_4096) - || (wacf_threshold > MAXIMUM_VALUE_4096)) { - return INVALID_PARAMETERS; - } - // set the required the algorithm for detection purpose - pVAD->VAD_CONF_REG7_b.CHOOSE_VAD_METHOD = algorithm_type; - - switch (algorithm_type) { - case ZCR: - // write the threshold value to smpls_zero_cross bits - pVAD->VAD_CONF_REG2_b.SMPLS_ZERO_CROSS = zcr_threshold; - break; - case ACF: - // To clear the threshold_acf bits - pVAD->VAD_CONF_REG4_b.THRESHOLD_ACF = acf_threshold; - break; - case AMDF: - pVAD->VAD_CONF_REG5_b.THRESHOLD_NULL = config->null_threshold; - pVAD->VAD_CONF_REG5_b.THRESHOLD_NULL_COUNT = config->null_threshold_count; - pVAD->VAD_CONF_REG6_b.THRESHOLD_PEAK = config->peak_threshold; - pVAD->VAD_CONF_REG6_b.THRESHOLD_PEAK = config->peak_threshold_count; - break; - case WACF: - // write the threshold value to smpls_zero_cross bits - pVAD->VAD_CONF_REG4_b.THRESHOLD_WACF = wacf_threshold; - break; - case ZCR_ACF_AMDF_WACF: - pVAD->VAD_CONF_REG2_b.SMPLS_ZERO_CROSS = zcr_threshold; - pVAD->VAD_CONF_REG4_b.THRESHOLD_ACF = acf_threshold; - pVAD->VAD_CONF_REG5_b.THRESHOLD_NULL = config->null_threshold; - pVAD->VAD_CONF_REG5_b.THRESHOLD_NULL_COUNT = config->null_threshold_count; - pVAD->VAD_CONF_REG6_b.THRESHOLD_PEAK = config->peak_threshold; - pVAD->VAD_CONF_REG6_b.THRESHOLD_PEAK = config->peak_threshold_count; - pVAD->VAD_CONF_REG4_b.THRESHOLD_WACF = wacf_threshold; - break; - case ZCR_ACF: - pVAD->VAD_CONF_REG2_b.SMPLS_ZERO_CROSS = zcr_threshold; - pVAD->VAD_CONF_REG4_b.THRESHOLD_ACF = acf_threshold; - break; - case ZCR_AMDF: - pVAD->VAD_CONF_REG2_b.SMPLS_ZERO_CROSS = zcr_threshold; - pVAD->VAD_CONF_REG5_b.THRESHOLD_NULL = config->null_threshold; - pVAD->VAD_CONF_REG5_b.THRESHOLD_NULL_COUNT = config->null_threshold_count; - pVAD->VAD_CONF_REG6_b.THRESHOLD_PEAK = config->peak_threshold; - pVAD->VAD_CONF_REG6_b.THRESHOLD_PEAK = config->peak_threshold_count; - break; - case ZCR_WACF: - pVAD->VAD_CONF_REG2_b.SMPLS_ZERO_CROSS = zcr_threshold; - pVAD->VAD_CONF_REG4_b.THRESHOLD_WACF = wacf_threshold; - break; - default: - return INVALID_PARAMETERS; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_VAD_Set_Delay(RSI_VAD_T *pVAD, uint16_t startdelayval, uint16_t enddelayval) - * @brief This API is used to set start the end delay value for ACF,WACF,AMDF algorithm . - * @param[in] pVAD : Pointer to the VAD_Type structure. - * @param[in] startdelayval : This parameter define the start delay value for ACF,WACF,AMDF algorithm. - * maximum value is 1023 and default value is 2 - * @param[in] enddelayval : This parameter define the end delay value for ACF,WACF,AMDF algorithm. - * maximum value is 1023 and default value is 16 - * @return RSI_OK - If success - */ -rsi_error_t RSI_VAD_Set_Delay(RSI_VAD_T *pVAD, uint16_t startdelayval, uint16_t enddelayval) -{ - if ((startdelayval > MAXIMUM_VALUE_1024) || (enddelayval > MAXIMUM_VALUE_1024)) { - return INVALID_PARAMETERS; - } - // start delay - pVAD->VAD_CONF_REG7_b.START_DELAY_VAL = startdelayval; - // End delay - pVAD->VAD_CONF_REG7_b.END_DELAY_VAL = enddelayval; - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_VAD_Input(RSI_VAD_T *pVAD, int16_t data) - * @brief This API is used to give the input for VAD. - * @param[in] pVAD : Pointer to the VAD_Type structure. - * @param[in] data : This parameter input for VAD block input is 1023 and default value is 16 - * @return RSI_OK - If success - */ -rsi_error_t RSI_VAD_Input(RSI_VAD_T *pVAD, int16_t data) -{ - if (data > MAXIMUM_VALUE_1024) { - return INVALID_PARAMETERS; - } - pVAD->VAD_CONF_REG8_b.EN_VAD_PROCESS = 1U; - /* Writing the data used as source for VAD */ - pVAD->VAD_CONF_REG8_b.INP_DATA = data; - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_VAD_FrameEnergyConfig(RSI_VAD_T *pVAD, - * uint32_t threshold_frame_energy, - * uint32_t threshold_smpl_collect, - * uint32_t prog_smpls_for_energy_check) - * @brief This API is used to configure the frame energy. - * @param[in] pVAD : Pointer to the VAD_Type structure. - * @param[in] threshold_frame_energy : This parameter give the threshold frame energy, - * maximum value is 1023 and default value is 0. - * @param[in] threshold_smpl_collect : This parameter give the number of threshold sample collect, - * maximum value is 1023 and default value is 1. - * @param[in] prog_smpls_for_energy_check : This parameter define the sample for energy check, - * maximum value is 3 and default value is 1. - * @return RSI_OK - If success - */ -rsi_error_t RSI_VAD_FrameEnergyConfig(RSI_VAD_T *pVAD, - uint32_t threshold_frame_energy, - uint32_t threshold_smpl_collect, - uint32_t prog_smpls_for_energy_check) -{ - if ((threshold_frame_energy > MAXIMUM_VALUE_1024) || (threshold_smpl_collect > MAXIMUM_VALUE_1024) - || (prog_smpls_for_energy_check > MAXIMUM_VALUE_4)) { - return INVALID_PARAMETERS; - } - pVAD->VAD_CONF_REG3_b.THRESHOLD_FRAME_ENERGY = threshold_frame_energy; - pVAD->VAD_CONF_REG3_b.THRESHOLD_SMPL_COLLECT = threshold_smpl_collect; - pVAD->VAD_CONF_REG3_b.PROG_SMPLS_FOR_ENERGY_CHECK = prog_smpls_for_energy_check; - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn void RSI_VAD_Stop(RSI_VAD_T *pVAD) - * @brief This API is used to disable VAD functionality. - * @param[in] pVAD : Pointer to the VAD_Type structure. - * @return none - */ -void RSI_VAD_Stop(RSI_VAD_T *pVAD) -{ - pVAD->VAD_CONF_REG8_b.EN_VAD_PROCESS = 0; -} - -/*==============================================*/ -/** - * @fn uint8_t RSI_VAD_ProccessDone(RSI_VAD_T *pVAD) - * @brief This API is used show the VAD energy detect. - * @param[in] pVAD : Pointer to the VAD_Type structure. - * @return The VAD energy detection status. - * If 1 - Energy detect. - * If 0 - No energy detect. - */ -uint8_t RSI_VAD_ProccessDone(RSI_VAD_T *pVAD) -{ - return pVAD->VAD_CONF_REG8_b.VAD_PROC_DONE; -} - -/*==============================================*/ -/** - * @fn void RSI_VAD_FastClkEnable(uint16_t fast_clk_sel, uint16_t clk_div_factor) - * @brief This API is used enable fast clock for VAD peripheral. - * @param[in] fast_clk_sel : fast clock select for VAD peripheral - * @param[in] clk_div_factor : Select the clock division factor for VAD peripheral - * @return none - */ -void RSI_VAD_FastClkEnable(uint16_t fast_clk_sel, uint16_t clk_div_factor) -{ - ULPCLK->ULP_VAD_CLK_GEN_REG_b.ULP_VAD_FCLK_EN = 1U; - ULPCLK->ULP_VAD_CLK_GEN_REG_b.ULP_VAD_FCLK_SEL = fast_clk_sel; - ULPCLK->ULP_VAD_CLK_GEN_REG_b.ULP_VAD_CLKDIV_FACTOR = clk_div_factor; -} - -/*==============================================*/ -/** - * @fn int32_t RSI_VAD_ProcessData(RSI_VAD_T *pVAD, - * uint32_t vad_addr, - * uint32_t adc_data_addr, - * int32_t dc_est, - * uint32_t dig_scale, - * uint32_t sample_len) - * @brief This API is used process data for input to VAD. - * @param[in] pVAD : Pointer to the VAD_Type structure. - * @param[in] vad_addr : VAD ULPSS memory address - * @param[in] adc_data_addr : ADC output data address - * @param[in] dc_est : dc estimation value. - * @param[in] dig_scale : Scaling the ADC output. - * @param[in] sample_len : Number of samples to process in VAD engine. - * @return dc estimation value - If success - */ -int32_t RSI_VAD_ProcessData(RSI_VAD_T *pVAD, - uint32_t vad_addr, - uint32_t adc_data_addr, - int32_t dc_est, - uint32_t dig_scale, - uint32_t sample_len) -{ - uint32_t index; - int32_t dc_est1 = 0; - int16_t temp_data = 0, data_in1 = 0; - static uint8_t flag = 1; - RSI_VAD_Stop(VAD); - - // processing the adc sample - for (index = 0; index < (sample_len); index++) { - data_in1 = ((*(volatile uint16_t *)(adc_data_addr + index * 2))); - - if (data_in1 & BIT(11)) { - data_in1 = data_in1 | (VAD_MASK_VALUE); - } else { - data_in1 = data_in1; - } - dc_est1 = dc_est1 + data_in1; - temp_data = data_in1 - dc_est; - temp_data = temp_data << dig_scale; - // fill data in VAD ping memory - ((*(volatile uint16_t *)(ULP_MEMORY_BASE + vad_addr + index * 2))) = temp_data; - } - - if ((dc_est == 0) && (flag == 1)) { - RSI_VAD_Stop(VAD); - flag = 0; - } else { - for (index = 0; index < (32); index++) { - /* fill data in VAD register */ - pVAD->VAD_CONF_REG8 = ((*(volatile uint16_t *)(ULP_MEMORY_BASE + vad_addr + index * 2))) | BIT(10); - } - for (index = 0; index < (sample_len); index++) { - // fill data in VAD register - pVAD->VAD_CONF_REG8 = ((*(volatile uint16_t *)(ULP_MEMORY_BASE + vad_addr + index * 2))) | BIT(10); - } - } - return dc_est1; -} diff --git a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_wurx.c b/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_wurx.c deleted file mode 100644 index cb1e44ba1..000000000 --- a/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_wurx.c +++ /dev/null @@ -1,716 +0,0 @@ -/******************************************************************************* -* @file rsi_wurx.c -* @brief -******************************************************************************* -* # License -* Copyright 2022 Silicon Laboratories Inc. www.silabs.com -******************************************************************************* -* -* The licensor of this software is Silicon Laboratories Inc. Your use of this -* software is governed by the terms of Silicon Labs Master Software License -* Agreement (MSLA) available at -* www.silabs.com/about-us/legal/master-software-license-agreement. This -* software is distributed to you in Source Code format and is governed by the -* sections of the MSLA applicable to Source Code. -* -******************************************************************************/ - -// Include Files - -/*==============================================*/ -/** - * @fn void RSI_WURX_Init(uint16_t bypass_l1_enable, uint16_t l1_freq_div, uint16_t l2_freq_div) - * @brief This API is used to initialization of l1 and l2 frequency as well as enable wurx. - * @param[in] bypass_l1_enable : Enable or disable the bypass functionality of level1 - * @param[in] l1_freq_div : Set the level1 frequency by using division factor ,This parameter define frequency. - * Ranges : 32 khz incoming clock then following option - * 0 : 0.125 khz, 1: 0.250 Khz, 2: 0.5 khz ,3: 1 khz, default : 2 khz - * Ranges : 64 khz incoming clock then following option - * 0 : 0.25 khz, 1: 0.5 Khz, 2: 1 khz ,3: 2 khz - * @param[in] l2_freq_div : Set the level2 frequency by using division factor ,This parameter define frequency. - * Ranges : 32 khz incoming clock then following option - * 0 : 4 khz, 1: 8 Khz, 2: 16 khz ,3: 32 khz - * Ranges : 64 khz incoming clock then following option - * 0 : 8 khz, 1: 16 Khz, 2: 32 khz ,3: 64 khz - * @return none - */ -void RSI_WURX_Init(uint16_t bypass_l1_enable, uint16_t l1_freq_div, uint16_t l2_freq_div) -{ - // Wait for Out of reset - while (!(WURX_MANUAL_CALIB_MODE_REG2 & 0x000001)) - ; - while (!(WURX_CORR_DET_READ_REG & 0x000002)) - ; - - // Bypass L1 pattern - WURX_BYPASS_LEVEL1_AND_FREQ |= (bypass_l1_enable << POS21); - - if (bypass_l1_enable) { - // Do nothing here - } else { - // Clear the frequency for L1 level pattern - WURX_BYPASS_LEVEL1_AND_FREQ &= ~(0x7 << POS18); - // Freq L1 pattern (3 : 32Khz, 2 : 16Khz, 1 : 8Khz, 0 : 4Khz) for 32KHz Clock - WURX_BYPASS_LEVEL1_AND_FREQ |= (l1_freq_div << POS18); - } - // Configure L2 pattern - // Clear the frequency for L2 pattern - WURX_BYPASS_LEVEL1_AND_FREQ &= ~(0x3 << POS16); - // Freq L2 pattern (3 : 32Khz, 2 : 16Khz, 1 : 8Khz, 0 : 4Khz) for 32KHz Clock - WURX_BYPASS_LEVEL1_AND_FREQ |= (l2_freq_div << POS16); - - WURX_ENABLE_AND_AAC_DET_REG |= (BIT(1) | BIT(0)); -} - -/*==============================================*/ -/** - * @fn void RSI_IPMU_40MhzClkCalib(uint16_t clk_enable, uint32_t channel_selection_value) - * @brief This API is used to calculate the 40MHZ VCO calibration. - * @param[in] clk_enable : Clock enable - * @param[in] channel_selection_value : This parameter define on which channel frequency use for transmission. - * E.g. If channel 11 use for transmission the channel_11 = 2475. - * channel_selection_value = (((channel_11)/(cal_clock*2)) * 2^6) - * So [channel_selection_value =(((2475)/(40*2)) * 2^6) - * Note : Refer RSI_WURX_CalVCOCalFreq() API ,its return calculated value. - * @return none - */ -void RSI_IPMU_40MhzClkCalib(uint16_t clk_enable, uint32_t channel_selection_value) -{ - volatile uint32_t cntr = 0, lco_coarse = 0, lco_fine = 0, chnl_freq = 0, coarse_word = 0, fine_word = 0; - - if (clk_enable) { - chnl_freq = channel_selection_value; - // vco manual - WURX_MANUAL_CALIB_MODE_REG1 &= ~(BIT(21)); - // NPSS REF Clock Cleaner OFF = 1 - ULPCLKS_REFCLK_REG |= (BIT(17)); - // NPSS REF Clock Cleaner ON = 0 by default is one - ULPCLKS_REFCLK_REG &= ~(BIT(18)); - // NPSS REF CLOCK Mux to SPI - ULPCLKS_REFCLK_REG &= ~(BIT(16)); - // Ulp_clk 32Mhz clock for Calibration - ULPCLKS_REFCLK_REG |= (BIT(21)); - // wait - for (cntr = 0; cntr < (10 * 4); cntr++) { - __ASM("nop"); - } - // NPSS REF Clock Cleaner ON = 1 - ULPCLKS_REFCLK_REG |= (BIT(18)); - // NPSS REF Clock Cleaner OFF = 0 - ULPCLKS_REFCLK_REG &= ~(BIT(17)); - - // Configure the frequency of reference clock as 0x400 - WURX_AAC_MODE_REG |= ((0x1 << POS20) | (REF_CLOCK_FREQ << POS7)); - - // Configure the receive channel frequency - WURX_LCO_FREQ_CALIB_REG |= ((BIT(13) | channel_selection_value)); - - // Checking the calibration done - while (!(WURX_TEST_MODE_REG & 0x000002)) - ; - while ((WURX_TEST_MODE_REG & 0x000002)) - ; - - // Read the LCO coarse and fine word - lco_coarse = ((WURX_MANUAL_CALIB_MODE_REG2) & (0x3E00)); - lco_fine = ((WURX_MANUAL_CALIB_MODE_REG2) & (0x3FC000)); - coarse_word = lco_coarse >> 9; - fine_word = lco_fine >> 14; - - // Calculating proper LCO fine word - while (fine_word == 255) { - chnl_freq = (chnl_freq - 4); - - WURX_MANUAL_CALIB_MODE_REG1 &= ~(BIT(21)); - // NPSS REF Clock Cleaner OFF = 1 - ULPCLKS_REFCLK_REG |= (BIT(17)); - // NPSS REF Clock Cleaner ON = 0 by default is one - ULPCLKS_REFCLK_REG &= ~(BIT(18)); - // NPSS REF CLOCK Mux to SPI - ULPCLKS_REFCLK_REG &= ~(BIT(16)); - // Ulp_clk 32Mhz clock for Calibration - ULPCLKS_REFCLK_REG |= (BIT(21)); - // wait - for (cntr = 0; cntr < (10 * 4); cntr++) { - __ASM("nop"); - } - // NPSS REF Clock Cleaner ON = 1 - ULPCLKS_REFCLK_REG |= (BIT(18)); - // NPSS REF Clock Cleaner OFF = 0 - ULPCLKS_REFCLK_REG &= ~(BIT(17)); - - // Configure the frequency of reference clock as 0x400 - WURX_AAC_MODE_REG |= ((0x1 << POS20) | (REF_CLOCK_FREQ << POS7)); - WURX_LCO_FREQ_CALIB_REG &= ~(0x000fff); - - // Configure new receive channel frequency - WURX_LCO_FREQ_CALIB_REG |= ((BIT(13) | (chnl_freq))); - - // Checking the calibration done - while (!(WURX_TEST_MODE_REG & 0x000002)) - ; - while ((WURX_TEST_MODE_REG & 0x000002)) - ; - - fine_word = ((WURX_MANUAL_CALIB_MODE_REG2) & (0x3FC000)) >> 14; - - if (fine_word < 255) { - coarse_word = (coarse_word + 1); - fine_word = (fine_word - 7 * (channel_selection_value - chnl_freq)); - } - } - // Modified the LCO fine and coarse word - lco_fine = fine_word - 6; - lco_coarse = coarse_word; - - // Write the LCO fine and coarse word manual calibration register - ULP_SPI_MEM_MAP(0x87) = 0x3F8000; - WURX_MANUAL_CALIB_MODE_REG1 = BIT(21) | lco_fine << POS13 | lco_coarse << POS8; - ULP_SPI_MEM_MAP(0x87) = 0x000000; - - for (cntr = 0; cntr < 4000 * 4; cntr++) { - __ASM("nop"); - } - - // Disable the calibration clock - WURX_AAC_MODE_REG &= ~(BIT(19) | BIT(20)); - ULPCLKS_REFCLK_REG |= (BIT(17)); - ULPCLKS_REFCLK_REG &= ~(BIT(18)); - } else { - WURX_AAC_MODE_REG &= ~(BIT(19) | BIT(20)); - /* NPSS Ref Clock CLeaner OFF */ - ULPCLKS_REFCLK_REG |= (BIT(17)); - ULPCLKS_REFCLK_REG &= ~(BIT(18)); - } - return; -} - -/*==============================================*/ -/** - * @fn void RSI_IPMU_DCCalib() - * @brief This API is used to calculate the manual DC calibration as well as enable periodic detection enable - * @return none - */ -void RSI_IPMU_DCCalib() -{ - uint16_t j, cal_val_ref = 0, det_ref = 0, cal_val = 0, i; - uint32_t cntr = 0; - - // Set manual dc calibration mode - WURX_COMP_OFFSET_CALIB_REG |= ((VAL1 << POS10) | (DC_OFFSET_VALUE << POS3) | (VAL2 << POS1)); - - // Enable the continuous calibration mode - WURX_ENABLE_AND_AAC_DET_REG |= BIT(2); - - // Calculate the appropriate detection reference shift value - for (i = 0; i <= 15; i++) { - WURX_LNA_IF_REG = (DETECTION_REF_SHIFT - i); - for (cntr = 0; cntr < 120000; cntr++) { - __ASM("nop"); - } - cal_val_ref = ((WURX_MANUAL_CALIB_MODE_REG1 & 0xFE) >> 1); - - if (cal_val_ref <= 100 && cal_val_ref >= 50) { - det_ref = 0; - for (j = 0; j <= 5; j++) { - for (cntr = 0; cntr < 120000; cntr++) { - __ASM("nop"); - } - cal_val = ((WURX_MANUAL_CALIB_MODE_REG1 & 0xFE) >> 1); - if (cal_val >= cal_val_ref - 3 && cal_val <= cal_val_ref + 3) { - det_ref++; - } - } - if (j == det_ref) { - break; - } - } - } -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_CorrEnable(uint16_t wurx_enable) - * @brief This API is used enable wurx correlation. - * @param[in] wurx_enable : Enable wurx correlation - * @return none - */ -void RSI_WURX_CorrEnable(uint16_t wurx_enable) -{ - if (wurx_enable) { - // Correlation Enable - MCU_FSM->MCU_FSM_CRTL_PDM_AND_ENABLES |= (BIT(1)); - } else { - // Disable wurx and clk_en - MCU_FSM->MCU_FSM_CRTL_PDM_AND_ENABLES &= ~(BIT(1)); - } -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_SetWakeUpThreshold(uint16_t threshold_1, uint16_t threshold_2) - * @brief This API is used set up threshold value for operation. - * @param[in] threshold_1 : Threshold value for pattern1. - * @param[in] threshold_2 : Threshold value for pattern2. - * @return none - */ -void RSI_WURX_SetWakeUpThreshold(uint16_t threshold_1, uint16_t threshold_2) -{ - // clear bit9 to 14 - WURX_CORR_CALIB_REG &= ~(THRESH_CLR_MASK_VAL << POS9); - // Set threshold value for pattern1 - WURX_CORR_CALIB_REG |= (threshold_1 << POS9); - - // clear bit3 to 8 - WURX_CORR_CALIB_REG &= ~(THRESH_CLR_MASK_VAL << POS3); - // Set threshold value for pattern2 - WURX_CORR_CALIB_REG |= (threshold_2 << POS3); -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_Pattern2DetectionEnable(uint16_t enable) - * @brief This API is used enable pattern2. - * @param[in] enable : Enable the pattern2 detection bit . - * @return none - */ -void RSI_WURX_Pattern2DetectionEnable(uint16_t enable) -{ - if (enable) { - // Pattern2 detection enable - WURX_CORR_CALIB_REG |= BIT(18); - } else { - // Pattern2 detection disable - WURX_CORR_CALIB_REG &= ~BIT(18); - } -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_TailDataDecodeEnable(uint16_t enable, uint16_t data_len) - * @brief This API is used to enable the Tail data decode. - * @param[in] enable : Enable the tail data decode bit. - * @param[in] data_len : Set the detection bit length. - * - 0 for 64 bit - * - 1 for 128 bit - * - 2 for 192 bit - * - 3 for 256 bit - * @return none - */ -void RSI_WURX_TailDataDecodeEnable(uint16_t enable, uint16_t data_len) -{ - if (enable) { - WURX_CORR_CALIB_REG &= ~VAL3; - // WURX Decode Tail bits - WURX_CORR_CALIB_REG |= BIT(2) | data_len; - } else { - WURX_CORR_CALIB_REG &= ~BIT(2); - } -} - -/*==============================================*/ -/** - * @fn rsi_error_t RSI_WURX_GetTailData(uint32_t *tail_data, uint16_t tail_data_len) - * @brief This API is used get the tail data - * @param[in] tail_data : Pointer to store the tail data. - * @param[in] tail_data_len : This parameter define number of bit read in tail data. - * - 0 for 64 bit - * - 1 for 128 bit - * - 2 for 192 bit - * - 3 for 256 bit - * @return Receive pattern tail data - If Success - */ -rsi_error_t RSI_WURX_GetTailData(uint32_t *tail_data, uint16_t tail_data_len) -{ - if (tail_data_len == TAIL_DATA_DECODE_64BIT) { - // get 64 bit tail data - while (!(WURX_CORR_DET_READ_REG & BIT(16))) - ; - RSI_WURX_ReadPattern1Odd(tail_data); - } else if (tail_data_len == TAIL_DATA_DECODE_128BIT) { - // get 128 bit tail data - while (!(WURX_CORR_DET_READ_REG & BIT(17))) - ; - RSI_WURX_ReadPattern1Odd(tail_data); - while (!(WURX_CORR_DET_READ_REG & BIT(16))) - ; - RSI_WURX_ReadPattern1Even(tail_data); - } else if (tail_data_len == TAIL_DATA_DECODE_192BIT) { - // get 192 bit tail data - while (!(WURX_CORR_DET_READ_REG & BIT(17))) - ; - RSI_WURX_ReadPattern1Odd(tail_data); - while (!(WURX_CORR_DET_READ_REG & BIT(16))) - ; - RSI_WURX_ReadPattern1Even(tail_data); - while (!(WURX_CORR_DET_READ_REG & BIT(15))) - ; - RSI_WURX_ReadPattern2Odd(tail_data); - } else if (tail_data_len == TAIL_DATA_DECODE_256BIT) { - // get 256 bit tail data - while (!(WURX_CORR_DET_READ_REG & BIT(17))) - ; - RSI_WURX_ReadPattern1Odd(tail_data); - while (!(WURX_CORR_DET_READ_REG & BIT(16))) - ; - RSI_WURX_ReadPattern1Even(tail_data); - while (!(WURX_CORR_DET_READ_REG & BIT(15))) - ; - RSI_WURX_ReadPattern2Odd(tail_data); - while (!(WURX_CORR_DET_READ_REG & BIT(14))) - ; - RSI_WURX_ReadPattern2Even(tail_data); - } else { - return INVALID_PARAMETERS; - } - return RSI_OK; -} - -/*==============================================*/ -/** - * @fn uint32_t RSI_WURX_CalThershValue(uint32_t bit_length, uint32_t percentage) - * @brief This API is used to calculate the threshold value. - * @param[in] bit_length : Bit length 64 or 32 bit. - * @param[in] percentage : Percentage the calculate the threshold value. - * @return If success - the threshold value. - */ -uint32_t RSI_WURX_CalThershValue(uint32_t bit_length, uint32_t percentage) -{ - return ((percentage * bit_length) / VAL100); -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_Pattern1MatchValue(uint32_t *match_value) - * @brief This API is used set the match value for detection pattern1 purpose. - * @param[in] match_value : Pointer to the Match value. - * @return none - */ -void RSI_WURX_Pattern1MatchValue(uint32_t *match_value) -{ - // Configure MSB match value for pattern1 - WURX_PATTERN1_REG_MSB = match_value[VAL0]; - - // Configure MID match value for pattern1 - WURX_PATTERN1_REG_MID = match_value[VAL1]; - - // Configure LSB match value for pattern1 - WURX_PATTERN1_REG_LSB = match_value[VAL2]; -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_Pattern2MatchValue(uint32_t *match_value) - * @brief This API is used set the match value for detection pattern2 purpose. - * @param[in] match_value : Pointer to the Match value. - * @return none - */ -void RSI_WURX_Pattern2MatchValue(uint32_t *match_value) -{ - // Configure MSB match value for pattern2 - WURX_PATTERN2_REG_MSB = match_value[VAL0]; - - // Configure MID match value for pattern2 - WURX_PATTERN2_REG_MID = match_value[VAL1]; - - // Configure LSB match value for pattern2 - WURX_PATTERN2_REG_LSB = match_value[VAL2]; -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_SetPatternLength(uint16_t enable, uint16_t l1_len, uint16_t l2_len) - * @brief This API is used set pattern length for wakeup - * @param[in] enable : Enable the set pattern length API. - * @param[in] l1_len : value to decide the l1 pattern length. - * Ranges 0: 2 bits , 1: 4 bits , 2:8 bits 3: 16 bits - * @param[in] l2_len : value to decide the l2 pattern length . - * Ranges 1 : 1 bits, 2: 2 bits, 3: 4 bits - * 4 : 8 bits, 5: 16 bits, 6: 32 bits - * 0,7: 64 bits - * @return none - */ -void RSI_WURX_SetPatternLength(uint16_t enable, uint16_t l1_len, uint16_t l2_len) -{ - if (enable) { - // clear pattern length - WURX_CORR_CALIB_REG &= ~(PATTERN_LEN_CLR_MASK << POS15); - // pattern length - WURX_CORR_CALIB_REG |= l2_len << POS15; - // set pattern length for l1 - WURX_LEVEL1_PATTERN_REG |= (l1_len << POS20); //2 bits pass 1 for 4 bit - } else { - // disable - WURX_CORR_CALIB_REG &= ~(l2_len << POS15); - } -} - -/*==============================================*/ -/** - * @fn uint16_t RSI_WURX_ReadPatternLength() - * @brief This API is used read pattern length - * @return If success - pattern length value - */ -uint16_t RSI_WURX_ReadPatternLength() -{ - uint16_t value; - - // pattern length - value = (WURX_CORR_CALIB_REG & (PATTERN_LEN_MASK)) >> POS15; - - return value; -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_AnalogOff() - * @brief This API is used to off the wurx analog block. - * @return none - */ -void RSI_WURX_AnalogOff() -{ - volatile uint32_t spareReg = 0; - - WURX_ENABLE_AND_AAC_DET_REG &= ~(BIT(0)); - spareReg = ULP_SPI_MEM_MAP(IPMU_SPARE_REG2); - spareReg &= ~BIT(20); - ULP_SPI_MEM_MAP(IPMU_SPARE_REG2) = spareReg; - ULP_SPI_MEM_MAP(IPMU_SPARE_REG2) &= ~BIT(21); - WURX_TEST_MODE_REG |= BIT(19); -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_DigitalOff() - * @brief This API is used to off the digital block. - * @return none - */ -void RSI_WURX_DigitalOff() -{ - RSI_IPMU_PowerGateClr(WURX_CORR_PG_ENB | WURX_PG_ENB); -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_ReadPattern1Odd(uint32_t *tail_data) - * @brief This API is used read odd 64 bit in pattern1. - * @param[in] tail_data : Its data where we store the tail data. - * @return none - */ -void RSI_WURX_ReadPattern1Odd(uint32_t *tail_data) -{ - uint32_t read_tail_data = 0; - - // Read 22 LSB bits of odd pattern1 - tail_data[VAL0] = WURX_ODD_PATTERN1_REG_LSB; - - // Read 22 MID bits of odd pattern1 - read_tail_data = WURX_ODD_PATTERN1_REG_MID; - read_tail_data = (read_tail_data << POS22); - - // Write first 10 bits of odd pattern1 MID register in output buffer - tail_data[VAL0] = tail_data[VAL0] | read_tail_data; - read_tail_data = 0; - - // Read MID bits of odd pattern1 - read_tail_data = WURX_ODD_PATTERN1_REG_MID; - read_tail_data = (read_tail_data >> POS10); - - // Write last 12 bits of odd pattern1 MID register in output buffer - tail_data[VAL1] = read_tail_data; - read_tail_data = 0; - - // Read 20 MSB bits of odd pattern1 - read_tail_data = WURX_ODD_PATTERN1_REG_MSB; - read_tail_data = read_tail_data << POS12; - tail_data[VAL1] = tail_data[VAL1] | read_tail_data; -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_ReadPattern1Even(uint32_t *tail_data) - * @brief This API is used read even 64 bit in pattern1. - * @param[in] tail_data : Its data where we store the tail data. - * @return none - */ -void RSI_WURX_ReadPattern1Even(uint32_t *tail_data) -{ - uint32_t read_tail_data = 0; - - // Read 22 LSB bits of even pattern1 - tail_data[VAL2] = WURX_EVEN_PATTERN1_REG_LSB; - - // Read 22 MID bits of even pattern1 - read_tail_data = WURX_EVEN_PATTERN1_REG_MID; - read_tail_data = (read_tail_data << POS22); - - // Write first 10 bits of even pattern1 MID register in output buffer - tail_data[VAL2] = tail_data[VAL2] | read_tail_data; - read_tail_data = 0; - - // Read MID bits of even pattern1 - read_tail_data = WURX_EVEN_PATTERN1_REG_MID; - read_tail_data = (read_tail_data >> POS10); - - // Write last 12 bits of even pattern1 MID register in output buffer - tail_data[VAL3] = read_tail_data; - read_tail_data = 0; - - // Read 20 MSB bits of even pattern1 - read_tail_data = WURX_EVEN_PATTERN1_REG_MSB; - read_tail_data = read_tail_data << POS12; - tail_data[VAL3] = tail_data[VAL3] | read_tail_data; -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_ReadPattern2Odd(uint32_t *tail_data) - * @brief This API is used read odd 64 bit in pattern2. - * @param[in] tail_data : Its data where we store the tail data. - * @return none - */ -void RSI_WURX_ReadPattern2Odd(uint32_t *tail_data) -{ - uint32_t read_tail_data = 0; - - // Read 22 LSB bits of odd pattern2 - tail_data[VAL4] = WURX_ODD_PATTERN2_REG_LSB; - - // Read 22 MID bits of odd pattern2 - read_tail_data = WURX_ODD_PATTERN2_REG_MID; - read_tail_data = (read_tail_data << POS22); - - // Write first 10 bits of odd pattern1 MID register in output buffer - tail_data[VAL4] = tail_data[VAL4] | read_tail_data; - read_tail_data = 0; - - // Read MID bits of odd pattern2 - read_tail_data = WURX_ODD_PATTERN2_REG_MID; - read_tail_data = (read_tail_data >> POS10); - - // Write last 12 bits of odd pattern2 MID register in output buffer - tail_data[VAL5] = read_tail_data; - read_tail_data = 0; - - // Read 20 MSB bits of odd pattern2 - read_tail_data = WURX_ODD_PATTERN2_REG_MSB; - read_tail_data = read_tail_data << POS12; - tail_data[VAL5] = tail_data[VAL5] | read_tail_data; -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_ReadPattern2Even(uint32_t *tail_data) - * @brief This API is used read even 64 bit in pattern2. - * @param[in] tail_data : Its data where we store the tail data. - * @return none - */ -void RSI_WURX_ReadPattern2Even(uint32_t *tail_data) -{ - uint32_t read_tail_data = 0; - - // Read 22 LSB bits of even pattern2 - tail_data[VAL6] = WURX_ODD_PATTERN2_REG_LSB; - - // Read 22 MID bits of even pattern2 - read_tail_data = WURX_ODD_PATTERN2_REG_MID; - read_tail_data = (read_tail_data << POS22); - - // Write first 10 bits of even pattern2 MID register in output buffer - tail_data[VAL6] = tail_data[VAL6] | read_tail_data; - read_tail_data = 0; - - // Read MID bits of even pattern2 - read_tail_data = WURX_ODD_PATTERN2_REG_MID; - - // Write last 12 bits of even pattern2 MID register in output buffer - read_tail_data = (read_tail_data >> POS10); - tail_data[VAL7] = read_tail_data; - read_tail_data = 0; - - // Read 20 MSB bits of even pattern2 - read_tail_data = WURX_ODD_PATTERN2_REG_MSB; - read_tail_data = read_tail_data << POS12; - tail_data[VAL7] = tail_data[VAL7] | read_tail_data; -} - -/*==============================================*/ -/** - * @fn uint16_t RSI_WURX_TaildataPresent() - * @brief This API is used to verify the tail data detection is present or not. - * @return the number which contain how much data we want to read in tail data e.g if return 0 then 64bit , if 1 then 128 bit and so on. - */ -uint16_t RSI_WURX_TaildataPresent() -{ - uint16_t read; - read = WURX_CORR_CALIB_REG; - read = read & TAIL_DATA_VALUE_CHECK; - return read; -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_SoftwareRestart(void) - * @brief This API is used to do software restart. - * @return none - */ -void RSI_WURX_SoftwareRestart(void) -{ - uint32_t i; - // soft_reset_corr set - WURX_CORR_CALIB_REG |= BIT(21); - while (GSPI_CTRL_REG1 & SPI_ACTIVE) - ; - for (i = 0; i < 400; i++) { - __ASM("nop"); - } - // soft_reset_corr clear - WURX_CORR_CALIB_REG &= ~BIT(21); - while (GSPI_CTRL_REG1 & SPI_ACTIVE) - ; -} - -/*==============================================*/ -/** - * @fn int32_t RSI_WURX_GetPatternType(void) - * @brief This API is use to get pattern type . e.g pattern1 or pattern2 or false wakeup. - * @return If success - Pattern type - * If fails - -1 - */ -int32_t RSI_WURX_GetPatternType(void) -{ - if ((WURX_CORR_DET_READ_REG & BIT(20)) | (WURX_CORR_DET_READ_REG & BIT(21))) { - return 1; - } else if ((WURX_CORR_DET_READ_REG & BIT(19)) | (WURX_CORR_DET_READ_REG & BIT(18))) { - return 2; - } else { - return -1; - } -} - -/*==============================================*/ -/** - * @fn uint32_t RSI_WURX_CalVCOCalFreq(uint32_t frequncy_value) - * @brief This API is use VCO calibration frequency value. - * @param[in] frequncy_value : Transmission channel frequency value. - * @return If success - the VCO calibration frequency value. - */ -uint32_t RSI_WURX_CalVCOCalFreq(uint32_t frequncy_value) -{ - frequncy_value = (((float)frequncy_value / (80)) * 64); - return frequncy_value; -} - -/*==============================================*/ -/** - * @fn void RSI_WURX_BGSamplingEnable() - * @brief This API is use enable BG sampling mode. - * @return none - */ -void RSI_WURX_BGSamplingEnable() -{ - *(volatile uint32_t *)BG_SAMPLING_ADDR = BG_SAMPLING_VALUE; - - // Moving to BG sampling mode - *(volatile uint32_t *)0x24048140 = 0x3; -} diff --git a/components/device/silabs/si91x/mcu/drivers/service/images/init_deinit_sequence.png b/components/device/silabs/si91x/mcu/drivers/service/images/init_deinit_sequence.png new file mode 100644 index 000000000..4e97e961b Binary files /dev/null and b/components/device/silabs/si91x/mcu/drivers/service/images/init_deinit_sequence.png differ diff --git a/components/device/silabs/si91x/mcu/drivers/service/nvm3/src/sl_si91x_common_flash_intf.c b/components/device/silabs/si91x/mcu/drivers/service/nvm3/src/sl_si91x_common_flash_intf.c index 531fecd9f..c280dbdb4 100644 --- a/components/device/silabs/si91x/mcu/drivers/service/nvm3/src/sl_si91x_common_flash_intf.c +++ b/components/device/silabs/si91x/mcu/drivers/service/nvm3/src/sl_si91x_common_flash_intf.c @@ -36,8 +36,9 @@ /****************************************************** * Variable Definitions ******************************************************/ +#ifndef NVM3_LOCK_OVERRIDE static osSemaphoreId_t nvm3_Sem; - +#endif // NVM3_LOCK_OVERRIDE /******************************************************************************* ***************************  Local VARIABLES  ******************************** ******************************************************************************/ diff --git a/components/device/silabs/si91x/mcu/drivers/service/power_manager/inc/sl_si91x_power_manager.h b/components/device/silabs/si91x/mcu/drivers/service/power_manager/inc/sl_si91x_power_manager.h index 184c32aae..1874ef474 100644 --- a/components/device/silabs/si91x/mcu/drivers/service/power_manager/inc/sl_si91x_power_manager.h +++ b/components/device/silabs/si91x/mcu/drivers/service/power_manager/inc/sl_si91x_power_manager.h @@ -247,6 +247,9 @@ typedef struct { * @return Status code indicating the result: * - SL_STATUS_OK (0x0000) - Success. * - SL_STATUS_ALREADY_INITIALIZED (0x0012) - Power Manager is already initialized. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sli_si91x_power_manager_update_ps_requirement(sl_power_state_t state, boolean_t add); @@ -273,6 +276,9 @@ void sli_si91x_power_manager_debug_log_ps_requirement(sl_power_state_t ps, bool * @return Status code indicating the result: * - SL_STATUS_OK (0x0000) - Success. * - SL_STATUS_ALREADY_INITIALIZED (0x0012) - Power Manager is already initialized. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_power_manager_init(void); /***************************************************************************/ @@ -322,6 +328,9 @@ __STATIC_INLINE void sl_si91x_power_manager_core_exitcritical(void) * - SL_STATUS_OK (0x0000) - Success. * - SL_STATUS_NOT_INITIALIZED (0x0011) - Power Manager is not initialized. * - SL_STATUS_INVALID_PARAMETER (0x0021) - Invalid parameter is passed. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ __STATIC_INLINE sl_status_t sl_si91x_power_manager_add_ps_requirement(sl_power_state_t state) { @@ -368,6 +377,9 @@ __STATIC_INLINE sl_status_t sl_si91x_power_manager_add_ps_requirement(sl_power_s * - SL_STATUS_OK (0x0000) - Success. * - SL_STATUS_NOT_INITIALIZED (0x0011) - The Power Manager is not initialized. * - SL_STATUS_INVALID_PARAMETER (0x0021) - Invalid parameter is passed. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ __STATIC_INLINE sl_status_t sl_si91x_power_manager_remove_ps_requirement(sl_power_state_t state) { @@ -411,6 +423,9 @@ __STATIC_INLINE sl_status_t sl_si91x_power_manager_remove_ps_requirement(sl_powe * - SL_STATUS_NOT_INITIALIZED (0x0011) - Power Manager is not initialized. * - SL_STATUS_INVALID_PARAMETER (0x0021) - Invalid parameter is passed. * - SL_STATUS_INVALID_CONFIGURATION (0x0023) - Invalid configuration of mode. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_power_manager_set_clock_scaling(sl_clock_scaling_t mode); @@ -436,6 +451,9 @@ sl_status_t sl_si91x_power_manager_set_clock_scaling(sl_clock_scaling_t mode); * - SL_STATUS_INVALID_STATE (0x0002) - Not a valid transition. * - SL_STATUS_NOT_INITIALIZED (0x0011) - Power Manager is not initialized. * - SL_STATUS_INVALID_PARAMETER (0x0021) - Invalid parameter is passed. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_power_manager_add_peripheral_requirement(sl_power_peripheral_t *peripheral); @@ -460,6 +478,9 @@ sl_status_t sl_si91x_power_manager_add_peripheral_requirement(sl_power_periphera * - SL_STATUS_OK (0x0000) - Success. * - SL_STATUS_NOT_INITIALIZED (0x0011) - Power Manager is not initialized. * - SL_STATUS_INVALID_PARAMETER (0x0021) - Invalid parameter is passed. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_power_manager_remove_peripheral_requirement(sl_power_peripheral_t *peripheral); @@ -480,7 +501,9 @@ sl_status_t sl_si91x_power_manager_remove_peripheral_requirement(sl_power_periph * - SL_STATUS_OK (0x0000) - Success. * - SL_STATUS_NOT_INITIALIZED (0x0011) - Power Manager is not initialized. * - SL_STATUS_NULL_POINTER (0x0022) - Null pointer is passed. - * + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). * @note Adding and removing power state transition requirement(s) from a callback on a transition event * is not supported. * @note The parameters passed must be persistent, meaning that they need to survive @@ -544,6 +567,8 @@ sl_status_t sl_si91x_power_manager_subscribe_ps_transition_event( * - SL_STATUS_OK (0x0000) - Success. * - SL_STATUS_NOT_INITIALIZED (0x0011) - Power Manager is not initialized. * - SL_STATUS_NULL_POINTER (0x0022) - Null pointer is passed. + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). * * @note An ASSERT is thrown if the handle is not found. ******************************************************************************/ @@ -587,6 +612,9 @@ sl_status_t sl_si91x_power_manager_unsubscribe_ps_transition_event( * - SL_STATUS_NOT_INITIALIZED (0x0011) - Power Manager is not initialized. * - SL_STATUS_INVALID_PARAMETER (0x0021) - Invalid parameter is passed. * - SL_STATUS_INVALID_STATE (0x0002) - Not a valid transition. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_power_manager_sleep(void); @@ -625,6 +653,9 @@ void sl_si91x_power_manager_standby(void); * - SL_STATUS_OK (0x0000) - Success. * - SL_STATUS_NOT_INITIALIZED (0x0011) - Power Manager is not initialized. * - SL_STATUS_INVALID_PARAMETER (0x0021) - Invalid parameter is passed. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_power_manager_set_wakeup_sources(uint32_t source, boolean_t add); @@ -658,6 +689,9 @@ sl_status_t sl_si91x_power_manager_set_wakeup_sources(uint32_t source, boolean_t * - SL_STATUS_OK (0x0000) - Success. * - SL_STATUS_NOT_INITIALIZED (0x0011) - Power Manager is not initialized. * - SL_STATUS_NULL_POINTER (0x0022) - Null pointer is passed. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_power_manager_configure_ram_retention(sl_power_ram_retention_config_t *config); @@ -807,6 +841,8 @@ boolean_t sl_si91x_power_manager_is_ok_to_sleep(void); * If any software module returned SL_SI91X_POWER_MANAGER_ISR_SLEEP and none returned SL_SI91X_POWER_MANAGER_ISR_WAKEUP, * the system will go back to sleep. Any other combination will cause the system not to go back to sleep. * +* @image html init_deinit_sequence.png "Peripheral init/deinit sequence for sleep/wakeup" +* * ***Debugging feature*** * * By installing the Power Manager debug component and setting the configuration define SL_SI91X_POWER_MANAGER_DEBUG to 1, it is possible diff --git a/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sli_si91x_power_manager.c b/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sli_si91x_power_manager.c index 054fdd365..af3df7779 100644 --- a/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sli_si91x_power_manager.c +++ b/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sli_si91x_power_manager.c @@ -46,6 +46,11 @@ #ifdef SL_SI91X_POWER_MANAGER_UC_AVAILABLE #include "sl_si91x_power_manager_wakeup_handler.h" #endif +#ifdef SLI_SI91X_MCU_ENABLE_PSRAM_FEATURE +#include "sl_si91x_psram_config.h" +#include "rsi_d_cache.h" +#endif +#include "rsi_debug.h" /******************************************************************************* *************************** DEFINES / MACROS ******************************** @@ -61,8 +66,9 @@ #endif #define MAX_ULPSS_RAM_SIZE 8 // Maximum ulpss RAM size #define SOC_PLL_REF_FREQUENCY 40000000 // SOC Pll reference frequency -#define PS4_HP_FREQUENCY 100000000 // PS4 high power clock frequency -#define PS4_LP_FREQUENCY 32000000 // PS4 low power clock frequency +#define INTF_PLL_REF_FREQUENCY 40000000 // INTF Pll reference frequency +#define PS4_HP_FREQUENCY 180000000 // PS4 high power clock frequency +#define PS4_LP_FREQUENCY 100000000 // PS4 low power clock frequency #define PS3_HP_FREQUENCY 80000000 // PS3 high power clock frequency #define PS3_LP_FREQUENCY 32000000 // PS3 low power clock frequency #define DIVISION_FACTOR 0 // Division Factor for clock @@ -260,7 +266,12 @@ sl_status_t sli_si91x_power_manager_set_sleep_configuration(sl_power_state_t sta if (state != SL_SI91X_POWER_MANAGER_PS2) { //Changing the Core-Clock to ULP_REF clock before entering Sleep mode. RSI_CLK_M4SocClkConfig(M4CLK, M4_ULPREFCLK, 0); +#ifdef SLI_SI91X_MCU_ENABLE_PSRAM_FEATURE + /* Configuring clock for PSRAM to ULP_REF before entering Sleep mode. */ + RSI_CLK_Qspi2ClkConfig(M4CLK, QSPI_ULPREFCLK, 0, 0, 0); +#endif } + // If any error code, it returns it otherwise goes to sleep with retention. status = trigger_sleep(&config, SLEEP_WITH_RETENTION); if (status != SL_STATUS_OK) { @@ -509,6 +520,9 @@ sl_status_t sli_si91x_power_manager_configure_clock(sl_power_state_t state, bool ******************************************************************************/ void sli_si91x_power_manager_init_hardware(void) { + // Power-Down the deep-sleep timer + RSI_PS_PowerSupplyDisable(POWER_ENABLE_DEEPSLEEP_TIMER); + // Sets PS4 Power save mode, 100 MHz. sli_si91x_power_manager_configure_clock(SL_SI91X_POWER_MANAGER_PS4, false); } @@ -540,17 +554,19 @@ static void low_power_hardware_configuration(boolean_t is_sleep) RSI_PS_SocPllSpiDisable(); // Power-Down QSPI-DLL Domain RSI_PS_QspiDllDomainDisable(); + // Enable first boot up RSI_PS_EnableFirstBootUp(1); - /* Configure PMU Start-up Time to be used on Wake-up*/ + // Configure PMU Start-up Time to be used on Wake-up RSI_PS_PmuGoodTimeDurationConfig(PMU_GOOD_TIME); - /* Configure XTAL Start-up Time to be used on Wake-up*/ + // Configure XTAL Start-up Time to be used on Wake-up RSI_PS_XtalGoodTimeDurationConfig(XTAL_GOOD_TIME); - // by using this API we programmed the RTC timer clock in SOC - // MSB 8 bits for the Integer part & - // LSB 17bits for the Fractional part - // Ex: 32Khz clock = 31.25us ==> 31.25*2^17 = 4096000 = 0x3E8000 - /* Time Period Programming */ + + // The API allows configuring the time period for the sleep clock. + // MSB 8-bits for the Integer part &c + // LSB 17-bits for the Fractional part + // Ex: 32kHz clock = 31.25us ==> 31.25*2^17 = 4096000 = 0x3E8000 + // Ex: 32.768kHz clock = 30.51us ==> 30.51*2^17 = 4000000 = 0x3D0900 RSI_TIMEPERIOD_TimerClkSel(TIME_PERIOD, 0x003E7FFF); } @@ -757,11 +773,13 @@ static sl_status_t trigger_sleep(sli_power_sleep_config_t *config, uint8_t sleep config->vector_offset, config->mode); #if SL_WIFI_COMPONENT_INCLUDED + /* Check's if SOC is in PS2 state. If so, skip writing to PLL registers as they are unavailable in this state. */ if (!(M4_ULP_SLP_STATUS_REG & ULP_MODE_SWITCHED_NPSS)) { if (sl_si91x_is_device_initialized()) { /* Check whether M4 is using XTAL */ if (sli_si91x_is_xtal_in_use_by_m4() == true) { + /* To prevent an open-loop PLL clock condition, ensure the PLL's are turned off before turning off the XTAL (PLL source). */ if (system_clocks.soc_pll_clock != DEFAULT_SOC_PLL_CLOCK) { /* TurnOff the SOC_PLL */ RSI_CLK_SocPllTurnOff(); @@ -787,8 +805,9 @@ static sl_status_t trigger_sleep(sli_power_sleep_config_t *config, uint8_t sleep error_code = RSI_PS_EnterDeepSleep(sleep_type, config->low_freq_clock); #if SL_WIFI_COMPONENT_INCLUDED + /* Check's if SOC is in PS2 state. If so, skip writing to PLL registers as they are unavailable in this state. */ if (!(M4_ULP_SLP_STATUS_REG & ULP_MODE_SWITCHED_NPSS)) { - + /* To avoid an open-loop PLL clock configuration, the PLLs are turned OFF before sleep. Therefore,it's necessary to turnON them upon waking up */ if (system_clocks.soc_pll_clock != DEFAULT_SOC_PLL_CLOCK) { /* TurnON the SOC_PLL */ RSI_CLK_SocPllTurnOn(); @@ -804,6 +823,12 @@ static sl_status_t trigger_sleep(sli_power_sleep_config_t *config, uint8_t sleep RSI_CLK_I2sPllTurnOn(); } } +#endif +#ifdef SLI_SI91X_MCU_ENABLE_PSRAM_FEATURE + rsi_d_cache_invalidate_all(); + /* Configuring clock for PSRAM operation based on selected configs */ + RSI_CLK_SetIntfPllFreq(M4CLK, PS4_HP_FREQUENCY, INTF_PLL_REF_FREQUENCY); + RSI_CLK_Qspi2ClkConfig(M4CLK, QSPI_INTFPLLCLK, 0, 0, PSRAM_FREQ_CLK_DIV_FACTOR); #endif // If error is encountered, it is converted to sl error code. status = convert_rsi_to_sl_error_code(error_code); diff --git a/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sli_si91x_power_manager_wakeup_init.c b/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sli_si91x_power_manager_wakeup_init.c index 6545278e6..cd568de91 100644 --- a/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sli_si91x_power_manager_wakeup_init.c +++ b/components/device/silabs/si91x/mcu/drivers/service/power_manager/src/sli_si91x_power_manager_wakeup_init.c @@ -103,11 +103,6 @@ sl_status_t sli_si91x_power_manager_calendar_init(void) { sl_status_t status = SL_STATUS_OK; #if defined(SL_ENABLE_CALENDAR_WAKEUP_SOURCE) && (SL_ENABLE_CALENDAR_WAKEUP_SOURCE == ENABLE) - // Calendar configuration is set, i.e. clock is set to RC clock. - status = sl_si91x_calendar_set_configuration(CALENDAR_RC_CLOCK); - if (status != SL_STATUS_OK) { - return status; - } // Calendar is initialized. sl_si91x_calendar_init(); #if defined(ENABLE_SECOND) && (ENABLE_SECOND == ENABLE) @@ -222,12 +217,7 @@ sl_status_t sli_si91x_power_manager_wdt_init(void) sl_status_t status = SL_STATUS_OK; #if defined(SL_ENABLE_WDT_WAKEUP_SOURCE) && (SL_ENABLE_WDT_WAKEUP_SOURCE == ENABLE) watchdog_timer_config_t wdt_config; - watchdog_timer_clock_config_t wdt_clock_config; sl_si91x_watchdog_init_timer(); - status = sl_si91x_watchdog_configure_clock(&wdt_clock_config); - if (status != SL_STATUS_OK) { - return status; - } // Configuring watchdog-timer status = sl_si91x_watchdog_set_configuration(&wdt_config); if (status != SL_STATUS_OK) { @@ -252,6 +242,20 @@ sl_status_t sli_si91x_power_manager_dst_init(void) { sl_status_t status = SL_STATUS_OK; #if defined(SL_ENABLE_DST_WAKEUP_SOURCE) && (SL_ENABLE_DST_WAKEUP_SOURCE == ENABLE) + + // Power-up the RTC and Time period block + RSI_PS_NpssPeriPowerUp(SLPSS_PWRGATE_ULP_MCURTC | SLPSS_PWRGATE_ULP_TIMEPERIOD); + + // Power-up the Deep-sleep timer + RSI_PS_PowerSupplyEnable(POWER_ENABLE_DEEPSLEEP_TIMER); + + // by using this API we programmed the RTC timer clock in SOC + // MSB 8-bits for the Integer part & + // LSB 17-bits for the Fractional part + // Eg:- 32KHz = 31.25µs ==> 31.25*2^17 = 4096000 = 0x3E8000 + /* Time Period Programming */ + RSI_TIMEPERIOD_TimerClkSel(TIME_PERIOD, 0x003E7FFF); + RSI_DST_DurationSet(DST_WAKEUP_TIME); status = sl_si91x_power_manager_set_wakeup_sources(SL_SI91X_POWER_MANAGER_DST_WAKEUP, true); if (status != SL_STATUS_OK) { diff --git a/components/device/silabs/si91x/mcu/drivers/service/sensorhub/inc/sensor_hub.h b/components/device/silabs/si91x/mcu/drivers/service/sensorhub/inc/sensor_hub.h index 6cf59682c..2070f5eec 100644 --- a/components/device/silabs/si91x/mcu/drivers/service/sensorhub/inc/sensor_hub.h +++ b/components/device/silabs/si91x/mcu/drivers/service/sensorhub/inc/sensor_hub.h @@ -363,7 +363,9 @@ typedef struct { * @return Status code indicating the result: * SL_STATUS_OK (0X000)- Success, peripherals initialization was done properly. * SL_STATUS_FAIL (0x0001) - Failed, peripherals initialization failed. -* SL_ALL_PERIPHERALS_INIT_FAILED (0x001C), All peripherals initializaion failed +* SL_ALL_PERIPHERALS_INIT_FAILED (0x001C), All peripherals initializaion failed. +* +* For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_sensorhub_init(); @@ -375,7 +377,7 @@ sl_status_t sl_si91x_sensorhub_init(); * @param[in] num_of_sensors - Number of sensors given by user. * @return Number of sensors scanned, if successful. * SL_STATUS_FAIL (0x0001) - No sensors found. -* +* For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_sensorhub_detect_sensors(sl_sensor_id_t sensor_id_info[], uint8_t num_of_sensors); @@ -395,6 +397,7 @@ sl_status_t sl_si91x_sensorhub_detect_sensors(sl_sensor_id_t sensor_id_info[], u * SL_SH_HAL_SENSOR_DELETION_FAILED (0X0016) - Sensor deletion failed at HAL layer. * SL_SH_SENSOR_INDEX_NOT_FOUND (0x00FF) - Given sensor index not found. * +* For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_sensorhub_delete_sensor(sl_sensor_id_t sensor_id); @@ -418,8 +421,8 @@ sl_status_t sl_si91x_sensorhub_delete_sensor(sl_sensor_id_t sensor_id); * SL_SH_CONFIG_NOT_FOUND (0x0010) - Configuration of the sensor not found. * SL_SH_INVALID_MODE (0x0013) - Invalid mode. * SL_SH_HAL_SENSOR_CREATION_FAILED (0x0015) - Sensor creation failed at HAL. -* -******************************************************************************/ +* For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). +*******************************************************************************/ sl_status_t sl_si91x_sensorhub_create_sensor(sl_sensor_id_t sensor_id); /***************************************************************************/ /** @@ -439,6 +442,7 @@ sl_status_t sl_si91x_sensorhub_create_sensor(sl_sensor_id_t sensor_id); * SL_SH_SENSOR_CREATE_FAIL (0x0007) - Given sensor not created. * SL_SH_INVALID_MODE (0x0013) - Invaild mode given. * +* For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_sensorhub_start_sensor(sl_sensor_id_t sensor_id); @@ -458,6 +462,7 @@ sl_status_t sl_si91x_sensorhub_start_sensor(sl_sensor_id_t sensor_id); * SL_SH_TIMER_STOP_FAIL (0x0004) - Failed to stop timer. * SL_SH_SENSOR_CREATE_FAIL (0x0007) - Given sensor not created. * +* For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_sensorhub_stop_sensor(sl_sensor_id_t sensor_id); @@ -625,6 +630,8 @@ sl_sensor_info_t *sli_si91x_get_sensor_info(sl_sensor_id_t sensor_id); * @return Status code indicating the result: * SL_STATUS_OK (0X000) - Success, callback registered. * SL_SH_INVALID_PARAMETERS (0x000B) - Invalid parameters. +* +* For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_sensorhub_notify_cb_register(sl_sensor_signalEvent_t cb_event, sl_sensor_id_t *cb_ack); @@ -650,7 +657,9 @@ void sl_si91x_sensors_timer_cb(TimerHandle_t xTimer); * @param[in] intr_type - NPSS GPIO interrupt type. * @return Status code indicating the result: * SL_STATUS_OK (0X000) - Success, interrupt configured. -* SL_SH_INTERRUPT_TYPE_CONFIG_FAIL (0x000E) - Invaild interrupt type. +* SL_SH_INTERRUPT_TYPE_CONFIG_FAIL (0x000E) - Invalid interrupt type. +* +* For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_gpio_interrupt_config(uint16_t gpio_pin, sl_gpio_intr_type_t intr_type); @@ -688,6 +697,8 @@ void sl_si91x_gpio_interrupt_stop(uint16_t gpio_pin); * SL_SH_POWER_TASK_CREATION_FAILED (0x0019) - Failed to create power task. * SL_SH_SENSOR_TASK_CREATION_FAILED (0x001A) - Failed to create sensor task. * SL_SH_EM_TASK_CREATION_FAILED (0x001B) - Failed to create EM task. +* +* For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_sensor_hub_start(void); @@ -763,8 +774,9 @@ void sli_si91x_sensorhub_ps2tops4_state(void); * * @return Status code indicating the result: * SL_STATUS_OK (0X000)- Success, ADC initialized. -* SL_STATUS_FAIL (0x0001)- Failed to initialize ADC . +* SL_STATUS_FAIL (0x0001)- Failed to initialize ADC. * +* For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sli_si91x_adc_init(void); @@ -777,23 +789,23 @@ sl_status_t sli_si91x_adc_init(void); ******************************************************************************/ void vPortSetupTimerInterrupt(void); -/*=============================================================================*/ +/**************************************************************************/ /** * @brief I2C event handler * @param[in] event - I2C transmit and receive events. */ -/*=============================================================================*/ +/**************************************************************************/ void ARM_I2C_SignalEvent(uint32_t event); -/*=============================================================================*/ +/**************************************************************************/ /** * @brief To fetch ADC bus interface information. This can be used by lower level layers. * @return Pointer to ADC configuration structure. */ -/*=============================================================================*/ +/**************************************************************************/ sl_adc_cfg_t *sl_si91x_fetch_adc_bus_intf_info(void); -/*=============================================================================*/ +/**************************************************************************/ /** * @brief ADC callback to set event flag * @details This callback function is called when ADC event occured and it sets event flag corresponding to that event @@ -801,18 +813,18 @@ sl_adc_cfg_t *sl_si91x_fetch_adc_bus_intf_info(void); * @param[in] event - Callback event (ADC_STATIC_MODE_CALLBACK, * ADC_THRSHOLD_CALLBACK, INTERNAL_DMA, FIFO_MODE_EVENT). */ -/*=============================================================================*/ +/**************************************************************************/ void sl_si91x_adc_callback(uint8_t channel_no, uint8_t event); -/*=============================================================================*/ -/** +/**************************************************************************/ /** * @brief To initialize sdc Interface based on the configuration. * @return Returns status 0 if successful. * Otherwise, it returns an error code. * SL_STATUS_FAIL (0x0001) - Fail. * SL_STATUS_OK (0X000) - Success. - */ -/*=============================================================================*/ + * + * For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). + ***************************************************************************/ sl_status_t sli_si91x_sdc_init(void); /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ @@ -820,10 +832,6 @@ sl_status_t sli_si91x_sdc_init(void); * @fn void sli_config_sdc_params(sl_sdc_config_t * sdc_config) * @brief Initialize the sdc Interface based on the configuration. * @param[in] sdc_config_st_p - Configuration parameters for SDC Driver - * @return Returns status 0 if successful. - * Otherwise, it returns an error code. - * SL_STATUS_FAIL (0x0001) - Fail. - * SL_STATUS_OK (0X000) - Success. *******************************************************************************/ void sli_config_sdc_params(sl_drv_sdc_config_t *sdc_config_st_p); /** @endcond */ diff --git a/components/device/silabs/si91x/mcu/drivers/service/sensorhub/src/sensor_hub.c b/components/device/silabs/si91x/mcu/drivers/service/sensorhub/src/sensor_hub.c index eac2643ab..3034a1d55 100644 --- a/components/device/silabs/si91x/mcu/drivers/service/sensorhub/src/sensor_hub.c +++ b/components/device/silabs/si91x/mcu/drivers/service/sensorhub/src/sensor_hub.c @@ -417,6 +417,10 @@ void sli_si91x_sleep_wakeup(uint16_t sh_sleep_time) M4ULP_RAM16K_RETENTION_MODE_EN | ULPSS_RAM_RETENTION_MODE_EN | /* TA_RAM_RETENTION_MODE_EN |*/ M4ULP_RAM_RETENTION_MODE_EN /*| M4SS_RAM_RETENTION_MODE_EN | HPSRAM_RET_ULP_MODE_EN*/); /* Enable SRAM Retention of 16KB during Sleep */ + // by using this API we programmed the RTC timer clock in SOC + // MSB 8-bits for the Integer part & + // LSB 17-bits for the Fractional part + // Eg:- 32KHz = 31.25µs ==> 31.25*2^17 = 4096000 = 0x3E8000 /* Time Period Programming */ RSI_TIMEPERIOD_TimerClkSel(TIME_PERIOD, 0x003E7FFF); @@ -480,10 +484,10 @@ void sli_si91x_sensorhub_ps4tops2_state(void) RSI_PS_EnableFirstBootUp(1); /* Enable first boot up */ - /* by using this API we programmed the RTC timer clock in SOC - MSB 8 bits for the Integer part & - LSB 17bits for the Fractional part - Ex: 32Khz clock = 31.25us ==> 31.25*2^17 = 4096000 = 0x3E8000*/ + // by using this API we programmed the RTC timer clock in SOC + // MSB 8-bits for the Integer part & + // LSB 17-bits for the Fractional part + // Eg:- 32KHz = 31.25µs ==> 31.25*2^17 = 4096000 = 0x3E8000 /* Time Period Programming */ RSI_TIMEPERIOD_TimerClkSel(TIME_PERIOD, 0x003E7FFF); /* tass_ref_clk_mux_ctr in NWP Control */ diff --git a/components/device/silabs/si91x/mcu/drivers/service/sleeptimer/src/sl_sleeptimer_hal_si91x_sysrtc.c b/components/device/silabs/si91x/mcu/drivers/service/sleeptimer/src/sl_sleeptimer_hal_si91x_sysrtc.c index 44fa1294e..6a5fabcab 100644 --- a/components/device/silabs/si91x/mcu/drivers/service/sleeptimer/src/sl_sleeptimer_hal_si91x_sysrtc.c +++ b/components/device/silabs/si91x/mcu/drivers/service/sleeptimer/src/sl_sleeptimer_hal_si91x_sysrtc.c @@ -83,13 +83,8 @@ void sleeptimer_hal_init_timer(void) const rsi_sysrtc_group_channel_compare_config_t group_compare_channel_config = SYSRTC_GROUP_CHANNEL_COMPARE_CONFIG_DEFAULT_REGMODE; -#if defined(SL_SI91X_MODULE_BOARD) - // Enable 32kHz RC clock to SYSRTC peripheral - rsi_sysrtc_clk_set(RSI_SYSRTC_CLK_32kHz_RC, 0u); -#else // Enable 32kHz XTAL clock to SYSRTC peripheral rsi_sysrtc_clk_set(RSI_SYSRTC_CLK_32kHz_Xtal, 0u); -#endif // SL_SI91X_MODULE_BOARD // Initialize SYSRTC module rsi_sysrtc_init(&sysrtc_config); @@ -304,11 +299,7 @@ void SLEEPTIMER_SI91X_INTERRUPT_HANDLER(void) uint32_t sleeptimer_hal_get_timer_frequency(void) { // There is currently no call for in Si91x library to obtain peripheral frequency of SYSRTC. -#if defined(SL_SI91X_MODULE_BOARD) - return DEFAULT_32KHZ_RC_CLOCK; -#else return DEFAULT_32KHZ_XTAL_CLOCK; -#endif // SL_SI91X_MODULE_BOARD } /******************************************************************************* diff --git a/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/rsi_power_save.h b/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/rsi_power_save.h index 25074ee06..3a5e2ee12 100644 --- a/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/rsi_power_save.h +++ b/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/rsi_power_save.h @@ -1108,7 +1108,7 @@ STATIC INLINE void RSI_PS_FsmHfFreqConfig(uint32_t freq) /** * @fn STATIC INLINE void RSI_PS_FsmLfClkSel(AON_CLK_T fsmLfClk) - * @brief This API is used to configure the FSM low frequency clock + * @brief This API is used to configure the FSM low frequency clock * @param[in] fsmLfClk enum value of the low frequency clock sources * \ref MCUAON_KHZ_CLK_SEL_POR_RESET_STATUS_b * @return none diff --git a/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/rsi_rtc.h b/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/rsi_rtc.h index 21305ff57..6dfd09096 100644 --- a/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/rsi_rtc.h +++ b/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/rsi_rtc.h @@ -84,8 +84,8 @@ typedef struct RTC_TIME_CONFIG { uint8_t Day; ///< Day (Format 1...31) RTC_DAY_OF_WEEK_T DayOfWeek; ///< Day of the week (Format 0...6) RTC_MONTH_T Month; ///< Month (Format 1...12) - uint8_t Year; ///< Year (Format 1...99) + 2000 - uint8_t Century; ///< Century + uint8_t Year; ///< Year (Format 0...99) + 2000 + uint8_t Century; ///< Century (Format 0...3) } RTC_TIME_CONFIG_T; /** diff --git a/components/device/silabs/si91x/mcu/drivers/systemlevel/src/rsi_rtc.c b/components/device/silabs/si91x/mcu/drivers/systemlevel/src/rsi_rtc.c index a65357277..932eb7a88 100644 --- a/components/device/silabs/si91x/mcu/drivers/systemlevel/src/rsi_rtc.c +++ b/components/device/silabs/si91x/mcu/drivers/systemlevel/src/rsi_rtc.c @@ -64,12 +64,15 @@ void RSI_RTC_Init(RTC_Type *Cal) /* Power-Up RTC Domain */ RSI_PS_NpssPeriPowerUp(SLPSS_PWRGATE_ULP_MCURTC | SLPSS_PWRGATE_ULP_TIMEPERIOD); - /*Wait for RTC-ON pluse synchronization*/ + /*Wait for RTC-ON pulse synchronization*/ do { RTC->MCU_CAL_ALARM_PROG_1 = 6U; } while (RTC->MCU_CAL_ALARM_PROG_1 != 6U); - //TODO: Update the RTC clock INIT code here + // by using this API we programmed the RTC timer clock in SOC + // MSB 8-bits for the Integer part & + // LSB 17-bits for the Fractional part + // Eg:- 32KHz = 31.25µs ==> 31.25*2^17 = 4096000 = 0x3E8000 /* Time Period Programming */ RSI_TIMEPERIOD_TimerClkSel(TIME_PERIOD, 0x003E7FFF); /*Enable power gates*/ @@ -327,7 +330,7 @@ void RSI_RTC_IntrClear(uint32_t intr) /*==============================================*/ /** * @fn void RSI_RTC_CalibInitialization(void) - * @brief This API is used to initilization RTC CALIBRATION + * @brief This API is used to initialize RTC CALIBRATION * @return none */ diff --git a/components/device/silabs/si91x/mcu/drivers/systemlevel/src/rsi_time_period.c b/components/device/silabs/si91x/mcu/drivers/systemlevel/src/rsi_time_period.c index 11fd02196..556761a74 100644 --- a/components/device/silabs/si91x/mcu/drivers/systemlevel/src/rsi_time_period.c +++ b/components/device/silabs/si91x/mcu/drivers/systemlevel/src/rsi_time_period.c @@ -20,6 +20,15 @@ */ #include "rsi_time_period.h" +#include "rsi_power_save.h" + +// by using these macros, we program the RTC timer clock in SOC +// MSB 8-bits for the Integer part &c +// LSB 17-bits for the Fractional part +// Ex: 32kHz clock = 31.25us ==> 31.25*2^17 = 4096000 = 0x3E8000 +// Ex: 32.768kHz clock = 30.51us ==> 30.51*2^17 = 4000000 = 0x3D0900 +#define RTC_TIME_PERIOD_32000HZ (0x003E7FFFUL) // Time period value for 32kHz +#define RTC_TIME_PERIOD_32768HZ (0x003D08FFUL) // Time period value for 32.768kHz #ifndef UNUSED_PARAMETER #define UNUSED_PARAMETER(x) (void)(x) @@ -315,13 +324,24 @@ rsi_error_t RSI_TIMEPERIOD_ROCalibration(TIME_PERIOD_Type *pstcTimePeriod, rsi_error_t RSI_TIMEPERIOD_TimerClkSel(TIME_PERIOD_Type *pstcTimePeriod, uint32_t u32TimePeriod) { + uint32_t rtc_time_period = 0, clock_type = 0; + + UNUSED_PARAMETER(u32TimePeriod); /*Check for the NULL parameter*/ if (pstcTimePeriod == NULL) { return ERROR_TIME_PERIOD_PARAMETERS; } - /*Update the timer period */ - pstcTimePeriod->MCU_CAL_TIMER_CLOCK_PERIOD_b.RTC_TIMER_CLK_PERIOD = (unsigned int)(u32TimePeriod & 0x01FFFFFF); + // read the currently configured FSM low frequency clock + clock_type = MCU_AON->MCUAON_KHZ_CLK_SEL_POR_RESET_STATUS_b.AON_KHZ_CLK_SEL; + if (clock_type == KHZ_XTAL_CLK_SEL) { + rtc_time_period = RTC_TIME_PERIOD_32768HZ; + } else if (clock_type == KHZ_RC_CLK_SEL) { + rtc_time_period = RTC_TIME_PERIOD_32000HZ; + } + + /*Update the timer period */ + pstcTimePeriod->MCU_CAL_TIMER_CLOCK_PERIOD_b.RTC_TIMER_CLK_PERIOD = (unsigned int)(rtc_time_period & 0x01FFFFFF); /*Indicated SOC programmed rtc_timer clock period is applied at KHz clock domain*/ while (!pstcTimePeriod->MCU_CAL_TIMER_CLOCK_PERIOD_b.SPI_RTC_TIMER_CLK_PERIOD_APPLIED_b) ; diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/component/i2c_instance.slcc b/components/device/silabs/si91x/mcu/drivers/unified_api/component/i2c_instance.slcc index 7d80cb814..e00202bab 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/component/i2c_instance.slcc +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/component/i2c_instance.slcc @@ -29,6 +29,7 @@ root_path: "components/device/silabs/si91x/mcu/drivers/unified_api" config_file: - path: config/sl_si91x_i2c_init_{{instance}}_config.h file_id: i2c_config + unless: [sl_si70xx] provides: - name: i2c_instance allow_multiple: true diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/component/sl_calendar.slcc b/components/device/silabs/si91x/mcu/drivers/unified_api/component/sl_calendar.slcc index 46628f484..4907a732d 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/component/sl_calendar.slcc +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/component/sl_calendar.slcc @@ -11,8 +11,6 @@ description: > category: Device|Si91x|MCU|Peripheral quality: production component_root_path: "components/device/silabs/si91x/mcu/drivers/unified_api" -config_file: - - path: "config/sl_si91x_calendar_config.h" source: - path: "src/sl_si91x_calendar.c" include: diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/component/sl_ulp_uart.slcc b/components/device/silabs/si91x/mcu/drivers/unified_api/component/sl_ulp_uart.slcc index d28761675..36bcfcff6 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/component/sl_ulp_uart.slcc +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/component/sl_ulp_uart.slcc @@ -30,6 +30,7 @@ define: - name: SL_SI91X_USART_DMA - name: SL_SI91X_DMA - name: ULP_UART_MODULE + - name: SL_SI91X_ULP_UART requires: - name: udma_linker_config - name: sl_dma diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps1604m_sqr/sl_si91x_psram_config.h b/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps1604m_sqr/sl_si91x_psram_config.h index 73da97b2a..35c4f1d6a 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps1604m_sqr/sl_si91x_psram_config.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps1604m_sqr/sl_si91x_psram_config.h @@ -30,14 +30,6 @@ // 1 #define PSRAM_FREQ_CLK_DIV_FACTOR 1 -// PSRAM clock source selection -// <0=> QSPI_ULPREFCLK -// <2=> QSPI_INTFPLLCLK -// <3=> QSPI_SOCPLLCLK -// <4=> M4_SOCCLKNOSWLSYNCCLKTREEGATED -// 2 -#define PSRAM_CLK_SOURCE_SEL 2 - // PSRAM Read-Write Type // Normal Read-Write // Fast Read-Write diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps6404l_sqh/sl_si91x_psram_config.h b/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps6404l_sqh/sl_si91x_psram_config.h index caa3c82fc..bc065b5aa 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps6404l_sqh/sl_si91x_psram_config.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps6404l_sqh/sl_si91x_psram_config.h @@ -30,14 +30,6 @@ // 1 #define PSRAM_FREQ_CLK_DIV_FACTOR 1 -// PSRAM clock source selection -// <0=> QSPI_ULPREFCLK -// <2=> QSPI_INTFPLLCLK -// <3=> QSPI_SOCPLLCLK -// <4=> M4_SOCCLKNOSWLSYNCCLKTREEGATED -// 2 -#define PSRAM_CLK_SOURCE_SEL 2 - // PSRAM Read-Write Type // Normal Read-Write // Fast Read-Write diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps6404l_sqrh/sl_si91x_psram_config.h b/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps6404l_sqrh/sl_si91x_psram_config.h index 84d7a0472..c5e5833ed 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps6404l_sqrh/sl_si91x_psram_config.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/config/psram_device_config/aps6404l_sqrh/sl_si91x_psram_config.h @@ -30,14 +30,6 @@ // 1 #define PSRAM_FREQ_CLK_DIV_FACTOR 1 -// PSRAM clock source selection -// <0=> QSPI_ULPREFCLK -// <2=> QSPI_INTFPLLCLK -// <3=> QSPI_SOCPLLCLK -// <4=> M4_SOCCLKNOSWLSYNCCLKTREEGATED -// 2 -#define PSRAM_CLK_SOURCE_SEL 2 - // PSRAM Read-Write Type // Normal Read-Write // Fast Read-Write diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_dac_config.h b/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_dac_config.h index b4202400a..636706f68 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_dac_config.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_dac_config.h @@ -67,7 +67,7 @@ extern "C" { // DAC0 OUT on ULP_GPIO_4/GPIO_68 #ifndef SL_DAC0_OUT_PORT -#define SL_DAC0_OUT_PORT 0 +#define SL_DAC0_OUT_PORT ULP #endif #ifndef SL_DAC0_OUT_PIN #define SL_DAC0_OUT_PIN 4 diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_sysrtc_config.h b/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_sysrtc_config.h index a6bcee88f..4c8505d16 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_sysrtc_config.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_sysrtc_config.h @@ -34,18 +34,14 @@ #include "sl_si91x_sysrtc.h" // <<< Use Configuration Wizard in Context Menu >>> -// Clock Configuration -#define CLK_RO_1KHZ 1 -#define CLK_RO_32KHZ 2 +// Clock Configuration #define CLK_RC_32KHZ 4 #define CLK_32KHZ_XTAL 8 -// SYSRTC Clock -// 1Khz RO CLK -// 32khz RO CLK -// 32khz RC CLK -// 32khz XTAL CLK -// Selection of SYSRTC CLK -#define SL_SYSRTC_CLK_SRC CLK_RC_32KHZ +// SL_SYSRTC_CLK_SRC> SYSRTC Clock +// CLK_RC_32KHZ=> 32khz RC CLK +// CLK_32KHZ_XTAL=> 32khz XTAL CLK +// Selection of SYSRTC CLK +#define SL_SYSRTC_CLK_SRC CLK_32KHZ_XTAL #define DIVISION_FACTOR_0 0 #define DIVISION_FACTOR_2 2 @@ -53,16 +49,15 @@ #define DIVISION_FACTOR_8 8 #define DIVISION_FACTOR_16 16 #define DIVISION_FACTOR_32 32 -// Clock division factor -// 0 -// 2 -// 4 -// 8 -// 16 -// 32 -// Selection of SYSRTC CLK DIVISION FACTOR +// SL_SYSRTC_CLOCK_DIVISION_FACTOR> Clock division factor +// DIVISION_FACTOR_0=> 0 +// DIVISION_FACTOR_2=> 2 +// DIVISION_FACTOR_4=> 4 +// DIVISION_FACTOR_8=> 8 +// DIVISION_FACTOR_16=> 16 +// DIVISION_FACTOR_32=> 32 +// Selection of SYSRTC CLK DIVISION FACTOR #define SL_SYSRTC_CLOCK_DIVISION_FACTOR DIVISION_FACTOR_0 -// // SYSRTC Configuration // Counter0 : Enable SYSRTC run during debug diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_ulp_timer_common_config.h b/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_ulp_timer_common_config.h index 761d50ed9..728efc259 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_ulp_timer_common_config.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_ulp_timer_common_config.h @@ -40,22 +40,22 @@ extern "C" { /******************** ADC Peripheral CommonConfiguration **********************/ // <<< Use Configuration Wizard in Context Menu >>> -// ULP Timer Clock Configuration +// ULP Timer Clock Configuration -// Clock Type -// Static (auto select) -// Dynamic -// Selection of the Timer CLK Type. +// SL_ULP_TIMER_CLK_TYPE> Clock Type +// SL_ULP_TIMER_CLK_TYPE_STATIC=> Static (auto select) +// SL_ULP_TIMER_CLK_TYPE_DYNAMIC=> Dynamic +// Selection of the Timer CLK Type. #define SL_ULP_TIMER_CLK_TYPE SL_ULP_TIMER_CLK_TYPE_STATIC -// Sync to ULPSS PCLK -// Enable or disable sync to ULPSS pclock. -// Default: 0 +// SL_ULP_TIMER_SYNC_TO_ULPSS_PCLK> Sync to ULPSS PCLK +// Enable or disable sync to ULPSS pclock. +// Default: 0 #define SL_ULP_TIMER_SYNC_TO_ULPSS_PCLK 0 -// Wait for switching timer clock -// 1 : Enable waiting for switching timer clk & 0 : Skip waiting for switching timer clk. -// Default: 0 +// SL_ULP_TIMER_SKIP_SWITCH_TIME> Wait for switching timer clock +// 1 : Enable waiting for switching timer clk & 0 : Skip waiting for switching timer clk. +// Default: 0 #define SL_ULP_TIMER_SKIP_SWITCH_TIME 0 // clock source @@ -68,7 +68,6 @@ extern "C" { // Selection of the Clock source #define SL_ULP_TIMER_CLK_INPUT_SOURCE ULP_TIMER_32MHZ_RC_CLK_SRC //default timer clock input source is ref clock -// // <<< end of configuration section >>> ulp_timer_clk_src_config_t sl_timer_clk_handle = { @@ -81,4 +80,4 @@ ulp_timer_clk_src_config_t sl_timer_clk_handle = { #ifdef __cplusplus } #endif // SL_ULP_TIMER -#endif /* SL_SI91X_ULP_TIMER_COMMON_CONFIG_H */ +#endif /* SL_SI91X_ULP_TIMER_COMMON_CONFIG_H */ \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_watchdog_timer_config.h b/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_watchdog_timer_config.h index 53e59fa03..d4020ba5a 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_watchdog_timer_config.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/config/sl_si91x_watchdog_timer_config.h @@ -43,19 +43,6 @@ // Default: 1 #define WDT_TIMER_UC 1 -// Clock Configuration -#define KHZ_RO_CLK_SEL 1 -#define KHZ_RC_CLK_SEL 2 -#define KHZ_XTAL_CLK_SEL 4 -// Low Frequency Clock -// RO CLK -// RC CLK -// XTAL CLK -// Selection of Low Frequency FSM CLK -#define SL_LOW_FREQ_FSM_CLK_SRC KHZ_RC_CLK_SEL -#define FSM_32MHZ_RC 2 -// - // Watchdog Timer Configuration // System-reset time diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_calendar.h b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_calendar.h index 836b19c68..0d26ee33b 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_calendar.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_calendar.h @@ -56,6 +56,7 @@ extern "C" { // ----------------------------------------------------------------------------- // Data Types + #define TIME_CONVERSION_ENUM(name) \ typedef uint8_t name; \ enum name##_enum ///< Time Conversion format enum declaration @@ -136,20 +137,12 @@ typedef struct { /** * @brief To configure and initialize Calendar (i.e., the RTC clock). * - * @details It takes input of clock type enum \ref sl_calendar_clock_t. - * The clock type (that is, clock source) can be set to RC or XTAL. It configures the clock type and - * then initializes the RTC clock accordingly. + * @details This API is no longer supported due to the restriction on peripheral drivers to configure clock. * - * @pre Pre-conditions: - * - The system clock must be initialized before calling this function. - * - The necessary hardware resources must be available and configured. - * - * @param[in] clock_type (sl_calendar_clock_t) Enum for RTC Clock Type (RO, RC or XTAL). + * @param[in] clock_type (sl_calendar_clock_t) Enum for RTC Clock Type (RC or XTAL) * - * @return Status code indicating the result: - * - SL_STATUS_OK (0x0000) - Success - * - SL_STATUS_FAIL (0x0001) - The function failed. - * - SL_STATUS_INVALID_PARAMETER (0x0021) - Parameters are invalid. + * @return status, error code as follows: + * - SL_STATUS_OK (0x0000) - return ok to support backward compatibility. * * For more information on the status documentation, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ @@ -162,8 +155,8 @@ sl_status_t sl_si91x_calendar_set_configuration(sl_calendar_clock_t clock_type); * @details Sets the date and time of the Calendar RTC. * The input parameters include a date-time structure, with the following members: * - date Pointer to the Date Configuration Structure - * - Century (uint8_t) Century (0-4) - * - Year (uint8_t) Year (1-99) + (Century * 1000) + * - Century (uint8_t) Century (0-3) + * - Year (uint8_t) Year (0-99) * - Month (enum) Month from the sl_calendar_month_t enum * - DayOfWeek (enum) Day of Week from the sl_calendar_days_of_week_t enum * - Day (uint8_t) Day (1-31) @@ -193,8 +186,8 @@ sl_status_t sl_si91x_calendar_set_date_time(sl_calendar_datetime_config_t *confi * @details The input parameter consists of a date-time structure. The structure is updated with the current date-time parameters. * The members of the structure are listed below: * - date Pointer to the Date Configuration Structure - * - Century (uint8_t) Century (0-4) - * - Year (uint8_t) Year (1-99) + (Century * 1000) + * - Century (uint8_t) Century (0-3) + * - Year (uint8_t) Year (0-99) * - Month (enum) Month from the sl_calendar_month_t enum * - DayOfWeek (enum) Day of Week from the sl_calendar_days_of_week_t enum * - Day (uint8_t) Day (1-31) @@ -222,26 +215,14 @@ sl_status_t sl_si91x_calendar_get_date_time(sl_calendar_datetime_config_t *confi /** * @brief To calibrate the RC clock. * - * @details If the RC clock is selected as the input clock to the calendar, it is recommended - * to calibrate it after the power sequence. It expects the clock calibration structure - * \ref clock_calibration_config_t as input. The members are listed below: - * - rc_enable_calibration: true to enable and false to disable RC calibration - * - rc_enable_periodic_calibration: true to enable and false to disable RC periodic calibration - * - rc_trigger_time: The interval at which the RC clock calibration is triggered. Expected values - 5 sec, 10 sec, 15 sec, 30 sec, 1 min, 2 min. \ref RC_CLOCK_CALIBRATION_ENUM - * - * @pre Pre-condition: - * - \ref sl_si91x_calendar_calibration_init - * + * @details This API is no longer supported due to the restriction on peripheral drivers to configure clock. + * * @param[in] clock_calibration_config Pointer to the clock calibration structure (\ref clock_calibration_config_t). - * - * @return Status code indicating the result: - * - SL_STATUS_OK (0x0000) - Success. - * - SL_STATUS_INVALID_PARAMETER (0x0021) - Parameters are invalid. - * - SL_STATUS_NULL_POINTER (0x0022) - The parameter is a null pointer. - * - * @note Only RC parameters are utilized in this function. - * - * For more information on the status documentation, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). + * + * @return status, error code as follows: + * - SL_STATUS_OK (0x0000) - return ok to support backward compatibility. + * + * For more information on the status documentation, please refer to [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_calendar_rcclk_calibration(clock_calibration_config_t *clock_calibration_config); @@ -249,30 +230,14 @@ sl_status_t sl_si91x_calendar_rcclk_calibration(clock_calibration_config_t *cloc /** * @brief To calibrate the RO clock. * - * @details If the RO clock is selected as the input clock to the calendar, it is recommended - * to calibrate it after the power sequence. This function internally calibrates the RC clock as well. - * It expects the clock calibration structure \ref clock_calibration_config_t as input. - * The members are listed below: - * - rc_enable_calibration: true to enable and false to disable RC calibration - * - rc_enable_periodic_calibration: true to enable and false to disable RC periodic calibration - * - rc_trigger_time: Expected values - 5 sec, 10 sec, 15 sec, 30 sec, 1 min, 2 min \ref RC_CLOCK_CALIBRATION_ENUM - * - ro_enable_calibration: true to enable and false to disable RO calibration - * - ro_enable_periodic_calibration: true to enable and false to disable periodic calibration - * - ro_trigger_time: Expected values - 1 sec, 2 sec, 4 sec, 8 sec \ref RO_CLOCK_CALIBRATION_ENUM - * - * @pre Pre-condition: - * - \ref sl_si91x_calendar_calibration_init - * + * @details This API is no longer supported due to the restriction on peripheral drivers to configure clock. + * * @param[in] clock_calibration_config Pointer to the clock calibration structure (\ref clock_calibration_config_t). - * - * @return Status code indicating the result: - * - SL_STATUS_OK (0x0000) - Success. - * - SL_STATUS_INVALID_PARAMETER (0x0021) - Parameters are invalid. - * - SL_STATUS_NULL_POINTER (0x0022) - The parameter is a null pointer. - * - * @note Both RC and RO parameters are utilized in this function, so it is mandatory to update all the parameters. - * - * For more information on the status documentation, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). + * + * @return status, error code as follows: + * - SL_STATUS_OK (0x0000) - return ok to support backward compatibility. + * + * For more information on the status documentation, please refer to [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_calendar_roclk_calibration(clock_calibration_config_t *clock_calibration_config); @@ -400,8 +365,8 @@ sl_status_t sl_si91x_calendar_unregister_alarm_trigger_callback(void); * @details It is a one-shot alarm; after triggering the alarm, it elapses. * The input parameters consist of a date-time structure. The members of the structure are listed below: * - date Pointer to the Date Configuration Structure - * - Century (uint8_t) Century (0-4) - * - Year (uint8_t) Year (1-99) + (Century * 1000) + * - Century (uint8_t) Century (0-3) + * - Year (uint8_t) Year (0-99) * - Month (enum) Month from the sl_calendar_month_t enum * - DayOfWeek (enum) Day of Week from the sl_calendar_days_of_week_t enum * - Day (uint8_t) Day (1-31) @@ -432,8 +397,8 @@ sl_status_t sl_si91x_calendar_set_alarm(sl_calendar_datetime_config_t *alarm); * The structure is updated with the current date-time parameters. * The members of the structure are listed below: * - date Pointer to the Date Configuration Structure - * - Century (uint8_t) Century (0-4) - * - Year (uint8_t) Year (1-99) + (Century * 1000) + * - Century (uint8_t) Century (0-3) + * - Year (uint8_t) Year (0-99) * - Month (enum) Month from the sl_calendar_month_t enum * - DayOfWeek (enum) Day of Week from the sl_calendar_days_of_week_t enum * - Day (uint8_t) Day (1-31) @@ -465,8 +430,8 @@ sl_status_t sl_si91x_calendar_get_alarm(sl_calendar_datetime_config_t *alarm); * date-time configuration structure with the respective values. * * @param[in] date Pointer to the Date Configuration Structure (\ref sl_calendar_datetime_config_t) - * @param[in] Century (uint8_t) Century (0-4) - * @param[in] Year (uint8_t) Year (1-99) + (Century * 1000) + * @param[in] Century (uint8_t) Century (0-3) + * @param[in] Year (uint8_t) Year (0-99) * @param[in] Month (enum) Month from the sl_calendar_month_t enum * @param[in] DayOfWeek (enum) Day of Week from the sl_calendar_days_of_week_t enum * @param[in] Day (uint8_t) Day (1-31) @@ -573,12 +538,39 @@ boolean_t sl_si91x_calendar_is_sec_trigger_enabled(void); ******************************************************************************/ boolean_t sl_si91x_calendar_is_alarm_trigger_enabled(void); -/***************************************************************************/ -/** - * @brief To start the Calendar RTC. +/***************************************************************************/ /** + * Convert Unix timestamp to Calendar RTC timestamp. + * Timezone is not part of Calendar, assumes and converts in GMT format + * + * @param[in] unix_time (uint32_t) Unix timestamp + * @param[in] cal_date_time (sl_calendar_datetime_config_t *) Pointer to the Date Configuration Structure + * @return status 0 if successful, else error code as follows: + * - SL_STATUS_OK (0x0000) - Success + * - SL_STATUS_INVALID_PARAMETER (0x0021) - Parameters are invalid + * + * For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). + ******************************************************************************/ +sl_status_t sl_si91x_calendar_convert_unix_time_to_calendar_datetime(uint32_t unix_time, + sl_calendar_datetime_config_t *cal_date_time); + +/***************************************************************************/ /** + * Convert Calendar RTC timestamp to Unix timestamp. + * Timezone is not part of Calendar, converts in GMT format * - * @details This function starts the RTC clock. + * @param[in] cal_date_time (sl_calendar_datetime_config_t *) Pointer to the Date Configuration Structure + * @param[in] unix_time (uint32_t *) Pointer to the Unix timestamp variable + * @return status 0 if successful, else error code as follows: + * - SL_STATUS_OK (0x0000) - Success + * - SL_STATUS_INVALID_PARAMETER (0x0021) - Parameters are invalid + * - SL_STATUS_INVALID_RANGE (0x0028) - Parameters are invalid * + * For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). + ******************************************************************************/ +sl_status_t sl_si91x_calendar_convert_calendar_datetime_to_unix_time(sl_calendar_datetime_config_t *cal_date_time, + uint32_t *unix_time); + +/***************************************************************************/ /** + * Starts the Calendar RTC. * @pre Pre-conditions: * - \ref sl_si91x_calendar_set_configuration * - \ref sl_si91x_calendar_init @@ -668,8 +660,6 @@ __STATIC_INLINE void sl_si91x_calendar_clear_alarm_trigger(void) * * @details This function powers up the RTC domain and starts the calendar clock. * - * @pre Pre-conditions: - * - \ref sl_si91x_calendar_set_configuration ******************************************************************************/ __STATIC_INLINE void sl_si91x_calendar_init(void) { diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_dma.h b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_dma.h index 43002f962..3ec4ddd34 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_dma.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_dma.h @@ -281,9 +281,9 @@ sl_status_t sl_si91x_dma_init(sl_dma_init_t *dma_init); * @param[in] dma_number 0 for UDMA0, 1 for ULP_DMA. * * @return sl_status_t De-initialization status: -* - SL_STATUS_OK (0x0000) - De-initialization success. -* - SL_STATUS_BUSY (0x0002) - Cannot de-initialize the peripheral due to an ongoing transfer. -* - SL_STATUS_NOT_INITIALIZED (0x0003) - DMA peripheral not initialized. + * - SL_STATUS_OK (0x0000) - De-initialization success. + * - SL_STATUS_BUSY (0x0002) - Cannot de-initialize the peripheral due to an ongoing transfer. + * - SL_STATUS_NOT_INITIALIZED (0x0003) - DMA peripheral not initialized. * * For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_i2c.h b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_i2c.h index 8d2580558..fb815f0a0 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_i2c.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_i2c.h @@ -345,24 +345,20 @@ sl_i2c_status_t sl_i2c_driver_send_data_blocking(sl_i2c_instance_t i2c_instance, * is updated after data transfer completion. * * @pre Pre-conditions: - * - \ref sl_i2c_driver_init must be called prior. - * - Transfer type must be set to 'using DMA'. - * - \ref sl_i2c_driver_set_follower_address (if sending from follower). - * - * @param[in] i2c_instance The I2C instance to be used. See \ref sl_i2c_instance_t. - * @param[in] address Follower address (7-bit: 0-127, 10-bit: 0-1023). - * @param[in] tx_buffer Pointer to the transmit data buffer. - * @param[in] tx_len Data length in bytes (range: 1-30,000). - * @param[in] p_dma_config Pointer to the DMA configuration structure. See \ref sl_i2c_dma_config_t. - * - * @note It is recommended to use up to 30,000 bytes maximum transfer length, - * but this limit may vary depending on the available RAM size. - * - * @return sl_i2c_status_t Status code indicating the result: - * - \ref SL_I2C_SUCCESS (0x0000) - Operation was successful. - * - \ref SL_I2C_INVALID_PARAMETER (0x000F) - Invalid parameters were provided. - * - SL_DMA_TRANSFER_ERROR - DMA parameters are invalid. - * + * - \ref sl_i2c_driver_init + * - Here transfer-type should be set as DMA-type + * - \ref sl_i2c_driver_set_follower_address, if used in salve application + * @param[in] i2c_instance I2C Instance. + * @param[in] address Follower address can be provided in 7-bit length (0-127) + * or in 10-bit length(0-1023). + * @param[in] tx_buffer A pointer to transmit data buffer + * @param[in] tx_len Data length in number of bytes in the range of 1-30000 bytes. + * @param[in] p_dma_config A pointer to DMA configuration structure \ref sl_i2c_dma_config_t. + * @note Maximum tx_len values can be 30000 (receives back in around 4 seconds) + * @return status 0 if successful, else error code as follow + * - \ref SL_I2C_SUCCESS (0x0000) - Success + * - \ref SL_I2C_INVALID_PARAMETER (0x000F) - Parameters are invalid + * - \ref SL_I2C_DMA_TRANSFER_ERROR (0x000E) - DMA parameters are invalid ******************************************************************************/ sl_i2c_status_t sl_i2c_driver_send_data_non_blocking(sl_i2c_instance_t i2c_instance, uint16_t address, @@ -422,15 +418,13 @@ sl_i2c_status_t sl_i2c_driver_receive_data_blocking(sl_i2c_instance_t i2c_instan * @param[in] p_dma_config Pointer to the DMA configuration structure. See \ref sl_i2c_dma_config_t. * * @note - * - It is recommended to use up to 30,000 bytes maximum transfer length, - * but this limit may vary depending on the available RAM size. - * - The default values cannot be any of the reserved address locations: 0x00 to 0x07, or 0x78 to 0x7f. - * - * @return sl_i2c_status_t Status code indicating the result: - * - \ref SL_I2C_SUCCESS (0x0000) - Operation was successful. - * - \ref SL_I2C_INVALID_PARAMETER (0x000F) - Invalid parameters were provided. - * - SL_DMA_TRANSFER_ERROR - DMA parameters are invalid. - * + * - Maximum rx_len values can be 30000 (receives back in around 4 seconds). + * - The default values cannot be any of the reserved address locations: that is, 0x00 to 0x07, + * or 0x78 to 0x7f. + * @return status 0 if successful, else error code as follow + * - \ref SL_I2C_SUCCESS (0x0000) - Success + * - \ref SL_I2C_INVALID_PARAMETER (0x000F) - Parameters are invalid + * - \ref SL_I2C_DMA_TRANSFER_ERROR (0x000E) - DMA parameters are invalid ******************************************************************************/ sl_i2c_status_t sl_i2c_driver_receive_data_non_blocking(sl_i2c_instance_t i2c_instance, uint16_t address, diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.h b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.h index cfd1e5397..ba5efe3fb 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram.h @@ -486,11 +486,6 @@ sl_psram_return_type_t sl_si91x_psram_enable_encry_decry(uint16_t keySize); * - Interface mode * - SPI Mode (Serial IO) * - QPI Mode (Quad IO) - * - Operation frequency source - * - Interface PLL Clock - * - ULP Reference Clock - * - SoC PLL Clock - * - M4_SOCCLKNOSWLSYNCCLKTREEGATED Clock * * ### Linker configurations * diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram_handle.h b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram_handle.h index f9969aa68..ee22deed5 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram_handle.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_psram_handle.h @@ -32,7 +32,9 @@ */ extern struct sl_psram_info_type_t PSRAM_Device; -/** @defgroup PSRAM_GPIO_PIN_SET PSRAM GPIO Pin Sets +/** + * @addtogroup PSRAM_GPIO_PIN_SET PSRAM GPIO Pin Sets + * @ingroup PSRAM * @{ */ #define PSRAM_GPIO_PIN_SET_52_TO_57 1 /**< GPIO Pin Set 52 to 57 */ @@ -41,9 +43,11 @@ extern struct sl_psram_info_type_t PSRAM_Device; #define PSRAM_GPIO_PIN_SET_46_TO_51_CS_1 4 /**< GPIO Pin Set 46 to 51 with Chip Select 1 */ #define PSRAM_GPIO_PIN_SET_46_TO_57_CS_0 5 /**< GPIO Pin Set 46 to 57 with Chip Select 0 */ #define PSRAM_GPIO_PIN_SET_46_TO_57_CS_1 6 /**< GPIO Pin Set 46 to 57 with Chip Select 1 */ -/** @} */ +/// @} end group PSRAM_GPIO_PIN_SET -/** @defgroup PSRAM_CHIP_SELECT PSRAM Chip Select and Base Address +/** + * @addtogroup PSRAM_CHIP_SELECT PSRAM Chip Select and Base Address + * @ingroup PSRAM * @{ */ #if (PSRAM_GPIO_PIN_SET_SEL == PSRAM_GPIO_PIN_SET_52_TO_57) @@ -65,9 +69,11 @@ extern struct sl_psram_info_type_t PSRAM_Device; #define PSRAM_CHIP_SELECT (CHIP_ONE) /**< Chip Select for GPIO Pin Set 46 to 57 with CS 1 */ #define PSRAM_BASE_ADDRESS (0x0B000000) /**< Base Address for GPIO Pin Set 46 to 57 with CS 1 */ #endif -/** @} */ +/// @} end group PSRAM_CHIP_SELECT -/** @defgroup PSRAM_PIN_CONFIG PSRAM Pin Configuration +/** + * @addtogroup PSRAM_PIN_CONFIG PSRAM Pin Configuration + * @ingroup PSRAM * @{ */ #if (PSRAM_GPIO_PIN_SET_SEL == PSRAM_GPIO_PIN_SET_0_TO_5) @@ -215,6 +221,6 @@ extern struct sl_psram_info_type_t PSRAM_Device; #define NUM_OF_PSRAM_PINS (6) /**< Number of PSRAM Pins for GPIO Pin Set 52 to 57 */ #endif -/** @} */ +/// @} end group PSRAM_PIN_CONFIG #endif //__SL_SI91X_PSRAM_HANDLE_H_ \ No newline at end of file diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_usart.h b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_usart.h index 7b34ff40b..e723b8501 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_usart.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_usart.h @@ -269,8 +269,10 @@ sl_status_t sl_si91x_usart_init(usart_peripheral_t usart_instance, sl_usart_hand * @param[in] usart_handle Pointer to the USART/UART driver. * * @return sl_status_t Status code indicating the result: -* - SL_STATUS_OK (0x0000) - Success, UART/USART deinitialization done properly. -* - SL_STATUS_FAIL (0x0001) - Fail, UART/USART deinitialization failed. + * - SL_STATUS_OK (0x0000) - Success, UART/USART deinitialization done properly. + * - SL_STATUS_FAIL (0x0001) - Fail, UART/USART deinitialization failed. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). * * @note * When the USART/UART module is used in combination with other peripherals, while deinitializing in the application, see the notes below: @@ -284,7 +286,6 @@ sl_status_t sl_si91x_usart_init(usart_peripheral_t usart_instance, sl_usart_hand * 2. A few peripherals (ULP Peripherals, UULP Peripherals, GPDMA, and SDIO-SPI) have separate domains; those can be powered down independently. For additional details, see the Power architecture section in the Hardware Reference Manual. * Here, ULP_UART has a separate power domain ULPSS_PWRGATE_ULP_UART, which can be powered down independently. See the rsi_power_save.h file for all power gate definitions. * - * For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_usart_deinit(sl_usart_handle_t usart_handle); @@ -472,15 +473,16 @@ sl_status_t sl_si91x_usart_async_receive_data(sl_usart_handle_t usart_handle, vo * @param[in] data_length Length of the data to be received. * * @return sl_status_t Status code indicating the result: -* - SL_STATUS_OK (0x0000) - Success, data transfer completed. -* - SL_STATUS_FAIL (0x0001) - Function failed, data transfer failed. -* - SL_STATUS_BUSY (0x0004) - Busy, data transfer is already in progress. -* - SL_STATUS_INVALID_PARAMETER (0x0021) - Invalid parameter. + * - SL_STATUS_OK (0x0000) - Success, data transfer completed. + * - SL_STATUS_FAIL (0x0001) - Function failed, data transfer failed. + * - SL_STATUS_BUSY (0x0004) - Busy, data transfer is already in progress. + * - SL_STATUS_INVALID_PARAMETER (0x0021) - Invalid parameter. + * + * For more information on status codes, see [SL STATUS DOCUMENTATION]( + * https://docs.silabs.com/gecko-platform/latest/platform-common/status). * * @note This function is to be used in USART mode only (i.e., synchronous mode). In asynchronous * mode, use \ref sl_si91x_usart_receive_data() and \ref sl_si91x_usart_send_data(). - * - * For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). ******************************************************************************/ sl_status_t sl_si91x_usart_transfer_data(sl_usart_handle_t usart_handle, const void *data_out, diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_watchdog_timer.h b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_watchdog_timer.h index 71d7b7db6..5acdea37e 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_watchdog_timer.h +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_watchdog_timer.h @@ -40,6 +40,12 @@ extern "C" { #include "rsi_power_save.h" #include "rsi_wwdt.h" +/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ +#ifndef UNUSED_VARIABLE +#define UNUSED_VARIABLE(x) (void)(x) +#endif // UNUSED_VARIABLE +/** @endcond */ + /***************************************************************************/ /** * @addtogroup WATCHDOG-TIMER Watchdog Timer @@ -59,17 +65,6 @@ typedef void (*watchdog_timer_callback_t)(void); typedef FSM_CLK_T high_freq_fsm_clock_t; ///< Renaming high frequency fsm-clock type enum typedef AON_CLK_T low_freq_fsm_clock_t; ///< Renaming low frequency fsm-clock type enum -/***************************************************************************/ -/** - * @brief To represent BG-PMU clock sources. - * - * @details This enumeration defines the possible clock sources for the BG-PMU (Background Power Management Unit). - */ -typedef enum { - RO_32KHZ_CLOCK = 1, ///< RO 32KHz clock - MCU_FSM__CLOCK = 2, ///< MCU FSM clock -} bg_pmu_clock_t; - /***************************************************************************/ /** * @brief Enumeration to represent possible time delay values for WDT interrupt time and system reset time with a 32 KHz clock frequency. @@ -121,7 +116,7 @@ typedef enum { typedef struct { uint8_t low_freq_fsm_clock_src; ///< Low frequency FSM clock source, see \ref low_freq_fsm_clock_t uint8_t high_freq_fsm_clock_src; ///< High frequency FSM clock source, see \ref high_freq_fsm_clock_t - uint8_t bg_pmu_clock_source; ///< BG-PMU clock source, see \ref bg_pmu_clock_t + uint8_t bg_pmu_clock_source; ///< BG-PMU clock source } watchdog_timer_clock_config_t; /***************************************************************************/ @@ -167,7 +162,7 @@ void sl_si91x_watchdog_init_timer(void); /***************************************************************************/ /** - * @brief To enable and configure the Watchdog Timer clock sources. + * @brief This API is no longer supported due to the restriction on peripheral drivers to configuring clocks. * * @details This API configures the Watchdog Timer's low frequency and BG-PMU clock sources. * @@ -177,9 +172,7 @@ void sl_si91x_watchdog_init_timer(void); * @param[in] timer_clk_config_ptr Pointer to the timer clock configuration structure. * * @return sl_status_t Status code indicating the result: - * - SL_STATUS_OK (0x0000) - Success, timer clock-source parameters configured properly. - * - SL_STATUS_INVALID_PARAMETER (0x0021) - Timer configuration structure members have invalid values. - * - SL_STATUS_NULL_POINTER (0x0022) - The parameter is a null pointer. + * - SL_STATUS_OK (0x0000) - return ok to support backward compatibility. * * For more information on status codes, see [SL STATUS DOCUMENTATION](https://docs.silabs.com/gecko-platform/latest/platform-common/status). *******************************************************************************/ @@ -195,7 +188,6 @@ sl_status_t sl_si91x_watchdog_configure_clock(watchdog_timer_clock_config_t *tim * * @pre Pre-conditions: * - \ref sl_si91x_watchdog_init_timer - * - \ref sl_si91x_watchdog_configure_clock * * @param[in] timer_config_ptr Pointer to the timer configuration structure \ref watchdog_timer_config_t. * @@ -240,7 +232,6 @@ sl_status_t sl_si91x_watchdog_register_timeout_callback(watchdog_timer_callback_ * * @pre Pre-conditions: * - \ref sl_si91x_watchdog_init_timer - * - \ref sl_si91x_watchdog_configure_clock * - \ref sl_si91x_watchdog_set_system_reset_time * * @param[in] interrupt_time Timer timeout interrupt duration, represented as \ref time_delays_t. @@ -276,7 +267,6 @@ uint8_t sl_si91x_watchdog_get_interrupt_time(void); * * @pre Pre-conditions: * - \ref sl_si91x_watchdog_init_timer - * - \ref sl_si91x_watchdog_configure_clock * * @param[in] system_reset_time Timer system reset duration, represented as \ref time_delays_t. * Number of clock pulses = 2^(system_reset_time). @@ -313,7 +303,6 @@ uint8_t sl_si91x_watchdog_get_system_reset_time(void); * * @pre Pre-conditions: * - \ref sl_si91x_watchdog_init_timer - * - \ref sl_si91x_watchdog_configure_clock * - \ref sl_si91x_watchdog_set_system_reset_time * - \ref sl_si91x_watchdog_set_interrupt_time * @@ -409,7 +398,6 @@ sl_watchdog_timer_version_t sl_si91x_watchdog_get_version(void); * * @pre Pre-conditions: * - \ref sl_si91x_watchdog_init_timer - * - \ref sl_si91x_watchdog_configure_clock * - \ref sl_si91x_watchdog_register_timeout_callback *******************************************************************************/ __STATIC_INLINE void sl_si91x_watchdog_start_timer(void) @@ -441,7 +429,6 @@ __STATIC_INLINE void sl_si91x_watchdog_stop_timer(void) * * @pre Pre-conditions: * - \ref sl_si91x_watchdog_init_timer - * - \ref sl_si91x_watchdog_configure_clock * - \ref sl_si91x_watchdog_start_timer *******************************************************************************/ __STATIC_INLINE void sl_si91x_watchdog_restart_timer(void) @@ -506,8 +493,7 @@ __STATIC_INLINE void sl_si91x_watchdog_disable_system_reset_on_processor_lockup( * * The Watchdog Timer can be configured using several parameters: * 1. *Initialize the Watchdog Timer:* @ref sl_si91x_watchdog_init_timer -* 2. *Configure the Clocks:* @ref sl_si91x_watchdog_configure_clock -* 3. *Set Watchdog Parameters:* Configure interrupt time, system reset time, and window time using @ref sl_si91x_watchdog_set_configuration. +* 2. *Set Watchdog Parameters:* Configure interrupt time, system reset time, and window time using @ref sl_si91x_watchdog_set_configuration * * @li For more information on configuring available parameters, see the respective peripheral example readme document. * @@ -515,14 +501,13 @@ __STATIC_INLINE void sl_si91x_watchdog_disable_system_reset_on_processor_lockup( * * @li The following functions will initiate and configure the Watchdog Timer, representing the general flow for implementation: * 1. *Initialize the Watchdog Timer:* @ref sl_si91x_watchdog_init_timer -* 2. *Configure the timer clock:* @ref sl_si91x_watchdog_configure_clock -* 3. *System reset status:* @ref sl_si91x_watchdog_get_timer_system_reset_status (Optional, if required to check whether it is a power-on reset or WDT system reset.) -* 4. *Configure the Watchdog Timer:* @ref sl_si91x_watchdog_set_configuration -* 5. *Register Watchdog Timer timeout callback:* @ref sl_si91x_watchdog_register_timeout_callback -* 6. *Start Watchdog Timer:* @ref sl_si91x_watchdog_start_timer -* 7. *Restart Watchdog Timer (To kick the Watchdog Timer):* @ref sl_si91x_watchdog_restart_timer -* 8. *Stop Watchdog Timer:* @ref sl_si91x_watchdog_stop_timer -* 9. *De-initialize Watchdog Timer:* @ref sl_si91x_watchdog_deinit_timer +* 2. *System reset status:* @ref sl_si91x_watchdog_get_timer_system_reset_status (Optional, if required to check whether it is a power-on reset or WDT system reset.) +* 3. *Configure the Watchdog Timer:* @ref sl_si91x_watchdog_set_configuration +* 4. *Register Watchdog Timer timeout callback:* @ref sl_si91x_watchdog_register_timeout_callback +* 5. *Start Watchdog Timer:* @ref sl_si91x_watchdog_start_timer +* 6. *Restart Watchdog Timer (To kick the Watchdog Timer):* @ref sl_si91x_watchdog_restart_timer +* 7. *Stop Watchdog Timer:* @ref sl_si91x_watchdog_stop_timer +* 8. *De-initialize Watchdog Timer:* @ref sl_si91x_watchdog_deinit_timer * * @li To read time values, use the following APIs: * diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_adc.c b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_adc.c index 52e94c3d7..c5dbf0b32 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_adc.c +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_adc.c @@ -45,6 +45,7 @@ #define MISC_CONFIG_MISC_CTRL1 *(volatile uint32_t *)(0x46008000 + 0x44) #endif // MISC_CONFIG_MISC_CTRL1 #define MAX_SAMPLE_RATE 2500000 // Maximum sampling rate 2.5 Msps. +#define INVALID_SAMPLE_RATE 0 // Invalid sample rate. #define MINIMUM_NUMBER_OF_CHANNEL 1 // Minimum number of channel enable #define MAXIMUM_NUMBER_OF_CHANNEL 16 // Maximum number of channel enable #define MAXIMUM_CHANNEL_ID 16 // Maximum adc dma support channel id. @@ -980,6 +981,11 @@ static sl_status_t validate_adc_channel_parameters(sl_adc_channel_config_t *adc_ status = SL_STATUS_INVALID_PARAMETER; break; } + // Invalid sample rate validation. + if (adc_channel_config->sampling_rate[channel] == INVALID_SAMPLE_RATE) { + status = SL_STATUS_NOT_FOUND; + break; + } // Verify the user given sampling rate is proper or not if (adc_channel_config->sampling_rate[channel] > MAX_SAMPLE_RATE) { status = SL_STATUS_INVALID_RANGE; diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_bjt_temperature_sensor.c b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_bjt_temperature_sensor.c index 28d83c28c..1df41e844 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_bjt_temperature_sensor.c +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_bjt_temperature_sensor.c @@ -385,6 +385,10 @@ sl_status_t sl_si91x_bjt_temperature_sensor_deinit(adc_config_t sl_bjt_temperatu if (status != SL_STATUS_OK) { break; } + status = sl_si91x_adc_stop(sl_bjt_temperature_sensor_config); + if (status != SL_STATUS_OK) { + break; + } status = sl_si91x_adc_deinit(sl_bjt_temperature_sensor_config); if (status != SL_STATUS_OK) { break; diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_calendar.c b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_calendar.c index 0b00052d3..c6cd44dcc 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_calendar.c +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_calendar.c @@ -28,30 +28,35 @@ * ******************************************************************************/ #include "sl_si91x_calendar.h" -#include "sl_si91x_calendar_config.h" #include +#include "rsi_time_period.h" /******************************************************************************* *************************** DEFINES / MACROS ******************************** ******************************************************************************/ -#define TIME_UNIX_EPOCH (1970u) // Unix Epoch Year Macro -#define TIME_NTP_EPOCH (1900u) // NTP Epoch Year Macro -#define TIME_SEC_PER_DAY (60u * 60u * 24u) // Seconds in one day -#define TIME_NTP_UNIX_EPOCH_DIFF (TIME_UNIX_EPOCH - TIME_NTP_EPOCH) // NTP and Unix Time difference -#define TIME_DAY_COUNT_NTP_TO_UNIX_EPOCH (TIME_NTP_UNIX_EPOCH_DIFF * 365u + 17u) // Day Count wrt to difference -#define TIME_NTP_EPOCH_OFFSET_SEC (TIME_DAY_COUNT_NTP_TO_UNIX_EPOCH * TIME_SEC_PER_DAY) // NTP offset in seconds -#define TIME_UNIX_TO_NTP_MAX (0xFFFFFFFF - TIME_NTP_EPOCH_OFFSET_SEC) // NTP Maximum timestamp -#define TIME_UNIX_TIMESTAMP_MAX (0x7FFFFFFF) // Unix Maximum timestamp -#define TIME_UNIX_YEAR_MAX (2038u - TIME_NTP_EPOCH) // Maximum unix year -#define TIME_ZONE_DEFAULT (0u) // Default time zone - -#define MINIMUM_DAY (0u) // Minimum day in a week -#define MAXIMUM_HOUR (23u) // Maximum hour in a day -#define MAXIMUM_MINUTE (59u) // Maximum minute in an hour -#define MAXIMUM_SECOND (59u) // Maximum second in a minute -#define MAXIMUM_MILLISECONDS (999u) // Maximum milliseconds in second -#define MAXIMUM_CENTURY (4u) // Maximum supported century -#define MAXIMUM_YEAR (99u) // Maximum year in a century +#define TIME_UNIX_EPOCH (1970u) // Unix Epoch Year Macro +#define TIME_FIRST_LEAP_YEAR_FROM_UNIX_EPOCH (1972u) // 1972 is the first leap year since 1970 +#define TIME_NTP_EPOCH (1900u) // NTP Epoch Year Macro +#define TIME_SEC_PER_DAY (60u * 60u * 24u) // Seconds in one day +#define TIME_DAY_PER_YEAR (365u) +#define TIME_SEC_PER_YEAR (TIME_SEC_PER_DAY * TIME_DAY_PER_YEAR) +#define TIME_NTP_UNIX_EPOCH_DIFF (TIME_UNIX_EPOCH - TIME_NTP_EPOCH) // NTP and Unix Time difference +#define TIME_DAY_COUNT_NTP_TO_UNIX_EPOCH (TIME_NTP_UNIX_EPOCH_DIFF * 365u + 17u) // Day Count wrt to difference +#define TIME_NTP_EPOCH_OFFSET_SEC (TIME_DAY_COUNT_NTP_TO_UNIX_EPOCH * TIME_SEC_PER_DAY) // NTP offset in seconds +#define TIME_UNIX_TO_NTP_MAX (0xFFFFFFFF - TIME_NTP_EPOCH_OFFSET_SEC) // NTP Maximum timestamp +#define TIME_UNIX_TIMESTAMP_MAX (0x7FFFFFFF) // Unix Maximum timestamp +#define TIME_UNIX_YEAR_MAX (2038u) // Maximum unix year +#define TIME_ZONE_DEFAULT (0u) // Default time zone + +#define MINIMUM_DAY (0u) // Minimum day in a week +#define MAXIMUM_DAYS_IN_A_WEEK (7u) // Maximum days in a week +#define MAXIMUM_HOUR (23u) // Maximum hour in a day +#define MAXIMUM_MINUTE (59u) // Maximum minute in an hour +#define MAXIMUM_SECOND (59u) // Maximum second in a minute +#define MAXIMUM_SECONDS_IN_AN_HOUR (3600u) // Maximum seconds in an hour +#define MAXIMUM_MILLISECONDS (999u) // Maximum milliseconds in second +#define MAXIMUM_CENTURY (3u) // Maximum supported century +#define MAXIMUM_YEAR (99u) // Maximum year in a century #define MAXIMUM_EPOCH_DAY (19u) // Maximum day in epoch time #define MAXIMUM_EPOCH_HOUR (3u) // Maximum hour in epoch time @@ -62,12 +67,19 @@ #define CALENDAR_SQA_VERSION (0u) // CALENDAR SQA version #define CALENDAR_DEV_VERSION (2u) // CALENDAR Developer version +#define FUNCTIONALITY_SUPPORTED false + +#ifndef UNUSED_VARIABLE +#define UNUSED_VARIABLE(x) (void)(x) +#endif // UNUSED_VARIABLE + /******************************************************************************* *************************** LOCAL VARIABLES ******************************* ******************************************************************************/ -static const uint8_t days_in_month[12] = { +static const uint8_t days_in_month[2][12] = { /* Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec */ - 31u, 28u, 31u, 30u, 31u, 30u, 31u, 31u, 30u, 31u, 30u, 31u + { 31u, 28u, 31u, 30u, 31u, 30u, 31u, 31u, 30u, 31u, 30u, 31u }, + { 31u, 29u, 31u, 30u, 31u, 30u, 31u, 31u, 30u, 31u, 30u, 31u } }; static calendar_callback_t msec_callback = NULL; @@ -83,9 +95,9 @@ static calendar_callback_t alarm_callback = NULL; ******************************************************************************/ static bool is_valid_time(uint32_t time, time_conversion_enum format, int32_t time_zone); static bool is_valid_date(sl_calendar_datetime_config_t *date); -static bool is_leap_year(uint16_t year); +static bool is_leap_year(uint8_t year, uint8_t century); static bool is_valid_alarm(sl_calendar_datetime_config_t *alarm); - +static uint16_t number_of_leap_days(uint32_t base_year, uint32_t current_year); /******************************************************************************* *********************** Global function Prototypes ************************* ******************************************************************************/ @@ -102,38 +114,16 @@ void SLI_MSEC_SEC_IRQHandler(void); /******************************************************************************* * Calendar Clock Configuration and Initialization - * It should be called before starting the RTC as it sets the clock for RTC - * RC, RO and XTAL clock is supported, by default, RC clock is enabled. + * This API is no longer supported due to the restriction on peripheral drivers to configure clocks ******************************************************************************/ sl_status_t sl_si91x_calendar_set_configuration(sl_calendar_clock_t clock_type) { - sl_status_t status; - /* CALENDAR_UC is defined by default. when this macro (CALENDAR_UC) is defined, peripheral - * configuration is directly taken from the configuration set in the universal configuration (UC). - * if the application requires the configuration to be changed in run-time, undefined this macro - * and change the peripheral configuration through the sl_si91x_calendar_set_configuration API. - */ -#if (CALENDAR_UC == 1) - clock_type = configuration.calendar_clock_type; -#endif - do { - // To validate the input parameters, if the parameters are not in range, it - // returns an error code - if ((clock_type != KHZ_RO_CLK_SEL) && (clock_type != KHZ_RC_CLK_SEL) && (clock_type != KHZ_XTAL_CLK_SEL)) { - status = SL_STATUS_INVALID_PARAMETER; - break; - } - RSI_PS_FsmLfClkSel(clock_type); - // To validate the register with the appropriate values, if the values are - // incorrect, it returns an error code - if (MCU_AON->MCUAON_KHZ_CLK_SEL_POR_RESET_STATUS_b.AON_KHZ_CLK_SEL != clock_type) { - status = SL_STATUS_FAIL; - break; - } - // If everything is as required, and clock is successfully configured and rtc is started then, - // it returns SL_STATUS_OK - status = SL_STATUS_OK; - } while (false); + sl_status_t status = SL_STATUS_OK; // return ok to support backward compatibility + + // FSM LF Clock has already been configured in sl_system_init, + // This API is no longer supported due to the restriction on peripheral drivers to configure clocks + UNUSED_VARIABLE(clock_type); + return status; } @@ -217,6 +207,8 @@ sl_status_t sl_si91x_calendar_get_date_time(sl_calendar_datetime_config_t *confi sl_status_t sl_si91x_calendar_rcclk_calibration(clock_calibration_config_t *clock_calibration_config) { sl_status_t status; + +#if (FUNCTIONALITY_SUPPORTED) do { // To validate the structure pointer, if the parameters is NULL, it // returns an error code @@ -245,6 +237,13 @@ sl_status_t sl_si91x_calendar_rcclk_calibration(clock_calibration_config_t *cloc // it returns SL_STATUS_OK status = SL_STATUS_OK; } while (false); +#else + // FSM LF Clock has already been configured in sl_system_init, + // This API is no longer supported due to the restriction on peripheral drivers to configure/calibrate clocks + UNUSED_VARIABLE(clock_calibration_config); + status = SL_STATUS_OK; // return ok to support backward compatibility +#endif + return status; } @@ -260,6 +259,8 @@ sl_status_t sl_si91x_calendar_rcclk_calibration(clock_calibration_config_t *cloc sl_status_t sl_si91x_calendar_roclk_calibration(clock_calibration_config_t *clock_calibration_config) { sl_status_t status; + +#if (FUNCTIONALITY_SUPPORTED) do { // To validate the structure pointer, if the parameters is NULL, it // returns an error code @@ -294,6 +295,13 @@ sl_status_t sl_si91x_calendar_roclk_calibration(clock_calibration_config_t *cloc // it returns SL_STATUS_OK status = SL_STATUS_OK; } while (false); +#else + // FSM LF Clock has already been configured in sl_system_init, + // This API is no longer supported due to the restriction on peripheral drivers to configure/calibrate clocks + UNUSED_VARIABLE(clock_calibration_config); + status = SL_STATUS_OK; // return ok to support backward compatibility +#endif + return status; } @@ -760,6 +768,176 @@ sl_status_t sl_si91x_calendar_convert_ntp_time_to_unix_time(uint32_t ntp_time, u return status; } +/***************************************************************************/ /** + * Convert Unix timestamp to Calendar RTC timestamp. + * Timezone is not part of Calendar, assumes and converts in GMT format + * + * @param[in] unix_time (uint32_t) Unix timestamp + * @param[in] cal_date_time (sl_calendar_datetime_config_t *) Pointer to the Date Configuration Structure + * @return status 0 if successful, else error code as follows: + * - SL_STATUS_OK (0x0000) - Success + * - SL_STATUS_INVALID_PARAMETER (0x0021) - Parameters are invalid + ******************************************************************************/ +sl_status_t sl_si91x_calendar_convert_unix_time_to_calendar_datetime(uint32_t unix_time, + sl_calendar_datetime_config_t *cal_date_time) +{ + sl_status_t status = SL_STATUS_OK; + uint16_t full_year = 0; + uint32_t base_year = TIME_UNIX_EPOCH; + uint32_t current_year = 0; + uint16_t leap_day = 0; + uint8_t leap_year_flag = 0; + uint8_t current_month = 0; + uint32_t years_since_1900 = 0; + + do { + if (!is_valid_time(unix_time, TIME_FORMAT_UNIX, TIME_ZONE_DEFAULT)) { + status = SL_STATUS_INVALID_PARAMETER; + break; + } + + cal_date_time->MilliSeconds = 0; + cal_date_time->Second = unix_time % (MAXIMUM_SECOND + 1); + unix_time /= (MAXIMUM_SECOND + 1); + cal_date_time->Minute = unix_time % (MAXIMUM_MINUTE + 1); + unix_time /= (MAXIMUM_MINUTE + 1); + cal_date_time->Hour = unix_time % (MAXIMUM_HOUR + 1); + unix_time /= (MAXIMUM_HOUR + 1); // time is now the number of days since TIME_UNIX_EPOCH + + cal_date_time->DayOfWeek = + ((unix_time + Thursday) % MAXIMUM_DAYS_IN_A_WEEK); // January 1st was a Thursday(4) in 1970 + + full_year = unix_time / TIME_DAY_PER_YEAR; // Approximates the number of full years + current_year = full_year + base_year; + + // calculate number of leap days since TIME_UNIX_EPOCH + if (full_year > (TIME_FIRST_LEAP_YEAR_FROM_UNIX_EPOCH - TIME_UNIX_EPOCH)) { + leap_day = number_of_leap_days(base_year, current_year); // Approximates the number of leap days + full_year = (unix_time - leap_day) / TIME_DAY_PER_YEAR; // Computes the number of year integrating the leap days + current_year = full_year + base_year; + leap_day = + number_of_leap_days(base_year, current_year); // Computes the actual number of leap days of the previous years + } + + // no. of years since 1900 to calculate Century + years_since_1900 = current_year - TIME_NTP_EPOCH; + cal_date_time->Century = ((years_since_1900 / (MAXIMUM_YEAR + 1)) % (MAXIMUM_CENTURY + 1)) + 1; + + // Year in date struct must be based on a 1970 epoch + // 1st Century contains only 30 years (1970-1999) in Unix timestamp + cal_date_time->Year = current_year % (MAXIMUM_YEAR + 1); + + if (is_leap_year(cal_date_time->Year, cal_date_time->Century)) { + leap_year_flag = 1; + } + + unix_time = (unix_time - leap_day) - (TIME_DAY_PER_YEAR * full_year); // Subtracts days of previous year + + while (unix_time >= days_in_month[leap_year_flag][current_month]) { + unix_time -= days_in_month[leap_year_flag][current_month]; // Subtracts the number of days of the passed month + current_month++; + } + cal_date_time->Month = (RTC_MONTH_T)(current_month + 1); + cal_date_time->Day = unix_time + 1; + } while (false); + + return status; +} + +/***************************************************************************/ /** + * Convert Calendar RTC timestamp to Unix timestamp. + * Timezone is not part of Calendar, converts in GMT format + * + * @param[in] cal_date_time (sl_calendar_datetime_config_t *) Pointer to the Date Configuration Structure + * @param[in] unix_time (uint32_t *) Pointer to the Unix timestamp variable + * @return status 0 if successful, else error code as follows: + * - SL_STATUS_OK (0x0000) - Success + * - SL_STATUS_INVALID_PARAMETER (0x0021) - Parameters are invalid + * - SL_STATUS_INVALID_RANGE (0x0028) - Parameters are invalid + ******************************************************************************/ +sl_status_t sl_si91x_calendar_convert_calendar_datetime_to_unix_time(sl_calendar_datetime_config_t *cal_date_time, + uint32_t *unix_time) +{ + sl_status_t status = SL_STATUS_OK; + uint16_t month_days = 0; + uint16_t full_year = 0; + uint8_t leap_year_flag = 0; + uint16_t leap_days = 0; + uint32_t base_year = TIME_UNIX_EPOCH; // base year 1970 (for 32 bits) + uint32_t current_year = 0; + + do { + if (!is_valid_date(cal_date_time)) { + status = SL_STATUS_INVALID_PARAMETER; + break; + } + + // current calendar year + current_year = TIME_NTP_EPOCH + ((cal_date_time->Century - 1) * (MAXIMUM_YEAR + 1)) + cal_date_time->Year; + if (current_year < TIME_UNIX_EPOCH) { + status = SL_STATUS_INVALID_RANGE; // Unix timestamp range starts from 01/Jan/1970 + break; + } + + // years since base year TIME_UNIX_EPOCH + full_year = current_year - base_year; + + // convert number of years into seconds for Unix calculation + *unix_time = (full_year * (uint64_t)TIME_SEC_PER_YEAR); + + // calculate number of leap days since TIME_UNIX_EPOCH + if (full_year > (TIME_FIRST_LEAP_YEAR_FROM_UNIX_EPOCH - TIME_UNIX_EPOCH)) { + leap_days = number_of_leap_days(base_year, current_year); + month_days = leap_days; + } + + if (is_leap_year(cal_date_time->Year, cal_date_time->Century)) { + leap_year_flag = 1; + } + + for (int i = 0; i < (cal_date_time->Month - 1); i++) { + month_days += days_in_month[leap_year_flag][i]; // Add the number of days of the month of the year + } + + month_days += (cal_date_time->Day - 1); // Add full days of the current month + // convert number of days into seconds to add up to Unix calculation + *unix_time += month_days * TIME_SEC_PER_DAY; + // convert time into seconds to add up to Unix calculation + *unix_time += (MAXIMUM_SECONDS_IN_AN_HOUR * cal_date_time->Hour) + ((MAXIMUM_SECOND + 1) * cal_date_time->Minute) + + cal_date_time->Second; + } while (false); + + return status; +} + +/******************************************************************************* + * Checks if the time stamp, format and time zone are + * within the supported range. + * + * @param base_year Year to start from to compute leap days. + * @param current_year Year end at for computing leap days. + * + * @return leap_days Days number of leap days between base_year and current_year. + ******************************************************************************/ +static uint16_t number_of_leap_days(uint32_t base_year, uint32_t current_year) +{ + // Regular leap years + uint16_t lo_reg = (base_year - 0) / 4; + uint16_t hi_reg = (current_year - 1) / 4; + uint16_t leap_days = hi_reg - lo_reg; + + // Account for non leap years + uint16_t lo_century = (base_year - 0) / 100; + uint16_t hi_century = (current_year - 1) / 100; + leap_days -= hi_century - lo_century; + + // Account for quad century leap years + uint16_t lo_quad = (base_year - 0) / 400; + uint16_t hi_quad = (current_year - 1) / 400; + leap_days += hi_quad - lo_quad; + + return (leap_days); +} /******************************************************************************* * Alarm IRQ Handler * @@ -836,6 +1014,7 @@ static bool is_valid_date(sl_calendar_datetime_config_t *date) { bool valid_date = true; uint8_t maximum_days = 0; + uint16_t current_year; do { if (date == NULL) { @@ -843,12 +1022,12 @@ static bool is_valid_date(sl_calendar_datetime_config_t *date) break; } // Updates the days in month for the month entered by user - // If the month is february and the leap year is there, then the days are 29 + // If the month is February and the leap year is there, then the days are 29 // else it is as stored in the (days_in_month) array - if (is_leap_year(date->Year) && date->Month == February) { - maximum_days = days_in_month[(date->Month) - 1] + 1; + if (is_leap_year(date->Year, date->Century) && date->Month == February) { + maximum_days = days_in_month[1][(date->Month) - 1] + 1; } else { - maximum_days = days_in_month[(date->Month) - 1]; + maximum_days = days_in_month[0][(date->Month) - 1]; } // If the year, month, day, hour, minute, second, millisecond is greater than the maximum // then it returns false, else true @@ -859,10 +1038,14 @@ static bool is_valid_date(sl_calendar_datetime_config_t *date) valid_date = false; break; } + + // calculate current calendar year from inputs year, century + current_year = TIME_NTP_EPOCH + ((date->Century - 1) * (MAXIMUM_YEAR + 1)) + date->Year; + // If the year, month, day, hour, minute, second is greater than the unix date supports, // then it returns false, else true // Unix date is valid until the 19th of January 2038 at 03:14:07 - if (date->Year == TIME_UNIX_YEAR_MAX) { + if (current_year == TIME_UNIX_YEAR_MAX) { if (((uint8_t)date->Month > (uint8_t)January) || (date->Day > MAXIMUM_EPOCH_DAY) || (date->Hour > MAXIMUM_EPOCH_HOUR) || (date->Minute > MAXIMUM_EPOCH_MINUTE) || (date->Second > MAXIMUM_EPOCH_SECOND)) { @@ -877,18 +1060,22 @@ static bool is_valid_date(sl_calendar_datetime_config_t *date) /******************************************************************************* * Internal function to validate the leap year * - * @param year the year which needs to be validated - * @return leap_year (0 or 1)the entered date is valid or not + * @param year the year which needs to be validated (Format 0...99) + * @param century the century which needs to be validated (Format 0...3) + * @return leap_year (true/false) the entered year is leap or not ******************************************************************************/ -static bool is_leap_year(uint16_t year) +static bool is_leap_year(uint8_t year, uint8_t century) { // 1900 is not a leap year but 0 % anything is 0. - bool leap_year = false; - if (year == 0) { - leap_year = false; - } else { - leap_year = (((year % 4u) == 0u) && (((year % 100u) != 0u) || ((year % 400u) == 0u))) ? true : false; - } + bool leap_year; + uint16_t current_year; + + // calculate current calendar year from inputs year, century + current_year = TIME_NTP_EPOCH + ((century - 1) * (MAXIMUM_YEAR + 1)) + year; + + leap_year = (((current_year % 4u) == 0u) && (((current_year % 100u) != 0u) || ((current_year % 400u) == 0u))) ? true + : false; + return (leap_year); } diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_dma.c b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_dma.c index 2960f50e8..bdc3ba583 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_dma.c +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_dma.c @@ -248,9 +248,12 @@ __STATIC_INLINE void process_dma_irq(uint32_t dma_number, uint32_t channel, uint sl_status_t sl_si91x_dma_init(sl_dma_init_t *dma_init) { - sl_status_t status = SL_STATUS_OK; + sl_status_t status = SL_STATUS_OK; + RSI_UDMA_DATACONTEXT_T *udma_driver_handle = (RSI_UDMA_HANDLE_T)udmaHandle[dma_init->dma_number]; if (dma_init->dma_number <= ULP_DMA_INSTANCE) { - if (udmaHandle[dma_init->dma_number] == NULL) { + // If the handle is NULL, it is the first time initialization, if the handle is already present, it means it is sleep-wakeup scenario which needs dma initialization. + if ((udmaHandle[dma_init->dma_number] == NULL) + || (udma_driver_handle->base == UDMA0 || udma_driver_handle->base == UDMA1)) { // Initialize dma peripheral udmaHandle[dma_init->dma_number] = UDMAx_Initialize(UDMA_driver_resources[dma_init->dma_number], udma_driver_table[dma_init->dma_number], @@ -264,6 +267,8 @@ sl_status_t sl_si91x_dma_init(sl_dma_init_t *dma_init) //DMA init pass status = SL_STATUS_OK; } + } else { + status = SL_STATUS_NOT_INITIALIZED; } } else { status = SL_STATUS_INVALID_PARAMETER; @@ -314,6 +319,10 @@ sl_status_t sl_si91x_dma_deinit(uint32_t dma_number) } // Uninitialize DMA status = (sl_status_t)UDMAx_Uninitialize(UDMA_driver_resources[dma_number]); + if (status == SL_STATUS_OK) { + // Clearing the udmaHandle for udma0 or udma1 as per the dma number. + udmaHandle[dma_number] = NULL; + } } } while (false); return status; diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_i2c.c b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_i2c.c index 2731b75d6..160b5fb20 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_i2c.c +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_i2c.c @@ -37,6 +37,7 @@ #include "sl_si91x_peripheral_i2c.h" #include "rsi_power_save.h" #include "sl_si91x_clock_manager.h" + /******************************************************************************* *************************** DEFINES / MACROS ******************************** ******************************************************************************/ @@ -121,12 +122,11 @@ static void i2c_clock_deinit(I2C_TypeDef *i2c); static void i2c_dma_transfer_complete_callback(uint32_t channel, void *data); static void i2c_dma_error_callback(uint32_t channel, void *data); static void *i2c_addr(sl_i2c_instance_t i2c_instance); -static void i2c_handler(I2C_TypeDef *i2c); static void wait_for_i2c_follower_ready(I2C_TypeDef *i2c); static void wait_till_i2c_gets_idle(I2C_TypeDef *i2c); static void i2c_dma_rx_config(I2C_TypeDef *i2c); static void i2c_dma_tx_config(I2C_TypeDef *i2c); - +static void i2c_handler(I2C_TypeDef *i2c); /******************************************************************************* ***********************  Global function Definitions ************************* ******************************************************************************/ @@ -331,21 +331,55 @@ sl_i2c_status_t sl_i2c_driver_send_data_blocking(sl_i2c_instance_t i2c_instance, i2c_instance_state[i2c_instance].write_buffer_length = tx_len; // Enables the I2C peripheral. sl_si91x_i2c_enable(i2c); - // Clearing all interrupts - uint32_t clear = i2c->IC_CLR_INTR; - // Configures the transmit empty interrupt. - sl_si91x_i2c_set_interrupts(i2c, SL_I2C_EVENT_TRANSMIT_EMPTY); - // Enabling read request interrupt for follower mode - if (i2c_instance_state[i2c_instance].mode == SL_I2C_FOLLOWER_MODE) { - sl_si91x_i2c_set_interrupts(i2c, SL_I2C_EVENT_READ_REQ); + uint32_t transfer_length = i2c_instance_state[i2c_instance].write_buffer_length; + // Blocking here until all the bytes are sent + while (i2c_instance_state[i2c_instance].write_buffer_current_index < transfer_length) { + // For follower mode + if (i2c_instance_state[i2c_instance].mode == SL_I2C_FOLLOWER_MODE) { + // Checking for abort transfer, if occurred clearing it + while (i2c->IC_RAW_INTR_STAT_b.TX_ABRT) { + int clear = i2c->IC_CLR_TX_ABRT; + (void)clear; + } + // Checking for read request if occurred sending the data byte & clearing it + while (i2c->IC_RAW_INTR_STAT_b.RD_REQ) { + if (i2c->IC_RAW_INTR_STAT_b.RD_REQ) { + i2c->IC_DATA_CMD = i2c_instance_state[i2c_instance] + .write_buffer[(i2c_instance_state[i2c_instance].write_buffer_current_index++)]; + // clearing read request bit + int clear = i2c->IC_CLR_RD_REQ; + (void)clear; + } + } + // For leader mode + } else { + // Sending last byte by adding stop bit, if repeated start is enabled + if (i2c_instance_state[i2c_instance].write_buffer_current_index == (transfer_length - 1)) { + if (!(i2c_instance_state[i2c_instance].repeated_start_enable)) { + i2c->IC_DATA_CMD = (BIT_SET << STOP_BIT) + | i2c_instance_state[i2c_instance] + .write_buffer[(i2c_instance_state[i2c_instance].write_buffer_current_index++)]; + } else { + // Sending last data byte without stop bit, if repeated start is not enabled + i2c->IC_DATA_CMD = i2c_instance_state[i2c_instance] + .write_buffer[(i2c_instance_state[i2c_instance].write_buffer_current_index++)]; + } + } else { + // Sending data byte except last byte + i2c->IC_DATA_CMD = i2c_instance_state[i2c_instance] + .write_buffer[(i2c_instance_state[i2c_instance].write_buffer_current_index++)]; + } + // Waiting until transmit fifo is empty + while (!(i2c->IC_STATUS_b.TFE)) + ; + // Breaking the loop, if abort occurred due to NACK from Slave + if (i2c->IC_RAW_INTR_STAT_b.TX_ABRT) { + (void)i2c->IC_CLR_TX_ABRT; + i2c_status = SL_I2C_NACK; + break; + } + } } - // Enables the interrupt. - sl_si91x_i2c_enable_interrupts(i2c, ZERO_FLAG); - // blocking here until all the bytes are sent - while (i2c_instance_state[i2c_instance].write_buffer_current_index - < i2c_instance_state[i2c_instance].write_buffer_length) - ; - (void)clear; } while (false); return i2c_status; } @@ -392,20 +426,66 @@ sl_i2c_status_t sl_i2c_driver_receive_data_blocking(sl_i2c_instance_t i2c_instan } // Enables the I2C peripheral. sl_si91x_i2c_enable(i2c); - // Sets the control direction to read. Also sets stop bit, if data length is one byte. + uint32_t transfer_length = i2c_instance_state[i2c_instance].read_buffer_length; + // Setting read control direction and stop bit together for one byte data length if ((rx_len == ONE) && (i2c_instance_state[i2c_instance].mode == SL_I2C_LEADER_MODE)) { sl_si91x_i2c_set_read_direction_and_stop_bit(i2c); } else { + // Setting only read control direction sl_si91x_i2c_control_direction(i2c, SL_I2C_READ_MASK); } - // Enabling the receive full and read request interrupt. - sl_si91x_i2c_set_interrupts(i2c, SL_I2C_EVENT_RECEIVE_FULL); - // Enables the interrupt. - sl_si91x_i2c_enable_interrupts(i2c, ZERO_FLAG); - // blocking here until all the bytes are received - while (i2c_instance_state[i2c_instance].read_buffer_current_index - < i2c_instance_state[i2c_instance].read_buffer_length) - ; + uint32_t temp_data_cmd = 0; + // Blocking here until receiving all bytes + while (i2c_instance_state[i2c_instance].read_buffer_current_index < transfer_length) { + // For follower mode + if (i2c_instance_state[i2c_instance].mode == SL_I2C_FOLLOWER_MODE) { + // Reading bytes as long as RFNE is set + while (!i2c->IC_STATUS_b.RFNE) + ; + // Receiving byte in follower mode + i2c_instance_state[i2c_instance].read_buffer[(i2c_instance_state[i2c_instance].read_buffer_current_index++)] = + i2c->IC_DATA_CMD_b.DAT; + // For leader mode + } else { + // Wait until receive FIFO is not empty + while (!i2c->IC_STATUS_b.RFNE) { + // Breaking the loop, if abort occurred due to NACK from Slave + if (i2c->IC_RAW_INTR_STAT_b.TX_ABRT) { + int clear = i2c->IC_CLR_TX_ABRT; + (void)clear; + i2c_status = SL_I2C_NACK; + break; + } + } + // Checking I2C status + if (i2c_status) { + break; + } + // Receiving byte in leader mode + i2c_instance_state[i2c_instance].read_buffer[(i2c_instance_state[i2c_instance].read_buffer_current_index++)] = + i2c->IC_DATA_CMD_b.DAT; + // Updating 'temp_data_cmd' variable to set read bit + temp_data_cmd = (BIT_SET << MASK_READ_BIT); + // Setting read bit till last byte + if (i2c_instance_state[i2c_instance].read_buffer_current_index < (transfer_length - 1)) { + i2c->IC_DATA_CMD = temp_data_cmd; + } + // Receiving last byte by adding stop bit, if repeated start is not enabled + if (i2c_instance_state[i2c_instance].read_buffer_current_index == (transfer_length - 1)) { + if (!(i2c_instance_state[i2c_instance].repeated_start_enable)) { + temp_data_cmd |= (BIT_SET << SL_STOP_BIT); + } + i2c->IC_DATA_CMD = temp_data_cmd; + } + // Breaking the loop, if abort occurred due to NACK from Slave + if (i2c->IC_RAW_INTR_STAT_b.TX_ABRT) { + int clear = i2c->IC_CLR_TX_ABRT; + (void)clear; + i2c_status = SL_I2C_NACK; + break; + } + } + } } while (false); return i2c_status; } @@ -464,6 +544,12 @@ sl_i2c_status_t sl_i2c_driver_send_data_non_blocking(sl_i2c_instance_t i2c_insta i2c_dma_tx_config(i2c); // Enables the I2C peripheral. sl_si91x_i2c_enable(i2c); + if (i2c_instance_state[i2c_instance].mode == SL_I2C_LEADER_MODE) { + // Unmasking I2C abort interrupt + sl_si91x_i2c_set_interrupts(i2c, SL_I2C_EVENT_TRANSMIT_ABORT); + // Enabling I2C interrupt for checking NACK from slave + sl_si91x_i2c_enable_interrupts(i2c, ZERO_FLAG); + } sl_dma_xfer_t dma_transfer_tx = { ZERO }; channel = p_dma_config->dma_tx_channel + ONE; channel_priority = ONE; @@ -554,6 +640,12 @@ sl_i2c_status_t sl_i2c_driver_receive_data_non_blocking(sl_i2c_instance_t i2c_in i2c_dma_rx_config(i2c); // Enables the I2C peripheral. sl_si91x_i2c_enable(i2c); + if (i2c_instance_state[i2c_instance].mode == SL_I2C_LEADER_MODE) { + // Unmasking I2C abort interrupt + sl_si91x_i2c_set_interrupts(i2c, SL_I2C_EVENT_TRANSMIT_ABORT); + // Enabling I2C interrupt for checking NACK from slave + sl_si91x_i2c_enable_interrupts(i2c, ZERO_FLAG); + } sl_dma_xfer_t dma_transfer_rx = { ZERO }; channel = p_dma_config->dma_rx_channel + ONE; channel_priority = ONE; @@ -594,7 +686,6 @@ sl_i2c_status_t sl_i2c_driver_receive_data_non_blocking(sl_i2c_instance_t i2c_in sl_si91x_dma_channel_enable(dma_number, p_dma_config->dma_rx_channel + ONE); sl_si91x_dma_enable(dma_number); if (leader_mode) { - // Enabling transmit FIFO DMA channel and setting transmit data Level i2c_dma_tx_config(i2c); sl_dma_xfer_t dma_transfer_tx = { ZERO }; channel = p_dma_config->dma_tx_channel + ONE; @@ -965,119 +1056,6 @@ static void wait_for_i2c_follower_ready(I2C_TypeDef *i2c) while (!i2c->IC_STATUS_b.SLV_HOLD_TX_FIFO_EMPTY) ; } - -/******************************************************************************* - * I2C handler function. - ******************************************************************************/ -static void i2c_handler(I2C_TypeDef *i2c) -{ - uint32_t status = 0; - uint32_t clear = 0; - sl_i2c_instance_t i2c_instance; - if (i2c == I2C0) { - i2c_instance = SL_I2C0; - } - if (i2c == I2C1) { - i2c_instance = SL_I2C1; - } - if (i2c == I2C2) { - i2c_instance = SL_I2C2; - } - // Checking interrupt status - status = i2c->IC_INTR_STAT; - if (status & (SL_I2C_EVENT_READ_REQ)) { - if (i2c_instance_state[i2c_instance].mode == SL_I2C_FOLLOWER_MODE) { - // waiting until the Tx FIFO has data to Transmit for the read request - while (!i2c->IC_STATUS_b.SLV_HOLD_TX_FIFO_EMPTY) - ; - // Clearing interrupt by reading the respective bit - clear = i2c->IC_CLR_RD_REQ_b.CLR_RD_REQ; - return; - } - } - if (status & SL_I2C_EVENT_RECEIVE_FULL) { - // For leader receive - if (i2c_instance_state[i2c_instance].mode == SL_I2C_LEADER_MODE) { - uint32_t temp_data_cmd; - if (i2c_instance_state[i2c_instance].read_buffer_current_index - < i2c_instance_state[i2c_instance].read_buffer_length) { - i2c_instance_state[i2c_instance].read_buffer[(i2c_instance_state[i2c_instance].read_buffer_current_index++)] = - i2c->IC_DATA_CMD_b.DAT; - if (i2c_instance_state[i2c_instance].read_buffer_current_index - == i2c_instance_state[i2c_instance].read_buffer_length) { - // After last data byte reception clearing and disabling interrupts - sl_si91x_i2c_clear_interrupts(i2c, SL_I2C_EVENT_RECEIVE_FULL); - } else { - temp_data_cmd = (BIT_SET << MASK_READ_BIT); - // Checking for last data byte and repeated start enable - if (!(i2c_instance_state[i2c_instance].repeated_start_enable)) { - if (i2c_instance_state[i2c_instance].read_buffer_current_index - == (i2c_instance_state[i2c_instance].read_buffer_length) - 1) { - // If the last byte is there to receive, and in leader mode, it needs - // tosend the stop byte. - temp_data_cmd |= (BIT_SET << STOP_BIT); - } - } - i2c->IC_DATA_CMD = temp_data_cmd; - } - } - } else { - // For follower receive - if (i2c_instance_state[i2c_instance].read_buffer_current_index - < i2c_instance_state[i2c_instance].read_buffer_length) { - i2c_instance_state[i2c_instance].read_buffer[(i2c_instance_state[i2c_instance].read_buffer_current_index++)] = - i2c->IC_DATA_CMD_b.DAT; - if (i2c_instance_state[i2c_instance].read_buffer_current_index - == i2c_instance_state[i2c_instance].read_buffer_length) { - // After last data byte reception clearing and disabling interrupts - sl_si91x_i2c_clear_interrupts(i2c, SL_I2C_EVENT_RECEIVE_FULL); - } - } - } - return; - } - // For leader transmit - if (status & SL_I2C_EVENT_TRANSMIT_EMPTY) { - if (i2c_instance_state[i2c_instance].mode == SL_I2C_LEADER_MODE) { - if (i2c_instance_state[i2c_instance].write_buffer_current_index - < i2c_instance_state[i2c_instance].write_buffer_length) { - // Checking for last data byte and repeated start enable - if ((i2c_instance_state[i2c_instance].write_buffer_current_index - == (i2c_instance_state[i2c_instance].write_buffer_length) - 1) - && (!(i2c_instance_state[i2c_instance].repeated_start_enable))) { - i2c->IC_DATA_CMD = (BIT_SET << STOP_BIT) - | i2c_instance_state[i2c_instance] - .write_buffer[(i2c_instance_state[i2c_instance].write_buffer_current_index++)]; - } else { - sl_si91x_i2c_tx(i2c, - i2c_instance_state[i2c_instance] - .write_buffer[(i2c_instance_state[i2c_instance].write_buffer_current_index++)]); - } - if (i2c_instance_state[i2c_instance].write_buffer_current_index - == i2c_instance_state[i2c_instance].write_buffer_length) { - // After last data byte reception clearing interrupts - sl_si91x_i2c_clear_interrupts(i2c, SL_I2C_EVENT_TRANSMIT_EMPTY); - } - } - } else { - // For follower transmit - if (i2c_instance_state[i2c_instance].write_buffer_current_index - < i2c_instance_state[i2c_instance].write_buffer_length) { - sl_si91x_i2c_tx(i2c, - i2c_instance_state[i2c_instance] - .write_buffer[(i2c_instance_state[i2c_instance].write_buffer_current_index++)]); - if (i2c_instance_state[i2c_instance].write_buffer_current_index - == i2c_instance_state[i2c_instance].write_buffer_length) { - // After last data byte reception clearing interrupts - sl_si91x_i2c_clear_interrupts(i2c, SL_I2C_EVENT_TRANSMIT_EMPTY); - } - } - } - return; - } - // to avoid unused variable warning - (void)clear; -} /******************************************************************************* * IRQ handler for I2C 0. ******************************************************************************/ @@ -1101,7 +1079,38 @@ void I2C2_IRQHandler(void) { i2c_handler(I2C2); } +/******************************************************************************* + * I2C handler function. + ******************************************************************************/ +static void i2c_handler(I2C_TypeDef *i2c) +{ + uint32_t status = 0; + uint32_t driver_status = 0; + sl_i2c_instance_t i2c_instance = 0; + if (i2c == I2C0) { + i2c_instance = SL_I2C0; + } else if (i2c == I2C1) { + i2c_instance = SL_I2C1; + } else if (i2c == I2C2) { + i2c_instance = SL_I2C2; + } + // Checking interrupt status + status = i2c->IC_INTR_STAT; + // Checking for abort interrupt + if (status & SL_I2C_EVENT_TRANSMIT_ABORT) { + // Checking if abort hits due to Nack from slave + if (i2c->IC_TX_ABRT_SOURCE & (0x7)) { + driver_status = SL_I2C_NACK; + i2c_callback_function_ptr[i2c_instance](i2c_instance, driver_status); + } + // clearing interrupt + int clear = i2c->IC_CLR_TX_ABRT; + (void)clear; + sl_si91x_i2c_disable_interrupts(i2c, SL_I2C_EVENT_TRANSMIT_ABORT); + return; + } +} /******************************************************************************* I2C DMA transfer callback function ******************************************************************************/ @@ -1186,6 +1195,6 @@ static void i2c_dma_error_callback(uint32_t channel, void *data) } else if (channel == 3) { i2c_callback_function_ptr[ONE](SL_I2C1, driver_status); } else if (channel == 5) { - i2c_callback_function_ptr[TWO](SL_I2C2, driver_status); + sl_si91x_i2c_disable_interrupts(I2C2, SL_I2C_EVENT_TRANSMIT_ABORT); } } diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_psram.c b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_psram.c index 7f4ab3c93..7663a541f 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_psram.c +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_psram.c @@ -979,15 +979,6 @@ sl_psram_return_type_t sl_si91x_psram_init() if ((psram_id.MFID == PSRAM_Device.deviceID.MFID) && (psram_id.KGD == PSRAM_Device.deviceID.KGD)) { - /* Configuring clock for PSRAM operation based on selected configs */ - QSPI_CLK_SRC_SEL_T clk_src = PSRAM_CLK_SOURCE_SEL; - - clkStatus = RSI_CLK_Qspi2ClkConfig(M4CLK, clk_src, 0, 0, PSRAM_FREQ_CLK_DIV_FACTOR); - - if (RSI_OK != clkStatus) { - return PSRAM_CLOCK_INIT_FAILURE; - } - if (PSRAM_INTERFACE_MODE == QUAD_MODE) { /*Set the PSRAM device to QPI mode*/ psram_enter_qpi_mode(); diff --git a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_watchdog_timer.c b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_watchdog_timer.c index 6711c8532..acc76d5ff 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_watchdog_timer.c +++ b/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_watchdog_timer.c @@ -81,55 +81,16 @@ void sl_si91x_watchdog_init_timer(void) } /******************************************************************************* -* @brief: Configures watchdog-timer clock sources -* -* @details: -* Configures the watchdog-timer low frequency and high frequency clock sources -* Also configures bg_pmu clock source +* @brief: This API is no longer supported due to the restriction on peripheral drivers to configuring clock *******************************************************************************/ sl_status_t sl_si91x_watchdog_configure_clock(watchdog_timer_clock_config_t *timer_clk_config_ptr) { - sl_status_t status = SL_STATUS_OK; - /* WDT_TIMER_UC is defined by default. when this macro (WDT_TIMER_UC) is defined, peripheral - * configuration is directly taken from the configuration set in the universal configuration (UC). - * if the application requires the configuration to be changed in run-time, undefined this macro - * and change the peripheral configuration through the sl_si91x_watchdog_configure_clock API. - */ -#if (WDT_TIMER_UC == 1) - timer_clk_config_ptr = &sl_watchdog_timer_clk_config_handle; -#endif - do { - // To validate the structure pointer, if the parameters is NULL, it - // will return an error code - if (timer_clk_config_ptr == NULL) { - status = SL_STATUS_NULL_POINTER; - break; - } - // Validating bg-pmu clock source value - if ((timer_clk_config_ptr->bg_pmu_clock_source != RO_32KHZ_CLOCK) - && (timer_clk_config_ptr->bg_pmu_clock_source != MCU_FSM__CLOCK)) { - status = SL_STATUS_INVALID_PARAMETER; - break; - } - // Validating low frequency FSM clock source value - if ((timer_clk_config_ptr->low_freq_fsm_clock_src != KHZ_RO_CLK_SEL) - && (timer_clk_config_ptr->low_freq_fsm_clock_src != KHZ_RC_CLK_SEL) - && (timer_clk_config_ptr->low_freq_fsm_clock_src != KHZ_XTAL_CLK_SEL)) { - status = SL_STATUS_INVALID_PARAMETER; - break; - } - // Validating high frequency FSM clock source value - if ((timer_clk_config_ptr->high_freq_fsm_clock_src != FSM_20MHZ_RO) - && (timer_clk_config_ptr->high_freq_fsm_clock_src != FSM_32MHZ_RC) - && (timer_clk_config_ptr->high_freq_fsm_clock_src != FSM_40MHZ_XTAL)) { - status = SL_STATUS_INVALID_PARAMETER; - break; - } - // FSM clock enable for WDT to be functional - // Enable clock sources - RSI_IPMU_ClockMuxSel(RO_32KHZ_CLOCK); - RSI_PS_FsmLfClkSel(timer_clk_config_ptr->low_freq_fsm_clock_src); - } while (false); + sl_status_t status = SL_STATUS_OK; // return ok to support backward compatibility + + // FSM LF Clock has already been configured in sl_system_init, + // This API is no longer supported due to the restriction on peripheral drivers to configure clocks + UNUSED_VARIABLE(timer_clk_config_ptr); + return status; } diff --git a/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/component/sl_sdio_secondary_peripheral.slcc b/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/component/sl_sdio_secondary_peripheral.slcc index 7813640be..9df934c70 100644 --- a/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/component/sl_sdio_secondary_peripheral.slcc +++ b/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/component/sl_sdio_secondary_peripheral.slcc @@ -19,5 +19,3 @@ include: - path: inc file_list: - path: sl_si91x_peripheral_sdio_secondary.h -define: - - name: __SYSTICK diff --git a/components/device/silabs/si91x/mcu/hal/inc/sl_si91x_hal_soc_soft_reset.h b/components/device/silabs/si91x/mcu/hal/inc/sl_si91x_hal_soc_soft_reset.h index 75083e14c..7812e0e73 100644 --- a/components/device/silabs/si91x/mcu/hal/inc/sl_si91x_hal_soc_soft_reset.h +++ b/components/device/silabs/si91x/mcu/hal/inc/sl_si91x_hal_soc_soft_reset.h @@ -31,48 +31,42 @@ #ifndef __SL_SI91X_HAL_SOC_SOFT_RESET__ #define __SL_SI91X_HAL_SOC_SOFT_RESET__ -/** @cond DOXYGEN_IGNORE */ - -#define M4_BBFF_STORAGE1 *(volatile uint32 *)0x24048580 -#define M4_QSPI_AES_CONFIG *(volatile uint32 *)0x120000C8 -#define AES_QSPI_KEY_SIZE BIT(16) -#define KEY_LENGTH BIT(11) +#include "rsi_qspi.h" +/** @cond DOXYGEN_IGNORE */ +#define M4_QSPI_AES_CONFIG *(volatile uint32 *)0x120000C8 +#define AES_QSPI_KEY_SIZE BIT(16) +#define AES_QSPI_KEY_LENGTH BIT(11) /** @endcond */ -/** - * @brief - * This API initializes and starts the Watchdog Timer (WDT) to perform a software reset of the Si91X SoC. - * - * @details - * This API triggers a software reset of the Si91X SoC, resetting the system to its initial state. - * The system will reset to its initial state once the WDT expires. - * This function also ensures that necessary configurations are applied before the system reset occurs, including setting the power for the WDT and configuring the NVIC to handle WDT interrupts. - * - * @note - * Ensure that all necessary data is saved before calling this function, as it will reset the entire system. - * This function is intended for use in situations where a full system reset is required. - */ -void sl_si91x_soc_soft_reset(void); - /** * \addtogroup SOFT_RESET_FUNCTIONS Soft Reset * \ingroup COMMON_SECTION_FUNCTIONS * @{ */ /** -* @brief -* Performs a Nested Vectored Interrupt Controller (NVIC) soft reset to the Si91X SoC. -* -* @details -* The function initiates a system reset request to reset the SoC. -* It resets the M4 core and the Network Processor (NWP) of the Si91X SoC, bringing the system back to its initial state. -* -* @note -* Ensure that all necessary data is saved before calling this function, as it will reset the NVIC and potentially disrupt ongoing processes. -*/ + * @brief To trigger a software reset of the Si91X SoC. + * + * @details This API triggers a software reset of the Si91X SoC, resetting the system to its initial state. + * The system will reset to its initial state once the WDT expires. + * This function also ensures that necessary configurations are applied before the system reset occurs, + * including setting the power for the WDT and configuring the NVIC to handle WDT interrupts. + * + * @note Ensure that all necessary data is saved before calling this function because it will reset the entire system. + * This function is intended for use in situations where a full system reset is required. + */ +void sl_si91x_soc_soft_reset(void); + +/** + * @brief To perform a Nested Vectored Interrupt Controller (NVIC) soft reset on the Si91X SoC. + * + * @details This function initiates a system reset request to reset the SoC. + * It resets the M4 core and the Network Processor (NWP) of the Si91X SoC, bringing the system back to its initial state. + * + * @note Ensure that all necessary data is saved before calling this function because it will reset the NVIC and potentially disrupt ongoing processes. + */ void sl_si91x_soc_nvic_reset(void); /** @} */ -#endif \ No newline at end of file +#endif diff --git a/components/device/silabs/si91x/mcu/hal/src/sl_si91x_hal_soc_soft_reset.c b/components/device/silabs/si91x/mcu/hal/src/sl_si91x_hal_soc_soft_reset.c index df1630aa1..eb8068e3a 100644 --- a/components/device/silabs/si91x/mcu/hal/src/sl_si91x_hal_soc_soft_reset.c +++ b/components/device/silabs/si91x/mcu/hal/src/sl_si91x_hal_soc_soft_reset.c @@ -68,7 +68,7 @@ void sl_si91x_soc_soft_reset(void) /*Upon Reset key size is 16 by default in case of inline encryption */ /*Store key length bit (32 Bytes) in BBFF if device security is with 32 Bytes key*/ if (M4_QSPI_AES_CONFIG & AES_QSPI_KEY_SIZE) { - M4_BBFF_STORAGE1 |= KEY_LENGTH; + M4_BBFF_STORAGE1 |= AES_QSPI_KEY_LENGTH; } while (1) ; @@ -84,7 +84,7 @@ void sl_si91x_soc_nvic_reset(void) /*Upon Reset key size is 16 by default in case of inline encryption */ /*Store key length bit (32 Bytes) in BBFF if device security is with 32 Bytes key*/ if (M4_QSPI_AES_CONFIG & AES_QSPI_KEY_SIZE) { - M4_BBFF_STORAGE1 |= KEY_LENGTH; + M4_BBFF_STORAGE1 |= AES_QSPI_KEY_LENGTH; } __asm volatile("cpsid i" ::: "memory"); /*Data Synchronization Barrier */ diff --git a/components/device/silabs/si91x/mcu/toolchain/linkerfile_SoC.ld.jinja b/components/device/silabs/si91x/mcu/toolchain/linkerfile_SoC.ld.jinja index cd3091c9e..b431eec75 100644 --- a/components/device/silabs/si91x/mcu/toolchain/linkerfile_SoC.ld.jinja +++ b/components/device/silabs/si91x/mcu/toolchain/linkerfile_SoC.ld.jinja @@ -121,7 +121,7 @@ SECTIONS {% endif %} {% if power_manager_ps2 %} - *(EXCLUDE_FILE( *cmsis_gcc.o *cmsis_os2.o *port.o *queue.o *sl_rsi_utility.o *tasks.o *clock_update.o *rsi_deepsleep_soc.o *rsi_egpio.o *rsi_ipmu.o *ipmu_apis.o *rsi_pll.o *rsi_power_save.o *rsi_ps_ram_func.o *rsi_system_config.o *rsi_time_period.o *rsi_ulpss_clk.o *system_si91x.o *sl_slist.o *strcmp.o *sl_si91x_power_manager.o *sli_si91x_power_manager.o *sl_si91x_power_manager_handler.o *sl_si91x_power_manager_debug.o *sli_si91x_power_manager_wakeup_init.o *sl_si91x_power_manager_wakeup_handler.o *sl_sleeptimer.o *sl_sleeptimer_hal_si91x_sysrtc.o *rsi_sysrtc.o *sl_si91x_low_power_tickless_mode.o *sl_core_cortexm.o *UDMA.o {% for c in debug_ps2 %}*{{c}} {% endfor %}{% for c in calendar_ps2 %}*{{c}} {% endfor %}{% for c in ulp_timer_ps2 %}*{{c}} {% endfor %}{% for c in wdt_ps2 %}*{{c}} {% endfor %}{% for c in adc_ps2 %}*{{c}} {% endfor %}{% for c in bod_ps2 %}*{{c}} {% endfor %}{% for c in comparator_ps2 %}*{{c}} {% endfor %}{% for c in cts_ps2 %}*{{c}} {% endfor %}{% for c in dac_ps2 %}*{{c}} {% endfor %}{% for c in dma_ps2 %}*{{c}} {% endfor %}{% for c in gpio_ps2 %}*{{c}} {% endfor %}{% for c in i2c_ps2 %}*{{c}} {% endfor %}{% for c in i2s_ps2 %}*{{c}} {% endfor %}{% for c in ir_ps2 %}*{{c}} {% endfor %}{% for c in ssi_ps2 %}*{{c}} {% endfor %}{% for c in sysrtc_ps2 %}*{{c}} {% endfor %}{% for c in usart_ps2 %}*{{c}} {% endfor %}{% for c in user_files_ps2 %}*{{c}} {% endfor %}) .text*) + *(EXCLUDE_FILE( *cmsis_gcc.o *cmsis_os2.o *port.o *queue.o *sl_rsi_utility.o *tasks.o *rsi_hal_mcu_m4_rom.o *rsi_hal_mcu_m4_ram.o *clock_update.o *rsi_deepsleep_soc.o *rsi_egpio.o *rsi_ipmu.o *ipmu_apis.o *rsi_pll.o *rsi_power_save.o *rsi_ps_ram_func.o *rsi_system_config.o *rsi_time_period.o *rsi_ulpss_clk.o *system_si91x.o *sl_slist.o *strcmp.o *sl_si91x_power_manager.o *sli_si91x_power_manager.o *sl_si91x_power_manager_handler.o *sl_si91x_power_manager_debug.o *sli_si91x_power_manager_wakeup_init.o *sl_si91x_power_manager_wakeup_handler.o *sl_sleeptimer.o *sl_sleeptimer_hal_si91x_sysrtc.o *rsi_sysrtc.o *sl_si91x_low_power_tickless_mode.o *sl_core_cortexm.o *UDMA.o {% for c in debug_ps2 %}*{{c}} {% endfor %}{% for c in calendar_ps2 %}*{{c}} {% endfor %}{% for c in ulp_timer_ps2 %}*{{c}} {% endfor %}{% for c in wdt_ps2 %}*{{c}} {% endfor %}{% for c in adc_ps2 %}*{{c}} {% endfor %}{% for c in bod_ps2 %}*{{c}} {% endfor %}{% for c in comparator_ps2 %}*{{c}} {% endfor %}{% for c in cts_ps2 %}*{{c}} {% endfor %}{% for c in dac_ps2 %}*{{c}} {% endfor %}{% for c in dma_ps2 %}*{{c}} {% endfor %}{% for c in gpio_ps2 %}*{{c}} {% endfor %}{% for c in i2c_ps2 %}*{{c}} {% endfor %}{% for c in i2s_ps2 %}*{{c}} {% endfor %}{% for c in ir_ps2 %}*{{c}} {% endfor %}{% for c in ssi_ps2 %}*{{c}} {% endfor %}{% for c in sysrtc_ps2 %}*{{c}} {% endfor %}{% for c in usart_ps2 %}*{{c}} {% endfor %}{% for c in user_files_ps2 %}*{{c}} {% endfor %}) .text*) {%- endif %} @@ -240,6 +240,8 @@ SECTIONS *tasks.o(.text*) *clock_update.o(.text*) *rsi_deepsleep_soc.o(.text*) + *rsi_hal_mcu_m4_ram.o(.text*) + *rsi_hal_mcu_m4_rom.o(.text*) *rsi_egpio.o(.text*) *rsi_ipmu.o(.text*) *ipmu_apis.o(.text*) diff --git a/components/device/silabs/si91x/mcu/toolchain/linkerfile_psram_SoC.ld.jinja b/components/device/silabs/si91x/mcu/toolchain/linkerfile_psram_SoC.ld.jinja index 28313d982..36f736adf 100644 --- a/components/device/silabs/si91x/mcu/toolchain/linkerfile_psram_SoC.ld.jinja +++ b/components/device/silabs/si91x/mcu/toolchain/linkerfile_psram_SoC.ld.jinja @@ -132,9 +132,9 @@ SECTIONS KEEP(*(.isr_vector)) {% if (psram_present and psram_linker_config_enabled and ram_execution) %} KEEP(*(.reset_handler)) - *(EXCLUDE_FILE(*sl_si91x_bus.o *sl_si91x_driver.o *sli_si91x_multithreaded.o *rsi_deepsleep_soc.o *rsi_hal_mcu_m4_ram.o *rsi_hal_mcu_m4_rom.o *sl_sleeptimer.o *sl_sleeptimer_hal_si91x_sysrtc.o *rsi_sysrtc.o *sl_si91x_low_power_tickless_mode.o *croutine.o *event_groups.o *list.o *queue.o *stream_buffer.o *tasks.o *timers.o *cmsis_os2.o *freertos_umm_malloc_host.o *malloc_buffers.o *port.o *heap_*.o *sl_si91x_psram.o *rsi_qspi.o *rsi_pll.o *rsi_egpio.o *UDMA.o *sl_rsi_utility.o *ipmu_apis.o *rsi_d_cache.o) .text*) + *(EXCLUDE_FILE(*sl_si91x_bus.o *sl_si91x_driver.o *sli_si91x_multithreaded.o *rsi_deepsleep_soc.o *rsi_hal_mcu_m4_ram.o *rsi_hal_mcu_m4_rom.o *sl_sleeptimer.o *sl_sleeptimer_hal_si91x_sysrtc.o *rsi_sysrtc.o *sl_si91x_low_power_tickless_mode.o *croutine.o *event_groups.o *list.o *queue.o *stream_buffer.o *tasks.o *timers.o *cmsis_os2.o *freertos_umm_malloc_host.o *malloc_buffers.o *port.o *heap_*.o *sl_si91x_psram.o *rsi_qspi.o *rsi_pll.o *rsi_egpio.o *UDMA.o *sl_rsi_utility.o *ipmu_apis.o *rsi_d_cache.o *sli_si91x_power_manager.o *sl_si91x_power_manager.o *sl_platform.o) .text*) {%- else %} - *(EXCLUDE_FILE(*UDMA.o).text*) + *(EXCLUDE_FILE(*UDMA.o *rsi_d_cache.o).text*) KEEP(*(.init)) KEEP(*(.fini)) {% endif %} @@ -193,7 +193,7 @@ SECTIONS __etext = .; {% if data_segment_in_psram %} - {% if psram_present and psram_linker_config_enabled and ram_execution %} + {% if psram_present and psram_linker_config_enabled %} _slpcode = __etext; . = _last_ram_location; @@ -205,6 +205,7 @@ SECTIONS /* _scode is used in code startup code */ _scode = __sleep_code_start__; . = ALIGN(4); + {% if ram_execution %} KEEP(*(.ramVector)) *rsi_deepsleep_soc.o(.text*) *sl_si91x_psram.o(.text*) @@ -221,8 +222,7 @@ SECTIONS *rsi_hal_mcu_m4_ram.o(.text*) *rsi_hal_mcu_m4_rom.o(.text*) *sl_si91x_driver.o(.text*) - *sl_si91x_bus.o(.text*) - *UDMA.o(.text*) + *sl_si91x_bus.o(.text*) *sl_sleeptimer.o(.text*) *sl_sleeptimer_hal_si91x_sysrtc.o(.text*) *rsi_sysrtc.o(.text*) @@ -243,6 +243,16 @@ SECTIONS *heap_*.o(.text*) *ipmu_apis.o(.text*) *rsi_d_cache.o(.text*) + *sl_si91x_power_manager.o(.text*) + *sli_si91x_power_manager.o(.text*) + *sl_si91x_power_manager.o(.data*) + *sli_si91x_power_manager.o(.data*) + *sl_platform.o(.text*) + *UDMA.o(.text*) + {% else %} + *UDMA.o(.text*) + *rsi_d_cache.o(.text*) + {% endif %} __sleep_code_end__ = .; /* _ecode is used in code startup code */ _ecode = __sleep_code_end__; @@ -333,11 +343,16 @@ SECTIONS *sl_rsi_utility.o(.text*) *port.o(.text*) *heap_*.o(.text*) + *rsi_d_cache.o(.text*) + *sl_platform.o(.text*) *(.data*) - {%- else %} - *(.data*) - *UDMA.o(.text*) - {% endif %} + {% elif (not data_segment_in_psram and not ram_execution) %} + *UDMA.o(.text*) + *rsi_d_cache.o(.text*) + *(.data*) + {%- else %} + *(.data*) + {% endif %} . = ALIGN(4); /* preinit data */ @@ -486,4 +501,4 @@ SECTIONS {%- endif %} {%- endif %} {% endif %} -} +} \ No newline at end of file diff --git a/components/device/silabs/si91x/wireless/ahb_interface/src/sl_platform.c b/components/device/silabs/si91x/wireless/ahb_interface/src/sl_platform.c index 0e06d9094..a9fd48d14 100644 --- a/components/device/silabs/si91x/wireless/ahb_interface/src/sl_platform.c +++ b/components/device/silabs/si91x/wireless/ahb_interface/src/sl_platform.c @@ -24,11 +24,13 @@ #include #include "sl_component_catalog.h" #include "sl_board_configuration.h" +#include "rsi_rom_clks.h" #if defined(SL_CATALOG_KERNEL_PRESENT) #include "cmsis_os2.h" #include "FreeRTOSConfig.h" #endif + sl_status_t sli_si91x_submit_rx_pkt(void); void sl_board_enable_vcom(void); sl_status_t si91x_bootup_firmware(const uint8_t select_option); @@ -49,6 +51,10 @@ void sli_si91x_platform_init(void) SysTick_Config(SystemCoreClock / configTICK_RATE_HZ); // Set P2P Intr priority NVIC_SetPriority(SysTick_IRQn, SYSTICK_INTR_PRI); +#endif +#ifdef SLI_SI91X_MCU_PSRAM_PRESENT + RSI_CLK_SetIntfPllFreq(M4CLK, MAX_INTF_PLL_FREQUENCY, XTAL_CLK_FREQ); + RSI_CLK_Qspi2ClkConfig(M4CLK, QSPI_INTFPLLCLK, 0, 0, 1); #endif //On boot-up, verify the M4_wakeup_TA bit in the P2P status register and clearing the bit if it is set. if ((P2P_STATUS_REG & M4_wakeup_TA)) { diff --git a/components/device/silabs/si91x/wireless/asynchronous_socket/inc/sl_si91x_socket.h b/components/device/silabs/si91x/wireless/asynchronous_socket/inc/sl_si91x_socket.h index d3bae61fd..785f122ef 100644 --- a/components/device/silabs/si91x/wireless/asynchronous_socket/inc/sl_si91x_socket.h +++ b/components/device/silabs/si91x/wireless/asynchronous_socket/inc/sl_si91x_socket.h @@ -101,6 +101,7 @@ int sl_si91x_socket_async(int family, int type, int protocol, receive_data_callb * - @ref SL_SI91X_SO_SSL_V_1_3_ENABLE * - @ref SL_SI91X_SO_CERT_INDEX * - @ref SL_SI91X_SO_TLS_SNI + * - @ref SL_SI91X_SO_TLS_ALPN * - @ref SL_SI91X_SO_MAX_RETRANSMISSION_TIMEOUT_VALUE * * @param[in] option_value diff --git a/components/device/silabs/si91x/wireless/asynchronous_socket/src/sl_si91x_socket.c b/components/device/silabs/si91x/wireless/asynchronous_socket/src/sl_si91x_socket.c index 4f4d17a11..19aa6cc8b 100644 --- a/components/device/silabs/si91x/wireless/asynchronous_socket/src/sl_si91x_socket.c +++ b/components/device/silabs/si91x/wireless/asynchronous_socket/src/sl_si91x_socket.c @@ -321,9 +321,10 @@ int sl_si91x_setsockopt_async(int32_t sockID, break; } - case SL_SI91X_SO_TLS_SNI: { - sl_status_t status = add_server_name_indication_extension(&si91x_socket->sni_extensions, - (const si91x_socket_type_length_value_t *)option_value); + case SL_SI91X_SO_TLS_SNI: + case SL_SI91X_SO_TLS_ALPN: { + sl_status_t status = sli_si91x_add_tls_extension(&si91x_socket->tls_extensions, + (const sl_si91x_socket_type_length_value_t *)option_value); if (status != SL_STATUS_OK) { SET_ERROR_AND_RETURN(ENOMEM); diff --git a/components/device/silabs/si91x/wireless/inc/sl_rsi_utility.h b/components/device/silabs/si91x/wireless/inc/sl_rsi_utility.h index a468bd125..b4bc01417 100644 --- a/components/device/silabs/si91x/wireless/inc/sl_rsi_utility.h +++ b/components/device/silabs/si91x/wireless/inc/sl_rsi_utility.h @@ -87,6 +87,11 @@ typedef struct { uint32_t queued_packet_count; } si91x_packet_queue_t; +void sli_handle_wifi_beacon(sl_si91x_packet_t *packet); +sl_status_t sli_wifi_get_stored_scan_results(sl_wifi_interface_t interface, + sl_wifi_extended_scan_result_parameters_t *extended_scan_parameters); +void sli_wifi_flush_scan_results_database(void); + typedef uint32_t sl_si91x_host_timestamp_t; typedef void (*sl_si91x_host_atomic_action_function_t)(void *user_data); diff --git a/components/device/silabs/si91x/wireless/inc/sl_si91x_driver.h b/components/device/silabs/si91x/wireless/inc/sl_si91x_driver.h index e887baada..2801169ea 100644 --- a/components/device/silabs/si91x/wireless/inc/sl_si91x_driver.h +++ b/components/device/silabs/si91x/wireless/inc/sl_si91x_driver.h @@ -735,6 +735,12 @@ sl_status_t sl_si91x_frequency_offset(const sl_si91x_freq_offset_t *frequency_ca * * @return * sl_status_t. See [Status Codes](https://docs.silabs.com/gecko-platform/latest/platform-common/status) and [Additional Status Codes](../wiseconnect-api-reference-guide-err-codes/sl-additional-status-errors) for details. + * @note + * In FCC-certifed module the behavior is as follows + * 1. Region configuration is not supported and if triggered will return error SL_STATUS_SI91X_FEATURE_NOT_AVAILABLE. + * 2. STA mode channels 1 to 11 are actively scanned and 12,13,14 are passively scanned. + * 3. AP mode and Concurrent mode supports only 1 to 11 channels. + * 4. The AP will not broadcast the Country Information Element (IE). ******************************************************************************/ sl_status_t sl_si91x_set_device_region(sl_si91x_operation_mode_t operation_mode, sl_si91x_band_mode_t band, @@ -760,6 +766,7 @@ sl_status_t sl_si91x_set_device_region(sl_si91x_operation_mode_t operation_mode, * * @note * Executing this API will overwrite calibration values in certified modules. + * In FCC-certified modules, this API will trigger an error SL_STATUS_SI91X_FEATURE_NOT_AVAILABLE if used, except when in SL_SI91X_TRANSMIT_TEST_MODE mode. ******************************************************************************/ sl_status_t sl_si91x_calibration_write(sl_si91x_calibration_write_t calib_write); @@ -808,6 +815,8 @@ sl_status_t sl_si91x_calibration_read(sl_si91x_calibration_read_t target, * * @return * sl_status_t. See [Status Codes](https://docs.silabs.com/gecko-platform/latest/platform-common/status) and [Additional Status Codes](../wiseconnect-api-reference-guide-err-codes/sl-additional-status-errors) for details. + * @note + * In FCC-certified modules, this API will trigger an error SL_STATUS_SI91X_FEATURE_NOT_AVAILABLE if used, except when in SL_SI91X_TRANSMIT_TEST_MODE mode. ******************************************************************************/ sl_status_t sl_si91x_evm_offset(const sl_si91x_evm_offset_t *evm_offset); @@ -829,6 +838,8 @@ sl_status_t sl_si91x_evm_offset(const sl_si91x_evm_offset_t *evm_offset); * * @return * sl_status_t. See [Status Codes](https://docs.silabs.com/gecko-platform/latest/platform-common/status) and [Additional Status Codes](../wiseconnect-api-reference-guide-err-codes/sl-additional-status-errors) for details. + * @note + * In FCC-certified modules, this API will trigger an error SL_STATUS_SI91X_FEATURE_NOT_AVAILABLE if used, except when in SL_SI91X_TRANSMIT_TEST_MODE mode. ******************************************************************************/ sl_status_t sl_si91x_evm_write(const sl_si91x_evm_write_t *evm_write); @@ -872,6 +883,8 @@ sl_status_t sl_si91x_efuse_read(const sl_si91x_efuse_read_t *efuse_read, uint8_t * * @return * sl_status_t. See [Status Codes](https://docs.silabs.com/gecko-platform/latest/platform-common/status) and [Additional Status Codes](../wiseconnect-api-reference-guide-err-codes/sl-additional-status-errors) for details. + * @note + * In FCC-certified modules, this API will trigger an errorSL_STATUS_SI91X_FEATURE_NOT_AVAILABLE if used, except when in SL_SI91X_TRANSMIT_TEST_MODE mode. ******************************************************************************/ sl_status_t sl_si91x_dpd_calibration(const sl_si91x_get_dpd_calib_data_t *dpd_calib_data); diff --git a/components/device/silabs/si91x/wireless/inc/sl_si91x_types.h b/components/device/silabs/si91x/wireless/inc/sl_si91x_types.h index f588b1ca6..dd49dc0a4 100644 --- a/components/device/silabs/si91x/wireless/inc/sl_si91x_types.h +++ b/components/device/silabs/si91x/wireless/inc/sl_si91x_types.h @@ -109,6 +109,7 @@ typedef enum { WORLD_DOMAIN, ///< Worldwide domain KR, ///< Korea SG, ///< Singapore (not currently supported) + CN, ///< China IGNORE_REGION ///< Do not update region code during initialization } sl_si91x_region_code_t; diff --git a/components/device/silabs/si91x/wireless/inc/sl_wifi_device.h b/components/device/silabs/si91x/wireless/inc/sl_wifi_device.h index 9947bc396..12e8ef1c2 100644 --- a/components/device/silabs/si91x/wireless/inc/sl_wifi_device.h +++ b/components/device/silabs/si91x/wireless/inc/sl_wifi_device.h @@ -822,14 +822,23 @@ */ #define SL_SI91X_EXT_FEAT_WOWLAN_DISABLE BIT(17) +/** + * @def SL_SI91X_EXT_FEAT_DISABLE_XTAL_CORRECTION + * @brief To disable auto correction of XTAL (40MHz crystal) + * @details Enabling this bit will disable the automatic compensation for frequency offsets, ensuring error-free calibration. + * + * @note This bit should be enabled in the following cases: + * @note 1. Always enable it in the Calibration application. + * @note 2. Enable it for all applications for the customer hardware with an XTAL part number other than 8Y40070013. + */ +#define SL_SI91X_EXT_FEAT_DISABLE_XTAL_CORRECTION BIT(18) + /** * @def SL_SI91X_EXT_FEAT_LOW_POWER_MODE * @brief To enable low power mode in WLAN. * @details Enabling this bit activates low power mode for WLAN, Active current will also be reduced. * As most of the code which is needed to maintain connection is kept in RAM. * There will be minimal execution of code from Flash which in turn results in low average current. - * - * @note Bit 18 is reserved. */ #define SL_SI91X_EXT_FEAT_LOW_POWER_MODE BIT(19) @@ -1053,7 +1062,7 @@ * @note For 917 radio boards, set `SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE` to 1. For other variants, a value of 2 is recommended. */ -#ifdef SL_SI91X_MODULE_BOARD +#ifdef SI91X_32kHz_EXTERNAL_OSCILLATOR #define SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE(xtal_clk_enable) (xtal_clk_enable << 23) #else #define SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE(xtal_clk_enable) (xtal_clk_enable << 22) diff --git a/components/device/silabs/si91x/wireless/sl_net/src/sl_net_si91x_integration_handler.c b/components/device/silabs/si91x/wireless/sl_net/src/sl_net_si91x_integration_handler.c index 8deb40ba0..36e51d47d 100644 --- a/components/device/silabs/si91x/wireless/sl_net/src/sl_net_si91x_integration_handler.c +++ b/components/device/silabs/si91x/wireless/sl_net/src/sl_net_si91x_integration_handler.c @@ -180,13 +180,32 @@ void sl_net_si91x_event_dispatch_handler(sli_si91x_queue_packet_t *data, sl_si91 if (packet->command == RSI_WLAN_RSP_JOIN || packet->command == RSI_WLAN_RSP_IPV4_CHANGE || packet->command == RSI_WLAN_RSP_IPCONFV4 || ((packet->command == RSI_WLAN_RSP_IPCONFV6) && (data->frame_status))) { + // free all TX queues except BT - for (int queue_id = 0; queue_id < SI91X_BT_CMD; queue_id++) { + for (int queue_id = 0; queue_id < SI91X_SOCKET_CMD; queue_id++) { sli_si91x_flush_queue_based_on_type(queue_id, si91x_node_free_function); } #if defined(SLI_SI91X_OFFLOAD_NETWORK_STACK) && defined(SLI_SI91X_SOCKETS) - // Free all allocated sockets - sl_si91x_vap_shutdown(SL_SI91X_WIFI_CLIENT_VAP_ID); + uint8_t vap_id = packet->desc[7]; // Get vap id from firmware response packet + + // Reset all the sockets that match the vap id + for (uint8_t index = 0; index < NUMBER_OF_SOCKETS; index++) { + si91x_socket_t *socket = get_si91x_socket(index); + // Check if socket exists + if ((socket != NULL) && (socket->vap_id == vap_id)) { + socket->state = DISCONNECTED; + + /* Flush the pending tx request packets from the socket command queue */ + sl_si91x_host_flush_nodes_from_queue( + SI91X_SOCKET_CMD_QUEUE, + &socket->id, + (sl_si91x_compare_function_t)sli_si91x_socket_identification_function_based_on_socketid, + si91x_node_free_function); + } + } + + // Free all the allocated sockets for the given vap id + sl_si91x_vap_shutdown(vap_id); // ToDo: Need to discuss on this... #endif } diff --git a/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_constants.h b/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_constants.h index aad57b70c..1f039f66c 100644 --- a/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_constants.h +++ b/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_constants.h @@ -50,6 +50,9 @@ #define SI91X_CERT_INDEX_1 1 #define SI91X_CERT_INDEX_2 2 +#define SL_SI91X_TLS_EXTENSION_SNI_TYPE 1 ///< TLS extension for SNI +#define SL_SI91X_TLS_EXTENSION_ALPN_TYPE 2 ///< TLS extension for ALPN + #define SI91X_SOCKET_TCP_CLIENT 0x0000 #define SI91X_SOCKET_UDP_CLIENT 0x0001 #define SI91X_SOCKET_TCP_SERVER 0x0002 @@ -86,6 +89,7 @@ #define SL_SI91X_SO_MSS 40 ///< To configure the TCP MSS #define SL_SI91X_SO_SOCK_VAP_ID 25 ///< To configure the socket VAP ID #define SL_SI91X_SO_TLS_SNI 47 ///< To configure the TLS SNI extension +#define SL_SI91X_SO_TLS_ALPN 50 ///< To configure the TLS ALPN extension /** @} */ #define SHUTDOWN_BY_ID 0 diff --git a/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_types.h b/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_types.h index ee1b0979c..fae2f4716 100644 --- a/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_types.h +++ b/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_types.h @@ -178,13 +178,6 @@ typedef void (*select_callback)(fd_set *fd_read, fd_set *fd_write, fd_set *fd_ex */ typedef void (*remote_socket_termination_callback)(int socket, uint16_t port, uint32_t bytes_sent); -/// Si91x specific socket type length value -typedef struct { - uint16_t type; ///< Socket type - uint16_t length; ///< Data length - uint8_t value[]; ///< Data -} si91x_socket_type_length_value_t; - /** @} */ /// Internal si91x BSD socket status @@ -201,32 +194,32 @@ typedef enum { #define SI91X_MAX_SIZE_OF_EXTENSION_DATA 256 #pragma pack() -/// Internal si91x server name indication extensions +/// Internal si91x TLS extensions typedef struct { uint8_t buffer[SI91X_MAX_SIZE_OF_EXTENSION_DATA]; ///< Buffer uint16_t total_extensions; ///< Total extensions uint16_t current_size_of_extensions; ///< Current size of extensions -} si91x_server_name_indication_extensions_t; +} sli_si91x_tls_extensions_t; #pragma pack() /// Internal si91x socket handle typedef struct { - int32_t id; ///< Socket ID - int32_t type; ///< Socket type - int role; ///< Socket role - int32_t protocol; ///< Protocol - uint16_t tcp_keepalive_initial_time; ///< TCP keepalive intial time - uint8_t max_tcp_retries; ///< MAX TCOP retries - uint16_t read_timeout; ///< Read timeout - uint8_t certificate_index; ///< Certificate Index - uint8_t vap_id; ///< Virtual AP ID - uint16_t mss; ///< Maximum segment size (MSS) value - struct sockaddr_in6 local_address; ///< Using sockaddr_in6 to hold either IPV4 or IPV6. - struct sockaddr_in6 remote_address; ///< Using sockaddr_in6 to hold either IPV4 or IPV6. - si91x_bsd_socket_state_t state; ///< BSD socket state (used for internal tracking) - si91x_server_name_indication_extensions_t sni_extensions; ///< SNI Extension - bool is_waiting_on_ack; ///< Boolean flag to check if socket is waiting for an ack. + int32_t id; ///< Socket ID + int32_t type; ///< Socket type + int role; ///< Socket role + int32_t protocol; ///< Protocol + uint16_t tcp_keepalive_initial_time; ///< TCP keepalive intial time + uint8_t max_tcp_retries; ///< MAX TCOP retries + uint16_t read_timeout; ///< Read timeout + uint8_t certificate_index; ///< Certificate Index + uint8_t vap_id; ///< Virtual AP ID + uint16_t mss; ///< Maximum segment size (MSS) value + struct sockaddr_in6 local_address; ///< Using sockaddr_in6 to hold either IPV4 or IPV6. + struct sockaddr_in6 remote_address; ///< Using sockaddr_in6 to hold either IPV4 or IPV6. + si91x_bsd_socket_state_t state; ///< BSD socket state (used for internal tracking) + sli_si91x_tls_extensions_t tls_extensions; ///< TLS Extension + bool is_waiting_on_ack; ///< Boolean flag to check if socket is waiting for an ack. #ifdef SLI_SI917 uint32_t ssl_bitmap; ///< SSL bitmap uint32_t max_retransmission_timeout_value; ///< Max retransmission timeout value diff --git a/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_utility.h b/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_utility.h index dbd785844..6e8b8c3af 100644 --- a/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_utility.h +++ b/components/device/silabs/si91x/wireless/socket/inc/sl_si91x_socket_utility.h @@ -103,6 +103,14 @@ typedef struct { uint8_t tcp_rx_window_div_factor; ///< TCP RX window division factor, increases ACK frequency for asynchronous sockets } sl_si91x_socket_config_t; + +/// SiWx91x specific socket type length value +typedef struct { + uint16_t type; ///< Socket type + uint16_t length; ///< Data length + uint8_t value[]; ///< Data +} sl_si91x_socket_type_length_value_t; + /** @} */ /** @@ -166,8 +174,8 @@ si91x_socket_t *get_si91x_socket(int socket_id); */ bool is_port_available(uint16_t port_number); -sl_status_t add_server_name_indication_extension(si91x_server_name_indication_extensions_t *socket_sni_extensions, - const si91x_socket_type_length_value_t *sni_extension); +sl_status_t sli_si91x_add_tls_extension(sli_si91x_tls_extensions_t *socket_tls_extensions, + const sl_si91x_socket_type_length_value_t *tls_extension); sl_status_t create_and_send_socket_request(int socketIdIndex, int type, const int *backlog); @@ -183,6 +191,8 @@ int handle_select_response(const sl_si91x_socket_select_rsp_t *response, fd_set *writefds, fd_set *exception_fd); +uint8_t sli_si91x_socket_identification_function_based_on_socketid(sl_wifi_buffer_t *buffer, void *user_data); + void set_select_callback(select_callback callback); void sli_si91x_set_accept_callback(si91x_socket_t *server_socket, accept_callback callback, int32_t client_socket_id); diff --git a/components/device/silabs/si91x/wireless/socket/src/sl_si91x_socket_utility.c b/components/device/silabs/si91x/wireless/socket/src/sl_si91x_socket_utility.c index db9893660..e1980d373 100644 --- a/components/device/silabs/si91x/wireless/socket/src/sl_si91x_socket_utility.c +++ b/components/device/silabs/si91x/wireless/socket/src/sl_si91x_socket_utility.c @@ -256,27 +256,29 @@ bool is_port_available(uint16_t port_number) } /** - * @brief This function is responsible to copy the SNI information provided by application into socket structure. + * @brief This function is responsible to copy the TLS extension information provided by application into socket structure. * - * @param socket_sni_extensions pointer to SNI extension in socket structure - * @param sni_extension pointer to the SNI information provided by application + * @param socket_tls_extensions pointer to TLS extension in socket structure + * @param tls_extension pointer to the TLS information provided by application * @return sl_status_t possible return values are SL_STATUS_OK and SL_STATUS_SI91X_MEMORY_ERROR */ -sl_status_t add_server_name_indication_extension(si91x_server_name_indication_extensions_t *socket_sni_extensions, - const si91x_socket_type_length_value_t *sni_extension) +sl_status_t sli_si91x_add_tls_extension(sli_si91x_tls_extensions_t *socket_tls_extensions, + const sl_si91x_socket_type_length_value_t *tls_extension) { - // To check if memory available for new extension in SNI buffer of socket, max 256 Bytes only - if (SI91X_MAX_SIZE_OF_EXTENSION_DATA - socket_sni_extensions->current_size_of_extensions - < (int)(sizeof(si91x_socket_type_length_value_t) + sni_extension->length)) { + // To check if memory available for new extension in buffer of socket, max 256 Bytes only + if (SI91X_MAX_SIZE_OF_EXTENSION_DATA - socket_tls_extensions->current_size_of_extensions + < (int)(sizeof(sl_si91x_socket_type_length_value_t) + tls_extension->length)) { return SL_STATUS_SI91X_MEMORY_ERROR; } - uint8_t sni_size = (uint8_t)(sizeof(si91x_socket_type_length_value_t) + sni_extension->length); + uint8_t extension_size = (uint8_t)(sizeof(sl_si91x_socket_type_length_value_t) + tls_extension->length); - // copies SNI provided by app into SDK socket struct - memcpy(&socket_sni_extensions->buffer[socket_sni_extensions->current_size_of_extensions], sni_extension, sni_size); - socket_sni_extensions->current_size_of_extensions += sni_size; - socket_sni_extensions->total_extensions++; + // copies TLS extension provided by app into SDK socket struct + memcpy(&socket_tls_extensions->buffer[socket_tls_extensions->current_size_of_extensions], + tls_extension, + extension_size); + socket_tls_extensions->current_size_of_extensions += extension_size; + socket_tls_extensions->total_extensions++; return SL_STATUS_OK; } @@ -308,6 +310,46 @@ static void si91x_socket_node_free_function(sl_wifi_buffer_t *buffer) sl_si91x_host_free_buffer(buffer); } +uint8_t sli_si91x_socket_identification_function_based_on_socketid(sl_wifi_buffer_t *buffer, void *user_data) +{ + sl_status_t status; + sl_si91x_packet_t *packet = NULL; + sli_si91x_queue_packet_t *node = NULL; + sli_si91x_queue_packet_t *response_node = NULL; + sl_wifi_buffer_t *response_buffer = NULL; + int32_t socket_id = 0xFF; + int32_t socket_index = *(int32_t *)user_data; + + node = (sli_si91x_queue_packet_t *)sl_si91x_host_get_buffer_data(buffer, 0, NULL); + packet = sl_si91x_host_get_buffer_data(node->host_packet, 0, NULL); + + socket_id = get_socket_id_from_socket_command(packet); + + if (socket_id == socket_index) { + /* Send response if asked */ + if ((node->flags & SI91X_PACKET_RESPONSE_STATUS) == SI91X_PACKET_RESPONSE_STATUS) { + status = + sl_si91x_host_allocate_buffer(&response_buffer, SL_WIFI_CONTROL_BUFFER, sizeof(sli_si91x_queue_packet_t), 1000); + if (status == SL_STATUS_OK) { + response_node = sl_si91x_host_get_buffer_data(response_buffer, 0, NULL); + + memcpy(response_node, node, sizeof(sli_si91x_queue_packet_t)); + response_node->frame_status = ENOTCONN; + response_node->host_packet = NULL; + response_node->flags = 0; + + sl_si91x_host_add_to_queue(SI91X_SOCKET_RESPONSE_QUEUE, response_buffer); + sl_si91x_host_set_event(NCP_HOST_SOCKET_RESPONSE_EVENT); + } else { + SL_DEBUG_LOG("\r\n HEAP EXHAUSTED DURING ALLOCATION \r\n"); + BREAKPOINT(); + } + } + return true; + } + return false; +} + static uint8_t si91x_socket_identification_function(sl_wifi_buffer_t *buffer, void *user_data) { sl_status_t status; @@ -435,13 +477,13 @@ sl_status_t create_and_send_socket_request(int socketIdIndex, int type, const in socket_create_request.socket_cert_inx = si91x_bsd_socket->certificate_index; // Check if extension is provided my application and memcopy until the provided size of extensions - if (si91x_bsd_socket->sni_extensions.total_extensions > 0) { + if (si91x_bsd_socket->tls_extensions.total_extensions > 0) { memcpy(socket_create_request.tls_extension_data, - si91x_bsd_socket->sni_extensions.buffer, - si91x_bsd_socket->sni_extensions.current_size_of_extensions); + si91x_bsd_socket->tls_extensions.buffer, + si91x_bsd_socket->tls_extensions.current_size_of_extensions); - socket_create_request.total_extension_length = si91x_bsd_socket->sni_extensions.current_size_of_extensions; - socket_create_request.no_of_tls_extensions = si91x_bsd_socket->sni_extensions.total_extensions; + socket_create_request.total_extension_length = si91x_bsd_socket->tls_extensions.current_size_of_extensions; + socket_create_request.no_of_tls_extensions = si91x_bsd_socket->tls_extensions.total_extensions; } wait_period = SL_SI91X_WAIT_FOR_RESPONSE(150000); // timeout is 15 sec } diff --git a/components/device/silabs/si91x/wireless/src/sl_rsi_utility.c b/components/device/silabs/si91x/wireless/src/sl_rsi_utility.c index da432bec1..9ac936d09 100644 --- a/components/device/silabs/si91x/wireless/src/sl_rsi_utility.c +++ b/components/device/silabs/si91x/wireless/src/sl_rsi_utility.c @@ -40,6 +40,9 @@ #include "cmsis_os2.h" // CMSIS RTOS2 #include "sl_si91x_types.h" +/****************************************************** + * Macro Declarations + ******************************************************/ // Macro to check the status and return it if it's not SL_STATUS_OK #define VERIFY_STATUS(s) \ do { \ @@ -47,6 +50,99 @@ return s; \ } while (0) +// WLAN Management Frame Sub-Type +#define SLI_WIFI_FRAME_SUBTYPE_MASK 0xf0 // WLAN Management Frame Sub-Type Mask +#define SLI_WIFI_FRAME_SUBTYPE_PROBE_RESP 0x50 // WLAN Management Frame Sub-Type Probe Response Frame +#define SLI_WIFI_FRAME_SUBTYPE_BEACON 0x80 // WLAN Management Frame Sub-Type Beacon Frame +#define SLI_WIFI_MINIMUM_FRAME_LENGTH 36 // Minimum Frame Length of WLAN Management Frame +#define SLI_WIFI_HARDWARE_ADDRESS_LENGTH 6 // Hardware Address Length + +// WLAN Information Element Type +#define SLI_WLAN_TAG_SSID 0 // WLAN Information Element Type SSID +#define SLI_WLAN_TAG_RSN 48 // WLAN Robust Security Network Information Element +#define SLI_WLAN_TAG_VENDOR_SPECIFIC 221 // WLAN Vendor Specific Information Element + +// Authentication key Management Type +#define SLI_AUTH_KEY_MGMT_UNSPEC_802_1X 0x000FAC01 // Unspecified Authentication key Management Type +#define SLI_AUTH_KEY_MGMT_PSK_OVER_802_1X 0x000FAC02 // PSK Authentication key Management Type +#define SLI_AUTH_KEY_MGMT_802_1X_SHA256 0x000FAC05 // SHA256 Authentication key Management Type +#define SLI_AUTH_KEY_MGMT_PSK_SHA256 0x000FAC06 // PSK SHA256 Authentication key Management Type +#define SLI_AUTH_KEY_MGMT_SAE 0x000FAC08 // SAE Authentication key Management Type +#define SLI_AUTH_KEY_MGMT_FT_SAE 0x000FAC09 // FT_SAE Authentication key Management Type + +// Authentication key Management Type Flags +#define SLI_WLAN_AUTH_KEY_MGMT_TYPE_WPA 0x00000001 // WPA AKM Type +#define SLI_WLAN_AUTH_KEY_MGMT_TYPE_WPA2 0x00000002 // WPA2 AKM Type +#define SLI_WLAN_AUTH_KEY_MGMT_TYPE_WPA_PSK 0x00000004 // WPA_PSK AKM Type +#define SLI_WLAN_AUTH_KEY_MGMT_TYPE_WPA2_PSK 0x00000008 // WPA2_PSK AKM Type +#define SLI_WLAN_AUTH_KEY_MGMT_TYPE_SAE 0x00010000 // SAE AKM Type +#define SLI_WLAN_AUTH_KEY_MGMT_TYPE_FT_SAE 0x00100000 // FT_SAE AKM Type +#define SLI_WLAN_AUTH_KEY_MGMT_TYPE_802_1X_SHA256 0x00020000 // SHA256 AKM Type +#define SLI_WLAN_AUTH_KEY_MGMT_TYPE_PSK_SHA256 0x00040000 // PSK_SHA256 AKM Type + +/****************************************************** + * Local Type Declarations + ******************************************************/ +// WLAN Frame +typedef struct { + uint8_t fc[2]; // Frame Control + uint8_t duration[2]; // Duration + uint8_t da[SLI_WIFI_HARDWARE_ADDRESS_LENGTH]; // Destination Address + uint8_t sa[SLI_WIFI_HARDWARE_ADDRESS_LENGTH]; // Source Address + uint8_t bssid[SLI_WIFI_HARDWARE_ADDRESS_LENGTH]; // BSS Id + uint8_t sc[2]; // Sequence Control Id + uint8_t timestamp[8]; // Time Stamp + uint8_t bi[2]; // Beacon Interval + uint8_t ci[2]; // Capability Information + uint8_t tagged_info[]; // Variable Information Elememt +} sli_wifi_data_frame_t; + +// WLAN Information Element +typedef struct { + uint8_t tag; // Information Element Tag Id + uint8_t data_length; // Information Element Data Length + uint8_t data[]; // Information Element Data +} sli_wifi_data_tagged_info_t; + +// Cipher suite +typedef struct { + uint8_t cs_oui[3]; // Cipher Suite OUI + uint8_t cs_type; // Cipher Suite Type +} sli_wlan_cipher_suite_t; + +// WLAN Robust Security Network Information Element +typedef struct { + uint8_t version[2]; // RSN Version + sli_wlan_cipher_suite_t gcs; // Group cipher suite + uint8_t pcsc[2]; // Pairwise cipher suite count + uint8_t pcsl[]; // Pairwise cipher suite list +} sli_wlan_rsn_element_t; + +// WLAN Vendor Specific Information Element +typedef struct { + uint8_t oui[3]; // Vendor OUI + uint8_t vs_oui; // Vendor specific OUI + uint8_t type; // WPA Information Element + uint8_t wpa_version[2]; // WPA Version + sli_wlan_cipher_suite_t mcs; // Multicast Cipher Suite + uint8_t ucsc; // Unicast Cipher Suite List Count + uint8_t ucsl[]; // Unicast Cipher Suite List +} sli_wlan_vendor_specific_element_t; + +// Scan Information +typedef struct sli_scan_info_s { + struct sli_scan_info_s *next; + uint8_t channel; ///< Channel number of the AP + uint8_t security_mode; ///< Security mode of the AP + uint8_t rssi; ///< RSSI value of the AP + uint8_t network_type; ///< AP network type + uint8_t ssid[34]; ///< SSID of the AP + uint8_t bssid[SLI_WIFI_HARDWARE_ADDRESS_LENGTH]; ///< BSSID of the AP +} sli_scan_info_t; + +/****************************************************** + * Variable Declarations + ******************************************************/ osThreadId_t si91x_thread = 0; osThreadId_t si91x_event_thread = 0; osEventFlagsId_t si91x_events = 0; @@ -100,6 +196,333 @@ static sl_si91x_boot_configuration_t saved_boot_configuration = { 0 }; static sl_si91x_coex_mode_t coex_mode = 0; +static sli_scan_info_t *scan_info_database = NULL; + +/****************************************************** + * Internal Function Declarations + ******************************************************/ +// Function to update a existing entry or create new entry for scan results database +static sli_scan_info_t *sli_update_or_create_scan_info_element(sli_scan_info_t *info) +{ + sli_scan_info_t *element = NULL; + + element = scan_info_database; + while (NULL != element) { + if (0 == memcmp(info->bssid, element->bssid, SLI_WIFI_HARDWARE_ADDRESS_LENGTH)) { + element->channel = element->channel; + element->security_mode = element->security_mode; + element->rssi = element->rssi; + element->network_type = element->network_type; + memcpy(element->ssid, info->ssid, 34); + break; + } + element = element->next; + } + + if (NULL == element) { + element = malloc(sizeof(sli_scan_info_t)); + memcpy(element, info, sizeof(sli_scan_info_t)); + element->next = NULL; + return element; + } + + return NULL; +} + +// Function to store a given scan info element in scan results database +static void sli_store_scan_info_element(sli_scan_info_t *info) +{ + sli_scan_info_t *element = NULL; + sli_scan_info_t *head = NULL; + sli_scan_info_t *tail = NULL; + + if (NULL == info) { + return; + } + + element = sli_update_or_create_scan_info_element(info); + if (NULL == element) { + return; + } + + if (NULL == scan_info_database) { + scan_info_database = element; + return; + } + + tail = scan_info_database; + while (NULL != tail) { + if (element->rssi < tail->rssi) { + element->next = tail; + if (NULL == head) { + scan_info_database = element; + } else { + head->next = element; + } + break; + } + + head = tail; + tail = tail->next; + + if (NULL == tail) { + head->next = element; + } + } + + return; +} + +// Function to identify Authentication Key Management Type +static uint32_t sli_get_key_management_info(const sli_wlan_cipher_suite_t *akms, const uint16_t akmsc) +{ + int i; + uint32_t key_mgmt = 0; + uint32_t oui_type; + + if (NULL == akms) { + return 0; + } + + for (i = 0; i < akmsc; i++) { + oui_type = ((akms[i].cs_oui[0] << 24) | (akms[i].cs_oui[1] << 16) | (akms[i].cs_oui[2] << 8) | akms[0].cs_type); + + switch (oui_type) { + case SLI_AUTH_KEY_MGMT_UNSPEC_802_1X: + key_mgmt |= SLI_WLAN_AUTH_KEY_MGMT_TYPE_WPA | SLI_WLAN_AUTH_KEY_MGMT_TYPE_WPA2; + break; + case SLI_AUTH_KEY_MGMT_PSK_OVER_802_1X: + key_mgmt |= SLI_WLAN_AUTH_KEY_MGMT_TYPE_WPA_PSK | SLI_WLAN_AUTH_KEY_MGMT_TYPE_WPA2_PSK; + break; + case SLI_AUTH_KEY_MGMT_802_1X_SHA256: + key_mgmt |= SLI_WLAN_AUTH_KEY_MGMT_TYPE_802_1X_SHA256; + break; + case SLI_AUTH_KEY_MGMT_PSK_SHA256: + key_mgmt |= SLI_WLAN_AUTH_KEY_MGMT_TYPE_PSK_SHA256; + break; + case SLI_AUTH_KEY_MGMT_SAE: + key_mgmt |= SLI_WLAN_AUTH_KEY_MGMT_TYPE_SAE; + break; + case SLI_AUTH_KEY_MGMT_FT_SAE: + key_mgmt |= SLI_WLAN_AUTH_KEY_MGMT_TYPE_FT_SAE; + break; + } + } + return key_mgmt; +} + +// Function to parse Information elements in WiFi Beacon or Probe response frames +static void sli_process_tag_info(sli_wifi_data_tagged_info_t *info, sli_scan_info_t *scan_info) +{ + uint8_t wlan_oui[3] = { 0x00, 0x50, 0xF2 }; + uint8_t wlan_gcs_oui[3] = { 0x00, 0x0F, 0xAC }; + uint16_t akmsc = 0; + sli_wlan_cipher_suite_t *akms = NULL; + sli_wlan_vendor_specific_element_t *vendor = NULL; + + switch (info->tag) { + case SLI_WLAN_TAG_SSID: + memcpy(scan_info->ssid, info->data, info->data_length); + scan_info->ssid[info->data_length] = 0; + break; + case SLI_WLAN_TAG_RSN: + scan_info->security_mode = SL_WIFI_WPA2_ENTERPRISE; + sli_wlan_rsn_element_t *rsn = (sli_wlan_rsn_element_t *)info->data; + uint16_t pcsc = (rsn->pcsc[0] | (rsn->pcsc[1] << 8)); + uint8_t *akmslc = (rsn->pcsl + (pcsc * sizeof(sli_wlan_cipher_suite_t))); + akmsc = (akmslc[0] | (akmslc[1] << 8)); + akms = (sli_wlan_cipher_suite_t *)(akmslc + 2); + SL_DEBUG_LOG("RSN OUI %02x:%02x:%02x.\n", rsn->gcs.cs_oui[0], rsn->gcs.cs_oui[1], rsn->gcs.cs_oui[2]); + SL_DEBUG_LOG("Pairwise cipher suite count : %u.\n", pcsc); + + if (!memcmp(rsn->gcs.cs_oui, wlan_gcs_oui, 3)) { + scan_info->security_mode = SL_WIFI_WPA2; + uint32_t key = sli_get_key_management_info((const sli_wlan_cipher_suite_t *)akms, (const uint16_t)akmsc); + + if (akms[0].cs_type == 1) { + scan_info->security_mode = SL_WIFI_WPA2_ENTERPRISE; + } + + if (key & SLI_WLAN_AUTH_KEY_MGMT_TYPE_SAE) { + scan_info->security_mode = SL_WIFI_WPA3; + if ((key & SLI_WLAN_AUTH_KEY_MGMT_TYPE_PSK_SHA256) || (key & SLI_WLAN_AUTH_KEY_MGMT_TYPE_WPA2_PSK)) { + scan_info->security_mode = SL_WIFI_WPA3_TRANSITION; + } + } + } + break; + case SLI_WLAN_TAG_VENDOR_SPECIFIC: + vendor = (sli_wlan_vendor_specific_element_t *)info->data; + + if ((!memcmp(vendor->oui, wlan_oui, 3)) && (vendor->vs_oui == 0x01) + && ((scan_info->security_mode == SL_WIFI_OPEN) || (scan_info->security_mode == SL_WIFI_WEP))) { + uint8_t *list_count = NULL; + scan_info->security_mode = SL_WIFI_WPA; + list_count = + (vendor->ucsl + (sizeof(sli_wlan_cipher_suite_t) * vendor->ucsc)); // Get Pointer to AKM Suite Count + akmsc = (list_count[0] | (list_count[1] << 8)); + akms = (sli_wlan_cipher_suite_t *)(list_count + 2); + + if (0 != akmsc) { + if (akms[akmsc - 1].cs_type == 1) { + scan_info->security_mode = SL_WIFI_WPA_ENTERPRISE; + } + } + } + break; + } + + return; +} + +// Function to identify expected scan result based on filter +static bool sli_filter_scan_info(sli_scan_info_t *scan_info, + sl_wifi_extended_scan_result_parameters_t *extended_scan_parameters) +{ + if (NULL == scan_info) { + return false; + } + + if ((NULL != extended_scan_parameters->channel_filter) + && (*(extended_scan_parameters->channel_filter) != scan_info->channel)) { + return false; + } + + if ((NULL != extended_scan_parameters->security_mode_filter) + && (*(extended_scan_parameters->security_mode_filter) != scan_info->security_mode)) { + return false; + } + + if ((NULL != extended_scan_parameters->rssi_filter) + && (*(extended_scan_parameters->rssi_filter) <= scan_info->rssi)) { + return false; + } + + if ((NULL != extended_scan_parameters->network_type_filter) + && (*(extended_scan_parameters->network_type_filter) != scan_info->network_type)) { + return false; + } + + return true; +} + +/****************************************************** + * Internal Function Declarations + ******************************************************/ +// Function to Parse the Beacon and Probe response Frames +void sli_handle_wifi_beacon(sl_si91x_packet_t *packet) +{ + uint8_t subtype = 0; + uint16_t recv_freq = 0; + sli_wifi_data_frame_t *wifi_frame = (sli_wifi_data_frame_t *)packet->data; + sli_scan_info_t scan_info = { 0 }; + uint16_t ies_length = 0; + + recv_freq = packet->desc[9]; + recv_freq = (recv_freq << 8) | packet->desc[8]; + scan_info.rssi = (~packet->desc[10]); + scan_info.channel = packet->desc[11]; + + // Check for ESS bit and TBSS status bit in capability info + // 1 in ESS bit indicates that the transmitter is an AP + if (1 == (wifi_frame->ci[0] & 0x03)) { + scan_info.network_type = 1; + } else { + scan_info.network_type = 0; + } + + if (wifi_frame->ci[0] & 0x08) { + scan_info.security_mode = SL_WIFI_WEP; + } else { + scan_info.security_mode = SL_WIFI_OPEN; + } + + subtype = wifi_frame->fc[0] & SLI_WIFI_FRAME_SUBTYPE_MASK; + switch (subtype) { + case SLI_WIFI_FRAME_SUBTYPE_PROBE_RESP: + case SLI_WIFI_FRAME_SUBTYPE_BEACON: { + if (packet->length <= SLI_WIFI_MINIMUM_FRAME_LENGTH) { + return; + } + ies_length = packet->length - SLI_WIFI_MINIMUM_FRAME_LENGTH; + + memcpy(scan_info.bssid, wifi_frame->bssid, SLI_WIFI_HARDWARE_ADDRESS_LENGTH); + + sli_wifi_data_tagged_info_t *info = (sli_wifi_data_tagged_info_t *)wifi_frame->tagged_info; + while (0 != ies_length) { + sli_process_tag_info(info, &scan_info); + ies_length -= (sizeof(sli_wifi_data_tagged_info_t) + info->data_length); + info = (sli_wifi_data_tagged_info_t *)&(info->data[info->data_length]); + + if (ies_length <= sizeof(sli_wifi_data_tagged_info_t)) { + ies_length = 0; + } + } + + sli_store_scan_info_element(&scan_info); + } break; + default: + return; + } + + return; +} + +// Function to get all or filtered scan results from scan result database +sl_status_t sli_wifi_get_stored_scan_results(sl_wifi_interface_t interface, + sl_wifi_extended_scan_result_parameters_t *extended_scan_parameters) +{ + UNUSED_PARAMETER(interface); + if (NULL == extended_scan_parameters) { + return SL_STATUS_INVALID_PARAMETER; + } + + sl_wifi_extended_scan_result_t *scan_results = extended_scan_parameters->scan_results; + uint16_t *result_count = extended_scan_parameters->result_count; + uint16_t length = extended_scan_parameters->array_length; + sli_scan_info_t *scan_info = scan_info_database; + + if ((NULL == scan_results) || (NULL == result_count) || (0 == length)) { + return SL_STATUS_INVALID_PARAMETER; + } + *result_count = 0; + + while ((0 != length) && (NULL != scan_info)) { + if (true == sli_filter_scan_info(scan_info, extended_scan_parameters)) { + scan_results[*result_count].rf_channel = scan_info->channel; + scan_results[*result_count].security_mode = scan_info->security_mode; + scan_results[*result_count].rssi = scan_info->rssi; + scan_results[*result_count].network_type = scan_info->network_type; + memcpy(scan_results[*result_count].bssid, scan_info->bssid, SLI_WIFI_HARDWARE_ADDRESS_LENGTH); + memcpy(scan_results[*result_count].ssid, scan_info->ssid, 34); + (*result_count)++; + length--; + } + scan_info = scan_info->next; + } + + return SL_STATUS_OK; +} + +// Function to Clean up all the scan results in scan result database +void sli_wifi_flush_scan_results_database(void) +{ + sli_scan_info_t *scan_info = scan_info_database; + sli_scan_info_t *node = NULL; + + while (NULL != scan_info) { + node = scan_info; + scan_info = scan_info->next; + free(node); + } + scan_info_database = NULL; + + return; +} + +/****************************************************** + * Function Declarations + ******************************************************/ void save_wifi_current_performance_profile(const sl_wifi_performance_profile_t *profile) { SL_ASSERT(profile != NULL); @@ -1232,6 +1655,8 @@ uint8_t sli_multicast_mac_hash(const uint8_t *mac) return crc; } +/* Function to get the current status of the NVM command progress +Returns true if an NVM command is in progress, false otherwise*/ bool sli_si91x_get_flash_command_status() { return sli_si91x_packet_status; @@ -1242,17 +1667,11 @@ void sli_si91x_update_flash_command_status(bool flag) sli_si91x_packet_status = flag; } -// This function is used to update the power manager to see whether the device is ready for sleep or not. -// True indicates ready for sleep, and false indicates not ready for sleep. +/* This function is used to update the power manager to see whether the device is ready for sleep or not. + True indicates ready for sleep, and false indicates not ready for sleep.*/ bool sli_si91x_is_sdk_ok_to_sleep() { - bool tx_queues_empty = (sl_si91x_host_get_queue_packet_count((sl_si91x_queue_type_t)SI91X_COMMON_CMD) - || sl_si91x_host_get_queue_packet_count((sl_si91x_queue_type_t)SI91X_WLAN_CMD) - || sl_si91x_host_get_queue_packet_count((sl_si91x_queue_type_t)SI91X_NETWORK_CMD) - || sl_si91x_host_get_queue_packet_count((sl_si91x_queue_type_t)SI91X_SOCKET_CMD) - || sl_si91x_host_get_queue_packet_count((sl_si91x_queue_type_t)SI91X_BT_CMD) - || sl_si91x_host_get_queue_packet_count((sl_si91x_queue_type_t)SI91X_SOCKET_DATA)); - return ((!sli_si91x_get_flash_command_status()) && (!tx_queues_empty) && (sl_si91x_is_device_initialized())); + return ((!sli_si91x_get_flash_command_status()) && (sl_si91x_is_device_initialized())); } bool sl_si91x_is_device_initialized(void) diff --git a/components/device/silabs/si91x/wireless/src/sl_si91x_driver.c b/components/device/silabs/si91x/wireless/src/sl_si91x_driver.c index 68b150fa3..dd6b3fe40 100644 --- a/components/device/silabs/si91x/wireless/src/sl_si91x_driver.c +++ b/components/device/silabs/si91x/wireless/src/sl_si91x_driver.c @@ -317,6 +317,22 @@ const sl_si91x_set_region_ap_request_t default_SG_region_5GHZ_configurations = { .channel_info[4] = { .first_channel = 149, .no_of_channels = 4, .max_tx_power = 29 } }; +// Define default configurations for the China region for 2.4GHz and 5GHz bands +const sl_si91x_set_region_ap_request_t default_CN_region_2_4GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "CN ", + .no_of_rules = 1, + .channel_info[0] = { .first_channel = 1, .no_of_channels = 13, .max_tx_power = 20 } +}; + +const sl_si91x_set_region_ap_request_t default_CN_region_5GHZ_configurations = { + .set_region_code_from_user_cmd = SET_REGION_CODE_FROM_USER, + .country_code = "CN ", + .no_of_rules = 2, + .channel_info[0] = { .first_channel = 36, .no_of_channels = 9, .max_tx_power = 20 }, + .channel_info[4] = { .first_channel = 149, .no_of_channels = 5, .max_tx_power = 33 } +}; + // clang-format off static uint8_t firmware_queue_id[SI91X_CMD_MAX] = { [SI91X_COMMON_CMD] = RSI_WLAN_MGMT_Q, [SI91X_WLAN_CMD] = RSI_WLAN_MGMT_Q, @@ -1276,6 +1292,29 @@ sl_status_t sl_si91x_driver_send_command_packet(uint32_t command, context.packet_id, wait_time, &response); + // Check if the status is SL_STATUS_TIMEOUT, indicating a timeout has occurred + if (status == SL_STATUS_TIMEOUT) { + + // Declare a temporary packet pointer to hold the packet to be removed + sl_wifi_buffer_t *temp_packet; + + sl_status_t status = + sl_si91x_host_remove_node_from_queue(queue_type, &temp_packet, &context, si91x_packet_identification_function); + + // Check if the packet removal was successful + if (status == SL_STATUS_OK) { + + // Retrieve the actual packet node data from the removed buffer + sli_si91x_queue_packet_t *node = sl_si91x_host_get_buffer_data(temp_packet, 0, NULL); + + // Free the host packet memory associated with the node (TX packet memory) + sl_si91x_host_free_buffer(node->host_packet); + + // Free the temporary buffer memory that held the packet + sl_si91x_host_free_buffer(temp_packet); + } + } + VERIFY_STATUS_AND_RETURN(status); // Process the response packet and return the firmware status @@ -1847,6 +1886,14 @@ sl_status_t sl_si91x_set_device_region(sl_si91x_operation_mode_t operation_mode, } break; } + case CN: { + if (band == SL_SI91X_WIFI_BAND_2_4GHZ) { + request = default_CN_region_2_4GHZ_configurations; + } else { + request = default_CN_region_5GHZ_configurations; + } + break; + } default: return SL_STATUS_NOT_SUPPORTED; } diff --git a/components/device/silabs/si91x/wireless/threading/sli_si91x_multithreaded.c b/components/device/silabs/si91x/wireless/threading/sli_si91x_multithreaded.c index eb273b5d5..04838f4c9 100644 --- a/components/device/silabs/si91x/wireless/threading/sli_si91x_multithreaded.c +++ b/components/device/silabs/si91x/wireless/threading/sli_si91x_multithreaded.c @@ -55,6 +55,12 @@ #include "rsi_bt_common.h" #endif +#if defined(SLI_SI91X_OFFLOAD_NETWORK_STACK) && defined(SLI_SI91X_SOCKETS) +#include "sl_si91x_socket_constants.h" +#include "sl_si91x_socket_types.h" +#include "sl_si91x_socket_utility.h" +#endif + #define BUS_THREAD_EVENTS \ (SL_SI91X_ALL_TX_PENDING_COMMAND_EVENTS | SL_SI91X_SOCKET_DATA_TX_PENDING_EVENT | SL_SI91X_NCP_HOST_BUS_RX_EVENT) @@ -111,7 +117,7 @@ extern sl_status_t sl_create_generic_rx_packet_from_params(sli_si91x_queue_packe void sli_submit_rx_buffer(void); void si91x_bus_thread(const void *args); void sli_handle_dhcp_and_rejoin_failure(sli_si91x_queue_packet_t *node, - sl_wifi_buffer_t *temp_buffer, + sl_wifi_buffer_t *response_buffer, sl_si91x_command_trace_t *command_trace, uint16_t frame_status); void si91x_event_handler_thread(const void *args); @@ -171,13 +177,21 @@ sl_status_t sl_create_generic_rx_packet_from_params(sli_si91x_queue_packet_t **q } void sli_handle_dhcp_and_rejoin_failure(sli_si91x_queue_packet_t *node, - sl_wifi_buffer_t *temp_buffer, + sl_wifi_buffer_t *response_buffer, sl_si91x_command_trace_t *command_trace, uint16_t frame_status) { - sl_status_t status = SL_STATUS_OK; - uint32_t response_event = 0; - uint32_t response_queue = 0; + sl_status_t status = SL_STATUS_OK; + uint32_t response_event = 0; + uint32_t response_queue = 0; + sl_wifi_buffer_t *temp_buffer = NULL; + uint16_t length; + + sl_si91x_packet_t *packet = sl_si91x_host_get_buffer_data(response_buffer, 0, &length); + // Remote Wi-Fi client triggered disconnect + if (packet->command == RSI_WLAN_RSP_CLIENT_DISCONNECTED && (get_opermode() == SL_SI91X_CONCURRENT_MODE)) { + packet->desc[7] = SL_SI91X_WIFI_AP_VAP_ID; + } for (int queue_id = 0; queue_id < SI91X_BT_CMD; queue_id++) { if (command_trace[queue_id].command_in_flight != true) { @@ -210,10 +224,25 @@ void sli_handle_dhcp_and_rejoin_failure(sli_si91x_queue_packet_t *node, response_event = NCP_HOST_NETWORK_RESPONSE_EVENT; response_queue = SI91X_NETWORK_RESPONSE_QUEUE; } else if (queue_id == SI91X_SOCKET_CMD) { +#if defined(SLI_SI91X_OFFLOAD_NETWORK_STACK) && defined(SLI_SI91X_SOCKETS) + for (uint8_t index = 0; index < NUMBER_OF_SOCKETS; index++) { + si91x_socket_t *socket = get_si91x_socket(index); + // Send response to specific socket TX packet + if ((socket != NULL) && (socket->id == command_trace[queue_id].sl_si91x_socket_id)) { + if (socket->vap_id != packet->desc[7]) { + continue; + } + } + } +#endif response_event = NCP_HOST_SOCKET_RESPONSE_EVENT; response_queue = SI91X_SOCKET_RESPONSE_QUEUE; } + // Update the frame status in error response packet + sli_si91x_queue_packet_t *queue_packet = sl_si91x_host_get_buffer_data(temp_buffer, 0, NULL); + queue_packet->frame_status = frame_status; + sl_si91x_host_add_to_queue(response_queue, temp_buffer); sl_si91x_host_set_event(response_event); // TODO: additonal checks for async queue, async event } @@ -238,8 +267,7 @@ void sli_handle_dhcp_and_rejoin_failure(sli_si91x_queue_packet_t *node, } mqtt_remote_terminate_packet = sl_si91x_host_get_buffer_data(mqtt_remote_terminate_packet_buffer, 0, NULL); - - memset(mqtt_remote_terminate_packet->desc, 0, sizeof(mqtt_remote_terminate_packet->desc)); + memcpy(mqtt_remote_terminate_packet->desc, packet->desc, sizeof(packet->desc)); node->frame_status = frame_status; node->host_packet = mqtt_remote_terminate_packet_buffer; @@ -285,6 +313,11 @@ void si91x_event_handler_thread(const void *args) // Call event handler if (si91x_event_handler != NULL) { wifi_event = convert_si91x_event_to_sl_wifi_event(packet->command, frame_status); + + if (RSI_WLAN_RSP_SCAN_RESULTS == packet->command) { + sli_handle_wifi_beacon(packet); + } + if (wifi_event != SL_WIFI_INVALID_EVENT) { si91x_event_handler(wifi_event, buffer); } @@ -346,7 +379,6 @@ void si91x_bus_thread(const void *args) sli_si91x_queue_packet_t *error_node = NULL; sl_wifi_buffer_t *packet; sl_wifi_buffer_t *error_packet = NULL; - sl_wifi_buffer_t *temp_buffer = NULL; sl_wifi_buffer_t *buffer; uint8_t tx_queues_empty = 0; uint32_t event = 0; @@ -438,11 +470,12 @@ void si91x_bus_thread(const void *args) } #endif + sl_si91x_packet_t *response = (sl_si91x_packet_t *)data; SL_DEBUG_LOG("><<<< Rx -> queueId : %u, frameId : 0x%x, frameStatus: 0x%x, length : %u\n", queue_id, frame_type, frame_status, - length); + (response->length & (~(0xF000)))); switch (queue_id) { case RSI_WLAN_MGMT_Q: { @@ -599,12 +632,12 @@ void si91x_bus_thread(const void *args) // Check if the frame type indicates a failed join operation or a disconnect if (((RSI_WLAN_RSP_JOIN == frame_type) && (frame_status != SL_STATUS_OK)) - || (RSI_WLAN_RSP_DISCONNECT == frame_type)) { + || (RSI_WLAN_RSP_DISCONNECT == frame_type) || (RSI_WLAN_RSP_CLIENT_DISCONNECTED == frame_type)) { // Reset current performance profile and set it to high performance reset_coex_current_performance_profile(); current_performance_profile = HIGH_PERFORMANCE; // check for command in flight and create dummy packets for respective queues to be cleared - sli_handle_dhcp_and_rejoin_failure(node, temp_buffer, command_trace, frame_status); + sli_handle_dhcp_and_rejoin_failure(node, buffer, command_trace, frame_status); } // check if the frame type is valid @@ -929,7 +962,7 @@ void si91x_bus_thread(const void *args) reset_coex_current_performance_profile(); current_performance_profile = HIGH_PERFORMANCE; // check for command in flight and create dummy packets for respective queues to be cleared - sli_handle_dhcp_and_rejoin_failure(node, temp_buffer, command_trace, frame_status); + sli_handle_dhcp_and_rejoin_failure(node, buffer, command_trace, frame_status); SL_NET_EVENT_DISPATCH_HANDLER(node, (sl_si91x_packet_t *)data); } break; @@ -1379,6 +1412,11 @@ static sl_status_t bus_write_frame(sl_si91x_queue_type_t queue_type, } status = sl_si91x_host_remove_from_queue(queue_type, &buffer); + if (status != SL_STATUS_OK) { + if (current_performance_profile != HIGH_PERFORMANCE) { + sl_si91x_host_clear_sleep_indicator(); + } + } VERIFY_STATUS_AND_RETURN(status); node = sl_si91x_host_get_buffer_data(buffer, 0, NULL); diff --git a/components/protocol/wifi/inc/sl_wifi.h b/components/protocol/wifi/inc/sl_wifi.h index f63de5068..9dc333e7a 100644 --- a/components/protocol/wifi/inc/sl_wifi.h +++ b/components/protocol/wifi/inc/sl_wifi.h @@ -395,6 +395,7 @@ sl_status_t sl_wifi_get_listen_interval(sl_wifi_interface_t interface, sl_wifi_l * 5. For Worldwide region, the firmware uses the Worldwide table for Tx. For other regions (FCC/ETSI/TELEC/KCC), the firmware uses the min value out of the Worldwide & Region-based table for Tx. Also, there will be part to part variation across the chips. Offsets that are estimated during the flow of manufacture will be applied as correction factor during normal mode of operation. * 6. In a 2.4 GHz band, 40 MHz is not supported. * 7. Executing this API will overwrite calibration values in certified modules. + * 8. In FCC-certified modules, this API will trigger an error SL_STATUS_SI91X_FEATURE_NOT_AVAILABLE if used, except when in SL_SI91X_TRANSMIT_TEST_MODE mode. ******************************************************************************/ sl_status_t sl_wifi_update_gain_table(uint8_t band, uint8_t bandwidth, uint8_t *payload, uint16_t payload_len); @@ -439,12 +440,33 @@ sl_status_t sl_wifi_set_11ax_config(uint8_t guard_interval); * the time is for foreground scan. Otherwise, it is used for background scanning. * If the user needs to enable Passive Scanning, user should set the scan_type to SL_WIFI_SCAN_TYPE_PASSIVE. * If the user needs to enable Low Power (LP) mode in Passive Scan, user needs to enable lp_mode in sl_wifi_scan_configuration_t. + * Use the SL_WIFI_SCAN_TYPE_EXTENDED to obtain the scan results that exceed the SL_WIFI_MAX_SCANNED_AP. In this scan type, the number of scan results is not restricted; it is only limited by the amount of dynamic memory that the host can provide. * Default Passive Scan Channel time is 400 milliseconds. If the user needs to modify the time, sl_si91x_set_timeout can be called. + * In case of SL_WIFI_SCAN_TYPE_EXTENDED scan type, use @ref sl_wifi_get_stored_scan_results() API to get the scan results; after the scan status callback is received. ******************************************************************************/ sl_status_t sl_wifi_start_scan(sl_wifi_interface_t interface, const sl_wifi_ssid_t *optional_ssid, const sl_wifi_scan_configuration_t *configuration); +/***************************************************************************/ /** + * @brief + * Returns the stored scan results of a detailed scan in the user provided scan results array. + * @pre Pre-conditions: + * - + * @ref sl_wifi_init should be called before this API. + * @param[in] interface + * Wi-Fi interface as identified by @ref sl_wifi_interface_t + * @param[in out] extended_scan_parameters + * A pointer to a structure of type @ref sl_wifi_extended_scan_result_parameters_t, where the scan results will be stored. + * @return + * sl_status_t. See https://docs.silabs.com/gecko-platform/4.1/common/api/group-status for details. + * @note + * This API will only hold scan results if sl_wifi_start_scan is called with scan type as SL_WIFI_SCAN_TYPE_EXTENDED. + * These results are stored until another call to sl_wifi_start_scan is made with scan type as SL_WIFI_SCAN_TYPE_EXTENDED. + ******************************************************************************/ +sl_status_t sl_wifi_get_stored_scan_results(sl_wifi_interface_t interface, + sl_wifi_extended_scan_result_parameters_t *extended_scan_parameters); + /***************************************************************************/ /** * @brief * Stops an ongoing Wi-Fi scan operation on the specified interface, including background scanning. @@ -539,6 +561,11 @@ sl_status_t sl_wifi_wait_for_scan_results(sl_wifi_scan_result_t **scan_result_ar * Default Active Channel time is 100 milliseconds. If the user needs to modify the time, sl_wifi_set_advanced_scan_configuration can be called. * Default Authentication timeout and Association timeout is 300 milliseconds. If the user needs to modify the time, sl_wifi_set_advanced_client_configuration can be called. * Default Keep Alive timeout is 30 milliseconds. If the user needs to modify the time, sl_wifi_set_advanced_client_configuration can be called. + * @note + * In FCC certified module the behavior is as follows + * 1. Region configuration is not supported and if triggered will return error SL_STATUS_SI91X_FEATURE_NOT_AVAILABLE. + * 2. STA mode channels 1 to 11 are actively scanned and 12,13,14 are passively scanned. + * 3. Concurrent mode supports only 1 to 11 channels. ******************************************************************************/ sl_status_t sl_wifi_connect(sl_wifi_interface_t interface, const sl_wifi_client_configuration_t *access_point, @@ -861,6 +888,11 @@ sl_status_t sl_wifi_configure_multicast_filter(sl_wifi_multicast_filter_info_t * * For AP mode with WPA3 security, only SAE-H2E method is supported. SAE hunting and pecking method is not supported. * TKIP encryption mode is not supported. Encryption mode is automatically configured to RSI_CCMP. * PMKSA is not supported in WPA3 AP mode. + * @note + * In FCC-certified modules, + * 1. Region configuration is not supported and if triggered will return error SL_STATUS_SI91X_FEATURE_NOT_AVAILABLE. + * 2. AP supports only 1 to 11 channels. + * 3. AP will not advertise the Country IE. ******************************************************************************/ sl_status_t sl_wifi_start_ap(sl_wifi_interface_t interface, const sl_wifi_ap_configuration_t *configuration); diff --git a/components/protocol/wifi/inc/sl_wifi_constants.h b/components/protocol/wifi/inc/sl_wifi_constants.h index e890dd0c2..82331ed5c 100644 --- a/components/protocol/wifi/inc/sl_wifi_constants.h +++ b/components/protocol/wifi/inc/sl_wifi_constants.h @@ -14,7 +14,8 @@ /** \addtogroup SL_WIFI_CONSTANTS Constants * @{ */ -/// Maximum number of Access Points that can be scanned during a Wi-Fi scan operation. +/// Maximum number of Access Points are scanned in response to a normal scan request. +/// @note This is not a configurable value. #define SL_WIFI_MAX_SCANNED_AP 11 /// Maximum number of clients supported when module is running in Access Point mode. @@ -78,6 +79,7 @@ typedef enum { * @brief Enumeration for Wi-Fi encryption methods. * * @note Some encryption types are not currently supported in station (STA) mode. + * @note If encryption type is configured anything other than SL_WIFI_DEFAULT_ENCRYPTION, then make sure the AP (third party) supports the configured encryption type. If not, there might be a possibility of getting join failure due to the encryption type mismatch between AP (third party) and STA. */ typedef enum { SL_WIFI_DEFAULT_ENCRYPTION, ///< Default Wi-Fi encryption @@ -220,7 +222,9 @@ typedef enum { typedef enum { SL_WIFI_SCAN_TYPE_ACTIVE = 0x00, ///< Active scan: Transmit probe requests and listen for responses SL_WIFI_SCAN_TYPE_PASSIVE = - 0x01, ///< Passive scan: No active transmissions, listen for AP beacons and probe responses + 0x01, ///< Passive scan. No active transmissions, listen for AP beacons and probe responses + SL_WIFI_SCAN_TYPE_EXTENDED = + 0x02, ///< Extended Active scan. Transmit probe requests and listen for responses to get more than SL_WIFI_MAX_SCANNED_AP number of results SL_WIFI_SCAN_TYPE_PROHIBITED_CHANNELS = 0x04, ///< Scan channels prohibited by regulatory region SL_WIFI_SCAN_TYPE_ADV_SCAN = 0X08 ///< Advanced scan: Scan for Access Points while the module is in connected state } sl_wifi_scan_type_t; diff --git a/components/protocol/wifi/inc/sl_wifi_types.h b/components/protocol/wifi/inc/sl_wifi_types.h index 9875cfff5..e137cc4f8 100644 --- a/components/protocol/wifi/inc/sl_wifi_types.h +++ b/components/protocol/wifi/inc/sl_wifi_types.h @@ -92,13 +92,13 @@ * @param event * Wi-Fi event of type @ref sl_wifi_event_t. * @param buffer - * Pointer to a Wi-Fi buffer which containing information related to the event, of type @ref sl_wifi_buffer_t + * Pointer to a Wi-Fi buffer contains information related to the event, of type @ref sl_wifi_buffer_t * @return * sl_status_t. See [Status Codes](https://docs.silabs.com/gecko-platform/latest/platform-common/status) * and [Additional Status Codes](../wiseconnect-api-reference-guide-err-codes/sl-additional-status-errors) for details. * @note * In case of event failure, SL_WIFI_FAIL_EVENT_STATUS_INDICATION bit is set in the event. - * The data will be of type sl_status_t and data_length can be ignored. + * The data would be of type sl_status_t, and data_length can be ignored. */ typedef sl_status_t (*sl_wifi_event_handler_t)(sl_wifi_event_t event, sl_wifi_buffer_t *buffer); @@ -173,17 +173,39 @@ typedef struct { } scan_info[]; ///< Array of scan result data } sl_wifi_scan_result_t; +/// Extended Wi-Fi scan result +typedef struct { + uint8_t rf_channel; ///< Channel number of the AP + uint8_t security_mode; ///< Security mode of the AP + uint8_t rssi; ///< RSSI value of the AP + uint8_t network_type; ///< Network type of the AP + uint8_t ssid[34]; ///< SSID of the AP + uint8_t bssid[6]; ///< BSSID of the AP +} sl_wifi_extended_scan_result_t; + +/// Extended Wi-Fi scan result parameters +typedef struct { + sl_wifi_extended_scan_result_t + *scan_results; ///< Pointer to an array containing scan results of type @ref sl_wifi_extended_scan_result_t + uint16_t array_length; ///< Length of the scan results array provided by the user. + uint16_t *result_count; ///< Pointer to store the total count of scan results returned. + uint8_t *channel_filter; ///< Pointer to Channel number (Filter based on Channel number of the AP). + uint8_t *security_mode_filter; ///< Pointer to Security mode (Filter based on the Security mode of the AP). + uint8_t *rssi_filter; ///< Pointer to RSSI (Filter for APs with an RSSI greater than or equal to given RSSI value). + uint8_t *network_type_filter; ///< Pointer to Network type (Filter based on APs network type). +} sl_wifi_extended_scan_result_parameters_t; + /** * @struct sl_wifi_scan_configuration_t * @brief Wi-Fi scan configuration structure. * * Indicates the configuration parameters for a Wi-Fi scan operation. * - * @note The Quick Scan Feature is enabled if a specific channel and SSID to scan is given. + * @note The Quick Scan feature is enabled when a specific channel and SSID are given for scanning. * SiWx91x scans for the AP given in the scan API and posts the scan results immediately * after finding the access point. * @note The `channel_bitmap_2g4` uses the lower 14 bits to represent channels from 1 to 14, - * where channel 1 = (1 << 0), channel 2 = (1 << 1), etc. + * where channel 1 = (1 << 0), channel 2 = (1 << 1), and so on. * @note 5GHz is not supported. * * | Channel Number 2.4 GHz | channel_bitmap_2g4 | @@ -225,7 +247,7 @@ typedef struct { uint16_t passive_channel_time; ///< Time spent on each channel during passive scan (milliseconds) uint8_t enable_instant_scan; ///< Flag to start advanced scan immediately uint8_t - enable_multi_probe; ///< Flag to send multiple probes to AP. If set to 1, a probe request would be sent to all access points in addition to connected SSID. + enable_multi_probe; ///< Flag to send multiple probes to AP. If the value is set to 1, a probe request would be sent to all access points in addition to the connected SSID. } sl_wifi_advanced_scan_configuration_t; /** @@ -279,12 +301,13 @@ typedef struct { * @struct sl_wifi_channel_bitmap_t * @brief Channel bitmap for scanning in a set of selective channels. * - * @note A 2.4GHz channel is enabled by setting the bit of the corresponding channel number minus 1. - * For example, for channel 1, set bit 0; for channel 2, set bit 1, and so on. @ref sl_wifi_scan_configuration_t - * @note 5GHz chnannels are not supported. + * @note A 2.4 GHz channel is enabled by setting the bit of the corresponding channel number minus 1. + * For example, for channel 1, set bit 0; + for channel 2, set bit 1, and so on. @ref sl_wifi_scan_configuration_t + * @note 5 GHz chnannels are not supported. */ typedef struct { - uint16_t channel_bitmap_2_4; ///< Channel bitmap for scanning in a set of selective channels in 2.4 GHz + uint16_t channel_bitmap_2_4; ///< Channel bitmap for scanning in a set of selective channels in 2.4 GHz. uint32_t channel_bitmap_5; ///< Channel bitmap for scanning in a set of selective channels in 5 GHz. (Currently not supported.) } sl_wifi_channel_bitmap_t; @@ -477,10 +500,10 @@ typedef struct { typedef struct { uint8_t flow_id; ///< TWT session flow ID sl_wifi_reschedule_twt_action_t - twt_action; ///< Specifies the action to be taken for rescheduling the TWT session. This determines how and when the TWT session will be suspended or adjusted. Refer to @ref sl_wifi_reschedule_twt_action_t for the possible actions. + twt_action; ///< Specifies the action need to be taken for rescheduling the TWT session. This determines how and when the TWT session would be suspended or adjusted. See @ref sl_wifi_reschedule_twt_action_t for the possible actions. uint16_t reserved1; ///< Reserved uint8_t reserved2; ///< Reserved - uint64_t suspend_duration; ///< Duration to suspend the respective TWT session, in microseconds + uint64_t suspend_duration; ///< Duration to suspend the respective TWT session, in microseconds. } sl_wifi_reschedule_twt_config_t; /** @@ -527,7 +550,7 @@ typedef struct { uint8_t ideal_beacon_info[2]; ///< Idle beacon information uint8_t busy_beacon_info[2]; ///< Busy beacon information uint8_t beacon_interval - [2]; ///< Beacon Interval. Indicates the time interval between successive beacons, in time units (TUs). + [2]; ///< Beacon Interval. Indicates the time interval between successive beacons, in Time Units (TUs). } sl_wifi_operational_statistics_t; /** @@ -565,7 +588,7 @@ typedef struct { * @brief Wi-Fi Listen interval structure. * * Specifies the Wi-Fi Listen interval in milliseconds. - * The listen interval is the time interval between two consecutive target beacon transmission (TBTT) events. + * The listen interval is the time interval between two consecutive Target Beacon Transmission (TBTT) events. */ typedef struct { uint32_t listen_interval; ///< Wi-Fi Listen interval in millisecs @@ -575,10 +598,10 @@ typedef struct { * @struct sl_wifi_client_info_t * @brief Wi-Fi client information structure. * - * Indicates the MAC address and IP address information related to a Wi-Fi client connected to the network. + * Indicates the MAC and IP address information related to a Wi-Fi client connected to the network. */ typedef struct { - sl_mac_address_t mac_adddress; ///< MAC Address of the client + sl_mac_address_t mac_adddress; ///< MAC address of the client sl_ip_address_t ip_address; ///< IP address of client } sl_wifi_client_info_t; @@ -599,12 +622,12 @@ typedef struct { * * @note * The effective transmit power is subject to regional and device limitations. If the specified transmit power exceeds the - * maximum supported value for that region or if the specified transmit power exceeds the maximum supported value of the device, - * the transmission will occur at the maximum supported transmit power. + * maximum supported value for that region, or if the specified transmit power exceeds the maximum supported value of the device, + * the transmission would occur at the maximum supported transmit power. */ typedef struct { - uint8_t scan_tx_power; ///< Transmit power during scan. Valid input range: 1dBm to 31dBm - uint8_t join_tx_power; ///< Transmit power during join. Valid input range: 1dBm to 31dBm + uint8_t scan_tx_power; ///< Transmit power during scan. Valid input range: 1 dBm to 31 dBm + uint8_t join_tx_power; ///< Transmit power during join. Valid input range: 1 dBm to 31 dBm } sl_wifi_max_tx_power_t; /** @@ -613,7 +636,7 @@ typedef struct { */ typedef struct { sl_wifi_multicast_filter_command_t - command_type; ///< Command type for multicast filter operation. Specifies the action to be taken (e.g., add or remove a multicast filter). See @ref sl_wifi_multicast_filter_command_t for possible values + command_type; ///< Command type for multicast filter operation. Specifies the action to be taken (for example, add or remove a multicast filter). See @ref sl_wifi_multicast_filter_command_t for possible values. sl_mac_address_t mac_address; ///< MAC address to which the filter has to be applied. } sl_wifi_multicast_filter_info_t; @@ -639,14 +662,14 @@ typedef struct { /// Control flags bit description: /// | Bit position | ctrl_flags bit description | /// |--------------|------------------------------------------------------------------------------------------------------------------------------------------------| - /// | 0 | Shall be set for 4-address packet or unset for 3-address packet. addr4 is ignored if set to 0. | - /// | 1 | Shall be set for QoS packet. QoS control field shall not be present in the MAC header for non-QoS packet. priority is ignored if set to 0. | - /// | 2 | Shall be set to use the fixed data rate provided in the rate field. If set to 0, rate field is ignored and auto rate shall be used. | - /// | 3 | Shall be set to enable ToDS bit in Frame Control. Valid only for 3-addr packet (bit 0 is unset). | - /// | 4 | Shall be set to enable FromDS bit in Frame Control. Valid only for 3-addr packet (bit 0 is unset). | - /// | 5 | Shall be set if host requires TX data status report. Token is used for synchronization between data packets sent and reports received. | + /// | 0 | Should be set for 4-address packet or unset for 3-address packet. addr4 is ignored if set to 0. | + /// | 1 | Should be set for QoS packet. QoS control field shall not be present in the MAC header for non-QoS packet. priority is ignored if set to 0. | + /// | 2 | Should be set to use the fixed data rate provided in the rate field. If set to 0, rate field is ignored and auto rate shall be used. | + /// | 3 | Should be set to enable To DS bit in Frame Control. Valid only for 3-addr packet (bit 0 is unset). | + /// | 4 | Should be set to enable From DS bit in Frame Control. Valid only for 3-addr packet (bit 0 is unset). | + /// | 5 | Should be set if host requires TX data status report. Token is used for synchronization between data packets sent and reports received. | /// | 6:7 | Reserved. | - /// @note If addr1 is multicast/broadcast, ctrl_flags bit 1 is ignored and the frame is sent as a non-QoS frame, i.e. QoS control field shall not be present in the MAC header. + /// @note If addr1 is multicast/broadcast, ctrl_flags bit 1 is ignored, and the frame is sent as a non-QoS frame, that is, QoS control field should not be present in the MAC header. uint8_t ctrl_flags; uint8_t reserved1; ///< Reserved uint8_t reserved2; ///< Reserved @@ -655,7 +678,7 @@ typedef struct { sl_wifi_data_rate_t rate; ///< Rates shall be provided as per @ref sl_wifi_data_rate_t. Only 11b/g rates shall be supported uint32_t - token; ///< Used for synchronization between data packets sent and reports received. Application shall provide token/identifier per PPDU. MAC layer shall send the same token/identifier in status report along with the status of the transmitted packet + token; ///< Used for synchronization between data packets sent and reports received. Application shall provide token/identifier as per PPDU. MAC layer sends the same token/identifier in status report along with the status of the transmitted packet uint8_t addr1[6]; ///< Receiver MAC address uint8_t addr2[6]; ///< Transmitter MAC address uint8_t addr3[6]; ///< Destination MAC address @@ -670,9 +693,9 @@ typedef struct { */ typedef struct { uint8_t - cwmin; ///< Minimum contention window size. Value is calculated from 2^N - 1 where exponent shall be provided as the input. Valid values for exponent N are 0 - 15 + cwmin; ///< Minimum contention window size. Value is calculated from 2^N - 1 where exponent is provided as the input. Valid values for exponent N are 0 - 15 uint8_t - cwmax; ///< Maximum contention window size. Value is calculated from 2^N - 1 where exponent shall be provided as the input. Valid values for exponent N are 0 - 15 + cwmax; ///< Maximum contention window size. Value is calculated from 2^N - 1 where exponent is provided as the input. Valid values for exponent N are 0 - 15 uint8_t aifsn; ///< Arbitration Inter-Frame Space Number (AIFSN). Valid range is 0 to 15 uint8_t reserved; ///< Reserved } sl_wifi_transceiver_cw_config_t; @@ -685,7 +708,7 @@ typedef struct { */ typedef struct { uint8_t - set; ///< Shall be set to 1 to configure the transceiver config params in MAC layer. Shall be set to 0 to query the transceiver config params from MAC layer + set; ///< Set to 1 to configure the transceiver config params in MAC layer. Sets to 0 to query the transceiver config params from MAC layer uint8_t retransmit_count; ///< Retransmit count. Common across all peers and access categories and valid only for unicast data frames. Valid range is 1 to 15 uint16_t flags; ///< Reserved @@ -748,8 +771,8 @@ typedef struct { uint8_t flags; ///< Bit 0 is set to 1 to enable filtering for the specified MAC addresses, else set to 0 to disable filtering uint8_t - num_of_mcast_addr; ///< Number of multicast addresses. Valid values are 1, 2. This field is ignored when disabling filtering - uint8_t mac[2][6]; ///< List of multicast addresses. This field is ignored when disabling filtering + num_of_mcast_addr; ///< Number of multicast addresses. Valid values are 1, and 2. This field is ignored when filtering is disabled + uint8_t mac[2][6]; ///< List of multicast addresses. This field is ignored when filtering is disabled } sl_wifi_transceiver_mcast_filter_t; /** @@ -791,7 +814,7 @@ typedef struct { * @struct sl_wifi_transceiver_rx_data_t * @brief Structure for handling received Wi-Fi transceiver data. * - * Contains information about the received Wi-Fi transceiver data, including status, RSSI, data rate, length, and the actual data buffer. + * Contains information about the received Wi-Fi transceiver data, which includes status, RSSI, data rate, length, and the actual data buffer. */ typedef struct { /// Status code for the received RX packet. diff --git a/components/protocol/wifi/si91x/sl_wifi.c b/components/protocol/wifi/si91x/sl_wifi.c index 61a5e35eb..374786881 100644 --- a/components/protocol/wifi/si91x/sl_wifi.c +++ b/components/protocol/wifi/si91x/sl_wifi.c @@ -107,6 +107,7 @@ extern rsi_m4ta_desc_t crypto_desc[2]; #define PASSIVE_SCAN_ENABLE BIT(7) #define LP_CHAIN_ENABLE BIT(6) #define QUICK_SCAN_ENABLE 1 +#define SCAN_RESULTS_TO_HOST 2 #define MAX_2_4G_CHANNEL 14 /*========================================================================*/ @@ -417,6 +418,12 @@ sl_status_t sl_wifi_start_scan(sl_wifi_interface_t interface, advanced_scan_configuration.active_channel_time); VERIFY_STATUS_AND_RETURN(status); } + + if (SL_WIFI_SCAN_TYPE_EXTENDED == configuration->type) { + scan_request.scan_feature_bitmap |= SCAN_RESULTS_TO_HOST; + } + sli_wifi_flush_scan_results_database(); + status = sl_si91x_driver_send_command(RSI_WLAN_REQ_SCAN, SI91X_WLAN_CMD_QUEUE, &scan_request, @@ -449,6 +456,12 @@ sl_status_t sl_wifi_start_scan(sl_wifi_interface_t interface, return status; } +sl_status_t sl_wifi_get_stored_scan_results(sl_wifi_interface_t interface, + sl_wifi_extended_scan_result_parameters_t *extended_scan_parameters) +{ + return sli_wifi_get_stored_scan_results(interface, extended_scan_parameters); +} + sl_status_t sl_wifi_connect(sl_wifi_interface_t interface, const sl_wifi_client_configuration_t *ap, uint32_t timeout_ms) @@ -1535,6 +1548,7 @@ sl_status_t sl_wifi_deinit(void) reset_sl_wifi_rate(); memset(&advanced_scan_configuration, 0, sizeof(sl_wifi_advanced_scan_configuration_t)); status = sl_si91x_driver_deinit(); + sli_wifi_flush_scan_results_database(); SLI_NETWORK_CLEANUP_HANDLER(); diff --git a/components/service/bsd_socket/inc/socket.h b/components/service/bsd_socket/inc/socket.h index e2af81ee6..145f91602 100644 --- a/components/service/bsd_socket/inc/socket.h +++ b/components/service/bsd_socket/inc/socket.h @@ -129,6 +129,7 @@ typedef long off_t; #define SO_CERT_INDEX 0x1026 ///< Sets certificate index for SSL socket. #define SO_HIGH_PERFORMANCE_SOCKET 0x1027 ///< Enables high-performance socket. #define SO_TLS_SNI 0x1028 ///< Passes SNI extension for SSL socket. +#define SO_TLS_ALPN 0x1029 ///< Passes ALPN extension for SSL socket. /** @} */ // From Linux include/uapi/linux/tcp.h diff --git a/components/service/bsd_socket/si91x_socket/sl_si91x_bsd_socket.c b/components/service/bsd_socket/si91x_socket/sl_si91x_bsd_socket.c index 73a042507..d56b18053 100644 --- a/components/service/bsd_socket/si91x_socket/sl_si91x_bsd_socket.c +++ b/components/service/bsd_socket/si91x_socket/sl_si91x_bsd_socket.c @@ -697,10 +697,11 @@ int sl_si91x_set_custom_sync_sockopt(int socket_id, break; } - case SO_TLS_SNI: { - // Call a function to add a Server Name Indication (SNI) extension to si91x_socket - sl_status_t status = add_server_name_indication_extension(&si91x_socket->sni_extensions, - (const si91x_socket_type_length_value_t *)option_value); + case SO_TLS_SNI: + case SO_TLS_ALPN: { + // Call a function to add a TLS extension to si91x_socket + sl_status_t status = sli_si91x_add_tls_extension(&si91x_socket->tls_extensions, + (const sl_si91x_socket_type_length_value_t *)option_value); // Check if the operation was successful if (status != SL_STATUS_OK) { SET_ERROR_AND_RETURN(ENOMEM); diff --git a/components/service/bsd_socket/si91x_socket/sl_si91x_socket_support.h b/components/service/bsd_socket/si91x_socket/sl_si91x_socket_support.h index c39078885..59aa213c4 100644 --- a/components/service/bsd_socket/si91x_socket/sl_si91x_socket_support.h +++ b/components/service/bsd_socket/si91x_socket/sl_si91x_socket_support.h @@ -88,7 +88,7 @@ typedef struct { * @param[in] option_level * Level at which the option is defined. One of the values from @ref BSD_SOCKET_OPTION_LEVEL. * @param[in] option_name - * Name of the option to be set. Currently, ONLY @ref SO_CERT_INDEX, @ref SO_HIGH_PERFORMANCE_SOCKET, @ref SO_TLS_SNI are supported. + * Name of the option to be set. Currently, @ref SO_CERT_INDEX, @ref SO_HIGH_PERFORMANCE_SOCKET, @ref SO_TLS_SNI, and @ref SO_TLS_ALPN only are supported. * @param[in] option_value * Pointer to the value for the option. * @param[in] option_length diff --git a/components/service/http_client/inc/sl_http_client.h b/components/service/http_client/inc/sl_http_client.h index 21a6616f8..8c24b3a24 100644 --- a/components/service/http_client/inc/sl_http_client.h +++ b/components/service/http_client/inc/sl_http_client.h @@ -19,6 +19,7 @@ #include "sl_net_constants.h" #include "cmsis_os2.h" #include "sl_si91x_socket_types.h" +#include "sl_si91x_socket_utility.h" #include /****************************************************** @@ -250,7 +251,7 @@ typedef struct { uint8_t * resource; ///< Full URL string for the requested resource, including the scheme (for example, http, https), domain, port, path, query parameters, and fragment. The maximum supported HTTP URL is 2048 bytes when the SL_SI91X_FEAT_LONG_HTTP_URL bit is enabled in the feature_bit_map. If the SL_SI91X_FEAT_LONG_HTTP_URL bit is disabled, then the maximum supported length for the HTTP URL is (872 - (length of username + length of password) - length of hostname - length of IP address) bytes, excludes the delimiters. uint16_t port; ///< Port number of the HTTP server. - si91x_socket_type_length_value_t * + sl_si91x_socket_type_length_value_t * sni_extension; ///< SNI (Server Name Indication) extension to specify the hostname for servers hosting multiple domains on the same IP address of type [si91x_socket_type_length_value_t](../wiseconnect-api-reference-guide-sockets/si91x-socket-type-length-value-t). uint8_t *body; ///< HTTP body to be sent to the server. Setting this to NULL will process the request in chunked encoding. diff --git a/components/service/http_client/si91x_socket/sl_http_client.c b/components/service/http_client/si91x_socket/sl_http_client.c index 429911fa7..fc6fd82c9 100644 --- a/components/service/http_client/si91x_socket/sl_http_client.c +++ b/components/service/http_client/si91x_socket/sl_http_client.c @@ -102,7 +102,7 @@ static sl_status_t sli_si91x_send_http_client_request(sl_http_client_method_type static sl_status_t sli_si91x_http_client_abort(void); // Send SNI parameters for the embedded socket -static sl_status_t sli_si91x_set_sni_for_embedded_socket(const si91x_socket_type_length_value_t *sni_extension); +static sl_status_t sli_si91x_set_sni_for_embedded_socket(const sl_si91x_socket_type_length_value_t *sni_extension); /****************************************************** * Function Definitions @@ -399,12 +399,12 @@ sl_status_t sl_http_client_delete_all_headers(sl_http_client_request_t *request) return SL_STATUS_OK; } -static sl_status_t sli_si91x_set_sni_for_embedded_socket(const si91x_socket_type_length_value_t *sni_extension) +static sl_status_t sli_si91x_set_sni_for_embedded_socket(const sl_si91x_socket_type_length_value_t *sni_extension) { sl_status_t status = SL_STATUS_OK; uint32_t packet_length = 0; - if (sizeof(si91x_socket_type_length_value_t) + sni_extension->length > SI91X_MAX_SIZE_OF_EXTENSION_DATA) { + if (sizeof(sl_si91x_socket_type_length_value_t) + sni_extension->length > SI91X_MAX_SIZE_OF_EXTENSION_DATA) { return SL_STATUS_SI91X_MEMORY_ERROR; } @@ -415,7 +415,7 @@ static sl_status_t sli_si91x_set_sni_for_embedded_socket(const si91x_socket_type memset(request, 0, sizeof(si91x_sni_for_embedded_socket_request_t) + SI91X_MAX_SIZE_OF_EXTENSION_DATA); request->protocol = SI91X_SNI_FOR_HTTPS; - request->offset = sizeof(si91x_socket_type_length_value_t); + request->offset = sizeof(sl_si91x_socket_type_length_value_t); memcpy(&request->tls_extension_data, sni_extension, SI91X_MAX_SIZE_OF_EXTENSION_DATA); request->offset += sni_extension->length; packet_length = sizeof(si91x_sni_for_embedded_socket_request_t) + SI91X_MAX_SIZE_OF_EXTENSION_DATA; diff --git a/components/service/mqtt/si91x/sl_mqtt_client.c b/components/service/mqtt/si91x/sl_mqtt_client.c index 8f2c8e541..0983d2039 100644 --- a/components/service/mqtt/si91x/sl_mqtt_client.c +++ b/components/service/mqtt/si91x/sl_mqtt_client.c @@ -481,11 +481,15 @@ sl_status_t sl_mqtt_client_connect(sl_mqtt_client_t *client, if (status == SL_STATUS_IN_PROGRESS) { return status; } else if (status != SL_STATUS_OK) { + if (client->state == SL_MQTT_CLIENT_DISCONNECTED || status == SL_STATUS_SI91X_COMMAND_ISSUED_IN_REJOIN_STATE) { + SL_DEBUG_LOG("\r\nWLAN disconnected. No need to call the disconnect again.\r\n"); + return status; + } client->state = SL_MQTT_CLIENT_CONNECTION_FAILED; status = sl_mqtt_client_disconnect(client, SI91X_MQTT_CLIENT_DISCONNECT_TIMEOUT); if (status != SL_STATUS_OK) { SL_DEBUG_LOG( - "Failed to disconnect the client after failed connection attempt. User need to call disconnect explicitly"); + "Failed to disconnect the client after failed connection attempt. User needs to call disconnect explicitly."); } SL_CLEANUP_MALLOC(sdk_context); return status; @@ -839,6 +843,15 @@ sl_status_t sli_si91x_mqtt_event_handler(sl_status_t status, break; } + if (rx_packet->command == RSI_WLAN_RSP_JOIN) { + reason = SL_MQTT_CLIENT_WLAN_DISCONNECTION; + event_data = &reason; + sdk_context->client->state = SL_MQTT_CLIENT_DISCONNECTED; + // Free all subscriptions as we have disconnected from MQTT broker + sli_si91x_remove_and_free_all_subscriptions(sdk_context->client); + break; + } + is_error_event = true; // This state updates is necessary as we need to send NWP disconnect even in case of connection failure. sdk_context->client->state = SL_MQTT_CLIENT_CONNECTION_FAILED; @@ -847,7 +860,7 @@ sl_status_t sli_si91x_mqtt_event_handler(sl_status_t status, if (status != SL_STATUS_OK) { SL_DEBUG_LOG( - "Failed to disconnect the client after failed connection attempt. User need to call disconnect explicitly"); + "Failed to disconnect the client after failed connection attempt. User needs to call disconnect explicitly."); } else { sdk_context->client->state = SL_MQTT_CLIENT_DISCONNECTED; } diff --git a/connectivity_firmware/README.md b/connectivity_firmware/README.md index 898572148..f0df257b8 100644 --- a/connectivity_firmware/README.md +++ b/connectivity_firmware/README.md @@ -4,10 +4,10 @@ The **connectivity_firmware** folder contains 2 sub folders, namely **lite** and Top level directory layout of **connectivity_firmware**: - ├── lite # A sub folder containing a binary file named 'SiWG917-B.2.x.1.0.2.x.rps'. This firmware image supports SiWG917M110LGTBA IC OPN and it is valid only for SoC mode. - ├── standard # A sub folder containing a binary file named 'SiWG917-B.2.x.1.0.0.x.rps'. This firmware image supports all other IC OPNs and is valid for both NCP and SoC modes. + ├── lite # A sub folder containing a binary file named 'SiWG917-B.2.x.3.3.2.x.rps'. This firmware image supports SiWG917M110LGTBA IC OPN and it is valid only for SoC mode. + ├── standard # A sub folder containing a binary file named 'SiWG917-B.2.x.3.3.0.x.rps'. This firmware image supports all other IC OPNs and is valid for both NCP and SoC modes. ├── README.md # A file carrying basic details about the directory contents. > Note : > Please refer to release notes for the features supported by the Standard vs. Lite firmware images. - \ No newline at end of file + diff --git a/connectivity_firmware/lite/SiWG917-B.2.12.2.1.2.9.rps b/connectivity_firmware/lite/SiWG917-B.2.12.2.1.2.9.rps deleted file mode 100644 index 5ab662fab..000000000 Binary files a/connectivity_firmware/lite/SiWG917-B.2.12.2.1.2.9.rps and /dev/null differ diff --git a/connectivity_firmware/lite/SiWG917-B.2.12.3.3.2.3.rps b/connectivity_firmware/lite/SiWG917-B.2.12.3.3.2.3.rps new file mode 100644 index 000000000..03f5e7890 Binary files /dev/null and b/connectivity_firmware/lite/SiWG917-B.2.12.3.3.2.3.rps differ diff --git a/connectivity_firmware/standard/SiWG917-B.2.12.2.1.0.9.rps b/connectivity_firmware/standard/SiWG917-B.2.12.2.1.0.9.rps deleted file mode 100644 index bcdc4a092..000000000 Binary files a/connectivity_firmware/standard/SiWG917-B.2.12.2.1.0.9.rps and /dev/null differ diff --git a/connectivity_firmware/standard/SiWG917-B.2.12.3.3.0.3.rps b/connectivity_firmware/standard/SiWG917-B.2.12.3.3.0.3.rps new file mode 100644 index 000000000..c99ff0969 Binary files /dev/null and b/connectivity_firmware/standard/SiWG917-B.2.12.3.3.0.3.rps differ diff --git a/demos/brd2605a/out_of_box_demo.rps b/demos/brd2605a/out_of_box_demo.rps index 16382662e..95cb8068d 100644 Binary files a/demos/brd2605a/out_of_box_demo.rps and b/demos/brd2605a/out_of_box_demo.rps differ diff --git a/demos/brd2605a/siwx917_dev_kit.rps b/demos/brd2605a/siwx917_dev_kit.rps index a9043936f..e2b6e3952 100644 Binary files a/demos/brd2605a/siwx917_dev_kit.rps and b/demos/brd2605a/siwx917_dev_kit.rps differ diff --git a/demos/brd4338a/cli_demo_soc.rps b/demos/brd4338a/cli_demo_soc.rps index 7dd2c6403..30cc2c6b8 100644 Binary files a/demos/brd4338a/cli_demo_soc.rps and b/demos/brd4338a/cli_demo_soc.rps differ diff --git a/demos/brd4338a/out_of_box_demo.rps b/demos/brd4338a/out_of_box_demo.rps index 4ea476858..bd84e00c0 100644 Binary files a/demos/brd4338a/out_of_box_demo.rps and b/demos/brd4338a/out_of_box_demo.rps differ diff --git a/demos/brd4342a/out_of_box_demo.rps b/demos/brd4342a/out_of_box_demo.rps index 138fd3da8..7f23be095 100644 Binary files a/demos/brd4342a/out_of_box_demo.rps and b/demos/brd4342a/out_of_box_demo.rps differ diff --git a/demos/brd4343a/out_of_box_demo.rps b/demos/brd4343a/out_of_box_demo.rps new file mode 100644 index 000000000..dda40dda1 Binary files /dev/null and b/demos/brd4343a/out_of_box_demo.rps differ diff --git a/docs/release-notes/index_ncp.md b/docs/release-notes/index_ncp.md index a5272dbe1..7a7d5786f 100644 --- a/docs/release-notes/index_ncp.md +++ b/docs/release-notes/index_ncp.md @@ -1,3 +1,479 @@ +# **WiSeConnect3\_SDK\_3.3.3 NCP Release Notes**    + +## **Release Details** + +|**Item**|**Details**| +| :- | :- | +|Release date|10th October 2024| +|SDK Version|3\.3.3| +|Firmware Version|Standard: 1711.2.12.3.3.0.3| +|GSDK/SiSDK Version|SiSDK 2024.6.2 | +|Studio Version|5\.9.3.0| +|Release Package Name|WiSeConnect3\_SDK\_3.3.3| +|Operating Modes Supported|Wi-Fi STA, Wi-Fi AP, Wi-Fi STA+BLE, Wi-Fi STA+AP| + +- SiWx917 release consists of two components + - Standard Wireless Firmware -  SiWx917 Firmware Binary available as SiWG917-B.2.12.3.3.0.3.rps + - Wiseconnect3 Library - Wiseconnect3 SDK library runs on the external host in NCP mode. + +Note: + +- The release packages will have bug-fixes, enhancements, and new features in both 'SDK' and 'Firmware'. Customer shall update and use 'SDK' and 'Firmware' of same release package. SDK and FW combinations that are not released together are not supported. + +## **Supported Hardware OPNs** + +|**Hardware**|**OPN (Ordering Part Number)**| +| :- | :- | +|IC OPN|

QFN OPN: SiWN917M100LGTBA (Wi-Fi 6 NCP IC, QFN 7x7, 2.4 GHz, 4MB stacked flash, -40 to +85C​) 

Module OPN: SiWN917Y100LGNBx

| +|Expansion kits:|

SiWx917-EB4346A (based on Radio board SiWx917-4346A + 8045A Co-Processor Adapter board)

Module Board: SiW917Y-RB4357A (SiWN917Y Module Wi-Fi 6 and Bluetooth LE 4MB Flash RF-Pin Co-Processor Radio Board)

| + +## **Supported Features**  + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
SectionSub-SectionFeature
SystemOperating modesWi-Fi STA (802.11ax, 802.11n)
Wi-Fi 802.11n AP
Wi-Fi STA (802.11ax, 802.11n) + 802.11n AP
Wi-Fi STA (802.11ax, 802.11n) + BLE
Wi-Fi Transceiver (802.11 b/g)
Security Secure Boot, Secure Key storage and HW device identity with PUF, Secure Zone, Secure XIP (Execution in place) from flash, Secure Attestation, Anti Rollback, Debug Lock, Flash Protection
Secure firmware upgrade options

- Firmware loading through UART, SPI Interface

- Secure Over the Air (OTA) Upgrade

- Firmware update via Bootloader

Crypto Support

- Crypto API's for Hardware Accelerators: Advanced Encryption Standard (AES) 128/256/192, Secure Hash Algorithm (SHA) 256/384/512, Hash Message Authentication Code (HMAC), Random Number Generator (RNG), SHA3, AES-Galois Counter Mode (GCM)/ Cipher based Message Authentication Code (CMAC), ChaCha-poly, True Random Number Generator (TRNG)

- Software Accelerators: RSA, ECC

- Wrapping Secret keys (Symmetric crypto). 

- Added ECDSA Sign and Verify APIs

System Power Save

- Deep Sleep with RAM retention and without RAM retention. 

- Wireless Power Save: Connected Sleep (Wi-Fi Standby Associated), BLE Advertising with powersave, BLE Scan with powersave ,  BLE connection with powersave. Only Max PSP power save mode is supported in BLE. 

Wi-FiWi-Fi ProtocolsIEEE 802.11 b/g/n/ax (2.4GHz)
Access Point (AP) Mode

- 4 Client Support, Hidden SSID Mode, Auto Channel Selection, Scan in AP mode (Alpha)

- Wi-Fi Security 

- WPA2 Personal, WPA3 Personal (H2E method only) (Alpha), WPA Mixed mode (WPA/WPA2) 

Wi-Fi ScanSelective Scan, Active/Passive Scan
Wi-Fi STA (Security Modes)Open Mode, WPA2 Personal, WPA2 Enhancements, WPA3 Personal, Mixed Mode (WPA/WPA2), WPA3 Personal Transition Mode (WPA2/WPA3)
WPA2 Enterprise security (STA)Method: PEAP/TTLS/TLS 1.0/TLS 1.2/FAST/LEAP
Wi-Fi STA Rejoin
Wi-Fi STA Roaming BG Scan, OKC (Opportunistic Key caching), PMK (Pairwise Master Key) caching, Pre-Authentication
Wi-Fi Protocol Power Save Deep sleep (unconnected state), Max PSP, Enhanced Max PSP, Fast PSP, TWT
QoSWMM-QoS
Wi-Fi 6 FeatureMU-MIMO (DL), OFDMA (UL/DL), iTWT, TWT I-Frame & TWT Enhancements (Automatic TWT Configuration), BSS coloring, MBSSID
Wi-Fi Concurrency AP+STA (Same channel)
Wi-Fi Band/Channels2\.4GHz CH1-11, 2.4GHz CH1-13, 2.4GHz CH1-14
Known Security Vulnerabilities HandledWPA2 KRACK Attacks, Fragment and Forge Vulnerability
Network stackCore Networking Features

- IPv4/IPv6/UDP/TCP/ARP/ICMP/ICMPv6

- SSL client versions TLSV1.0, TLSV1.2, TLSV1.3 

- SSL server versions TLSV1.0 and TLSV1.2

- DHCPv4 Client,DHCPv6 Client

- DHCPv4 Server,DHCPv6 Server

- TCP/IP Bypass (LWIP as Hosted stack for reference)

Advanced Network Features- HTTP Client/HTTPS Client/DNS Client/SNTP Client, Embedded MQTT, MQTT on host, IGMP
Wi-Fi IoT Cloud Integration

- AWS IoT Core

- Azure IoT Core

BSD and IoT sockets application programming interface(API)
BLE Legacy features

- GAP(Advertising, Scanning, initiation, Connection and Bonding)

- Generic Attribute Protocol(GATT)

- Attribute protocol(ATT)

- Security

- LL Privacy 1.2

- Accept list

- Directed Advertising

- LE PHY(1Mbps, 2Mbps) & Coded PHY(125kbps, 500kbps)

- Simultaneous scanning on 1Mbps and Coded PHY

- LE dual role topology

- LE data packet length extensions(DLE)

- Asymmetric PHYs

- LE channel selection algorithm 2 (CSA#2)

- LE Secure connections

- Bluetooth 5.4 Qualified

Advertising Extensions 

- Extended Advertising

- Periodic Advertising

- Periodic Advertising scanning

- Extended Advertising scanning

- Periodic Advertising list

- LE periodic advertising synchronization

+ +### **Development Environment** + +- Simplicity Studio IDE (SV5.9.3.0 version) and Debugger Integration. Refer to the latest version of the NCP "Getting-Started-with-SiWx917" guide for more details +- Recommended to install and use Silicon labs Simplicity SDK (Previously known as Gecko SDK), Git hub based version 2024.6.2 +- Simplicity Commander to supports Flash loading, provision of MBR programming, security key management, and calibration support for crystal and gain offsets. refer "siwx917-ncp-manufacturing-utility-user-guide" for more details +- Advanced Energy Monitoring (AEM) to measure ultra-low power capability on Development boards (Radio board SiWx917-4346A + 8045A Co-Processor Adapter board) + +### **SDK** + +- Simplified and Unified DX for Wi-Fi API  +- Simplifies application development and presents clean and standardized APIs +- BSD and ARM IoT-compliant socket API +- Available through Simplicity Studio and GitHub + +### **Multi-protocol** + +- Wi-Fi STA + BLE + +### **PTA CoExistence** + +- 3 wire CoEx acting as Wi-Fi with external Bluetooth  +- 3 wire CoEx acting as Wi-Fi with external Zigbee/OT + +## **Changes in this release compared to v3.3.2 Release** + +### **System** + +- **Enhancements / New features** + - Added limited anti-rollback feature for firmware update +- **Fixed Issues** + - None +- **Documentation** + - **None** + +### **SDK** + +- **Enhancements / New features** + - Moved powersave\_standby\_associated example from featured  to featured/low\_power  section. + - Updated aws\_starfield\_ca.pem.h certificate.(includes Starfield G2 Root CA). + - Support for SL\_WIFI\_SCAN\_TYPE\_EXTENDED has been added to the sl\_wifi\_scan\_type\_t and sl\_wifi\_get\_stored\_scan\_results() API to enable retrieval of extended scan results. +- **Fixed Issues** + - Fixed sl\_mqtt\_client\_connect() API to handle WLAN disconnection during MQTT connection. + - Fixed SOFT\_AP\_PSK and SOFT\_AP\_SSID defines to have generic default PSK and SSID for AP in cli\_demo example. + - Fixed certificate loading errors when No Optimization  compiler option is enabled in example applications. + - Fixed handling of sl\_calib\_write command in wifi\_calibration example application. + - Fixed handling of Wi-Fi client disconnections in concurrent mode for socket connections. + - Fixed the issue where the DUT takes 2-4 minutes to reconnect with the AP and the Si-connect app shuts down in mid-iterations. + - Fixed power\_save\_deep\_sleep example failures when STANDBY\_POWER\_SAVE\_WITH\_RAM\_RETENTION is enabled +- **Documentation** + - Added usage note for SL\_WIFI\_MAX\_SCANNED\_AP. + - Updated the documentation for sl\_wifi\_start\_scan API to add more information about SL\_WIFI\_SCAN\_TYPE\_EXTENDED. + - Updated cli\_demo example readme with SOFT\_AP\_PSK and SOFT\_AP\_SSID defines. + +### **Wi-Fi/Network Stack** + +- **Enhancements / New features** + - Added support for ALPN extension for TLS protocol. + - Support added for SRRC region configuration. + - CRYPTO\_HARDWARE is now supported during rejoin process. + - Implemented region configuration restrictions for SiWN917Y modules. + - 11ax receive performance improvement with transmit ppm. + - Improved receive sensitivity performance in the presence of transmitter carrier frequency offset (CFO). +- **Fixed Issues** + - Fixed vulnerabilities in NetX (CVE-2023-48315 ,CVE-2023-48316 ,CVE-2023-48691 ,CVE-2023-48692 ) +- **Documentation** + - Documentation updated for SRRC and Region configurations control. + - Documentation updated for ALPN extension for the TLS protocol. + +### **BLE** + +- **Enhancements / New features** + - Limited the Transmit power to 4dBm for WORLDWIDE and SRRC regions, and removed the option for users to modify BLE Gain tables for the SiWN917Y modules +- **Fixed Issues** + - Removed the BLE packet transmission on channel-39 (2480MHz) at a 2Mbps data rate.  + - Fixed BLE HP chain RX issues across temperature on few parts through improvements in bootup calibration. + - Improved BLE transmit modulation parameters and harmonic emissions on the 8dBm transmission path. As a result, the active current of BLE transmit (8dBm path) can increase by around 1mA. + - Enhanced the packet reception performance in the BLE LP chain. + - Enhanced the BLE TX power in HP chain to align with the datasheet numbers. +- **Documentation** + - None + +### **Multi-protocol** + +- **Enhancements / New features** + - None +- **Fixed Issues** + - None +- **Documentation** + - None + +## **Recommendations** + +### **System** + +- Set the recommended Power Save Profile (PSP) type to Enhanced Max PSP +- Memory configuration for NCP mode is 672K\_M4SS\_0K +- Set the following recommended FreeRTOS configuration in FreeRTOSConfig.h + - configTIMER\_TASK\_PRIORITY to 55  + - configTOTAL\_HEAP\_SIZE to 51200 + - configUSE\_POSIX\_ERRNO to 1 + +### **Wi-Fi/Network Stack** + +- It is recommended to enable SL\_SI91X\_EXT\_TCP\_IP\_WAIT\_FOR\_SOCKET\_CLOSE BIT(16) of the 'Extended TCP IP Feature' bit map in the opermode command for all Wi-Fi Socket operations from the host to ensure graceful handling during asynchronous closures from the peer +- For high throughputs,  it is recommended to enable BIT(2) - SL\_SI91X\_FEAT\_AGGREGATION  of feature\_bit\_map in opermode.  +- Users can enable SL\_SI91X\_EXT\_TCP\_IP\_SSL\_16K\_RECORD in 'Extended TCP IP Feature' bit map in opermode for (HTTPS server) supporting 16k record +- **TWT** + - Recommendation is to use sl\_wifi\_target\_wake\_time\_auto\_selection() API for all TWT applications + - It is recommended to issue iTWT setup command once IP assignment, TCP connection, application specific socket connections are done + - When using sl\_wifi\_enable\_target\_wake\_time API, increase TCP / ARP Timeouts at the remote side depending upon the configured TWT interval configured. It's highly recommended to use sl\_wifi\_target\_wake\_time\_auto\_selection() as an alternative + - In case of TWT in CoEx mode, when using sl\_wifi\_enable\_target\_wake\_time API, use TWT wake duration <= 16 ms and TWT wake interval >= 1 sec. If wake duration > 16 ms or TWT wake interval < 1sec, there might be performance issues + - For iTWT GTK interval in AP should be configured to max possible value or zero. If GTK interval is not configurable on AP side, recommended TWT interval (in case of sl\_wifi\_enable\_target\_wake\_time API) or RX Latency (in case of sl\_wifi\_target\_wake\_time\_auto\_selection API) is less than 4sec + - When sl\_wifi\_enable\_target\_wake\_time API is used, configuring TWT Wake interval beyond 1 min might lead to disconnections from the AP. Recommended to use TWT wake interval of less than or equal to 1 min + - When using sl\_wifi\_enable\_target\_wake\_time API, it is recommended to set missed\_beacon\_count of sl\_wifi\_set\_advanced\_client\_configuration API greater than 2 times of the configured TWT Interval. + - DUT keepalive should be configured aligned with AP keepalive in TWT modes. +- Disable power save for high throughput applications or use FAST PSP power save mode as per application requirement +- The application needs to ensure that it sets RTC with the correct timestamp before establishing the SSL/EAP connection +- The minimum timeout value should not be less than 1 second for socket select and socket receive calls +- Please refer Keep alive intervals supported by MQTT broker and configure keep alive interval values accordingly +- The minimum keep alive interval  value recommended for embedded MQTT is 10 Seconds +- Disable power save and suspend any active TWT sessions before triggering HTTP OTAF +- Randomize the client port if using rapid connect/disconnect of the MQTT session on the same client port with the power save +- Recommended to configure VAP\_ID properly for Si91x STA and AP using sl\_si91x\_setsockopt\_async(), in case of data transfer. +- Recommended to use valid length(<= 202 bytes) for topic to be published while using Embedded MQTT, else it leads to return wrong error code(0x21). +- In concurrent mode with dual IP, it is advised to bring up STA first (IP configuration) and AP later +- It is recommended to configure Tx, Rx, Global buffer pool ratio in the buffer config command for all Wi-Fi Socket operations from the host +- It is recommended to use "TCP exponential backoff" configuration for congested channels +- It is recommended is to disable broadcast filter during TCP connection to avoid ARP resolution issues +- To avoid IOP issues, it is recommended to disable power save before Wi-Fi connection +- Enable BIT(10)  SL\_SI91X\_FEAT\_SSL\_HIGH\_STREAMING\_BIT in feature bitmap to increase TLS\_Rx throughputs. +- It is recommended to set region\_code as `IGNORE\_REGION` in boot configurations for ACx module boards except for PER mode. + +### **BLE** + +- In BLE, the recommended range of Connection Interval in + - Power Save (BLE Only) - 100 ms to 1.28 s +- In BLE, during Connection, the configuration of Scan Interval and Scan Window with the same value is not recommended. The suggested ratio of Scan Window to Scan Interval is 3:4 +- In BLE, if a device is acting as Central, the scan window (in set\_scan\_params and create\_connection commands) must be less than the existing Connection Interval. The suggested ratio of Scan Window to Connection Interval is 2:3 +- In BLE mode, if scanning and advertising are in progress on the SiWx91x module and it subsequently gets connected and moves to the central role, scanning stops else if it moves to the peripheral role, advertising stops. To further establish a connection to another peripheral device or to a central device, the application should give a command for starting advertising and scanning again + +### **Multi-protocol** + +- For concurrent Wi-Fi + BLE, and while a Wi-Fi connection is active, we recommend setting the ratio of the BLE scan window to BLE scan interval to 1:3 or 1:4 +- Wi-Fi + BLE Advertising + - All standard advertising intervals are supported. As Wi-Fi throughput is increased, a slight difference in on-air advertisements compared to configured intervals may be observed + - BLE advertising is skipped if the advertising interval collides with Wi-Fi activity +- Wi-Fi + BLE scanning + - All standard scan intervals are supported. For better scan results, we recommend setting the ratio of the BLE scan window to BLE scan interval to 1:3 or 1:4 + - BLE scanning will be stopped for intervals that collide with Wi-Fi activity +- Wi-Fi + BLE Central/Peripheral Connections + - All standard connection intervals are supported + - For a stable connection, use optimal connection intervals and max supervision timeout in the presence of Wi-Fi activity +- Wi-Fi + BLE Central/Peripheral Data Transfer + - To achieve higher throughput for both Wi-Fi and BLE, use medium connection intervals, such as 45 to 80 ms with maximum supervision timeout + - Ensure Wi-Fi activity consumes lower intervals + +## **Known Issues of WiSeConnect3\_SDK\_3.3.3 Release** + +### **System** + +- None + +### **SDK** + +- Observed Wi-Fi connection is successful even after deleting the stored network credentials using sl\_net\_delete\_credential and responding with SL\_NET\_INVALID\_CREDENTIAL\_TYPE for sl\_net\_get\_credential. +- Enhanced sl\_wifi\_get\_firmware\_version() API to provide more details (ROM ID, chip ID, security version, etc) which is not backward compatible with firmware older than 1711.2.10.1.0.0.4. Firmware binary notation does not include security version number +- Matter extension based applications are experiencing compatibility issues with WiseConnect SDK 3.2.0. It is recommended to use WiseConnect SDK 3.1.1 for matter-related applications. This will be addressed in up coming release(s) +- Asynchronous Azure MQTT is not supported, this will be addressed in up coming release(s) +- mDNS with IPV6 is not supported +- Power Save with TCP/IP is not supported for UART interface +- Recommended to configure VAP\_ID properly for Si91x STA and AP using sl\_si91x\_setsockopt\_async(), in case of data transfer +- Recommended to use valid length(<= 202 bytes) for topic to be published in the "Embedded MQTT" demo, else it leads to return wrong error code(0x21) +- Observed AWS\_DEVICE SHADOW LOGGING STATS is not working with Power Save enable +- Bus thread stack may need to increase if local variables are used in user callback to avoid stack overflow +- Low Power examples usage and documentation still under scope of improvement. +- In WPA3 transition security mode, observed sl\_wifi\_get\_wireless\_info() API is giving wrong security type and PSK in both client and AP mode +- Observed sl\_wifi\_get\_operational\_statistics() API is giving wrong opermode and wrong beacon details in AP mode +- Observed MQTT Rx is not able to resume after rejoin in wifi\_station\_ble\_provisioning\_aws demo +- In Power save, user needs to increase application stack size for the Wi-Fi - AWS Device Shadow demo +- Observed DUT unable to wake up from Wi-Fi powersave deep sleep in case of without RAM retention over NCP UART +- Observed issue with the firmware update over the TCP in dense environment +- Observed socket close is not working as expected for TLS socket when socket connect, send data and socket close are performing in a continuous loop +- firmware\_flashing\_from\_host\_uart\_xmodem example fails to communicate over UART +- Observed UDP sendto API failure in wifi\_concurrent\_http\_server\_provisioning\_ncp application +- Observed connection issue with 3rd party AP In concurrent mode using webpage +- Documentation not added for customized socket options +- Observed data not received simultaneously when two sockets call recv() from two different RTOS tasks. +- WMM-PS/UAPSD is not supported + +### **Wi-Fi/Network Stack** + +**Wi-Fi STA** + +- STA connection with the WPA3 using the Hunting and Pecking algorithm takes approximately 3-4 seconds. +- Connection failures have been observed with certain APs in environments with high channel congestion (~50-60% occupancy in an open lab). +- Region selection based on country IE in the beacon is not supported for ICs. +- Intermittent beacon reception from Access Point (beacon misses) occurs when channel congestion exceeds 85%. +- Uplink MU-MIMO is not supported +- When scanning with low power mode enabled, a sensitivity degradation of 3-6dB is observed, which may prevent APs at longer ranges from appearing in the scan results. +- For ICs, the region codes DEFAULT\_REGION and IGNORE\_REGION are not supported +- For modules, the region codes DEFAULT\_REGION and IGNORE\_REGION are not supported in PER mode. +- Observed ~2% increase in listen current and ~1% increase in standby associated current. +- Tx max powers for EVM limited data rates (like MCS7, MCS6, 54M, etc) will be reduced by 0.5dB. + +**Access Point (AP) Mode** + +- Fixed rate configuration in AP mode using sl\_wifi\_set\_transmit\_rate API is not being set as expected + +**WPA2 Enterprise security (STA)** + +- Observed issue with configuring certificate key and programming 4096 bit key and SHA384/SHA512 certificates +- Observing DUT is throwing 0x1001c when configuring .data.certificate\_key as "123456789" + +**Wi-Fi Concurrency ( AP + STA in same channel)** + +- Observed 3rd party STA association fail with 917 AP while 917 STA mode is connecting/reconnecting to configured 3rd party AP. Reconnect 3rd party STA to 917 AP in such scenarios +- In concurrent mode, if IP is configured for AP mode ahead of STA mode then IPv6 configuration may fail for STA mode +- In concurrent mode, data transfer using the Link-local address will always use the first IP interface created by the application. +- In concurrent mode, 917 AP cannot process de-authentication frames sent by third-party STA if 917 STA is connected to WPA2+WPA3 enabled AP. + +**OFDMA (UL/DL)** + +- Less throughput observed in DL-OFDMA with some APs that enabled Low density parity check coding + +**MU-MIMO (DL)** + +- For CoEx Scenario Wi-Fi + BLE, BLE Data transfer, MU retries (~50-60%) observed while running DL MU-MIMO test +- Observed Performance, Interop issues with MU MIMO with certain APs +- Less throughput was observed in MU-MIMO with some APs that enabled Low density parity check coding + +**MU-MIMO (UL)** + +- UL MU-MIMO is not supported + +**TWT** + +- When sl\_wifi\_enable\_target\_wake\_time() API is used, occasional MQTT disconnections may be observed if TWT is configured with longer TWT intervals (>30secs) with embedded MQTT + TWT.  As an alternative, it's highly recommended to use sl\_wifi\_target\_wake\_time\_auto\_selection() API, where these dependencies are internally handled. + +**Wi-Fi STA Rejoin** + +- observed Scanning (probe request) in all channels instead of the channels configured in selective channel(channel\_bitmap\_2g4) during rejoin process + +**IPv4/IPv6** + +- IP change notification is not indicated to the application +- In concurrent mode with dual IP, if the STA starts after AP is up, the STA IP configuration may fail for DHCP stateless mode +- concurrent\_firmware\_update\_from\_host\_uart example have stability issues during rejoin or disconnection process +- In concurrent mode, data transfer using the Link-local address will always use the first IP interface created by the application + +**BSD Socket API** + +- Every server socket created consumes a socket (maximum of 10 sockets supported) and every subsequent connection to server socket consumes an additional socket (from the same pool of 10 sockets), which limits the number of server connections supported +- Observing issues with TCP retries when power save mode is enabled, especially when the module is in idle state +- TCP maximum retry value is valid upto 31 + +**SSL Client/Server** + +- Sometimes during SSL Handshake, ECC curve parameters generated are wrong, resulting in connection failure with BBD2 error. However, this recovers in the next attempt +- Secure SSL renegotiation not supported in Embedded Networking Stack + +**HTTP Client/ HTTPS Client** + +- Observed occasional HTTPS continuous download failures when power save is enabled. Recommended to disable it before performing HTTPS continuous downloads + +**SNTP** + +- Unable to get SNTP async events when CoEx mode and power save are enabled  + +**Throughputs & Performance** + +- Observed 20% less Wi-Fi throughput with SDK 3.x compare to target throughput (depends on host and host interface), SDK refinements are in progress + +**Secure Over the Air (OTA) Upgrade** + +- Observed firmware upgrade failures after multiple iterations +- Observed OTA failures with power save enabled, So recommended to disable power save during OTA + +**Wi-Fi IOT Cloud integration** + +- **AWS IOT Core** + - Observed AWS MQTT keepalive transmission is not happening at expected intervals with power save enabled. + - Observing LAST\_WILL\_MESSAGE is random at every MQTT connection rather than the configured Message/Length +- **AZURE IOT Core** + - Observed DUT after sending the data, its not sending the MQTT keep alive packet due to this Azure HUB closing the connection when power save is enabled + +**Wi-Fi Interoperability (IOP)** + +- Observed disconnections with Amplifi (AFI-INS-R) AP with Powersave enable +- TWT session is failing due to disconnections observed in DUT if rx\_latency  is set to 55 seconds and receive data is also set to 55 seconds on MI Xiaomi RA72 and Tplink AX53 AP's +- Observed less throughput(~1Mb) while running TCP RX with Max\_PSP powersave with DLink 810 AP +- Observed interop issue (random disconnections) with few APs (EERO 6+, EERO PRO 6E, Cisco Catalyst 9120AXID) +- Disconnections observed with Netgear RAX120 AP in WPA3 security + +### **BLE** + +**GAP** + +- SPI interrupt miss issue was observed that prevents the host from receiving packets delivered by the TA, when there is continuous BLE TX/RX data transfer using the ble\_multiconnection\_gatt\_test application +- The DUT is unable to move to active state after BLE link loss using SiWN917Y100LGNB4 OPN + +**AE**  + +- Observed DUT hang issue while running TX notifications in peripheral role. + +**Performance** + +- The DUT hangs when the SRRC region is set in the ICs. However, this issue does not occur with the SiWN917Y module. + +### **Multi-protocol** + +- For CoEx Scenario Wi-Fi + BLE, BLE Data transfer, MU retries (~50-60%) observed while running DL MU-MIMO test +- Observed Wi-Fi + BLE intermittent connection failures, disconnections, and data transfer stalls in the long run when power save is enabled +- While executing Wi-Fi Commissioning using the wifi\_station\_ble\_provisioning example, BLE is disconnecting is observed with few boards +- Observed "DUT is not disconnecting to the AP when initiating disconnection from EFR connect app screen using wifi\_station\_ble\_provisioning\_aws example +- Observed DUT failed to load certificate with error "0x10026" (SL\_STATUS\_SI91X\_WRONG\_PARAMETERS) while running wifi\_https\_ble\_dual\_role\_v6 application +- Observed BLE bonding failure during continuous HTTPS download +- Observed BLE and WLAN connection failure with SMP, when WLAN connect and HTTPS GET called in a loop +- Observed BLE disconnection during wifi commissioning with few android mobiles +- Observed data stall on the remote machine during TCP/UDP transmission with power save enabled in  wifi\_throughput\_ble\_dual\_role\_ncp example +- Observed data stalls on remote server during Continuous TCP TX in wifi\_throughput\_ble\_dual\_role\_ncp example. +- For wifi\_ble\_powersave\_coex application, with 352K memory, observed 0xff2c - Memory limit exceeded in the given operating mode error. +- Observed throughput is not displaying for every interval of 'TEST\_TIMEOUT' when CONTINUOUS\_THROUGHPUT enabled for wifi\_station\_ble\_throughput\_app example. + +### **Simplicity Studio and Commander (For EFR Host)** + +- All projects in the package are compatible with **GNU ARM V12.2.1** toolchain +- Universal Configurator (UC) for EFR32xG Products in NCP Mode is not supported + +## **Limitations and Unsupported Features** + +### **System** + +- None + +### **SDK** + +- Baremetal mode is not supported +- WiSeConnect3\_SDK\_3.1.3 and later versions are not compatible with firmware versions prior to 1711.2.10.1.2.0.4, due to enhancements in max transmit power configuration during Wi-Fi join/connection, need to be cautious while doing OTA firmware upgrade +- Lite Wireless firmware image is not supported for NCP mode. +- Zephyr is not supported + +### **Wi-Fi/Network Stack** + +- TLS 1.3 Server is not supported +- 40 MHz bandwidth for 2.4 GHz band is not supported. +- A maximum of 3 SSL connections are supported in Wi-Fi alone and CoEx modes. No.of  SSL Sockets in Wi-Fi + BLE based on RAM memory configuration selected.  +- In SSL ECC Curve ID supported is 23. SSL handshake with 3rd party clients depends on the SSL ECC Curve ID. +- The number of Non-Transmitting BSSIDs processed is limited by the beacon length that can be processed by the stack (which is 1024 bytes). Beacons greater than 1024 Bytes in length will not be processed. +- UL-MU-MIMO is not supported. +- WPA3 AP supports only H2E algorithm. +- PMKSA caching is not supported in WPA3 AP mode. +- Maximum embedded MQTT Publish payload is 1 kByte. +- Timeout value for socket select and socket receive calls of less than 1 second is not currently supported. +- SA query procedure not supported in 11W AP mode. +- WPA3 AP transition mode is not supported. +- AP standalone mode does not support Tx aggregation. Rx aggregation is supported with limited number of BA sessions. +- In concurrent AP mode, aggregation (Tx/Rx) is not supported. +- Embedded HTTP Server is not supported. +- mDNS with IPV6 is not supported. +- Low power scan supports 1 Mbps packets reception only. +- Auto PAC Provisioning in EAP-FAST with TLSv1.2 is not supported. +- bTWT , Intra PPDU Power save, Spatial Re-Use, BSS coloring features not supported +- HTTPS server is not supported. +- In Wi-Fi Transceiver mode, MAC level encryption/decryption is not supported.  + +### **BLE** + +- For BLE, if the connection is established with a small connection interval (less than 15 ms), simultaneous roles (i.e., Central + Scanning and Peripheral + Advertising) are not supported +- BLE maximum two concurrent connections are supported, which can be either a connection to two peripheral devices, to one central and one peripheral device or two central devices +- BLE Slave latency value is valid up to 32 only +- BLE TX/RX throughput is less when tested with EFM as compared to EFR +- Maximum supported AE data length is 200 bytes +- Supports only two ADV\_EXT sets +- Supports only two BLE connections (1 Central and 1 Peripheral) with AE +- Advertising Extension feature is not supported in Coexistence +- Isochronous channels feature is not supported +- Connection subrating feature is not supported +- LE power controller feature is not supported +- EATT feature is not supported +- Periodic Advertising with response(PAwR) feature is not supported +- BLE Audio is not supported +- The feature of dynamically changing the TX power when extended advertising is active is not supported +- EFR Connect mobile application doesn't have support to differentiate the BLE configurators based on the Bluetooth Device address +- The maximum BLE power has been reduced by 2dB compared to the Datasheet Number, which will be addressed in the upcoming 3.3.1 patch release +- ICs do not support DEFAULT\_REGION and IGNORE\_REGION region codes. +- Modules do not support DEFAULT\_REGION and IGNORE\_REGION region codes in PER mode. + +### **Multi-protocol** + +- Wi-Fi AP + BLE currently not supported. + +> **Note:**  +> +> The following BLE Synchronous API's will be deprecated soon and the equivalent Asynchronous API's will be used instead in all BLE applications : +> +> |**S.No**|**BLE Synchronous API's** |**BLE Asynchronous API's** | +> | :- | :- | :- | +> |1|rsi\_ble\_get\_profiles|rsi\_ble\_get\_profiles\_async| +> |2|rsi\_ble\_get\_profile|rsi\_ble\_get\_profile\_async| +> |3|rsi\_ble\_get\_char\_services|rsi\_ble\_get\_char\_services\_async| +> |4|rsi\_ble\_get\_inc\_services|rsi\_ble\_get\_inc\_services\_async| +> |5|rsi\_ble\_get\_char\_value\_by\_uuid|rsi\_ble\_get\_char\_value\_by\_uuid\_async| +> |6|rsi\_ble\_get\_att\_descriptors|rsi\_ble\_get\_att\_descriptors\_async| +> |7|rsi\_ble\_get\_att\_value|rsi\_ble\_get\_att\_value\_async| +> |8|rsi\_ble\_get\_multiple\_att\_values|rsi\_ble\_get\_multiple\_att\_values\_async| +> |9|rsi\_ble\_get\_long\_att\_value|rsi\_ble\_get\_long\_att\_value\_async| +> |10|rsi\_ble\_set\_att\_value|rsi\_ble\_set\_att\_value\_async| +> |11|rsi\_ble\_set\_long\_att\_value|NA| +> |12|rsi\_ble\_prepare\_write|rsi\_ble\_prepare\_write\_async| +> |13|rsi\_ble\_execute\_write|rsi\_ble\_execute\_write\_async| +> |14|rsi\_ble\_indicate\_value\_sync|rsi\_ble\_indicate\_value| + +
+ # **WiSeConnect3\_SDK\_3.3.2 NCP Release Notes**    ## **Release Details** diff --git a/docs/release-notes/index_soc.md b/docs/release-notes/index_soc.md index f197741ce..34f8212e3 100644 --- a/docs/release-notes/index_soc.md +++ b/docs/release-notes/index_soc.md @@ -1,3 +1,701 @@ +# **WiSeConnect3\_SDK\_3.3.3 SoC Release Notes** + +## **Release Details** + +|**Item**|**Details**| +| :- | :- | +|Release date|10th October 2024| +|SDK Version|3\.3.3| +|Firmware Version|

Standard: 1711.2.12.3.3.0.3

Lite Wireless: 1711.2.12.3.3.2.3

| +|GSDK/SiSDK Version|SiSDK 2024.6.2 | +|Studio Version|5\.9.3.0| +|Release Package Name|WiSeConnect3\_SDK\_3.3.3| +|Supported RTOS|FreeRTOS| +|Operating Modes Supported|Wi-Fi STA, Wi-Fi AP, Wi-Fi STA+BLE, Wi-Fi STA+AP| + +- SiWx917 release consists of two components: + - SiWx91x Connectivity Firmware: + - Standard Wireless Firmware - SiWx917 Firmware Binary available as SiWG917-B.2.12.3.3.0.3.rps + - Lite Wireless Firmware - SiWx917 Firmware Binary is available as SiWG917-B.2.12.3.3.2.3.rps, this image is with reduced features for parts with SiWG917M110LGTBA OPN.  + - Wiseconnect3 Library - Wiseconnect3 SDK library runs on internal Cortex M4 + +**Note:** + +- Mandatory to upgrade the earlier version of boards (Si917-6031A Pro kit or BRD4338A boards) or 917 Silicon ICs with instructions as outlined in this document "SiWG917–TA\_Flash\_Memory\_Map\_ChangeGuide\_v1.3.pdf" for more details.   +- The release packages will have bug-fixes, enhancements, and new features in both 'SDK' and 'Firmware'. Customer shall update and use 'SDK' and 'Firmware' of same release package. SDK and FW combinations that are not released together are not supported. +- It is recommended to update TA image first followed by M4 image and ensure application compatibility with firmware before OTA +- To use the Dev kit Demo, users need to have Simplicity Connect version 2.9.3 or higher. + +## **Supported Hardware** + +|**Hardware**|**OPN (Ordering Part Number)**| +| :- | :- | +|IC OPN|

QFN OPNs: SiWG917M111MGTBA, SiWG917M100MGTBA, SIWG917M110LGTBA(Lite Wireless Firmware), SiWG917M111XGTBA, SiWG917M121XGTBA, SiWG917M141XGTBA

Module OPNs: SIWG917Y111MGNBA , SIWG917Y110LGNBA, SIWG917Y111XGNBA, SIWG917Y121MGNBA, SIWG917Y111MGABA, SIWG917Y110LGABA, SIWG917Y111XGABA, SIWG917Y121MGABA

| +|Development Kits|

Pro Kit: SiWx917-PK6031A, Si917-PK6031A. 

(Pro Kit includes Mother board "Si-MB4002A" + Radio board)

Radio boards: SiWx917-RB4338A, SiWx91x-RB4342A, SiWx917-DK2605A

Module boards: SiW917Y-RB4343A

| + +## **Supported Features**  + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
SectionSub-SectionFeature

Lite Wireless Firmware

(4MB flash OPN
OPN No: SiWG917M110LGTBA)

Standard Wireless Firmware (For other OPNs)
SystemOperating modesWi-Fi STA (802.11ax, 802.11n)SupportedSupported
Wi-Fi 802.11n APNot SupportedSupported
Wi-Fi STA (802.11ax, 802.11n) + 802.11n APNot SupportedSupported
Wi-Fi STA (802.11ax, 802.11n) + BLESupportedSupported
Security Secure Boot, Secure Key storage and HW device identity with PUF, Secure Zone, Secure XIP (Execution in place) from flash, Secure Attestation, Anti Rollback, Debug Lock, Flash ProtectionSupportedSupported
Secure firmware upgrade options

- Firmware loading support by Commander Tool through Jlink Debugger. Jlink connected to Serial Wire Debug (SWD) 

- Firmware loading via ISP using UART (Commander or Serial terminal), SPI Interface

- Secure Over the Air (OTA) Upgrade

- Firmware update via Bootloader

SupportedSupported
Crypto Support

- Crypto API's for Hardware Accelerators: Advanced Encryption Standard (AES) 128/256/192, Secure Hash Algorithm (SHA) 256/384/512, Hash Message Authentication Code (HMAC), Random Number Generator (RNG), SHA3, AES-Galois Counter Mode (GCM)/ Cipher based Message Authentication Code (CMAC), ChaCha-poly, True Random Number Generator (TRNG)

- Software Accelerators: RSA, ECC

- PSA Crypto APIs support for all crypto operations.

- Wrapping Secret keys (Symmetric crypto). 

- Added ECDSA Sign and Verify APIs

SupportedSupported
System Power Save

- Deep Sleep with RAM retention and without RAM retention. 

- Wireless Power Save: Connected Sleep (Wi-Fi Standby Associated), BLE Advertising with powersave, BLE Scan with powersave,  BLE connection with powersave. Only Max PSP power save mode is supported in BLE. 

SupportedSupported
Wi-FiWi-Fi ProtocolsIEEE 802.11 b/g/n/ax (2.4GHz)SupportedSupported
Access Point (AP) Mode

- 4 Client Support, Hidden SSID Mode, Auto Channel Selection, Scan in AP mode (Alpha)

- Wi-Fi Security 

- WPA2 Personal, WPA3 Personal (H2E method only) (Alpha), WPA Mixed mode (WPA/WPA2) 

Not SupportedSupported
Wi-Fi ScanSelective Scan, Active/Passive ScanSupportedSupported
Wi-Fi STA (Security Modes)Open Mode, WPA2 Personal, WPA2 Enhancements, WPA3 Personal, Mixed Mode (WPA/WPA2), WPA3 Personal Transition Mode (WPA2/WPA3)SupportedSupported
WPA2 Enterprise security (STA)Method: PEAP/TTLS/TLS 1.0/TLS 1.2/FAST/LEAPNot SupportedSupported
Wi-Fi STA RejoinSupportedSupported
Wi-Fi STA Roaming BG Scan, OKC (Opportunistic Key caching), PMK (Pairwise Master Key) caching, Pre-AuthenticationSupportedSupported
Wi-Fi Protocol Power Save Deep sleep (unconnected state), Max PSP, Enhanced Max PSP, Fast PSP, TWTSupportedSupported
QoSWMM-QoSSupportedSupported
Wi-Fi 6 FeatureMU-MIMO (DL), OFDMA (UL/DL), iTWT, TWT I-Frame & TWT Enhancements (Automatic TWT Configuration), BSS coloring, MBSSIDSupportedSupported
Wi-Fi Concurrency AP+STA (Same channel)Not SupportedSupported
Wi-Fi Band/Channels2\.4GHz CH1-11, 2.4GHz CH1-13, 2.4GHz CH1-14SupportedSupported
Known Security Vulnerabilities HandledWPA2 KRACK Attacks, Fragment and Forge VulnerabilitySupportedSupported
Network stackCore Networking Features

- IPv4/IPv6/UDP/TCP/ARP/ICMP/ICMPv6

- SSL client versions TLSV1.0, TLSV1.2, TLSV1.3 

- SSL server versions TLSV1.0 and TLSV1.2

- DHCPv4/DHCPv6 Client

- TCP/IP Bypass (LWIP as Hosted stack for reference)

SupportedSupported
- DHCPv4 Server, DHCPv6 ServerNot SupportedSupported
Advanced Network FeaturesHTTP Client/HTTPS Client/DNS Client, Embedded MQTT/MQTT on host (AWS and AZURE) SupportedSupported
SNTP Client, IGMPNot SupportedSupported
Wi-Fi IoT Cloud Integration

- AWS IOT Core

- Azure IoT

SupportedSupported
BSD and IoT sockets application programming interface(API)SupportedSupported
BLE Legacy features

- GAP(Advertising, Scanning, initiation, Connection and Bonding)

- Generic Attribute Protocol(GATT)

- Attribute protocol(ATT)

- Security

- LL Privacy 1.2

- Accept list

- Directed Advertising

- LE PHY(1Mbps, 2Mbps) & Coded PHY(125kbps, 500kbps)

- Simultaneous scanning on 1Mbps and Coded PHY

- LE dual role topology

- LE data packet length extensions(DLE)

- Asymmetric PHYs

- LE channel selection algorithm 2 (CSA#2)

- LE Secure connections

SupportedSupported
Advertising Extensions 

- Extended Advertising

- Periodic Advertising

- Periodic Advertising scanning

- Extended Advertising scanning

- Periodic Advertising list

- LE periodic advertising synchronization

Not Supported Supported
+ +### **MCU** + +- **Memory** + - Common Flash: Single shared Flash for both Cortex-M4 and NWP (Wireless Processor) + - Common Flash + External PSRAM + - Stacked PSRAM + External Common Flash +- **Power States** + - Active: PS4, PS3, PS2, and PS1  + - Standby: PS4, PS3, and PS2 + - Sleep: PS4, PS3 and PS2 + - Deep Sleep (Shutdown): PS0 +- **Peripherals, Services and Hardware Drivers**  + +|**HP Peripherals**|**List**|**Notes**| +| :- | :- | :- | +| |

- ADC

- Analog Comparator

- Config Timer (CT)

- CRC

- DAC

- eFuse

- EGPIO

- GPDMA1

- GSPI

- I2C

- I2S

- MCPWM

- PSRAM

- RNG1

- SDIO Secondary

- SSI (Primary & Secondary)

- Temperature Sensor

- UART

- uDMA

- USART

|| +| |

- BoD1

- CTS (Touch Sensor)1

- OPAMP1

- QSPI1

- QEI1

|Limited Support| +|**ULP Peripherals**||| +| |

- ULP\_ADC

- ULP\_DAC

- ULP\_GPIO

- ULP\_I2C

- ULP\_I2S

- ULP\_TIMER

- ULP\_UDMA

- ULP\_UART

- ULP\_SSI\_PRIMARY

|| +|**UULP Peripherals**||| +| |

- RTC (Calendar)

- SYSRTC

- WDT

|| +|**Services**| || +| |Sleep Timer|| +| |IOSTREAM|| +| |NVM3|| +| |LittleFS (for Dual Flash)|Limited Support| +| |Power Manager|| +| |Sensor Hub|Limited Support| +| |Pin Tool|Limited Support| +|**Hardware Drivers**| || +| |LED, Button, MEMLCD, Joystick, Sensors (RHT, VEML, ICM)|| + +|The peripherals marked with superscript1 are available through RSI APIs.  Support for SL APIs for user facing peripherals will be available in future releases.| +| :- | + +|The flash write feature has been enhanced to support the NWP area, providing a 20k allocation within the NWP flash memory for storing user data. Moreover, a Read API has been introduced to retrieve data from the NWP flash region.| +| :- | + +### **Developer Environment** + +- Simplicity Studio IDE (SV5.9.3.0 version) and Debugger Integration. Refer to the latest version of the SoC "Getting-Started-with-SiWx917" guide for more details.  +- Recommended to install and use Silicon labs Simplicity SDK (Previously known as Gecko SDK), Git hub based version 2024.6.2. +- Simplicity Commander to supports Flash loading, provision of MBR programming, security key management, and calibration support for crystal and gain offsets. refer "siwx917-soc-manufacturing-utility-user-guide" for more details.  +- Advanced Energy Monitoring (AEM) to measure ultra-low power capability on Development boards (Pro Kit). +- PinTool for MCU pin configurations + +### **BLE**  + +- GAP(Advertising, Scanning, initiation, Connection and Bonding) +- Generic Attribute Protocol(GATT) +- Attribute protocol(ATT) +- Security +- LL Privacy 1.2 +- Accept list +- Directed Advertising +- Extended Advertising +- Periodic Advertising +- Periodic Advertising scanning +- Extended Advertising scanning +- Periodic Advertising list +- LE periodic advertising synchronization +- LE PHY(1Mbps, 2Mbps) & Coded PHY(125kbps, 500kbps) +- Simultaneous scanning on 1Mbps and Coded PHY +- LE dual role topology +- LE data packet length extensions(DLE) +- Asymmetric PHYs +- LE channel selection algorithm 2 (CSA#2) +- LE Secure connections +- Bluetooth 5.4 Qualified + +### **SDK** + +- Simplified and Unified DX for Wi-Fi API and Platform APIs +- Simplifies application development and presents clean and standardized APIs +- UC (Universal Configurator) enables componentization, simplifying configuration of peripherals and examples +- BSD and ARM IoT-compliant socket API +- Available through Simplicity Studio and GitHub + +### **Multi-protocol** + +- Wi-Fi STA + BLE + +### **PTA/Coexistence** + +- 3 wire CoEx acting as Wi-Fi with external Bluetooth +- 3 wire CoEx acting as Wi-Fi with external Zigbee/OT + +## **Changes in this release compared to v3.3.2 Release** + +### **System** + +- **Enhancements / New features** + - Added limited anti-rollback feature for firmware update +- **Fixed Issues** + - None +- **Documentation** + - None + +### **MCU** + +- **Enhancements / New features** + - Added platform examples support for below SiWG917Y Module OPNs, + - SIWG917Y110LGNBA, SIWG917Y111XGNBA, SIWG917Y121MGNBA, SIWG917Y111MGABA, SIWG917Y110LGABA, SIWG917Y111XGABA and SIWG917Y121MGABA + - Added Pin-Annotation support for the following components, + - sl\_si91x\_button\_917, sl\_icm40627, sl\_si70xx, iostream\_si91x, memlcd\_917 and sl\_joystick + - Added UC support to configure supported UART instance and baudrate for debug logs + - Added support to convert Unix timestamp to Calendar datetime and vice-versa + - Added provision to disable MEMLCD + - Enhanced RGB LED driver by adding support for multiple instances +- **Fixed Issues** + - Fixed the issue with high sleep current (~100 µA) in the powersave\_standby\_associated example + - Fixed Calendar/RTC clock drift issue + - Fixed the flashing/erasing issue when performing M4/TA firmware update from version 3.2.0 to 3.3.0 on custom platform with external oscillator + - Fixed the issue when there is a NAK from the I2C follower + - Fix for I2C Write failure across sleep-wakeup + - Fixed the ADC deinitialization and initialization issue upon wakeup + - Fixed SDIO secondary build errors + - Fixed ADC channel instance configuration for Joystick + - Fixed LED1 configuration for PWM + - Fixed the default instance for RGB LED application on the Devkit + - Fixed build errors when configuring BSS, Data and Stack segments to PSRAM + - Fixed the false interrupt issue when using button-based wakeup + - Fixed M4 Source Clock discrepancy issue  +- **Documentation** + - Updated migration guide with host pad selection API change information + - Added a generic peripheral API flow diagram w.r.t Sleep Wakeups in API Reference Guide + - Updated documentation regarding ISP mode in trouble shooting guide  + - Updated ULP UART readme for GPIO 8 and 9 configuration as Rx and Tx + +### **SDK** + +- **Enhancements / New features** + - Updated aws\_starfield\_ca.pem.h certificate.(includes Starfield G2 Root CA). + - Added support for combined firmware upgrade feature in the http\_otaf and http\_otaf\_twt example applications. + - Moved powersave\_standby\_associated example from featured  to featured/low\_power  section. + - Support for SL\_WIFI\_SCAN\_TYPE\_EXTENDED in sl\_wifi\_scan\_type\_t and sl\_wifi\_get\_stored\_scan\_results() API to retrieve extended scan results.  + - Added OPN support for SiWG917Y110LGNBA board. + - Updated the SiWx917 development kit demo to use provisioning over BLE. +- **Fixed Issues** + - Fixed sl\_mqtt\_client\_connect() API to handle WLAN disconnection during MQTT connection. + - Fixed SOFT\_AP\_PSK and SOFT\_AP\_SSID defines to have generic default PSK and SSID for AP in cli\_demo example. + - Updated SOFT\_AP\_PSK and SOFT\_AP\_SSID defines to have generic default PSK and SSID for AP and updated example readme for the same of Cli Demo example application. + - Fixed certificate loading errors when No Optimization  compiler option is enabled in example applications. + - Fixed handling of sl\_calib\_write command in wifi\_calibration example application. + - Fixed handling of Wi-Fi client disconnections in concurrent mode for socket connections. + - Fixed the issue where the device not going to sleep immediately after power save API is called while handling multiple DNS queries. + - Fixed the issue where the DUT takes 2-4 minutes to reconnect with the AP and the Si-connect app shuts down in mid-iterations. +- **Documentation** + - Added usage note for SL\_WIFI\_MAX\_SCANNED\_AP. + - Updated the documentation for sl\_wifi\_start\_scan API to add more information about SL\_WIFI\_SCAN\_TYPE\_EXTENDED. + - Updated cli\_demo example readme with SOFT\_AP\_PSK and SOFT\_AP\_SSID defines. + - Updated migration guide from v3.3.2 + +### **Wi-Fi/Network Stack** + +- **Enhancements / New features** + - Added support for ALPN extension for TLS protocol. + - Support added for SRRC region configuration + - CRYPTO\_HARDWARE is now supported during rejoin process. + - Added region configuration restrictions for SiWG917Y modules + - 11ax receive performance improvement with transmit ppm + - Improved receive sensitivity performance in the presence of transmitter carrier frequency offset (CFO). +- **Fixed Issues** + - Addressed  fixes for Netx Vulnerabilities (CVE-2023-48315 ,CVE-2023-48316 ,CVE-2023-48691 ,CVE-2023-48692 ) +- **Documentation** + - None + +### **BLE** + +- **Enhancements / New features** + - Limited the Transmit power to 4dBm for WORLDSAFE and SRRC regions, and removed the option for users to modify BLE Gain tables for the SiWG917Y module + - Added BLE examples support for SiWG917Y110LGNBA  OPN.  +- **Fixed Issues** + - Removed the BLE packet transmission on channel-39 (2480MHz) at a 2Mbps data rate. + - Fixed BLE HP chain RX issues across temperature on few parts through improvements in bootup calibration. + - Improved BLE transmit modulation parameters and harmonic emissions on the 8dBm transmission path. As a result, the active current of BLE transmit (8dBm path) can increase by around 1mA. + - Enhanced the packet reception performance in the BLE LP chain. + - Enhanced the BLE TX power in HP chain to align with the datasheet numbers. + - Fixed the DUT hang issue at the rsi\_bt\_get\_local\_dev\_address API in central role when using PSRAM boards (121x, 141x, 111M) and enabling power save in the ble\_privacy application +- **Documentation** + - None + +### **Multi-protocol** + +- **Enhancements / New features** + - None +- **Fixed Issues** + - None +- **Documentation** + - None + +## **Recommendations** + +### **System** + +- The current revision of SiWx917 has: + - RAM memory of 672k bytes which can be shared between TA and M4 processors in SoC mode.  + - The below configurations are applicable in SoC mode and can be configured based on the application requirement. EXT\_FEAT\_352K\_M4SS\_320K is the default configuration, based on requirement EXT\_FEAT\_480K\_M4SS\_192K configuration is selected for SoC mode multi-protocol examples. + - EXT\_FEAT\_480K\_M4SS\_192K - This mode configures TA with 480k and M4 with 192K bytes of memory + - EXT\_FEAT\_416K\_M4SS\_256K - This mode configures TA with 416k and M4 with 256K bytes of memory + - EXT\_FEAT\_352K\_M4SS\_320K - This mode configures TA with 352k and M4 with 320K bytes of memory + - SoC mode should not use 672k\_M4SS\_0K memory configuration. +- Set the recommended Power Save Profile (PSP) type to Enhanced Max PSP. +- There are 2 Versions of Pro-Kits/Radio boards. Si917-6031A based on Si917-4338A (Rev **A01 - A11**) and SiWx917-6031A based on SiWx917-4338A (Rev A12-A14). To get optimal power numbers, enable macro "SL\_SI91X\_ENABLE\_LOWPWR\_RET\_LDO" pre-processor define for ICs or while using SiWx917-6031A Pro-kit, SiWx917-4338A version of boards. This macro should be disabled for earlier variants of the board (Si917-6031A, Si917-4338A). +- With RAM configuration (EXT\_FEAT\_352K\_M4SS\_320K), only 352K memory is available to TA  which limits the features supported, Recommended to enable EXT\_FEAT\_416K\_M4SS\_256K in Wi-Fi + BLE Multi protocol mode to enable more Network features. +- For EXT\_FEAT\_416K\_M4SS\_256K  and EXT\_FEAT\_480K\_M4SS\_192K memory configurations, it is recommended to retain both TA and M4 RAMs in power save. + +### **Wi-Fi/Network Stack** + +- It is recommended to enable SL\_SI91X\_EXT\_TCP\_IP\_WAIT\_FOR\_SOCKET\_CLOSE BIT(16) of the 'Extended TCP IP Feature' bit map in the opermode command for all Wi-Fi Socket operations from the host to ensure graceful handling during asynchronous closures from the peer. +- For high throughputs,  it is recommended to enable BIT(2) - SL\_SI91X\_FEAT\_AGGREGATION  of feature\_bit\_map in opermode.  +- Users can enable SL\_SI91X\_EXT\_TCP\_IP\_SSL\_16K\_RECORD in 'Extended TCP IP Feature' bit map in opermode for (HTTPS server) supporting 16k record. +- **TWT** + - Recommendation is to use sl\_wifi\_target\_wake\_time\_auto\_selection() API for all TWT applications.  + - It is recommended to issue iTWT setup command once IP assignment, TCP connection, application specific socket connections are done. + - When using sl\_wifi\_enable\_target\_wake\_time API, increase TCP / ARP Timeouts at the remote side depending upon the configured TWT interval configured. It's highly recommended to use sl\_wifi\_target\_wake\_time\_auto\_selection() as an alternative. + - In case of TWT in CoEx mode, when using sl\_wifi\_enable\_target\_wake\_time API, use TWT wake duration <= 16 ms and TWT wake interval >= 1 sec. If wake duration > 16 ms or TWT wake interval < 1sec, there might be performance issues. + - For iTWT GTK interval in AP should be configured to max possible value or zero. If GTK interval is not configurable on AP side, recommended TWT interval (in case of sl\_wifi\_enable\_target\_wake\_time API) or RX Latency (in case of sl\_wifi\_target\_wake\_time\_auto\_selection API) is less than 4sec. + - When sl\_wifi\_enable\_target\_wake\_time API is used, configuring TWT Wake interval beyond 1 min might lead to disconnections from the AP. Recommended to use TWT wake interval of less than or equal to 1 min. + - When using sl\_wifi\_enable\_target\_wake\_time API, it is recommended to set missed\_beacon\_count of sl\_wifi\_set\_advanced\_client\_configuration API greater than 2 times of the configured TWT Interval. + - DUT keepalive should be configured aligned with AP keepalive in TWT modes. +- Disable power save for high throughput applications or use FAST PSP power save mode as per application requirement. +- The application needs to ensure that it sets RTC with the correct timestamp before establishing the SSL/EAP connection. +- The minimum timeout value should not be less than 1 second for socket select and socket receive calls.  +- Please refer Keep alive intervals supported by MQTT broker and configure keep alive interval values accordingly. +- The minimum keep alive interval value recommended for embedded MQTT is 10 Seconds.  +- Disable power save and suspend any active TWT sessions before triggering HTTP OTAF. +- Randomize the client port if using rapid connect/disconnect of the MQTT session on the same client port with the power save. +- Recommended to configure VAP\_ID properly for Si91x STA and AP using sl\_si91x\_setsockopt\_async(), in case of data transfer. +- Recommended to use valid length(<= 202 bytes) for topic to be published while using Embedded MQTT, else it leads to return wrong error code(0x21). +- In concurrent mode with dual IP, it is advised to bring up STA first (IP configuration) and AP later. +- It is recommended to configure Tx ,Rx , Global buffer pool ratio in the buffer config command based for all Wi-Fi Socket operations from the host +- It is recommended to use "TCP exponential backoff" configuration for congested channels. +- It is recommended is to disable broadcast filter during TCP connection to avoid ARP resolution issues +- To avoid IOP issues, it is recommended to disable power save before Wi-Fi connection. +- It is recommended to set region\_code as `IGNORE_REGION` in boot configurations for SIWG917Y module boards except for PER mode. + +### **BLE** + +- In BLE, the recommended range of Connection Interval in + - Power Save (BLE Only) - 100 ms to 1.28 s. +- In BLE, during Connection, the configuration of Scan Interval and Scan Window with the same value is not recommended. The suggested ratio of Scan Window to Scan Interval is 3:4. +- In BLE, if a device is acting as Central, the scan window (in set\_scan\_params and create\_connection commands) must be less than the existing Connection Interval. The suggested ratio of Scan Window to Connection Interval is 2:3. +- In BLE mode, if scanning and advertising are in progress on the SiWx91x module and it subsequently gets connected and moves to the central role, scanning stops else if it moves to the peripheral role, advertising stops. To further establish a connection to another peripheral device or to a central device, the application should give a command for starting advertising and scanning again. + +### **Multi-protocol** + +- For concurrent Wi-Fi + BLE, and while a Wi-Fi connection is active, we recommend setting the ratio of the BLE scan window to BLE scan interval to 1:3 or 1:4. +- Wi-Fi + BLE Advertising + - All standard advertising intervals are supported. As Wi-Fi throughput is increased, a slight difference in on-air advertisements compared to configured intervals may be observed. + - BLE advertising is skipped if the advertising interval collides with Wi-Fi activity. +- Wi-Fi + BLE scanning + - All standard scan intervals are supported. For better scan results, we recommend setting the ratio of the BLE scan window to BLE scan interval to 1:3 or 1:4. + - BLE scanning will be stopped for intervals that collide with Wi-Fi activity. +- Wi-Fi + BLE Central/Peripheral Connections + - All standard connection intervals are supported. + - For a stable connection, use optimal connection intervals and max supervision timeout in the presence of Wi-Fi activity. +- Wi-Fi + BLE Central/Peripheral Data Transfer + - To achieve higher throughput for both Wi-Fi and BLE, use medium connection intervals, such as 45 to 80 ms with maximum supervision timeout. + - Ensure Wi-Fi activity consumes lower intervals. + +### **MCU** + +- The WDT manager is specifically meant for system reset recovery and should not be utilized for any other purpose. When interrupts are disabled, make sure to stop the WDT to avoid unintended resets. Once interrupts are re-enabled, restart the WDT to ensure system reliability +- It is strongly recommended to use `sl_si91x_soc_nvic_reset()` API for system soft reset rather than the `sl_si91x_soc_soft_reset()` function, since this uses the WDT for soft reset, which is specifically intended for system reset recovery +- It is strongly recommended not use switch\_m4\_frequency() for clock scaling. Refer to the migration guide for more details +- For GPIO-based wakeup, ensure the GPIO component is installed in powersave applications +- Use both CTS and RTS for UART flow control +- PSRAM examples are not supposed to be used with Non-PSRAM OPNs +- SYSRTC and wake on wireless wakeup resources are enabled by default when tickeless idle mode is enabled. Avoid installing sleeptimer component in power save applications (where FreeRTOS tickless is enabled by default) +- Minimum idle-time to sleep is configured to 100ms in FreeRTOS\_config.h +- Enable DMA to achieve better throughput numbers +- For I2C Fastplus and High speed modes, use high power instances with core clock frequencies between 80MHz and 180MHz +- Use blocking calls instead of non-blocking calls for I2C leader in ULP\_I2C while receiving data +- In RTOS environment, prefer Signaling mechanisms (Semaphore/Mutex/EventFlag etc.) instead of "Variables/Flags" from user callbacks to detect "\*Transfer Complete\*" for high speed communication peripherals + Refer Software Reference Manual for more details +- Install the 'device\_needs\_ram\_execution' component for OPN-based firmware update examples +- It is strongly recommended to use the FreeRTOS tickless based powersave instead of the sl\_si91x\_m4\_sleep\_wakeup() (legacy) API +- For ACx Modules, it is necessary to initialize the internal 32kHz RC clock specifically for the LF\_FSM domain. GPIO oscillator clock does not propagate to the LF\_FSM. This may lead to timer accuracy issues when using the 32kHz RC clock. +- If the external oscillator connected to UULP\_GPIO\_3 is used as the 32kHz clock source, make the necessary code changes as detailed in the Software Reference Manual +- It is strongly recommended not to use RO clock in MCU +- For BLE, CoEx, and high-accuracy MCU applications it is recommended to use external 32kHz crystal on XTAL\_32KHZ\_P and XTAL\_32KHZ\_N pins. + +## **Known Issues of WiSeConnect3\_SDK\_3.3.3 Release** + +### **MCU** + +**GSPI** + +- First 2 MSB bits of the first byte on MISO are garbled + +**GPIO** + +- By default, sl\_gpio\_set\_configuration() sets the GPIO to HIGH  + +**SSI** + +- In ULP SSI, non-DMA transfer is not working + +**I2C** + +- ULP\_I2C non-blocking receive in low power mode will not function as expected + +**I2S** + +- FIFO threshold configurations are not working + +**Config Timers** + +- PWM mode is not working + +**ADC** + +- ADC static mode sampling rate is supported up to 2.5Msps + +**Analog comparator** + +- opamp2, opamp3 & BOD configurable Inputs do not work + +**Temperature Sensors** + +- BJT Temperature readings are not accurate + +**QSPI** + +- QUAD mode not working + +**Power Manager** + +- BOD and Comparator wakeup sources not working +- PS2 -PS4 transition is not working in SiWG917Y110LGNBA part + +**SensorHub** + +- Power transitions with AWS are not stable in SensorHub +- SPI sensor is not working +- Button interrupt is not working + +### **SDK** + +- Observed Wi-Fi connection is successful even after deleting the stored network credentials using sl\_net\_delete\_credential and responding with SL\_NET\_INVALID\_CREDENTIAL\_TYPE for sl\_net\_get\_credential. +- Enhanced sl\_wifi\_get\_firmware\_version() API to provide more details (ROM ID, chip ID, security version, etc) which is not backward compatible with firmware older than 1711.2.10.1.0.0.4. Firmware binary notation does not include the security version number. +- In PSRAM enabled demos, moving of text, data and stack segments to PSRAM is allowed. BSS and Heap should still be in SRAM. +- Asynchronous Azure MQTT is not supported, this will be addressed in upcoming release(s). +- mDNS with IPV6 is not supported. +- Bus thread stack may need to increase if local variables are used in user callback to avoid stack overflow. +- Low Power examples usage and documentation still under scope of improvement. +- Observed sl\_wifi\_get\_wireless\_info() API is giving wrong security type and PSK for WPA3 Transition supported client mode. +- Observed socket close is not working as expected for TLS socket when socket connect, send data and socket close are performing in a continuous loop. +- Observed data not received simultaneously when two sockets call recv() from two different RTOS tasks. +- WMM-PS/UAPSD is not supported +- firmware\_flashing\_from\_host\_uart\_xmodem example fails to communicate over UART. + +### **Wi-Fi/Network Stack** + +**Wi-Fi STA** + +- STA Connection with the WPA3 Hunting and Pecking algorithm takes about 3-4 seconds. +- Connection failures have been observed with certain APs in environments with high channel congestion (~50-60% occupancy in an open lab). +- Region selection based on country IE in the beacon is not supported in ICs +- Intermittent beacon reception from Access Point (beacon misses) occurs when channel congestion exceeds 85%. +- When scanning with low power mode enabled, a sensitivity degradation of 3-6dB is observed, which may prevent APs at longer ranges from appearing in the scan results. +- Passive scan is failing when DUT is configured in world domain. +- For ICs, the region codes DEFAULT\_REGION and IGNORE\_REGION are not supported +- For modules, the region codes DEFAULT\_REGION and IGNORE\_REGION are not supported in PER mode. +- Observed ~2% increase in listen current and ~1% increase in standby associated current. +- Tx max powers for EVM limited data rates (like MCS7, MCS6, 54M, etc) will be reduced by 0.5dB. + +**Access Point (AP) Mode** + +- Fixed rate configuration in AP mode using sl\_wifi\_set\_transmit\_rate API is not being set as expected.  + +**WPA2 Enterprise security (STA)** + +- Observed connection issue with configuring certificate key and programming 4096 bit key and SHA384/SHA512 certificates. + +**Wi-Fi Concurrency (AP + STA in same channel)** + +- Observed 3rd party STA association fail with 917 AP while 917 STA mode is connecting/reconnecting to configured 3rd party AP. Reconnect 3rd party STA to 917 AP in such scenarios.  +- In concurrent mode, 917 AP cannot process de-authentication frames sent by third-party STA if 917 STA is connected to WPA2+WPA3 enabled AP. + +**OFDMA (UL/DL)** + +- Less throughput observed in DL-OFDMA with some APs that enabled Low density parity check coding. + +**MU-MIMO (DL)** + +- For CoEx Scenario Wi-Fi + BLE, BLE Data transfer, MU retries (~50-60%) observed while running DL MU-MIMO test.  +- Observed Performance, Interop issues with MU MIMO with certain APs.  +- Less throughput observed in MU-MIMO with some APs that enabled  Low density parity check coding + +**MU-MIMO (UL)** + +- UL MU-MIMO is not supported. + +**TWT** + +- When sl\_wifi\_enable\_target\_wake\_time() API is used, occasional MQTT disconnections may be observed if TWT is configured with longer TWT intervals (>30secs) with embedded MQTT + TWT.  As an alternative, it's highly recommended to use sl\_wifi\_target\_wake\_time\_auto\_selection() API, where these dependencies are internally handled. + +**Wi-Fi STA Rejoin** + +- Observed Scanning (probe request) in all channels instead of the channels configured in selective channel(channel\_bitmap\_2g4) during rejoin process.  + +**IPv4/IPv6** + +- IP change notification is not indicated to the application.  +- In concurrent mode with dual IP, if the STA starts after AP is up, the STA IP configuration may fail for DHCP stateless mode. +- In concurrent mode, data transfer using the Link-local address will always use the first IP interface created by the application. + +**BSD Socket API** + +- Every server socket created consumes a socket (maximum of 10 sockets supported) and every subsequent connection to server socket consumes an additional socket (from the same pool of 10 sockets), which limits the number of server connections supported. +- Observing issues with TCP retries when power save mode is enabled, especially when the module is in idle state. +- TCP maximum retry value is valid upto 31 + +**SSL Client/Server** + +- Sometimes during SSL Handshake, ECC curve parameters generated are wrong, resulting in connection failure with BBD2 error. However, this recovers in the next attempt. +- Secure SSL renegotiation is not supported in the Embedded Networking Stack + +**HTTP Client/ HTTPS Client** + +- Observed occasional HTTPS continuous download failures when power save is enabled. Recommended to disable it before performing HTTPS continuous downloads + +**SNTP** + +- Unable to get SNTP async events when CoEx mode and power save are enabled  + +**Throughputs & Performance** + +- Wi-Fi alone throughput is about SDK 3.x (42Mbps). SDK refinements are in progress to further improve Wi-Fi Standalone and CoEx Throughputs.  + +**Wi-Fi IOT Cloud integration** + +- **AWS IOT Core** + - Observed AWS MQTT keepalive transmission is not happening at expected intervals with power save enabled. + - Observing LAST\_WILL\_MESSAGE is random at every MQTT connection rather than the configured Message/Length +- **AZURE IOT Core** + - Observed DUT after sending the data, its not sending the MQTT keep alive packet due to this Azure HUB closing the connection when power save is enabled. + +**Wi-Fi Interoperability (IOP)** + +- Observed disconnections with Amplifi (AFI-INS-R) AP with powersave enable +- TWT session is failing due to disconnections observed in DUT if rx\_latency is set to 55 seconds and receive data is also set to 55 seconds on MI Xiaomi RA72 and Tplink AX53 AP's +- Observed less throughput(~1Mb) while running TCP RX with Max\_PSP powersave with DLink 810 AP +- Observed interop issue (random disconnections) with few APs (EERO 6+, EERO PRO 6E, Cisco Catalyst 9120AXID) +- Disconnections observed with Netgear RAX120 AP in WPA3 Security + +### **BLE**   + +**DTM/PER** + +- Recommend to limit BLE Tx Maximum power to 18 dBm.  Please don't use for 127 power\_index for BLE HP chain with this release. + +**DLE** + +- Removed the ble\_data\_length PSRAM example as it does not work with 121x and 141x OPN's.  + +**Privacy**  + +- DUT hang at the rsi\_bt\_get\_local\_device\_address API in central role, when using PSRAM boards (121x, 141x, 111M) and enabling power save in the ble\_privacy application, + +AE + +- Observed DUT hang issue while running TX notifications in peripheral role. + +**SMP**   + +- SMP is not working with 110L(Lite wireless firmware image) board.  + +**Throughput & performance**  + +- BLE throughput in LITE version is reduced compared to Standard Wireless Firmware +- The DUT hangs when the SRRC region is set in the ICs. However, this issue does not occur with the SiWG917Y module.  + + + +### **Multi-protocol** + +- For CoEx Scenario Wi-Fi + BLE, BLE Data transfer, MU retries (~50-60%) observed while running DL MU-MIMO test.  +- Observed Wi-Fi + BLE intermittent connection failures, disconnections, and data transfer stalls in the long run when power save is enabled. +- Observed "DUT is not disconnecting to the AP when initiating disconnection from EFR connect app screen using wifi\_station\_ble\_provisioning\_aws example +- Observed DUT failed to load certificate with error "0x10026" (SL\_STATUS\_SI91X\_WRONG\_PARAMETERS) while running wifi\_https\_ble\_dual\_role\_v6 application +- Observed BLE bonding failure during continuous HTTPS download. +- Observed BLE and WLAN connection failure with SMP, when WLAN connect and HTTPS GET called in a loop. +- Observed issue in displaying throughput for interval of 'TEST\_TIMEOUT' when CONTINUOUS\_THROUGHPUT enabled in wifi\_station\_ble\_throughput\_app demo +- In CoEx opermode, with memory config of TA - 480K and M4 - 192K Wi-Fi through is degrading by 10Mbps due less memory available for throughput. + +### **System** + +- Observed random hang issues with encrypted firmwares on some earlier variant of boards  (Si917-6031A, Si917-4338A) with powersave enable. +- This release addresses several issues, resulting in an additional 1K RAM usage in the NWP core. Consequently, this reduces the available heap size by 1K for the NWP core. Users with configurations that were already near the heap limit may experience either minor throughput issues OR functionality issues with this update. + +On encountering a problem, it can be mitigated by considering the following options: + +- Reduce the number of enabled features in the NWP core. +- Switch to a memory configuration that allocates more RAM to the NWP core while reducing RAM allocated to the Host processor. + +### **Simplicity Studio and Commander**  + +- Simplicity commander does not support options under "Debug Lock tools". +- All projects in the package are compatible with **GNU ARM V12.2.1** toolchain + +## **Limitations and Unsupported Features**   + +### **System** + +- 16MB Flash is not supported +- 16MB PSRAM is not supported +- Dual-Host mode is not supported + +### **SDK** + +- Baremetal mode is not supported. +- Zephyr is not supported + +### **Wi-Fi/Network Stack** + +- TLS 1.3 Server is not supported. +- 40 MHz bandwidth for 2.4 GHz band is not supported. +- Max 3 SSL sockets are supported in Wi-Fi alone and CoEx modes. No.of  SSL Sockets in Wi-Fi + BLE based on RAM memory configuration selected.  +- In SSL ECC Curve ID supported is 23. SSL handshake with 3rd party clients depends on the SSL ECC Curve ID. +- The number of Non-Transmitting BSSIDs processed is limited by the beacon length that can be processed by the stack (which is 1024 bytes). Beacons greater than 1024 Bytes in length will not be processed. +- Multiprotocol (STA +BLE) + EAP Security modes supported only with Memory configurations EXT\_FEAT\_416K\_M4SS\_256K and EXT\_FEAT\_480K\_M4SS\_192K. +- UL-MU-MIMO is not supported. +- WPA3 AP supports only H2E algorithm. +- PMKSA caching is not supported in WPA3 AP mode. +- Maximum embedded MQTT Publish payload is 1 kByte. +- Timeout value for socket select and socket receive calls of less than 1 second is not currently supported. +- SA query procedure not supported in 11W AP mode. +- WPA3 AP transition mode is not supported. +- AP standalone mode does not support Tx aggregation. Rx aggregation is supported with limited number of BA sessions. +- In concurrent AP mode, aggregation (Tx/Rx) is not supported. +- Embedded HTTP Server is not supported. +- mDNS with IPV6 is not supported. +- Low power scan supports 1 Mbps packets reception only. +- Auto PAC Provisioning in EAP-FAST with TLSv1.2 is not supported. +- bTWT , Intra PPDU Power save, Spatial Re-Use, BSS coloring features not supported +- HTTPS server is not supported. + +### **BLE** + +- For BLE, if the connection is established with a small connection interval (less than 15 ms), simultaneous roles (i.e., Central + Scanning and Peripheral + Advertising) are not supported. +- BLE maximum two concurrent connections are supported, which can be either a connection to two peripheral devices, to one central and one peripheral device or two central devices. +- BLE Slave latency value is valid up to 32 only. +- Maximum supported AE data length is 200 bytes. +- Supports only two ADV\_EXT sets. +- Supports only two BLE connections (1 Central and 1 Peripheral) with AE. +- Advertising Extension feature is not supported in Coexistence. +- The  ae\_central & ae\_peripheral applications are not supported with TA\_352K\_M4\_320K RAM configuration. +- Two BLE connections are not supported with M4 powersave. It only supports a single connection.  +- Isochronous channels feature is not supported.  +- Connection subrating feature is not supported.  +- LE power controller feature is not supported. +- EATT feature is not supported. +- Periodic Advertising with a response feature is not supported.  +- BLE Audio is not supported. +- The feature of dynamically changing the TX power when extended advertising is active is not supported. +- EFR Connect mobile application doesn't have support to differentiate the BLE configurators based on the Bluetooth Device address. +- The maximum BLE power has been reduced by 2dB compared to the Datasheet Number, which will be addressed in the upcoming 3.3.1 patch release. +- ICs do not support DEFAULT\_REGION and IGNORE\_REGION region codes. +- Modules do not support DEFAULT\_REGION and IGNORE\_REGION region codes in PER mode. + +### **MCU** + +- SensorHub supports PS1-power state with ADC sensor (FIFO mode not supported) . In this mode, the other sensor's operation is not supported. +- FreeRTOS Tickless IDLE mode is not supported in sensor hub application +- LittleFS support is intended to be used only with Dual flash +- PS1 state is not supported in Power Manager +- Power consumption is same for PS4 and PS3 states with powersave mode of power manager +- When using Button\_0 as wakeup source, it limits the button functionality at application layer. For using Button\_0 for application specific functionality, enable 'SL\_SI91X\_NPSS\_GPIO\_BTN\_HANDLER' +- Manual chip select option is not supported when using GSPI +- Mutli-slave mode is not supported in SSI Primary +- Dual and quad modes are not supported in SSI Primary +- Config timer doesn't support 32-bit timer +- Config timer features to trigger DMA and interrupts on events or counters are not supported +- UART instances does not support different FIFO Thresholds +- In UART Character Timeout feature is not supported +- Lower baud rates 110, 150, bit-width 1-4 and 9 are not supported in UART/USART +- RS485 Interface configuration is not supported +- In SDIO function2 to function5 are not supported +- Multichannel and external event based sampling are not supported in ADC +- Fast plus and High Speed modes are not supported in ULP\_I2C instance +- I2S-PCM is not supported +- MPU is not supported +- CPC is not supported +- Hardware Flow control for ULP UART is not supported +- HSPI Secondary is not supported +- Using a 32kHz external oscillator (connected to UULP GPIOs) may cause timer drift in the UULP peripherals +- Sample app and API information (in the API reference guide) for RSI based peripherals is not present + +### **Multi-protocol** + +- Wi-Fi AP + BLE currently not supported.  +- EXT\_FEAT\_352K\_M4SS\_320K RAM configuration is not supported for CoEx mode with SSL + +## **Removed/Deprecated Features** + +- Removed IR, SIO, RO temp sensor and FIM +- Removed support for WDT reset upon processor lock up +- Removed I2C SMBUS feature +- Removed hardware\_setup() from all power save application that uses sllib\_m4\_power\_save.slcc component +- sl\_si91x\_m4\_sleep\_wakeup() will be deprecated from upcoming releases +- switch\_m4\_frequency() will be deprecated from upcoming releases +- RO\_32KHZ\_CLOCK and MCU\_FSM\_\_CLOCK macros are removed + +> **Note:**  +> +> The following BLE Synchronous API's will be deprecated soon and the equivalent Asynchronous API's will be used instead in all BLE applications : +> +> |**S.NO**|**BLE Synchronous API's** |**BLE Asynchronous API's** | +> | :- | :- | :- | +> |1|rsi\_ble\_get\_profiles|rsi\_ble\_get\_profiles\_async| +> |2|rsi\_ble\_get\_profile|rsi\_ble\_get\_profile\_async| +> |3|rsi\_ble\_get\_char\_services|rsi\_ble\_get\_char\_services\_async| +> |4|rsi\_ble\_get\_inc\_services|rsi\_ble\_get\_inc\_services\_async| +> |5|rsi\_ble\_get\_char\_value\_by\_uuid|rsi\_ble\_get\_char\_value\_by\_uuid\_async| +> |6|rsi\_ble\_get\_att\_descriptors|rsi\_ble\_get\_att\_descriptors\_async| +> |7|rsi\_ble\_get\_att\_value|rsi\_ble\_get\_att\_value\_async| +> |8|rsi\_ble\_get\_multiple\_att\_values|rsi\_ble\_get\_multiple\_att\_values\_async| +> |9|rsi\_ble\_get\_long\_att\_value|rsi\_ble\_get\_long\_att\_value\_async| +> |10|rsi\_ble\_set\_att\_value|rsi\_ble\_set\_att\_value\_async| +> |11|rsi\_ble\_set\_long\_att\_value|NA| +> |12|rsi\_ble\_prepare\_write|rsi\_ble\_prepare\_write\_async| +> |13|rsi\_ble\_execute\_write|rsi\_ble\_execute\_write\_async| +> |14|rsi\_ble\_indicate\_value\_sync|rsi\_ble\_indicate\_value| + +
+ # **WiSeConnect3\_SDK\_3.3.2 SoC Release Notes** ## **Release Details** diff --git a/docs/software-reference/developer-guides/migrating-from-v3-3-2.md b/docs/software-reference/developer-guides/migrating-from-v3-3-2.md new file mode 100644 index 000000000..e0a8c9a1c --- /dev/null +++ b/docs/software-reference/developer-guides/migrating-from-v3-3-2.md @@ -0,0 +1,57 @@ +# Migrating from WiSeConnect™ SDK v3.3.2 to v3.3.3 + +## Table of Contents + +- [Overview](#overview) +- [Migration Steps](#migration-steps) + - [Update API Calls](#update-api-calls) + - [Update Files](#update-files) + - [Update Macros](#update-macros) + +## Overview + +This is a guide for updating an existing application using the WiSeConnect™ SDK v3.3.2 to a v3.3.3 application. + +There are few naming and file changes in v3.3.3 as compared to v3.3.2, mostly in order to standardize the names and improve the overall usage experience of the application programming interface (API). Migration requires the names everywhere to be updated in the existing code of an application. + +## Migration Steps + +In order to convert a WiSeConnect SDK v3.3.2 application to a v3.3.3 application, + +1. Open your existing application project in Simplicity Studio. + +2. In each source file of the project, replace the v3.3.2 names or interfaces with v3.3.3 names or interfaces. + +Refer to the tables in each of the sections that follow which map the v3.3.2 API elements to v3.3.3. In some instances, the differences between v3.3.2 and v3.3.3 are highlighted in **bold** text. + +- [Update API Calls](#update-api-calls) +- [Update Files](#update-files) +- [Update Macros](#update-macros) +- [Update Types](#update-types) + +### Update Files + +- By default, the sleep timer is used to run RTOS when tickless mode is enabled, and it internally operates SYSRTC timer. If SYSRTC component is installed while tickless mode is enabled, it may cause conflicts. To prevent this, avoid installing the SYSRTC component when tickless mode is enabled. +- To enable host PAD selection for GPIO pin numbers 25–30, use the function `sl_si91x_gpio_driver_enable_host_pad_selection()`. This function allows selecting and configuring the PAD for these specific GPIO pins, ensuring proper setup for host-side PADs. +- Use `sl_si91x_soc_nvic_reset()` API for system soft reset rather than the +`sl_si91x_soc_soft_reset()` +function, since this uses the WDT for soft reset, which is specifically intended for system reset recovery +- Explicitly configuring the clock for the Watchdog timer is no longer required, as it is now handled as part of default clock configurations + +- | **Module** | **v3.3.2** | **v3.3.3** | + |-------------| -----------| ---------- | + | DEBUG UC | ULP_UART is being used for Debug prints | No migration required, just install and use "Debug UC" component if want to change instance | + | DEBUG UC | USART0/UART1 is being used for Debug prints | ULP_UART instance becomes default for Debug prints. Install and use "Debug UC" component to change instance | + | DEBUG UC | If user wants to select DEBUG instance, user has to go to rsi_debug.c file and change manually | Install "Debug UC" component. By default, ULP UART instance is used. Provision for changing baudrate is also provided | + +### Update Macros + +| **Module** | **v3.3.2** | **v3.3.3** | +|-------------| -----------| ---------- | +|NONE| + +### Update Types + +| **Module** | **v3.3.2** | **v3.3.3** | +|------------|------------|------------| +| NONE | \ No newline at end of file diff --git a/docs/software-reference/manuals/siwx91x-software-reference-manual.md b/docs/software-reference/manuals/siwx91x-software-reference-manual.md index cdcc72acd..dcf10578b 100644 --- a/docs/software-reference/manuals/siwx91x-software-reference-manual.md +++ b/docs/software-reference/manuals/siwx91x-software-reference-manual.md @@ -38,6 +38,8 @@ For more details on MCU Peripherals, see the **SiWx917 Reference Manual** (conta ![SiWx917 MCU Architecture](./resources/SiWx917_mcu_architecture.PNG) +>**Note:** SIO and VAD are not supported. + - When using any low-power instance in high-power mode with DMA enabled, it is recommended to allocate buffers in the ULP Memory block. For more information on buffer allocation, please refer to the following examples: ULP_I2S, ULP_UDMA, ULP_SSI, and ULP_UART. ### Bootup Flow @@ -75,11 +77,9 @@ The SiWx917 clock subsystem facilitates changing the clock source and/or frequen * Defined frequencies for I2S Interface (I2S_PLL_CLK) * Multiple clocks generated by ULP Clock Oscillators. These are low-power clock oscillators * External Crystal Clock (XTAL_CLK) - * RC 32 MHz Clock (RC_32MHZ_CLK) - * RO High-frequency Clock (RO_HF_CLK) + * RC MHz Clock (RC_MHZ_CLK) * Doubler Clock (DOUBLER_CLK) * RC 32 kHz Clock (RC_32KHZ_CLK) - * RO 32 kHz Clock (RO_32KHZ_CLK) * XTAL 32 kHz clock (XTAL_32KHZ_CLK) * Configurable independent division factors for varying the frequencies of different functional blocks * Configurable independent clock gating for different functional blocks @@ -96,290 +96,16 @@ The following example code snippet illustrates setting the SOCPLL clock (1 MHz // Core Clock runs at 180 MHz SOC PLL Clock sl_si91x_clock_manager_m4_set_core_clk(M4_SOCPLLCLK, SOC_PLL_CLK); ``` -### External oscillator(32 kHz) on UULP GPIO-3 -Incorporate the following code snippet in the **SystemCoreClockUpdate()** function found in the **system_si91x.c** file when an external oscillator is connected to **UULP_GPIO_3**. Comment out the line **"RSI_PS_FsmLfClkSel(KHZ_XTAL_CLK_SEL)"** and replace it with the provided code snippet to avoid potential issues. - -File name : **system_si91x.c** - -Function Name : **SystemCoreClockUpdate()** -```C - #define MCU_RETENTION_BASE_ADDRESS 0x24048600 - #define NPSS_GPIO_CTRL (MCU_RETENTION_BASE_ADDRESS + 0x1C) - #define UULP_GPIO_3 3 -``` -```C -// Configuring the UULP_GPIO_3 for external oscillator - *(volatile uint32 *)(NPSS_GPIO_CTRL + (4 * UULP_GPIO_3)) = (BIT(3) | 0x5); - MCUAON_GEN_CTRLS_REG |= BIT(0); - MCUAON_GEN_CTRLS_REG; -// Configuring RC 32 kHz Clock for LF-FSM - RSI_PS_FsmLfClkSel(KHZ_RC_CLK_SEL); -``` > **Note** 1. **Clock Manager** component needs to be installed to use this function. 2. For reference, look into example applications where the MCU clock is reconfigured to 180 MHz in the application using the function **default_clock_configuration();** -### GPIO Configuration - -The SiWx917 has a total of 53 general-purpose input-output (GPIO) ports. The number of GPIOs available varies between different packages. Refer to the **GPIO available vs package** table in the product datasheet for more details. Registers for GPIO pins that are not available on the package are reserved. - -Configuring any GPIO on SiWx917 SoC requires programming the following: - -* Pad Configuration -* Pin Muxing - -#### Pad Configuration - -There is a common set of GPIO pads shared by multiple processor subsystems containing the secure zone processor (SZP), MCU high-performance (HP), and MCU ultra-low-power (ULP) subsystems. - -It is possible to control GPIO pads from either the SZP, MCU HP, or MCU ULP. The pad selection register has to be programmed to control the GPIOs between the subsystems. - -The following registers may be configured in order to access any of the GPIOs to MCU HP: -* Pad selection Register -* Pad configuration Register -* GPIO mode Register - -Refer to the **SiWx917 Pad Configurations** section in the **SiWx917 Reference Manual** for details (contact [sales](https://www.silabs.com/about-us/contact-sales) for access). - -#### Pin Muxing - -The SiWx917 provides multiplexing features on several pins. It is possible to configure SoC GPIOs as ULP GPIOs and vice versa to achieve desired pin functionality. - -There are many digital and analog peripherals on the SiWx917 such as the I2C, I2S, UART, SPI, Ethernet, SDIO, SDMEM, PWM, QEI, CAN, etc. However, the number of pins is limited. - -The pin multiplexing module makes it possible to accommodate all of the peripherals in a small package without compromising on functionality. The module makes it possible to multiplex different functions on the same I/O pin. If a I/O pin is used for a peripheral function, it cannot be used as GPIO. The reset values for the GPIO mode for each of the GPIOs are provided in the **SiWx917 Reference Manual** (contact [sales](https://www.silabs.com/about-us/contact-sales) for access) under **PAD Configuration and GPIO Mode Reset Values** section. - -Refer to the **SiWx917 Pin MUX** section in the **SiWx917 Reference Manual** for details (contact [sales](https://www.silabs.com/about-us/contact-sales) for access). - -**Code Snippet - GPIO Toggle** - -```C -#define PORT 0 -#define GPIO_PIN GPIO_6 -#define PAD_NUM 1 - -//!Enable pad section bit for GPIO 6 -sl_si91x_gpio_enable_pad_selection(PAD_NUM); - -//!Set GPIO mode to mode 0 -sl_gpio_set_pin_mode(PORT, GPIO_PIN, EGPIO_PIN_MUX_MODE0,0); - -//!Set GPIO to output direction -sl_si91x_gpio_set_pin_direction(PORT, GPIO_PIN, EGPIO_CONFIG_DIR_OUTPUT); - -//!Set GPIO pin value to 0 -sl_gpio_clear_pin_output(PORT, GPIO_PIN); - -//!Set GPIO pin value to 1 -sl_gpio_set_pin_output(PORT, GPIO_PIN); -``` - -> **Note**: See the [Si91x - SL_GPIO](https://github.com/SiliconLabs/wiseconnect/tree/master/examples/si91x_soc/peripheral/sl_si91x_gpio) example for more information. - -**Code Snippet - Configuring GPIO In Peripheral Mode** - -```C -/* Example for configuring GPIO6 in UART2_RX(mode 6) */ -#define PORT 0 -#define GPIO_PIN GPIO_6 -#define PAD_NUM 1 - -//!Enable pad section bit for GPIO 6 -sl_si91x_gpio_enable_pad_selection(PAD_NUM); - -//!Receiver Enable for RX pin -sl_si91x_gpio_enable_pad_receiver(GPIO_PIN); - -//!Set GPIO mode to mode 0 -sl_gpio_set_pin_mode(PORT, GPIO_PIN, EGPIO_PIN_MUX_MODE6,0); -``` - -##### SoC GPIOs - -The SoC GPIOs below (GPIO_6 to GPIO_51) are available in the normal mode of operation (power states 3 and 4). For a description of power states, see the **SiWx917 Reference Manual** (contact [sales](https://www.silabs.com/about-us/contact-sales) for access). - -Each of these GPIO pin functions is controlled by the GPIO Mode register mentioned in **SoC GPIO's** section of the **SiWx917 Reference Manual** (contact [sales](https://www.silabs.com/about-us/contact-sales) for access). - -| **PIN** | **PAD NUMBER** | **GPIO** | **GPIO Mode= 0** | **GPIO Mode= 1** | **GPIO Mode= 2** | **GPIO Mode= 3** | **GPIO Mode= 4** | **GPIO Mode= 5** | **GPIO Mode= 6** | **GPIO Mode= 7** | **GPIO Mode= 8** | **GPIO Mode= 9** | **GPIO Mode= 10** | **GPIO Mode= 11** | **GPIO Mode= 12** | **GPIO Mode*= 13** | **GPIO Mode*= 14** | **GPIO Mode*= 15** | -| ------- | -------------- | ---------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | -------------------------- | -------------------------- | -------------------------- | -------------------------- | -------------------------- | -------------------------- | -| 6 | 1 | GPIO_6 | GPIO_6 | SIO_0 | USART1_CTS | SSI_MST_DATA2 | I2C1_SDA | I2C2_SCL | UART2_RX | I2S_2CH_DIN_1 | PMU_TEST_1 | ULPPERH_ON_SOC_GPIO_0 | PWM_1L | M4SS_QSPI_D0 | GSPI_MST1_MOS1 | M4SS_TRACE_CLKIN | | NWP_GPIO_6 | -| 7 | 2 | GPIO_7 | GPIO_7 | SIO_1 | USART1_DTR | SSI_MST_DATA3 | I2C1_SCL | I2C2_SDA | UART2_TX | I2S_2CH_DOUT_1 | PMU_TEST_2 | ULPPERH_ON_SOC_GPIO_1 | PWM_1H | M4SS_QSPI_CSN0 | M4SS_QSPI_CSN1 | M4SS_TRACE_CLK | | | -| 8 | 3 | GPIO_8 | GPIO_8 | SIO_2 | USART1_CLK | SSI_MST_CLK | GSPI_MST1_CLK | QEI_IDX | UART2_RS485_RE | I2S_2CH_CLK | SSI_SLV_CLK | ULPPERH_ON_SOC_GPIO_2 | PWM_2L | M4SS_QSPI_CLK | SCT_OUT_2 | M4SS_TRACE_D0 | | NWP_GPIO_8 | -| 9 | 4 | GPIO_9 | GPIO_9 | SIO_3 | USART1_RTS | SSI_MST_CS0 | GSPI_MST1_CS0 | QEI_PHA | UART2_RS485_DE | I2S_2CH_WS | SSI_SLV_CS | | PWM_2H | M4SS_QSPI_D1 | SCT_OUT_3 | M4SS_TRACE_D1 | | NWP_GPIO_9 | -| 10 | 5 | GPIO_10 | GPIO_10 | SIO_4 | USART1_RX | SSI_MST_CS1 | GSPI_MST1_CS1 | QEI_PHB | UART2_RTS | I2S_2CH_DIN_0 | SSI_SLV_MOSI | ULPPERH_ON_SOC_GPIO_4 | PWM_3L | M4SS_QSPI_D2 | SSI_MST_DATA1 | M4SS_TRACE_D2 | | NWP_GPIO_10 | -| 11 | 6 | GPIO_11 | GPIO_11 | SIO_5 | USART1_DSR | SSI_MST_DATA0 | GSPI_MST1_MISO | QEI_DIR | UART2_CTS | I2S_2CH_DOUT_0 | SSI_SLV_MISO | ULPPERH_ON_SOC_GPIO_5 | PWM_3H | M4SS_QSPI_D3 | MCU_CLK_OUT | M4SS_TRACE_D3 | | NWP_GPIO_11 | -| 12 | 7 | GPIO_12 | GPIO_12 | | USART1_DCD | SSI_MST_DATA1 | GSPI_MST1_MOSI | | UART2_RS485_EN | | MCU_CLK_OUT | ULPPERH_ON_SOC_GPIO_6 | PWM_4L | | | | | NWP_GPIO_12 | -| 15 | 8 | GPIO_15 | GPIO_15 | SIO_7 | UART2_TX | SSI_MST_CS2 | GSPI_MST1_CS2 | | M4SS_TRACE_CLKIN | | MCU_CLK_OUT | ULPPERH_ON_SOC_GPIO_7 | PWM_4H | | | | | NWP_GPIO_15 | -| 25 | No need to select the Pad | GPIO_25 | GPIO_25 | SIO_0 | USART1_CLK | SSI_MST_CLK | GSPI_MST1_CLK | QEI_IDX | | I2S_2CH_CLK | SSI_SLV_CS | SCT_IN_0 | PWM_FAULTA | ULPPERH_ON_SOC_GPIO_6 | SOC_PLL_CLOCK | USART1_IR_RX | TopGPIO_0 | | -| 26 | No need to select the Pad | GPIO_26 | GPIO_26 | SIO_1 | USART1_CTS | SSI_MST_DATA0 | GSPI_MST1_MISO | QEI_PHA | UART2_RS485_EN | I2S_2CH_WS | SSI_SLV_CLK | SCT_IN_1 | PWM_FAULTB | ULPPERH_ON_SOC_GPIO_7 | INTERFACE_PLL_CLOCK | USART1_IR_TX | TopGPIO_1 | | -| 27 | No need to select the Pad | GPIO_27 | GPIO_27 | SIO_2 | USART1_RI | SSI_MST_DATA1 | GSPI_MST1_MOSI | QEI_PHB | UART2_RTS | I2S_2CH_DIN_0 | SSI_SLV_MOSI | SCT_IN_2 | PWM_TMR_EXT_TRIG_1 | ULPPERH_ON_SOC_GPIO_8 | I2S_PLL_CLOCK | USART1_RS485_EN | TopGPIO_2 | | -| 28 | No need to select the Pad | GPIO_28 | GPIO_28 | SIO_3 | USART1_RTS | SSI_MST_CS0 | GSPI_MST1_CS0 | QEI_DIR | UART2_RTS | I2S_2CH_DOUT_0 | SSI_SLV_MISO | SCT_IN_3 | PWM_TMR_EXT_TRIG_2 | ULPPERH_ON_SOC_GPIO_9 | XTAL_ON_IN | USART1_RS485_RE | TopGPIO_3 | | -| 29 | No need to select the Pad | GPIO_29 | GPIO_29 | SIO_4 | USART1_RX | SSI_MST_DATA2 | GSPI_MST1_CS1 | I2C2_SCL | UART2_RX | I2S_2CH_DIN_1 | PMU_TEST_1 | SCT_OUT_0 | PWM_TMR_EXT_TRIG_3 | ULPPERH_ON_SOC_GPIO_10 | USART1_DCD | USART1_RS485_DE | TopGPIO_4 | | -| 30 | No need to select the Pad | GPIO_30 | GPIO_30 | SIO_5 | USART1_TX | SSI_MST_DATA3 | GSPI_MST1_CS2 | I2C2_SDA | UART2_TX | I2S_2CH_DOUT_1 | PMU_TEST_2 | SCT_OUT_1 | PWM_TMR_EXT_TRIG_4 | ULPPERH_ON_SOC_GPIO_11 | PMU_TEST_1 | PMU_TEST_2 | TopGPIO_5 | | -| 31 | 9 | GPIO_31 | GPIO_31 | | | | | | | | | | | I2C1_SDA | UART2_RTS | QEI_IDX | | | -| 32 | 9 | GPIO_32 | GPIO_32 | | | | | | | | | | | I2C1_SCL | UART2_CTS | QEI_PHA | | | -| 33 | 9 | GPIO_33 | GPIO_33 | | | | | | | | | | | I2C2_SCL | UART2_RX | QEI_PHB | | | -| 34 | 9 | GPIO_34 | GPIO_34 | | | | | | | | | | | I2C2_SDA | UART2_TX | QEI_DIR | | | -| 46 | 10 | GPIO_46 | GPIO_46 | M4SS_QSPI_CLK | USART1_RI | QEI_IDX | GSPI_MST1_CLK | | M4SS_TRACE_CLKIN | I2S_2CH_CLK | SSI_SLV_CS | ULPPERH_ON_SOC_GPIO_8 | SOC_PLL_CLOCK | M4SS_PSRAM_CLK | | | | NWP_GPIO_46 | -| 47 | 11 | GPIO_47 | GPIO_47 | M4SS_QSPI_D0 | USART1_IR_RX | QEI_PHA | GSPI_MST1_MISO | | M4SS_TRACE_CLK | I2S_2CH_WS | SSI_SLV_CLK | ULPPERH_ON_SOC_GPIO_9 | INTERFACE_PLL_CLOCK | M4SS_PSRAM_D0 | | | | NWP_GPIO_47 | -| 48 | 12 | GPIO_48 | GPIO_48 | M4SS_QSPI_D1 | USART1_IR_TX | QEI_PHB | GSPI_MST1_MOSI | | M4SS_TRACE_D0 | I2S_2CH_DIN_0 | SSI_SLV_MOSI | ULPPERH_ON_SOC_GPIO_10 | I2S_PLL_CLOCK | M4SS_PSRAM_D1 | | | | NWP_GPIO_48 | -| 49 | 13 | GPIO_49 | GPIO_49 | M4SS_QSPI_CSN0 | USART1_RS485_EN | QEI_DIR | GSPI_MST1_CS0 | | M4SS_TRACE_D1 | I2S_2CH_DOUT_0 | SSI_SLV_MISO | ULPPERH_ON_SOC_GPIO_11 | MCU_QSPI_CSN0 | M4SS_PSRAM_CSN0 | | | | NWP_GPIO_49 | -| 50 | 14 | GPIO_50 | GPIO_50 | M4SS_QSPI_D2 | USART1_RS485_RE | SSI_MST_CS2 | GSPI_MST1_CS1 | I2C2_SCL | M4SS_TRACE_D2 | I2S_2CH_DIN_1 | PWM_TMR_EXT_TRIG_4 | UART2_RTS | MEMS_REF_CLOCK | M4SS_PSRAM_D2 | | | | NWP_GPIO_50 | -| 51 | 15 | GPIO_51 | GPIO_51 | M4SS_QSPI_D3 | USART1_RS485_DE | SSI_MST_CS3 | GSPI_MST1_CS2 | I2C2_SDA | M4SS_TRACE_D3 | I2S_2CH_DOUT_1 | PWM_TMR_EXT_TRIG_1 | UART2_CTS | PLL_TESTMODE_SIG | M4SS_PSRAM_D3 | | | | NWP_GPIO_51 | -| 52 | 16 | GPIO_52 | GPIO_52 | | USART1_CLK | SSI_MST_CLK | GSPI_MST1_CLK | QEI_IDX | M4SS_TRACE_CLKIN | I2S_2CH_CLK | SSI_SLV_CLK | M4SS_QSPI_CLK | SOC_PLL_CLOCK | | M4SS_PSRAM_CLK | | | | -| 53 | 17 | GPIO_53 | GPIO_53 | M4SS_QSPI_CSN1 | USART1_RTS | SSI_MST_CS0 | GSPI_MST1_CS0 | QEI_PHA | M4SS_TRACE_CLK | I2S_2CH_WS | SSI_SLV_CS | M4SS_QSPI_D0 | INTERFACE_PLL_CLOCK | M4SS_PSRAM_CSN1 | M4SS_PSRAM_D0 | | | | -| 54 | 18 | GPIO_54 | GPIO_54 | M4SS_QSPI_D4 | USART1_TX | SSI_MST_DATA2 | GSPI_MST1_CS1 | I2C2_SCL | M4SS_TRACE_D0 | I2S_2CH_DIN_1 | PWM_TMR_EXT_TRIG_2 | M4SS_QSPI_D1 | I2S_PLL_CLOCK | M4SS_PSRAM_D4 | M4SS_PSRAM_D1 | | | | -| 55 | 19 | GPIO_55 | GPIO_55 | M4SS_QSPI_D5 | USART1_RX | SSI_MST_DATA3 | GSPI_MST1_CS2 | I2C2_SDA | M4SS_TRACE_D1 | I2S_2CH_DOUT_1 | PWM_TMR_EXT_TRIG_3 | M4SS_QSPI_CSN0 | | M4SS_PSRAM_D5 | M4SS_PSRAM_CSN0 | | | | -| 56 | 20 | GPIO_56 | GPIO_56 | M4SS_QSPI_D6 | USART1_CTS | SSI_MST_DATA0 | GSPI_MST1_MISO | QEI_PHB | M4SS_TRACE_D2 | I2S_2CH_DIN_0 | SSI_SLV_MOSI | M4SS_QSPI_D2 | MEMS_REF_CLOCK | M4SS_PSRAM_D6 | M4SS_PSRAM_D2 | | | | -| 57 | 21 | GPIO_57 | GPIO_57 | M4SS_QSPI_D7 | USART1_DSR | SSI_MST_DATA1 | GSPI_MST1_MOSI | QEI_DIR | M4SS_TRACE_D3 | I2S_2CH_DOUT_0 | SSI_SLV_MISO | M4SS_QSPI_D3 | XTAL_ON_IN | M4SS_PSRAM_D7 | M4SS_PSRAM_D3 | | | | - -The following WiSeConnect SDK APIs are available for configuring the SoC GPIOs: -- `sl_si91x_gpio_enable_pad_selection(PIN)` to enable the control of GPIOs by the MCU. -- `sl_gpio_set_pin_mode(PORT0, PIN, MODE, OUTPUT_VALUE)` to set the mode of a pin to use the SoC GPIO. -- `sl_si91x_gpio_set_pin_direction(PORT0, PIN, DIR)` to set the pin direction. For example, if the mode is configured as 0 using the `sl_gpio_set_pin_mode()` API, the pin direction is 0 for output and 1 for input. -- `sl_si91x_gpio_enable_pad_receiver(PIN)` to enable pad receiving if the pin is an input. - -The following is an example code snippet illustrating the use of the above APIs: - -```C -   /*Enable PAD for GPIO_10*/ -  sl_si91x_gpio_enable_pad_selection(5); - -  /*Configuring GPIO_10 MODE as GPIO */ -  sl_gpio_set_pin_mode(0, 10, 0, 1); - -  /*Set GPIO_10 direction as OUTPUT*/ -  sl_si91x_gpio_set_pin_direction(0, 10, 0); -``` - -##### SDIO Host Interfaces +### External Oscillator(32 kHz) Usage with UULP_GPIOs -|GPIO | GPIO Default State SPI Mode| -|GPIO_25 | SDIO_CLK | -|GPIO_26 | SDIO_CMD | -|GPIO_27 | SDIO_D0 | -|GPIO_28 | SDIO_D1 | -|GPIO_29 | SDIO_D2 | -|GPIO_30 | SDIO_D3 | - -##### Digital ULP GPIOs - -The SoC GPIOs configured for ULP Peripheral functionality (ULPPERH_ON_SOC_GPIO_0 to ULPPERH_ON_SOC_GPIO_11) are available only in the normal mode of operation (Power-states 4 and 3). For a description of power-states, see the **SiWx917 Reference Manual** (contact [sales](https://www.silabs.com/about-us/contact-sales) for access). - -Each of these GPIO pin functions is controlled by the Special Function ULP register mentioned in **ULP GPIO's** section of the **SiWx917 Reference Manual** (contact [sales](https://www.silabs.com/about-us/contact-sales) for access). - -> **Note:** These digital functions are only available in normal mode of operation PS3 and PS4. For more details, refer to powersave app note. - -| PIN | ULP_GPIO | ULP_GPIO Mode 0 | ULP_GPIO Mode 1 | ULP_GPIO Mode 2 | ULP_GPIO Mode 3 | ULP_GPIO Mode 4 | ULP_GPIO Mode 5 | ULP_GPIO Mode 6 | ULP_GPIO Mode 7 | ULP_GPIO Mode 8 | ULP_GPIO Mode 9 | ULP_GPIO Mode 10 | ULP_GPIO Mode 11 | -| --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | -| 0 | ULPPERH_ON_SOC_GPIO_0 | ULP_EGPIO[0] | ULP_SPI_CLK | ULP_I2S_DIN | ULP_UART_RTS | ULP_I2C_SDA | | | | | | | | -| 1 | ULPPERH_ON_SOC_GPIO_1 | ULP_EGPIO[1] | ULP_SPI_DOUT | ULP_I2S_DOUT | ULP_UART_CTS | ULP_I2C_SCL | Timer0 | | | | | | | -| 2 | ULPPERH_ON_SOC_GPIO_2 | ULP_EGPIO[2] | ULP_SPI_DIN | ULP_I2S_WS | ULP_UART_RX | | COMP1_OUT | | | | | | | -| 4 | ULPPERH_ON_SOC_GPIO_4 | ULP_EGPIO[4] | ULP_SPI_CS1 | ULP_I2S_WS | ULP_UART_RTS | ULP_I2C_SDA | | NPSS_TEST_MODE_1 | | ULP_SPI_CLK | Timer0 | IR_INPUT | | -| 5 | ULPPERH_ON_SOC_GPIO_5 | ULP_EGPIO[5] | IR_OUTPUT | ULP_I2S_DOUT | ULP_UART_CTS | ULP_I2C_SCL | AUX_ULP_TRIG_0 | NPSS_TEST_MODE_2 | | ULP_SPI_DOUT | Timer1 | IR_OUTPUT | | -| 6 | ULPPERH_ON_SOC_GPIO_6 | ULP_EGPIO[6] | ULP_SPI_CS2 | ULP_I2S_DIN | ULP_UART_RX | ULP_I2C_SDA | | | | ULP_SPI_DIN | COMP1_OUT | AUX_ULP_TRIG_0 | | -| 7 | ULPPERH_ON_SOC_GPIO_7 | ULP_EGPIO[7] | IR_INPUT | ULP_I2S_CLK | ULP_UART_TX | ULP_I2C_SCL | Timer1 | | | ULP_SPI_CS0 | COMP2_OUT | AUX_ULP_TRIG_1 | NPSS_TEST_MODE_0 | -| 8 | ULPPERH_ON_SOC_GPIO_8 | ULP_EGPIO[8] | ULP_SPI_CLK | ULP_I2S_CLK | ULP_UART_CTS | ULP_I2C_SCL | Timer0 | | | | | | | -| 9 | ULPPERH_ON_SOC_GPIO_9 | ULP_EGPIO[9] | ULP_SPI_DIN | ULP_I2S_DIN | ULP_UART_RX | ULP_I2C_SDA | COMP1_OUT | | | | | | | -| 10 | ULPPERH_ON_SOC_GPIO_10 | ULP_EGPIO[10] | ULP_SPI_CS0 | ULP_I2S_WS | ULP_UART_RTS | IR_INPUT | | NPSS_TEST_MODE_0 | | | | | | -| 11 | ULPPERH_ON_SOC_GPIO_11 | ULP_EGPIO[11] | ULP_SPI_DOUT | ULP_I2S_DOUT | ULP_UART_TX | ULP_I2C_SDA | AUX_ULP_TRIG_0 | | | | | | | - -```C -/* Example for configuring GPIO10 in UART2_RX(mode 6) */ -#define PORT 0 -#define GPIO_PIN PIN10 -#define PAD_NUM 2 - -// Enable M4 Clock​ -sl_si91x_gpio_enable_clock((sl_si91x_gpio_select_clock_t)M4CLK_GPIO);​ - -// Enable pad selection for GPIO pin​ -sl_si91x_gpio_enable_pad_selection(PAD_NUM);​ - -// Enable pad receiver for GPIO pin (For Input GPIO)​ -sl_si91x_gpio_enable_pad_receiver(GPIO_PIN);​ - -// Set the pin mode for GPIO pin​ -sl_gpio_set_pin_mode(PORT, GPIO_PIN, MODE9, OUTPUT_VALUE);​ - -// Select the Virtual ULP GPIO Mode​ -sl_si91x_gpio_ulp_soc_mode((sl_si91x_gpio_select_clock_t)ULPCLK_GPIO, ULP_GPIO_4, MODE3)​ -``` - -##### ULP GPIO's - -The ULP GPIOs listed in the table below (ULP_GPIO_0 to ULP_GPIO_11) are available in the normal mode of operation (power states 3 and 4) and also in the ultra-low-power mode of operation (power states 1 and 2). For a description of power states, refer to the **SiWx917 Reference Manual** (contact [sales](https://www.silabs.com/about-us/contact-sales) for access). - -Each of these GPIO pin functions is controlled by the Special ULP register mentioned in **ULP GPIO's** section of the **SiWx917 Reference Manual** (contact [sales](https://www.silabs.com/about-us/contact-sales) for access). - -| PIN | ULP_GPIO | ULP_GPIO Mode 0 | ULP_GPIO Mode 1 | ULP_GPIO Mode 2 | ULP_GPIO Mode 3 | ULP_GPIO Mode 4 | ULP_GPIO Mode 5 | ULP_GPIO Mode 6 | ULP_GPIO Mode 7 | ULP_GPIO Mode 8 | ULP_GPIO Mode 9 | ULP_GPIO Mode 10 | ULP_GPIO Mode 11 | -| --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | -| 0 | ULP_GPIO_0 | ULP_EGPIO[0] | ULP_SPI_CLK | ULP_I2S_DIN | ULP_UART_RTS | ULP_I2C_SDA | | SOCPERH_ON_ULP_GPIO_0 | AGPIO_0 | | | | | -| 1 | ULP_GPIO_1 | ULP_EGPIO[1] | ULP_SPI_DOUT | ULP_I2S_DOUT | ULP_UART_CTS | ULP_I2C_SCL | Timer2 | SOCPERH_ON_ULP_GPIO_1 | AGPIO_1 | | | | | -| 2 | ULP_GPIO_2 | ULP_EGPIO[2] | ULP_SPI_DIN | ULP_I2S_WS | ULP_UART_RX | NPSS_GPIO_4 | COMP1_OUT | SOCPERH_ON_ULP_GPIO_2 | AGPIO_2 | | | | | -| 4 | ULP_GPIO_4 | ULP_EGPIO[4] | ULP_SPI_CS1 | ULP_I2S_WS | ULP_UART_RTS | ULP_I2C_SDA | AUX_ULP_TRIG_1 | SOCPERH_ON_ULP_GPIO_4 | AGPIO_4 | ULP_SPI_CLK | Timer0 | IR_INPUT | | -| 5 | ULP_GPIO_5 | ULP_EGPIO[5] | IR_OUTPUT | ULP_I2S_DOUT | ULP_UART_CTS | ULP_I2C_SCL | AUX_ULP_TRIG_0 | SOCPERH_ON_ULP_GPIO_5 | AGPIO_5 | ULP_SPI_DOUT | Timer1 | IR_OUTPUT | | -| 6 | ULP_GPIO_6 | ULP_EGPIO[6] | ULP_SPI_CS2 | ULP_I2S_DIN | ULP_UART_RX | ULP_I2C_SDA | | SOCPERH_ON_ULP_GPIO_6 | AGPIO_6 | ULP_SPI_DIN | COMP1_OUT | AUX_ULP_TRIG_0 | | -| 7 | ULP_GPIO_7 | ULP_EGPIO[7] | IR_INPUT | ULP_I2S_CLK | ULP_UART_TX | ULP_I2C_SCL | Timer1 | SOCPERH_ON_ULP_GPIO_7 | AGPIO_7 | ULP_SPI_CS0 | COMP2_OUT | AUX_ULP_TRIG_1 | NPSS_TEST_MODE_0 | -| 8 | ULP_GPIO_8 | ULP_EGPIO[8] | ULP_SPI_CLK | ULP_I2S_CLK | ULP_UART_CTS | ULP_I2C_SCL | Timer0 | SOCPERH_ON_ULP_GPIO_8 | AGPIO_8 | | | | | -| 9 | ULP_GPIO_9 | ULP_EGPIO[9] | ULP_SPI_DIN | ULP_I2S_DIN | ULP_UART_RX | ULP_I2C_SDA | NPSS_TEST_MODE_0 | SOCPERH_ON_ULP_GPIO_9 | AGPIO_9 | | | | | -| 10 | ULP_GPIO_10 | ULP_EGPIO[10] | ULP_SPI_CS0 | ULP_I2S_WS | ULP_UART_RTS | IR_INPUT | | SOCPERH_ON_ULP_GPIO_10 | AGPIO_10 | | | | | -| 11 | ULP_GPIO_11 | ULP_EGPIO[11] | ULP_SPI_DOUT | ULP_I2S_DOUT | ULP_UART_TX | ULP_I2C_SDA | AUX_ULP_TRIG_0 | SOCPERH_ON_ULP_GPIO_11 | AGPIO_11 | | | | | - -The following WiSeConnect SDK APIs are available for configuring the ULP GPIOs: -- `sl_gpio_set_pin_mode(4, PIN, MODE, OUTPUT_VALUE)` to set the mode for a ULP GPIO. -- `sl_si91x_gpio_set_pin_direction(4, PIN, DIR)` to set the direction. For example, if the mode is configured as 0 using the `sl_gpio_set_pin_mode()` API, the direction is 0 for output and 1 for input. -- `sl_si91x_gpio_enable_ulp_pad_receiver(PIN)` to enable ULP pad receiving if the pin is an input. - -The following is an example code snippet illustrating the use of the above APIs: - -```C -   /* Configuring GPIO_10 MODE as GPIO */ -  sl_gpio_set_pin_mode(4, 10, 0, 1); - -  /* Set GPIO_10 direction as OUTPUT */ -  sl_si91x_gpio_set_pin_direction(4, 10, 0); -``` - -##### Digital SoC GPIOs - -The ULP GPIOs configured for SoC Peripheral functionality (SOCPERH_ON_ULP_GPIO_0 to SOCPERH_ON_ULP_GPIO_11) are available only in the normal mode of operation (Power-states 4 and 3). For a description of power-states, refer to the **SiWx917 Reference Manual** (contact [sales](https://www.silabs.com/about-us/contact-sales) for access). - -Each of these GPIO pin functions is controlled by the GPIO Mode register mentioned in **SoC GPIO's** section of the **SiWx917 Reference Manual** (contact [sales](https://www.silabs.com/about-us/contact-sales) for access). - -> **Note:** These digital functions are only available in normal mode of operation PS3 and PS4. For more details, refer to powersave app note. - -| **PIN** | **PAD NUMBER** | **GPIO** | **GPIO Mode= 0** | **GPIO Mode= 1** | **GPIO Mode= 2** | **GPIO Mode= 3** | **GPIO Mode= 4** | **GPIO Mode= 5** | **GPIO Mode= 6** | **GPIO Mode= 7** | **GPIO Mode= 8** | **GPIO Mode= 9** | **GPIO Mode= 10** | **GPIO Mode= 11** | **GPIO Mode= 12** | **GPIO Mode*= 13** | -| ------- | -------------- | ---------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | --------------------- | -------------------------- | -------------------------- | -------------------------- | -------------------------- | -| 64 | 22 | SOCPERH_ON_ULP_GPIO_0 | GPIO_64 | SIO_0 | USART1_CLK | QEI_IDX | I2C1_SDA | I2C2_SCL | UART2_RS485_EN | SCT_IN_0 | PWM_1L | UART2_RTS | | USART1_IR_RX | PWM_1L | PMU_TEST_1 | -| 65 | 23 | SOCPERH_ON_ULP_GPIO_1 | GPIO_65 | SIO_1 | USART1_RX | QEI_PHA | I2C1_SCL | I2C2_SDA | UART2_RS485_RE | SCT_IN_1 | PWM_1H | UART2_CTS | | USART1_IR_TX | PWM_1H | PMU_TEST_2 | -| 66 | 24 | SOCPERH_ON_ULP_GPIO_2 | GPIO_66 | SIO_2 | | QEI_PHB | I2C1_SCL | I2C2_SCL | UART2_RS485_DE | SCT_IN_2 | PWM_2L | UART2_RX | PMU_TEST_1 | | | | -| 67 | 25 | SOCPERH_ON_ULP_GPIO_3 | GPIO_67 | SIO_3 | | QEI_DIR | I2C1_SDA | I2C2_SDA | | SCT_IN_3 | PWM_2H | UART2_TX | PMU_TEST_2 | | | | -| 68 | 26 | SOCPERH_ON_ULP_GPIO_4 | GPIO_68 | SIO_4 | USART1_TX | QEI_IDX | | | UART2_RX | SCT_OUT_0 | PWM_3L | SCT_IN_0 | PWM_FAULTA | USART1_RI | PWM_2L | SCT_OUT_4 | -| 69 | 27 | SOCPERH_ON_ULP_GPIO_5 | GPIO_69 | SIO_5 | USART1_RTS | QEI_PHA | | | UART2_TX | SCT_OUT_1 | PWM_3H | SCT_IN_1 | PWM_FAULTB | USART1_RS485_EN | PWM_2H | SCT_OUT_5 | -| 70 | 28 | SOCPERH_ON_ULP_GPIO_6 | GPIO_70 | SIO_6 | USART1_CTS | QEI_PHB | USART1_RX | I2C2_SCL | UART2_RTS | SCT_OUT_2 | PWM_4L | SCT_IN_2 | PWM_TMR_EXT_TRIG_1 | USART1_RS485_RE | PMU_TEST_1 | SCT_OUT_6 | -| 71 | 29 | SOCPERH_ON_ULP_GPIO_7 | GPIO_71 | SIO_7 | USART1_IR_RX | QEI_DIR | USART1_TX | I2C2_SDA | UART2_CTS | SCT_OUT_3 | PWM_4H | SCT_IN_3 | PWM_TMR_EXT_TRIG_2 | USART1_RS485_DE | PMU_TEST_2 | SCT_OUT_7 | -| 72 | 30 | SOCPERH_ON_ULP_GPIO_8 | GPIO_72 | SIO_0 | USART1_IR_TX | QEI_IDX | | | UART2_RX | SCT_OUT_4 | PWM_SLP_EVENT_TRIG | UART2_RTS | PWM_TMR_EXT_TRIG_3 | | | | -| 73 | 31 | SOCPERH_ON_ULP_GPIO_9 | GPIO_73 | SIO_1 | USART1_RS485_EN | QEI_PHA | | | UART2_TX | SCT_OUT_5 | PWM_FAULTA | UART2_CTS | PWM_TMR_EXT_TRIG_4 | | | | -| 74 | 32 | SOCPERH_ON_ULP_GPIO_10 | GPIO_74 | SIO_2 | USART1_RS485_RE | QEI_PHB | I2C1_SDA | | UART2_RS485_RE | SCT_OUT_6 | PWM_FAULTB | UART2_RX | PMU_TEST_1 | | | | -| 75 | 33 | SOCPERH_ON_ULP_GPIO_11 | GPIO_75 | SIO_3 | USART1_RS485_DE | QEI_DIR | I2C1_SCL | | UART2_RS485_DE | SCT_OUT_7 | PWM_TMR_EXT_TRIG_1 | UART2_TX | PMU_TEST_2 | | | | - -```C -// Enable GPIO ULP_CLK​ -sl_si91x_gpio_enable_clock((sl_si91x_gpio_select_clock_t)ULPCLK_GPIO);​ - -// Enable pad receiver for ULP GPIO pin​ -sl_si91x_gpio_enable_ulp_pad_receiver(ULP_PIN_8);​ - -// Set the pin mode for ULP GPIO pin​ -sl_gpio_set_pin_mode(SL_ULP_GPIO_PORT, ULP_PIN_8, MODE6, OUTPUT_VALUE);​ - -// Enable pad selection for SoC GPIO pin​ -sl_si91x_gpio_enable_pad_selection(30);​ - -// Set the pin mode for Virtual SoC GPIO pin​ -sl_gpio_set_pin_mode(PORT0, PIN72, MODE1, OUTPUT_VALUE); -``` +This section explains the procedure for utilizing a 32 kHz external oscillator with UULP_GPIOs. To enable this, users must install the "si91x_32kHz_external_oscillator" component, which provides the necessary configurations for UULP_GPIOs. Additionally, this component includes a UC for selecting the appropriate UULP_GPIO. The component switches the LF-FSM clock to the internal 32 kHz RC oscillator. + +> **Note** +Switching the LF-FSM clock to the internal 32 kHz RC oscillator may result in timer drifts due to the change in the clock source. ### User callback recommendation - In RTOS environment, Signaling mechanisms (Semaphore/Mutex/EventFlag etc.) are recommended instead of "Variables/Flags" from user callbacks to detect "*Transfer Complete*" for high-speed communication peripherals. @@ -522,6 +248,8 @@ The wakeup mode defines the bootloader sequence the SiWx917 will undergo once it >* Refer to the [Wi-Fi - TCP Tx on Periodic Wakeup (SoC)](https://github.com/SiliconLabs/wiseconnect/tree/master/examples/si91x_soc/wlan/tcp_tx_on_periodic_wakeup) example for a detailed >example of M4 sleep wakeup. > >* Enable SL_SI91X_ENABLE_LOWPWR_RET_LDO macro to optimize the deepsleep >power number. By default, it is disabled. +> +>* This flow will be deprecated. It is strongly recommended to use power manager with freeRTOS tickless. ### Front-End Switch Selection GPIOs @@ -620,8 +348,7 @@ The following table shows the possible combinations and the available options to | **Modes** | **Flash type** | **Flash Size** | **PSRAM (optional)** | -------------|------------------------|----------------|--------------------- | Common Flash | **Stacked** | 4MB | 2 MB (external) or 8 MB (external) -| | **External** | 8MB | 2 MB (stacked) -| | | 16MB | 8 MB +| | **External** | 8MB | 2 MB (stacked) | Dual Flash | **Stacked + External** | 4MB + 8MB | 2 MB | | | 4MB + 16MB | 8 MB diff --git a/examples/featured/aws_device_shadow/aws_device_shadow_ncp.slcp b/examples/featured/aws_device_shadow/aws_device_shadow_ncp.slcp index d094e59c8..b365d80d5 100644 --- a/examples/featured/aws_device_shadow/aws_device_shadow_ncp.slcp +++ b/examples/featured/aws_device_shadow/aws_device_shadow_ncp.slcp @@ -11,10 +11,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/aws_device_shadow/aws_device_shadow_psram.slcp b/examples/featured/aws_device_shadow/aws_device_shadow_psram.slcp index a2b325de3..ef530b528 100644 --- a/examples/featured/aws_device_shadow/aws_device_shadow_psram.slcp +++ b/examples/featured/aws_device_shadow/aws_device_shadow_psram.slcp @@ -13,10 +13,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/aws_device_shadow/aws_device_shadow_soc.slcp b/examples/featured/aws_device_shadow/aws_device_shadow_soc.slcp index fd5b6630d..f7ddfde04 100644 --- a/examples/featured/aws_device_shadow/aws_device_shadow_soc.slcp +++ b/examples/featured/aws_device_shadow/aws_device_shadow_soc.slcp @@ -11,10 +11,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -73,6 +73,10 @@ other_file: - path: resources/readme/image422.png - path: resources/readme/image431a.png - path: resources/readme/setup_soc_ncp.png +requires: +- name: device_needs_ram_execution + condition: + - si91x_common_flash ui_hints: highlight: - path: readme.md diff --git a/examples/featured/aws_device_shadow/aws_device_shadow_uart_ncp.slcp b/examples/featured/aws_device_shadow/aws_device_shadow_uart_ncp.slcp index f7c46f842..e1b567520 100644 --- a/examples/featured/aws_device_shadow/aws_device_shadow_uart_ncp.slcp +++ b/examples/featured/aws_device_shadow/aws_device_shadow_uart_ncp.slcp @@ -11,10 +11,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/aws_device_shadow/readme.md b/examples/featured/aws_device_shadow/readme.md index 3afcb6aaf..ea91880f7 100644 --- a/examples/featured/aws_device_shadow/readme.md +++ b/examples/featured/aws_device_shadow/readme.md @@ -20,10 +20,10 @@ This application demonstrates how to securely connect a Silicon Labs Si91x Wi-Fi device to AWS IoT Core to send and receive data. -To successfully use this application, developer should be familiar with the operation of [AWS IoT Core](https://docs.aws.amazon.com/iot/latest/developerguide/what-is-aws-iot.html) and the [AWS IoT Device Shadow Service](https://docs.aws.amazon.com/iot/latest/developerguide/iot-device-shadows.html). If you are new to AWS IoT Core, we recommend running through the [AWS IoT Core Tutorial](https://docs.aws.amazon.com/iot/latest/developerguide/iot-tutorials.html) before proceeding. +To successfully use this application, developers should be familiar with the operation of [AWS IoT Core](https://docs.aws.amazon.com/iot/latest/developerguide/what-is-aws-iot.html) and the [AWS IoT Device Shadow Service](https://docs.aws.amazon.com/iot/latest/developerguide/iot-device-shadows.html). If you are new to AWS IoT Core, we recommend running through the [AWS IoT Core Tutorial](https://docs.aws.amazon.com/iot/latest/developerguide/iot-tutorials.html) before proceeding. In the following text, 'AWS IoT Core' is referred to as 'AWS' for brevity. -AWS refer 'Device Shadow' as a persistent, virtual representation of a device that can be accessed even if the physical device is offline. The device state is captured in its 'shadow' and is represented in a JSON format. The physical device can send commands using the MQTT protocol to get, update and delete the state of the shadow as well as receive notifications via MQTT about changes in the state of the shadow. +AWS refers to 'Device Shadow' as a persistent, virtual representation of a device that can be accessed even if the physical device is offline. The device state is captured in its 'shadow' and is represented in a JSON format. The physical device can send commands using the MQTT protocol to get, update, and delete the state of the shadow as well as receive notifications via MQTT about changes in the state of the shadow. The AWS IoT Device Shadow application publishes temperature and window open/close status on the topic `$aws/things/thingname/shadow/update`. The room temperature and the window open/close status is available on the AWS cloud. @@ -95,8 +95,8 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise - Install the [Keil IDE](https://www.keil.com/). - Download [WiSeConnect 3 SDK](https://github.com/SiliconLabs/wiseconnect) - Update the device's connectivity firmware as mentioned [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/getting-started-with-ncp-mode-with-stm32#upgrade-the-si-wx91x-connectivity-firmware). - - Connect the SiWx91x NCP to STM32F411RE Nucleo Board following the below steps: - - Connect the male Arduino compatible header on carrier board to female Arduino compatible header on STM32F411RE Nucleo board. + - Connect the SiWx91x NCP to STM32F411RE Nucleo Board following the steps below. + - Connect the male Arduino compatible header on the carrier board to the female Arduino compatible header on the STM32F411RE Nucleo board. - Mount the NCP Radio board (BRD4346A/BRD4357A) onto the radio board socket available on the base board (BRD8045C). - After connecting all the boards, the setup should look like the image shown below: ![Figure: Setup](resources/readme/stm32_setup.png) @@ -105,7 +105,7 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ## Application Build Environment -The application can be configured to suit user requirements and development environment. Read through the following sections and make any changes needed. +The application can be configured to suit user requirements and the development environment. Read through the following sections and make any changes needed. ### Configure sl_net_default_values.h @@ -117,7 +117,7 @@ The application can be configured to suit user requirements and development envi ### STA instance related parameters - - DEFAULT_WIFI_CLIENT_PROFILE_SSID refers to the name with which Wi-Fi network that shall be advertised and Si91X module is connected to it. + - DEFAULT_WIFI_CLIENT_PROFILE_SSID refers to the name of the Wi-Fi network that shall be advertised and the Si91X module connected to it. ```c #define DEFAULT_WIFI_CLIENT_PROFILE_SSID "YOUR_AP_SSID" @@ -137,44 +137,44 @@ The application can be configured to suit user requirements and development envi - Other STA instance configurations can be modified if required in `default_wifi_client_profile` configuration structure. -### Configure the below parameters in `aws_iot_config.h` file present at `/config` +### Configure the following parameters in the `aws_iot_config.h` file present at `/config` -> - Before configuring the parameters in `aws_iot_config.h`, register the SiWx917 device in the AWS IoT registry by following the steps mentioned in [Create an AWS Thing](#create-an-aws-thing) section. +> - Before configuring the parameters in `aws_iot_config.h`, register the SiWx917 device in the AWS IoT registry by following the steps described in [Create an AWS Thing](#create-an-aws-thing) section. -> - Configure AWS_IOT_MQTT_HOST macro with the device data endpoint to connect to AWS. For getting the device data endpoint in the AWS IoT Console navigate to Settings and copy the Endpoint and define the AWS_IOT_MQTT_HOST macro with this value. +> - Configure AWS_IOT_MQTT_HOST macro with the device data endpoint to connect to AWS. To get the device data endpoint in the AWS IoT Console, navigate to Settings, copy the Endpoint, and define the AWS_IOT_MQTT_HOST macro with this value. ![AWS_IOT_MQTT_HOST_NAME](resources/readme/aws_iot_mqtt_host_url_1.png) ```c #define AWS_IOT_MQTT_HOST "a2m21kovu9tcsh-ats.iot.us-east-2.amazonaws.com" ///< Customer specific MQTT HOST. The same will be used for Thing Shadow - #define AWS_IOT_MQTT_PORT 8883 ///< default port for MQTT/S + #define AWS_IOT_MQTT_PORT 8883 ///< Default port for MQTT/S #define AWS_IOT_MQTT_CLIENT_ID "silicon_labs_thing" ///< MQTT client ID should be unique for every device #define AWS_IOT_MY_THING_NAME "silicon_labs_thing" ///< Thing Name of the Shadow this device is associated with ``` -> - To authenticate and securely connect with AWS, the SiWx917 device requires a unique x.509 security certificate and private key, as well as a CA certificate. At this point, you must be having device certificate, private key and CA certificate which are downloaded during the creation/registration of AWS Thing. +> - To authenticate and securely connect with AWS, the SiWx917 device requires a unique x.509 security certificate and private key, as well as a CA certificate. At this point, you must have a device certificate, private key, and CA certificate, which are downloaded during the creation/registration of AWS Thing. -> - By default the certificate and private key that are downloaded from the AWS are in [.pem format](https://en.wikipedia.org/wiki/Privacy-Enhanced_Mail). To load the certificate and private key to the SiWx917, the certificate and private key should be converted into a C-array. For converting the certificates and private key into C-array refer to [Setting up Security Certificates](#setting-up-security-certificates). +> - By default, the certificate and private key that are downloaded from the AWS are in [.pem format](https://en.wikipedia.org/wiki/Privacy-Enhanced_Mail). To load the certificate and private key to the SiWx917, the certificate and private key should be converted into a C-array. For converting the certificates and private key into C-array, refer to [Setting up Security Certificates](#setting-up-security-certificates). -> - By default the WiSeConnect 3 SDK contains the Starfield Root CA Certificate in C-array format. +> - By default, the WiSeConnect 3 SDK contains the Starfield Root CA Certificate in C-array format. > **Note** : - The included Cloud connectivity certificates are for reference only, using default certificates in the release, cloud connection doesn't work. Please replace the default certificates with valid certificates while connecting to appropriate Cloud/OpenSSL Server. + The included Cloud connectivity certificates are for reference only. If using default certificates in the release, the cloud connection will not work. Replace the default certificates with valid certificates while connecting to the appropriate Cloud/OpenSSL Server. ## Test the Application -### Instructions for Simplicity Studio IDE and Silicon Labs devices (SoC and NCP Modes) +### Instructions for Simplicity Studio IDE and Silicon Labs Devices (SoC and NCP Modes) Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: - Build the application -- Flash, run and debug the application. +- Flash, run, and debug the application. ### Instructions for Keil IDE and STM32F411RE MCU - Build the application. - Set the Docklight up by connecting STM32's Serial COM port. This enables you to view the application prints. -- Flash, run and debug the application. +- Flash, run, and debug the application. After successful execution, the device updates are written to the AWS cloud and they can be observed in the AWS thing shadow. @@ -184,10 +184,10 @@ After successful execution, the device updates are written to the AWS cloud and ### Setting up Security Certificates -- The WiSeConnect 3 SDK provides a conversion script (written in Python 3) to make the conversion straightforward. The script, [certificate_to_array.py](https://github.com/SiliconLabs/wiseconnect/tree/master/resources/certificates/) +- The WiSeConnect 3 SDK provides a conversion script (written in Python 3) to make the conversion straightforward. The script, [certificate_to_array.py](https://github.com/SiliconLabs/wiseconnect/tree/master/resources/certificates/), is provided in the SDK at `/resources/scripts` directory. -- Copy the downloaded device certificate, private key from AWS and also the certificate_to_array.py to the `/resources/certificates`. +- Copy the downloaded device certificate, private key from AWS, and also the certificate_to_array.py to the `/resources/certificates`. - To convert the device certificate and private key to C arrays, open a system command prompt in the same path and give the following commands. @@ -216,29 +216,36 @@ is provided in the SDK at `/resources/scripts` directory. - The Starfield Root CA certificate used by your Wi-Fi device to verify the AWS server is already included in the WiSeConnect 3 SDK at `/resources/certificates`; no additional setup is required. > **NOTE :** -> Amazon uses [Starfield Technologies](https://www.starfieldtech.com/) to secure the AWS website, the WiSeConnect SDK includes the [Starfield CA Certificate](https://github.com/SiliconLabs/wiseconnect/tree/master/resources/certificates/aws_starfield_ca.pem.h). +> Amazon uses [Starfield Technologies](https://www.starfieldtech.com/) to secure the AWS website. The WiSeConnect SDK includes the [Starfield CA Certificate](https://github.com/SiliconLabs/wiseconnect/tree/master/resources/certificates/aws_starfield_ca.pem.h). +> +> AWS has announced that there will be changes in their root CA chain. More details can be found in the reference link: (https://aws.amazon.com/blogs/security/acm-will-no-longer-cross-sign-certificates-with-starfield-class-2-starting-august-2024/) > -> For AWS connectivity, StarField Root CA Class 2 certificate has the highest authority being at the top of the signing hierarchy. +> We are providing both root CAs (Starfield class-2 and Starfield G2) in aws_starfield_ca.pem.h, which is located in the WiSeConnect directory `/resources/certificates/aws_starfield_ca.pem.h` > -> The StarField Root CA Class 2 certificate is an expected/required certificate which usually comes pre-installed in the operating systems and plays a key part in certificate chain verification when a device is performing TLS authentication with the IoT endpoint. +> For AWS connectivity, StarField Root CA certificate has the highest authority being at the top of the signing hierarchy. > -> On SiWx91x device, we do not maintain the root CA trust repository due to memory constraints, so it is mandatory to load Starfield Root CA Class 2 certificate for successful mutual authentication to the AWS server. +> The StarField Root CA certificate is an expected/required certificate which usually comes pre-installed in the operating systems and plays a key part in certificate chain verification when a device is performing TLS authentication with the IoT endpoint. +> +> On the SiWx91x device, we do not maintain the root CA trust repository due to memory constraints, so it is mandatory to load the Starfield Root CA certificate for successful mutual authentication to the AWS server. > > The certificate chain sent by AWS server is as below: -> id-at-commonName=Amazon,id-at-organizationalUnitName=Server CA 1B,id-at-organizationName=Amazon,id-at-countryName=US +> Starfield Class 2 : +> id-at-commonName=Amazon,RSA 2048 M01,id-at-organizationName=Amazon,id-at-countryName=US > id-at-commonName=Amazon Root CA 1,id-at-organizationName=Amazon,id-at-countryName=US -> id-at-commonName=Starfield Services Root Certificate Authority ,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at- stateOrProvinceName=Arizona,id-at-countryName=US) +> id-at-commonName=Starfield Services Root Certificate Authority - G2,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at- stateOrProvinceName=Arizona,id-at-countryName=US +>id-at-organizationalUnitName=Starfield Class 2 Certification Authority,id-at-organizationName=Starfield Technologies, Inc.,id-at-countryName=US > -> On SiWx91x to authenticate the AWS server, firstly Root CA is validated (validate the Root CA received with the Root CA loaded on the device). Once the Root CA validation is successful, other certificates sent from the AWS server are validated. -> SiWx91x doesn't authenticate to AWS server if intermediate CA certificates are loaded instead of Starfield Root CA Class 2 certificate and would result in a Handshake error. -> StarField Root CA Class 2 certificate is at +> Starfield G2: +> id-at-commonName=Amazon RSA 2048 M01,id-at-organizationName=Amazon,id-at-countryName=US +> id-at-commonName=Amazon Root CA 1,id-at-organizationName=Amazon,id-at-countryName=US +> id-at-commonName=Starfield Services Root Certificate Authority - G2,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at-stateOrProvinceName=Arizona,id-at-countryName=US > -> Reference links : -> +> To authenticate the AWS server on SiWx91x, first validate the Root CA (validate the Root CA received with the Root CA loaded on the device). Once the Root CA validation is successful, other certificates sent from the AWS server are validated. +> If intermediate CA certificates are loaded instead of the Starfield Root CA certificate, the SiWx91x will not authenticate to the AWS server, resulting in a Handshake error. ### Create an AWS Thing - **Thing Note**: By default we are giving ThingName: silicon_labs_thing, these related configuration we set default If you want your own thing name you can follow the below procedure. + **Thing Note**: By default, we are naming ThingName as: silicon_labs_thing. If you want your own thing name, you can follow the procedure below. Create a thing in the AWS IoT registry to represent your IoT device. @@ -258,27 +265,27 @@ Create a thing in the AWS IoT registry to represent your IoT device. ![Add Device 1](resources/readme/aws_create_thing_step4.png) -- During **Configure device certificate** step, choose **Auto-generate a new certificate (recommended)** option and click next. +- During the **Configure device certificate** step, choose **Auto-generate a new certificate (recommended)** option and click next. ![Add Device 2](resources/readme/aws_create_thing_step5.png) -- Attach the policy to the thing created +- Attach the policy to the thing created. - - If you have any existing policy, attach it and click on create thing + - If you have any existing policy, attach it and click on create thing. ![Attach policy](resources/readme/aws_choosing_policy.png) -- If policy is not yet created, follow the below steps. - - Choose **Create policy** and fill the fields as per your requrements. +- If the policy is not yet created, follow the below steps. + - Choose **Create policy** and fill in the fields as per your requirements. ![Create policy](resources/readme/aws_create_thing_attach_policy.png) - - Give the **Name** to your Policy, Fill **Action** and **Resource ARN** as shown in below image, Click on **Allow** under **Effect** and click **Create**. + - Give the **Name** to your Policy. Fill in the **Action** and **Resource ARN** fields as shown in the image below. Click on **Allow** under **Effect** and click **Create**. ![Filling fields for policy](resources/readme/aws_create_thing_policy_create.png) - - choose the created policy and click on **Create thing**. + - Choose the created policy and click on **Create thing**. - Choose the **Download** links to download the device certificate and private key. Note that Root CA certificate is already present in SDK (aws_starfield_ca.pem.h), and can be directly used. - > **Warning:** This is the only instance you can download your device certificate and private key. Make sure to save them safely. + > **Warning:** This is the only instance you can download your device certificate and private key. Make sure to save them securely. ![Downloading certificates](resources/readme/aws_thing_certificates_download.png) diff --git a/examples/featured/ble_per/ble_per_ncp.slcp b/examples/featured/ble_per/ble_per_ncp.slcp index 32f15f18c..5ab5bf2d6 100644 --- a/examples/featured/ble_per/ble_per_ncp.slcp +++ b/examples/featured/ble_per/ble_per_ncp.slcp @@ -13,10 +13,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/ble_per/ble_per_psram.slcp b/examples/featured/ble_per/ble_per_psram.slcp index b93d2b564..62f3f40e5 100644 --- a/examples/featured/ble_per/ble_per_psram.slcp +++ b/examples/featured/ble_per/ble_per_psram.slcp @@ -13,10 +13,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/ble_per/ble_per_soc.slcp b/examples/featured/ble_per/ble_per_soc.slcp index df094843c..6cb159049 100644 --- a/examples/featured/ble_per/ble_per_soc.slcp +++ b/examples/featured/ble_per/ble_per_soc.slcp @@ -13,10 +13,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/ble_per/ble_per_uart_ncp.slcp b/examples/featured/ble_per/ble_per_uart_ncp.slcp index 22fc4c0f5..9ff735fd3 100644 --- a/examples/featured/ble_per/ble_per_uart_ncp.slcp +++ b/examples/featured/ble_per/ble_per_uart_ncp.slcp @@ -13,10 +13,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/firmware_update/firmware_update_fg25_ncp.slcp b/examples/featured/firmware_update/firmware_update_fg25_ncp.slcp index 597202490..0c4331f3a 100644 --- a/examples/featured/firmware_update/firmware_update_fg25_ncp.slcp +++ b/examples/featured/firmware_update/firmware_update_fg25_ncp.slcp @@ -12,10 +12,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/firmware_update/firmware_update_ncp.slcp b/examples/featured/firmware_update/firmware_update_ncp.slcp index 3dc772100..15f934c51 100644 --- a/examples/featured/firmware_update/firmware_update_ncp.slcp +++ b/examples/featured/firmware_update/firmware_update_ncp.slcp @@ -12,10 +12,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/firmware_update/firmware_update_psram.slcp b/examples/featured/firmware_update/firmware_update_psram.slcp index 433a0fdb8..dc5dea654 100644 --- a/examples/featured/firmware_update/firmware_update_psram.slcp +++ b/examples/featured/firmware_update/firmware_update_psram.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/firmware_update/firmware_update_soc.slcp b/examples/featured/firmware_update/firmware_update_soc.slcp index 366b00e9b..dbb2d6f20 100644 --- a/examples/featured/firmware_update/firmware_update_soc.slcp +++ b/examples/featured/firmware_update/firmware_update_soc.slcp @@ -12,10 +12,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/firmware_update/firmware_update_uart_ncp.slcp b/examples/featured/firmware_update/firmware_update_uart_ncp.slcp index b639992b1..706bceba6 100644 --- a/examples/featured/firmware_update/firmware_update_uart_ncp.slcp +++ b/examples/featured/firmware_update/firmware_update_uart_ncp.slcp @@ -12,10 +12,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/low_power/power_save_deep_sleep/app.c b/examples/featured/low_power/power_save_deep_sleep/app.c index 926b52335..56504ad2e 100644 --- a/examples/featured/low_power/power_save_deep_sleep/app.c +++ b/examples/featured/low_power/power_save_deep_sleep/app.c @@ -40,12 +40,20 @@ #include "sl_si91x_power_manager.h" #endif // SLI_SI91X_MCU_INTERFACE +/****************************************************** +* Constants +******************************************************/ +#define POWER_SAVE_PROFILE STANDBY_POWER_SAVE + /****************************************************** * Function Declarations ******************************************************/ static void application_start(void *argument); static void enable_standby(void); + +#ifndef SLI_SI91X_MCU_INTERFACE static void enable_high_performance(void); +#endif /****************************************************** * Variable Definitions @@ -106,49 +114,64 @@ static void application_start(void *argument) // Initialize the Wi-Fi client interface status = sl_net_init(SL_NET_WIFI_CLIENT_INTERFACE, &station_init_configuration, NULL, NULL); if (status != SL_STATUS_OK) { - printf("Failed to bring Wi-Fi client interface up: 0x%lx\r\n", status); + printf("\r\nFailed to bring Wi-Fi client interface up: 0x%lX\r\n", status); return; } - printf("Wi-Fi interface up Success\r\n"); + printf("\r\nWi-Fi client interface init success\r\n"); #ifdef SLI_SI91X_MCU_INTERFACE uint8_t xtal_enable = 1; // Establish a secure handshake between the M4 core and the NWP status = sl_si91x_m4_ta_secure_handshake(SL_SI91X_ENABLE_XTAL, 1, &xtal_enable, 0, NULL); if (status != SL_STATUS_OK) { - printf("Failed to bring m4_ta_secure_handshake: 0x%lx\r\n", status); + printf("\r\nFailed to bring m4_ta_secure_handshake: 0x%lX\r\n", status); return; } - printf("m4_ta_secure_handshake Success\r\n"); + printf("\r\nm4_ta_secure_handshake Success\r\n"); #endif // Enabling low-power standby mode enable_standby(); - printf("NWP is in power save mode \n"); + printf("\r\nNWP is in power save mode\r\n"); #ifdef SLI_SI91X_MCU_INTERFACE printf("\r\nM4 in Sleep\r\n"); status = sl_si91x_power_manager_add_ps_requirement(SL_SI91X_POWER_MANAGER_PS0); if (status != SL_STATUS_OK) { // If status is not OK, return with the error code. - printf("sl_si91x_power_manager_add_ps_requirement failed, Error Code: 0x%lX \n", status); + printf("\r\nsl_si91x_power_manager_add_ps_requirement failed, Error Code: 0x%lX\r\n", status); } else { printf("\r\nM4 wake up\r\n"); } #else - osDelay(10000); -#endif + osDelay(30000); + + if (POWER_SAVE_PROFILE == STANDBY_POWER_SAVE_WITH_RAM_RETENTION) { + + // Brings the NWP out of power save mode + enable_high_performance(); + printf("\r\nNWP comes out of power save mode\r\n"); + + } else if (POWER_SAVE_PROFILE == STANDBY_POWER_SAVE) { + + // Initialize the Wi-Fi client interface + status = sl_net_init(SL_NET_WIFI_CLIENT_INTERFACE, &station_init_configuration, NULL, NULL); + if (status != SL_STATUS_OK) { + printf("\r\nFailed to bring Wi-Fi client interface up: 0x%lX\r\n", status); + return; + } + printf("\r\nWi-Fi client interface init success\r\n"); + } - // Brings the NWP out of power save mode - enable_high_performance(); - printf("NWP comes out of power save mode \n"); printf("\r\nExample Demonstration Completed\r\n"); + +#endif } static void enable_standby(void) { - sl_wifi_performance_profile_t performance_profile = { .profile = STANDBY_POWER_SAVE }; + sl_wifi_performance_profile_t performance_profile = { .profile = POWER_SAVE_PROFILE }; sl_status_t status = sl_wifi_set_performance_profile(&performance_profile); if (status != SL_STATUS_OK) { @@ -158,14 +181,16 @@ static void enable_standby(void) printf("\r\nPower save profile with deep sleep Success \r\n"); } +#ifndef SLI_SI91X_MCU_INTERFACE static void enable_high_performance(void) { sl_wifi_performance_profile_t performance_profile = { .profile = HIGH_PERFORMANCE }; sl_status_t status = sl_wifi_set_performance_profile(&performance_profile); if (status != SL_STATUS_OK) { - printf("\r\nPower save profile with deep sleep Failed, Error Code : 0x%lX\r\n", status); + printf("\r\nFailed to keep module in HIGH_PERFORMANCE mode, Error Code : 0x%lX\r\n", status); return; } - printf("\r\nPower save profile with deep sleep Success\r\n"); + printf("\r\nModule is in HIGH_PERFORMANCE mode\r\n"); } +#endif diff --git a/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_ncp.slcp b/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_ncp.slcp index e959e70ab..9da5807a1 100644 --- a/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_ncp.slcp +++ b/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_soc.slcp b/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_soc.slcp index 48f7c3d5d..eecf0d502 100644 --- a/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_soc.slcp +++ b/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_uart_ncp.slcp b/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_uart_ncp.slcp index c0ee83373..ff0f11ce8 100644 --- a/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_uart_ncp.slcp +++ b/examples/featured/low_power/power_save_deep_sleep/power_save_deep_sleep_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/powersave_standby_associated/app.c b/examples/featured/low_power/powersave_standby_associated/app.c similarity index 97% rename from examples/featured/powersave_standby_associated/app.c rename to examples/featured/low_power/powersave_standby_associated/app.c index 1f982915b..2c6e8e548 100644 --- a/examples/featured/powersave_standby_associated/app.c +++ b/examples/featured/low_power/powersave_standby_associated/app.c @@ -1,244 +1,244 @@ -/***************************************************************************/ /** - * @file - * @brief Powersave Standby Associated Example Application - ******************************************************************************* - * # License - * Copyright 2022 Silicon Laboratories Inc. www.silabs.com - ******************************************************************************* - * - * SPDX-License-Identifier: Zlib - * - * The licensor of this software is Silicon Laboratories Inc. - * - * This software is provided 'as-is', without any express or implied - * warranty. In no event will the authors be held liable for any damages - * arising from the use of this software. - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software - * in a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - ******************************************************************************/ - -#include "sl_status.h" -#include "sl_board_configuration.h" -#include "cmsis_os2.h" -#include "errno.h" -#include "sl_wifi.h" -#include "sl_net.h" -#include "socket.h" -#include "sl_utility.h" -#include "sl_net_si91x.h" -#include "sl_wifi_callback_framework.h" -#include "sl_si91x_driver.h" -#include - -#ifdef SLI_SI91X_MCU_INTERFACE -#include "sl_si91x_m4_ps.h" -#endif - -/****************************************************** - * Macros - ******************************************************/ -#define SERVER_IP_ADDRESS "192.168.50.40" -#define DATA "HellofromUDPclient!!!" -#define SERVER_PORT 5001 -#define NUMBER_OF_PACKETS 1000 -#define BROADCAST_DROP_THRESHOLD 5000 -#define BROADCAST_IN_TIM 1 -#define BROADCAST_TIM_TILL_NEXT_COMMAND 1 - -/****************************************************** - * Constants - ******************************************************/ -static const sl_wifi_device_configuration_t station_init_configuration = { - .boot_option = LOAD_NWP_FW, - .mac_address = NULL, - .band = SL_SI91X_WIFI_BAND_2_4GHZ, - .boot_config = { .oper_mode = SL_SI91X_CLIENT_MODE, - .coex_mode = SL_SI91X_WLAN_ONLY_MODE, - .feature_bit_map = - (SL_SI91X_FEAT_SECURITY_OPEN | SL_SI91X_FEAT_AGGREGATION | SL_SI91X_FEAT_ULP_GPIO_BASED_HANDSHAKE -#ifdef SLI_SI91X_MCU_INTERFACE - | SL_SI91X_FEAT_WPS_DISABLE -#endif - ), - .tcp_ip_feature_bit_map = (SL_SI91X_TCP_IP_FEAT_DHCPV4_CLIENT | SL_SI91X_TCP_IP_FEAT_DNS_CLIENT - | SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID), - .custom_feature_bit_map = (SL_SI91X_CUSTOM_FEAT_EXTENTION_VALID), - .ext_custom_feature_bit_map = (SL_SI91X_EXT_FEAT_LOW_POWER_MODE | SL_SI91X_EXT_FEAT_XTAL_CLK - | SL_SI91X_EXT_FEAT_UART_SEL_FOR_DEBUG_PRINTS | MEMORY_CONFIG -#ifdef SLI_SI917 - | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 -#endif - ), - .bt_feature_bit_map = 0, - .ext_tcp_ip_feature_bit_map = SL_SI91X_CONFIG_FEAT_EXTENTION_VALID, - .ble_feature_bit_map = 0, - .ble_ext_feature_bit_map = 0, - .config_feature_bit_map = (SL_SI91X_FEAT_SLEEP_GPIO_SEL_BITMAP | SL_SI91X_ENABLE_ENHANCED_MAX_PSP) } -}; - -/****************************************************** - * Function Declarations - ******************************************************/ -static void application_start(void *argument); -sl_status_t send_data(void); - -/****************************************************** - * Static Inline Functions - ******************************************************/ -static inline void print_errno(void) -{ - printf("\r\nerrno: %d\r\n", errno); -} - -/****************************************************** - * Variable Definitions - ******************************************************/ - -const osThreadAttr_t thread_attributes = { - .name = "app", - .attr_bits = 0, - .cb_mem = 0, - .cb_size = 0, - .stack_mem = 0, - .stack_size = 3072, - .priority = osPriorityLow, - .tz_module = 0, - .reserved = 0, -}; - -/****************************************************** - * Function Definitions - ******************************************************/ - -void app_init(const void *unused) -{ - UNUSED_PARAMETER(unused); - osThreadNew((osThreadFunc_t)application_start, NULL, &thread_attributes); -} - -static void application_start(void *argument) -{ - UNUSED_PARAMETER(argument); - sl_status_t status; - sl_wifi_performance_profile_t performance_profile = { .profile = ASSOCIATED_POWER_SAVE_LOW_LATENCY }; - sl_wifi_firmware_version_t version = { 0 }; - sl_mac_address_t mac_addr = { 0 }; - - status = sl_net_init(SL_NET_WIFI_CLIENT_INTERFACE, &station_init_configuration, NULL, NULL); - if (status != SL_STATUS_OK) { - printf("Failed to start Wi-Fi Client interface: 0x%lx\r\n", status); - return; - } - status = sl_wifi_get_mac_address(SL_WIFI_CLIENT_INTERFACE, &mac_addr); - if (status == SL_STATUS_OK) { - printf("Device MAC address: %x:%x:%x:%x:%x:%x\r\n", - mac_addr.octet[0], - mac_addr.octet[1], - mac_addr.octet[2], - mac_addr.octet[3], - mac_addr.octet[4], - mac_addr.octet[5]); - } else { - printf("Failed to get mac address: 0x%lx\r\n", status); - } - status = sl_wifi_get_firmware_version(&version); - if (status != SL_STATUS_OK) { - printf("\r\nFailed to fetch firmware version: 0x%lx\r\n", status); - } else { - print_firmware_version(&version); - } - - status = sl_net_up(SL_NET_WIFI_CLIENT_INTERFACE, SL_NET_DEFAULT_WIFI_CLIENT_PROFILE_ID); - if (status != SL_STATUS_OK) { - printf("Failed to bring Wi-Fi client interface up: 0x%lx\r\n", status); - return; - } - printf("\r\nWi-Fi client connected\r\n"); - - status = sl_wifi_filter_broadcast(BROADCAST_DROP_THRESHOLD, BROADCAST_IN_TIM, BROADCAST_TIM_TILL_NEXT_COMMAND); - if (status != SL_STATUS_OK) { - printf("\r\nsl_wifi_filter_broadcast Failed, Error Code : 0x%lX\r\n", status); - return; - } - // set performance profile - status = sl_wifi_set_performance_profile(&performance_profile); - if (status != SL_STATUS_OK) { - printf("\r\nPower save configuration Failed, Error Code : 0x%lX\r\n", status); - return; - } - - status = send_data(); - if (status != SL_STATUS_OK) { - printf("\r\nSend data failed with status %lx\r\n", status); - return; - } - printf("\r\nExample Demonstration Completed\r\n"); - -#ifdef SLI_SI91X_MCU_INTERFACE - -#if (SL_SI91X_TICKLESS_MODE == 0) - sl_si91x_m4_sleep_wakeup(); -#else - osSemaphoreId_t wait_semaphore; - wait_semaphore = osSemaphoreNew(1, 0, NULL); - if (wait_semaphore == NULL) { - printf("Failed to create semaphore\r\n"); - return; - } - // Waiting forever using semaphore to put M4 to sleep in tick less mode - osSemaphoreAcquire(wait_semaphore, osWaitForever); -#endif - -#endif -} - -sl_status_t send_data(void) -{ - int32_t bytes_sent = -1; - int32_t total_num_of_bytes = 0; - int32_t packet_count = 0; - struct sockaddr_in address = { 0 }; - sl_ipv4_address_t server_ip = { 0 }; - - //create UDP socket - int32_t socket_fd = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP); - if (socket_fd < 0) { - printf("\r\nSocket Create failed with bsd error: %d\r\n", errno); - return SL_STATUS_FAIL; - } - printf("\r\nUDP Client Socket Creation Success\r\n"); - - sl_net_inet_addr((char *)SERVER_IP_ADDRESS, (uint32_t *)&server_ip); - - //send data to server - address.sin_port = SERVER_PORT; - address.sin_addr.s_addr = server_ip.value; - - while (packet_count < NUMBER_OF_PACKETS) { - bytes_sent = - sendto(socket_fd, (uint8_t *)DATA, (sizeof(DATA) - 1), 0, (const struct sockaddr *)&address, sizeof(address)); - if (bytes_sent < 0) { - printf("\r\nSend failed with bsd error: %d\r\n", errno); - close(socket_fd); - return SL_STATUS_FAIL; - } - total_num_of_bytes += bytes_sent; - packet_count++; - } - - printf("\r\nTotal number of bytes sent: %ld\r\n", total_num_of_bytes); - close(socket_fd); - - return SL_STATUS_OK; -} +/***************************************************************************/ /** + * @file + * @brief Powersave Standby Associated Example Application + ******************************************************************************* + * # License + * Copyright 2022 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#include "sl_status.h" +#include "sl_board_configuration.h" +#include "cmsis_os2.h" +#include "errno.h" +#include "sl_wifi.h" +#include "sl_net.h" +#include "socket.h" +#include "sl_utility.h" +#include "sl_net_si91x.h" +#include "sl_wifi_callback_framework.h" +#include "sl_si91x_driver.h" +#include + +#ifdef SLI_SI91X_MCU_INTERFACE +#include "sl_si91x_m4_ps.h" +#endif + +/****************************************************** + * Macros + ******************************************************/ +#define SERVER_IP_ADDRESS "192.168.50.40" +#define DATA "HellofromUDPclient!!!" +#define SERVER_PORT 5001 +#define NUMBER_OF_PACKETS 1000 +#define BROADCAST_DROP_THRESHOLD 5000 +#define BROADCAST_IN_TIM 1 +#define BROADCAST_TIM_TILL_NEXT_COMMAND 1 + +/****************************************************** + * Constants + ******************************************************/ +static const sl_wifi_device_configuration_t station_init_configuration = { + .boot_option = LOAD_NWP_FW, + .mac_address = NULL, + .band = SL_SI91X_WIFI_BAND_2_4GHZ, + .boot_config = { .oper_mode = SL_SI91X_CLIENT_MODE, + .coex_mode = SL_SI91X_WLAN_ONLY_MODE, + .feature_bit_map = + (SL_SI91X_FEAT_SECURITY_OPEN | SL_SI91X_FEAT_AGGREGATION | SL_SI91X_FEAT_ULP_GPIO_BASED_HANDSHAKE +#ifdef SLI_SI91X_MCU_INTERFACE + | SL_SI91X_FEAT_WPS_DISABLE +#endif + ), + .tcp_ip_feature_bit_map = (SL_SI91X_TCP_IP_FEAT_DHCPV4_CLIENT | SL_SI91X_TCP_IP_FEAT_DNS_CLIENT + | SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID), + .custom_feature_bit_map = (SL_SI91X_CUSTOM_FEAT_EXTENTION_VALID), + .ext_custom_feature_bit_map = (SL_SI91X_EXT_FEAT_LOW_POWER_MODE | SL_SI91X_EXT_FEAT_XTAL_CLK + | SL_SI91X_EXT_FEAT_UART_SEL_FOR_DEBUG_PRINTS | MEMORY_CONFIG +#ifdef SLI_SI917 + | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 +#endif + ), + .bt_feature_bit_map = 0, + .ext_tcp_ip_feature_bit_map = SL_SI91X_CONFIG_FEAT_EXTENTION_VALID, + .ble_feature_bit_map = 0, + .ble_ext_feature_bit_map = 0, + .config_feature_bit_map = (SL_SI91X_FEAT_SLEEP_GPIO_SEL_BITMAP | SL_SI91X_ENABLE_ENHANCED_MAX_PSP) } +}; + +/****************************************************** + * Function Declarations + ******************************************************/ +static void application_start(void *argument); +sl_status_t send_data(void); + +/****************************************************** + * Static Inline Functions + ******************************************************/ +static inline void print_errno(void) +{ + printf("\r\nerrno: %d\r\n", errno); +} + +/****************************************************** + * Variable Definitions + ******************************************************/ + +const osThreadAttr_t thread_attributes = { + .name = "app", + .attr_bits = 0, + .cb_mem = 0, + .cb_size = 0, + .stack_mem = 0, + .stack_size = 3072, + .priority = osPriorityLow, + .tz_module = 0, + .reserved = 0, +}; + +/****************************************************** + * Function Definitions + ******************************************************/ + +void app_init(const void *unused) +{ + UNUSED_PARAMETER(unused); + osThreadNew((osThreadFunc_t)application_start, NULL, &thread_attributes); +} + +static void application_start(void *argument) +{ + UNUSED_PARAMETER(argument); + sl_status_t status; + sl_wifi_performance_profile_t performance_profile = { .profile = ASSOCIATED_POWER_SAVE_LOW_LATENCY }; + sl_wifi_firmware_version_t version = { 0 }; + sl_mac_address_t mac_addr = { 0 }; + + status = sl_net_init(SL_NET_WIFI_CLIENT_INTERFACE, &station_init_configuration, NULL, NULL); + if (status != SL_STATUS_OK) { + printf("Failed to start Wi-Fi Client interface: 0x%lx\r\n", status); + return; + } + status = sl_wifi_get_mac_address(SL_WIFI_CLIENT_INTERFACE, &mac_addr); + if (status == SL_STATUS_OK) { + printf("Device MAC address: %x:%x:%x:%x:%x:%x\r\n", + mac_addr.octet[0], + mac_addr.octet[1], + mac_addr.octet[2], + mac_addr.octet[3], + mac_addr.octet[4], + mac_addr.octet[5]); + } else { + printf("Failed to get mac address: 0x%lx\r\n", status); + } + status = sl_wifi_get_firmware_version(&version); + if (status != SL_STATUS_OK) { + printf("\r\nFailed to fetch firmware version: 0x%lx\r\n", status); + } else { + print_firmware_version(&version); + } + + status = sl_net_up(SL_NET_WIFI_CLIENT_INTERFACE, SL_NET_DEFAULT_WIFI_CLIENT_PROFILE_ID); + if (status != SL_STATUS_OK) { + printf("Failed to bring Wi-Fi client interface up: 0x%lx\r\n", status); + return; + } + printf("\r\nWi-Fi client connected\r\n"); + + status = sl_wifi_filter_broadcast(BROADCAST_DROP_THRESHOLD, BROADCAST_IN_TIM, BROADCAST_TIM_TILL_NEXT_COMMAND); + if (status != SL_STATUS_OK) { + printf("\r\nsl_wifi_filter_broadcast Failed, Error Code : 0x%lX\r\n", status); + return; + } + // set performance profile + status = sl_wifi_set_performance_profile(&performance_profile); + if (status != SL_STATUS_OK) { + printf("\r\nPower save configuration Failed, Error Code : 0x%lX\r\n", status); + return; + } + + status = send_data(); + if (status != SL_STATUS_OK) { + printf("\r\nSend data failed with status %lx\r\n", status); + return; + } + printf("\r\nExample Demonstration Completed\r\n"); + +#ifdef SLI_SI91X_MCU_INTERFACE + +#if (SL_SI91X_TICKLESS_MODE == 0) + sl_si91x_m4_sleep_wakeup(); +#else + osSemaphoreId_t wait_semaphore; + wait_semaphore = osSemaphoreNew(1, 0, NULL); + if (wait_semaphore == NULL) { + printf("Failed to create semaphore\r\n"); + return; + } + // Waiting forever using semaphore to put M4 to sleep in tick less mode + osSemaphoreAcquire(wait_semaphore, osWaitForever); +#endif + +#endif +} + +sl_status_t send_data(void) +{ + int32_t bytes_sent = -1; + int32_t total_num_of_bytes = 0; + int32_t packet_count = 0; + struct sockaddr_in address = { 0 }; + sl_ipv4_address_t server_ip = { 0 }; + + //create UDP socket + int32_t socket_fd = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP); + if (socket_fd < 0) { + printf("\r\nSocket Create failed with bsd error: %d\r\n", errno); + return SL_STATUS_FAIL; + } + printf("\r\nUDP Client Socket Creation Success\r\n"); + + sl_net_inet_addr((char *)SERVER_IP_ADDRESS, (uint32_t *)&server_ip); + + //send data to server + address.sin_port = SERVER_PORT; + address.sin_addr.s_addr = server_ip.value; + + while (packet_count < NUMBER_OF_PACKETS) { + bytes_sent = + sendto(socket_fd, (uint8_t *)DATA, (sizeof(DATA) - 1), 0, (const struct sockaddr *)&address, sizeof(address)); + if (bytes_sent < 0) { + printf("\r\nSend failed with bsd error: %d\r\n", errno); + close(socket_fd); + return SL_STATUS_FAIL; + } + total_num_of_bytes += bytes_sent; + packet_count++; + } + + printf("\r\nTotal number of bytes sent: %ld\r\n", total_num_of_bytes); + close(socket_fd); + + return SL_STATUS_OK; +} diff --git a/examples/featured/powersave_standby_associated/app.h b/examples/featured/low_power/powersave_standby_associated/app.h similarity index 97% rename from examples/featured/powersave_standby_associated/app.h rename to examples/featured/low_power/powersave_standby_associated/app.h index 40abf0695..51b19b31b 100644 --- a/examples/featured/powersave_standby_associated/app.h +++ b/examples/featured/low_power/powersave_standby_associated/app.h @@ -1,31 +1,31 @@ -/***************************************************************************/ /** - * @file app.h - * @brief Top level application functions - ******************************************************************************* - * # License - * Copyright 2020 Silicon Laboratories Inc. www.silabs.com - ******************************************************************************* - * - * The licensor of this software is Silicon Laboratories Inc. Your use of this - * software is governed by the terms of Silicon Labs Master Software License - * Agreement (MSLA) available at - * www.silabs.com/about-us/legal/master-software-license-agreement. This - * software is distributed to you in Source Code format and is governed by the - * sections of the MSLA applicable to Source Code. - * - ******************************************************************************/ - -#ifndef APP_H -#define APP_H - -/***************************************************************************/ /** - * Initialize application. - ******************************************************************************/ -void app_init(void); - -/***************************************************************************/ /** - * App ticking function. - ******************************************************************************/ -void app_process_action(void); - -#endif // APP_H +/***************************************************************************/ /** + * @file app.h + * @brief Top level application functions + ******************************************************************************* + * # License + * Copyright 2020 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef APP_H +#define APP_H + +/***************************************************************************/ /** + * Initialize application. + ******************************************************************************/ +void app_init(void); + +/***************************************************************************/ /** + * App ticking function. + ******************************************************************************/ +void app_process_action(void); + +#endif // APP_H diff --git a/examples/featured/powersave_standby_associated/keil_project/powersave_standby_associated.uvoptx b/examples/featured/low_power/powersave_standby_associated/keil_project/powersave_standby_associated.uvoptx similarity index 78% rename from examples/featured/powersave_standby_associated/keil_project/powersave_standby_associated.uvoptx rename to examples/featured/low_power/powersave_standby_associated/keil_project/powersave_standby_associated.uvoptx index d8a583766..b44e39c3d 100644 --- a/examples/featured/powersave_standby_associated/keil_project/powersave_standby_associated.uvoptx +++ b/examples/featured/low_power/powersave_standby_associated/keil_project/powersave_standby_associated.uvoptx @@ -161,7 +161,7 @@ 0 0 1 - ../../../../components/device/stm32/Core/Src/main.c + ../../../../../components/device/stm32/Core/Src/main.c \\powersave_standby_associated\../../../../components/device/stm32/Core/Src/main.c\93 @@ -231,7 +231,7 @@ 0 0 0 - ../../../../components/device/stm32/startup_stm32f411xe.s + ../../../../../components/device/stm32/startup_stm32f411xe.s startup_stm32f411xe.s 0 0 @@ -251,7 +251,7 @@ 0 0 0 - ../../../../components/device/stm32/Core/Src/main.c + ../../../../../components/device/stm32/Core/Src/main.c main.c 0 0 @@ -263,7 +263,7 @@ 0 0 0 - ../../../../examples/featured/powersave_standby_associated/app.c + ../../../../../examples/featured/low_power/powersave_standby_associated/app.c app.c 0 0 @@ -275,7 +275,7 @@ 0 0 0 - ../../../../examples/featured/powersave_standby_associated/app.h + ../../../../../examples/featured/low_power/powersave_standby_associated/app.h app.h 0 0 @@ -287,7 +287,7 @@ 0 0 0 - ../../../../components/device/stm32/Core/Src/freertos.c + ../../../../../components/device/stm32/Core/Src/freertos.c freertos.c 0 0 @@ -299,7 +299,7 @@ 0 0 0 - ../../../../components/device/stm32/Core/Src/stm32f4xx_it.c + ../../../../../components/device/stm32/Core/Src/stm32f4xx_it.c stm32f4xx_it.c 0 0 @@ -311,7 +311,7 @@ 0 0 0 - ../../../../components/device/stm32/Core/Src/stm32f4xx_hal_msp.c + ../../../../../components/device/stm32/Core/Src/stm32f4xx_hal_msp.c stm32f4xx_hal_msp.c 0 0 @@ -323,7 +323,7 @@ 0 0 0 - ../../../../components/device/stm32/Core/Src/stm32f4xx_hal_timebase_tim.c + ../../../../../components/device/stm32/Core/Src/stm32f4xx_hal_timebase_tim.c stm32f4xx_hal_timebase_tim.c 0 0 @@ -343,7 +343,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c stm32f4xx_hal_rcc.c 0 0 @@ -355,7 +355,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c stm32f4xx_hal_rcc_ex.c 0 0 @@ -367,7 +367,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c stm32f4xx_hal_flash.c 0 0 @@ -379,7 +379,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c stm32f4xx_hal_flash_ex.c 0 0 @@ -391,7 +391,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c stm32f4xx_hal_flash_ramfunc.c 0 0 @@ -403,7 +403,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c stm32f4xx_hal_gpio.c 0 0 @@ -415,7 +415,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c stm32f4xx_hal_dma_ex.c 0 0 @@ -427,7 +427,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c stm32f4xx_hal_dma.c 0 0 @@ -439,7 +439,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c stm32f4xx_hal_pwr.c 0 0 @@ -451,7 +451,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c stm32f4xx_hal_pwr_ex.c 0 0 @@ -463,7 +463,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c stm32f4xx_hal_cortex.c 0 0 @@ -475,7 +475,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c stm32f4xx_hal.c 0 0 @@ -487,7 +487,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c stm32f4xx_hal_exti.c 0 0 @@ -499,7 +499,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c stm32f4xx_hal_spi.c 0 0 @@ -511,7 +511,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c stm32f4xx_hal_tim.c 0 0 @@ -523,7 +523,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c stm32f4xx_hal_tim_ex.c 0 0 @@ -535,7 +535,7 @@ 0 0 0 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c stm32f4xx_hal_uart.c 0 0 @@ -555,7 +555,7 @@ 0 0 0 - ../../../../components/device/stm32/Core/Src/system_stm32f4xx.c + ../../../../../components/device/stm32/Core/Src/system_stm32f4xx.c system_stm32f4xx.c 0 0 @@ -575,7 +575,7 @@ 0 0 0 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/croutine.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/croutine.c croutine.c 0 0 @@ -587,7 +587,7 @@ 0 0 0 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c event_groups.c 0 0 @@ -599,7 +599,7 @@ 0 0 0 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/list.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/list.c list.c 0 0 @@ -611,7 +611,7 @@ 0 0 0 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/queue.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/queue.c queue.c 0 0 @@ -623,7 +623,7 @@ 0 0 0 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c stream_buffer.c 0 0 @@ -635,7 +635,7 @@ 0 0 0 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/tasks.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/tasks.c tasks.c 0 0 @@ -647,7 +647,7 @@ 0 0 0 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/timers.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/timers.c timers.c 0 0 @@ -659,7 +659,7 @@ 0 0 0 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c cmsis_os2.c 0 0 @@ -671,7 +671,7 @@ 0 0 0 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c heap_4.c 0 0 @@ -683,7 +683,7 @@ 0 0 0 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c port.c 0 0 @@ -703,7 +703,7 @@ 0 0 0 - ../../../../resources/defaults/sl_net_default_values.h + ../../../../../resources/defaults/sl_net_default_values.h sl_net_default_values.h 0 0 @@ -723,7 +723,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/inc/sl_si91x_protocol_types.h + ../../../../../components/device/silabs/si91x/wireless/inc/sl_si91x_protocol_types.h sl_si91x_protocol_types.h 0 0 @@ -743,7 +743,7 @@ 0 0 0 - ../../../../components/service/network_manager/si91x/sl_net_si91x.c + ../../../../../components/service/network_manager/si91x/sl_net_si91x.c sl_net_si91x.c 0 0 @@ -755,7 +755,7 @@ 0 0 0 - ../../../../components/service/network_manager/src/sl_net.c + ../../../../../components/service/network_manager/src/sl_net.c sl_net.c 0 0 @@ -767,7 +767,7 @@ 0 0 0 - ../../../../components/service/network_manager/src/sl_net_basic_certificate_store.c + ../../../../../components/service/network_manager/src/sl_net_basic_certificate_store.c sl_net_basic_certificate_store.c 0 0 @@ -779,7 +779,7 @@ 0 0 0 - ../../../../components/service/network_manager/src/sl_net_basic_credentials.c + ../../../../../components/service/network_manager/src/sl_net_basic_credentials.c sl_net_basic_credentials.c 0 0 @@ -791,7 +791,7 @@ 0 0 0 - ../../../../components/service/network_manager/src/sl_net_basic_profiles.c + ../../../../../components/service/network_manager/src/sl_net_basic_profiles.c sl_net_basic_profiles.c 0 0 @@ -803,7 +803,7 @@ 0 0 0 - ../../../../components/service/bsd_socket/si91x_socket/sl_si91x_bsd_socket.c + ../../../../../components/service/bsd_socket/si91x_socket/sl_si91x_bsd_socket.c sl_si91x_bsd_socket.c 0 0 @@ -823,7 +823,7 @@ 0 0 0 - ../../../../components/protocol/wifi/src/sl_wifi_callback_framework.c + ../../../../../components/protocol/wifi/src/sl_wifi_callback_framework.c sl_wifi_callback_framework.c 0 0 @@ -835,7 +835,7 @@ 0 0 0 - ../../../../components/protocol/wifi/si91x/sl_wifi.c + ../../../../../components/protocol/wifi/si91x/sl_wifi.c sl_wifi.c 0 0 @@ -855,7 +855,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/src/sl_rsi_utility.c + ../../../../../components/device/silabs/si91x/wireless/src/sl_rsi_utility.c sl_rsi_utility.c 0 0 @@ -867,7 +867,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/src/sl_si91x_callback_framework.c + ../../../../../components/device/silabs/si91x/wireless/src/sl_si91x_callback_framework.c sl_si91x_callback_framework.c 0 0 @@ -879,7 +879,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/src/sl_si91x_driver.c + ../../../../../components/device/silabs/si91x/wireless/src/sl_si91x_driver.c sl_si91x_driver.c 0 0 @@ -891,7 +891,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/asynchronous_socket/src/sl_si91x_socket.c + ../../../../../components/device/silabs/si91x/wireless/asynchronous_socket/src/sl_si91x_socket.c sl_si91x_socket.c 0 0 @@ -903,7 +903,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/host_mcu/stm32/stm32_ncp_host.c + ../../../../../components/device/silabs/si91x/wireless/host_mcu/stm32/stm32_ncp_host.c stm32_ncp_host.c 0 0 @@ -915,7 +915,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/icmp/sl_net_ping.c + ../../../../../components/device/silabs/si91x/wireless/icmp/sl_net_ping.c sl_net_ping.c 0 0 @@ -927,7 +927,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/memory/malloc_buffers.c + ../../../../../components/device/silabs/si91x/wireless/memory/malloc_buffers.c malloc_buffers.c 0 0 @@ -939,7 +939,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_net_rsi_utility.c + ../../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_net_rsi_utility.c sl_net_rsi_utility.c 0 0 @@ -951,7 +951,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_net_si91x_integration_handler.c + ../../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_net_si91x_integration_handler.c sl_net_si91x_integration_handler.c 0 0 @@ -963,7 +963,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_si91x_net_credentials.c + ../../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_si91x_net_credentials.c sl_si91x_net_credentials.c 0 0 @@ -975,7 +975,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_si91x_net_internal_stack.c + ../../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_si91x_net_internal_stack.c sl_si91x_net_internal_stack.c 0 0 @@ -987,7 +987,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/socket/src/sl_si91x_socket_utility.c + ../../../../../components/device/silabs/si91x/wireless/socket/src/sl_si91x_socket_utility.c sl_si91x_socket_utility.c 0 0 @@ -999,7 +999,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/ncp_interface/sl_si91x_ncp_driver.c + ../../../../../components/device/silabs/si91x/wireless/ncp_interface/sl_si91x_ncp_driver.c sl_si91x_ncp_driver.c 0 0 @@ -1011,7 +1011,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/ncp_interface/spi/sl_si91x_spi.c + ../../../../../components/device/silabs/si91x/wireless/ncp_interface/spi/sl_si91x_spi.c sl_si91x_spi.c 0 0 @@ -1023,7 +1023,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/threading/sli_si91x_multithreaded.c + ../../../../../components/device/silabs/si91x/wireless/threading/sli_si91x_multithreaded.c sli_si91x_multithreaded.c 0 0 @@ -1043,7 +1043,7 @@ 0 0 0 - ../../../../components/common/src/sl_utility.c + ../../../../../components/common/src/sl_utility.c sl_utility.c 0 0 @@ -1063,7 +1063,7 @@ 0 0 0 - ../../../../resources/certificates/cacert.pem.h + ../../../../../resources/certificates/cacert.pem.h cacert.pem.h 0 0 @@ -1075,7 +1075,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\aws_client_certificate.pem.crt.h + ..\..\..\..\..\resources\certificates\aws_client_certificate.pem.crt.h aws_client_certificate.pem.crt.h 0 0 @@ -1087,7 +1087,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\aws_client_private_key.pem.key.h + ..\..\..\..\..\resources\certificates\aws_client_private_key.pem.key.h aws_client_private_key.pem.key.h 0 0 @@ -1099,7 +1099,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\aws_starfield_ca.pem.h + ..\..\..\..\..\resources\certificates\aws_starfield_ca.pem.h aws_starfield_ca.pem.h 0 0 @@ -1111,7 +1111,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\azure_baltimore_ca.pem.h + ..\..\..\..\..\resources\certificates\azure_baltimore_ca.pem.h azure_baltimore_ca.pem.h 0 0 @@ -1123,7 +1123,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\clientcert.pem.h + ..\..\..\..\..\resources\certificates\clientcert.pem.h clientcert.pem.h 0 0 @@ -1135,7 +1135,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\clientkey.pem.h + ..\..\..\..\..\resources\certificates\clientkey.pem.h clientkey.pem.h 0 0 @@ -1147,7 +1147,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\mydevkitcertificate.pem.h + ..\..\..\..\..\resources\certificates\mydevkitcertificate.pem.h mydevkitcertificate.pem.h 0 0 @@ -1159,7 +1159,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\mydevkitkey.pem.h + ..\..\..\..\..\resources\certificates\mydevkitkey.pem.h mydevkitkey.pem.h 0 0 @@ -1171,7 +1171,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\servercert.pem.h + ..\..\..\..\..\resources\certificates\servercert.pem.h servercert.pem.h 0 0 @@ -1183,7 +1183,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\serverkey.pem.h + ..\..\..\..\..\resources\certificates\serverkey.pem.h serverkey.pem.h 0 0 @@ -1195,7 +1195,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\silabs_client_cert.pem.h + ..\..\..\..\..\resources\certificates\silabs_client_cert.pem.h silabs_client_cert.pem.h 0 0 @@ -1207,7 +1207,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\silabs_client_key.pem.h + ..\..\..\..\..\resources\certificates\silabs_client_key.pem.h silabs_client_key.pem.h 0 0 @@ -1219,7 +1219,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\silabs_dgcert_ca.pem.h + ..\..\..\..\..\resources\certificates\silabs_dgcert_ca.pem.h silabs_dgcert_ca.pem.h 0 0 @@ -1231,7 +1231,7 @@ 0 0 0 - ..\..\..\..\resources\certificates\wifiuser.pem.h + ..\..\..\..\..\resources\certificates\wifiuser.pem.h wifiuser.pem.h 0 0 @@ -1251,7 +1251,7 @@ 0 0 0 - ../../../../components/device/stm32/silabs_utility/common/src/sl_string.c + ../../../../../components/device/stm32/silabs_utility/common/src/sl_string.c sl_string.c 0 0 @@ -1263,7 +1263,7 @@ 0 0 0 - ../../../../components/device/stm32/silabs_utility/common/src/sli_cmsis_os2_ext_task_register.c + ../../../../../components/device/stm32/silabs_utility/common/src/sli_cmsis_os2_ext_task_register.c sli_cmsis_os2_ext_task_register.c 0 0 @@ -1283,7 +1283,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/errno/src/sl_si91x_errno.c + ../../../../../components/device/silabs/si91x/wireless/errno/src/sl_si91x_errno.c sl_si91x_errno.c 0 0 @@ -1295,7 +1295,7 @@ 0 0 0 - ../../../../components/device/silabs/si91x/wireless/errno/inc/errno.h + ../../../../../components/device/silabs/si91x/wireless/errno/inc/errno.h errno.h 0 0 diff --git a/examples/featured/powersave_standby_associated/keil_project/powersave_standby_associated.uvprojx b/examples/featured/low_power/powersave_standby_associated/keil_project/powersave_standby_associated.uvprojx similarity index 70% rename from examples/featured/powersave_standby_associated/keil_project/powersave_standby_associated.uvprojx rename to examples/featured/low_power/powersave_standby_associated/keil_project/powersave_standby_associated.uvprojx index a10593982..112eadf99 100644 --- a/examples/featured/powersave_standby_associated/keil_project/powersave_standby_associated.uvprojx +++ b/examples/featured/low_power/powersave_standby_associated/keil_project/powersave_standby_associated.uvprojx @@ -338,7 +338,7 @@ --c99 --reduce_paths USE_HAL_DRIVER, STM32F411xE, __Keil, SLI_SI917, SLI_SI917B0, SLI_SI91X_MCU_CONFIG_RADIO_BOARD_VER2, configUSE_POSIX_ERRNO, configNUM_SDK_THREAD_LOCAL_STORAGE_POINTERS=1, SL_CATALOG_FREERTOS_KERNEL_PRESENT, SL_CATALOG_KERNEL_PRESENT, SLI_SI91X_OFFLOAD_NETWORK_STACK, SL_SI91X_SPI_HIGH_SPEED_ENABLE, SLI_SI91X_SOCKETS, SL_NET_COMPONENT_INCLUDED, SL_WIFI_COMPONENT_INCLUDED - ../../../../examples/featured/powersave_standby_associated;../../../../resources/certificates;../../../../components/device/silabs/si91x/wireless/asynchronous_socket/inc;../../../../components/service/network_manager/inc;../../../../resources/defaults/;../../../../components/service/bsd_socket/si91x_socket;../../../../components/service/bsd_socket/inc;../../../../components/device/silabs/si91x/wireless/errno/inc;../../../../components/common/inc;../../../../components/device/silabs/si91x/wireless/sl_net/inc;../../../../components/device/silabs/si91x/wireless/icmp;../../../../components/device/silabs/si91x/wireless/socket/inc;../../../../components/device/stm32/silabs_utility/common/inc;../../../../components/device/silabs/si91x/wireless/inc;../../../../components/protocol/wifi/inc;../../../../components/device/stm32/board;../../../../components/device/stm32/Core/Inc;../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Inc;../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/include;../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2;../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../components/device/stm32/Drivers/CMSIS/Device/ST/STM32F4xx/Include;../../../../components/device/stm32/Drivers/CMSIS/Include + ../../../../../examples/featured/low_power/powersave_standby_associated;../../../../../resources/certificates;../../../../../components/device/silabs/si91x/wireless/asynchronous_socket/inc;../../../../../components/service/network_manager/inc;../../../../../resources/defaults/;../../../../../components/service/bsd_socket/si91x_socket;../../../../../components/service/bsd_socket/inc;../../../../../components/device/silabs/si91x/wireless/errno/inc;../../../../../components/common/inc;../../../../../components/device/silabs/si91x/wireless/sl_net/inc;../../../../../components/device/silabs/si91x/wireless/icmp;../../../../../components/device/silabs/si91x/wireless/socket/inc;../../../../../components/device/stm32/silabs_utility/common/inc;../../../../../components/device/silabs/si91x/wireless/inc;../../../../../components/protocol/wifi/inc;../../../../../components/device/stm32/board;../../../../../components/device/stm32/Core/Inc;../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Inc;../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2;../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../components/device/stm32/Drivers/CMSIS/Device/ST/STM32F4xx/Include;../../../../../components/device/stm32/Drivers/CMSIS/Include @@ -385,7 +385,7 @@ startup_stm32f411xe.s 2 - ../../../../components/device/stm32/startup_stm32f411xe.s + ../../../../../components/device/stm32/startup_stm32f411xe.s @@ -395,37 +395,37 @@ main.c 1 - ../../../../components/device/stm32/Core/Src/main.c + ../../../../../components/device/stm32/Core/Src/main.c app.c 1 - ../../../../examples/featured/powersave_standby_associated/app.c + ../../../../../examples/featured/low_power/powersave_standby_associated/app.c app.h 5 - ../../../../examples/featured/powersave_standby_associated/app.h + ../../../../../examples/featured/low_power/powersave_standby_associated/app.h freertos.c 1 - ../../../../components/device/stm32/Core/Src/freertos.c + ../../../../../components/device/stm32/Core/Src/freertos.c stm32f4xx_it.c 1 - ../../../../components/device/stm32/Core/Src/stm32f4xx_it.c + ../../../../../components/device/stm32/Core/Src/stm32f4xx_it.c stm32f4xx_hal_msp.c 1 - ../../../../components/device/stm32/Core/Src/stm32f4xx_hal_msp.c + ../../../../../components/device/stm32/Core/Src/stm32f4xx_hal_msp.c stm32f4xx_hal_timebase_tim.c 1 - ../../../../components/device/stm32/Core/Src/stm32f4xx_hal_timebase_tim.c + ../../../../../components/device/stm32/Core/Src/stm32f4xx_hal_timebase_tim.c @@ -435,87 +435,87 @@ stm32f4xx_hal_rcc.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c stm32f4xx_hal_rcc_ex.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c stm32f4xx_hal_flash.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c stm32f4xx_hal_flash_ex.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c stm32f4xx_hal_flash_ramfunc.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c stm32f4xx_hal_gpio.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c stm32f4xx_hal_dma_ex.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c stm32f4xx_hal_dma.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c stm32f4xx_hal_pwr.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c stm32f4xx_hal_pwr_ex.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c stm32f4xx_hal_cortex.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c stm32f4xx_hal.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c stm32f4xx_hal_exti.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c stm32f4xx_hal_spi.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c stm32f4xx_hal_tim.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c stm32f4xx_hal_tim_ex.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c stm32f4xx_hal_uart.c 1 - ../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c + ../../../../../components/device/stm32/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c @@ -525,7 +525,7 @@ system_stm32f4xx.c 1 - ../../../../components/device/stm32/Core/Src/system_stm32f4xx.c + ../../../../../components/device/stm32/Core/Src/system_stm32f4xx.c @@ -535,52 +535,52 @@ croutine.c 1 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/croutine.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/croutine.c event_groups.c 1 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c list.c 1 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/list.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/list.c queue.c 1 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/queue.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/queue.c stream_buffer.c 1 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c tasks.c 1 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/tasks.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/tasks.c timers.c 1 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/timers.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/timers.c cmsis_os2.c 1 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c heap_4.c 1 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c port.c 1 - ../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c + ../../../../../components/device/stm32/Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c @@ -590,7 +590,7 @@ sl_net_default_values.h 5 - ../../../../resources/defaults/sl_net_default_values.h + ../../../../../resources/defaults/sl_net_default_values.h @@ -600,7 +600,7 @@ sl_si91x_protocol_types.h 5 - ../../../../components/device/silabs/si91x/wireless/inc/sl_si91x_protocol_types.h + ../../../../../components/device/silabs/si91x/wireless/inc/sl_si91x_protocol_types.h @@ -610,32 +610,32 @@ sl_net_si91x.c 1 - ../../../../components/service/network_manager/si91x/sl_net_si91x.c + ../../../../../components/service/network_manager/si91x/sl_net_si91x.c sl_net.c 1 - ../../../../components/service/network_manager/src/sl_net.c + ../../../../../components/service/network_manager/src/sl_net.c sl_net_basic_certificate_store.c 1 - ../../../../components/service/network_manager/src/sl_net_basic_certificate_store.c + ../../../../../components/service/network_manager/src/sl_net_basic_certificate_store.c sl_net_basic_credentials.c 1 - ../../../../components/service/network_manager/src/sl_net_basic_credentials.c + ../../../../../components/service/network_manager/src/sl_net_basic_credentials.c sl_net_basic_profiles.c 1 - ../../../../components/service/network_manager/src/sl_net_basic_profiles.c + ../../../../../components/service/network_manager/src/sl_net_basic_profiles.c sl_si91x_bsd_socket.c 1 - ../../../../components/service/bsd_socket/si91x_socket/sl_si91x_bsd_socket.c + ../../../../../components/service/bsd_socket/si91x_socket/sl_si91x_bsd_socket.c @@ -645,12 +645,12 @@ sl_wifi_callback_framework.c 1 - ../../../../components/protocol/wifi/src/sl_wifi_callback_framework.c + ../../../../../components/protocol/wifi/src/sl_wifi_callback_framework.c sl_wifi.c 1 - ../../../../components/protocol/wifi/si91x/sl_wifi.c + ../../../../../components/protocol/wifi/si91x/sl_wifi.c @@ -660,77 +660,77 @@ sl_rsi_utility.c 1 - ../../../../components/device/silabs/si91x/wireless/src/sl_rsi_utility.c + ../../../../../components/device/silabs/si91x/wireless/src/sl_rsi_utility.c sl_si91x_callback_framework.c 1 - ../../../../components/device/silabs/si91x/wireless/src/sl_si91x_callback_framework.c + ../../../../../components/device/silabs/si91x/wireless/src/sl_si91x_callback_framework.c sl_si91x_driver.c 1 - ../../../../components/device/silabs/si91x/wireless/src/sl_si91x_driver.c + ../../../../../components/device/silabs/si91x/wireless/src/sl_si91x_driver.c sl_si91x_socket.c 1 - ../../../../components/device/silabs/si91x/wireless/asynchronous_socket/src/sl_si91x_socket.c + ../../../../../components/device/silabs/si91x/wireless/asynchronous_socket/src/sl_si91x_socket.c stm32_ncp_host.c 1 - ../../../../components/device/silabs/si91x/wireless/host_mcu/stm32/stm32_ncp_host.c + ../../../../../components/device/silabs/si91x/wireless/host_mcu/stm32/stm32_ncp_host.c sl_net_ping.c 1 - ../../../../components/device/silabs/si91x/wireless/icmp/sl_net_ping.c + ../../../../../components/device/silabs/si91x/wireless/icmp/sl_net_ping.c malloc_buffers.c 1 - ../../../../components/device/silabs/si91x/wireless/memory/malloc_buffers.c + ../../../../../components/device/silabs/si91x/wireless/memory/malloc_buffers.c sl_net_rsi_utility.c 1 - ../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_net_rsi_utility.c + ../../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_net_rsi_utility.c sl_net_si91x_integration_handler.c 1 - ../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_net_si91x_integration_handler.c + ../../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_net_si91x_integration_handler.c sl_si91x_net_credentials.c 1 - ../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_si91x_net_credentials.c + ../../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_si91x_net_credentials.c sl_si91x_net_internal_stack.c 1 - ../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_si91x_net_internal_stack.c + ../../../../../components/device/silabs/si91x/wireless/sl_net/src/sl_si91x_net_internal_stack.c sl_si91x_socket_utility.c 1 - ../../../../components/device/silabs/si91x/wireless/socket/src/sl_si91x_socket_utility.c + ../../../../../components/device/silabs/si91x/wireless/socket/src/sl_si91x_socket_utility.c sl_si91x_ncp_driver.c 1 - ../../../../components/device/silabs/si91x/wireless/ncp_interface/sl_si91x_ncp_driver.c + ../../../../../components/device/silabs/si91x/wireless/ncp_interface/sl_si91x_ncp_driver.c sl_si91x_spi.c 1 - ../../../../components/device/silabs/si91x/wireless/ncp_interface/spi/sl_si91x_spi.c + ../../../../../components/device/silabs/si91x/wireless/ncp_interface/spi/sl_si91x_spi.c sli_si91x_multithreaded.c 1 - ../../../../components/device/silabs/si91x/wireless/threading/sli_si91x_multithreaded.c + ../../../../../components/device/silabs/si91x/wireless/threading/sli_si91x_multithreaded.c @@ -740,7 +740,7 @@ sl_utility.c 1 - ../../../../components/common/src/sl_utility.c + ../../../../../components/common/src/sl_utility.c @@ -750,77 +750,77 @@ cacert.pem.h 5 - ../../../../resources/certificates/cacert.pem.h + ../../../../../resources/certificates/cacert.pem.h aws_client_certificate.pem.crt.h 5 - ..\..\..\..\resources\certificates\aws_client_certificate.pem.crt.h + ..\..\..\..\..\resources\certificates\aws_client_certificate.pem.crt.h aws_client_private_key.pem.key.h 5 - ..\..\..\..\resources\certificates\aws_client_private_key.pem.key.h + ..\..\..\..\..\resources\certificates\aws_client_private_key.pem.key.h aws_starfield_ca.pem.h 5 - ..\..\..\..\resources\certificates\aws_starfield_ca.pem.h + ..\..\..\..\..\resources\certificates\aws_starfield_ca.pem.h azure_baltimore_ca.pem.h 5 - ..\..\..\..\resources\certificates\azure_baltimore_ca.pem.h + ..\..\..\..\..\resources\certificates\azure_baltimore_ca.pem.h clientcert.pem.h 5 - ..\..\..\..\resources\certificates\clientcert.pem.h + ..\..\..\..\..\resources\certificates\clientcert.pem.h clientkey.pem.h 5 - ..\..\..\..\resources\certificates\clientkey.pem.h + ..\..\..\..\..\resources\certificates\clientkey.pem.h mydevkitcertificate.pem.h 5 - ..\..\..\..\resources\certificates\mydevkitcertificate.pem.h + ..\..\..\..\..\resources\certificates\mydevkitcertificate.pem.h mydevkitkey.pem.h 5 - ..\..\..\..\resources\certificates\mydevkitkey.pem.h + ..\..\..\..\..\resources\certificates\mydevkitkey.pem.h servercert.pem.h 5 - ..\..\..\..\resources\certificates\servercert.pem.h + ..\..\..\..\..\resources\certificates\servercert.pem.h serverkey.pem.h 5 - ..\..\..\..\resources\certificates\serverkey.pem.h + ..\..\..\..\..\resources\certificates\serverkey.pem.h silabs_client_cert.pem.h 5 - ..\..\..\..\resources\certificates\silabs_client_cert.pem.h + ..\..\..\..\..\resources\certificates\silabs_client_cert.pem.h silabs_client_key.pem.h 5 - ..\..\..\..\resources\certificates\silabs_client_key.pem.h + ..\..\..\..\..\resources\certificates\silabs_client_key.pem.h silabs_dgcert_ca.pem.h 5 - ..\..\..\..\resources\certificates\silabs_dgcert_ca.pem.h + ..\..\..\..\..\resources\certificates\silabs_dgcert_ca.pem.h wifiuser.pem.h 5 - ..\..\..\..\resources\certificates\wifiuser.pem.h + ..\..\..\..\..\resources\certificates\wifiuser.pem.h @@ -830,12 +830,12 @@ sl_string.c 1 - ../../../../components/device/stm32/silabs_utility/common/src/sl_string.c + ../../../../../components/device/stm32/silabs_utility/common/src/sl_string.c sli_cmsis_os2_ext_task_register.c 1 - ../../../../components/device/stm32/silabs_utility/common/src/sli_cmsis_os2_ext_task_register.c + ../../../../../components/device/stm32/silabs_utility/common/src/sli_cmsis_os2_ext_task_register.c @@ -845,12 +845,12 @@ sl_si91x_errno.c 1 - ../../../../components/device/silabs/si91x/wireless/errno/src/sl_si91x_errno.c + ../../../../../components/device/silabs/si91x/wireless/errno/src/sl_si91x_errno.c errno.h 5 - ../../../../components/device/silabs/si91x/wireless/errno/inc/errno.h + ../../../../../components/device/silabs/si91x/wireless/errno/inc/errno.h diff --git a/examples/featured/powersave_standby_associated/main.c b/examples/featured/low_power/powersave_standby_associated/main.c similarity index 97% rename from examples/featured/powersave_standby_associated/main.c rename to examples/featured/low_power/powersave_standby_associated/main.c index ea9513a0c..e1dfe05bf 100644 --- a/examples/featured/powersave_standby_associated/main.c +++ b/examples/featured/low_power/powersave_standby_associated/main.c @@ -1,58 +1,58 @@ -/***************************************************************************/ /** - * @file main.c - * @brief main() function. - ******************************************************************************* - * # License - * Copyright 2023 Silicon Laboratories Inc. www.silabs.com - ******************************************************************************* - * - * The licensor of this software is Silicon Laboratories Inc. Your use of this - * software is governed by the terms of Silicon Labs Master Software License - * Agreement (MSLA) available at - * www.silabs.com/about-us/legal/master-software-license-agreement. This - * software is distributed to you in Source Code format and is governed by the - * sections of the MSLA applicable to Source Code. - * - ******************************************************************************/ -#include "sl_component_catalog.h" -#include "sl_system_init.h" -#include "app.h" -#if defined(SL_CATALOG_POWER_MANAGER_PRESENT) -#include "sl_power_manager.h" -#endif -#if defined(SL_CATALOG_KERNEL_PRESENT) -#include "sl_system_kernel.h" -#else // SL_CATALOG_KERNEL_PRESENT -#include "sl_system_process_action.h" -#endif // SL_CATALOG_KERNEL_PRESENT - -int main(void) -{ - // Initialize Silicon Labs device, system, service(s) and protocol stack(s). - // Note that if the kernel is present, processing task(s) will be created by - // this call. - sl_system_init(); - - // Initialize the application. For example, create periodic timer(s) or - // task(s) if the kernel is present. - app_init(); - -#if defined(SL_CATALOG_KERNEL_PRESENT) - // Start the kernel. Task(s) created in app_init() will start running. - sl_system_kernel_start(); -#else // SL_CATALOG_KERNEL_PRESENT - while (1) { - // Do not remove this call: Silicon Labs components process action routine - // must be called from the super loop. - sl_system_process_action(); - - // Application process. - app_process_action(); - -#if defined(SL_CATALOG_POWER_MANAGER_PRESENT) - // Let the CPU go to sleep if the system allows it. - sl_power_manager_sleep(); -#endif - } -#endif // SL_CATALOG_KERNEL_PRESENT -} +/***************************************************************************/ /** + * @file main.c + * @brief main() function. + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ +#include "sl_component_catalog.h" +#include "sl_system_init.h" +#include "app.h" +#if defined(SL_CATALOG_POWER_MANAGER_PRESENT) +#include "sl_power_manager.h" +#endif +#if defined(SL_CATALOG_KERNEL_PRESENT) +#include "sl_system_kernel.h" +#else // SL_CATALOG_KERNEL_PRESENT +#include "sl_system_process_action.h" +#endif // SL_CATALOG_KERNEL_PRESENT + +int main(void) +{ + // Initialize Silicon Labs device, system, service(s) and protocol stack(s). + // Note that if the kernel is present, processing task(s) will be created by + // this call. + sl_system_init(); + + // Initialize the application. For example, create periodic timer(s) or + // task(s) if the kernel is present. + app_init(); + +#if defined(SL_CATALOG_KERNEL_PRESENT) + // Start the kernel. Task(s) created in app_init() will start running. + sl_system_kernel_start(); +#else // SL_CATALOG_KERNEL_PRESENT + while (1) { + // Do not remove this call: Silicon Labs components process action routine + // must be called from the super loop. + sl_system_process_action(); + + // Application process. + app_process_action(); + +#if defined(SL_CATALOG_POWER_MANAGER_PRESENT) + // Let the CPU go to sleep if the system allows it. + sl_power_manager_sleep(); +#endif + } +#endif // SL_CATALOG_KERNEL_PRESENT +} diff --git a/examples/featured/powersave_standby_associated/powersave_standby_associated_ncp.slcp b/examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_ncp.slcp similarity index 94% rename from examples/featured/powersave_standby_associated/powersave_standby_associated_ncp.slcp rename to examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_ncp.slcp index a3ce6f4ab..67479d806 100644 --- a/examples/featured/powersave_standby_associated/powersave_standby_associated_ncp.slcp +++ b/examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_ncp.slcp @@ -1,81 +1,81 @@ -project_name: wifi_powersave_standby_associated_ncp -package: wifi -quality: production -label: wifi_powersave_standby_associated -category: Example|Wi-Fi -description: > - Start a Wi-Fi client in ASSOCIATED_POWER_SAVE mode and connects to AP and send data to UDP server -filter: - - name: "Wireless Technology" - value: ["Wi-Fi"] - - name: "Project Difficulty" - value: ["Beginner"] -sdk: - id: simplicity_sdk - version: 2024.6.1 -sdk_extension: -- id: wiseconnect3_sdk - version: 3.3.2 -source: - - path: app.c - - path: main.c -include: - - path: . - file_list: - - path: app.h -define: - - name: SL_SI91X_PRINT_DBG_LOG -component: - - id: sl_system - - id: freertos - - id: freertos_heap_4 - - id: device_init - - id: spidrv - instance: [exp] - - id: iostream_retarget_stdio - - id: iostream_recommended_stream - - id: iostream_stdlib_config - - id: wiseconnect3_common - from: wiseconnect3_sdk - - id: wifi - from: wiseconnect3_sdk - - id: sl_si91x_internal_stack - from: wiseconnect3_sdk - - id: sl_si91x_spi_bus - from: wiseconnect3_sdk - - id: wifi_resources - from: wiseconnect3_sdk - - id: network_manager - from: wiseconnect3_sdk - - id: basic_network_config_manager - from: wiseconnect3_sdk - - id: bsd_socket - from: wiseconnect3_sdk - - id: sl_si91x_basic_buffers - from: wiseconnect3_sdk -toolchain_settings: - - option: gcc_compiler_option - value: -Wall -Werror -configuration: - - name: SL_BOARD_ENABLE_VCOM - value: '1' - - name: configUSE_POSIX_ERRNO - value: '1' - - name: configTOTAL_HEAP_SIZE - value: '51200' -readme: - - path: readme.md -other_file: - - path: resources/readme/energy_profiler_step_6.png - - path: resources/readme/energy_profiler_step_7.png - - path: resources/readme/energy_profiler_step_8.png - - path: resources/readme/image185.png - - path: resources/readme/image187.png - - path: resources/readme/output_soc.png - - path: resources/readme/power_meter_avg_current_consumption.png - - path: resources/readme/power_save_current_measurement_pins.png - - path: resources/readme/setup_soc_ncp.png -ui_hints: - highlight: - - path: readme.md +project_name: wifi_powersave_standby_associated_ncp +package: wifi +quality: production +label: wifi_powersave_standby_associated +category: Example|Wi-Fi +description: > + Start a Wi-Fi client in ASSOCIATED_POWER_SAVE mode and connects to AP and send data to UDP server +filter: + - name: "Wireless Technology" + value: ["Wi-Fi"] + - name: "Project Difficulty" + value: ["Beginner"] +sdk: + id: simplicity_sdk + version: 2024.6.2 +sdk_extension: +- id: wiseconnect3_sdk + version: 3.3.3 +source: + - path: app.c + - path: main.c +include: + - path: . + file_list: + - path: app.h +define: + - name: SL_SI91X_PRINT_DBG_LOG +component: + - id: sl_system + - id: freertos + - id: freertos_heap_4 + - id: device_init + - id: spidrv + instance: [exp] + - id: iostream_retarget_stdio + - id: iostream_recommended_stream + - id: iostream_stdlib_config + - id: wiseconnect3_common + from: wiseconnect3_sdk + - id: wifi + from: wiseconnect3_sdk + - id: sl_si91x_internal_stack + from: wiseconnect3_sdk + - id: sl_si91x_spi_bus + from: wiseconnect3_sdk + - id: wifi_resources + from: wiseconnect3_sdk + - id: network_manager + from: wiseconnect3_sdk + - id: basic_network_config_manager + from: wiseconnect3_sdk + - id: bsd_socket + from: wiseconnect3_sdk + - id: sl_si91x_basic_buffers + from: wiseconnect3_sdk +toolchain_settings: + - option: gcc_compiler_option + value: -Wall -Werror +configuration: + - name: SL_BOARD_ENABLE_VCOM + value: '1' + - name: configUSE_POSIX_ERRNO + value: '1' + - name: configTOTAL_HEAP_SIZE + value: '51200' +readme: + - path: readme.md +other_file: + - path: resources/readme/energy_profiler_step_6.png + - path: resources/readme/energy_profiler_step_7.png + - path: resources/readme/energy_profiler_step_8.png + - path: resources/readme/image185.png + - path: resources/readme/image187.png + - path: resources/readme/output_soc.png + - path: resources/readme/power_meter_avg_current_consumption.png + - path: resources/readme/power_save_current_measurement_pins.png + - path: resources/readme/setup_soc_ncp.png +ui_hints: + highlight: + - path: readme.md focus: true \ No newline at end of file diff --git a/examples/featured/powersave_standby_associated/powersave_standby_associated_psram.slcp b/examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_psram.slcp similarity index 95% rename from examples/featured/powersave_standby_associated/powersave_standby_associated_psram.slcp rename to examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_psram.slcp index 4759e238c..82b14311a 100644 --- a/examples/featured/powersave_standby_associated/powersave_standby_associated_psram.slcp +++ b/examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_psram.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -96,4 +96,4 @@ ui_hints: - path: readme.md focus: true post_build: - path: ../../../utilities/postbuild_profile/wiseconnect_soc.slpb + path: ../../../../utilities/postbuild_profile/wiseconnect_soc.slpb diff --git a/examples/featured/powersave_standby_associated/powersave_standby_associated_soc.slcp b/examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_soc.slcp similarity index 95% rename from examples/featured/powersave_standby_associated/powersave_standby_associated_soc.slcp rename to examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_soc.slcp index 475f9d533..d7d983f05 100644 --- a/examples/featured/powersave_standby_associated/powersave_standby_associated_soc.slcp +++ b/examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_soc.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -85,4 +85,4 @@ ui_hints: - path: readme.md focus: true post_build: - path: ../../../utilities/postbuild_profile/wiseconnect_soc.slpb \ No newline at end of file + path: ../../../../utilities/postbuild_profile/wiseconnect_soc.slpb \ No newline at end of file diff --git a/examples/featured/powersave_standby_associated/powersave_standby_associated_uart_ncp.slcp b/examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_uart_ncp.slcp similarity index 94% rename from examples/featured/powersave_standby_associated/powersave_standby_associated_uart_ncp.slcp rename to examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_uart_ncp.slcp index 0d1633ce7..0ac6bfb0c 100644 --- a/examples/featured/powersave_standby_associated/powersave_standby_associated_uart_ncp.slcp +++ b/examples/featured/low_power/powersave_standby_associated/powersave_standby_associated_uart_ncp.slcp @@ -1,83 +1,83 @@ -project_name: wifi_powersave_standby_associated_uart_ncp -package: wifi -quality: production -label: wifi_powersave_standby_associated -category: Example|Wi-Fi -description: > - Start a Wi-Fi client in ASSOCIATED_POWER_SAVE mode and connects to AP and send data to UDP server -filter: - - name: "Wireless Technology" - value: ["Wi-Fi"] - - name: "Project Difficulty" - value: ["Beginner"] -sdk: - id: simplicity_sdk - version: 2024.6.1 -sdk_extension: -- id: wiseconnect3_sdk - version: 3.3.2 -source: - - path: app.c - - path: main.c -include: - - path: . - file_list: - - path: app.h -define: - - name: SL_SI91X_PRINT_DBG_LOG -component: - - id: sl_system - - id: freertos - - id: freertos_heap_4 - - id: device_init - - id: iostream_retarget_stdio - - id: iostream_rtt - - id: iostream_stdlib_config - - id: uartdrv_usart - instance: [exp] - - id: wiseconnect3_common - from: wiseconnect3_sdk - - id: wifi - from: wiseconnect3_sdk - - id: sl_si91x_internal_stack - from: wiseconnect3_sdk - - id: sl_si91x_uart_bus - from: wiseconnect3_sdk - - id: wifi_resources - from: wiseconnect3_sdk - - id: network_manager - from: wiseconnect3_sdk - - id: basic_network_config_manager - from: wiseconnect3_sdk - - id: bsd_socket - from: wiseconnect3_sdk - - id: sl_si91x_basic_buffers - from: wiseconnect3_sdk -toolchain_settings: - - option: gcc_compiler_option - value: -Wall -Werror -configuration: - - name: SL_BOARD_ENABLE_VCOM - value: '1' - - name: configUSE_POSIX_ERRNO - value: '1' - - name: configTOTAL_HEAP_SIZE - value: '51200' - - name: configTIMER_TASK_PRIORITY - value: '55' -readme: - - path: readme.md -other_file: - - path: resources/readme/energy_profiler_step_6.png - - path: resources/readme/energy_profiler_step_7.png - - path: resources/readme/energy_profiler_step_8.png - - path: resources/readme/image185.png - - path: resources/readme/image187.png - - path: resources/readme/output_soc.png - - path: resources/readme/power_meter_avg_current_consumption.png - - path: resources/readme/power_save_current_measurement_pins.png - - path: resources/readme/setup_soc_ncp.png -ui_hints: - highlight: - - path: readme.md - focus: true +project_name: wifi_powersave_standby_associated_uart_ncp +package: wifi +quality: production +label: wifi_powersave_standby_associated +category: Example|Wi-Fi +description: > + Start a Wi-Fi client in ASSOCIATED_POWER_SAVE mode and connects to AP and send data to UDP server +filter: + - name: "Wireless Technology" + value: ["Wi-Fi"] + - name: "Project Difficulty" + value: ["Beginner"] +sdk: + id: simplicity_sdk + version: 2024.6.2 +sdk_extension: +- id: wiseconnect3_sdk + version: 3.3.3 +source: + - path: app.c + - path: main.c +include: + - path: . + file_list: + - path: app.h +define: + - name: SL_SI91X_PRINT_DBG_LOG +component: + - id: sl_system + - id: freertos + - id: freertos_heap_4 + - id: device_init + - id: iostream_retarget_stdio + - id: iostream_rtt + - id: iostream_stdlib_config + - id: uartdrv_usart + instance: [exp] + - id: wiseconnect3_common + from: wiseconnect3_sdk + - id: wifi + from: wiseconnect3_sdk + - id: sl_si91x_internal_stack + from: wiseconnect3_sdk + - id: sl_si91x_uart_bus + from: wiseconnect3_sdk + - id: wifi_resources + from: wiseconnect3_sdk + - id: network_manager + from: wiseconnect3_sdk + - id: basic_network_config_manager + from: wiseconnect3_sdk + - id: bsd_socket + from: wiseconnect3_sdk + - id: sl_si91x_basic_buffers + from: wiseconnect3_sdk +toolchain_settings: + - option: gcc_compiler_option + value: -Wall -Werror +configuration: + - name: SL_BOARD_ENABLE_VCOM + value: '1' + - name: configUSE_POSIX_ERRNO + value: '1' + - name: configTOTAL_HEAP_SIZE + value: '51200' + - name: configTIMER_TASK_PRIORITY + value: '55' +readme: + - path: readme.md +other_file: + - path: resources/readme/energy_profiler_step_6.png + - path: resources/readme/energy_profiler_step_7.png + - path: resources/readme/energy_profiler_step_8.png + - path: resources/readme/image185.png + - path: resources/readme/image187.png + - path: resources/readme/output_soc.png + - path: resources/readme/power_meter_avg_current_consumption.png + - path: resources/readme/power_save_current_measurement_pins.png + - path: resources/readme/setup_soc_ncp.png +ui_hints: + highlight: + - path: readme.md + focus: true diff --git a/examples/featured/powersave_standby_associated/readme.md b/examples/featured/low_power/powersave_standby_associated/readme.md similarity index 97% rename from examples/featured/powersave_standby_associated/readme.md rename to examples/featured/low_power/powersave_standby_associated/readme.md index 258833ec6..2fc52a297 100644 --- a/examples/featured/powersave_standby_associated/readme.md +++ b/examples/featured/low_power/powersave_standby_associated/readme.md @@ -1,205 +1,205 @@ -# Wi-Fi - Powersave Standby Associated - -## Table of Contents - -- [Purpose/Scope](#purposescope) -- [Prerequisites/Setup Requirements](#prerequisitessetup-requirements) - - [Hardware Requirements](#hardware-requirements) - - [Software Requirements](#software-requirements) - - [Setup Diagram](#setup-diagram) -- [Getting Started](#getting-started) -- [Application Build Environment](#application-build-environment) -- [Test the Application](#test-the-application) - - [Run the iPerf Server](#run-the-iperf-server) - - [Using Simplicity Studio Energy Profiler for Current Measurement](#using-simplicity-studio-energy-profiler-for-current-measurement) - -## Purpose/Scope - -This application demonstrates SiWx91x to enable UDP data transfer in low power mode, with NWP is in associated power save mode with retention and keeping M4 in sleep with retention after data transfer. NWP wakes up periodically based on the DTIM or listen interval configured by the user. - -The application connects to a remote server to send UDP data and also enables the analysis of various performance profiles using a power analyzer during the ASSOCIATED_POWER_SAVE with data transfer via UDP. - -## Prerequisites/Setup Requirements - -### Hardware Requirements - -- Windows PC -- Wi-Fi Access point with a connection to the internet -- PC2 (Remote PC) with UDP server application (iPerf) -- Power analyzer - -- **SoC Mode**: - - Standalone - - BRD4002A Wireless pro kit mainboard [SI-MB4002A] - - Radio Boards - - BRD4338A [SiWx917-RB4338A] - - BRD4342A [SiWx917-RB4342A] - - BRD4343A [SiWx917-RB4343A] - - Kits - - SiWx917 Pro Kit [Si917-PK6031A](https://www.silabs.com/development-tools/wireless/wi-fi/siwx917-pro-kit?tab=overview) - - SiWx917 Pro Kit [Si917-PK6032A] - -- **NCP Mode**: - - Standalone - - BRD4002A Wireless pro kit mainboard [SI-MB4002A] - - EFR32xG24 Wireless 2.4 GHz +10 dBm Radio Board [xG24-RB4186C](https://www.silabs.com/development-tools/wireless/xg24-rb4186c-efr32xg24-wireless-gecko-radio-board?tab=overview) - - NCP Expansion Kit with NCP Radio boards - - (BRD4346A + BRD8045A) [SiWx917-EB4346A] - - (BRD4357A + BRD8045A) [SiWx917-EB4357A] - - Kits - - EFR32xG24 Pro Kit +10 dBm [xG24-PK6009A](https://www.silabs.com/development-tools/wireless/efr32xg24-pro-kit-10-dbm?tab=overview) - - STM32F411RE MCU - - [STM32F411RE](https://www.st.com/en/microcontrollers-microprocessors/stm32f411re.html) MCU - - NCP Expansion Kit with NCP Radio boards - - (BRD4346A + BRD8045C) - - (BRD4357A + BRD8045C) - - Interface and Host MCU Supported - - SPI - EFR32 & STM32 - - UART - EFR32 - - -### Software Requirements - -- Simplicity Studio IDE (to be used with Silicon Labs MCU) -- Keil IDE (to be used with STM32F411RE MCU) -- Serial Terminal - [Docklight](https://docklight.de/)/[Tera Term](https://ttssh2.osdn.jp/index.html.en) -- [iPerf Application](https://sourceforge.net/projects/iperf2/files/iperf-2.0.8-win.zip/download). iPerf is a tool for active measurements of the maximum achievable bandwidth on IP networks. It supports tuning of various parameters related to timing, buffers and protocols (TCP and UDP with IPv4 and IPv6). - -### Setup Diagram - - ![Figure: Setup Diagram for Power Save Standby Example](resources/readme/setup_soc_ncp.png) - -## Getting Started - -### Instructions for Simplicity Studio IDE and Silicon Labs devices (SoC and NCP Modes) - Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: - - - Install Studio and WiSeConnect 3 extension - - Connect your device to the computer - - Upgrade your connectivity firmware - - Create a Studio project - -For details on the project folder structure, see the [WiSeConnect Examples](https://docs.silabs.com/wiseconnect/latest/wiseconnect-examples/#example-folder-structure) page. - -### Instructions for Keil IDE and STM32F411RE MCU (NCP Mode) - -Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: - - - Install the [Keil IDE](https://www.keil.com/). - - Download [WiSeConnect 3 SDK](https://github.com/SiliconLabs/wiseconnect) - - Update the device's connectivity firmware as mentioned [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/getting-started-with-ncp-mode-with-stm32#upgrade-the-si-wx91x-connectivity-firmware). - - Connect the SiWx91x NCP to STM32F411RE Nucleo Board following the below steps: - - Connect the male Arduino compatible header on carrier board to female Arduino compatible header on STM32F411RE Nucleo board. - - Mount the NCP Radio board (BRD4346A/BRD4357A) onto the radio board socket available on the base board (BRD8045C). - - After connecting all the boards, the setup should look like the image shown below: - ![Figure: Setup](resources/readme/stm32_setup.png) - - Connect the setup to the computer. - - Open the Powersave standby associated µVision project - **powersave_standby_associated.uvprojx** by navigating to **WiSeConnect 3 SDK → examples → featured → powersave_standby_associated → keil_project**. - -## Application Build Environment - -The application can be configured to suit user requirements and development environment. Read through the following sections and make any changes needed. - -### Configure sl_net_default_values.h - -**File path for Simplicity Studio IDE:** -- In the Project Explorer pane, expand the **config** folder and open the **sl_net_default_values.h** file. - -**File path for Keil IDE:** -- In the Project pane, expand the **resources/defaults** folder and open the **sl_net_default_values.h** file. - -Configure the following parameters to enable your Silicon Labs Wi-Fi device to connect to your Wi-Fi network - - - DEFAULT_WIFI_CLIENT_PROFILE_SSID refers to the name with which Wi-Fi network that shall be advertised and Si91X module is connected to it. - - ```c - #define DEFAULT_WIFI_CLIENT_PROFILE_SSID "YOUR_AP_SSID" - ``` - - - DEFAULT_WIFI_CLIENT_CREDENTIAL refers to the secret key if the Access point is configured in WPA-PSK/WPA2-PSK security modes. - - ```c - #define DEFAULT_WIFI_CLIENT_CREDENTIAL "YOUR_AP_PASSPHRASE" - ``` - - - DEFAULT_WIFI_CLIENT_SECURITY_TYPE refers to the security type of the Access point. The supported security modes are mentioned in `sl_wifi_security_t`. - - ```c - #define DEFAULT_WIFI_CLIENT_SECURITY_TYPE SL_WIFI_WPA2 - ``` - -- Other STA instance configurations can be modified if required in `default_wifi_client_profile` configuration structure. - -- Configure the following parameters in **app.c** to test throughput app as per requirements - - `SERVER_PORT` is the remote UDP server port number on the PC running iPerf. - - `SERVER_IP_ADDRESS` is the remote UDP server IP address on the PC running iPerf. - - `NUMBER_OF_PACKETS` controls the number of packets sent to the remote UDP server. - - ```c - #define SERVER_IP_ADDRESS "192.168.0.198" - #define SERVER_PORT 5656 - #define NUMBER_OF_PACKETS 1000 - ``` - - - User can configure monitor interval through sl_wifi_set_performance_profile() API. The default interval is set to 50 - millisecs if montior_interval is set to 0. This is only valid when performance profile is set to ASSOCIATED_POWER_SAVE_LOW_LATENCY. - - User can configure listen interval through sl_wifi_set_listen_interval() API. The default interval is set to 1 - millisec. - -## Test the Application - -### Instructions for Simplicity Studio IDE and Silicon Labs devices (SoC and NCP Modes) - -Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: - -- Build the application. -- Flash, run and debug the application. - -### Instructions for Keil IDE and STM32F411RE MCU - -- Build the application. -- Set the Docklight up by connecting STM32's Serial COM port. This enables you to view the application prints. -- Flash, run and debug the application. - -- Application prints - ![Application prints](resources/readme/wifi_powersave_standby_associated_soc.png) - -### Run the iPerf Server - -- Start a UDP server using the following command in command prompt. - - > `C:\ iperf.exe –s -u -p -i 1` - - ![Figure: command prompt on the remote PC](resources/readme/image185.png) - - > If the iPerf server does not start and gives an error in the form of "Access Denied", the user can resolve this error by running the command prompt as an administrator. - -- When the powersave application runs, SiWx91x scans and connect to the Wi-Fi access point and obtains an IP address. After a successful connection, the device goes into configured power save and sends configured number of UDP packets to the remote peer which is connected to access point. The following image shows active reception of UDP data on the UDP server. - - ![Figure: UDP packets to the remote peer](resources/readme/image187.png) - - -### Using Simplicity Studio Energy Profiler for Current Measurement - -- After flashing the application code to the module. Energy profiler can be used for current consumption measurements. - -- From tools, choose Energy Profiler and click "OK". - - ![Figure: Energy Profiler Step 6](resources/readme/energy_profiler_step_6.png) - -- From Quick Access, choose Start Energy Capture option - - ![Figure: Energy Profiler Step 7](resources/readme/energy_profiler_step_7.png) - - > **Note** The target part and board name have to be reverted to default to flash application binary. - - ![Figure: Energy Profiler Step 8](resources/readme/energy_profiler_step_8.png) -- Average current consumption measured in power-meter - - ![output_prints](resources/readme/power_meter_avg_current_consumption.png) - -> **Note:** -> - The captured reference images are measured in an isolated chamber using the ASUS RT-AX3000 Dual Band Wi-Fi. However, variations may occur in open environments, and slight differences might be observed with certain access points APs. -> - The measured current also varies with the different Protocols used, Here UDP protocol is used. Please refer Datasheet for current consumption value for Standby associated for TCP protocol. -> - To achieve the lowest power numbers in connected sleep, in SoC mode, one should configure `RAM_LEVEL` to `SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV` and M4 to sleep without RAM retention i.e. `sl_si91x_configure_ram_retention` should not be done. +# Wi-Fi - Powersave Standby Associated + +## Table of Contents + +- [Purpose/Scope](#purposescope) +- [Prerequisites/Setup Requirements](#prerequisitessetup-requirements) + - [Hardware Requirements](#hardware-requirements) + - [Software Requirements](#software-requirements) + - [Setup Diagram](#setup-diagram) +- [Getting Started](#getting-started) +- [Application Build Environment](#application-build-environment) +- [Test the Application](#test-the-application) + - [Run the iPerf Server](#run-the-iperf-server) + - [Using Simplicity Studio Energy Profiler for Current Measurement](#using-simplicity-studio-energy-profiler-for-current-measurement) + +## Purpose/Scope + +This application demonstrates SiWx91x to enable UDP data transfer in low power mode, with NWP is in associated power save mode with retention and keeping M4 in sleep with retention after data transfer. NWP wakes up periodically based on the DTIM or listen interval configured by the user. + +The application connects to a remote server to send UDP data and also enables the analysis of various performance profiles using a power analyzer during the ASSOCIATED_POWER_SAVE with data transfer via UDP. + +## Prerequisites/Setup Requirements + +### Hardware Requirements + +- Windows PC +- Wi-Fi Access point with a connection to the internet +- PC2 (Remote PC) with UDP server application (iPerf) +- Power analyzer + +- **SoC Mode**: + - Standalone + - BRD4002A Wireless pro kit mainboard [SI-MB4002A] + - Radio Boards + - BRD4338A [SiWx917-RB4338A] + - BRD4342A [SiWx917-RB4342A] + - BRD4343A [SiWx917-RB4343A] + - Kits + - SiWx917 Pro Kit [Si917-PK6031A](https://www.silabs.com/development-tools/wireless/wi-fi/siwx917-pro-kit?tab=overview) + - SiWx917 Pro Kit [Si917-PK6032A] + +- **NCP Mode**: + - Standalone + - BRD4002A Wireless pro kit mainboard [SI-MB4002A] + - EFR32xG24 Wireless 2.4 GHz +10 dBm Radio Board [xG24-RB4186C](https://www.silabs.com/development-tools/wireless/xg24-rb4186c-efr32xg24-wireless-gecko-radio-board?tab=overview) + - NCP Expansion Kit with NCP Radio boards + - (BRD4346A + BRD8045A) [SiWx917-EB4346A] + - (BRD4357A + BRD8045A) [SiWx917-EB4357A] + - Kits + - EFR32xG24 Pro Kit +10 dBm [xG24-PK6009A](https://www.silabs.com/development-tools/wireless/efr32xg24-pro-kit-10-dbm?tab=overview) + - STM32F411RE MCU + - [STM32F411RE](https://www.st.com/en/microcontrollers-microprocessors/stm32f411re.html) MCU + - NCP Expansion Kit with NCP Radio boards + - (BRD4346A + BRD8045C) + - (BRD4357A + BRD8045C) + - Interface and Host MCU Supported + - SPI - EFR32 & STM32 + - UART - EFR32 + + +### Software Requirements + +- Simplicity Studio IDE (to be used with Silicon Labs MCU) +- Keil IDE (to be used with STM32F411RE MCU) +- Serial Terminal - [Docklight](https://docklight.de/)/[Tera Term](https://ttssh2.osdn.jp/index.html.en) +- [iPerf Application](https://sourceforge.net/projects/iperf2/files/iperf-2.0.8-win.zip/download). iPerf is a tool for active measurements of the maximum achievable bandwidth on IP networks. It supports tuning of various parameters related to timing, buffers and protocols (TCP and UDP with IPv4 and IPv6). + +### Setup Diagram + + ![Figure: Setup Diagram for Power Save Standby Example](resources/readme/setup_soc_ncp.png) + +## Getting Started + +### Instructions for Simplicity Studio IDE and Silicon Labs devices (SoC and NCP Modes) + Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: + + - Install Studio and WiSeConnect 3 extension + - Connect your device to the computer + - Upgrade your connectivity firmware + - Create a Studio project + +For details on the project folder structure, see the [WiSeConnect Examples](https://docs.silabs.com/wiseconnect/latest/wiseconnect-examples/#example-folder-structure) page. + +### Instructions for Keil IDE and STM32F411RE MCU (NCP Mode) + +Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: + + - Install the [Keil IDE](https://www.keil.com/). + - Download [WiSeConnect 3 SDK](https://github.com/SiliconLabs/wiseconnect) + - Update the device's connectivity firmware as mentioned [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/getting-started-with-ncp-mode-with-stm32#upgrade-the-si-wx91x-connectivity-firmware). + - Connect the SiWx91x NCP to STM32F411RE Nucleo Board following the below steps: + - Connect the male Arduino compatible header on carrier board to female Arduino compatible header on STM32F411RE Nucleo board. + - Mount the NCP Radio board (BRD4346A/BRD4357A) onto the radio board socket available on the base board (BRD8045C). + - After connecting all the boards, the setup should look like the image shown below: + ![Figure: Setup](resources/readme/stm32_setup.png) + - Connect the setup to the computer. + - Open the Powersave standby associated µVision project - **powersave_standby_associated.uvprojx** by navigating to **WiSeConnect 3 SDK → examples → featured → powersave_standby_associated → keil_project**. + +## Application Build Environment + +The application can be configured to suit user requirements and development environment. Read through the following sections and make any changes needed. + +### Configure sl_net_default_values.h + +**File path for Simplicity Studio IDE:** +- In the Project Explorer pane, expand the **config** folder and open the **sl_net_default_values.h** file. + +**File path for Keil IDE:** +- In the Project pane, expand the **resources/defaults** folder and open the **sl_net_default_values.h** file. + +Configure the following parameters to enable your Silicon Labs Wi-Fi device to connect to your Wi-Fi network + + - DEFAULT_WIFI_CLIENT_PROFILE_SSID refers to the name with which Wi-Fi network that shall be advertised and Si91X module is connected to it. + + ```c + #define DEFAULT_WIFI_CLIENT_PROFILE_SSID "YOUR_AP_SSID" + ``` + + - DEFAULT_WIFI_CLIENT_CREDENTIAL refers to the secret key if the Access point is configured in WPA-PSK/WPA2-PSK security modes. + + ```c + #define DEFAULT_WIFI_CLIENT_CREDENTIAL "YOUR_AP_PASSPHRASE" + ``` + + - DEFAULT_WIFI_CLIENT_SECURITY_TYPE refers to the security type of the Access point. The supported security modes are mentioned in `sl_wifi_security_t`. + + ```c + #define DEFAULT_WIFI_CLIENT_SECURITY_TYPE SL_WIFI_WPA2 + ``` + +- Other STA instance configurations can be modified if required in `default_wifi_client_profile` configuration structure. + +- Configure the following parameters in **app.c** to test throughput app as per requirements + - `SERVER_PORT` is the remote UDP server port number on the PC running iPerf. + - `SERVER_IP_ADDRESS` is the remote UDP server IP address on the PC running iPerf. + - `NUMBER_OF_PACKETS` controls the number of packets sent to the remote UDP server. + + ```c + #define SERVER_IP_ADDRESS "192.168.50.40" + #define SERVER_PORT 5001 + #define NUMBER_OF_PACKETS 1000 + ``` + + - User can configure monitor interval through sl_wifi_set_performance_profile() API. The default interval is set to 50 + millisecs if montior_interval is set to 0. This is only valid when performance profile is set to ASSOCIATED_POWER_SAVE_LOW_LATENCY. + - User can configure listen interval through sl_wifi_set_listen_interval() API. The default interval is set to 1 + millisec. + +## Test the Application + +### Instructions for Simplicity Studio IDE and Silicon Labs devices (SoC and NCP Modes) + +Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: + +- Build the application. +- Flash, run and debug the application. + +### Instructions for Keil IDE and STM32F411RE MCU + +- Build the application. +- Set the Docklight up by connecting STM32's Serial COM port. This enables you to view the application prints. +- Flash, run and debug the application. + +- Application prints + ![Application prints](resources/readme/wifi_powersave_standby_associated_soc.png) + +### Run the iPerf Server + +- Start a UDP server using the following command in command prompt. + + > `C:\ iperf.exe –s -u -p -i 1` + + ![Figure: command prompt on the remote PC](resources/readme/image185.png) + + > If the iPerf server does not start and gives an error in the form of "Access Denied", the user can resolve this error by running the command prompt as an administrator. + +- When the powersave application runs, SiWx91x scans and connect to the Wi-Fi access point and obtains an IP address. After a successful connection, the device goes into configured power save and sends configured number of UDP packets to the remote peer which is connected to access point. The following image shows active reception of UDP data on the UDP server. + + ![Figure: UDP packets to the remote peer](resources/readme/image187.png) + + +### Using Simplicity Studio Energy Profiler for Current Measurement + +- After flashing the application code to the module. Energy profiler can be used for current consumption measurements. + +- From tools, choose Energy Profiler and click "OK". + + ![Figure: Energy Profiler Step 6](resources/readme/energy_profiler_step_6.png) + +- From Quick Access, choose Start Energy Capture option + + ![Figure: Energy Profiler Step 7](resources/readme/energy_profiler_step_7.png) + + > **Note** The target part and board name have to be reverted to default to flash application binary. + + ![Figure: Energy Profiler Step 8](resources/readme/energy_profiler_step_8.png) +- Average current consumption measured in power-meter + + ![output_prints](resources/readme/power_meter_avg_current_consumption.png) + +> **Note:** +> - The captured reference images are measured in an isolated chamber using the ASUS RT-AX3000 Dual Band Wi-Fi. However, variations may occur in open environments, and slight differences might be observed with certain access points APs. +> - The measured current also varies with the different Protocols used, Here UDP protocol is used. Please refer Datasheet for current consumption value for Standby associated for TCP protocol. +> - To achieve the lowest power numbers in connected sleep, in SoC mode, one should configure `RAM_LEVEL` to `SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV` and M4 to sleep without RAM retention i.e. `sl_si91x_configure_ram_retention` should not be done. > - A flash erase is required to flash any other application after the user runs the powersave application(s). If not, the module will not allow any application to be flashed. \ No newline at end of file diff --git a/examples/featured/powersave_standby_associated/resources/readme/alarm_timer_configure.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/alarm_timer_configure.png similarity index 100% rename from examples/featured/powersave_standby_associated/resources/readme/alarm_timer_configure.png rename to examples/featured/low_power/powersave_standby_associated/resources/readme/alarm_timer_configure.png diff --git a/examples/featured/powersave_standby_associated/resources/readme/energy_profiler_step_6.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/energy_profiler_step_6.png similarity index 100% rename from examples/featured/powersave_standby_associated/resources/readme/energy_profiler_step_6.png rename to examples/featured/low_power/powersave_standby_associated/resources/readme/energy_profiler_step_6.png diff --git a/examples/featured/powersave_standby_associated/resources/readme/energy_profiler_step_7.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/energy_profiler_step_7.png similarity index 100% rename from examples/featured/powersave_standby_associated/resources/readme/energy_profiler_step_7.png rename to examples/featured/low_power/powersave_standby_associated/resources/readme/energy_profiler_step_7.png diff --git a/examples/featured/powersave_standby_associated/resources/readme/energy_profiler_step_8.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/energy_profiler_step_8.png similarity index 100% rename from examples/featured/powersave_standby_associated/resources/readme/energy_profiler_step_8.png rename to examples/featured/low_power/powersave_standby_associated/resources/readme/energy_profiler_step_8.png diff --git a/examples/featured/low_power/powersave_standby_associated/resources/readme/image185.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/image185.png new file mode 100644 index 000000000..943e62d29 Binary files /dev/null and b/examples/featured/low_power/powersave_standby_associated/resources/readme/image185.png differ diff --git a/examples/featured/low_power/powersave_standby_associated/resources/readme/image187.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/image187.png new file mode 100644 index 000000000..66b11fc76 Binary files /dev/null and b/examples/featured/low_power/powersave_standby_associated/resources/readme/image187.png differ diff --git a/examples/featured/powersave_standby_associated/resources/readme/output_soc.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/output_soc.png similarity index 100% rename from examples/featured/powersave_standby_associated/resources/readme/output_soc.png rename to examples/featured/low_power/powersave_standby_associated/resources/readme/output_soc.png diff --git a/examples/featured/low_power/powersave_standby_associated/resources/readme/power_meter_avg_current_consumption.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/power_meter_avg_current_consumption.png new file mode 100644 index 000000000..61868e94e Binary files /dev/null and b/examples/featured/low_power/powersave_standby_associated/resources/readme/power_meter_avg_current_consumption.png differ diff --git a/examples/featured/powersave_standby_associated/resources/readme/power_save_current_measurement_pins.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/power_save_current_measurement_pins.png similarity index 100% rename from examples/featured/powersave_standby_associated/resources/readme/power_save_current_measurement_pins.png rename to examples/featured/low_power/powersave_standby_associated/resources/readme/power_save_current_measurement_pins.png diff --git a/examples/featured/low_power/powersave_standby_associated/resources/readme/setup_soc_ncp.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/setup_soc_ncp.png new file mode 100644 index 000000000..97cceb0a7 Binary files /dev/null and b/examples/featured/low_power/powersave_standby_associated/resources/readme/setup_soc_ncp.png differ diff --git a/examples/featured/powersave_standby_associated/resources/readme/stm32_setup.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/stm32_setup.png similarity index 100% rename from examples/featured/powersave_standby_associated/resources/readme/stm32_setup.png rename to examples/featured/low_power/powersave_standby_associated/resources/readme/stm32_setup.png diff --git a/examples/featured/powersave_standby_associated/resources/readme/wakeup_configure.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/wakeup_configure.png similarity index 100% rename from examples/featured/powersave_standby_associated/resources/readme/wakeup_configure.png rename to examples/featured/low_power/powersave_standby_associated/resources/readme/wakeup_configure.png diff --git a/examples/featured/powersave_standby_associated/resources/readme/wifi_powersave_standby_associated_soc.png b/examples/featured/low_power/powersave_standby_associated/resources/readme/wifi_powersave_standby_associated_soc.png similarity index 100% rename from examples/featured/powersave_standby_associated/resources/readme/wifi_powersave_standby_associated_soc.png rename to examples/featured/low_power/powersave_standby_associated/resources/readme/wifi_powersave_standby_associated_soc.png diff --git a/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_ncp.slcp b/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_ncp.slcp index 8995dca97..1dac6fef5 100644 --- a/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_ncp.slcp +++ b/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_ncp.slcp @@ -12,10 +12,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_psram.slcp b/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_psram.slcp index 3d72e392d..0433fb117 100644 --- a/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_psram.slcp +++ b/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_psram.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_soc.slcp b/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_soc.slcp index a3f8f6d8e..f17da3358 100644 --- a/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_soc.slcp +++ b/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_soc.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_uart_ncp.slcp b/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_uart_ncp.slcp index 3c144300b..ec3ceb0f1 100644 --- a/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_uart_ncp.slcp +++ b/examples/featured/low_power/powersave_standby_associated_tcp_client/powersave_standby_associated_tcp_client_uart_ncp.slcp @@ -12,10 +12,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/low_power/powersave_standby_associated_tcp_client/readme.md b/examples/featured/low_power/powersave_standby_associated_tcp_client/readme.md index 7de15160f..906d13fc3 100644 --- a/examples/featured/low_power/powersave_standby_associated_tcp_client/readme.md +++ b/examples/featured/low_power/powersave_standby_associated_tcp_client/readme.md @@ -111,6 +111,7 @@ Configure the following parameters to enable your Silicon Labs Wi-Fi device to c #define SERVER_PORT 5656 #define NUMBER_OF_PACKETS 1000 ``` +- To send the TCP data, change the `SEND_TCP_DATA` to `1` - User can configure monitor interval through sl_wifi_set_performance_profile() API. The default interval is set to 50 millisecs if montior_interval is set to 0. This is only valid when performance profile is set to ASSOCIATED_POWER_SAVE_LOW_LATENCY. diff --git a/examples/featured/low_power/twt_tcp_client/twt_tcp_client_ncp.slcp b/examples/featured/low_power/twt_tcp_client/twt_tcp_client_ncp.slcp index c7a89963f..7f3bd3d77 100644 --- a/examples/featured/low_power/twt_tcp_client/twt_tcp_client_ncp.slcp +++ b/examples/featured/low_power/twt_tcp_client/twt_tcp_client_ncp.slcp @@ -13,10 +13,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/low_power/twt_tcp_client/twt_tcp_client_soc.slcp b/examples/featured/low_power/twt_tcp_client/twt_tcp_client_soc.slcp index 35110ad91..70c38ae5f 100644 --- a/examples/featured/low_power/twt_tcp_client/twt_tcp_client_soc.slcp +++ b/examples/featured/low_power/twt_tcp_client/twt_tcp_client_soc.slcp @@ -13,10 +13,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/powersave_standby_associated/resources/readme/image185.png b/examples/featured/powersave_standby_associated/resources/readme/image185.png deleted file mode 100644 index 8fbc86bd7..000000000 Binary files a/examples/featured/powersave_standby_associated/resources/readme/image185.png and /dev/null differ diff --git a/examples/featured/powersave_standby_associated/resources/readme/image187.png b/examples/featured/powersave_standby_associated/resources/readme/image187.png deleted file mode 100644 index 4b73a663e..000000000 Binary files a/examples/featured/powersave_standby_associated/resources/readme/image187.png and /dev/null differ diff --git a/examples/featured/powersave_standby_associated/resources/readme/power_meter_avg_current_consumption.png b/examples/featured/powersave_standby_associated/resources/readme/power_meter_avg_current_consumption.png deleted file mode 100644 index 0681fb530..000000000 Binary files a/examples/featured/powersave_standby_associated/resources/readme/power_meter_avg_current_consumption.png and /dev/null differ diff --git a/examples/featured/powersave_standby_associated/resources/readme/setup_soc_ncp.png b/examples/featured/powersave_standby_associated/resources/readme/setup_soc_ncp.png deleted file mode 100644 index 20a004d84..000000000 Binary files a/examples/featured/powersave_standby_associated/resources/readme/setup_soc_ncp.png and /dev/null differ diff --git a/examples/featured/wlan_throughput/wlan_throughput_ncp.slcp b/examples/featured/wlan_throughput/wlan_throughput_ncp.slcp index 2597d0419..a60c068bc 100644 --- a/examples/featured/wlan_throughput/wlan_throughput_ncp.slcp +++ b/examples/featured/wlan_throughput/wlan_throughput_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/wlan_throughput/wlan_throughput_psram.slcp b/examples/featured/wlan_throughput/wlan_throughput_psram.slcp index d6518bd30..b198d83f3 100644 --- a/examples/featured/wlan_throughput/wlan_throughput_psram.slcp +++ b/examples/featured/wlan_throughput/wlan_throughput_psram.slcp @@ -15,10 +15,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/wlan_throughput/wlan_throughput_soc.slcp b/examples/featured/wlan_throughput/wlan_throughput_soc.slcp index e61275bde..ea2036e52 100644 --- a/examples/featured/wlan_throughput/wlan_throughput_soc.slcp +++ b/examples/featured/wlan_throughput/wlan_throughput_soc.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/featured/wlan_throughput/wlan_throughput_uart_ncp.slcp b/examples/featured/wlan_throughput/wlan_throughput_uart_ncp.slcp index f1260f66c..3d4e9ffe1 100644 --- a/examples/featured/wlan_throughput/wlan_throughput_uart_ncp.slcp +++ b/examples/featured/wlan_throughput/wlan_throughput_uart_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/si91x_soc/cmsis-rtos/sl_si91x_msg_queue/readme.md b/examples/si91x_soc/cmsis-rtos/sl_si91x_msg_queue/readme.md index d683b4e24..1ae2dfd4f 100644 --- a/examples/si91x_soc/cmsis-rtos/sl_si91x_msg_queue/readme.md +++ b/examples/si91x_soc/cmsis-rtos/sl_si91x_msg_queue/readme.md @@ -84,8 +84,7 @@ After transmission the data is compared and result is printed on the console. - Si91x - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/cmsis-rtos/sl_si91x_msg_queue/sl_si91x_msg_queue.slcp b/examples/si91x_soc/cmsis-rtos/sl_si91x_msg_queue/sl_si91x_msg_queue.slcp index 593600eb4..2fdf619c9 100644 --- a/examples/si91x_soc/cmsis-rtos/sl_si91x_msg_queue/sl_si91x_msg_queue.slcp +++ b/examples/si91x_soc/cmsis-rtos/sl_si91x_msg_queue/sl_si91x_msg_queue.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: diff --git a/examples/si91x_soc/cmsis-rtos/sl_si91x_mutex/sl_si91x_mutex.slcp b/examples/si91x_soc/cmsis-rtos/sl_si91x_mutex/sl_si91x_mutex.slcp index 209ae60e9..0c306844a 100644 --- a/examples/si91x_soc/cmsis-rtos/sl_si91x_mutex/sl_si91x_mutex.slcp +++ b/examples/si91x_soc/cmsis-rtos/sl_si91x_mutex/sl_si91x_mutex.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: diff --git a/examples/si91x_soc/crypto/si91x_psa_aes/si91x_psa_aes.slcp b/examples/si91x_soc/crypto/si91x_psa_aes/si91x_psa_aes.slcp index e3b4852f2..3e093c577 100644 --- a/examples/si91x_soc/crypto/si91x_psa_aes/si91x_psa_aes.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_aes/si91x_psa_aes.slcp @@ -14,7 +14,7 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 readme: - path: readme.md source: @@ -63,7 +63,7 @@ ui_hints: focus: true sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/crypto/si91x_psa_asymmetric_key_storage/si91x_psa_asymmetric_key_storage.slcp b/examples/si91x_soc/crypto/si91x_psa_asymmetric_key_storage/si91x_psa_asymmetric_key_storage.slcp index 8779be736..71d383dcb 100644 --- a/examples/si91x_soc/crypto/si91x_psa_asymmetric_key_storage/si91x_psa_asymmetric_key_storage.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_asymmetric_key_storage/si91x_psa_asymmetric_key_storage.slcp @@ -26,10 +26,10 @@ include: - path: app.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 component: - id: sl_system - id: freertos diff --git a/examples/si91x_soc/crypto/si91x_psa_ccm/readme.md b/examples/si91x_soc/crypto/si91x_psa_ccm/readme.md index caf06b872..2f7b9b200 100644 --- a/examples/si91x_soc/crypto/si91x_psa_ccm/readme.md +++ b/examples/si91x_soc/crypto/si91x_psa_ccm/readme.md @@ -25,6 +25,7 @@ Before running the application, the user will need the following things to setup - Windows PC - Silicon Labs Si917 Evaluation Kit [WPK(BRD4002)+ BRD4338A] + - For the Wrap Key feature of this application to work, the keys should be programmed and secure boot (ta_secure_boot) should be enabled in the device ### Software Requirements diff --git a/examples/si91x_soc/crypto/si91x_psa_ccm/si91x_psa_ccm.slcp b/examples/si91x_soc/crypto/si91x_psa_ccm/si91x_psa_ccm.slcp index da2699a80..7019fb25c 100644 --- a/examples/si91x_soc/crypto/si91x_psa_ccm/si91x_psa_ccm.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_ccm/si91x_psa_ccm.slcp @@ -25,10 +25,10 @@ include: - path: psa_ccm_app.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 component: - id: sl_system - id: freertos diff --git a/examples/si91x_soc/crypto/si91x_psa_chachapoly/readme.md b/examples/si91x_soc/crypto/si91x_psa_chachapoly/readme.md index a49c2ee43..c50fd84e8 100644 --- a/examples/si91x_soc/crypto/si91x_psa_chachapoly/readme.md +++ b/examples/si91x_soc/crypto/si91x_psa_chachapoly/readme.md @@ -25,6 +25,7 @@ Before running the application, the user will need the following things to setup - Windows PC - Silicon Labs Si917 Evaluation Kit [WPK(BRD4002)+ BRD4338A] + - For the Wrap Key feature of this application to work, the keys should be programmed and secure boot (ta_secure_boot) should be enabled in the device ### Software Requirements diff --git a/examples/si91x_soc/crypto/si91x_psa_chachapoly/si91x_psa_chachapoly.slcp b/examples/si91x_soc/crypto/si91x_psa_chachapoly/si91x_psa_chachapoly.slcp index c91578e3e..75d75253f 100644 --- a/examples/si91x_soc/crypto/si91x_psa_chachapoly/si91x_psa_chachapoly.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_chachapoly/si91x_psa_chachapoly.slcp @@ -25,10 +25,10 @@ include: - path: psa_chachapoly_app.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 component: - id: sl_system - id: freertos diff --git a/examples/si91x_soc/crypto/si91x_psa_cmac/readme.md b/examples/si91x_soc/crypto/si91x_psa_cmac/readme.md index 691b85a3c..238a61cab 100644 --- a/examples/si91x_soc/crypto/si91x_psa_cmac/readme.md +++ b/examples/si91x_soc/crypto/si91x_psa_cmac/readme.md @@ -27,7 +27,7 @@ To use this application following Hardware, Software and the Project Setup is re - Silicon Labs Si917 Evaluation Kit [WPK(BRD4002)+ BRD4338A] ### Software Requirements - - Simplicity SDK version: 2024.6.1 + - Simplicity SDK version: 2024.6.2 - Si91x SDK - Embedded Development Environment - For Silicon Labs Si91x, use the latest version of Simplicity Studio (refer **"Download and Install Simplicity Studio"** section in **getting-started-with-siwx917-soc** guide at **release_package/docs/index.html**) diff --git a/examples/si91x_soc/crypto/si91x_psa_cmac/si91x_psa_cmac.slcp b/examples/si91x_soc/crypto/si91x_psa_cmac/si91x_psa_cmac.slcp index 34b0c9265..5d545196a 100644 --- a/examples/si91x_soc/crypto/si91x_psa_cmac/si91x_psa_cmac.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_cmac/si91x_psa_cmac.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: psa_cmac_app.c diff --git a/examples/si91x_soc/crypto/si91x_psa_ecdh/si91x_psa_ecdh.slcp b/examples/si91x_soc/crypto/si91x_psa_ecdh/si91x_psa_ecdh.slcp index a06d241e5..e2aa565c0 100644 --- a/examples/si91x_soc/crypto/si91x_psa_ecdh/si91x_psa_ecdh.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_ecdh/si91x_psa_ecdh.slcp @@ -16,10 +16,10 @@ readme: - path: readme.md sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: psa_ecdh.c diff --git a/examples/si91x_soc/crypto/si91x_psa_ecdsa/readme.md b/examples/si91x_soc/crypto/si91x_psa_ecdsa/readme.md index 510438bde..e3de4dae3 100644 --- a/examples/si91x_soc/crypto/si91x_psa_ecdsa/readme.md +++ b/examples/si91x_soc/crypto/si91x_psa_ecdsa/readme.md @@ -23,12 +23,11 @@ ## Prerequisites/Setup Requirements -- The board MBR should have "ta_secure_boot_enable" set to 1 for wrap functionality - ### Hardware Requirements - Windows PC - Silicon Labs Si917 Evaluation Kit [WPK(BRD4002)+ BRD4338A] + - For the Wrap Key feature of this application to work, the keys should be programmed and secure boot (ta_secure_boot) should be enabled in the device ### Software Requirements diff --git a/examples/si91x_soc/crypto/si91x_psa_ecdsa/si91x_psa_ecdsa.slcp b/examples/si91x_soc/crypto/si91x_psa_ecdsa/si91x_psa_ecdsa.slcp index 7cd75d27b..f19465dee 100644 --- a/examples/si91x_soc/crypto/si91x_psa_ecdsa/si91x_psa_ecdsa.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_ecdsa/si91x_psa_ecdsa.slcp @@ -16,10 +16,10 @@ readme: - path: readme.md sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/crypto/si91x_psa_gcm/readme.md b/examples/si91x_soc/crypto/si91x_psa_gcm/readme.md index f47df9683..4d14eb9a4 100644 --- a/examples/si91x_soc/crypto/si91x_psa_gcm/readme.md +++ b/examples/si91x_soc/crypto/si91x_psa_gcm/readme.md @@ -25,6 +25,7 @@ Before running the application, the user will need the following things to setup - Windows PC - Silicon Labs Si917 Evaluation Kit [WPK(BRD4002)+ BRD4338A] + - For the Wrap Key feature of this application to work, the keys should be programmed and secure boot (ta_secure_boot) should be enabled in the device ### Software Requirements diff --git a/examples/si91x_soc/crypto/si91x_psa_gcm/si91x_psa_gcm.slcp b/examples/si91x_soc/crypto/si91x_psa_gcm/si91x_psa_gcm.slcp index 70ce0a2d4..833f86278 100644 --- a/examples/si91x_soc/crypto/si91x_psa_gcm/si91x_psa_gcm.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_gcm/si91x_psa_gcm.slcp @@ -25,10 +25,10 @@ include: - path: psa_gcm_app.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 component: - id: sl_system - id: freertos diff --git a/examples/si91x_soc/crypto/si91x_psa_hmac/si91x_psa_hmac.slcp b/examples/si91x_soc/crypto/si91x_psa_hmac/si91x_psa_hmac.slcp index 74a13f622..4d9bab6a5 100644 --- a/examples/si91x_soc/crypto/si91x_psa_hmac/si91x_psa_hmac.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_hmac/si91x_psa_hmac.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: psa_hmac_app.c diff --git a/examples/si91x_soc/crypto/si91x_psa_multithread/readme.md b/examples/si91x_soc/crypto/si91x_psa_multithread/readme.md index b253f53f1..f9f24646b 100644 --- a/examples/si91x_soc/crypto/si91x_psa_multithread/readme.md +++ b/examples/si91x_soc/crypto/si91x_psa_multithread/readme.md @@ -27,7 +27,7 @@ - Silicon Labs Si917 Evaluation Kit [WPK(BRD4002)+ BRD4338A] ### Software Requirements - - Simplicity SDK version: 2024.6.1 + - Simplicity SDK version: 2024.6.2 - Si91x SDK - Embedded Development Environment - For Silicon Labs Si91x, use the latest version of Simplicity Studio (refer **"Download and Install Simplicity Studio"** section in **getting-started-with-siwx917-soc** guide at **release_package/docs/index.html**) diff --git a/examples/si91x_soc/crypto/si91x_psa_multithread/si91x_psa_multithread.slcp b/examples/si91x_soc/crypto/si91x_psa_multithread/si91x_psa_multithread.slcp index 1533fdc94..dfa9b29c2 100644 --- a/examples/si91x_soc/crypto/si91x_psa_multithread/si91x_psa_multithread.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_multithread/si91x_psa_multithread.slcp @@ -14,7 +14,7 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 readme: - path: readme.md source: @@ -73,7 +73,7 @@ ui_hints: focus: true sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/crypto/si91x_psa_sha/si91x_psa_sha.slcp b/examples/si91x_soc/crypto/si91x_psa_sha/si91x_psa_sha.slcp index ce7c979e9..c04d4a8d8 100644 --- a/examples/si91x_soc/crypto/si91x_psa_sha/si91x_psa_sha.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_sha/si91x_psa_sha.slcp @@ -16,10 +16,10 @@ readme: - path: readme.md sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: psa_sha_app.c diff --git a/examples/si91x_soc/crypto/si91x_psa_symmetric_key_storage/si91x_psa_symmetric_key_storage.slcp b/examples/si91x_soc/crypto/si91x_psa_symmetric_key_storage/si91x_psa_symmetric_key_storage.slcp index b124486bc..4d6811f3b 100644 --- a/examples/si91x_soc/crypto/si91x_psa_symmetric_key_storage/si91x_psa_symmetric_key_storage.slcp +++ b/examples/si91x_soc/crypto/si91x_psa_symmetric_key_storage/si91x_psa_symmetric_key_storage.slcp @@ -26,10 +26,10 @@ include: - path: psa_symmetric_key_storage_app.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 define: - name: SL_SI91X_PRINT_DBG_LOG component: diff --git a/examples/si91x_soc/crypto/test/aead/si91x_test_aead.slcp b/examples/si91x_soc/crypto/test/aead/si91x_test_aead.slcp index 879df91d6..c4fb3b112 100644 --- a/examples/si91x_soc/crypto/test/aead/si91x_test_aead.slcp +++ b/examples/si91x_soc/crypto/test/aead/si91x_test_aead.slcp @@ -26,10 +26,10 @@ include: - path: psa_driver_aead_test_data.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 component: - id: sl_system - id: freertos diff --git a/examples/si91x_soc/crypto/test/cipher/si91x_test_cipher.slcp b/examples/si91x_soc/crypto/test/cipher/si91x_test_cipher.slcp index b20dd740c..c6552a84d 100644 --- a/examples/si91x_soc/crypto/test/cipher/si91x_test_cipher.slcp +++ b/examples/si91x_soc/crypto/test/cipher/si91x_test_cipher.slcp @@ -18,10 +18,10 @@ include: - path: psa_driver_cipher_test_data.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/crypto/test/hash/si91x_test_hash.slcp b/examples/si91x_soc/crypto/test/hash/si91x_test_hash.slcp index a87a5d592..9d94f00af 100644 --- a/examples/si91x_soc/crypto/test/hash/si91x_test_hash.slcp +++ b/examples/si91x_soc/crypto/test/hash/si91x_test_hash.slcp @@ -16,10 +16,10 @@ readme: - path: readme.md sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/crypto/test/mac/si91x_test_mac.slcp b/examples/si91x_soc/crypto/test/mac/si91x_test_mac.slcp index 6dc322c3a..aa0553876 100644 --- a/examples/si91x_soc/crypto/test/mac/si91x_test_mac.slcp +++ b/examples/si91x_soc/crypto/test/mac/si91x_test_mac.slcp @@ -7,10 +7,10 @@ package: platform quality: internal sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/hello_world/si91x_hello_world.slcp b/examples/si91x_soc/hello_world/si91x_hello_world.slcp index 896489c57..58d3df6d7 100644 --- a/examples/si91x_soc/hello_world/si91x_hello_world.slcp +++ b/examples/si91x_soc/hello_world/si91x_hello_world.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/si91x_soc/peripheral/memlcd_baremetal/memlcd_baremetal.slcp b/examples/si91x_soc/peripheral/memlcd_baremetal/memlcd_baremetal.slcp index 71896f125..b10558d06 100644 --- a/examples/si91x_soc/peripheral/memlcd_baremetal/memlcd_baremetal.slcp +++ b/examples/si91x_soc/peripheral/memlcd_baremetal/memlcd_baremetal.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/si91x_soc/peripheral/psram_blinky/psram_blinky.slcp b/examples/si91x_soc/peripheral/psram_blinky/psram_blinky.slcp index cd6d1872b..2858ca1d1 100644 --- a/examples/si91x_soc/peripheral/psram_blinky/psram_blinky.slcp +++ b/examples/si91x_soc/peripheral/psram_blinky/psram_blinky.slcp @@ -9,10 +9,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/si91x_soc/peripheral/psram_driver_example/psram_driver_example.slcp b/examples/si91x_soc/peripheral/psram_driver_example/psram_driver_example.slcp index 3e89bbf82..d8c114a90 100644 --- a/examples/si91x_soc/peripheral/psram_driver_example/psram_driver_example.slcp +++ b/examples/si91x_soc/peripheral/psram_driver_example/psram_driver_example.slcp @@ -11,10 +11,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 requires: - name: wiseconnect_toolchain_psram_linker source: diff --git a/examples/si91x_soc/peripheral/psram_driver_example/readme.md b/examples/si91x_soc/peripheral/psram_driver_example/readme.md index 289a34385..1920e6436 100644 --- a/examples/si91x_soc/peripheral/psram_driver_example/readme.md +++ b/examples/si91x_soc/peripheral/psram_driver_example/readme.md @@ -27,8 +27,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram @@ -59,7 +58,7 @@ For details on the project folder structure, see the [WiSeConnect Examples](http > ![Figure: Core Component Installation](resources/readme/core_component.png) - Configuration for Pinset > ![Figure: PSRAM Pin Configuration](resources/readme/pin_configs.png) -- Configuration for Clock, Read-Write type, Interface mode +- Configuration for Clock Frequency, Read-Write type, Interface mode > ![Figure: PSRAM Device Configuration](resources/readme/device_config.png) ## Test the Application diff --git a/examples/si91x_soc/peripheral/psram_driver_example/resources/readme/device_config.png b/examples/si91x_soc/peripheral/psram_driver_example/resources/readme/device_config.png index 71d02b3a8..67ba69abf 100644 Binary files a/examples/si91x_soc/peripheral/psram_driver_example/resources/readme/device_config.png and b/examples/si91x_soc/peripheral/psram_driver_example/resources/readme/device_config.png differ diff --git a/examples/si91x_soc/peripheral/sl_si91x_adc_fifo_mode/readme.md b/examples/si91x_soc/peripheral/sl_si91x_adc_fifo_mode/readme.md index a14379914..fbee70c2c 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_adc_fifo_mode/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_adc_fifo_mode/readme.md @@ -52,6 +52,7 @@ - After configuration, a callback register API is called to register the callback at the time of events \ref sl_si91x_adc_register_event_callback. - Then start the ADC to sample the data using \ref sl_si91x_adc_start API. - Once sampling is done callback will hit and set the true "data_sample_complete_flag" flag to read the sampled data using \ref sl_si91x_adc_read_data API for FIFO mode of ADC. This process will run continuously. +- If ADC is started, it is recommended to stop it before de-initializing. This is general flow of API calls for ADC: sl_si91x_adc_init -> sl_si91x_adc_start -> sl_si91x_adc_stop -> sl_si91x_adc_deinit. ## Prerequisites/Setup Requirements @@ -64,8 +65,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_adc_fifo_mode/sl_si91x_adc_fifo_mode.slcp b/examples/si91x_soc/peripheral/sl_si91x_adc_fifo_mode/sl_si91x_adc_fifo_mode.slcp index 20015ceaa..325cf3617 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_adc_fifo_mode/sl_si91x_adc_fifo_mode.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_adc_fifo_mode/sl_si91x_adc_fifo_mode.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: adc_fifo_mode_example.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_adc_static_mode/readme.md b/examples/si91x_soc/peripheral/sl_si91x_adc_static_mode/readme.md index a4724d095..de3516e1c 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_adc_static_mode/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_adc_static_mode/readme.md @@ -52,6 +52,7 @@ - After configuration, a callback register API is called to register the callback at the time of events \ref sl_si91x_adc_register_event_callback. - Then start the ADC to sample the data using \ref sl_si91x_adc_start API. - Once sampling is done callback will hit and set the true "data_sample_complete_flag" flag to read the sampled data using \ref sl_si91x_adc_read_data_static API for static mode of ADC. This process will run continuously. +- If ADC is started, it is recommended to stop it before de-initializing. This is general flow of API calls for ADC: sl_si91x_adc_init -> sl_si91x_adc_start -> sl_si91x_adc_stop -> sl_si91x_adc_deinit. ## Prerequisites/Setup Requirements @@ -64,8 +65,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output).. ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_adc_static_mode/sl_si91x_adc_static_mode.slcp b/examples/si91x_soc/peripheral/sl_si91x_adc_static_mode/sl_si91x_adc_static_mode.slcp index c8e63f46f..e6d9e4e93 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_adc_static_mode/sl_si91x_adc_static_mode.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_adc_static_mode/sl_si91x_adc_static_mode.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: adc_static_mode_example.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_analog_comparator/readme.md b/examples/si91x_soc/peripheral/sl_si91x_analog_comparator/readme.md index 4a7677167..54a3b8992 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_analog_comparator/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_analog_comparator/readme.md @@ -80,8 +80,7 @@ Compare internal voltages. - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_analog_comparator/sl_si91x_analog_comparator.slcp b/examples/si91x_soc/peripheral/sl_si91x_analog_comparator/sl_si91x_analog_comparator.slcp index 063c0e166..7e18cb1e0 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_analog_comparator/sl_si91x_analog_comparator.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_analog_comparator/sl_si91x_analog_comparator.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_bjt_temperature_sensor/readme.md b/examples/si91x_soc/peripheral/sl_si91x_bjt_temperature_sensor/readme.md index c672c638e..e9471c5d1 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_bjt_temperature_sensor/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_bjt_temperature_sensor/readme.md @@ -41,8 +41,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_bjt_temperature_sensor/sl_si91x_bjt_temperature_sensor.slcp b/examples/si91x_soc/peripheral/sl_si91x_bjt_temperature_sensor/sl_si91x_bjt_temperature_sensor.slcp index e22b21984..74ace2281 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_bjt_temperature_sensor/sl_si91x_bjt_temperature_sensor.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_bjt_temperature_sensor/sl_si91x_bjt_temperature_sensor.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: bjt_temperature_sensor_example.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_blinky/sl_si91x_blinky.slcp b/examples/si91x_soc/peripheral/sl_si91x_blinky/sl_si91x_blinky.slcp index 6d2358ed1..505d520d5 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_blinky/sl_si91x_blinky.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_blinky/sl_si91x_blinky.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_button_baremetal/button_baremetal.c b/examples/si91x_soc/peripheral/sl_si91x_button_baremetal/button_baremetal.c index 127740ad7..808e37265 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_button_baremetal/button_baremetal.c +++ b/examples/si91x_soc/peripheral/sl_si91x_button_baremetal/button_baremetal.c @@ -16,14 +16,21 @@ ******************************************************************************/ #include "button_baremetal.h" -#include "sl_si91x_led.h" #include "sl_si91x_button.h" #include "sl_si91x_button_pin_config.h" -#include "sl_si91x_led_config.h" #include "sl_si91x_button_instances.h" -#include "sl_si91x_led_instances.h" #include "sl_si91x_clock_manager.h" +#ifndef SI917_DEVKIT +#include "sl_si91x_led.h" +#include "sl_si91x_led_config.h" +#include "sl_si91x_led_instances.h" +#else +#include "sl_si91x_rgb_led.h" +#include "sl_si91x_rgb_led_config.h" +#include "sl_si91x_rgb_led_instances.h" +#endif + /******************************************************************************* ******************************* DEFINES *********************************** ******************************************************************************/ @@ -32,11 +39,7 @@ #endif #ifndef LED_INSTANCE -#ifndef SI917_DEVKIT #define LED_INSTANCE led_led0 -#else -#define LED_INSTANCE led_ledb -#endif #endif #define SOC_PLL_CLK ((uint32_t)(180000000)) // 180MHz default SoC PLL Clock as source to Processor @@ -89,7 +92,11 @@ void sl_si91x_button_isr(uint8_t pin, int8_t state) { if (pin == BUTTON_INSTANCE.pin) { if (state == BUTTON_PRESSED) { +#ifndef SI917_DEVKIT sl_si91x_led_toggle(LED_INSTANCE.pin); +#else + sl_si91x_simple_rgb_led_toggle(&LED_INSTANCE); +#endif } } } diff --git a/examples/si91x_soc/peripheral/sl_si91x_button_baremetal/sl_si91x_button_baremetal.slcp b/examples/si91x_soc/peripheral/sl_si91x_button_baremetal/sl_si91x_button_baremetal.slcp index e572c3331..69f4b3ca0 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_button_baremetal/sl_si91x_button_baremetal.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_button_baremetal/sl_si91x_button_baremetal.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -56,4 +56,4 @@ ui_hints: - path: readme.md focus: true post_build: - path: ../../../../utilities/postbuild_profile/wiseconnect_soc.slpb + path: ../../../../utilities/postbuild_profile/wiseconnect_soc.slpb \ No newline at end of file diff --git a/examples/si91x_soc/peripheral/sl_si91x_button_baremetal/sl_si91x_button_baremetal_dev_kit.slcp b/examples/si91x_soc/peripheral/sl_si91x_button_baremetal/sl_si91x_button_baremetal_dev_kit.slcp deleted file mode 100644 index b43b09839..000000000 --- a/examples/si91x_soc/peripheral/sl_si91x_button_baremetal/sl_si91x_button_baremetal_dev_kit.slcp +++ /dev/null @@ -1,59 +0,0 @@ -project_name: sl_si91x_button_baremetal -label: SI91x - Button Baremetal -description: | - Demonstrates how to use button. -category: example|peripheral -package: platform -quality: production -sdk: - id: simplicity_sdk - version: 2024.6.1 -sdk_extension: - - id: wiseconnect3_sdk - version: 3.3.2 -source: - - path: app.c - - path: main.c - - path: button_baremetal.c -include: - - path: . - file_list: - - path: app.h - - path: button_baremetal.h -toolchain_settings: - - option: gcc_compiler_option - value: -Wall -Werror -component: - - id: sl_system - - id: status - - id: syscalls - from: wiseconnect3_sdk - - id: si917_memory_default_config - from: wiseconnect3_sdk - - id: sl_si91x_button_917 - instance: - - btn0 - from: wiseconnect3_sdk - - id: sl_si91x_led_917 - instance: - - ledB - from: wiseconnect3_sdk - - id: sl_clock_manager - from: wiseconnect3_sdk -other_file: - - path: resources/readme/setupdiagram.png - - path: resources/readme/image600d.png - - path: resources/readme/image600a.png -configuration: - - name: SL_BUTTON_CONFIG_BTN0_INTR - value: RISE_EDGE_AND_FALL_EDGE_INTERRUPT - - name: SL_BUTTON_CONFIG_BTN1_INTR - value: RISE_EDGE_AND_FALL_EDGE_INTERRUPT -readme: - - path: readme.md -ui_hints: - highlight: - - path: readme.md - focus: true -post_build: - path: ../../../../utilities/postbuild_profile/wiseconnect_soc.slpb diff --git a/examples/si91x_soc/peripheral/sl_si91x_calendar/calendar_example.c b/examples/si91x_soc/peripheral/sl_si91x_calendar/calendar_example.c index e0afe32b6..2c41aea38 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_calendar/calendar_example.c +++ b/examples/si91x_soc/peripheral/sl_si91x_calendar/calendar_example.c @@ -49,8 +49,6 @@ #define ALARM_SECONDS 15u #define ALARM_MILLISECONDS 100u -#define CAL_RC_CLOCK 2u - #define SOC_PLL_CLK ((uint32_t)(180000000)) // 180MHz default SoC PLL Clock as source to Processor #define INTF_PLL_CLK ((uint32_t)(180000000)) // 180MHz default Interface PLL Clock as source to all peripherals /******************************************************************************* @@ -90,6 +88,8 @@ void calendar_example_init(void) { sl_calendar_datetime_config_t datetime_config; sl_calendar_datetime_config_t get_datetime; + sl_calendar_datetime_config_t datetime_for_unix_demo; + uint32_t unix_timestamp; sl_status_t status; // default clock configuration by application common for whole system @@ -97,14 +97,9 @@ void calendar_example_init(void) do { - //Configuration of clock and initialization of calendar - status = sl_si91x_calendar_set_configuration(CAL_RC_CLOCK); - if (status != SL_STATUS_OK) { - DEBUGOUT("sl_si91x_calendar_set_configuration: Invalid Parameters, Error Code : %lu \n", status); - break; - } - DEBUGOUT("Successfully configured Calendar\n"); + // Initialization of calendar sl_si91x_calendar_init(); + //Setting datetime for Calendar status = sl_si91x_calendar_build_datetime_struct(&datetime_config, TEST_CENTURY, @@ -135,26 +130,29 @@ void calendar_example_init(void) } DEBUGOUT("Successfully fetched the calendar datetime \n"); calendar_print_datetime(get_datetime); - DEBUGOUT("\n"); -#if defined(CLOCK_CALIBRATION) && (CLOCK_CALIBRATION == ENABLE) - //Clock Calibration - sl_si91x_calendar_calibration_init(); - clock_calibration_config_t clock_calibration_config; - clock_calibration_config.rc_enable_calibration = true; - clock_calibration_config.rc_enable_periodic_calibration = true; - clock_calibration_config.rc_trigger_time = SL_RC_THIRTY_SEC; - clock_calibration_config.ro_enable_calibration = true; - clock_calibration_config.ro_enable_periodic_calibration = true; - clock_calibration_config.ro_trigger_time = SL_RO_ONE_SEC; - status = sl_si91x_calendar_rcclk_calibration(&clock_calibration_config); - if (status != SL_STATUS_OK) { - DEBUGOUT("sl_si91x_calendar_rcclk_calibration: Invalid Parameters, Error Code : %lu \n", status); - break; - } - DEBUGOUT("Successfully performed clock calibration \n"); - sl_si91x_calendar_rtc_start(); -#endif + /** Demo APIs related to Unix timestamp conversions */ + datetime_for_unix_demo = get_datetime; + sl_si91x_calendar_convert_calendar_datetime_to_unix_time(&datetime_for_unix_demo, &unix_timestamp); + DEBUGOUT("\nIts equivalent Unix timestamp: %lu\n", unix_timestamp); + + unix_timestamp += 300; // increment by 5min (300 in sec), to demo Unix-to-calendar conversion + DEBUGOUT("\nUnix Timestamp incremented by 5min"); + DEBUGOUT("\nIncremented Unix timestamp: %lu\n", unix_timestamp); + sl_si91x_calendar_convert_unix_time_to_calendar_datetime(unix_timestamp, &datetime_for_unix_demo); + DEBUGOUT("\nUnix to Calendar datetime conversion:\n"); + DEBUGOUT("Time Format: hour:%d, min:%d, sec:%d, msec:%d\n", + datetime_for_unix_demo.Hour, + datetime_for_unix_demo.Minute, + datetime_for_unix_demo.Second, + datetime_for_unix_demo.MilliSeconds); + DEBUGOUT("Date Format: DayOfWeek DD/MM/YY: %.2d %.2d/%.2d/%.2d ", + datetime_for_unix_demo.DayOfWeek, + datetime_for_unix_demo.Day, + datetime_for_unix_demo.Month, + datetime_for_unix_demo.Year); + DEBUGOUT(" Century: %d in GMT Time Zone\n", datetime_for_unix_demo.Century); + /*************************************************************/ #if defined(ALARM_EXAMPLE) && (ALARM_EXAMPLE == ENABLE) sl_calendar_datetime_config_t alarm_config; @@ -274,8 +272,8 @@ static void calendar_print_datetime(sl_calendar_datetime_config_t data) { DEBUGOUT("\n***Calendar time****\n"); DEBUGOUT("Time Format: hour:%d, min:%d, sec:%d, msec:%d\n", data.Hour, data.Minute, data.Second, data.MilliSeconds); - DEBUGOUT("Date Format: DD/MM/YY: %.2d/%.2d/%.2d ", data.Day, data.Month, data.Year); - DEBUGOUT(" Century: %d", data.Century); + DEBUGOUT("Date Format: DayOfWeek DD/MM/YY: %.2d %.2d/%.2d/%.2d ", data.DayOfWeek, data.Day, data.Month, data.Year); + DEBUGOUT(" Century: %d\n", data.Century); } /******************************************************************************* diff --git a/examples/si91x_soc/peripheral/sl_si91x_calendar/calendar_example.h b/examples/si91x_soc/peripheral/sl_si91x_calendar/calendar_example.h index 6636c73e7..c55537d46 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_calendar/calendar_example.h +++ b/examples/si91x_soc/peripheral/sl_si91x_calendar/calendar_example.h @@ -20,11 +20,10 @@ // ----------------------------------------------------------------------------- // Macros -#define ALARM_EXAMPLE DISABLE ///< To enable alarm trigger -#define CLOCK_CALIBRATION DISABLE ///< To enable clock calibration -#define SEC_INTR DISABLE ///< To enable one second trigger -#define MILLI_SEC_INTR DISABLE ///< To enable one millisecond trigger -#define TIME_CONVERSION DISABLE ///< To enable time conversion +#define ALARM_EXAMPLE DISABLE ///< To enable alarm trigger +#define SEC_INTR DISABLE ///< To enable one second trigger +#define MILLI_SEC_INTR DISABLE ///< To enable one millisecond trigger +#define TIME_CONVERSION DISABLE ///< To enable time conversion // ----------------------------------------------------------------------------- // Prototypes diff --git a/examples/si91x_soc/peripheral/sl_si91x_calendar/readme.md b/examples/si91x_soc/peripheral/sl_si91x_calendar/readme.md index 5de601cc0..865dcec4a 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_calendar/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_calendar/readme.md @@ -22,20 +22,18 @@ ## Overview -- Calendar calculates milliseconds, seconds, minutes, hours, days, months and years up to 4 centuries. -- It also calculates days of week and takes care of number of days in month as well as leap year. -- It can also configure alarm for desired time as a one-shot trigger. -- It can generate triggers on one second and one millisecond time interval. -- It uses APB for read and write operations in real time. -- RC clock and RO clock are configurable, and it can also be calibrated using the APIs. +- Calendar calculates milliseconds, seconds, minutes, hours, days, months and years up to 4 centuries. +- It also calculates days of week and takes care of number of days in month as well as leap year. +- It can also configure alarm for desired time as a one-shot trigger. +- It can generate triggers on one second and one millisecond time interval. +- It uses APB for read and write operations in real time. ## About Example Code -- This example demonstrates clock configuration, setting calendar date-time, retrieving calendar date-time, setting alarm date-time, retrieving alarm date-time, handling alarm triggers, one-millisecond triggers, one-second triggers, and clock calibration. -- To configure the calendar clock, select the clock from UC. The \ref sl_si91x_calendar_config function is used to set the calendar clock. -- A structure is created containing default values for calendar date-time. It is created using \ref sl_si91x_calendar_build_datetime_struct. After entering all the parameters, it returns a structure filled with all the parameters. -- Calendar date-time is configured using the \ref sl_si91x_calendar_set_date_time API. It configures the date-time, and the calendar blocks start counting from that time. -- To verify if the desired time is set, the \ref sl_si91x_calendar_get_date_time API is used. It returns a structure with the current date-time. +- This example demonstrates clock configuration, setting calendar date-time, retrieving calendar date-time, setting alarm date-time, retrieving alarm date-time, handling alarm triggers, one-millisecond triggers, one-second triggers, and clock calibration. +- A structure is created containing default values for calendar date-time. It is created using \ref sl_si91x_calendar_build_datetime_struct. After entering all the parameters, it returns a structure filled with all the parameters. +- Calendar date-time is configured using the \ref sl_si91x_calendar_set_date_time API. It configures the date-time, and the calendar blocks start counting from that time. +- To verify if the desired time is set, the \ref sl_si91x_calendar_get_date_time API is used. It returns a structure with the current date-time. - If **ALARM_EXAMPLE** macro is enabled: @@ -45,16 +43,6 @@ - To verify if the desired alarm is set, \ref sl_si91x_calendar_get_alarm API is used, It returns a structure which has configured alarm date-time. - At the time of trigger, it prints current date-time on the console. -- If **CLOCK_CALIBRATION** macro is enabled: - - - This clock calibration applies to RO and RC Clock only. For RO clock \ref sl_si91x_calendar_roclk_calibration should be used and for RC clock \ref sl_si91x_calendar_rcclk_calibration should be used. - - It is recommended to calibrate clock before activating any trigger after every power cycle. - - Initialization of clock is performed using \ref sl_si91x_calendar_calibration_init API. - - To select the clock in UC, follow the procedure mentioned in "Configuration and Steps for Execution" section. - - According to the clock configured in UC, either RO or RC, use respective API to configure the clock. In this example RC clock is selected so \ref sl_si91x_calendar_rcclk_calibration API is used. - - This API expects \ref clock_calibration_config_t structure. For rc_trigger_time, \ref RC_CLOCK_CALIBRATION_ENUM enum can be used, and for ro_trigger_time \ref RO_CLOCK_CALIBRATION_ENUM enum can be used. - - After calibration \ref sl_si91x_calendar_rtc_start is called to start the calendar clock. - - If **SEC_INTR** macro is enabled: - Callback is registered for one second trigger using \ref sl_si91x_calendar_register_sec_trigger_callback API. @@ -89,8 +77,7 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram @@ -111,13 +98,6 @@ For details on the project folder structure, see the [WiSeConnect Examples](http ### Application Configuration Parameters -- Configure UC from the slcp component. -- Open **sl_si91x_calendar.slcp** project file select **software component** tab and search for **Calendar** in search bar. -- Using configuration wizard one can configure the Calendar clock, i.e., RO, RC and XTAL. - - ![Figure: Introduction](resources/uc_screen/calendar_uc_screen.png) - -- Configuration file is generated in **config folder**, if not changed then the code will run on default UC values. - Configure the following macros in calendar_example.h file and update/modify following macros if required. - `ALARM_EXAMPLE`: If ALARM_EXAMPLE is enabled, it prints "Alarm Callback is Triggered" on console when alarm is triggered. By default, it is set to 0. @@ -126,12 +106,6 @@ For details on the project folder structure, see the [WiSeConnect Examples](http #define ALARM_EXAMPLE 0 // To enable alarm trigger ``` -- `CLOCK_CALIBRATION`: If CLOCK_CALIBRATION is enabled, after calibration "Successfully performed clock calibration" print is there on serial console. By default, it is set to 0. - - ```C - #define CLOCK_CALIBRATION 0 // To enable clock calibration - ``` - - `SEC_INTR`: If SEC_INTR is enabled, every one second "One Sec Callback is Triggered" print is there on serial console. By default, it is set to 0. ```C @@ -155,8 +129,9 @@ For details on the project folder structure, see the [WiSeConnect Examples](http Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: 1. Compile and run the application. -2. By default, time and date is configured and prints are observed on serial console. -3. After successful program execution, the prints in serial console looks as shown below. +2. By default, time and date is configured and its Unix timestamp conversion is done, and prints are observed on serial console. +3. Unix timestamp is now incemented by 5min and it is converted back to Calendar time and date. +4. After successful program execution, the prints in serial console looks as shown below. ![Figure: Introduction](resources/readme/output.png) diff --git a/examples/si91x_soc/peripheral/sl_si91x_calendar/resources/readme/output.png b/examples/si91x_soc/peripheral/sl_si91x_calendar/resources/readme/output.png index 528449c4e..689f9ab45 100644 Binary files a/examples/si91x_soc/peripheral/sl_si91x_calendar/resources/readme/output.png and b/examples/si91x_soc/peripheral/sl_si91x_calendar/resources/readme/output.png differ diff --git a/examples/si91x_soc/peripheral/sl_si91x_calendar/resources/uc_screen/calendar_uc_screen.png b/examples/si91x_soc/peripheral/sl_si91x_calendar/resources/uc_screen/calendar_uc_screen.png deleted file mode 100644 index ee97b7fd7..000000000 Binary files a/examples/si91x_soc/peripheral/sl_si91x_calendar/resources/uc_screen/calendar_uc_screen.png and /dev/null differ diff --git a/examples/si91x_soc/peripheral/sl_si91x_calendar/sl_si91x_calendar.slcp b/examples/si91x_soc/peripheral/sl_si91x_calendar/sl_si91x_calendar.slcp index d568c96d5..3bd2632c7 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_calendar/sl_si91x_calendar.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_calendar/sl_si91x_calendar.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: @@ -38,7 +38,6 @@ component: from: wiseconnect3_sdk other_file: - path: resources/readme/setupdiagram.png - - path: resources/uc_screen/calendar_uc_screen.png - path: resources/readme/output.png ui_hints: highlight: diff --git a/examples/si91x_soc/peripheral/sl_si91x_combo_app/readme.md b/examples/si91x_soc/peripheral/sl_si91x_combo_app/readme.md index 941c0524a..5ac353f80 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_combo_app/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_combo_app/readme.md @@ -66,8 +66,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_combo_app/sl_si91x_combo_app.slcp b/examples/si91x_soc/peripheral/sl_si91x_combo_app/sl_si91x_combo_app.slcp index 241082de0..936eaa1dc 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_combo_app/sl_si91x_combo_app.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_combo_app/sl_si91x_combo_app.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: diff --git a/examples/si91x_soc/peripheral/sl_si91x_combo_app/src/i2c_app.c b/examples/si91x_soc/peripheral/sl_si91x_combo_app/src/i2c_app.c index 027395ead..123f44bda 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_combo_app/src/i2c_app.c +++ b/examples/si91x_soc/peripheral/sl_si91x_combo_app/src/i2c_app.c @@ -44,8 +44,6 @@ #define INSTANCE_ZERO 0 // For 0 value #define INSTANCE_ONE 1 // For 0 value #define INSTANCE_TWO 2 // For 0 value -#define MS_DELAY_COUNTER 4600 // Delay count -#define RECEIVE_DATA_SYNC 1 // Sync delay required for Receive #if ((I2C_INSTANCE_USED == INSTANCE_ZERO) || (I2C_INSTANCE_USED == INSTANCE_ONE)) #define SOC_PLL_CLK ((uint32_t)(180000000)) // 180MHz default SoC PLL Clock as source to Processor @@ -86,7 +84,6 @@ uint32_t event_flag; ********************** Local Function prototypes *************************** ******************************************************************************/ static void i2c_leader_callback(sl_i2c_instance_t instance, uint32_t status); -static void delay(uint32_t idelay); static void compare_data(void); static void default_clock_configuration(void); @@ -245,8 +242,6 @@ void i2c_leader_example_process_action(void) case I2C_RECEIVE_DATA: if (i2c_receive_data_flag) { - // Adding delay for synchronization before leader sends read request - delay(RECEIVE_DATA_SYNC); // Disabling repeated start before last cycle of transfer i2c_status = sl_i2c_driver_enable_repeated_start(i2c_instance, false); if (i2c_status != SL_I2C_SUCCESS) { @@ -318,15 +313,6 @@ void i2c_leader_example_process_action(void) break; } } -/******************************************************************************* - * Delay function for 1ms - ******************************************************************************/ -static void delay(uint32_t idelay) -{ - for (uint32_t x = 0; x < MS_DELAY_COUNTER * idelay; x++) { - __NOP(); - } -} /******************************************************************************* * Function to compare the input and output data * diff --git a/examples/si91x_soc/peripheral/sl_si91x_config_timer/readme.md b/examples/si91x_soc/peripheral/sl_si91x_config_timer/readme.md index 446d43d21..38f5bd562 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_config_timer/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_config_timer/readme.md @@ -80,8 +80,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_config_timer/sl_si91x_config_timer.slcp b/examples/si91x_soc/peripheral/sl_si91x_config_timer/sl_si91x_config_timer.slcp index 982959534..c81eb0240 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_config_timer/sl_si91x_config_timer.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_config_timer/sl_si91x_config_timer.slcp @@ -16,7 +16,7 @@ source: - path: config_timer_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror @@ -45,6 +45,6 @@ ui_hints: focus: true sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 post_build: path: ../../../../utilities/postbuild_profile/wiseconnect_soc.slpb diff --git a/examples/si91x_soc/peripheral/sl_si91x_crc/sl_si91x_crc.slcp b/examples/si91x_soc/peripheral/sl_si91x_crc/sl_si91x_crc.slcp index 61e9a7c2d..11a6cb625 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_crc/sl_si91x_crc.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_crc/sl_si91x_crc.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_dac/readme.md b/examples/si91x_soc/peripheral/sl_si91x_dac/readme.md index 4d451626c..69328f262 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_dac/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_dac/readme.md @@ -43,8 +43,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_dac/sl_si91x_dac.slcp b/examples/si91x_soc/peripheral/sl_si91x_dac/sl_si91x_dac.slcp index 88986f38f..fa92f8417 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_dac/sl_si91x_dac.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_dac/sl_si91x_dac.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: dac_example.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_dma/readme.md b/examples/si91x_soc/peripheral/sl_si91x_dma/readme.md index 3e5f7f146..20f2f8e78 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_dma/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_dma/readme.md @@ -49,8 +49,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_dma/sl_si91x_dma.slcp b/examples/si91x_soc/peripheral/sl_si91x_dma/sl_si91x_dma.slcp index 6fd2e4ed7..28ba3f5d1 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_dma/sl_si91x_dma.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_dma/sl_si91x_dma.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: diff --git a/examples/si91x_soc/peripheral/sl_si91x_efuse/readme.md b/examples/si91x_soc/peripheral/sl_si91x_efuse/readme.md index 6a3ac96a4..9ca7dcf85 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_efuse/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_efuse/readme.md @@ -54,8 +54,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_efuse/sl_si91x_efuse.slcp b/examples/si91x_soc/peripheral/sl_si91x_efuse/sl_si91x_efuse.slcp index 02d1a07c6..2b910a7c2 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_efuse/sl_si91x_efuse.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_efuse/sl_si91x_efuse.slcp @@ -15,10 +15,10 @@ source: - path: efuse_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_gpio/readme.md b/examples/si91x_soc/peripheral/sl_si91x_gpio/readme.md index 21292a972..fe6bd48e9 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gpio/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_gpio/readme.md @@ -104,8 +104,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_gpio/sl_si91x_gpio.slcp b/examples/si91x_soc/peripheral/sl_si91x_gpio/sl_si91x_gpio.slcp index 00d42f5b2..ea91c57d9 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gpio/sl_si91x_gpio.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_gpio/sl_si91x_gpio.slcp @@ -15,10 +15,10 @@ source: - path: gpio_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_gpio_detailed_example/sl_si91x_gpio_detailed_example.slcp b/examples/si91x_soc/peripheral/sl_si91x_gpio_detailed_example/sl_si91x_gpio_detailed_example.slcp index bbd36faf8..70d1faa58 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gpio_detailed_example/sl_si91x_gpio_detailed_example.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_gpio_detailed_example/sl_si91x_gpio_detailed_example.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: diff --git a/examples/si91x_soc/peripheral/sl_si91x_gpio_example/readme.md b/examples/si91x_soc/peripheral/sl_si91x_gpio_example/readme.md index a7f8b391f..37daa34fc 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gpio_example/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_gpio_example/readme.md @@ -111,8 +111,7 @@ Below are the list of GPIO examples available and it's functionality: - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output).. ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_gpio_example/sl_si91x_gpio_example.slcp b/examples/si91x_soc/peripheral/sl_si91x_gpio_example/sl_si91x_gpio_example.slcp index 264694e1d..a71c9ac09 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gpio_example/sl_si91x_gpio_example.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_gpio_example/sl_si91x_gpio_example.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: diff --git a/examples/si91x_soc/peripheral/sl_si91x_gpio_group_example/readme.md b/examples/si91x_soc/peripheral/sl_si91x_gpio_group_example/readme.md index c6cee5ef4..02409c82e 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gpio_group_example/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_gpio_group_example/readme.md @@ -145,8 +145,7 @@ Below are the list of GPIO examples available and it's functionality: - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output).. ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_gpio_group_example/sl_si91x_gpio_group_example.slcp b/examples/si91x_soc/peripheral/sl_si91x_gpio_group_example/sl_si91x_gpio_group_example.slcp index 39c0486e6..a94cd0a32 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gpio_group_example/sl_si91x_gpio_group_example.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_gpio_group_example/sl_si91x_gpio_group_example.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: diff --git a/examples/si91x_soc/peripheral/sl_si91x_gpio_ulp_example/readme.md b/examples/si91x_soc/peripheral/sl_si91x_gpio_ulp_example/readme.md index 9fd1598e8..f55949099 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gpio_ulp_example/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_gpio_ulp_example/readme.md @@ -116,8 +116,7 @@ Below are the list of GPIO examples available and it's functionality: - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output).. ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_gpio_ulp_example/sl_si91x_gpio_ulp_example.slcp b/examples/si91x_soc/peripheral/sl_si91x_gpio_ulp_example/sl_si91x_gpio_ulp_example.slcp index 34b72d796..a4077a181 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gpio_ulp_example/sl_si91x_gpio_ulp_example.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_gpio_ulp_example/sl_si91x_gpio_ulp_example.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: diff --git a/examples/si91x_soc/peripheral/sl_si91x_gpio_uulp_example/readme.md b/examples/si91x_soc/peripheral/sl_si91x_gpio_uulp_example/readme.md index 643e5ecac..234f67128 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gpio_uulp_example/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_gpio_uulp_example/readme.md @@ -118,8 +118,7 @@ Below are the list of GPIO examples available and it's functionality: - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output).. ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_gpio_uulp_example/sl_si91x_gpio_uulp_example.slcp b/examples/si91x_soc/peripheral/sl_si91x_gpio_uulp_example/sl_si91x_gpio_uulp_example.slcp index 5fdf63a6e..e7996ed82 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gpio_uulp_example/sl_si91x_gpio_uulp_example.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_gpio_uulp_example/sl_si91x_gpio_uulp_example.slcp @@ -15,10 +15,10 @@ source: - path: gpio_uulp_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_gspi/readme.md b/examples/si91x_soc/peripheral/sl_si91x_gspi/readme.md index 12eb7a67b..0ec6919ad 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gspi/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_gspi/readme.md @@ -30,7 +30,7 @@ - With the two data pins, it allows for full-duplex operation with other SPI-compatible devices. - It supports full duplex Single-bit SPI master mode. - It has support for Mode-0 and Mode-3 (Motorola). Mode 0: Clock Polarity is zero and Clock Phase is zero, Mode 3: Clock Polarity is one, Clock Phase is one. -- It supports both Full speed (upto 58 MHz) and High speed modes (upto 116 MHz). +- It supports both full-speed mode (up to 58 MHz) and high-speed mode (up to 116 MHz, provided the peripheral clock is set to 220 MHz). - The SPI clock is programmable to meet required baud rates. - It can generates interrupt for different events like transfer complete, data lost, mode fault. - It supports up to 32K bytes of read data from a SPI device in a single read operation. @@ -95,8 +95,7 @@ - Si91x - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_gspi/sl_si91x_gspi.slcp b/examples/si91x_soc/peripheral/sl_si91x_gspi/sl_si91x_gspi.slcp index d24be9e9c..e7e257f10 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_gspi/sl_si91x_gspi.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_gspi/sl_si91x_gspi.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/i2c_follower_example.c b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/i2c_follower_example.c index 305739378..8b4ee496b 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/i2c_follower_example.c +++ b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/i2c_follower_example.c @@ -41,8 +41,6 @@ #define INSTANCE_ZERO 0 // For 0 value #define INSTANCE_ONE 1 // For 0 value #define INSTANCE_TWO 2 // For 0 value -#define MS_DELAY_COUNTER 4600 // Delay count -#define SEND_DATA_SYNC 2 // Sync delay required for send #if ((I2C_INSTANCE_USED == INSTANCE_ZERO) || (I2C_INSTANCE_USED == INSTANCE_ONE)) #define SOC_PLL_CLK ((uint32_t)(180000000)) // 180MHz default SoC PLL Clock as source to Processor @@ -82,7 +80,6 @@ sl_i2c_dma_config_t p_dma_config; static void i2c_follower_callback(sl_i2c_instance_t instance, uint32_t status); static void compare_data(void); static void default_clock_configuration(void); -static void delay(uint32_t idelay); /******************************************************************************* ************************** GLOBAL FUNCTIONS ******************************* @@ -183,6 +180,7 @@ void i2c_follower_example_process_action(void) DEBUGOUT("sl_i2c_driver_receive_data_blocking : Invalid Parameters, " "Error Code : %u \n", i2c_status); + i2c_receive_data_flag = false; break; } #endif @@ -196,6 +194,7 @@ void i2c_follower_example_process_action(void) DEBUGOUT("sl_i2c_driver_receive_data_non_blocking : Invalid Parameters, " "Error Code : %u \n", i2c_status); + i2c_receive_data_flag = false; break; } #endif @@ -213,16 +212,16 @@ void i2c_follower_example_process_action(void) current_mode = I2C_SEND_DATA; } if (i2c_driver_dma_error) { - DEBUGOUT("Data is not transferred to Follower successfully \n"); i2c_driver_dma_error = false; - break; + DEBUGOUT("Data is not transferred to Follower successfully \n"); + i2c_send_data_flag = true; + current_mode = I2C_SEND_DATA; } #endif break; case I2C_SEND_DATA: if (i2c_send_data_flag) { - delay(SEND_DATA_SYNC); // Validation for executing the API only once. #if (BLOCKING_APPLICATION) i2c_status = @@ -231,6 +230,7 @@ void i2c_follower_example_process_action(void) DEBUGOUT("sl_i2c_driver_send_data_blocking : Invalid Parameters, " "Error Code : %u \n", i2c_status); + i2c_send_data_flag = false; break; } #endif @@ -244,16 +244,17 @@ void i2c_follower_example_process_action(void) DEBUGOUT("sl_i2c_driver_send_data_non_blocking : Invalid Parameters, " "Error Code : %u \n", i2c_status); + i2c_send_data_flag = false; break; } #endif i2c_send_data_flag = false; } #if (BLOCKING_APPLICATION) - current_mode = I2C_TRANSMISSION_COMPLETED; // After the receive is completed, input and output data is compared and // output is printed on console. compare_data(); + current_mode = I2C_TRANSMISSION_COMPLETED; #endif #if (NON_BLOCKING_APPLICATION) // It waits till i2c_transfer_complete is true in callback. @@ -267,7 +268,7 @@ void i2c_follower_example_process_action(void) if (i2c_driver_dma_error) { DEBUGOUT("Data is not transferred to Follower successfully \n"); i2c_driver_dma_error = false; - break; + current_mode = I2C_TRANSMISSION_COMPLETED; } #endif break; @@ -321,10 +322,3 @@ void i2c_follower_callback(sl_i2c_instance_t instance, uint32_t status) break; } } - -static void delay(uint32_t idelay) -{ - for (uint32_t x = 0; x < MS_DELAY_COUNTER * idelay; x++) { - __NOP(); - } -} diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/readme.md b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/readme.md index bb543849b..ccf4d089d 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/readme.md @@ -80,8 +80,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/sl_si91x_i2c_driver_follower.slcp b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/sl_si91x_i2c_driver_follower.slcp index 74f62721a..3d341086c 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/sl_si91x_i2c_driver_follower.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_follower/sl_si91x_i2c_driver_follower.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/i2c_leader_example.c b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/i2c_leader_example.c index 456f36198..e774c5cfd 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/i2c_leader_example.c +++ b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/i2c_leader_example.c @@ -40,8 +40,6 @@ #define INSTANCE_ZERO 0 // For 0 value #define INSTANCE_ONE 1 // For 0 value #define INSTANCE_TWO 2 // For 0 value -#define MS_DELAY_COUNTER 4600 // Delay count -#define RECEIVE_DATA_SYNC 1 // Sync delay required for Receive #if ((I2C_INSTANCE_USED == INSTANCE_ZERO) || (I2C_INSTANCE_USED == INSTANCE_ONE)) #define SOC_PLL_CLK ((uint32_t)(180000000)) // 180MHz default SoC PLL Clock as source to Processor @@ -81,7 +79,6 @@ sl_i2c_dma_config_t p_dma_config; static void i2c_leader_callback(sl_i2c_instance_t instance, uint32_t status); static void compare_data(void); static void default_clock_configuration(void); -static void delay(uint32_t idelay); /******************************************************************************* ************************** GLOBAL FUNCTIONS ******************************* @@ -182,6 +179,7 @@ void i2c_leader_example_process_action(void) DEBUGOUT("sl_i2c_driver_send_data_blocking : Invalid Parameters, " "Error Code : %u \n", i2c_status); + i2c_send_data_flag = false; break; } #endif @@ -195,6 +193,7 @@ void i2c_leader_example_process_action(void) DEBUGOUT("sl_i2c_driver_send_data_non_blocking : Invalid Parameters, " "Error Code : %u \n", i2c_status); + i2c_send_data_flag = false; break; } #endif @@ -212,16 +211,16 @@ void i2c_leader_example_process_action(void) current_mode = I2C_RECEIVE_DATA; } if (i2c_driver_dma_error) { - DEBUGOUT("Data is not transferred to Follower successfully \n"); i2c_driver_dma_error = false; - break; + DEBUGOUT("Data is not transferred to Follower successfully\n"); + i2c_receive_data_flag = true; + current_mode = I2C_RECEIVE_DATA; } #endif break; case I2C_RECEIVE_DATA: if (i2c_receive_data_flag) { - delay(RECEIVE_DATA_SYNC); // Disabling repeated start before last cycle of transfer i2c_status = sl_i2c_driver_enable_repeated_start(i2c_instance, false); if (i2c_status != SL_I2C_SUCCESS) { @@ -235,6 +234,7 @@ void i2c_leader_example_process_action(void) DEBUGOUT("sl_i2c_driver_receive_data_blocking : Invalid Parameters, Error " "Code : %u \n", i2c_status); + i2c_receive_data_flag = false; break; } #endif @@ -248,16 +248,17 @@ void i2c_leader_example_process_action(void) DEBUGOUT("sl_i2c_driver_receive_data_non_blocking : Invalid Parameters, Error " "Code : %u \n", i2c_status); + i2c_receive_data_flag = false; break; } #endif i2c_receive_data_flag = false; } #if (BLOCKING_APPLICATION) - current_mode = I2C_TRANSMISSION_COMPLETED; // After the receive is completed, input and output data is compared and // output is printed on console. compare_data(); + current_mode = I2C_TRANSMISSION_COMPLETED; #endif #if (NON_BLOCKING_APPLICATION) // It waits till i2c_transfer_complete is true in callback. @@ -271,7 +272,7 @@ void i2c_leader_example_process_action(void) if (i2c_driver_dma_error) { DEBUGOUT("Data is not received from Follower successfully \n"); i2c_driver_dma_error = false; - break; + current_mode = I2C_TRANSMISSION_COMPLETED; } #endif break; @@ -322,14 +323,10 @@ void i2c_leader_callback(sl_i2c_instance_t instance, uint32_t status) case SL_I2C_DMA_TRANSFER_ERROR: i2c_driver_dma_error = true; break; + case SL_I2C_NACK: + i2c_driver_dma_error = true; + break; default: break; } } - -static void delay(uint32_t idelay) -{ - for (uint32_t x = 0; x < MS_DELAY_COUNTER * idelay; x++) { - __NOP(); - } -} \ No newline at end of file diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/readme.md b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/readme.md index 677555f05..92b4134cd 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/readme.md @@ -79,8 +79,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/sl_si91x_i2c_driver_leader.slcp b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/sl_si91x_i2c_driver_leader.slcp index 6738d0ace..98da6a93a 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/sl_si91x_i2c_driver_leader.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_i2c_driver_leader/sl_si91x_i2c_driver_leader.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2s_loopback/readme.md b/examples/si91x_soc/peripheral/sl_si91x_i2s_loopback/readme.md index f092bb7d3..99c67abfe 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2s_loopback/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_i2s_loopback/readme.md @@ -74,8 +74,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2s_loopback/sl_si91x_i2s_loopback.slcp b/examples/si91x_soc/peripheral/sl_si91x_i2s_loopback/sl_si91x_i2s_loopback.slcp index aca2b923d..3c4ffaf03 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2s_loopback/sl_si91x_i2s_loopback.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_i2s_loopback/sl_si91x_i2s_loopback.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2s_primary/readme.md b/examples/si91x_soc/peripheral/sl_si91x_i2s_primary/readme.md index 3c3ca31da..45915d4de 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2s_primary/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_i2s_primary/readme.md @@ -73,8 +73,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2s_primary/sl_si91x_i2s_primary.slcp b/examples/si91x_soc/peripheral/sl_si91x_i2s_primary/sl_si91x_i2s_primary.slcp index c60699b6d..2fc9dae76 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2s_primary/sl_si91x_i2s_primary.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_i2s_primary/sl_si91x_i2s_primary.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2s_secondary/readme.md b/examples/si91x_soc/peripheral/sl_si91x_i2s_secondary/readme.md index 8897f1cf9..7125468e2 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2s_secondary/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_i2s_secondary/readme.md @@ -73,8 +73,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_i2s_secondary/sl_si91x_i2s_secondary.slcp b/examples/si91x_soc/peripheral/sl_si91x_i2s_secondary/sl_si91x_i2s_secondary.slcp index 886a4d45c..7eebb1eef 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_i2s_secondary/sl_si91x_i2s_secondary.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_i2s_secondary/sl_si91x_i2s_secondary.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_icm40627/sl_si91x_icm40627.slcp b/examples/si91x_soc/peripheral/sl_si91x_icm40627/sl_si91x_icm40627.slcp index 6c1f6c285..4a6169716 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_icm40627/sl_si91x_icm40627.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_icm40627/sl_si91x_icm40627.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_joystick/readme.md b/examples/si91x_soc/peripheral/sl_si91x_joystick/readme.md index fa2c78983..72ca445d2 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_joystick/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_joystick/readme.md @@ -28,8 +28,7 @@ This sample app demonstrates the use of the Joystick Driver. It prints the joyst - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram @@ -57,6 +56,11 @@ For details on the project folder structure, see the [WiSeConnect Examples](http ![Figure: Introduction](resources/uc_screen/sl_joystick_uc_screen.png) - Using configuration wizard one can configure different parameters like: + - **Channel selection** + - Joystick ADC channel: The selection of the ADC channel instance for the joystick can be adjusted between channels 1 and channel_16. + > **Note:** + - Make sure to install selected ADC channel/instance. + - **Joystick Voltage value Configuration** - REFERENCE VOLTAGE: Vref magnitude expressed in millivolts. As per Joystick Hardware on Wireless Pro Kit, Vref = AVDD = 3300 mV. - CENTER POSITION: Center position value(mV). @@ -78,13 +82,13 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise 1. Compile and run the application. 2. Connect GPIO_26 [P36] (Joystick pin) to ULP_GPIO_1 [P16] for ADC channel input voltage. -3. Press the Joystick on WPK at any direction (Center, North/Up, South/Down, East/Right, West/Left). -4. The application should print the pressed position/direction of joystick in console. -5. After successful program execution the prints in serial console looks as shown below. +3. If the channel instance has changed, the ADC channel input pin will also change. Verify the pin that is configured on the channel configuration. +4. Press the Joystick on WPK at any direction (Center, North/Up, South/Down, East/Right, West/Left). +5. The application should print the pressed position/direction of joystick in console. +6. After successful program execution the prints in serial console looks as shown below. ![Figure: Introduction](resources/readme/output.png) - > **Note:** > > - Interrupt handlers are implemented in the driver layer, and user callbacks are provided for custom code. If you want to write your own interrupt handler instead of using the default one, make the driver interrupt handler a weak handler. Then, copy the necessary code from the driver handler to your custom interrupt handler. diff --git a/examples/si91x_soc/peripheral/sl_si91x_joystick/resources/uc_screen/sl_joystick_uc_screen.png b/examples/si91x_soc/peripheral/sl_si91x_joystick/resources/uc_screen/sl_joystick_uc_screen.png index 41a93b6a4..493d5a15a 100644 Binary files a/examples/si91x_soc/peripheral/sl_si91x_joystick/resources/uc_screen/sl_joystick_uc_screen.png and b/examples/si91x_soc/peripheral/sl_si91x_joystick/resources/uc_screen/sl_joystick_uc_screen.png differ diff --git a/examples/si91x_soc/peripheral/sl_si91x_joystick/sl_si91x_joystick.slcp b/examples/si91x_soc/peripheral/sl_si91x_joystick/sl_si91x_joystick.slcp index 93eb61374..f3c61744d 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_joystick/sl_si91x_joystick.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_joystick/sl_si91x_joystick.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: joystick_example.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_pwm/readme.md b/examples/si91x_soc/peripheral/sl_si91x_pwm/readme.md index 81324c363..fbc3fb7bf 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_pwm/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_pwm/readme.md @@ -89,8 +89,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_pwm/sl_si91x_pwm.slcp b/examples/si91x_soc/peripheral/sl_si91x_pwm/sl_si91x_pwm.slcp index aa0692ab1..f01db8b4d 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_pwm/sl_si91x_pwm.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_pwm/sl_si91x_pwm.slcp @@ -15,10 +15,10 @@ source: - path: pwm_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_rgb_led/readme.md b/examples/si91x_soc/peripheral/sl_si91x_rgb_led/readme.md index 8c1e8bfba..23f7b0626 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_rgb_led/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_rgb_led/readme.md @@ -8,7 +8,6 @@ - [Software Requirements](#software-requirements) - [Setup Diagram](#setup-diagram) - [Getting Started](#getting-started) -- [Application Build Environment](#application-build-environment) - [Test the Application](#test-the-application) ## Purpose/Scope @@ -39,25 +38,13 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise - Upgrade your connectivity firmware - Create a Studio project -## Application Build Environment - -- Configure the following parameters in rgb_led.c file, update/modify following macro if required. - - ```C - #define RGB_COLOUR 0xFFFFFF// configured for white colour by default - ``` - ```C - #define TICK_DELAY 1// configured delay for PWM simulation (1 TICK_DELAY = 30.5 us) - ``` - ```C - #define PULSE_PERIOD (TICK_DELAY * 0xFF)// configured total delay for the PWM cycle (Dependant on TICK_DELAY) - ``` - ## Test the Application -1. Sets the board state of RGB LED to ON and the colour is set according to the colour input. +1. Sets the board state of RGB LED to ON and different set of colours can be observed. > **Note:** > +> - Currently, the RGB LED functionality is limited to a single instance. +> > - Interrupt handlers are implemented in the driver layer, and user callbacks are provided for custom code. If you want to write your own interrupt handler instead of using the default one, make the driver interrupt handler a weak handler. Then, copy the necessary code from the driver handler to your custom interrupt handler. diff --git a/examples/si91x_soc/peripheral/sl_si91x_rgb_led/rgb_led.c b/examples/si91x_soc/peripheral/sl_si91x_rgb_led/rgb_led.c index 29279eb27..f262a681d 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_rgb_led/rgb_led.c +++ b/examples/si91x_soc/peripheral/sl_si91x_rgb_led/rgb_led.c @@ -21,8 +21,6 @@ // Include Files #include "rsi_ccp_user_config.h" - -#include "sl_sleeptimer.h" #include "sl_si91x_rgb_led_instances.h" #include "rsi_debug.h" #include "sl_si91x_rgb_led.h" @@ -31,55 +29,39 @@ /******************************************************************************* ******************************* DEFINES *********************************** ******************************************************************************/ -/* RGB LED instances*/ -#ifndef RED -#define RED led_red -#endif - -#ifndef GREEN -#define GREEN led_green -#endif - -#ifndef BLUE -#define BLUE led_blue -#endif - -/*Delay for PWM simulation*/ -#ifndef TICK_DELAY -#define TICK_DELAY 1 -#endif -/*Default RGB color (white)*/ -#ifndef RGB_COLOUR -#define RGB_COLOUR 0xFFFFFF +/* RGB LED instances */ +#ifndef RGB_LED +#define RGB_LED led_led0 #endif -/*Total delay for each PWM cycle*/ -#ifndef PULSE_PERIOD -#define PULSE_PERIOD (TICK_DELAY * 0xFF) -#endif +/* Default RGB colors */ +#define COLOR_COUNT 10 +const uint32_t RGB_COLORS[COLOR_COUNT] = { + 0xFF0000, // Red + 0x00FF00, // Green + 0x0000FF, // Blue + 0xFFFF00, // Yellow + 0xFF00FF, // Magenta + 0x00FFFF, // Cyan + 0xFF8000, // Orange + 0x8000FF, // Purple + 0x00FF80, // Teal + 0xFF0080 // Pink +}; #define SOC_PLL_CLK ((uint32_t)(180000000)) // 180MHz default SoC PLL Clock as source to Processor #define INTF_PLL_CLK ((uint32_t)(180000000)) // 180MHz default Interface PLL Clock as source to all peripherals + /******************************************************************************* *************************** LOCAL VARIABLES ******************************** ******************************************************************************/ -uint32_t red_intensity; -uint32_t blue_intensity; -uint32_t green_intensity; - -uint32_t red_time; -uint32_t blue_time; -uint32_t green_time; -uint32_t rgb_time; - -sl_sleeptimer_timer_handle_t timer; /******************************************************************************* ********************* LOCAL FUNCTION PROTOTYPES *************************** ******************************************************************************/ -static void on_timeout(); static void default_clock_configuration(void); + /******************************************************************************* ************************** GLOBAL FUNCTIONS ******************************* ******************************************************************************/ @@ -93,6 +75,7 @@ static void default_clock_configuration(void) // and it runs at 180MHz sl_si91x_clock_manager_set_pll_freq(INFT_PLL, INTF_PLL_CLK, PLL_REF_CLK_VAL_XTAL); } + /***************************************************************************/ /** * Initialize RGB LED example. ******************************************************************************/ @@ -101,23 +84,8 @@ void rgb_led_init(void) // default clock configuration by application common for whole system default_clock_configuration(); - /*Turn on the RGB LED*/ - sl_si91x_rgb_led_on(&RED); - sl_si91x_rgb_led_on(&GREEN); - sl_si91x_rgb_led_on(&BLUE); - - /*Extract intensity values from RGB_COLOUR (colour hex code)*/ - red_intensity = ((RGB_COLOUR >> 16) & 0xFF); - green_intensity = ((RGB_COLOUR >> 8) & 0xFF); - blue_intensity = (RGB_COLOUR & 0xFF); - - /*Create timer for waking up the system periodically*/ - sl_sleeptimer_start_periodic_timer(&timer, - TICK_DELAY, - on_timeout, - NULL, - 0, - SL_SLEEPTIMER_NO_HIGH_PRECISION_HF_CLOCKS_REQUIRED_FLAG); + // Switch on the LED + sl_si91x_simple_rgb_led_on(&RGB_LED); } /***************************************************************************/ /** @@ -125,45 +93,14 @@ void rgb_led_init(void) ******************************************************************************/ void rgb_led_process_action(void) { - return; -} - -/***************************************************************************/ /** - * Sleeptimer timeout callback. - ******************************************************************************/ -static void on_timeout() -{ - - /*pulse drive for red*/ - if (red_time == red_intensity) { - sl_si91x_rgb_led_off(&RED); - } else { - if (red_time > PULSE_PERIOD) { - sl_si91x_rgb_led_on(&RED); - red_time = -1; - } - } - - /*pulse drive for green*/ - if (green_time == green_intensity) { - sl_si91x_rgb_led_off(&GREEN); - } else { - if (green_time > PULSE_PERIOD) { - sl_si91x_rgb_led_on(&GREEN); - green_time = -1; - } - } + for (int i = 0; i < COLOR_COUNT; i++) { + // Set the current color from the array + sl_si91x_simple_rgb_led_set_colour(&RGB_LED, RGB_COLORS[i]); - /*pulse drive for blue*/ - if (blue_time == blue_intensity) { - sl_si91x_rgb_led_off(&BLUE); - } else { - if (blue_time > PULSE_PERIOD) { - sl_si91x_rgb_led_on(&BLUE); - blue_time = -1; + // delay + for (volatile int delay = 0; delay < 1000000; delay++) { } } - red_time++; - blue_time++; - green_time++; + // Switch off the LED + sl_si91x_simple_rgb_led_off(&RGB_LED); } diff --git a/examples/si91x_soc/peripheral/sl_si91x_rgb_led/sl_si91x_rgb_led.slcp b/examples/si91x_soc/peripheral/sl_si91x_rgb_led/sl_si91x_rgb_led.slcp index b1b0d5013..0a54eb658 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_rgb_led/sl_si91x_rgb_led.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_rgb_led/sl_si91x_rgb_led.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -29,12 +29,9 @@ component: from: wiseconnect3_sdk - id: si917_memory_default_config from: wiseconnect3_sdk - - id: sleeptimer - - id: sl_si91x_rgb_led_917 + - id: sl_si91x_led_917 instance: - - red - - green - - blue + - led0 from: wiseconnect3_sdk - id: sl_clock_manager from: wiseconnect3_sdk @@ -50,4 +47,3 @@ ui_hints: focus: true post_build: path: ../../../../utilities/postbuild_profile/wiseconnect_soc.slpb - diff --git a/examples/si91x_soc/peripheral/sl_si91x_sdio_secondary/readme.md b/examples/si91x_soc/peripheral/sl_si91x_sdio_secondary/readme.md index c46b186cc..b2bdafbba 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_sdio_secondary/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_sdio_secondary/readme.md @@ -35,8 +35,7 @@ The SDIO Secondary application shows how to read and write data in SDIO Secondar - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_sdio_secondary/sl_si91x_sdio_secondary.slcp b/examples/si91x_soc/peripheral/sl_si91x_sdio_secondary/sl_si91x_sdio_secondary.slcp index 639b26a59..d145d5e2d 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_sdio_secondary/sl_si91x_sdio_secondary.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_sdio_secondary/sl_si91x_sdio_secondary.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: sdio_secondary_example.c - path: sdio_secondary_example.h diff --git a/examples/si91x_soc/peripheral/sl_si91x_si70xx/readme.md b/examples/si91x_soc/peripheral/sl_si91x_si70xx/readme.md index b21f813ee..b818677a6 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_si70xx/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_si70xx/readme.md @@ -33,8 +33,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_si70xx/sl_si91x_si70xx.slcp b/examples/si91x_soc/peripheral/sl_si91x_si70xx/sl_si91x_si70xx.slcp index 19249f053..59b3d536b 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_si70xx/sl_si91x_si70xx.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_si70xx/sl_si91x_si70xx.slcp @@ -15,7 +15,7 @@ source: - path: si70xx_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror @@ -48,6 +48,6 @@ ui_hints: focus: true sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 post_build: path: ../../../../utilities/postbuild_profile/wiseconnect_soc.slpb diff --git a/examples/si91x_soc/peripheral/sl_si91x_ssi_master/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ssi_master/readme.md index 0c2b0c133..a624429a0 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ssi_master/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ssi_master/readme.md @@ -98,8 +98,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_ssi_master/sl_si91x_ssi_master.slcp b/examples/si91x_soc/peripheral/sl_si91x_ssi_master/sl_si91x_ssi_master.slcp index d30b193f1..8577eb935 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ssi_master/sl_si91x_ssi_master.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ssi_master/sl_si91x_ssi_master.slcp @@ -13,10 +13,10 @@ source: - path: ssi_master_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_ssi_slave/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ssi_slave/readme.md index f25b45940..ceae1fdb3 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ssi_slave/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ssi_slave/readme.md @@ -92,8 +92,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram @@ -156,6 +155,7 @@ For details on the project folder structure, see the [WiSeConnect Examples](http ``` - By default 8 bit unsigned integer is declared for data buffer. If using data-width more than 8 bit, update the variable to 16 bit unsigned integer. + ```C // For data-width less than equal to 8 static uint8_t ssi_slave_tx_buffer[SSI_SLAVE_BUFFER_SIZE] = { '\0' }; @@ -165,7 +165,7 @@ For details on the project folder structure, see the [WiSeConnect Examples](http static uint16_t ssi_slave_rx_buffer[SSI_SLAVE_BUFFER_SIZE] = { '\0' }; ``` -### Pin Configuration +## Pin Configuration of the WPK[BRD4002A] Base Board, and with BRD4338A radio board | GPIO pin | Description | | ------------- | ----------------------- | @@ -176,6 +176,15 @@ For details on the project folder structure, see the [WiSeConnect Examples](http ![Figure: Pin Configuration for SSI1](resources/readme/image511d.png) +## Pin Configuration of the WPK[BRD4002A] Base Board, and with BRD4343A/BRD4343B/BRD4343Q radio board + +| GPIO pin | Description | +| ------------- | ----------------------- | +| GPIO_26 [P27] | RTE_SSI_SLAVE_SCK_PIN | +| GPIO_25 [P25] | RTE_SSI_SLAVE_CS_PIN | +| GPIO_27 [P29] | RTE_SSI_SLAVE_MOSI_PIN | +| GPIO_28 [P31] | RTE_SSI_SLAVE_MISO_PIN | + >**Note:** Make sure pin configuration in RTE_Device_917.h file.(path: /$project/config/RTE_Device_917.h) ## Test the Application @@ -184,14 +193,13 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise 1. Compile and run the application. 2. Connect master ssi pins to slave ssi pins on WPK board. -3. First reset the slave board and then reset the master board. The time difference between these resets is expected upto 5 seconds. +3. First reset the slave board and then reset the master board. The time difference between these resets is expected upto 5 seconds. 4. Console output of successful configuration of clock, power mode and SSI configuration. 5. Post transfer the data with master, slave should print the console output as test case passed. 6. After successful program execution the prints in serial console looks as shown below. ![Figure: Introduction](resources/readme/output.png) - > **Note:** > > - Interrupt handlers are implemented in the driver layer, and user callbacks are provided for custom code. If you want to write your own interrupt handler instead of using the default one, make the driver interrupt handler a weak handler. Then, copy the necessary code from the driver handler to your custom interrupt handler. diff --git a/examples/si91x_soc/peripheral/sl_si91x_ssi_slave/sl_si91x_ssi_slave.slcp b/examples/si91x_soc/peripheral/sl_si91x_ssi_slave/sl_si91x_ssi_slave.slcp index 4a66620c5..3abe89142 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ssi_slave/sl_si91x_ssi_slave.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ssi_slave/sl_si91x_ssi_slave.slcp @@ -13,10 +13,10 @@ source: - path: ssi_slave_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_sysrtc/readme.md b/examples/si91x_soc/peripheral/sl_si91x_sysrtc/readme.md index 9dd1a7a84..4f7329d74 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_sysrtc/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_sysrtc/readme.md @@ -2,25 +2,27 @@ ## Table of Contents -- [Purpose/Scope](#purposescope) -- [Overview](#overview) -- [About Example Code](#about-example-code) - - [If compare channel0 or compare channel1 is enabled through UC](#if-compare-channel0-or-compare-channel1-is-enabled-through-uc) - - [If capture channel0 is enabled through UC](#if-capture-channel0-is-enabled-through-uc) - - [If no channels enabled through UC](#if-no-channels-enabled-through-uc) -- [Prerequisites/Setup Requirements](#prerequisitessetup-requirements) - - [Hardware Requirements](#hardware-requirements) - - [Software Requirements](#software-requirements) - - [Setup Diagram](#setup-diagram) -- [Getting Started](#getting-started) -- [Application Build Environment](#application-build-environment) - - [Macros for Clock Configurations](#macros-for-clock-configurations) - - [Macros for SYSRTC Configurations](#macros-for-sysrtc-configurations) -- [Test the Application](#test-the-application) +- [SL SYSRTC](#sl-sysrtc) + - [Table of Contents](#table-of-contents) + - [Purpose/Scope](#purposescope) + - [Overview](#overview) + - [About Example Code](#about-example-code) + - [If compare channel0 or compare channel1 is enabled through UC](#if-compare-channel0-or-compare-channel1-is-enabled-through-uc) + - [If capture channel0 is enabled through UC](#if-capture-channel0-is-enabled-through-uc) + - [If no channels enabled through UC](#if-no-channels-enabled-through-uc) + - [Prerequisites/Setup Requirements](#prerequisitessetup-requirements) + - [Hardware Requirements](#hardware-requirements) + - [Software Requirements](#software-requirements) + - [Setup Diagram](#setup-diagram) + - [Getting Started](#getting-started) + - [Application Build Environment](#application-build-environment) + - [Macros for SYSRTC Configurations](#macros-for-sysrtc-configurations) + - [Test the Application](#test-the-application) ## Purpose/Scope -- This application demonstrate the LED toggle five times at every 1 second and then stops the timer. +- This application demonstrates toggling an LED five times at 1-second intervals and then stops the timer. + - LED0 for ACx Module boards and LED1 for ICs ## Overview @@ -32,7 +34,6 @@ ## About Example Code - \ref sysrtc_example.c this example file demonstrates how to use sysrtc -- In this example, first clock is configured with UC values through \ref sl_si91x_sysrtc_configure_clock - Initializes SYSRTC module through \ref sl_si91x_sysrtc_init - Sets counter start value for counter through \ref sl_si91x_sysrtc_set_count, can change by updating \ref COUNTER_VALUE1 macro in sysrtc_example.c file. @@ -42,7 +43,7 @@ - Sets compare value for selected group's selected compare channel through \ref sl_si91x_sysrtc_set_compare_channel_value, can change compare value by updating \ref COMPARE_VALUE macro in sysrtc_example.c file. - Then registers sysrtc callback and enabled selected compare channel interrupt, through \ref sl_si91x_sysrtc_register_callback. - Starts counter through \ref sl_si91x_sysrtc_start -- When counter reaches compare-value generates respective channel compare interrupt and toggles LED1 on every second. +- When counter reaches compare-value generates respective channel compare interrupt and toggles LED on every second. - After every interrupt, compare value is updated again through \ref sl_si91x_sysrtc_set_compare_channel_value with sum of current count (read through \ref sl_si91x_sysrtc_get_count) and compare-value. - After 10 interrupts sysrtc is stopped through \ref sl_si91x_sysrtc_stop - Callbacks are unregistered and interrupts are disabled through \ref sl_si91x_sysrtc_unregister_callback @@ -55,7 +56,7 @@ - Then registers sysrtc callback and enabled capture channel interrupt, through \ref sl_si91x_sysrtc_register_callback. - Starts counter through \ref sl_si91x_sysrtc_start - After starting waits unless counter reaches compare value for 1-second and then sets SYSRTC register capture input high through \ref sl_si91x_sysrtc_sets_register_capture_input API. -- A capture interrupt is generated and toggles LED1 one time. +- A capture interrupt is generated and toggles LED one time. - And SYSRTC is de-initialized through \ref sl_si91x_sysrtc_deinit ### If no channels enabled through UC @@ -65,7 +66,7 @@ - Sets counter start value for counter through \ref sl_si91x_sysrtc_set_count, can change by updating \ref COUNTER_VALUE2 macro in sysrtc_example.c file. - Starts counter through \ref sl_si91x_sysrtc_start - After starting waits unless counter reaches overflow value (0xffffffff). -- Then a overflow interrupt is generated and toggles LED1 one time. +- Then a overflow interrupt is generated and toggles LED one time. ## Prerequisites/Setup Requirements @@ -78,8 +79,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram @@ -102,21 +102,12 @@ For details on the project folder structure, see the [WiSeConnect Examples](http - Click on **sysrtc** and configure the SYSRTC parameters. - After creation of instances separate configuration files are get generated in **config folder**. - If project built without selecting configurations, it will take default values from UC. -- Configure Clock and SYSRTC using UC. +- Configure SYSRTC using UC. ![Figure: UC-Screen](resources/uc_screen/sysrtc_uc_screen.png) - For updating/modifying counter and compare value use \ref COUNTER_VALUE & \ref COMPARE_VALUE_32KHZ (for 32 KHZ clock) macros respectively, present in sysrtc_example.c file. -### Macros for Clock Configurations - -- \ref SL_SYSRTC_CLK_INPUT_SOURCE, for possible options \ref sl_clock_sources_t -- \ref SL_SYSRTC_CLK_DIVISION_FACTOR, for clock division factor -- To use 32kHZ clock, select 1KHZ clock source from UC and provide division factor value as 0. -- To use 1kHZ clock, select 1KHZ clock source from UC and provide division factor value as 16. -- To use other clock frequency change division factor and update \ref CLOCKS_PER_MILLISECONDS macro value accordingly, the macro is present in sysrtc_example.c file. -- After configuring above macros, their values are passed to \ref sl_sysrtc_clock_config_t structure type variable \ref sl_sysrtc_clk_config_handle which is used to configure clock using API-\ref sl_si91x_sysrtc_configure_clock. - ### Macros for SYSRTC Configurations - \ref SL_SYSRTC_RUN_ENABLE_DURING_DEBUG, for enabling sysrtc run during debug @@ -132,16 +123,16 @@ For details on the project folder structure, see the [WiSeConnect Examples](http Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: 1. Compile and run the application. -2. When the application runs, LED1(GPIO_10) will be toggled five times at 1sec periodic rate. +2. When the application runs, LED0 (ULP_GPIO_0 for ACx Module boards) or LED1 (GPIO_10 for ICs) will be toggled five times at a 1-second periodic rate. 3. After successful program execution the prints in serial console looks as shown below. ![Figure: Output](resources/readme/output.png) > **Note:** > ->- When Compare channels are enabled : Toggles LED1 for ten times every second and timer stops ->- When Capture channel is enabled : Toggles LED1 one time after one second ->- When no channels are enabled then overflow interrupt is enabled : Toggles LED1 one time as counter reaches overflow +>- When Compare channels are enabled : Toggles LED for ten times every second and timer stops +>- When Capture channel is enabled : Toggles LED one time after one second +>- When no channels are enabled, the overflow interrupt is enabled: Toggles LED once when the counter reaches overflow. ![Figure: Onboard LED-1](resources/readme/image509d.png) diff --git a/examples/si91x_soc/peripheral/sl_si91x_sysrtc/resources/uc_screen/sysrtc_uc_screen.png b/examples/si91x_soc/peripheral/sl_si91x_sysrtc/resources/uc_screen/sysrtc_uc_screen.png index a0d5f2b9e..a4979e445 100644 Binary files a/examples/si91x_soc/peripheral/sl_si91x_sysrtc/resources/uc_screen/sysrtc_uc_screen.png and b/examples/si91x_soc/peripheral/sl_si91x_sysrtc/resources/uc_screen/sysrtc_uc_screen.png differ diff --git a/examples/si91x_soc/peripheral/sl_si91x_sysrtc/sl_si91x_sysrtc.slcp b/examples/si91x_soc/peripheral/sl_si91x_sysrtc/sl_si91x_sysrtc.slcp index 46b504872..515510329 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_sysrtc/sl_si91x_sysrtc.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_sysrtc/sl_si91x_sysrtc.slcp @@ -15,10 +15,10 @@ source: - path: sysrtc_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror @@ -32,8 +32,12 @@ component: - id: si917_memory_default_config from: wiseconnect3_sdk - id: sl_si91x_led_917 - instance: - - led1 + instance: [led0] + condition: [device_is_module] + from: wiseconnect3_sdk + - id: sl_si91x_led_917 + instance: [led1] + condition: [device_has_chip] from: wiseconnect3_sdk - id: sl_clock_manager from: wiseconnect3_sdk diff --git a/examples/si91x_soc/peripheral/sl_si91x_sysrtc/sysrtc_example.c b/examples/si91x_soc/peripheral/sl_si91x_sysrtc/sysrtc_example.c index b79b66fa5..c838754eb 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_sysrtc/sysrtc_example.c +++ b/examples/si91x_soc/peripheral/sl_si91x_sysrtc/sysrtc_example.c @@ -275,9 +275,14 @@ void sysrtc_callback(void *callback_flags) DEBUGOUT("In handler... \n"); // to avoid unused variable warning (void)callback_flags; - // To toggle LED1 state = !state; +#ifdef SL_SI91X_ACX_MODULE + // To toggle LED0 + sl_si91x_led_toggle(SL_LED_LED0_PIN); +#else + // To toggle LED1 sl_si91x_led_toggle(SL_LED_LED1_PIN); +#endif #if ((SL_SYSRTC_COMPARE_CHANNEL0_ENABLE) || (SL_SYSRTC_COMPARE_CHANNEL1_ENABLE)) static uint8_t interrupt_count = 0; uint32_t compare_value = COMPARE_VALUE_32KHZ; diff --git a/examples/si91x_soc/peripheral/sl_si91x_uart/readme.md b/examples/si91x_soc/peripheral/sl_si91x_uart/readme.md index d1a07bb5b..f7b241dff 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_uart/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_uart/readme.md @@ -52,8 +52,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output).. ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_uart/sl_si91x_uart.slcp b/examples/si91x_soc/peripheral/sl_si91x_uart/sl_si91x_uart.slcp index 40ce0b3fd..f5857af18 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_uart/sl_si91x_uart.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_uart/sl_si91x_uart.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/readme.md index ba37f295b..e353060a1 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/readme.md @@ -53,8 +53,8 @@ - All the necessary parameters are configured using \ref sl_si91x_adc_set_channel_configuration API, it expects a structure with required parameters \ref sl_adc_channel_config_t and \ref sl_adc_config_t. - After configuration, a callback register API is called to register the callback at the time of events \ref sl_si91x_adc_register_event_callback. - Then start the ADC to sample the data using \ref sl_si91x_adc_start API. -- Once sampling is done callback will hit and set the true "data_sample_complete_flag" flag to read the sampled data using \ref sl_si91x_adc_read_data API for FIFO mode of ADC or - \ref sl_si91x_adc_read_data_static API for static mode of ADC. This process will run continuously. +- Once sampling is done callback will hit and set the true "data_sample_complete_flag" flag to read the sampled data using \ref sl_si91x_adc_read_data API for FIFO mode of ADC or \ref sl_si91x_adc_read_data_static API for static mode of ADC. This process will run continuously. +- If ADC is started, it is recommended to stop it before de-initializing. This is general flow of API calls for ADC: sl_si91x_adc_init -> sl_si91x_adc_start -> sl_si91x_adc_stop -> sl_si91x_adc_deinit. ## Prerequisites/Setup Requirements @@ -67,8 +67,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/sl_si91x_ulp_adc.slcp b/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/sl_si91x_ulp_adc.slcp index 9a4f2e0ac..b84981775 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/sl_si91x_ulp_adc.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/sl_si91x_ulp_adc.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: sl_ulp_adc_example.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/sl_ulp_adc_example.c b/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/sl_ulp_adc_example.c index eb8da6226..3d002cc35 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/sl_ulp_adc_example.c +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_adc/sl_ulp_adc_example.c @@ -193,6 +193,12 @@ void adc_example_process_action(void) ulp_adc_current_mode = SL_ULP_ADC_PROCESS_ACTION; } else { if (!sl_adc_config.operation_mode) { + // stop the adc + status = sl_si91x_adc_stop(sl_adc_config); + if (status != SL_STATUS_OK) { + DEBUGOUT("sl_si91x_adc_stop: Error Code : %lu \n", status); + } + DEBUGOUT("ADC stopped successfully \n"); // de initializing the adc status = sl_si91x_adc_deinit(sl_adc_config); if (status != SL_STATUS_OK) { diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/readme.md index 2c36ee519..7b6173316 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/readme.md @@ -43,16 +43,6 @@ - To verify if the desired alarm is set, \ref sl_si91x_calendar_get_alarm API is used, It returns a structure which has configured alarm date-time. - At the time of trigger, it prints current date-time on the console. -- If **CLOCK_CALIBRATION** macro is enabled: - - - This clock calibration applies to RO and RC Clock only. For RO clock \ref sl_si91x_calendar_roclk_calibration should be used and for RC clock \ref sl_si91x_calendar_rcclk_calibration should be used. - - It is recommended to calibrate clock before activating any trigger after every power cycle. - - Initialization of clock is performed using \ref sl_si91x_calendar_calibration_init API. - - To select the clock in UC, follow the procedure mentioned in "Configuration and Steps for Execution" section. - - According to the clock configured in UC, either RO or RC, use respective API to configure the clock. In this example RC clock is selected so \ref sl_si91x_calendar_roclk_calibration API is used. - - This API expects \ref clock_calibration_config_t structure. For rc_trigger_time, \ref RC_CLOCK_CALIBRATION_ENUM enum can be used, and for ro_trigger_time \ref RO_CLOCK_CALIBRATION_ENUM enum can be used. - - After calibration \ref sl_si91x_calendar_rtc_start is called to start the calendar clock. - - If **SEC_INTR** macro is enabled: - Callback is registered for one second trigger using \ref sl_si91x_calendar_register_sec_trigger_callback API. @@ -84,8 +74,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram @@ -104,14 +93,6 @@ For details on the project folder structure, see the [WiSeConnect Examples](http ## Application Build Environment -- Configure UC from the slcp component. - - ![Figure: Introduction](resources/uc_screen/calendar_uc_screen.png) - -- Open **sl_si91x_calendar.slcp** project file select **software component** tab and search for **Calendar** in search bar. -- Using configuration wizard one can configure the Calendar clock, i.e., RO, RC and XTAL. -- Configuration file is generated in **config folder**, if not changed then the code will run on default UC values. - - Set any of the macro in calender_example.h whose functionality needs to be tested. - To enable alarm trigger callback set the ALARM_EXAMPLE macro. @@ -120,11 +101,6 @@ For details on the project folder structure, see the [WiSeConnect Examples](http #define ALARM_EXAMPLE 1 ///< To enable alarm trigger \n ``` -- To enable clock calibration set the CLOCK_CALIBRATION macro. - - ```C - #define CLOCK_CALIBRATION 1 ///< To enable clock calibration \n - ``` - To enable second trigger callback set the SEC_INTR macro. ```C diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/resources/uc_screen/calendar_uc_screen.png b/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/resources/uc_screen/calendar_uc_screen.png deleted file mode 100644 index fe2f8a276..000000000 Binary files a/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/resources/uc_screen/calendar_uc_screen.png and /dev/null differ diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/sl_si91x_ulp_calendar.slcp b/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/sl_si91x_ulp_calendar.slcp index 585c2be81..533961e2f 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/sl_si91x_ulp_calendar.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/sl_si91x_ulp_calendar.slcp @@ -16,10 +16,10 @@ source: - path: ulp_calendar_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror @@ -46,7 +46,6 @@ define: - name: SLI_SI91X_MCU_ENABLE_RAM_BASED_EXECUTION other_file: - path: resources/readme/setupdiagram.png - - path: resources/uc_screen/calendar_uc_screen.png - path: resources/readme/output_ulp_calendar.png template_contribution: - name: user_files_ps2 diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/ulp_calendar_example.c b/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/ulp_calendar_example.c index de6bb34be..a980154f5 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/ulp_calendar_example.c +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/ulp_calendar_example.c @@ -52,8 +52,6 @@ #define ALARM_SECONDS 15u #define ALARM_MILLISECONDS 100u -#define CAL_RC_CLOCK 2u - static sl_power_state_t current_power_state = SL_SI91X_POWER_MANAGER_PS4; /******************************************************************************* ********************** Local Function prototypes *************************** @@ -85,16 +83,6 @@ void calendar_example_init(void) sl_calendar_datetime_config_t get_datetime; sl_status_t status; do { - - // Configuration of clock and initialization of calendar - status = sl_si91x_calendar_set_configuration(CAL_RC_CLOCK); - if (status != SL_STATUS_OK) { - DEBUGOUT("sl_si91x_calendar_set_configuration: Invalid Parameters, Error " - "Code : %lu \n", - status); - break; - } - DEBUGOUT("Successfully configured Calendar\n"); // Initialization of Calendar sl_si91x_calendar_init(); // Setting datetime for Calendar @@ -135,27 +123,6 @@ void calendar_example_init(void) calendar_print_datetime(get_datetime); DEBUGOUT("\n"); -#if defined(CLOCK_CALIBRATION) && (CLOCK_CALIBRATION == ENABLE) - // Clock Calibration - sl_si91x_calendar_calibration_init(); - clock_calibration_config_t clock_calibration_config; - clock_calibration_config.rc_enable_calibration = true; - clock_calibration_config.rc_enable_periodic_calibration = true; - clock_calibration_config.rc_trigger_time = SL_RC_THIRTY_SEC; - clock_calibration_config.ro_enable_calibration = true; - clock_calibration_config.ro_enable_periodic_calibration = true; - clock_calibration_config.ro_trigger_time = SL_RO_ONE_SEC; - status = sl_si91x_calendar_rcclk_calibration(&clock_calibration_config); - if (status != SL_STATUS_OK) { - DEBUGOUT("sl_si91x_calendar_rcclk_calibration: Invalid Parameters, Error " - "Code : %lu \n", - status); - break; - } - DEBUGOUT("Successfully performed clock calibration \n"); - sl_si91x_calendar_rtc_start(); -#endif - #if defined(ALARM_EXAMPLE) && (ALARM_EXAMPLE == ENABLE) sl_calendar_datetime_config_t alarm_config; sl_calendar_datetime_config_t get_alarm; diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/ulp_calendar_example.h b/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/ulp_calendar_example.h index 2825f57f8..bab3684ea 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/ulp_calendar_example.h +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_calendar/ulp_calendar_example.h @@ -20,11 +20,10 @@ // ----------------------------------------------------------------------------- // Macros -#define ALARM_EXAMPLE ENABLE ///< To enable alarm trigger -#define CLOCK_CALIBRATION DISABLE ///< To enable clock calibration -#define SEC_INTR DISABLE ///< To enable one second trigger -#define MILLI_SEC_INTR DISABLE ///< To enable one millisecond trigger -#define TIME_CONVERSION DISABLE ///< To enable time conversion +#define ALARM_EXAMPLE ENABLE ///< To enable alarm trigger +#define SEC_INTR DISABLE ///< To enable one second trigger +#define MILLI_SEC_INTR DISABLE ///< To enable one millisecond trigger +#define TIME_CONVERSION DISABLE ///< To enable time conversion // ----------------------------------------------------------------------------- // Prototypes diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_dac/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ulp_dac/readme.md index e1b935d8c..8f58da2f4 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_dac/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_dac/readme.md @@ -43,8 +43,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_dac/sl_si91x_ulp_dac.slcp b/examples/si91x_soc/peripheral/sl_si91x_ulp_dac/sl_si91x_ulp_dac.slcp index cfcf91172..dd6cd05f0 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_dac/sl_si91x_ulp_dac.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_dac/sl_si91x_ulp_dac.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: sl_ulp_dac_example.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_dma/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ulp_dma/readme.md index ac5d59271..bdf45383c 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_dma/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_dma/readme.md @@ -52,8 +52,7 @@ Before running the application, the user will need the following things to setup - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_dma/sl_si91x_ulp_dma.slcp b/examples/si91x_soc/peripheral/sl_si91x_ulp_dma/sl_si91x_ulp_dma.slcp index 4bc9414ea..2bba39b46 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_dma/sl_si91x_ulp_dma.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_dma/sl_si91x_ulp_dma.slcp @@ -15,10 +15,10 @@ source: - path: app.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_gpio/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ulp_gpio/readme.md index b147f8901..b1ba5f9fa 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_gpio/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_gpio/readme.md @@ -99,8 +99,7 @@ Please refer to the following APIs which are common for all 3 instances and are - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_gpio/sl_si91x_ulp_gpio.slcp b/examples/si91x_soc/peripheral/sl_si91x_ulp_gpio/sl_si91x_ulp_gpio.slcp index d955156f1..ab33ef1ac 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_gpio/sl_si91x_ulp_gpio.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_gpio/sl_si91x_ulp_gpio.slcp @@ -15,10 +15,10 @@ source: - path: ulp_gpio_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_i2c_driver_leader/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ulp_i2c_driver_leader/readme.md index c1fe0490a..2d6c0ac09 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_i2c_driver_leader/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_i2c_driver_leader/readme.md @@ -85,8 +85,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_i2c_driver_leader/sl_si91x_ulp_i2c_driver_leader.slcp b/examples/si91x_soc/peripheral/sl_si91x_ulp_i2c_driver_leader/sl_si91x_ulp_i2c_driver_leader.slcp index 9f2aa4932..04e501df7 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_i2c_driver_leader/sl_si91x_ulp_i2c_driver_leader.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_i2c_driver_leader/sl_si91x_ulp_i2c_driver_leader.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_i2s/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ulp_i2s/readme.md index 4cf3aae7e..8fe31f89c 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_i2s/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_i2s/readme.md @@ -80,8 +80,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_i2s/sl_si91x_ulp_i2s.slcp b/examples/si91x_soc/peripheral/sl_si91x_ulp_i2s/sl_si91x_ulp_i2s.slcp index 5a844047e..88291433f 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_i2s/sl_si91x_ulp_i2s.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_i2s/sl_si91x_ulp_i2s.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/readme.md index d5adb5650..094facada 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/readme.md @@ -93,8 +93,7 @@ - Si91x - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram @@ -154,12 +153,12 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise | ULP_GPIO_1 [P16] | ULP_SSI_MASTER_MOSI_PIN | | ULP_GPIO_2 [F10] | ULP_SSI_MASTER_MISO_PIN | -## Pin Configuration of the WPK[BRD4002A] Base Board, and with BRD4343A radio board +## Pin Configuration of the WPK[BRD4002A] Base Board, and with BRD4343A/BRD4343B/BRD4343Q radio board | GPIO pin | Description | | ------------------ | ------------------------ | | ULP_GPIO_8 [P15] |RTE_SSI_ULP_MASTER_SCK_PIN| -| ULP_GPIO_10 [P17] |RTE_SSI_ULP_MASTER_CS0_PIN| +| ULP_GPIO_4 [P17] |RTE_SSI_ULP_MASTER_CS1_PIN| | ULP_GPIO_1 [P16] | ULP_SSI_MASTER_MOSI_PIN | | ULP_GPIO_2 [P37] | ULP_SSI_MASTER_MISO_PIN | diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/sl_si91x_ulp_ssi_master.slcp b/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/sl_si91x_ulp_ssi_master.slcp index 4e39caf23..be490462f 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/sl_si91x_ulp_ssi_master.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/sl_si91x_ulp_ssi_master.slcp @@ -13,10 +13,10 @@ source: - path: ulp_ssi_master_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/ulp_ssi_master_example.c b/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/ulp_ssi_master_example.c index c89f99070..64f86028d 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/ulp_ssi_master_example.c +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_ssi_master/ulp_ssi_master_example.c @@ -57,7 +57,13 @@ static uint8_t ulp_ssi_master_rx_buffer[ULP_SSI_MASTER_BUFFER_SIZE] = { '\0' }; static sl_ssi_handle_t ssi_driver_handle = NULL; boolean_t ulp_ssi_master_transfer_complete = false; boolean_t ulp_ssi_master_begin_transmission = true; -static uint32_t ulp_ssi_master_slave_number = SSI_SLAVE_0; +#ifdef SL_SI91X_ACX_MODULE +//SLAVE_0 is not available, according to the BRD4343A schematic, hence 'SLAVE_1' is set as the slave number in order to choose the CS1 pin mux. +// It also applies to BRD4343B and BRD4343Q. +static uint32_t ulp_ssi_master_slave_number = SSI_SLAVE_1; +#else +static uint32_t ulp_ssi_master_slave_number = SSI_SLAVE_0; +#endif /// @brief Enumeration for different transmission scenarios typedef enum { diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_timer/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ulp_timer/readme.md index b591a7421..0a6f94d36 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_timer/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_timer/readme.md @@ -2,16 +2,19 @@ ## Table of Contents -- [Purpose/Scope](#purposescope) -- [Overview](#overview) -- [About Example Code](#about-example-code) -- [Prerequisites/Setup Requirements](#prerequisitessetup-requirements) - - [Hardware Requirements](#hardware-requirements) - - [Software Requirements](#software-requirements) - - [Setup Diagram](#setup-diagram) -- [Getting Started](#getting-started) -- [Application Build Environment](#application-build-environment) -- [Test the Application](#test-the-application) +- [SL ULP Timer](#sl-ulp-timer) + - [Table of Contents](#table-of-contents) + - [Purpose/Scope](#purposescope) + - [Overview](#overview) + - [About Example Code](#about-example-code) + - [Prerequisites/Setup Requirements](#prerequisitessetup-requirements) + - [Hardware Requirements](#hardware-requirements) + - [Software Requirements](#software-requirements) + - [Setup Diagram](#setup-diagram) + - [Getting Started](#getting-started) + - [Application Build Environment](#application-build-environment) + - [Macros for Timer Configurations:](#macros-for-timer-configurations) + - [Test the Application](#test-the-application) ## Purpose/Scope @@ -30,7 +33,7 @@ ## About Example Code - The \ref ulp_timer_example.c example file demonstrates how to use a ULP-timer instance to toggle the onboard LED at a 1-second periodic rate. -- In this example, first, the clock and timer are configured with default high-power configuration values from UC through the \ref sl_si91x_ulp_timer_init and \ref sl_si91x_ulp_timer_set_configuration APIs respectively. +- In this example, first, timer is configured with default high-power configuration values from UC through the \ref sl_si91x_ulp_timer_init and \ref sl_si91x_ulp_timer_set_configuration APIs respectively. - Then, a callback is registered for the timer instance through the \ref sl_si91x_ulp_timer_register_timeout_callback API. - Next, the timer instance is started using the \ref sl_si91x_ulp_timer_start API. - The onboard LED-0 is then toggled on every interrupt (timeout value 1 second), and after toggling the LED five times, the timer is stopped using the \ref sl_si91x_ulp_timer_stop API. @@ -56,8 +59,7 @@ - Si91x - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram @@ -85,16 +87,7 @@ For details on the project folder structure, see the [WiSeConnect Examples](http ![Figure: Introduction](resources/uc_screen/ulp_timer_uc_screen.png) -- Configure Clock and timer using following macros, defined in \ref sl_si91x_ulp_timer_inst_config.h file and update/modify following macros if required: - -### Macros for Clock Configurations: - -- \ref SL_ULP_TIMER_CLK_TYPE: true to enable type-static and false to enable type-dynamic -- \ref SL_ULP_TIMER_SYNC_TO_ULPSS_PCLK: true to Enable & false to disable sync to ULPSS pclock -- \ref SL_ULP_TIMER_CLK_INPUT_SOURCE: for possible options \ref ulp_timer_clk_input_source_t -- \ref SL_ULP_TIMER_DIRECTION: true to enable waiting for switching timer clk & false to skip waiting for switching timer clk. -- After configuring the above macros, their values are passed to \ref ulp_timer_clk_src_config_t structure type variable \ref sl_timer_clk_handle which is used to configure the clock using the API-\ref sl_si91x_ulp_timer_init. -- To use SOC clock source, use the API \ref sl_si91x_ulp_timer_configure_soc_clock() instead of \ref sl_si91x_ulp_timer_init. Also, comment out the hardware_setup() call from ulp_timer_example.c file as this clock source should be used in high-power mode only. +- Configure timer using following macros, defined in \ref sl_si91x_ulp_timer_inst_config.h file and update/modify following macros if required: ### Macros for Timer Configurations: diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_timer/sl_si91x_ulp_timer.slcp b/examples/si91x_soc/peripheral/sl_si91x_ulp_timer/sl_si91x_ulp_timer.slcp index b68ff318b..4ca099e1e 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_timer/sl_si91x_ulp_timer.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_timer/sl_si91x_ulp_timer.slcp @@ -16,10 +16,10 @@ source: - path: app.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_uart/readme.md b/examples/si91x_soc/peripheral/sl_si91x_ulp_uart/readme.md index 331d7446a..e0ec40840 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_uart/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_uart/readme.md @@ -57,8 +57,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram @@ -142,7 +141,10 @@ Follow the steps below for successful execution of the application: sl_gpio_set_pin_mode(0,8,9,1); // Enable PAD receiver for gpio 8 // sl_si91x_gpio_enable_pad_receiver(gpio_num); - sl_si91x_gpio_enable_pad_receiver(8); + sl_si91x_gpio_enable_pad_receiver(8); + // Set the pin mode + // sl_gpio_set_pin_mode(port, pin, mode, output_value) + sl_gpio_set_pin_mode(4,2,0,1); // Sets ulp soc gpio mode // sl_si91x_gpio_ulp_soc_mode(ulp_gpio_num,mode) sl_si91x_gpio_ulp_soc_mode(2,3); @@ -156,6 +158,9 @@ Follow the steps below for successful execution of the application: // Enable PAD receiver for gpio 9 // sl_si91x_gpio_enable_pad_receiver(gpio_num); sl_si91x_gpio_enable_pad_receiver(9); + // Set the pin mode + // sl_gpio_set_pin_mode(port, pin, mode, output_value) + sl_gpio_set_pin_mode(4,3,0,1); // Sets ulp soc gpio mode // sl_si91x_gpio_ulp_soc_mode(ulp_gpio_num,mode) sl_si91x_gpio_ulp_soc_mode(3,3); diff --git a/examples/si91x_soc/peripheral/sl_si91x_ulp_uart/sl_si91x_ulp_uart.slcp b/examples/si91x_soc/peripheral/sl_si91x_ulp_uart/sl_si91x_ulp_uart.slcp index 744efe650..e4e386465 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_ulp_uart/sl_si91x_ulp_uart.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_ulp_uart/sl_si91x_ulp_uart.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_usart_async/readme.md b/examples/si91x_soc/peripheral/sl_si91x_usart_async/readme.md index 1c4990426..fb8023265 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_usart_async/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_usart_async/readme.md @@ -53,8 +53,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_usart_async/sl_si91x_usart_async.slcp b/examples/si91x_soc/peripheral/sl_si91x_usart_async/sl_si91x_usart_async.slcp index 0e63e9eb0..d07d911db 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_usart_async/sl_si91x_usart_async.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_usart_async/sl_si91x_usart_async.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_usart_sync_master/readme.md b/examples/si91x_soc/peripheral/sl_si91x_usart_sync_master/readme.md index bd502bbb9..839a5dd51 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_usart_sync_master/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_usart_sync_master/readme.md @@ -54,8 +54,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output).. ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_usart_sync_master/sl_si91x_usart_sync_master.slcp b/examples/si91x_soc/peripheral/sl_si91x_usart_sync_master/sl_si91x_usart_sync_master.slcp index 866969a99..491a880d7 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_usart_sync_master/sl_si91x_usart_sync_master.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_usart_sync_master/sl_si91x_usart_sync_master.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_usart_sync_slave/readme.md b/examples/si91x_soc/peripheral/sl_si91x_usart_sync_slave/readme.md index 54865f909..212e2682a 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_usart_sync_slave/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_usart_sync_slave/readme.md @@ -53,8 +53,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output).. ### Setup Diagram diff --git a/examples/si91x_soc/peripheral/sl_si91x_usart_sync_slave/sl_si91x_usart_sync_slave.slcp b/examples/si91x_soc/peripheral/sl_si91x_usart_sync_slave/sl_si91x_usart_sync_slave.slcp index f7153d30e..ba538582f 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_usart_sync_slave/sl_si91x_usart_sync_slave.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_usart_sync_slave/sl_si91x_usart_sync_slave.slcp @@ -8,10 +8,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_veml6035/sl_si91x_veml6035.slcp b/examples/si91x_soc/peripheral/sl_si91x_veml6035/sl_si91x_veml6035.slcp index 15c051ba1..064c525d4 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_veml6035/sl_si91x_veml6035.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_veml6035/sl_si91x_veml6035.slcp @@ -18,10 +18,10 @@ include: - path: veml6035_example.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/readme.md b/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/readme.md index e11931eec..e33d5150d 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/readme.md +++ b/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/readme.md @@ -2,17 +2,20 @@ ## Table of Contents -- [Purpose/Scope](#purposescope) -- [Overview](#overview) -- [About Example Code](#about-example-code) -- [Prerequisites/Setup Requirements](#prerequisitessetup-requirements) - - [Hardware Requirements](#hardware-requirements) - - [Software Requirements](#software-requirements) - - [Setup Diagram](#setup-diagram) -- [Getting Started](#getting-started) -- [Application Build Environment](#application-build-environment) -- [Test the Application](#test-the-application) -- [Expected Results](#expected-results) +- [SL WATCHDOG TIMER](#sl-watchdog-timer) + - [Table of Contents](#table-of-contents) + - [Purpose/Scope](#purposescope) + - [Overview](#overview) + - [About Example Code](#about-example-code) + - [Prerequisites/Setup Requirements](#prerequisitessetup-requirements) + - [Hardware Requirements](#hardware-requirements) + - [Software Requirements](#software-requirements) + - [Setup Diagram](#setup-diagram) + - [Getting Started](#getting-started) + - [Application Build Environment](#application-build-environment) + - [Macros for Timer Configurations](#macros-for-timer-configurations) + - [Test the Application](#test-the-application) + - [Expected Results](#expected-results) ## Purpose/Scope @@ -28,8 +31,7 @@ - The Processor needs to restart the Timer upon a timeout interrupt if the timer is not intended to reach the system-reset threshold. The timer will be in Closed Mode, as defined above, until the interrupt timer is reached. Once the interrupt timer is reached, it will be in Open Mode until the reset is generated. Also, upon interrupt generation, the timer restarts for the Reset Duration. - It has an independent window watchdog timer. - Interrupts are generated before the system reset is applied, which can be used as a wakeup source. -- It generates a system reset upon Lockup indication from the Processor. -- Configurable low and high-frequency FSM clock. +- It generates a system reset upon Lockup indication from the Processor. - Configurable interrupt (timeout), system reset, and window period. - Able to operate when the CPU is in SLEEP state. - Individually controllable power domain for low-power applications. @@ -39,7 +41,7 @@ - \ref watchdog_timer_example.c This example file demonstrates how to use the Watchdog timer (WDT) to trigger WDT warnings and reset the system after a few warnings. With a WDT timeout interrupt occurring every 1 second, the WDT is restarted (kicked) by the application, and the onboard LED0 toggles. After toggling the LED 6 times, the application does not restart the WDT, then the timer loads the system-reset time (set to 4 seconds). Once that time is over, the WDT resets the system. Afterward, the WDT is started again with new parameters, and LED0 is toggled 6 times. Finally, the WDT is stopped, the callback is unregistered, and the timer is de-initialized. - In this example, the application first toggles LED0 once and checks whether it's a power-on reset or a WDT system reset through the \ref sl_si91x_watchdog_get_timer_system_reset_status API. - If it's a power-on reset, then the WDT is initialized by enabling peripheral power, enabling WDT to run during CPU sleep mode, and unmasking its interrupt through the \ref sl_si91x_watchdog_init_timer API. -- Then, the clock and timer are configured with default configuration values from UC through the \ref sl_si91x_watchdog_configure_clock and \ref sl_si91x_watchdog_set_configuration APIs, respectively. +- Then, the timer is configured with default configuration values from UC through the \ref sl_si91x_watchdog_set_configuration APIs, respectively. - Next, the timer timeout callback is registered, and its interrupt is enabled using the \ref sl_si91x_watchdog_register_timeout_callback API. - The WDT is then started using the \ref sl_si91x_watchdog_start_timer API. The application toggles onboard LED0 and restarts (kicks) the WDT on every interrupt (every 1 second) through the \ref sl_si91x_watchdog_restart_timer. - Upon the 6th WDT interrupt, the application does not restart the WDT. So when the timer count reaches the system-reset time (4 seconds), it resets the application. @@ -68,8 +70,7 @@ - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram @@ -94,14 +95,7 @@ For details on the project folder structure, see the [WiSeConnect Examples](http ![Figure: UC](resources/uc_screen/watchdog_uc_screen.png) -- Configure Clock and timer using following macros, defined in \ref sl_si91x_watchdog_timer_config.h file and update/modify following macros if required: - -### Macros for Clock Configurations - -- \ref SL_LOW_FREQ_FSM_CLK_SRC is used for configuring the low-frequency FSM clock. Refer to \ref low_freq_fsm_clock_t for more information. -- \ref SL_ULP_TIMER_CLK_ISL_BG_PMU_CLOCK_SRC is used for configuring the BG-PMU clock. Refer to \ref bg_pmu_clock_t for more information. -- \ref SL_ULP_TIMER_DIRECTION is set to true to enable waiting for switching timer clk, and false to skip waiting for switching timer clk. -- After configuring the above macros, their values are passed to the \ref watchdog_timer_clock_config_t structure type variable \ref sl_watchdog_timer_clk_config_handle, which is used to configure the clock through the API \ref sl_si91x_watchdog_configure_clock. +- Configure timer using following macros, defined in \ref sl_si91x_watchdog_timer_config.h file and update/modify following macros if required: ### Macros for Timer Configurations diff --git a/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/resources/uc_screen/watchdog_uc_screen.png b/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/resources/uc_screen/watchdog_uc_screen.png index 34014cc30..4e664bf67 100644 Binary files a/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/resources/uc_screen/watchdog_uc_screen.png and b/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/resources/uc_screen/watchdog_uc_screen.png differ diff --git a/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/sl_si91x_watchdog_timer.slcp b/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/sl_si91x_watchdog_timer.slcp index d0ad58842..a78d4af48 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/sl_si91x_watchdog_timer.slcp +++ b/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/sl_si91x_watchdog_timer.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/watchdog_timer_example.c b/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/watchdog_timer_example.c index f176a8ac2..e7255af0b 100644 --- a/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/watchdog_timer_example.c +++ b/examples/si91x_soc/peripheral/sl_si91x_watchdog_timer/watchdog_timer_example.c @@ -79,9 +79,6 @@ void watchdog_timer_example_init(void) { sl_status_t status; sl_watchdog_timer_version_t version; - watchdog_timer_clock_config_t wdt_clock_config; - wdt_clock_config.low_freq_fsm_clock_src = KHZ_RC_CLK_SEL; - wdt_clock_config.bg_pmu_clock_source = RO_32KHZ_CLOCK; watchdog_timer_config_t wdt_config; wdt_config.interrupt_time = SL_WDT_INTERRUPT_TIME; wdt_config.system_reset_time = SL_WDT_SYSTEM_RESET_TIME; @@ -114,13 +111,6 @@ void watchdog_timer_example_init(void) sl_si91x_watchdog_init_timer(); DEBUGOUT("Successfully initialized watchdog-timer \n"); // Configuring watchdog-timer - status = sl_si91x_watchdog_configure_clock(&wdt_clock_config); - if (status != SL_STATUS_OK) { - DEBUGOUT("sl_si91x_watchdog_configure_clock : Invalid Parameters, Error Code : %lu \n", status); - break; - } - DEBUGOUT("Successfully Configured watchdog-timer with default clock sources\n"); - // Configuring watchdog-timer status = sl_si91x_watchdog_set_configuration(&wdt_config); if (status != SL_STATUS_OK) { DEBUGOUT("sl_si91x_watchdog_set_configuration : Invalid Parameters, Error Code : %lu \n", status); diff --git a/examples/si91x_soc/service/iostream_usart_baremetal/iostream_usart_baremetal.slcp b/examples/si91x_soc/service/iostream_usart_baremetal/iostream_usart_baremetal.slcp index 012ba55c7..33346cd67 100644 --- a/examples/si91x_soc/service/iostream_usart_baremetal/iostream_usart_baremetal.slcp +++ b/examples/si91x_soc/service/iostream_usart_baremetal/iostream_usart_baremetal.slcp @@ -11,10 +11,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: diff --git a/examples/si91x_soc/service/sl_si91x_littlefs/readme.md b/examples/si91x_soc/service/sl_si91x_littlefs/readme.md index b6e8e0c7b..bc0a29304 100644 --- a/examples/si91x_soc/service/sl_si91x_littlefs/readme.md +++ b/examples/si91x_soc/service/sl_si91x_littlefs/readme.md @@ -43,8 +43,7 @@ When flashed with this example the boot count get updated in the "boot_count" fi - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output).. ### Setup Diagram diff --git a/examples/si91x_soc/service/sl_si91x_littlefs/sl_si91x_file_system.slcp b/examples/si91x_soc/service/sl_si91x_littlefs/sl_si91x_file_system.slcp index d51b3e725..ee42a754c 100644 --- a/examples/si91x_soc/service/sl_si91x_littlefs/sl_si91x_file_system.slcp +++ b/examples/si91x_soc/service/sl_si91x_littlefs/sl_si91x_file_system.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: main.c - path: app.c diff --git a/examples/si91x_soc/service/sl_si91x_nvm3_common_flash/readme.md b/examples/si91x_soc/service/sl_si91x_nvm3_common_flash/readme.md index cec85be38..aee708bc6 100644 --- a/examples/si91x_soc/service/sl_si91x_nvm3_common_flash/readme.md +++ b/examples/si91x_soc/service/sl_si91x_nvm3_common_flash/readme.md @@ -48,8 +48,7 @@ For more detailed information about NVM3, refer to [Third Generation NonVolatile - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/service/sl_si91x_nvm3_common_flash/sl_si91x_nvm3_common_flash.slcp b/examples/si91x_soc/service/sl_si91x_nvm3_common_flash/sl_si91x_nvm3_common_flash.slcp index a9f365b6c..55c775bb3 100644 --- a/examples/si91x_soc/service/sl_si91x_nvm3_common_flash/sl_si91x_nvm3_common_flash.slcp +++ b/examples/si91x_soc/service/sl_si91x_nvm3_common_flash/sl_si91x_nvm3_common_flash.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/si91x_soc/service/sl_si91x_nvm3_dual_flash/readme.md b/examples/si91x_soc/service/sl_si91x_nvm3_dual_flash/readme.md index e40cb026a..5a82dfab0 100644 --- a/examples/si91x_soc/service/sl_si91x_nvm3_dual_flash/readme.md +++ b/examples/si91x_soc/service/sl_si91x_nvm3_dual_flash/readme.md @@ -45,8 +45,7 @@ For more detailed information about NVM3, refer to [Third Generation NonVolatile - Simplicity Studio - Serial console Setup - - The Serial Console setup instructions are provided below: -Refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output) + - For Serial Console setup instructions, refer [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-developers-guide-developing-for-silabs-hosts/#console-input-and-output). ### Setup Diagram diff --git a/examples/si91x_soc/service/sl_si91x_nvm3_dual_flash/sl_si91x_nvm3_dual_flash.slcp b/examples/si91x_soc/service/sl_si91x_nvm3_dual_flash/sl_si91x_nvm3_dual_flash.slcp index 63b374121..8a843bcde 100644 --- a/examples/si91x_soc/service/sl_si91x_nvm3_dual_flash/sl_si91x_nvm3_dual_flash.slcp +++ b/examples/si91x_soc/service/sl_si91x_nvm3_dual_flash/sl_si91x_nvm3_dual_flash.slcp @@ -18,10 +18,10 @@ include: - path: nvm3_app.h sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/power_manager_m4_wireless_example.c b/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/power_manager_m4_wireless_example.c index ebf7062b0..281e8b111 100644 --- a/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/power_manager_m4_wireless_example.c +++ b/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/power_manager_m4_wireless_example.c @@ -676,13 +676,6 @@ static void set_npss_wakeup_source(uint32_t wakeup_source) case SL_SI91X_POWER_MANAGER_SEC_WAKEUP: // Calendar clock is stopped to reset the configurations. sl_si91x_calendar_rtc_stop(); - // Calendar configuration is set, i.e. clock is set to RC clock. - status = sl_si91x_calendar_set_configuration(2); - if (status != SL_STATUS_OK) { - // If status is not OK, error code is returned. - DEBUGOUT("sl_si91x_ulp_timer_set_configuration failed, Error Code: 0x%lX \n", status); - return; - } // Wakeup source is configured as second trigger. status = sl_si91x_power_manager_set_wakeup_sources(SL_SI91X_POWER_MANAGER_SEC_WAKEUP, true); if (status != SL_STATUS_OK) { diff --git a/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/readme.md b/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/readme.md index dcd2a7aae..a7cad4e8b 100644 --- a/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/readme.md +++ b/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/readme.md @@ -37,18 +37,18 @@ - PS4 -> PS2: Unwanted peripherals are powered off using sl_si91x_power_manager_remove_peripheral_requirement, PS2 state requirement is added using sl_si91x_power_manager_add_ps_requirement. - PS2 -> PS4: To transmit to PS2, remove the requirement for the PS2 state using sl_si91x_power_manager_remove_ps_requirement and add a requirement for the PS4 state using sl_si91x_power_manager_add_ps_requirement switches the power state to PS4. - PS4 -> PS4 Sleep -> PS4: - - Wakeup Source is selected as the calendar second trigger. The calendar peripheral is initialized before setting it as a wakeup source, the RC clock is selected using sl_si91x_calendar_set_configuration, the calendar is initialized using sl_si91x_calendar_init, the second trigger is selected as wakeup source using sl_si91x_power_manager_set_wakeup_sources, Now callback is registered for second trigger (it enables the trigger also) using sl_si91x_calendar_register_sec_trigger_callback. + - Wakeup Source is selected as the calendar second trigger. The calendar peripheral is initialized before setting it as a wakeup source, the calendar is initialized using sl_si91x_calendar_init, the second trigger is selected as wakeup source using sl_si91x_power_manager_set_wakeup_sources, Now callback is registered for second trigger (it enables the trigger also) using sl_si91x_calendar_register_sec_trigger_callback. - Now soc goes to sleep using sl_si91x_power_manager_sleep. Upon wake-up, the calendar is stopped using sl_si91x_calendar_rtc_stop and callback is unregistered using sl_si91x_calendar_unregister_sec_trigger_callback. - PS4 -> PS3: To transmit to PS3, remove the requirement for PS4 state using sl_si91x_power_manager_remove_ps_requirement and add the requirement for PS3 state using sl_si91x_power_manager_add_ps_requirement switches the power state to PS3. - PS3 -> PS3 Sleep -> PS3: - - Wakeup Source is selected as the calendar second trigger. The calendar peripheral is initialized before setting it as a wakeup source, the RC clock is selected using sl_si91x_calendar_set_configuration, the calendar is initialized using sl_si91x_calendar_init, the second trigger is selected as wakeup source using sl_si91x_power_manager_set_wakeup_sources, Now callback is registered for second trigger (it enables the trigger also) using sl_si91x_calendar_register_sec_trigger_callback. + - Wakeup Source is selected as the calendar second trigger. The calendar peripheral is initialized before setting it as a wakeup source, the calendar is initialized using sl_si91x_calendar_init, the second trigger is selected as wakeup source using sl_si91x_power_manager_set_wakeup_sources, Now callback is registered for second trigger (it enables the trigger also) using sl_si91x_calendar_register_sec_trigger_callback. - Now soc goes to sleep using sl_si91x_power_manager_sleep. Upon wake-up, the calendar is stopped using sl_si91x_calendar_rtc_stop and callback is unregistered using sl_si91x_calendar_unregister_sec_trigger_callback. - PS3 -> PS2: Unwanted peripherals are powered off using sl_si91x_power_manager_remove_peripheral_requirement. To transmit to PS2, remove the requirement for PS3 state using sl_si91x_power_manager_remove_ps_requirement and add the requirement for PS3 state using sl_si91x_power_manager_add_ps_requirement switches the power state to PS3. - PS3 -> PS2: Unwanted peripherals are powered off using sl_si91x_power_manager_remove_peripheral_requirement. To transmit to PS2, remove the requirement for PS3 state using sl_si91x_power_manager_remove_ps_requirement and add the requirement for PS3 state using sl_si91x_power_manager_add_ps_requirement switches the power state to PS3. - PS2 -> PS2 Sleep -> PS2: - - Wakeup Source is selected as the calendar second trigger. The calendar peripheral is initialized before setting it as a wakeup source, the RC clock is selected using sl_si91x_calendar_set_configuration, the calendar is initialized using sl_si91x_calendar_init, the second trigger is selected as wakeup source using sl_si91x_power_manager_set_wakeup_sources, Now callback is registered for second trigger (it enables the trigger also) using sl_si91x_calendar_register_sec_trigger_callback. + - Wakeup Source is selected as the calendar second trigger. The calendar peripheral is initialized before setting it as a wakeup source, the calendar is initialized using sl_si91x_calendar_init, the second trigger is selected as wakeup source using sl_si91x_power_manager_set_wakeup_sources, Now callback is registered for second trigger (it enables the trigger also) using sl_si91x_calendar_register_sec_trigger_callback. - Now soc goes to sleep using sl_si91x_power_manager_sleep. - Upon wakeup, the calendar is stopped using sl_si91x_calendar_rtc_stop and the callback is unregistered using sl_si91x_calendar_unregister_sec_trigger_callback. - PS2 -> PS3: To transmit to PS3, remove the requirement for the PS2 state using sl_si91x_power_manager_remove_ps_requirement and add the requirement for the PS3 state using sl_si91x_power_manager_add_ps_requirement switches the power state to PS3. @@ -56,7 +56,7 @@ - PS4 -> PS0 -> Restarts the soc - The NWP is switched to STANDBY_POWER_SAVE which means, sleep without retention. - - Wakeup Source is selected as the calendar second trigger. The calendar peripheral is initialized before setting it as a wakeup source, the RC clock is selected using sl_si91x_calendar_set_configuration, the calendar is initialized using sl_si91x_calendar_init, the second trigger is selected as wakeup source using sl_si91x_power_manager_set_wakeup_sources, Now callback is registered for second trigger (it enables the trigger also) using sl_si91x_calendar_register_sec_trigger_callback. + - Wakeup Source is selected as the calendar second trigger. The calendar peripheral is initialized before setting it as a wakeup source, the calendar is initialized using sl_si91x_calendar_init, the second trigger is selected as wakeup source using sl_si91x_power_manager_set_wakeup_sources, Now callback is registered for second trigger (it enables the trigger also) using sl_si91x_calendar_register_sec_trigger_callback. - It goes to PS0 state using sl_si91x_power_manager_add_ps_requirement. After waking up using the calendar one-second trigger, it restarts the controller. ## Prerequisites/Setup Requirements diff --git a/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/sl_si91x_power_manager_m4_wireless.slcp b/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/sl_si91x_power_manager_m4_wireless.slcp index 9d844ba53..42e1b6f3a 100644 --- a/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/sl_si91x_power_manager_m4_wireless.slcp +++ b/examples/si91x_soc/service/sl_si91x_power_manager_m4_wireless/sl_si91x_power_manager_m4_wireless.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: diff --git a/examples/si91x_soc/service/sl_si91x_power_manager_tickless_idle/sl_si91x_power_manager_tickless_idle.slcp b/examples/si91x_soc/service/sl_si91x_power_manager_tickless_idle/sl_si91x_power_manager_tickless_idle.slcp index a99f06d83..872cf6e36 100644 --- a/examples/si91x_soc/service/sl_si91x_power_manager_tickless_idle/sl_si91x_power_manager_tickless_idle.slcp +++ b/examples/si91x_soc/service/sl_si91x_power_manager_tickless_idle/sl_si91x_power_manager_tickless_idle.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 readme: - path: readme.md source: diff --git a/examples/si91x_soc/service/sl_si91x_sensorhub/sensors/src/adc_sensor/adc_sensor_driver.c b/examples/si91x_soc/service/sl_si91x_sensorhub/sensors/src/adc_sensor/adc_sensor_driver.c index 33c28ea6b..a84918322 100644 --- a/examples/si91x_soc/service/sl_si91x_sensorhub/sensors/src/adc_sensor/adc_sensor_driver.c +++ b/examples/si91x_soc/service/sl_si91x_sensorhub/sensors/src/adc_sensor/adc_sensor_driver.c @@ -66,6 +66,7 @@ sl_status_t sl_si91x_adc_channel_init(sl_adc_channel_config_t *adc_ch_cfg, sl_ad sl_status_t sl_si91x_adc_de_init(sl_adc_config_t *adc_cfg) { sl_status_t sl_status; + sl_status = sl_si91x_adc_stop(*adc_cfg); sl_status = sl_si91x_adc_deinit(*adc_cfg); return sl_status; diff --git a/examples/si91x_soc/service/sl_si91x_sensorhub/sl_si91x_sensorhub.slcp b/examples/si91x_soc/service/sl_si91x_sensorhub/sl_si91x_sensorhub.slcp index 8326baaac..ec6701218 100644 --- a/examples/si91x_soc/service/sl_si91x_sensorhub/sl_si91x_sensorhub.slcp +++ b/examples/si91x_soc/service/sl_si91x_sensorhub/sl_si91x_sensorhub.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: sensorhub_config.c - path: sensors/src/hub_hal_intf.c diff --git a/examples/si91x_soc/service/sl_si91x_sleeptimer/readme.md b/examples/si91x_soc/service/sl_si91x_sleeptimer/readme.md index 73fc69c52..6014c9300 100644 --- a/examples/si91x_soc/service/sl_si91x_sleeptimer/readme.md +++ b/examples/si91x_soc/service/sl_si91x_sleeptimer/readme.md @@ -15,6 +15,7 @@ ## Purpose/Scope - This application contains an example code to demonstrate one shot and periodic SLEEPTIMER with LED toggle functionality. + - LED0 for ACx Module boards and LED1 for ICs ## Prerequisites/Setup Requirements @@ -66,7 +67,7 @@ For details on the project folder structure, see the [WiSeConnect Examples](http Refer instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: 1. Compile and run the application. -2. Sets the board state of LED1 to on and off after 5 sec and then configured for periodic blink rate of 400 ms. -3. LED1 should blink on WPK base board and prints should come on console. +2. Sets the board state of LED to on and off after 5 sec and then configured for periodic blink rate of 400 ms. +3. LED should blink on WPK base board and prints should come on console. ![Figure: Introduction](resources/readme/output.png) diff --git a/examples/si91x_soc/service/sl_si91x_sleeptimer/sl_si91x_sleeptimer.slcp b/examples/si91x_soc/service/sl_si91x_sleeptimer/sl_si91x_sleeptimer.slcp index 6b86a6bda..543764eaf 100644 --- a/examples/si91x_soc/service/sl_si91x_sleeptimer/sl_si91x_sleeptimer.slcp +++ b/examples/si91x_soc/service/sl_si91x_sleeptimer/sl_si91x_sleeptimer.slcp @@ -7,10 +7,10 @@ package: platform quality: production sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -32,8 +32,12 @@ component: - id: si917_memory_default_config from: wiseconnect3_sdk - id: sl_si91x_led_917 - instance: - - led1 + instance: [led0] + condition: [device_is_module] + from: wiseconnect3_sdk + - id: sl_si91x_led_917 + instance: [led1] + condition: [device_has_chip] from: wiseconnect3_sdk other_file: - path: resources/readme/setupdiagram.png diff --git a/examples/si91x_soc/service/sl_si91x_sleeptimer/sleeptimer.c b/examples/si91x_soc/service/sl_si91x_sleeptimer/sleeptimer.c index b274464c2..b272a6b3d 100644 --- a/examples/si91x_soc/service/sl_si91x_sleeptimer/sleeptimer.c +++ b/examples/si91x_soc/service/sl_si91x_sleeptimer/sleeptimer.c @@ -47,7 +47,13 @@ static void on_timeout_timer1(sl_sleeptimer_timer_handle_t *handle, void sleeptimer_init(void) { bool is_running = false; +#ifdef SL_SI91X_ACX_MODULE + // Toggles the current state of a board '0' number LED. + sl_si91x_led_toggle(SL_LED_LED0_PIN); +#else + // Toggles the current state of a board '1' number LED. sl_si91x_led_toggle(SL_LED_LED1_PIN); +#endif //Start a 5000ms oneshot timer sl_sleeptimer_start_timer(&timer1, TOOGLE_DELAY_MS1_ONESHOT, @@ -75,8 +81,12 @@ void sleeptimer_init(void) void sleeptimer_process_action(void) { if (toggle_timeout == true) { - // Toggles the current state of a board '1' number LED. + // Toggles the current state of the LED. +#ifdef SL_SI91X_ACX_MODULE + sl_si91x_led_toggle(SL_LED_LED0_PIN); +#else sl_si91x_led_toggle(SL_LED_LED1_PIN); +#endif toggle_timeout = false; } } diff --git a/examples/si91x_soc/siwx917_dev_kit/app.c b/examples/si91x_soc/siwx917_dev_kit/app.c index eadfa0ada..c2f34ee8f 100644 --- a/examples/si91x_soc/siwx917_dev_kit/app.c +++ b/examples/si91x_soc/siwx917_dev_kit/app.c @@ -1,1278 +1,194 @@ -/***************************************************************************/ /** - * @file - * @brief Embedded Sensor Demo - ******************************************************************************* - * # License - * Copyright 2024 Silicon Laboratories Inc. www.silabs.com - ******************************************************************************* +/******************************************************************************* +* @file app.c +* @brief +******************************************************************************* +* # License +* Copyright 2024 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* The licensor of this software is Silicon Laboratories Inc. Your use of this +* software is governed by the terms of Silicon Labs Master Software License +* Agreement (MSLA) available at +* www.silabs.com/about-us/legal/master-software-license-agreement. This +* software is distributed to you in Source Code format and is governed by the +* sections of the MSLA applicable to Source Code. +* +******************************************************************************/ +/************************************************************************* * - * SPDX-License-Identifier: Zlib - * - * The licensor of this software is Silicon Laboratories Inc. - * - * This software is provided 'as-is', without any express or implied - * warranty. In no event will the authors be held liable for any damages - * arising from the use of this software. - * - * Permission is granted to anyone to use this software for any purpose, - * including commercial applications, and to alter it and redistribute it - * freely, subject to the following restrictions: - * - * 1. The origin of this software must not be misrepresented; you must not - * claim that you wrote the original software. If you use this software - * in a product, an acknowledgment in the product documentation would be - * appreciated but is not required. - * 2. Altered source versions must be plainly marked as such, and must not be - * misrepresented as being the original software. - * 3. This notice may not be removed or altered from any source distribution. - * - ******************************************************************************/ - -#include "sl_net.h" -#include "app.h" -#include "errno.h" -#include "sl_utility.h" -#include "sl_wifi.h" -#include "sl_net_wifi_types.h" -#include "sl_si91x_socket_support.h" -#include "sl_si91x_socket_constants.h" -#include "sl_wifi_callback_framework.h" -#include "sl_si91x_socket.h" -#include "sl_net_si91x.h" -#include "login.h" -#include "provisioning.h" -#include "jsmn.h" -#include "sl_http_server.h" -#include "light_sensor.h" -#include "motion_sensor.h" -#include "humidity_sensor.h" -#include "rgb_led.h" -#include "stdbool.h" -#include "wifi_provisioning.h" -#include "sensor_webserver.h" -#include "sl_sleeptimer.h" -/****************************************************** - * Macros - ******************************************************/ - -#define METHOD_BAD_REQUEST "400 Bad Request" -#define METHOD_NOT_ALLOWED "405 Not Allowed" -#define METHOD_INTERNAL_SERVER_ERROR "500 Internal Server Error" - -#define DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED \ - { \ - .response_code = SL_HTTP_RESPONSE_METHOD_NOT_ALLOWED, .content_type = SL_HTTP_CONTENT_TYPE_TEXT_HTML, \ - .headers = NULL, .header_count = 0, .data = (uint8_t *)METHOD_NOT_ALLOWED, \ - .current_data_length = sizeof(METHOD_NOT_ALLOWED) - 1, .expected_data_length = sizeof(METHOD_NOT_ALLOWED) - 1 \ - } - -#define HTTP_SERVER_PORT 80 - -// Server port number -#define SERVER_PORT 5000 - -#define SCAN_RESULT_BUFFER_SIZE (2000) - -#define ON "on" -#define OFF "off" -#define OPEN "Open" -#define WPA "WPA" -#define WPA2 "WPA2" -#define WPA3 "WPA3" -#define MIXED_MODE "Mixed Mode" -#define UNKNOWN "Unknown" -#define SSID "ssid" -#define SECURITY_TYPE "security_type" -#define PASSPHRASE "passphrase" - -#define LED_JSON_RESPONSE "{\"red\": \"%s\", \"green\": \"%s\", \"blue\": \"%s\"}" -#define TEMPERATURE_JSON_RESPONSE "{\"temperature_celcius\": \"%0.2f\"}" -#define LIGHT_JSON_RESPONSE "{\"ambient_light_lux\": \"%0.2f\", \"white_light_lux\": \"%0.2f\"}" -#define MOTION_SENSOR_JSON_RESPONSE "{\"x\": \"%0.2f\", \"y\": \"%0.2f\", \"z\": \"%0.2f\"}" -#define HUMIDITY_JSON_RESPONSE "{\"humidity_percentage\": \"%lu\"}" -#define MICROPHONE_JSON_RESPONSE "{\"microphone_decibel\": \"%lu\"}" -#define STATUS_LED_JSON_RESPONSE "{\"status_led\": \"%s\"}" - -#define PROVISIONING_LED_INTERVAL_MS (300) -#define CONNECTING_LED_INTERVAL_MS (2000) -#define CONNECTED_LED_INTERVAL_MS (2000) -#define ERROR_LED_INTERVAL_MS (150) -#define LED_ERROR_BLINK_COUNT (3) - -//! Enumeration for states in application -typedef enum { - PROVISIONING_INIT_STATE, - PROVISIONING_STATE, - CONNECTING_STATE, - CONNECTED_STATE, - DISCONNECTING_STATE, -} app_state_t; - -typedef enum { - STATUS_LED_OFF, - STATUS_LED_PROVISIONING, - STATUS_LED_CONNECTING, - STATUS_LED_CONNECTED, -} status_led_state_t; - -/****************************************************** - * Function Declarations - ******************************************************/ - -static void application_start(void *argument); -static sl_wifi_security_t string_to_security_type(const char *security_type); -static char *security_type_to_string(sl_wifi_security_t security_type); -static sl_status_t index_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t default_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t provisioning_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t connect_page_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t connect_data_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t wifi_scan_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t light_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t led_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t temperature_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t accelerometer_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t gyroscope_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t humidity_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t microphone_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t sensor_webserver_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t all_sensors_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t status_led_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); -static sl_status_t ap_connected_event_handler(sl_wifi_event_t event, void *data, uint32_t data_length, void *arg); -static sl_status_t ap_disconnected_event_handler(sl_wifi_event_t event, void *data, uint32_t data_length, void *arg); - -/****************************************************** - * Variable Definitions - ******************************************************/ - -static const char *rgb_colours[] = { [0] = "red", [1] = "green", [2] = "blue" }; - -static bool scan_complete = false; -static uint8_t retry = 0; -static sl_http_server_t server_handle = { 0 }; -static sl_status_t callback_status = SL_STATUS_OK; -static app_state_t app_state = PROVISIONING_INIT_STATE; + */ + +/*================================================================================ + * @brief : This file contains example application for Wlan Station BLE + * Provisioning + * @section Description : + * This application explains how to get the WLAN connection functionality using + * BLE provisioning. + * Silicon Labs Module starts advertising and with BLE Provisioning the Access Point + * details are fetched. + * Silicon Labs device is configured as a WiFi station and connects to an Access Point. + =================================================================================*/ + +/** + * Include files + **/ +//! SL Wi-Fi SDK includes +#include "sl_si91x_driver.h" +#include "wifi_config.h" +#include "rsi_ble_common_config.h" +#include +#include "sensor_app.h" +// TCP IP BYPASS feature check +#define RSI_TCP_IP_BYPASS RSI_DISABLE + +// Function prototypes +extern void wifi_app_task(void); +extern void rsi_ble_configurator_task(void *argument); +void rsi_ble_configurator_init(void); + +uint8_t magic_word; + +osSemaphoreId_t wlan_thread_sem; +osSemaphoreId_t ble_thread_sem; +osSemaphoreId_t i2c_sem; + +static const sl_wifi_device_configuration_t config = { + .boot_option = LOAD_NWP_FW, + .mac_address = NULL, + .band = SL_SI91X_WIFI_BAND_2_4GHZ, + .region_code = WORLD_DOMAIN, + .boot_config = { .oper_mode = SL_SI91X_CLIENT_MODE, + .coex_mode = SL_SI91X_WLAN_BLE_MODE, + .feature_bit_map = (SL_SI91X_FEAT_ULP_GPIO_BASED_HANDSHAKE | SL_SI91X_FEAT_DEV_TO_HOST_ULP_GPIO_1 +#ifdef SLI_SI91X_MCU_INTERFACE + | SL_SI91X_FEAT_WPS_DISABLE +#endif + ), + .tcp_ip_feature_bit_map = (SL_SI91X_TCP_IP_FEAT_DHCPV4_CLIENT +#if (!RSI_TCP_IP_BYPASS) + | SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID | SL_SI91X_TCP_IP_FEAT_DNS_CLIENT + | SL_SI91X_TCP_IP_FEAT_SSL | SL_SI91X_TCP_IP_FEAT_ICMP +#endif + ), + .custom_feature_bit_map = (SL_SI91X_CUSTOM_FEAT_EXTENTION_VALID), + .ext_custom_feature_bit_map = + (SL_SI91X_EXT_FEAT_LOW_POWER_MODE | SL_SI91X_EXT_FEAT_XTAL_CLK | MEMORY_CONFIG +#ifdef SLI_SI917 + | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 +#endif + | SL_SI91X_EXT_FEAT_BT_CUSTOM_FEAT_ENABLE), + .bt_feature_bit_map = (SL_SI91X_BT_RF_TYPE | SL_SI91X_ENABLE_BLE_PROTOCOL), + .ext_tcp_ip_feature_bit_map = (SL_SI91X_CONFIG_FEAT_EXTENTION_VALID + | SL_SI91X_EXT_TCP_IP_TOTAL_SELECTS(1) | SL_SI91X_EXT_EMB_MQTT_ENABLE +#ifdef RSI_PROCESS_MAX_RX_DATA + | SL_SI91X_EXT_TCP_MAX_RECV_LENGTH +#endif + ), + //!ENABLE_BLE_PROTOCOL in bt_feature_bit_map + .ble_feature_bit_map = + ((SL_SI91X_BLE_MAX_NBR_PERIPHERALS(RSI_BLE_MAX_NBR_PERIPHERALS) + | SL_SI91X_BLE_MAX_NBR_CENTRALS(RSI_BLE_MAX_NBR_CENTRALS) + | SL_SI91X_BLE_MAX_NBR_ATT_SERV(RSI_BLE_MAX_NBR_ATT_SERV) + | SL_SI91X_BLE_MAX_NBR_ATT_REC(RSI_BLE_MAX_NBR_ATT_REC)) + | SL_SI91X_FEAT_BLE_CUSTOM_FEAT_EXTENTION_VALID | SL_SI91X_BLE_PWR_INX(RSI_BLE_PWR_INX) + | SL_SI91X_BLE_PWR_SAVE_OPTIONS(RSI_BLE_PWR_SAVE_OPTIONS) + | SL_SI91X_916_BLE_COMPATIBLE_FEAT_ENABLE +#if RSI_BLE_GATT_ASYNC_ENABLE + | SL_SI91X_BLE_GATT_ASYNC_ENABLE +#endif + ), + .ble_ext_feature_bit_map = + ((SL_SI91X_BLE_NUM_CONN_EVENTS(RSI_BLE_NUM_CONN_EVENTS) + | SL_SI91X_BLE_NUM_REC_BYTES(RSI_BLE_NUM_REC_BYTES)) +#if RSI_BLE_INDICATE_CONFIRMATION_FROM_HOST + | SL_SI91X_BLE_INDICATE_CONFIRMATION_FROM_HOST //indication response from app +#endif +#if RSI_BLE_MTU_EXCHANGE_FROM_HOST + | SL_SI91X_BLE_MTU_EXCHANGE_FROM_HOST //MTU Exchange request initiation from app +#endif +#if RSI_BLE_SET_SCAN_RESP_DATA_FROM_HOST + | (SL_SI91X_BLE_SET_SCAN_RESP_DATA_FROM_HOST) //Set SCAN Resp Data from app +#endif +#if RSI_BLE_DISABLE_CODED_PHY_FROM_HOST + | (SL_SI91X_BLE_DISABLE_CODED_PHY_FROM_HOST) //Disable Coded PHY from app +#endif +#if BLE_SIMPLE_GATT + | SL_SI91X_BLE_GATT_INIT +#endif + ), + .config_feature_bit_map = (SL_SI91X_FEAT_SLEEP_GPIO_SEL_BITMAP | SL_SI91X_ENABLE_ENHANCED_MAX_PSP) } +}; -static const osThreadAttr_t thread_attributes = { - .name = "app", +const osThreadAttr_t thread_attributes = { + .name = "application_thread", .attr_bits = 0, .cb_mem = 0, .cb_size = 0, .stack_mem = 0, .stack_size = 3072, - .priority = osPriorityLow, + .priority = osPriorityNormal, .tz_module = 0, .reserved = 0, }; -static const sl_net_wifi_client_profile_t wifi_client_profile_4 = { - .config = { - .channel.channel = SL_WIFI_AUTO_CHANNEL, - .channel.band = SL_WIFI_AUTO_BAND, - .channel.bandwidth = SL_WIFI_AUTO_BANDWIDTH, - .bssid = {{0}}, - .bss_type = SL_WIFI_BSS_TYPE_INFRASTRUCTURE, - .client_options = 0, - .credential_id = SL_NET_DEFAULT_WIFI_CLIENT_CREDENTIAL_ID, - }, - .ip = { - .mode = SL_IP_MANAGEMENT_DHCP, - .type = SL_IPV4, - .host_name = NULL, - .ip = {{{0}}}, - } -}; - -static const sl_http_server_handler_t provisioning_server_request_handlers[] = { - { .uri = "/", .handler = index_request_handler }, - { .uri = "/index.html", .handler = index_request_handler }, - { .uri = "/connect.html", .handler = connect_page_request_handler }, - { .uri = "/connect", .handler = connect_data_handler }, - { .uri = "/scan", .handler = wifi_scan_request_handler }, - { .uri = "/light", .handler = light_request_handler }, - { .uri = "/led", .handler = led_request_handler }, - { .uri = "/temperature", .handler = temperature_request_handler }, - { .uri = "/accelerometer", .handler = accelerometer_request_handler }, - { .uri = "/gyroscope", .handler = gyroscope_request_handler }, - { .uri = "/humidity", .handler = humidity_request_handler }, - { .uri = "/microphone", .handler = microphone_request_handler }, - { .uri = "/all_sensors", .handler = all_sensors_request_handler }, - { .uri = "/status_led", .handler = status_led_request_handler } -}; - -static const sl_http_server_handler_t sensor_server_request_handlers[] = { - { .uri = "/", .handler = sensor_webserver_handler }, - { .uri = "/index.html", .handler = sensor_webserver_handler }, - { .uri = "/provisioning", .handler = provisioning_request_handler }, - { .uri = "/light", .handler = light_request_handler }, - { .uri = "/led", .handler = led_request_handler }, - { .uri = "/temperature", .handler = temperature_request_handler }, - { .uri = "/accelerometer", .handler = accelerometer_request_handler }, - { .uri = "/gyroscope", .handler = gyroscope_request_handler }, - { .uri = "/humidity", .handler = humidity_request_handler }, - { .uri = "/microphone", .handler = microphone_request_handler }, - { .uri = "/all_sensors", .handler = all_sensors_request_handler }, - { .uri = "/status_led", .handler = status_led_request_handler } +const osThreadAttr_t ble_thread_attributes = { + .name = "ble_thread", + .attr_bits = 0, + .cb_mem = 0, + .cb_size = 0, + .stack_mem = 0, + .stack_size = 2048, + .priority = osPriorityNormal, + .tz_module = 0, + .reserved = 0, }; -static sl_wifi_client_configuration_t provisioned_access_point = { 0 }; - -static sl_sleeptimer_timer_handle_t led_timer; - -static bool status_led_on = true; - -/****************************************************** - * Function Definitions - ******************************************************/ - -void app_init(void) +void rsi_wlan_ble_app_init(void *argument) { - osThreadNew((osThreadFunc_t)application_start, NULL, &thread_attributes); -} + UNUSED_PARAMETER(argument); + int32_t status = RSI_SUCCESS; -static sl_status_t join_callback_handler(sl_wifi_event_t event, char *result, uint32_t result_length, void *arg) -{ - UNUSED_PARAMETER(result); - UNUSED_PARAMETER(arg); - printf("in join CB\r\n"); - if (SL_WIFI_CHECK_IF_EVENT_FAILED(event)) { - printf("F: Join Event received with %lu bytes payload\n", result_length); - return SL_STATUS_FAIL; + status = sl_net_init(SL_NET_WIFI_CLIENT_INTERFACE, &config, NULL, network_event_handler); + if (status != SL_STATUS_OK && status != SL_STATUS_ALREADY_INITIALIZED) { + LOG_PRINT("\r\nWireless Initialization Failed, Error Code : 0x%lX\r\n", status); + return; } - return SL_STATUS_OK; -} - -static void provisioning_and_connecting_led_callback(sl_sleeptimer_timer_handle_t *handle, void *data) -{ - UNUSED_PARAMETER(handle); - UNUSED_PARAMETER(data); - blue_led_toggle(); -} + LOG_PRINT("\r\nWireless Initialization Success\r\n"); -static void connected_led_callback(sl_sleeptimer_timer_handle_t *handle, void *data) -{ - UNUSED_PARAMETER(handle); - UNUSED_PARAMETER(data); - white_led_toggle(); -} - -static void play_error_led_sequence(void) -{ - if (status_led_on == false) { + wlan_thread_sem = osSemaphoreNew(1, 0, NULL); + if (wlan_thread_sem == NULL) { + LOG_PRINT("\r\nFailed to create wlan_thread_sem\r\n"); return; } - rgb_led_set_state(false, false, false); - sl_sleeptimer_stop_timer(&led_timer); - for (uint8_t a = 0; a < 2 * LED_ERROR_BLINK_COUNT; a++) { - red_led_toggle(); - osDelay(ERROR_LED_INTERVAL_MS); - } -} -static void status_led_set_state(bool state) -{ - status_led_on = state; - rgb_led_set_state(false, false, false); - sl_sleeptimer_stop_timer(&led_timer); -} - -static void status_led_update_state(void) -{ - if (status_led_on == false) { + ble_thread_sem = osSemaphoreNew(1, 0, NULL); + if (ble_thread_sem == NULL) { + LOG_PRINT("\r\nFailed to create ble_thread_sem\r\n"); return; } - switch (app_state) { - case PROVISIONING_INIT_STATE: - case PROVISIONING_STATE: - rgb_led_set_state(false, false, false); - sl_sleeptimer_stop_timer(&led_timer); - sl_sleeptimer_start_periodic_timer_ms(&led_timer, - PROVISIONING_LED_INTERVAL_MS, - provisioning_and_connecting_led_callback, - NULL, - 0, - SL_SLEEPTIMER_NO_HIGH_PRECISION_HF_CLOCKS_REQUIRED_FLAG); - break; - case CONNECTING_STATE: - sl_sleeptimer_stop_timer(&led_timer); - sl_sleeptimer_start_periodic_timer_ms(&led_timer, - CONNECTING_LED_INTERVAL_MS, - provisioning_and_connecting_led_callback, - NULL, - 0, - SL_SLEEPTIMER_NO_HIGH_PRECISION_HF_CLOCKS_REQUIRED_FLAG); - break; - case CONNECTED_STATE: - rgb_led_set_state(false, false, false); - sl_sleeptimer_stop_timer(&led_timer); - sl_sleeptimer_start_periodic_timer_ms(&led_timer, - CONNECTED_LED_INTERVAL_MS, - connected_led_callback, - NULL, - 0, - SL_SLEEPTIMER_NO_HIGH_PRECISION_HF_CLOCKS_REQUIRED_FLAG); - break; - default: - break; - } -} - -static void application_start(void *argument) -{ - UNUSED_PARAMETER(argument); - sl_status_t status = SL_STATUS_OK; - sl_net_wifi_client_profile_t profile = { 0 }; - sl_ip_address_t ip_address = { 0 }; - sl_http_server_config_t server_config = { 0 }; - - printf("\r\nEmbedded sensor demo started\r\n"); - - // Init sensor when application starts - light_sensor_init(); - humidity_sensor_init(); - motion_sensor_init(); - memset(&led_timer, 0, sizeof(led_timer)); - - while (1) { - switch (app_state) { - case PROVISIONING_INIT_STATE: { - sl_net_wifi_ap_profile_t ap_profile; - - status_led_update_state(); - - status = sl_net_init(SL_NET_WIFI_AP_INTERFACE, (const void *)&sl_wifi_default_ap_configuration, NULL, NULL); - if (status != SL_STATUS_OK) { - printf("Failed to start Wi-Fi AP interface: 0x%lx\r\n", status); - return; - } - - sl_wifi_set_callback(SL_WIFI_CLIENT_CONNECTED_EVENTS, ap_connected_event_handler, NULL); - sl_wifi_set_callback(SL_WIFI_CLIENT_DISCONNECTED_EVENTS, ap_disconnected_event_handler, NULL); - printf("Wi-Fi AP initialized\r\n"); - - status = sl_net_up(SL_NET_WIFI_AP_INTERFACE, SL_NET_DEFAULT_WIFI_AP_PROFILE_ID); - if (status != SL_STATUS_OK) { - printf("Failed to bring Wi-Fi AP interface up: 0x%lx\r\n", status); - return; - } - printf("Wi-Fi AP started\r\n"); - - server_config.port = HTTP_SERVER_PORT; - server_config.default_handler = default_handler; - server_config.handlers_list = (sl_http_server_handler_t *)provisioning_server_request_handlers; - server_config.handlers_count = sizeof(provisioning_server_request_handlers) / sizeof(sl_http_server_handler_t); - status = sl_http_server_init(&server_handle, &server_config); - if (status != SL_STATUS_OK) { - printf("HTTP server init failed:%lx\r\n", status); - return; - } - status = sl_http_server_start(&server_handle); - if (status != SL_STATUS_OK) { - printf("Server start fail:%lx\r\n", status); - return; - } - printf("Provisioning HTTP server started\r\n"); - - sl_net_get_profile(SL_NET_WIFI_AP_INTERFACE, - SL_NET_DEFAULT_WIFI_AP_PROFILE_ID, - (sl_net_profile_t *)&ap_profile); - printf("\r\nConnect to access point \"%s\" from your device\r\n", ap_profile.config.ssid.value); - printf("Go to http://%u.%u.%u.%u/ on your browser to provision the sensor demo\r\n", - ap_profile.ip.ip.v4.ip_address.bytes[0], - ap_profile.ip.ip.v4.ip_address.bytes[1], - ap_profile.ip.ip.v4.ip_address.bytes[2], - ap_profile.ip.ip.v4.ip_address.bytes[3]); - app_state = PROVISIONING_STATE; - break; - } - case CONNECTING_STATE: { - status_led_update_state(); - - status = sl_http_server_stop(&server_handle); - if (status != SL_STATUS_OK) { - printf("Server stop fail:%lx\r\n", status); - return; - } - status = sl_http_server_deinit(&server_handle); - if (status != SL_STATUS_OK) { - printf("Server deinit fail:%lx\r\n", status); - return; - } - printf("HTTP Server deinitialized\r\n"); - - status = sl_net_deinit(SL_NET_WIFI_AP_INTERFACE); - if (status != SL_STATUS_OK) { - printf("Ap deinit : 0x%lx\r\n", status); - return; - } - printf("Wi-Fi AP deinitialized\r\n"); - - status = sl_net_init(SL_NET_WIFI_CLIENT_INTERFACE, &sl_wifi_default_client_configuration, NULL, NULL); - if (status != SL_STATUS_OK) { - printf("Failed to start Wi-Fi client interface: 0x%lx\r\n", status); - return; - } - printf("Wi-Fi client interface initialized\r\n"); - - sl_wifi_set_callback(SL_WIFI_CLIENT_CONNECTED_EVENTS, ap_connected_event_handler, NULL); - sl_wifi_set_callback(SL_WIFI_CLIENT_DISCONNECTED_EVENTS, ap_disconnected_event_handler, NULL); - - // Keeping the station ipv4 record in profile_id_0 - status = sl_net_set_profile(SL_NET_WIFI_CLIENT_INTERFACE, SL_NET_PROFILE_ID_0, &wifi_client_profile_4); - if (status != SL_STATUS_OK) { - printf("Failed to set client profile: 0x%lx\r\n", status); - return; - } - printf("Wi-Fi set client profile v4 success\r\n"); - printf("SSID %s\r\n", provisioned_access_point.ssid.value); - - sl_wifi_set_join_callback(join_callback_handler, NULL); - status = sl_wifi_connect(SL_WIFI_CLIENT_2_4GHZ_INTERFACE, &provisioned_access_point, 15000); - if (status != SL_STATUS_OK) { - printf("Failed to bring Wi-Fi client interface up: 0x%lx\r\n", status); - //! If scan failed retry again after 5 seconds - if (status == 0x10003) { - if (retry) { - retry--; - osDelay(5000); - break; - } else { - retry = 5; - } - } - status = sl_net_deinit(SL_NET_WIFI_CLIENT_INTERFACE); - if (status != SL_STATUS_OK) { - printf("STA deinit : 0x%lx\r\n", status); - } - play_error_led_sequence(); - app_state = PROVISIONING_INIT_STATE; - break; - } - - status = sl_net_get_profile(SL_NET_WIFI_CLIENT_INTERFACE, SL_NET_PROFILE_ID_0, &profile); - if (status != SL_STATUS_OK) { - printf("Failed to bring Wi-Fi client interface up: 0x%lx\r\n", status); - return; - } - - status = sl_si91x_configure_ip_address(&profile.ip, SL_SI91X_WIFI_CLIENT_VAP_ID); - if (status != SL_STATUS_OK) { - printf("IPv4 address configuration is failed : 0x%lx\r\n", status); - return; - } - - printf("IPv4 address configuration complete\r\n"); - memcpy(&ip_address.ip.v4.bytes, &profile.ip.ip.v4.ip_address.bytes, sizeof(sl_ipv4_address_t)); - printf("Client IPv4: "); - print_sl_ipv4_address(&ip_address.ip.v4); - printf("\r\n"); - - server_config.port = HTTP_SERVER_PORT; - server_config.default_handler = default_handler; - server_config.handlers_list = (sl_http_server_handler_t *)sensor_server_request_handlers; - server_config.handlers_count = sizeof(sensor_server_request_handlers) / sizeof(sl_http_server_handler_t); - - status = sl_http_server_init(&server_handle, &server_config); - if (status != SL_STATUS_OK) { - printf("HTTP server init failed:%lx\r\n", status); - return; - } - status = sl_http_server_start(&server_handle); - if (status != SL_STATUS_OK) { - printf("Server start fail:%lx\r\n", status); - return; - } - printf("Sensor HTTP server started\r\n"); - - printf("\r\nThe sensor demo is now connected to your Wi-Fi network\r\n"); - printf("Go to http://%u.%u.%u.%u/ on your browser to view the sensor data\r\n", - profile.ip.ip.v4.ip_address.bytes[0], - profile.ip.ip.v4.ip_address.bytes[1], - profile.ip.ip.v4.ip_address.bytes[2], - profile.ip.ip.v4.ip_address.bytes[3]); - app_state = CONNECTED_STATE; - status_led_update_state(); - break; - } - case DISCONNECTING_STATE: { - status = sl_http_server_stop(&server_handle); - if (status != SL_STATUS_OK) { - printf("Server stop fail:%lx\r\n", status); - return; - } - status = sl_http_server_deinit(&server_handle); - if (status != SL_STATUS_OK) { - printf("Server deinit fail:%lx\r\n", status); - return; - } - printf("Sensor HTTP Server deinitialized\r\n"); - - status = sl_net_deinit(SL_NET_WIFI_CLIENT_INTERFACE); - if (status != SL_STATUS_OK) { - printf("Wi-Fi client deinit failed: 0x%lx\r\n", status); - return; - } - printf("Wi-Fi client deinitialized\r\n"); - app_state = PROVISIONING_INIT_STATE; - break; - } - case PROVISIONING_STATE: - case CONNECTED_STATE: { - osDelay(1000); - break; - } - } +#ifdef SLI_SI91X_MCU_INTERFACE + uint8_t xtal_enable = 1; + status = sl_si91x_m4_ta_secure_handshake(SL_SI91X_ENABLE_XTAL, 1, &xtal_enable, 0, NULL); + if (status != SL_STATUS_OK) { + printf("\r\nFailed to bring m4_ta_secure_handshake: 0x%lx\r\n", status); + return; } - while (1) { -#if defined(SL_CATALOG_POWER_MANAGER_PRESENT) - // Let the CPU go to sleep if the system allows it. - sl_power_manager_sleep(); -#else - osDelay(osWaitForever); #endif + if (osThreadNew((osThreadFunc_t)rsi_ble_configurator_task, NULL, &ble_thread_attributes) == NULL) { + LOG_PRINT("\r\nFailed to create BLE thread\r\n"); } -} - -static sl_status_t ap_connected_event_handler(sl_wifi_event_t event, void *data, uint32_t data_length, void *arg) -{ - UNUSED_PARAMETER(data_length); - UNUSED_PARAMETER(arg); - UNUSED_PARAMETER(event); - - printf("Remote Client connected: "); - print_mac_address((sl_mac_address_t *)data); - printf("\r\n"); - return SL_STATUS_OK; -} - -static sl_status_t ap_disconnected_event_handler(sl_wifi_event_t event, void *data, uint32_t data_length, void *arg) -{ - UNUSED_PARAMETER(data_length); - UNUSED_PARAMETER(arg); - UNUSED_PARAMETER(event); - - printf("Remote Client disconnected: "); - print_mac_address((sl_mac_address_t *)data); - printf("\r\n"); - return SL_STATUS_OK; -} - -static sl_status_t index_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + sensors_init(); - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); + // BLE initialization + rsi_ble_configurator_init(); - if (req->type == SL_HTTP_REQUEST_GET) { - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_TEXT_HTML; - http_response.data = (uint8_t *)wifi_provisioning_content; - http_response.current_data_length = strlen((const char *)wifi_provisioning_content); - http_response.expected_data_length = http_response.current_data_length; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; + wifi_app_task(); + return; } -static sl_status_t connect_page_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - if (req->type == SL_HTTP_REQUEST_GET) { - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_TEXT_HTML; - http_response.data = (uint8_t *)login_content; - http_response.current_data_length = strlen((const char *)login_content); - http_response.expected_data_length = http_response.current_data_length; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; -} - -static sl_status_t light_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - if (req->type == SL_HTTP_REQUEST_GET) { - char response_data[100] = { 0 }; - float ambient_light_lux = 0.0f; - float white_light_lux = 0.0f; - ambient_light_read(&ambient_light_lux); - white_light_read(&white_light_lux); - - snprintf(response_data, sizeof(response_data) - 1, LIGHT_JSON_RESPONSE, ambient_light_lux, white_light_lux); - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; -} - -static sl_status_t led_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - char response_data[100] = { 0 }; - bool rgb_states[RGB_LED_MAX] = { false }; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - switch (req->type) { - case SL_HTTP_REQUEST_POST: { - char received_data_buffer[200] = { 0 }; - sl_http_recv_req_data_t received_data = { 0 }; - jsmn_parser parser; - jsmntok_t tokens[10]; - bool rgb_found[RGB_LED_MAX] = { false }; - - if (status_led_on == true) { - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; - } - - received_data.request = req; - received_data.buffer = (uint8_t *)received_data_buffer; - received_data.buffer_length = sizeof(received_data_buffer) - 1; - sl_http_server_read_request_data(handle, &received_data); - - jsmn_init(&parser); - - memset(&tokens, 0, sizeof(tokens)); - jsmn_parse(&parser, received_data_buffer, req->request_data_length, tokens, sizeof(tokens) / sizeof(jsmntok_t)); - for (uint8_t a = 1; a < RGB_LED_MAX * 2 + 1; a += 2) { - if (tokens[a].type == JSMN_STRING) { - for (uint8_t b = 0; b < 3; b++) { - if (memcmp(&received_data_buffer[tokens[a].start], rgb_colours[b], tokens[a].end - tokens[a].start) == 0) { - if (tokens[a + 1].type == JSMN_STRING) { - if (memcmp(&received_data_buffer[tokens[a + 1].start], ON, tokens[a + 1].end - tokens[a + 1].start) - == 0) { - rgb_found[b] = true; - rgb_states[b] = true; - } else if (memcmp(&received_data_buffer[tokens[a + 1].start], - OFF, - tokens[a + 1].end - tokens[a + 1].start) - == 0) { - rgb_found[b] = true; - rgb_states[b] = false; - } - } - } - } - } - } - if (rgb_found[RGB_LED_RED] == false || rgb_found[RGB_LED_GREEN] == false || rgb_found[RGB_LED_BLUE] == false) { - http_response.response_code = SL_HTTP_RESPONSE_BAD_REQUEST; - http_response.data = (uint8_t *)METHOD_BAD_REQUEST; - http_response.current_data_length = sizeof(METHOD_BAD_REQUEST) - 1; - http_response.expected_data_length = http_response.current_data_length; - break; - } else { - rgb_led_set_state(rgb_states[RGB_LED_RED], rgb_states[RGB_LED_GREEN], rgb_states[RGB_LED_BLUE]); - } - } // fall-through - // @suppress("No break at end of case") - case SL_HTTP_REQUEST_GET: { - rgb_led_get_state(&rgb_states[RGB_LED_RED], &rgb_states[RGB_LED_GREEN], &rgb_states[RGB_LED_BLUE]); - snprintf(response_data, - sizeof(response_data) - 1, - LED_JSON_RESPONSE, - (rgb_states[RGB_LED_RED] == true) ? ON : OFF, - (rgb_states[RGB_LED_GREEN] == true) ? ON : OFF, - (rgb_states[RGB_LED_BLUE] == true) ? ON : OFF); - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - break; - } - default: - break; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; -} - -static sl_status_t temperature_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - if (req->type == SL_HTTP_REQUEST_GET) { - char response_data[100] = { 0 }; - float temperature = 0.0f; - - temperature_read(&temperature); - - snprintf(response_data, sizeof(response_data) - 1, TEMPERATURE_JSON_RESPONSE, temperature); - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; -} - -static sl_status_t accelerometer_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - if (req->type == SL_HTTP_REQUEST_GET) { - char response_data[100] = { 0 }; - float x = 0.0f; - float y = 0.0f; - float z = 0.0f; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - accelerometer_read(&x, &y, &z); - - snprintf(response_data, sizeof(response_data) - 1, MOTION_SENSOR_JSON_RESPONSE, x, y, z); - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; -} - -static sl_status_t gyroscope_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - if (req->type == SL_HTTP_REQUEST_GET) { - char response_data[100] = { 0 }; - float x = 0.0f; - float y = 0.0f; - float z = 0.0f; - - gyro_read(&x, &y, &z); - - snprintf(response_data, sizeof(response_data) - 1, MOTION_SENSOR_JSON_RESPONSE, x, y, z); - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; -} - -static sl_status_t humidity_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - if (req->type == SL_HTTP_REQUEST_GET) { - char response_data[100] = { 0 }; - uint32_t humidity = 0; - - humidity_read(&humidity); - - snprintf(response_data, sizeof(response_data) - 1, HUMIDITY_JSON_RESPONSE, humidity); - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; -} - -static sl_status_t microphone_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - if (req->type == SL_HTTP_REQUEST_GET) { - char response_data[100] = { 0 }; - uint32_t microphone_decibel = 0; - - // TODO: add call to microphone read - - snprintf(response_data, sizeof(response_data) - 1, MICROPHONE_JSON_RESPONSE, microphone_decibel); - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; -} - -static sl_status_t provisioning_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - if (req->type == SL_HTTP_REQUEST_POST) { - char response_data[100] = { 0 }; - - snprintf(response_data, sizeof(response_data) - 1, "{\"status\": \"ok\"}"); - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - sl_http_server_send_response(handle, &http_response); - if (app_state == CONNECTED_STATE) { - app_state = DISCONNECTING_STATE; - } - } else { - sl_http_server_send_response(handle, &http_response); - } - return SL_STATUS_OK; -} - -static sl_status_t connect_data_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - if (req->type == SL_HTTP_REQUEST_POST) { - char received_data_buffer[200] = { 0 }; - sl_http_recv_req_data_t received_data = { 0 }; - char response_data[100] = { 0 }; - jsmn_parser parser; - jsmntok_t tokens[10]; - bool ssid_found = false; - bool security_type_found = false; - bool passphrase_found = false; - - received_data.request = req; - received_data.buffer = (uint8_t *)received_data_buffer; - received_data.buffer_length = sizeof(received_data_buffer) - 1; - sl_http_server_read_request_data(handle, &received_data); - - jsmn_init(&parser); - - memset(&provisioned_access_point, 0, sizeof(provisioned_access_point)); - provisioned_access_point.encryption = SL_WIFI_CCMP_ENCRYPTION; - provisioned_access_point.credential_id = SL_NET_DEFAULT_WIFI_CLIENT_CREDENTIAL_ID; - - memset(&tokens, 0, sizeof(tokens)); - jsmn_parse(&parser, received_data_buffer, req->request_data_length, tokens, sizeof(tokens) / sizeof(jsmntok_t)); - - for (uint8_t a = 1; a < 7; a += 2) { - if (tokens[a].type == JSMN_STRING) { - if (memcmp(&received_data_buffer[tokens[a].start], SSID, tokens[a].end - tokens[a].start) == 0) { - if (tokens[a + 1].type == JSMN_STRING) { - provisioned_access_point.ssid.length = tokens[a + 1].end - tokens[a + 1].start; - if (provisioned_access_point.ssid.length <= sizeof(provisioned_access_point.ssid.value)) { - ssid_found = true; - memcpy(provisioned_access_point.ssid.value, - &received_data_buffer[tokens[a + 1].start], - provisioned_access_point.ssid.length); - } else { - printf("SSID is too long. Max length is 32.\r\n"); - } - } - } else if (memcmp(&received_data_buffer[tokens[a].start], PASSPHRASE, tokens[a].end - tokens[a].start) == 0) { - if (tokens[a].type == JSMN_STRING) { - sl_status_t status = sl_net_set_credential(SL_NET_DEFAULT_WIFI_CLIENT_CREDENTIAL_ID, - SL_NET_WIFI_PSK, - &received_data_buffer[tokens[a + 1].start], - tokens[a + 1].end - tokens[a + 1].start); - if (status == SL_STATUS_OK) { - passphrase_found = true; - } - } - } else if (memcmp(&received_data_buffer[tokens[a].start], SECURITY_TYPE, tokens[a].end - tokens[a].start) - == 0) { - char security_type[20] = { 0 }; - - strncpy(security_type, &received_data_buffer[tokens[a + 1].start], tokens[a + 1].end - tokens[a + 1].start); - provisioned_access_point.security = string_to_security_type(security_type); - if (provisioned_access_point.security != SL_WIFI_SECURITY_UNKNOWN) { - security_type_found = true; - } - } - } - } - - if (ssid_found == false || passphrase_found == false || security_type_found == false) { - http_response.response_code = SL_HTTP_RESPONSE_BAD_REQUEST; - http_response.data = (uint8_t *)METHOD_BAD_REQUEST; - http_response.current_data_length = sizeof(METHOD_BAD_REQUEST) - 1; - http_response.expected_data_length = http_response.current_data_length; - sl_http_server_send_response(handle, &http_response); - } else { - snprintf(response_data, sizeof(response_data) - 1, "{\"status\": \"ok\"}"); - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - sl_http_server_send_response(handle, &http_response); - app_state = CONNECTING_STATE; - } - } else { - sl_http_server_send_response(handle, &http_response); - } - return SL_STATUS_OK; -} - -static sl_status_t wlan_app_scan_callback_handler(sl_wifi_event_t event, - sl_wifi_scan_result_t *scan_result, - uint32_t result_length, - void *arg) -{ - char *scan_result_buffer = (char *)arg; - uint8_t *bssid = NULL; - UNUSED_PARAMETER(arg); - UNUSED_PARAMETER(result_length); - - if (SL_WIFI_CHECK_IF_EVENT_FAILED(event)) { - callback_status = *(sl_status_t *)scan_result; - return SL_STATUS_FAIL; - } - - if (scan_result->scan_count) { - uint32_t buffer_length = SCAN_RESULT_BUFFER_SIZE - 1; - int32_t index = - snprintf(scan_result_buffer, buffer_length, "{\"count\": \"%lu\", \"scan_results\": [", scan_result->scan_count); - scan_result_buffer += index; - buffer_length -= index; - - for (uint32_t a = 0; a < scan_result->scan_count; a++) { - bssid = (uint8_t *)&scan_result->scan_info[a].bssid; - index = snprintf(scan_result_buffer, - buffer_length, - "{\"ssid\": \"%s\", \"security_type\": \"%s\", \"network_type\": \"%u\",", - scan_result->scan_info[a].ssid, - security_type_to_string(scan_result->scan_info[a].security_mode), - scan_result->scan_info[a].network_type); - scan_result_buffer += index; - buffer_length -= index; - index = snprintf(scan_result_buffer, - buffer_length, - " \"bssid\": \"%02x:%02x:%02x:%02x:%02x:%02x\", \"channel\": \"%u\", \"rssi\": \"-%u\"}", - bssid[0], - bssid[1], - bssid[2], - bssid[3], - bssid[4], - bssid[5], - scan_result->scan_info[a].rf_channel, - scan_result->scan_info[a].rssi_val); - scan_result_buffer += index; - buffer_length -= index; - if (a < scan_result->scan_count - 1) { - index = snprintf(scan_result_buffer, buffer_length, ","); - scan_result_buffer += index; - buffer_length -= index; - } - } - index = snprintf(scan_result_buffer, buffer_length, "]}"); - scan_result_buffer += index; - buffer_length -= index; - } - - scan_complete = true; - return SL_STATUS_OK; -} - -static sl_status_t wifi_scan_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - if (req->type == SL_HTTP_REQUEST_GET) { - sl_status_t status; - char *scan_result_buffer = (char *)malloc(SCAN_RESULT_BUFFER_SIZE); - sl_wifi_scan_configuration_t wifi_scan_configuration = default_wifi_scan_configuration; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - memset(scan_result_buffer, 0, SCAN_RESULT_BUFFER_SIZE); - - printf("WLAN scan started \r\n"); - scan_complete = false; - sl_wifi_set_scan_callback(wlan_app_scan_callback_handler, (void *)scan_result_buffer); - status = sl_wifi_start_scan(SL_WIFI_AP_INTERFACE, NULL, &wifi_scan_configuration); - if (SL_STATUS_IN_PROGRESS == status) { - printf("Scanning...\r\n"); - const uint32_t start = osKernelGetTickCount(); - - while (!scan_complete && (osKernelGetTickCount() - start) <= 10000) { - osThreadYield(); - } - status = scan_complete ? callback_status : SL_STATUS_TIMEOUT; - } - if (status != RSI_SUCCESS) { - printf("WLAN Scan failed %lx. Please make sure the latest connectivity firmware is used.\r\n", status); - http_response.response_code = SL_HTTP_RESPONSE_INTERNAL_SERVER_ERROR; - http_response.data = (uint8_t *)METHOD_INTERNAL_SERVER_ERROR; - http_response.current_data_length = sizeof(METHOD_INTERNAL_SERVER_ERROR) - 1; - http_response.expected_data_length = http_response.current_data_length; - - } else { - printf("Scan done state \r\n"); - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)scan_result_buffer; - http_response.current_data_length = strlen(scan_result_buffer); - http_response.expected_data_length = http_response.current_data_length; - } - sl_http_server_send_response(handle, &http_response); - free(scan_result_buffer); - } else { - sl_http_server_send_response(handle, &http_response); - } - return SL_STATUS_OK; -} - -static sl_status_t default_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - sl_http_header_t header = { .key = "Server", .value = "SI917-HTTPServer" }; - - UNUSED_PARAMETER(req); - - http_response.response_code = SL_HTTP_RESPONSE_NOT_FOUND; - http_response.content_type = SL_HTTP_CONTENT_TYPE_TEXT_PLAIN; - http_response.headers = &header; - http_response.header_count = 1; - - char *response_data = "404 Not Found"; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - sl_http_server_send_response(handle, &http_response); - - return SL_STATUS_OK; -} - -static sl_status_t sensor_webserver_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - if (req->type == SL_HTTP_REQUEST_GET) { - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_TEXT_HTML; - http_response.data = (uint8_t *)sensor_webserver_content; - http_response.current_data_length = strlen((const char *)sensor_webserver_content); - http_response.expected_data_length = http_response.current_data_length; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; -} - -static sl_status_t all_sensors_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - - if (req->type == SL_HTTP_REQUEST_GET) { - char response_data[1000] = { 0 }; - uint32_t remaining_buffer_length = sizeof(response_data) - 1; - char *current_response_data = response_data; - uint32_t index = 0; - bool red = false; - bool green = false; - bool blue = false; - float temperature = 0.0f; - float ambient_light_lux = 0.0f; - float white_light_lux = 0.0f; - float x = 0.0f; - float y = 0.0f; - float z = 0.0f; - uint32_t humidity = 0; - uint32_t microphone_decibel = 0; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - rgb_led_get_state(&red, &green, &blue); - index = snprintf(current_response_data, - remaining_buffer_length, - "{\"led\": " LED_JSON_RESPONSE ",", - (red == true) ? ON : OFF, - (green == true) ? ON : OFF, - (blue == true) ? ON : OFF); - current_response_data += index; - remaining_buffer_length -= index; - - ambient_light_read(&ambient_light_lux); - white_light_read(&white_light_lux); - index = snprintf(current_response_data, - remaining_buffer_length, - "\"light\": " LIGHT_JSON_RESPONSE ",", - ambient_light_lux, - white_light_lux); - current_response_data += index; - remaining_buffer_length -= index; - - temperature_read(&temperature); - index = snprintf(current_response_data, - remaining_buffer_length, - "\"temperature\": " TEMPERATURE_JSON_RESPONSE ",", - temperature); - current_response_data += index; - remaining_buffer_length -= index; - - accelerometer_read(&x, &y, &z); - index = snprintf(current_response_data, - remaining_buffer_length, - "\"accelerometer\": " MOTION_SENSOR_JSON_RESPONSE ",", - x, - y, - z); - current_response_data += index; - remaining_buffer_length -= index; - - gyro_read(&x, &y, &z); - index = snprintf(current_response_data, - remaining_buffer_length, - "\"gyroscope\": " MOTION_SENSOR_JSON_RESPONSE ",", - x, - y, - z); - current_response_data += index; - remaining_buffer_length -= index; - - humidity_read(&humidity); - index = - snprintf(current_response_data, remaining_buffer_length, "\"humidity\": " HUMIDITY_JSON_RESPONSE ",", humidity); - current_response_data += index; - remaining_buffer_length -= index; - - // TODO: add call to microphone read - index = snprintf(current_response_data, - remaining_buffer_length, - "\"microphone\": " MICROPHONE_JSON_RESPONSE "}", - microphone_decibel); - current_response_data += index; - remaining_buffer_length -= index; - - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; -} - -static sl_status_t status_led_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) -{ - sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; - char response_data[100] = { 0 }; - - printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); - - switch (req->type) { - case SL_HTTP_REQUEST_POST: { - char received_data_buffer[200] = { 0 }; - sl_http_recv_req_data_t received_data = { 0 }; - jsmn_parser parser; - jsmntok_t tokens[10]; - bool state_found = false; - bool state = false; - - received_data.request = req; - received_data.buffer = (uint8_t *)received_data_buffer; - received_data.buffer_length = sizeof(received_data_buffer) - 1; - sl_http_server_read_request_data(handle, &received_data); - - jsmn_init(&parser); - - memset(&tokens, 0, sizeof(tokens)); - jsmn_parse(&parser, received_data_buffer, req->request_data_length, tokens, sizeof(tokens) / sizeof(jsmntok_t)); - if (tokens[1].type == JSMN_STRING) { - if (memcmp(&received_data_buffer[tokens[1].start], "status_led", tokens[1].end - tokens[1].start) == 0) { - if (tokens[2].type == JSMN_STRING) { - if (memcmp(&received_data_buffer[tokens[2].start], ON, tokens[2].end - tokens[2].start) == 0) { - state_found = true; - state = true; - } else if (memcmp(&received_data_buffer[tokens[2].start], OFF, tokens[2].end - tokens[2].start) == 0) { - state_found = true; - state = false; - } - } - } - } - if (state_found == false) { - http_response.response_code = SL_HTTP_RESPONSE_BAD_REQUEST; - http_response.data = (uint8_t *)METHOD_BAD_REQUEST; - http_response.current_data_length = sizeof(METHOD_BAD_REQUEST) - 1; - http_response.expected_data_length = http_response.current_data_length; - break; - } else { - status_led_set_state(state); - status_led_update_state(); - } - } // fall-through - // @suppress("No break at end of case") - case SL_HTTP_REQUEST_GET: { - snprintf(response_data, sizeof(response_data) - 1, STATUS_LED_JSON_RESPONSE, (status_led_on == true) ? ON : OFF); - http_response.response_code = SL_HTTP_RESPONSE_OK; - http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; - http_response.data = (uint8_t *)response_data; - http_response.current_data_length = strlen(response_data); - http_response.expected_data_length = http_response.current_data_length; - break; - } - default: - break; - } - sl_http_server_send_response(handle, &http_response); - return SL_STATUS_OK; -} - -static sl_wifi_security_t string_to_security_type(const char *security_type) -{ - if (strcmp(security_type, OPEN) == 0) { - return SL_WIFI_OPEN; - } else if (strcmp(security_type, WPA) == 0) { - return SL_WIFI_WPA; - } else if (strcmp(security_type, WPA2) == 0) { - return SL_WIFI_WPA2; - } else if (strcmp(security_type, WPA3) == 0) { - return SL_WIFI_WPA3; - } else if (strcmp(security_type, MIXED_MODE) == 0) { - return SL_WIFI_WPA_WPA2_MIXED; - } else { - return SL_WIFI_SECURITY_UNKNOWN; - } -} - -static char *security_type_to_string(sl_wifi_security_t security_type) +void app_init(void) { - switch (security_type) { - case SL_WIFI_OPEN: - return OPEN; - case SL_WIFI_WPA: - return WPA; - case SL_WIFI_WPA2: - return WPA2; - case SL_WIFI_WPA3: - return WPA3; - case SL_WIFI_WPA_WPA2_MIXED: - return MIXED_MODE; - default: - return UNKNOWN; - } + osThreadNew((osThreadFunc_t)rsi_wlan_ble_app_init, NULL, &thread_attributes); } diff --git a/examples/si91x_soc/siwx917_dev_kit/app.h b/examples/si91x_soc/siwx917_dev_kit/app.h index 38f83ebdd..592f7875c 100644 --- a/examples/si91x_soc/siwx917_dev_kit/app.h +++ b/examples/si91x_soc/siwx917_dev_kit/app.h @@ -1,34 +1,31 @@ -/***************************************************************************/ /** - * @file app.h - * @brief Top level application functions - ******************************************************************************* - * # License - * Copyright 2024 Silicon Laboratories Inc. www.silabs.com - ******************************************************************************* - * - * The licensor of this software is Silicon Laboratories Inc. Your use of this - * software is governed by the terms of Silicon Labs Master Software License - * Agreement (MSLA) available at - * www.silabs.com/about-us/legal/master-software-license-agreement. This - * software is distributed to you in Source Code format and is governed by the - * sections of the MSLA applicable to Source Code. - * - ******************************************************************************/ - -#ifndef APP_H -#define APP_H - -/***************************************************************************/ /** - * Initialize application. - ******************************************************************************/ -void app_init(void); - -#include -#include - -/***************************************************************************/ /** - * App ticking function. - ******************************************************************************/ -void app_process_action(void); - -#endif // APP_H +/***************************************************************************/ /** + * @file app.h + * @brief Top level application functions + ******************************************************************************* + * # License + * Copyright 2023 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef APP_H +#define APP_H + +/***************************************************************************/ /** + * Initialize application. + ******************************************************************************/ +void app_init(void); + +/***************************************************************************/ /** + * App ticking function. + ******************************************************************************/ +void app_process_action(void); + +#endif // APP_H diff --git a/examples/si91x_soc/siwx917_dev_kit/ble_app.c b/examples/si91x_soc/siwx917_dev_kit/ble_app.c new file mode 100644 index 000000000..81f374517 --- /dev/null +++ b/examples/si91x_soc/siwx917_dev_kit/ble_app.c @@ -0,0 +1,985 @@ +/******************************************************************************* +* @file ble_app.c +* @brief +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* The licensor of this software is Silicon Laboratories Inc. Your use of this +* software is governed by the terms of Silicon Labs Master Software License +* Agreement (MSLA) available at +* www.silabs.com/about-us/legal/master-software-license-agreement. This +* software is distributed to you in Source Code format and is governed by the +* sections of the MSLA applicable to Source Code. +* +******************************************************************************/ +/************************************************************************* + * + */ + +/*================================================================================ + * @brief : This file contains example application for WiFi Station BLE + * Provisioning + * @section Description : + * This application explains how to get the WLAN connection functionality using + * BLE provisioning. + * Silicon Labs Module starts advertising and with BLE Provisioning the Access Point + * details are fetched. + * Silicon Labs device is configured as a WiFi station and connects to an Access Point. + =================================================================================*/ + +/** + * Include files + * */ + +#include + +//! SL Wi-Fi SDK includes +#include "sl_net_wifi_types.h" +#include "sl_wifi.h" +#include "sl_net_ip_types.h" +#include "cmsis_os2.h" +#include "sl_utility.h" + +// BLE include file to refer BLE APIs +#include +#include +#include +#include "rsi_ble.h" + +#include "ble_config.h" +#include "wifi_config.h" + +// BLE attribute service types UUID values +#define RSI_BLE_CHAR_SERV_UUID 0x2803 +#define RSI_BLE_CLIENT_CHAR_UUID 0x2902 + +// BLE characteristic service UUID +#define RSI_BLE_NEW_SERVICE_UUID 0xAABB +#define RSI_BLE_ATTRIBUTE_1_UUID 0x1AA1 +#define RSI_BLE_ATTRIBUTE_2_UUID 0x1BB1 +#define RSI_BLE_ATTRIBUTE_3_UUID 0x1CC1 + +// Max data length +#define RSI_BLE_MAX_DATA_LEN 66 + +// Local device name +#define RSI_BLE_APP_DEVICE_NAME "WIFI_SENSOR" + +// Attribute properties +#define RSI_BLE_ATT_PROPERTY_READ 0x02 +#define RSI_BLE_ATT_PROPERTY_WRITE 0x08 +#define RSI_BLE_ATT_PROPERTY_NOTIFY 0x10 + +// Application event list +#define RSI_BLE_ENH_CONN_EVENT 0x01 +#define RSI_BLE_DISCONN_EVENT 0x02 +#define RSI_BLE_WLAN_SCAN_RESP 0x03 + +#define RSI_SSID 0x0D +#define RSI_SECTYPE 0x0E +#define RSI_BLE_WLAN_DISCONN_NOTIFY 0x0F +#define RSI_WLAN_ALREADY 0x10 +#define RSI_WLAN_NOT_ALREADY 0x11 +#define RSI_BLE_WLAN_TIMEOUT_NOTIFY 0x12 +#define RSI_APP_FW_VERSION 0x13 +#define RSI_BLE_WLAN_DISCONNECT_STATUS 0x14 +#define RSI_BLE_WLAN_JOIN_STATUS 0x15 +#define RSI_BLE_MTU_EVENT 0x16 +#define RSI_BLE_CONN_UPDATE_EVENT 0x17 +#define RSI_BLE_RECEIVE_REMOTE_FEATURES 0x18 +#define RSI_BLE_DATA_LENGTH_CHANGE 0x19 + +#define RSI_FW_VERSION 0x01 + +// Maximum length of SSID +#define RSI_SSID_LEN 34 +// MAC address length +#define RSI_MAC_ADDR_LEN 6 +// Maximum access points that can be scanned +#define RSI_AP_SCANNED_MAX 11 + +//! connection update parameters +#define CONN_INTERVAL_MIN 0x320 //0x08 +#define CONN_INTERVAL_MAX 0x320 //0x08 +#define CONN_INTERVAL_DEFAULT_MIN 0x18 +#define CONN_INTERVAL_DEFAULT_MAX 0x18 +#define SUPERVISION_TIMEOUT_DEFAULT 400 +#define CONN_LATENCY 0 + +/******************************************************************************************************** + * DATA TYPES + ********************************************************************************************************* + */ + +// global parameters list +static uint8_t data[20] = { 0 }; +static volatile uint32_t ble_app_event_map; +static rsi_ble_event_conn_status_t conn_event_to_app; +static rsi_ble_event_disconnect_t disconn_event_to_app; +static uint8_t rsi_ble_att1_val_hndl; +static uint16_t rsi_ble_att2_val_hndl; +static uint16_t rsi_ble_att3_val_hndl; +uint8_t coex_ssid[50]; +uint8_t pwd[RSI_BLE_MAX_DATA_LEN]; +uint8_t sec_type; +static uint8_t remote_dev_addr[18] = { 0 }; +static rsi_ble_event_mtu_t app_ble_mtu_event; +static rsi_ble_event_conn_update_t event_conn_update_complete; +static rsi_ble_event_remote_features_t remote_dev_feature; +static rsi_ble_event_data_length_update_t updated_data_len_params; + +static sl_wifi_scan_result_t *scanresult = NULL; + +extern uint8_t connected; +extern uint8_t retry; +extern sl_net_wifi_client_profile_t client_profile; + +extern osSemaphoreId_t ble_thread_sem; +extern uint16_t scanbuf_size; + +/****************************************************** + * Function Declarations + ******************************************************/ +extern void wifi_app_set_event(uint32_t event_num); +void rsi_ble_on_enhance_conn_status_event(rsi_ble_event_enhance_conn_status_t *resp_enh_conn); +void rsi_ble_on_conn_update_complete_event(rsi_ble_event_conn_update_t *rsi_ble_event_conn_update_complete, + uint16_t resp_status); +void rsi_ble_on_remote_features_event(rsi_ble_event_remote_features_t *rsi_ble_event_remote_features); +void rsi_ble_data_length_change_event(rsi_ble_event_data_length_update_t *rsi_ble_data_length_update); +void rsi_ble_configurator_init(void); +void rsi_ble_configurator_task(void *argument); +void wifi_app_send_to_ble(uint16_t msg_type, uint8_t *data, uint16_t data_len); +/*==============================================*/ +/** + * @fn rsi_ble_add_char_serv_att + * @brief this function is used to add characteristic service attribute + * @param[in] serv_handler, service handler. + * @param[in] handle, characteristic service attribute handle. + * @param[in] val_prop, characteristic value property. + * @param[in] att_val_handle, characteristic value handle + * @param[in] att_val_uuid, characteristic value uuid + * @return none. + * @section description + * This function is used at application to add characteristic attribute + */ +static void rsi_ble_add_char_serv_att(void *serv_handler, + uint16_t handle, + uint8_t val_prop, + uint16_t att_val_handle, + uuid_t att_val_uuid) +{ + rsi_ble_req_add_att_t new_att = { 0 }; + + // preparing the attribute service structure + new_att.serv_handler = serv_handler; + new_att.handle = handle; + new_att.att_uuid.size = 2; + new_att.att_uuid.val.val16 = RSI_BLE_CHAR_SERV_UUID; + new_att.property = RSI_BLE_ATT_PROPERTY_READ; + + // preparing the characteristic attribute value + new_att.data_len = 6; + new_att.data[0] = val_prop; + rsi_uint16_to_2bytes(&new_att.data[2], att_val_handle); + rsi_uint16_to_2bytes(&new_att.data[4], att_val_uuid.val.val16); + + // add attribute to the service + rsi_ble_add_attribute(&new_att); + + return; +} + +/*==============================================*/ +/** + * @fn rsi_ble_add_char_val_att + * @brief this function is used to add characteristic value attribute. + * @param[in] serv_handler, new service handler. + * @param[in] handle, characteristic value attribute handle. + * @param[in] att_type_uuid, attribute uuid value. + * @param[in] val_prop, characteristic value property. + * @param[in] data, characteristic value data pointer. + * @param[in] data_len, characteristic value length. + * @return none. + * @section description + * This function is used at application to create new service. + */ + +static void rsi_ble_add_char_val_att(void *serv_handler, + uint16_t handle, + uuid_t att_type_uuid, + uint8_t val_prop, + uint8_t *data, + uint8_t data_len) +{ + rsi_ble_req_add_att_t new_att = { 0 }; + + // preparing the attributes + new_att.serv_handler = serv_handler; + new_att.handle = handle; + memcpy(&new_att.att_uuid, &att_type_uuid, sizeof(uuid_t)); + new_att.property = val_prop; + + // preparing the attribute value + new_att.data_len = RSI_MIN(sizeof(new_att.data), data_len); + memcpy(new_att.data, data, new_att.data_len); + + // add attribute to the service + rsi_ble_add_attribute(&new_att); + + // check the attribute property with notification + if (val_prop & RSI_BLE_ATT_PROPERTY_NOTIFY) { + // if notification property supports then we need to add client characteristic service. + + // preparing the client characteristic attribute & values + memset(&new_att, 0, sizeof(rsi_ble_req_add_att_t)); + new_att.serv_handler = serv_handler; + new_att.handle = handle + 1; + new_att.att_uuid.size = 2; + new_att.att_uuid.val.val16 = RSI_BLE_CLIENT_CHAR_UUID; + new_att.property = RSI_BLE_ATT_PROPERTY_READ | RSI_BLE_ATT_PROPERTY_WRITE; + new_att.data_len = 2; + + // add attribute to the service + rsi_ble_add_attribute(&new_att); + } + + return; +} + +/*==============================================*/ +/** + * @fn rsi_ble_simple_chat_add_new_serv + * @brief this function is used to add new service i.e., simple chat service. + * @param[in] none. + * @return int32_t + * 0 = success + * !0 = failure + * @section description + * This function is used at application to create new service. + */ +static uint32_t rsi_ble_add_configurator_serv(void) +{ + uuid_t new_uuid = { 0 }; + rsi_ble_resp_add_serv_t new_serv_resp = { 0 }; + uint8_t data[RSI_BLE_MAX_DATA_LEN] = { 0 }; + + new_uuid.size = 2; // adding new service + new_uuid.val.val16 = RSI_BLE_NEW_SERVICE_UUID; + + rsi_ble_add_service(new_uuid, &new_serv_resp); + + new_uuid.size = 2; // adding characteristic service attribute to the service + new_uuid.val.val16 = RSI_BLE_ATTRIBUTE_1_UUID; + rsi_ble_add_char_serv_att(new_serv_resp.serv_handler, + new_serv_resp.start_handle + 1, + RSI_BLE_ATT_PROPERTY_WRITE, + new_serv_resp.start_handle + 2, + new_uuid); + + rsi_ble_att1_val_hndl = new_serv_resp.start_handle + 2; // adding characteristic value attribute to the service + new_uuid.size = 2; + new_uuid.val.val16 = RSI_BLE_ATTRIBUTE_1_UUID; + rsi_ble_add_char_val_att(new_serv_resp.serv_handler, + new_serv_resp.start_handle + 2, + new_uuid, + RSI_BLE_ATT_PROPERTY_WRITE, + data, + RSI_BLE_MAX_DATA_LEN); + + new_uuid.size = 2; // adding characteristic service attribute to the service + new_uuid.val.val16 = RSI_BLE_ATTRIBUTE_2_UUID; + rsi_ble_add_char_serv_att(new_serv_resp.serv_handler, + new_serv_resp.start_handle + 3, + RSI_BLE_ATT_PROPERTY_READ | RSI_BLE_ATT_PROPERTY_WRITE, + new_serv_resp.start_handle + 4, + new_uuid); + + rsi_ble_att2_val_hndl = new_serv_resp.start_handle + 4; // adding characteristic value attribute to the service + new_uuid.size = 2; + new_uuid.val.val16 = RSI_BLE_ATTRIBUTE_2_UUID; + rsi_ble_add_char_val_att(new_serv_resp.serv_handler, + new_serv_resp.start_handle + 4, + new_uuid, + RSI_BLE_ATT_PROPERTY_READ | RSI_BLE_ATT_PROPERTY_WRITE, + data, + RSI_BLE_MAX_DATA_LEN); + + new_uuid.size = 2; // adding characteristic service attribute to the service + new_uuid.val.val16 = RSI_BLE_ATTRIBUTE_3_UUID; + rsi_ble_add_char_serv_att(new_serv_resp.serv_handler, + new_serv_resp.start_handle + 5, + RSI_BLE_ATT_PROPERTY_READ | RSI_BLE_ATT_PROPERTY_NOTIFY, + new_serv_resp.start_handle + 6, + new_uuid); + + rsi_ble_att3_val_hndl = new_serv_resp.start_handle + 6; // adding characteristic value attribute to the service + new_uuid.size = 2; + new_uuid.val.val16 = RSI_BLE_ATTRIBUTE_3_UUID; + rsi_ble_add_char_val_att(new_serv_resp.serv_handler, + new_serv_resp.start_handle + 6, + new_uuid, + RSI_BLE_ATT_PROPERTY_READ | RSI_BLE_ATT_PROPERTY_NOTIFY, + data, + RSI_BLE_MAX_DATA_LEN); + return 0; +} + +/*==============================================*/ +/** + * @fn rsi_ble_app_init_events + * @brief initializes the event parameter. + * @param[in] none. + * @return none. + * @section description + * This function is used during BLE initialization. + */ +static void rsi_ble_app_init_events() +{ + ble_app_event_map = 0; + return; +} + +/*==============================================*/ +/** + * @fn rsi_ble_app_set_event + * @brief sets the specific event. + * @param[in] event_num, specific event number. + * @return none. + * @section description + * This function is used to set/raise the specific event. + */ +static void rsi_ble_app_set_event(uint32_t event_num) +{ + ble_app_event_map |= BIT(event_num); + + osSemaphoreRelease(ble_thread_sem); + + return; +} + +/*==============================================*/ +/** + * @fn rsi_ble_app_clear_event + * @brief clears the specific event. + * @param[in] event_num, specific event number. + * @return none. + * @section description + * This function is used to clear the specific event. + */ +static void rsi_ble_app_clear_event(uint32_t event_num) +{ + ble_app_event_map &= ~BIT(event_num); + return; +} + +/*==============================================*/ +/** + * @fn rsi_ble_app_get_event + * @brief returns the first set event based on priority + * @param[in] none. + * @return int32_t + * > 0 = event number + * -1 = not received any event + * @section description + * This function returns the highest priority event among all the set events + */ +static int32_t rsi_ble_app_get_event(void) +{ + uint32_t ix; + + for (ix = 0; ix < 32; ix++) { + if (ble_app_event_map & (1 << ix)) { + return ix; + } + } + + return (-1); +} + +/*==============================================*/ +/** + * @fn rsi_ble_on_enhance_conn_status_event + * @brief invoked when enhanced connection complete event is received + * @param[out] resp_enh_conn, connected remote device information + * @return none. + * @section description + * This callback function indicates the status of the connection + */ +void rsi_ble_on_enhance_conn_status_event(rsi_ble_event_enhance_conn_status_t *resp_enh_conn) +{ + conn_event_to_app.dev_addr_type = resp_enh_conn->dev_addr_type; + memcpy(conn_event_to_app.dev_addr, resp_enh_conn->dev_addr, RSI_DEV_ADDR_LEN); + LOG_PRINT("\r\nRemote BLE device connected (address - %s)\r\n", + rsi_6byte_dev_address_to_ascii(remote_dev_addr, resp_enh_conn->dev_addr)); + conn_event_to_app.status = resp_enh_conn->status; + rsi_ble_app_set_event(RSI_BLE_ENH_CONN_EVENT); +} + +/*==============================================*/ +/** + * @fn rsi_ble_on_connect_event + * @brief invoked when connection complete event is received + * @param[out] resp_conn, connected remote device information + * @return none. + * @section description + * This callback function indicates the status of the connection + */ +static void rsi_ble_on_connect_event(rsi_ble_event_conn_status_t *resp_conn) +{ + memcpy(&conn_event_to_app, resp_conn, sizeof(rsi_ble_event_conn_status_t)); + LOG_PRINT("\r\nRemote BLE device connected (address - %s)\r\n", + rsi_6byte_dev_address_to_ascii(remote_dev_addr, conn_event_to_app.dev_addr)); + rsi_ble_app_set_event(RSI_BLE_ENH_CONN_EVENT); +} + +/*==============================================*/ +/** + * @fn rsi_ble_on_disconnect_event + * @brief invoked when disconnection event is received + * @param[out] resp_disconnect, disconnected remote device information + * @param[out] reason, reason for disconnection. + * @return none. + * @section description + * This Callback function indicates disconnected device information and status + */ +static void rsi_ble_on_disconnect_event(rsi_ble_event_disconnect_t *resp_disconnect, uint16_t reason) +{ + UNUSED_PARAMETER(reason); + memcpy(&disconn_event_to_app, resp_disconnect, sizeof(rsi_ble_event_disconnect_t)); + LOG_PRINT("\r\nRemote BLE device disconnected (address - %s)\r\n", + rsi_6byte_dev_address_to_ascii(remote_dev_addr, disconn_event_to_app.dev_addr)); + rsi_ble_app_set_event(RSI_BLE_DISCONN_EVENT); +} + +/*==============================================*/ +/** + * @fn rsi_ble_on_conn_update_complete_event + * @brief invoked when conn update complete event is received + * @param[out] rsi_ble_event_conn_update_complete contains the controller + * support conn information. + * @param[out] resp_status contains the response status (Success or Error code) + * @return none. + * @section description + * This Callback function indicated the conn update complete event is received + */ +void rsi_ble_on_conn_update_complete_event(rsi_ble_event_conn_update_t *rsi_ble_event_conn_update_complete, + uint16_t resp_status) +{ + UNUSED_PARAMETER(resp_status); + rsi_6byte_dev_address_to_ascii(remote_dev_addr, (uint8_t *)rsi_ble_event_conn_update_complete->dev_addr); + memcpy(&event_conn_update_complete, rsi_ble_event_conn_update_complete, sizeof(rsi_ble_event_conn_update_t)); + rsi_ble_app_set_event(RSI_BLE_CONN_UPDATE_EVENT); + return; +} + +/*============================================================================*/ +/** + * @fn rsi_ble_on_remote_features_event + * @brief invoked when LE remote features event is received. + * @param[out] rsi_ble_event_remote_features, connected remote device information + * @return none. + * @section description + * This callback function indicates the remote device features + */ +void rsi_ble_on_remote_features_event(rsi_ble_event_remote_features_t *rsi_ble_event_remote_features) +{ + memcpy(&remote_dev_feature, rsi_ble_event_remote_features, sizeof(rsi_ble_event_remote_features_t)); + rsi_ble_app_set_event(RSI_BLE_RECEIVE_REMOTE_FEATURES); +} +/*============================================================================*/ +/** + * @fn rsi_ble_data_length_change_event + * @brief invoked when data length is set + * @param[out] rsi_ble_data_length_update, data length information + * @section description + * This Callback function indicates data length is set + */ +void rsi_ble_data_length_change_event(rsi_ble_event_data_length_update_t *rsi_ble_data_length_update) +{ + memcpy(&updated_data_len_params, rsi_ble_data_length_update, sizeof(rsi_ble_event_data_length_update_t)); + rsi_ble_app_set_event(RSI_BLE_DATA_LENGTH_CHANGE); +} +/*==============================================*/ +/** + * @fn rsi_ble_on_mtu_event + * @brief invoked when an MTU size event is received + * @param[out] rsi_ble_mtu, it indicates MTU size. + * @return none. + * @section description + * This callback function is invoked when an MTU size event is received + */ +static void rsi_ble_on_mtu_event(rsi_ble_event_mtu_t *rsi_ble_mtu) +{ + memcpy(&app_ble_mtu_event, rsi_ble_mtu, sizeof(rsi_ble_event_mtu_t)); + rsi_6byte_dev_address_to_ascii(remote_dev_addr, app_ble_mtu_event.dev_addr); + rsi_ble_app_set_event(RSI_BLE_MTU_EVENT); +} + +/*==============================================*/ +/** + * @fn rsi_ble_on_gatt_write_event + * @brief this is call back function, it invokes when write/notify events received. + * @param[out] event_id, it indicates write/notification event id. + * @param[out] rsi_ble_write, write event parameters. + * @return none. + * @section description + * This is a callback function + */ +static void rsi_ble_on_gatt_write_event(uint16_t event_id, rsi_ble_event_write_t *rsi_ble_write) +{ + UNUSED_PARAMETER(event_id); + uint8_t cmdid; + + // Requests will come from Mobile app + if ((rsi_ble_att1_val_hndl) == *((uint16_t *)rsi_ble_write->handle)) { + cmdid = rsi_ble_write->att_value[0]; + + switch (cmdid) { + // Scan command request + case '3': //else if(rsi_ble_write->att_value[0] == '3') + { + //LOG_PRINT("Received scan request\n"); + retry = 0; + memset(data, 0, sizeof(data)); + wifi_app_set_event(WIFI_APP_SCAN_STATE); + } break; + + // Sending SSID + case '2': //else if(rsi_ble_write->att_value[0] == '2') + { + memset(coex_ssid, 0, sizeof(coex_ssid)); + strcpy((char *)coex_ssid, (const char *)&rsi_ble_write->att_value[3]); + + rsi_ble_app_set_event(RSI_SSID); + } break; + + // Sending Security type + case '5': //else if(rsi_ble_write->att_value[0] == '5') + { + sec_type = ((rsi_ble_write->att_value[3]) - '0'); + //LOG_PRINT("In Security Request\n"); + + rsi_ble_app_set_event(RSI_SECTYPE); + } break; + + // Sending PSK + case '6': //else if(rsi_ble_write->att_value[0] == '6') + { + memset(data, 0, sizeof(data)); + strcpy((char *)pwd, (const char *)&rsi_ble_write->att_value[3]); + //LOG_PRINT("PWD from ble app\n"); + wifi_app_set_event(WIFI_APP_JOIN_STATE); + } break; + + // WLAN Status Request + case '7': //else if(rsi_ble_write->att_value[0] == '7') + { + //LOG_PRINT("WLAN status request received\n"); + memset(data, 0, sizeof(data)); + if (connected) { + rsi_ble_app_set_event(RSI_WLAN_ALREADY); + } else { + rsi_ble_app_set_event(RSI_WLAN_NOT_ALREADY); + } + } break; + + // WLAN disconnect request + case '4': //else if(rsi_ble_write->att_value[0] == '4') + { + LOG_PRINT("WLAN disconnect request received\n"); + memset(data, 0, sizeof(data)); + wifi_app_set_event(WIFI_APP_DISCONN_NOTIFY_STATE); + } break; + + // FW version request + case '8': { + memset(data, 0, sizeof(data)); + rsi_ble_app_set_event(RSI_APP_FW_VERSION); + // LOG_PRINT("FW version request\n"); + } break; + + default: + LOG_PRINT("Default command case \n\n"); + break; + } + } +} + +/*==============================================*/ +/** + * @fn rsi_ble_app_init + * @brief initialize the BLE module. + * @param[in] none + * @return none. + * @section description + * This function is used to initialize the BLE module + */ +void rsi_ble_configurator_init(void) +{ + uint8_t adv[31] = { 2, 1, 6 }; + sl_wifi_firmware_version_t firmware_version = { 0 }; + sl_status_t status = 0; + + // initializing the application events map + rsi_ble_app_init_events(); + + rsi_ble_add_configurator_serv(); // adding simple BLE chat service + + // registering the GAP callback functions + rsi_ble_gap_register_callbacks(NULL, + rsi_ble_on_connect_event, + rsi_ble_on_disconnect_event, + NULL, + NULL, + rsi_ble_data_length_change_event, + rsi_ble_on_enhance_conn_status_event, + NULL, + rsi_ble_on_conn_update_complete_event, + NULL); + //! registering the GAP extended call back functions + rsi_ble_gap_extended_register_callbacks(rsi_ble_on_remote_features_event, NULL); + + // registering the GATT callback functions + rsi_ble_gatt_register_callbacks(NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + rsi_ble_on_gatt_write_event, + NULL, + NULL, + NULL, + rsi_ble_on_mtu_event, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL); + + // Set local name + rsi_bt_set_local_name((uint8_t *)RSI_BLE_APP_DEVICE_NAME); + + // prepare advertise data //local/device name + adv[3] = strlen(RSI_BLE_APP_DEVICE_NAME) + 1; + adv[4] = 9; + strcpy((char *)&adv[5], RSI_BLE_APP_DEVICE_NAME); + + // set advertise data + rsi_ble_set_advertise_data(adv, strlen(RSI_BLE_APP_DEVICE_NAME) + 5); + + // set device in advertising mode. + rsi_ble_start_advertising(); + LOG_PRINT("\r\nBLE Advertising Started ...\r\n"); + LOG_PRINT("\r\nDevice advertising as: ") + LOG_PRINT(RSI_BLE_APP_DEVICE_NAME); + LOG_PRINT("\r\n"); + + status = sl_wifi_get_firmware_version(&firmware_version); + if (status != SL_STATUS_OK) { + printf("\r\nFirmware version query failed, Error Code : 0x%lX\r\n", status); + } +} + +/*==============================================*/ +/** + * @fn rsi_ble_app_task + * @brief this function will execute when BLE events are raised. + * @param[in] none. + * @return none. + * @section description + */ + +void rsi_ble_configurator_task(void *argument) +{ + UNUSED_PARAMETER(argument); + + int32_t status = 0; + int32_t event_id; + uint8_t data[RSI_BLE_MAX_DATA_LEN] = { 0 }; + uint8_t scan_ix, length; + uint8_t k; + + scanresult = (sl_wifi_scan_result_t *)malloc(scanbuf_size); + if (scanresult == NULL) { + LOG_PRINT("\r\nFailed to allocate memory for scan results\n"); + return; + } + memset(scanresult, 0, scanbuf_size); + while (1) { + // checking for events list + event_id = rsi_ble_app_get_event(); + if (event_id == -1) { + osSemaphoreAcquire(ble_thread_sem, osWaitForever); + // if events are not received loop will be continued. + continue; + } + + switch (event_id) { + case RSI_BLE_ENH_CONN_EVENT: { + // event invokes when connection was completed + + // clear the served event + rsi_ble_app_clear_event(RSI_BLE_ENH_CONN_EVENT); + + //MTU exchange + status = rsi_ble_mtu_exchange_event(conn_event_to_app.dev_addr, BLE_MTU_SIZE); + if (status != RSI_SUCCESS) { + LOG_PRINT("\n MTU request failed with error code %lx", status); + } + + status = rsi_ble_conn_params_update(conn_event_to_app.dev_addr, + CONN_INTERVAL_DEFAULT_MIN, + CONN_INTERVAL_DEFAULT_MAX, + CONN_LATENCY, + SUPERVISION_TIMEOUT_DEFAULT); + if (status != RSI_SUCCESS) { + LOG_PRINT("\n rsi_ble_conn_params_update command failed : %lx", status); + } + + } break; + + case RSI_BLE_DISCONN_EVENT: { + // event invokes when disconnection was completed + + // clear the served event + rsi_ble_app_clear_event(RSI_BLE_DISCONN_EVENT); + + // set device in advertising mode. + +adv: + status = rsi_ble_start_advertising(); + if (status != RSI_SUCCESS) { + LOG_PRINT("\r\nStart advertising command failed, Error code = %lx \n", status); + goto adv; + } else { + LOG_PRINT("\r\nBLE Advertising started\n"); + } + } break; + + case RSI_APP_FW_VERSION: { + sl_wifi_firmware_version_t firmware_version = { 0 }; + rsi_ble_app_clear_event(RSI_APP_FW_VERSION); + memset(data, 0, RSI_BLE_MAX_DATA_LEN); + + status = sl_wifi_get_firmware_version(&firmware_version); + if (status == SL_STATUS_OK) { + data[0] = 0x08; + data[1] = sizeof(sl_wifi_firmware_version_t); + + memcpy(&data[2], &firmware_version, sizeof(sl_wifi_firmware_version_t)); + rsi_ble_set_local_att_value(rsi_ble_att2_val_hndl, RSI_BLE_MAX_DATA_LEN, data); + } else { + LOG_PRINT("\r\nFirmware version query failed, Error Code : 0x%lX\r\n", status); + } + } break; + + // Connected SSID name (response to '7' command if connection is already established) + case RSI_WLAN_ALREADY: { + rsi_ble_app_clear_event(RSI_WLAN_ALREADY); + + memset(data, 0, RSI_BLE_MAX_DATA_LEN); + + data[1] = connected; /*This index will indicate wlan AP connect or disconnect status to Android app*/ + data[0] = 0x07; + rsi_ble_set_local_att_value(rsi_ble_att2_val_hndl, RSI_BLE_MAX_DATA_LEN, data); + } break; + + // NO WLAN connection (response to '7' command if connection is there already) + case RSI_WLAN_NOT_ALREADY: { + rsi_ble_app_clear_event(RSI_WLAN_NOT_ALREADY); + memset(data, 0, RSI_BLE_MAX_DATA_LEN); + data[0] = 0x07; + data[1] = 0x00; + rsi_ble_set_local_att_value(rsi_ble_att2_val_hndl, RSI_BLE_MAX_DATA_LEN, data); + } break; + + case RSI_BLE_WLAN_DISCONN_NOTIFY: { + rsi_ble_app_clear_event(RSI_BLE_WLAN_DISCONN_NOTIFY); + memset(data, 0, RSI_BLE_MAX_DATA_LEN); + data[1] = 0x01; + data[0] = 0x04; + rsi_ble_set_local_att_value(rsi_ble_att2_val_hndl, RSI_BLE_MAX_DATA_LEN, data); + } break; + + case RSI_BLE_WLAN_TIMEOUT_NOTIFY: { + rsi_ble_app_clear_event(RSI_BLE_WLAN_TIMEOUT_NOTIFY); + memset(data, 0, RSI_BLE_MAX_DATA_LEN); + data[0] = 0x02; + data[1] = 0x00; + rsi_ble_set_local_att_value(rsi_ble_att2_val_hndl, RSI_BLE_MAX_DATA_LEN, data); + } break; + + case RSI_BLE_WLAN_DISCONNECT_STATUS: { + rsi_ble_app_clear_event(RSI_BLE_WLAN_DISCONNECT_STATUS); + memset(data, 0, RSI_BLE_MAX_DATA_LEN); + data[0] = 0x01; + rsi_ble_set_local_att_value(rsi_ble_att2_val_hndl, RSI_BLE_MAX_DATA_LEN, data); + } break; + + case RSI_SSID: { + rsi_ble_app_clear_event(RSI_SSID); + } break; + + case RSI_SECTYPE: { + rsi_ble_app_clear_event(RSI_SECTYPE); + if (sec_type == 0) { + wifi_app_set_event(WIFI_APP_JOIN_STATE); + } + } break; + + // Scan results from device (response to '3' command) + case RSI_BLE_WLAN_SCAN_RESP: //Send the SSID data to mobile ble application WYZBEE CONFIGURATOR + { + rsi_ble_app_clear_event(RSI_BLE_WLAN_SCAN_RESP); // clear the served event + + memset(data, 0, RSI_BLE_MAX_DATA_LEN); + data[0] = 0x03; + data[1] = scanresult->scan_count; + rsi_ble_set_local_att_value(rsi_ble_att2_val_hndl, RSI_BLE_MAX_DATA_LEN, data); + + for (scan_ix = 0; scan_ix < scanresult->scan_count; scan_ix++) { + memset(data, 0, RSI_BLE_MAX_DATA_LEN); + data[0] = scanresult->scan_info[scan_ix].security_mode; + data[1] = ','; + strcpy((char *)data + 2, (const char *)scanresult->scan_info[scan_ix].ssid); + length = strlen((char *)data + 2); + length = length + 2; + + rsi_ble_set_local_att_value(rsi_ble_att3_val_hndl, RSI_BLE_MAX_DATA_LEN, data); + osDelay(10); + } + + LOG_PRINT("Displayed scan list in Silabs app\n\n"); + } break; + + // WLAN connection response status (response to '2' command) + case RSI_BLE_WLAN_JOIN_STATUS: //Send the connected status to mobile ble application WYZBEE CONFIGURATOR + { + sl_mac_address_t mac_addr = { 0 }; + + sl_ip_address_t ip = { 0 }; + ip.type = client_profile.ip.type; + ip.ip.v4.value = client_profile.ip.ip.v4.ip_address.value; + + // clear the served event + rsi_ble_app_clear_event(RSI_BLE_WLAN_JOIN_STATUS); + + memset(data, 0, RSI_BLE_MAX_DATA_LEN); + data[0] = 0x02; + data[1] = 0x01; + data[2] = ','; + + // Copy the MAC address + status = sl_wifi_get_mac_address(SL_WIFI_CLIENT_INTERFACE, &mac_addr); + if (status == SL_STATUS_OK) { + for (k = 0; k < 6; k++) { + data[k + 3] = mac_addr.octet[k]; + } + } else { + k = 6; + } + data[k + 3] = ','; + + // IP Address + for (int i = 0; k < 10; k++, i++) { + data[k + 4] = ip.ip.v4.bytes[i]; + } + + rsi_ble_set_local_att_value(rsi_ble_att2_val_hndl, + RSI_BLE_MAX_DATA_LEN, + data); // set the local attribute value. + // LOG_PRINT("AP joined successfully\n\n"); + + status = rsi_ble_conn_params_update(conn_event_to_app.dev_addr, + CONN_INTERVAL_MIN, + CONN_INTERVAL_MAX, + CONN_LATENCY, + SUPERVISION_TIMEOUT); + if (status != RSI_SUCCESS) { + LOG_PRINT("\r\nconn params update cmd failed with status " + "= %lx \r\n", + status); + } + + } break; + case RSI_BLE_MTU_EVENT: { + //! clear the served event + rsi_ble_app_clear_event(RSI_BLE_MTU_EVENT); + //! event invokes when write/notification events received + } break; + case RSI_BLE_CONN_UPDATE_EVENT: { + rsi_ble_app_clear_event(RSI_BLE_CONN_UPDATE_EVENT); + + } break; + case RSI_BLE_RECEIVE_REMOTE_FEATURES: { + //! clear the served event + rsi_ble_app_clear_event(RSI_BLE_RECEIVE_REMOTE_FEATURES); + + if (remote_dev_feature.remote_features[0] & 0x20) { + status = rsi_ble_set_data_len(conn_event_to_app.dev_addr, TX_LEN, TX_TIME); + if (status != RSI_SUCCESS) { + LOG_PRINT("\n set data length cmd failed with error code = " + "%lx \n", + status); + rsi_ble_app_set_event(RSI_BLE_RECEIVE_REMOTE_FEATURES); + } + } + + } break; + case RSI_BLE_DATA_LENGTH_CHANGE: { + //! clear the served event + rsi_ble_app_clear_event(RSI_BLE_DATA_LENGTH_CHANGE); + } break; + default: + break; + } + } + + free(scanresult); +} + +/*==============================================*/ +/** + * @fn wifi_app_send_to_ble + * @brief this function is used to send data to ble app. + * @param[in] msg_type, it indicates write/notification event id. + * @param[in] data, raw data pointer. + * @param[in] data_len, raw data length. + * @return none. + * @section description + */ +void wifi_app_send_to_ble(uint16_t msg_type, uint8_t *data, uint16_t data_len) +{ + switch (msg_type) { + case WIFI_APP_SCAN_RESP: + memset(scanresult, 0, data_len); + memcpy(scanresult, (sl_wifi_scan_result_t *)data, data_len); + + rsi_ble_app_set_event(RSI_BLE_WLAN_SCAN_RESP); + break; + case WIFI_APP_CONNECTION_STATUS: + rsi_ble_app_set_event(RSI_BLE_WLAN_JOIN_STATUS); + break; + case WIFI_APP_DISCONNECTION_STATUS: + rsi_ble_app_set_event(RSI_BLE_WLAN_DISCONNECT_STATUS); + break; + case WIFI_APP_DISCONNECTION_NOTIFY: + rsi_ble_app_set_event(RSI_BLE_WLAN_DISCONN_NOTIFY); + break; + case WIFI_APP_TIMEOUT_NOTIFY: + rsi_ble_app_set_event(RSI_BLE_WLAN_TIMEOUT_NOTIFY); + break; + default: + break; + } +} diff --git a/examples/si91x_soc/siwx917_dev_kit/ble_config.h b/examples/si91x_soc/siwx917_dev_kit/ble_config.h new file mode 100644 index 000000000..1c2707c20 --- /dev/null +++ b/examples/si91x_soc/siwx917_dev_kit/ble_config.h @@ -0,0 +1,196 @@ +/******************************************************************************* +* @file ble_config.h +* @brief +******************************************************************************* +* # License +* Copyright 2023 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* The licensor of this software is Silicon Laboratories Inc. Your use of this +* software is governed by the terms of Silicon Labs Master Software License +* Agreement (MSLA) available at +* www.silabs.com/about-us/legal/master-software-license-agreement. This +* software is distributed to you in Source Code format and is governed by the +* sections of the MSLA applicable to Source Code. +* +******************************************************************************/ +/** + * @file ble_config.h + * @version 0.1 + * @date 03 Sep 2015 + * + * + * + * @brief : This file contain definitions and declarations of BLE APIs. + * + * @section Description This file contains definitions and declarations required to + * configure BLE module. + * + * + */ + +#ifndef BLE_CONFIG_H +#define BLE_CONFIG_H + +/****************************************************** + * * Macros + * ******************************************************/ + +//! Power Save Profile type +#define PSP_TYPE RSI_MAX_PSP +#define PSP_MODE RSI_SLEEP_MODE_2 + +#define RSI_BLE_SET_RAND_ADDR "00:23:A7:12:34:56" + +#define CLEAR_ACCEPTLIST 0x00 +#define ADD_DEVICE_TO_ACCEPTLIST 0x01 +#define DELETE_DEVICE_FROM_ACCEPTLIST 0x02 + +#define ALL_PHYS 0x00 + +#define RSI_BLE_DEV_ADDR_RESOLUTION_ENABLE 0 + +#ifdef RSI_HOMEKIT_APP +#define RSI_BLE_HOMEKIT_ENABLE 1 +#else +#define RSI_BLE_HOMEKIT_ENABLE 0 +#endif +#define RSI_BLE_MAX_NBR_ATT_REC 20 //80 +#define RSI_BLE_MAX_NBR_ATT_SERV 10 + +#define RSI_BLE_MAX_NBR_PERIPHERALS 1 +#define RSI_BLE_MAX_NBR_CENTRALS 1 +#define RSI_BLE_GATT_ASYNC_ENABLE 0 +#define RSI_BLE_GATT_INIT 0 + +/* Number of BLE notifications */ +#define RSI_BLE_NUM_CONN_EVENTS 0x4 + +/* Number of BLE GATT RECORD SIZE IN (n*16 BYTES), eg:(0x40*16)=1024 bytes */ +#define RSI_BLE_NUM_REC_BYTES 0x40 + +#define BLE_MTU_SIZE 232 + +//! Tx Datalength parameters +#define TX_LEN 0xFB +#define TX_TIME 0x0148 + +/*=======================================================================*/ +//! Advertising command parameters +/*=======================================================================*/ + +#define RSI_BLE_ADV_TYPE UNDIR_CONN +#define RSI_BLE_ADV_FILTER_TYPE ALLOW_SCAN_REQ_ANY_CONN_REQ_ANY +#define RSI_BLE_ADV_DIR_ADDR_TYPE LE_PUBLIC_ADDRESS +#define RSI_BLE_ADV_DIR_ADDR "00:15:83:6A:64:17" + +#ifdef RSI_HOMEKIT_APP +#define RSI_BLE_ADV_INT_MIN 0x20 +#define RSI_BLE_ADV_INT_MAX 0x20 +#else +#define RSI_BLE_ADV_INT_MIN 0x100 +#define RSI_BLE_ADV_INT_MAX 0x200 +#endif +#define RSI_BLE_ADV_CHANNEL_MAP 0x07 + +//!Advertise status +//! Start the advertising process +#define RSI_BLE_START_ADV 0x01 +//! Stop the advertising process +#define RSI_BLE_STOP_ADV 0x00 + +//! BLE Tx Power Index On Air +#define RSI_BLE_PWR_INX 30 + +//! BLE Active H/w Pwr Features +#define BLE_DISABLE_DUTY_CYCLING 0 +#define BLE_DUTY_CYCLING 1 +#define BLR_DUTY_CYCLING 2 +#define BLE_4X_PWR_SAVE_MODE 4 +#define RSI_BLE_PWR_SAVE_OPTIONS BLE_DISABLE_DUTY_CYCLING + +//!Advertise types + +/* Advertising will be visible(discoverable) to all the devices. + * Scanning/Connection is also accepted from all devices + * */ +#define UNDIR_CONN 0x80 + +/* Advertising will be visible(discoverable) to the particular device + * mentioned in RSI_BLE_ADV_DIR_ADDR only. + * Scanning and Connection will be accepted from that device only. + * */ +#define DIR_CONN 0x81 + +/* Advertising will be visible(discoverable) to all the devices. + * Scanning will be accepted from all the devices. + * Connection will be not be accepted from any device. + * */ +#define UNDIR_SCAN 0x82 + +/* Advertising will be visible(discoverable) to all the devices. + * Scanning and Connection will not be accepted from any device + * */ +#define UNDIR_NON_CONN 0x83 + +/* Advertising will be visible(discoverable) to the particular device + * mentioned in RSI_BLE_ADV_DIR_ADDR only. + * Scanning and Connection will be accepted from that device only. + * */ +#define DIR_CONN_LOW_DUTY_CYCLE 0x84 + +//!Advertising flags +#define LE_LIMITED_DISCOVERABLE 0x01 +#define LE_GENERAL_DISCOVERABLE 0x02 +#define LE_BR_EDR_NOT_SUPPORTED 0x04 + +//!Advertise filters +#define ALLOW_SCAN_REQ_ANY_CONN_REQ_ANY 0x00 +#define ALLOW_SCAN_REQ_ACCEPT_LIST_CONN_REQ_ANY 0x01 +#define ALLOW_SCAN_REQ_ANY_CONN_REQ_ACCEPT_LIST 0x02 +#define ALLOW_SCAN_REQ_ACCEPT_LIST_CONN_REQ_ACCEPT_LIST 0x03 + +//! Address types +#define LE_PUBLIC_ADDRESS 0x00 +#define LE_RANDOM_ADDRESS 0x01 +#define LE_RESOLVABLE_PUBLIC_ADDRESS 0x02 +#define LE_RESOLVABLE_RANDOM_ADDRESS 0x03 + +/*=======================================================================*/ + +/*=======================================================================*/ +//! Connection parameters +/*=======================================================================*/ +#define LE_SCAN_INTERVAL 0x0100 +#define LE_SCAN_WINDOW 0x0050 + +#define CONNECTION_INTERVAL_MIN 0x00A0 +#define CONNECTION_INTERVAL_MAX 0x00A0 + +#define CONNECTION_LATENCY 0x0000 +#define SUPERVISION_TIMEOUT 0x07D0 +/*=======================================================================*/ + +/*=======================================================================*/ +//! Scan command parameters +/*=======================================================================*/ + +#define RSI_BLE_SCAN_TYPE SCAN_TYPE_ACTIVE +#define RSI_BLE_SCAN_FILTER_TYPE SCAN_FILTER_TYPE_ALL + +//!Scan status +#define RSI_BLE_START_SCAN 0x01 +#define RSI_BLE_STOP_SCAN 0x00 + +//!Scan types +#define SCAN_TYPE_ACTIVE 0x01 +#define SCAN_TYPE_PASSIVE 0x00 + +//!Scan filters +#define SCAN_FILTER_TYPE_ALL 0x00 +#define SCAN_FILTER_TYPE_ONLY_ACCEPT_LIST 0x01 + +#define RSI_SEL_INTERNAL_ANTENNA 0x00 +#define RSI_SEL_EXTERNAL_ANTENNA 0x01 + +#endif \ No newline at end of file diff --git a/examples/si91x_soc/siwx917_dev_kit/readme.md b/examples/si91x_soc/siwx917_dev_kit/readme.md index b4a1796c8..c58d18ab4 100644 --- a/examples/si91x_soc/siwx917_dev_kit/readme.md +++ b/examples/si91x_soc/siwx917_dev_kit/readme.md @@ -14,9 +14,9 @@ This example collects and processes sensor data from the SiWG917 dev kit board, ## Purpose/Scope -The app starts in Wi-Fi access point (AP) mode. User can use their mobile device to connect to the SiWG917 dev kit's AP network and use the Simplicity Connect iOS/Android app to view the sensor data collected by the dev kit board. +The app starts in provisioning mode over BLE. User can use the Simplicity Connect iOS/Android app to scan for available Wi-Fi networks, select their desired network, enter the network credential, and then transmit the credential over a secure BLE connection. -Additionally, the app also runs a local webserver that enables provisioning of the SiWG917 device onto a Wi-Fi network. User can access the webserver via a browser, scan for available networks, select their desired network and enter the network credential. Once provisioned, the app then proceeds to bring down the AP and switches to Wi-Fi Station mode. The app connects to the selected network and brings up the sensor webserver. Users can then use their browser to view the sensor data collected by the dev kit board. +Once provisioned, the app then connects to the selected network and brings up the sensor webserver. Users can then use their the Simplicity Connect iOS/Android app to view the sensor data collected by the dev kit board. All device activities can be observed on the serial terminal prints. You may use a readily available terminal program such as [Tera Term](https://teratermproject.github.io/index-en.html) or [PuTTY](https://www.putty.org/). @@ -37,6 +37,7 @@ All device activities can be observed on the serial terminal prints. You may use - [Simplicity Studio](https://www.silabs.com/developers/simplicity-studio) - Silicon Labs [Simplicity Connect App (formerly EFR Connect App)](https://www.silabs.com/developers/simplicity-connect-mobile-app?tab=downloads), the app can be downloaded from Google Play store/Apple App store. + > IMPORTANT: This example requires Simplicity Connect version 2.9.3 or later. ### Setup Diagram @@ -64,59 +65,40 @@ All device activities can be observed on the serial terminal prints. You may use ## Run the Application -### Viewing Sensor Data - -![Viewing Sensor Data Connections](resources/readme/viewing-sensor-data-connections.png) - -**Step 1** : The SiWG917 device starts in AP mode. All device activities can be observed on the serial terminal prints. +**Step 1** : The SiWG917 device starts in provisioning mode. All device activities can be observed on the serial terminal prints. ![Startup Prints](resources/readme/startup-prints.png) -**Step 2** : Connect your mobile device to the SiWG917 device's AP. The default network name and password are `MY_AP_SSID` and `MY_AP_PASSPHRASE`, respectively. - -**Step 3** : Launch the Simplicity Connect app and select the `Wi-Fi Sensors` demo. +**Step 2** : Launch the Simplicity Connect app and select the `Wi-Fi Sensors` demo. ![Wi-Fi Sensors Demo](resources/readme/wifi-sensors-demo.png) -**Step 4** : Select one of the options to view sensor data. +**Step 3** : The Simplicity Connect app starts scanning for the `WIFI_SENSOR` device on BLE. Select the `WIFI_SENSOR` device on the Simplicity Connect app. -![Wi-Fi Sensors Data](resources/readme/wifi-sensors-data.png) - -![Temperature](resources/readme/temperature.png) +![Startup Prints](resources/readme/wifi-sensor-device-selection.png) -**Step 5** : Select `LED` to control the LED on the dev kit board. - -![LED Selection](resources/readme/led-selection.png) - -**Step 6** : Select a color and observe the LED on the dev kit changes color. You can also switch the LED on/off. - -![LED Control](resources/readme/led-control.png) +**Step 4** : Select your desired network, enter password, and then click `Ok`. The Simplicity Connect app then transmits the network credential securely over BLE connection. -### Connecting to a Wi-Fi Network - -![Connecting to a Network Connections](resources/readme/connecting-to-a-network-connections.png) - -**Step 1** : Make sure that your mobile device is connected to the SiWG917 dev kit's AP network. +![Selecting a Network](resources/readme/selecting-a-network.png) -**Step 2** : Enter `192.168.10.10` on your browser to open the provisioning webpage. +![Entering password](resources/readme/entering-password.png) -![Provisioning Webpage](resources/readme/provisioning-webpage.png) +**Step 5** : The SiWG917 dev kit switches to Wi-Fi Station mode and connects to the selected Wi-Fi network. The Simplicity Connect app then connects to the sensor webserver running on the dev kit board. Wait until connection is established. -**Step 3** : Click `Scan` to scan for available networks. +![Connected Prints](resources/readme/connected-prints.png) -![Scan](resources/readme/scan.png) +![Connecting to webserver](resources/readme/connecting-to-webserver.png) -**Step 4** : Select your desired network, enter password, and then click `Connect`. +**Step 6** : Select one of the options to view sensor data. -![Selecting a Network](resources/readme/selecting-a-network.png) +![Wi-Fi Sensors Data](resources/readme/wifi-sensors-data.png) -**Step 5** : The SiWG917 dev kit switches to Wi-Fi Station mode and connects to the selected Wi-Fi network. +![Temperature](resources/readme/temperature.png) -![Connected Prints](resources/readme/connected-prints.png) +**Step 7** : Select `LED` to control the LED on the dev kit board. -**Step 6** : Connect your mobile device to the same Wi-Fi network that the SiWG917 is connected to. You can access the sensor webpage by entering -the device IP address in your browser. The device IP address can be found in the serial terminal prints. If it fails to connect, go back to step 1. +![LED Selection](resources/readme/led-selection.png) -**Step 7** : Click `Refresh` to load and view the latest sensor data +**Step 8** : Select a color and observe the LED on the dev kit changes color. You can also switch the LED on/off. -![Sensor Webpage](resources/readme/sensor-webpage.png) +![LED Control](resources/readme/led-control.png) diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/browser-ip-address.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/browser-ip-address.png deleted file mode 100644 index 74a268bdd..000000000 Binary files a/examples/si91x_soc/siwx917_dev_kit/resources/readme/browser-ip-address.png and /dev/null differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/connected-prints.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/connected-prints.png index 6b34b1551..cc07a7be2 100644 Binary files a/examples/si91x_soc/siwx917_dev_kit/resources/readme/connected-prints.png and b/examples/si91x_soc/siwx917_dev_kit/resources/readme/connected-prints.png differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/connecting-to-a-network-connections.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/connecting-to-a-network-connections.png deleted file mode 100644 index cb2ce1569..000000000 Binary files a/examples/si91x_soc/siwx917_dev_kit/resources/readme/connecting-to-a-network-connections.png and /dev/null differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/connecting-to-webserver.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/connecting-to-webserver.png new file mode 100644 index 000000000..03b3303f6 Binary files /dev/null and b/examples/si91x_soc/siwx917_dev_kit/resources/readme/connecting-to-webserver.png differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/entering-password.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/entering-password.png new file mode 100644 index 000000000..5b0b4c3c7 Binary files /dev/null and b/examples/si91x_soc/siwx917_dev_kit/resources/readme/entering-password.png differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/provisioning-webpage.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/provisioning-webpage.png deleted file mode 100644 index 418341925..000000000 Binary files a/examples/si91x_soc/siwx917_dev_kit/resources/readme/provisioning-webpage.png and /dev/null differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/scan.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/scan.png deleted file mode 100644 index fafcaf518..000000000 Binary files a/examples/si91x_soc/siwx917_dev_kit/resources/readme/scan.png and /dev/null differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/selecting-a-network.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/selecting-a-network.png index c32f14b92..19431300f 100644 Binary files a/examples/si91x_soc/siwx917_dev_kit/resources/readme/selecting-a-network.png and b/examples/si91x_soc/siwx917_dev_kit/resources/readme/selecting-a-network.png differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/sensor-webpage.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/sensor-webpage.png deleted file mode 100644 index 8002bcc2b..000000000 Binary files a/examples/si91x_soc/siwx917_dev_kit/resources/readme/sensor-webpage.png and /dev/null differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/startup-prints.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/startup-prints.png index 0e2048c94..8356fde74 100644 Binary files a/examples/si91x_soc/siwx917_dev_kit/resources/readme/startup-prints.png and b/examples/si91x_soc/siwx917_dev_kit/resources/readme/startup-prints.png differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/viewing-sensor-data-connections.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/viewing-sensor-data-connections.png deleted file mode 100644 index 818670403..000000000 Binary files a/examples/si91x_soc/siwx917_dev_kit/resources/readme/viewing-sensor-data-connections.png and /dev/null differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/readme/wifi-sensor-device-selection.png b/examples/si91x_soc/siwx917_dev_kit/resources/readme/wifi-sensor-device-selection.png new file mode 100644 index 000000000..247a5b7c0 Binary files /dev/null and b/examples/si91x_soc/siwx917_dev_kit/resources/readme/wifi-sensor-device-selection.png differ diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/sensor_webserver.h b/examples/si91x_soc/siwx917_dev_kit/resources/sensor_webserver.h deleted file mode 100644 index e028fe97a..000000000 --- a/examples/si91x_soc/siwx917_dev_kit/resources/sensor_webserver.h +++ /dev/null @@ -1,219 +0,0 @@ -const char sensor_webserver_content[] = - "\r\n" - "\r\n" - "\r\n" - "\r\n" - "\r\n" - "\r\nEmbedded Sensor Demo" - "\r\n" - "\r\n" - "\r\n" - "\r\n
" - "\r\n

Embedded Sensor Demo

" - "\r\n" - "\r\n
" - "\r\n" - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n " - "\r\n
SensorDataValueUnit
LEDRed------
Green------
Blue------
LightAmbient---Lux
White---Lux
TemperatureTemperature---°C
HumidityHumidity---%
AccelerometerX------
Y------
Z------
GyroscopeX------
Y------
Z------
MicrophoneSound Level---Decibel
" - "\r\n
" - "\r\n
" - "\r\n" - "\r\n" - "\r\n"; diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/sensor_webserver.html b/examples/si91x_soc/siwx917_dev_kit/resources/sensor_webserver.html deleted file mode 100644 index 4c85449b5..000000000 --- a/examples/si91x_soc/siwx917_dev_kit/resources/sensor_webserver.html +++ /dev/null @@ -1,218 +0,0 @@ - - - - - -Embedded Sensor Demo - - - -
-

Embedded Sensor Demo

- -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
SensorDataValueUnit
LEDRed------
Green------
Blue------
LightAmbient---Lux
White---Lux
TemperatureTemperature---°C
HumidityHumidity---%
AccelerometerX------
Y------
Z------
GyroscopeX------
Y------
Z------
MicrophoneSound Level---Decibel
-
-
- - - diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/wifi_provisioning.h b/examples/si91x_soc/siwx917_dev_kit/resources/wifi_provisioning.h deleted file mode 100644 index 49d246dab..000000000 --- a/examples/si91x_soc/siwx917_dev_kit/resources/wifi_provisioning.h +++ /dev/null @@ -1,179 +0,0 @@ -const char wifi_provisioning_content[] = - "\r\n" - "\r\n" - "\r\n" - "\r\n" - "\r\n" - "\r\nSilabs Wi-Fi Network Provisioning" - "\r\n" - "\r\n" - "\r\n" - "\r\n
" - "\r\n

Silabs Wi-Fi Network Provisioning

" - "\r\n" - "\r\n
" - "\r\n" - "\r\n " - "\r\n
" - "\r\n" - "\r\n" - "\r\n"; diff --git a/examples/si91x_soc/siwx917_dev_kit/resources/wifi_provisioning.html b/examples/si91x_soc/siwx917_dev_kit/resources/wifi_provisioning.html deleted file mode 100644 index f1e577d73..000000000 --- a/examples/si91x_soc/siwx917_dev_kit/resources/wifi_provisioning.html +++ /dev/null @@ -1,177 +0,0 @@ - - - - - -Silabs Wi-Fi Network Provisioning - - - -
-

Silabs Wi-Fi Network Provisioning

- -
- - -
- - - diff --git a/examples/si91x_soc/siwx917_dev_kit/sensor_app.c b/examples/si91x_soc/siwx917_dev_kit/sensor_app.c new file mode 100644 index 000000000..e5f119cf1 --- /dev/null +++ b/examples/si91x_soc/siwx917_dev_kit/sensor_app.c @@ -0,0 +1,626 @@ +/***************************************************************************/ /** + * @file + * @brief Embedded Sensor Demo + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#include "sl_net.h" +#include "app.h" +#include "errno.h" +#include "sl_utility.h" +#include "sl_wifi.h" +#include "sl_net_wifi_types.h" +#include "sl_si91x_socket_support.h" +#include "sl_si91x_socket_constants.h" +#include "sl_wifi_callback_framework.h" +#include "sl_si91x_socket.h" +#include "sl_net_si91x.h" +#include "login.h" +#include "provisioning.h" +#include "jsmn.h" +#include "sl_http_server.h" +#include "light_sensor.h" +#include "motion_sensor.h" +#include "humidity_sensor.h" +#include "rgb_led.h" +#include "stdbool.h" +#include "sl_sleeptimer.h" +/****************************************************** + * Macros + ******************************************************/ + +#define METHOD_BAD_REQUEST "400 Bad Request" +#define METHOD_NOT_ALLOWED "405 Not Allowed" +#define METHOD_INTERNAL_SERVER_ERROR "500 Internal Server Error" + +#define DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED \ + { \ + .response_code = SL_HTTP_RESPONSE_METHOD_NOT_ALLOWED, .content_type = SL_HTTP_CONTENT_TYPE_TEXT_HTML, \ + .headers = NULL, .header_count = 0, .data = (uint8_t *)METHOD_NOT_ALLOWED, \ + .current_data_length = sizeof(METHOD_NOT_ALLOWED) - 1, .expected_data_length = sizeof(METHOD_NOT_ALLOWED) - 1 \ + } + +#define HTTP_SERVER_PORT 80 + +// Server port number +#define SERVER_PORT 5000 + +#define SCAN_RESULT_BUFFER_SIZE (2000) + +#define ON "on" +#define OFF "off" +#define OPEN "Open" +#define WPA "WPA" +#define WPA2 "WPA2" +#define WPA3 "WPA3" +#define MIXED_MODE "Mixed Mode" +#define UNKNOWN "Unknown" +#define SSID "ssid" +#define SECURITY_TYPE "security_type" +#define PASSPHRASE "passphrase" + +#define LED_JSON_RESPONSE "{\"red\": \"%s\", \"green\": \"%s\", \"blue\": \"%s\"}" +#define TEMPERATURE_JSON_RESPONSE "{\"temperature_celcius\": \"%0.2f\"}" +#define LIGHT_JSON_RESPONSE "{\"ambient_light_lux\": \"%0.2f\", \"white_light_lux\": \"%0.2f\"}" +#define MOTION_SENSOR_JSON_RESPONSE "{\"x\": \"%0.2f\", \"y\": \"%0.2f\", \"z\": \"%0.2f\"}" +#define HUMIDITY_JSON_RESPONSE "{\"humidity_percentage\": \"%lu\"}" +#define MICROPHONE_JSON_RESPONSE "{\"microphone_decibel\": \"%lu\"}" +#define STATUS_LED_JSON_RESPONSE "{\"status_led\": \"%s\"}" + +#define PROVISIONING_LED_INTERVAL_MS (300) +#define CONNECTING_LED_INTERVAL_MS (2000) +#define CONNECTED_LED_INTERVAL_MS (2000) +#define ERROR_LED_INTERVAL_MS (150) +#define LED_ERROR_BLINK_COUNT (3) + +//! Enumeration for states in application +typedef enum { + PROVISIONING_INIT_STATE, + PROVISIONING_STATE, + CONNECTING_STATE, + CONNECTED_STATE, + DISCONNECTING_STATE, +} app_state_t; + +typedef enum { + STATUS_LED_OFF, + STATUS_LED_PROVISIONING, + STATUS_LED_CONNECTING, + STATUS_LED_CONNECTED, +} status_led_state_t; + +/****************************************************** + * Function Declarations + ******************************************************/ + +static sl_status_t default_handler(sl_http_server_t *handle, sl_http_server_request_t *req); +static sl_status_t provisioning_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); +static sl_status_t light_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); +static sl_status_t led_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); +static sl_status_t temperature_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); +static sl_status_t accelerometer_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); +static sl_status_t gyroscope_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); +static sl_status_t humidity_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); +static sl_status_t microphone_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); +static sl_status_t all_sensors_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); +static sl_status_t status_led_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req); + +/****************************************************** + * Variable Definitions + ******************************************************/ + +static const char *rgb_colours[] = { [0] = "red", [1] = "green", [2] = "blue" }; + +sl_http_server_t server_handle = { 0 }; +static app_state_t app_state = PROVISIONING_INIT_STATE; + +const sl_http_server_handler_t sensor_server_request_handlers[] = { + { .uri = "/provisioning", .handler = provisioning_request_handler }, + { .uri = "/light", .handler = light_request_handler }, + { .uri = "/led", .handler = led_request_handler }, + { .uri = "/temperature", .handler = temperature_request_handler }, + { .uri = "/accelerometer", .handler = accelerometer_request_handler }, + { .uri = "/gyroscope", .handler = gyroscope_request_handler }, + { .uri = "/humidity", .handler = humidity_request_handler }, + { .uri = "/microphone", .handler = microphone_request_handler }, + { .uri = "/all_sensors", .handler = all_sensors_request_handler }, + { .uri = "/status_led", .handler = status_led_request_handler } +}; + +static bool status_led_on = false; + +/****************************************************** + * Function Definitions + ******************************************************/ + +void sensors_init(void) +{ + // Init sensor when application starts + light_sensor_init(); + humidity_sensor_init(); + motion_sensor_init(); +} + +void sensor_app_init(void) +{ + sl_http_server_config_t server_config = { 0 }; + sl_status_t status; + + server_config.port = HTTP_SERVER_PORT; + server_config.default_handler = default_handler; + server_config.handlers_list = (sl_http_server_handler_t *)sensor_server_request_handlers; + server_config.handlers_count = sizeof(sensor_server_request_handlers) / sizeof(sl_http_server_handler_t); + + status = sl_http_server_init(&server_handle, &server_config); + if (status != SL_STATUS_OK) { + printf("HTTP server init failed:%lx\r\n", status); + return; + } + status = sl_http_server_start(&server_handle); + if (status != SL_STATUS_OK) { + printf("Server start fail:%lx\r\n", status); + return; + } + printf("Sensor HTTP server started\r\n"); + + printf("\r\nThe sensor demo is now connected to your Wi-Fi network\r\n"); +} + +static sl_status_t light_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) +{ + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + + printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); + + if (req->type == SL_HTTP_REQUEST_GET) { + char response_data[100] = { 0 }; + float ambient_light_lux = 0.0f; + float white_light_lux = 0.0f; + ambient_light_read(&ambient_light_lux); + white_light_read(&white_light_lux); + + snprintf(response_data, sizeof(response_data) - 1, LIGHT_JSON_RESPONSE, ambient_light_lux, white_light_lux); + http_response.response_code = SL_HTTP_RESPONSE_OK; + http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; + http_response.data = (uint8_t *)response_data; + http_response.current_data_length = strlen(response_data); + http_response.expected_data_length = http_response.current_data_length; + } + sl_http_server_send_response(handle, &http_response); + return SL_STATUS_OK; +} + +static sl_status_t led_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) +{ + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + char response_data[100] = { 0 }; + bool rgb_states[RGB_LED_MAX] = { false }; + + printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); + + switch (req->type) { + case SL_HTTP_REQUEST_POST: { + char received_data_buffer[200] = { 0 }; + sl_http_recv_req_data_t received_data = { 0 }; + jsmn_parser parser; + jsmntok_t tokens[10]; + bool rgb_found[RGB_LED_MAX] = { false }; + + if (status_led_on == true) { + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + sl_http_server_send_response(handle, &http_response); + return SL_STATUS_OK; + } + + received_data.request = req; + received_data.buffer = (uint8_t *)received_data_buffer; + received_data.buffer_length = sizeof(received_data_buffer) - 1; + sl_http_server_read_request_data(handle, &received_data); + + jsmn_init(&parser); + + memset(&tokens, 0, sizeof(tokens)); + jsmn_parse(&parser, received_data_buffer, req->request_data_length, tokens, sizeof(tokens) / sizeof(jsmntok_t)); + for (uint8_t a = 1; a < RGB_LED_MAX * 2 + 1; a += 2) { + if (tokens[a].type == JSMN_STRING) { + for (uint8_t b = 0; b < 3; b++) { + if (memcmp(&received_data_buffer[tokens[a].start], rgb_colours[b], tokens[a].end - tokens[a].start) == 0) { + if (tokens[a + 1].type == JSMN_STRING) { + if (memcmp(&received_data_buffer[tokens[a + 1].start], ON, tokens[a + 1].end - tokens[a + 1].start) + == 0) { + rgb_found[b] = true; + rgb_states[b] = true; + } else if (memcmp(&received_data_buffer[tokens[a + 1].start], + OFF, + tokens[a + 1].end - tokens[a + 1].start) + == 0) { + rgb_found[b] = true; + rgb_states[b] = false; + } + } + } + } + } + } + if (rgb_found[RGB_LED_RED] == false || rgb_found[RGB_LED_GREEN] == false || rgb_found[RGB_LED_BLUE] == false) { + http_response.response_code = SL_HTTP_RESPONSE_BAD_REQUEST; + http_response.data = (uint8_t *)METHOD_BAD_REQUEST; + http_response.current_data_length = sizeof(METHOD_BAD_REQUEST) - 1; + http_response.expected_data_length = http_response.current_data_length; + break; + } else { + rgb_led_set_state(rgb_states[RGB_LED_RED], rgb_states[RGB_LED_GREEN], rgb_states[RGB_LED_BLUE]); + } + } // fall-through + // @suppress("No break at end of case") + case SL_HTTP_REQUEST_GET: { + rgb_led_get_state(&rgb_states[RGB_LED_RED], &rgb_states[RGB_LED_GREEN], &rgb_states[RGB_LED_BLUE]); + snprintf(response_data, + sizeof(response_data) - 1, + LED_JSON_RESPONSE, + (rgb_states[RGB_LED_RED] == true) ? ON : OFF, + (rgb_states[RGB_LED_GREEN] == true) ? ON : OFF, + (rgb_states[RGB_LED_BLUE] == true) ? ON : OFF); + http_response.response_code = SL_HTTP_RESPONSE_OK; + http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; + http_response.data = (uint8_t *)response_data; + http_response.current_data_length = strlen(response_data); + http_response.expected_data_length = http_response.current_data_length; + break; + } + default: + break; + } + sl_http_server_send_response(handle, &http_response); + return SL_STATUS_OK; +} + +static sl_status_t temperature_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) +{ + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + + printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); + + if (req->type == SL_HTTP_REQUEST_GET) { + char response_data[100] = { 0 }; + float temperature = 0.0f; + + temperature_read(&temperature); + + snprintf(response_data, sizeof(response_data) - 1, TEMPERATURE_JSON_RESPONSE, temperature); + http_response.response_code = SL_HTTP_RESPONSE_OK; + http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; + http_response.data = (uint8_t *)response_data; + http_response.current_data_length = strlen(response_data); + http_response.expected_data_length = http_response.current_data_length; + } + sl_http_server_send_response(handle, &http_response); + return SL_STATUS_OK; +} + +static sl_status_t accelerometer_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) +{ + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + + if (req->type == SL_HTTP_REQUEST_GET) { + char response_data[100] = { 0 }; + float x = 0.0f; + float y = 0.0f; + float z = 0.0f; + + printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); + + accelerometer_read(&x, &y, &z); + + snprintf(response_data, sizeof(response_data) - 1, MOTION_SENSOR_JSON_RESPONSE, x, y, z); + http_response.response_code = SL_HTTP_RESPONSE_OK; + http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; + http_response.data = (uint8_t *)response_data; + http_response.current_data_length = strlen(response_data); + http_response.expected_data_length = http_response.current_data_length; + } + sl_http_server_send_response(handle, &http_response); + return SL_STATUS_OK; +} + +static sl_status_t gyroscope_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) +{ + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + + printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); + + if (req->type == SL_HTTP_REQUEST_GET) { + char response_data[100] = { 0 }; + float x = 0.0f; + float y = 0.0f; + float z = 0.0f; + + gyro_read(&x, &y, &z); + + snprintf(response_data, sizeof(response_data) - 1, MOTION_SENSOR_JSON_RESPONSE, x, y, z); + http_response.response_code = SL_HTTP_RESPONSE_OK; + http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; + http_response.data = (uint8_t *)response_data; + http_response.current_data_length = strlen(response_data); + http_response.expected_data_length = http_response.current_data_length; + } + sl_http_server_send_response(handle, &http_response); + return SL_STATUS_OK; +} + +static sl_status_t humidity_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) +{ + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + + printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); + + if (req->type == SL_HTTP_REQUEST_GET) { + char response_data[100] = { 0 }; + uint32_t humidity = 0; + + humidity_read(&humidity); + + snprintf(response_data, sizeof(response_data) - 1, HUMIDITY_JSON_RESPONSE, humidity); + http_response.response_code = SL_HTTP_RESPONSE_OK; + http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; + http_response.data = (uint8_t *)response_data; + http_response.current_data_length = strlen(response_data); + http_response.expected_data_length = http_response.current_data_length; + } + sl_http_server_send_response(handle, &http_response); + return SL_STATUS_OK; +} + +static sl_status_t microphone_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) +{ + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + + printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); + + if (req->type == SL_HTTP_REQUEST_GET) { + char response_data[100] = { 0 }; + uint32_t microphone_decibel = 0; + + // TODO: add call to microphone read + + snprintf(response_data, sizeof(response_data) - 1, MICROPHONE_JSON_RESPONSE, microphone_decibel); + http_response.response_code = SL_HTTP_RESPONSE_OK; + http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; + http_response.data = (uint8_t *)response_data; + http_response.current_data_length = strlen(response_data); + http_response.expected_data_length = http_response.current_data_length; + } + sl_http_server_send_response(handle, &http_response); + return SL_STATUS_OK; +} + +static sl_status_t provisioning_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) +{ + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + + printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); + + if (req->type == SL_HTTP_REQUEST_POST) { + char response_data[100] = { 0 }; + + snprintf(response_data, sizeof(response_data) - 1, "{\"status\": \"ok\"}"); + http_response.response_code = SL_HTTP_RESPONSE_OK; + http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; + http_response.data = (uint8_t *)response_data; + http_response.current_data_length = strlen(response_data); + http_response.expected_data_length = http_response.current_data_length; + sl_http_server_send_response(handle, &http_response); + if (app_state == CONNECTED_STATE) { + app_state = DISCONNECTING_STATE; + } + } else { + sl_http_server_send_response(handle, &http_response); + } + return SL_STATUS_OK; +} + +static sl_status_t default_handler(sl_http_server_t *handle, sl_http_server_request_t *req) +{ + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + sl_http_header_t header = { .key = "Server", .value = "SI917-HTTPServer" }; + + UNUSED_PARAMETER(req); + + http_response.response_code = SL_HTTP_RESPONSE_NOT_FOUND; + http_response.content_type = SL_HTTP_CONTENT_TYPE_TEXT_PLAIN; + http_response.headers = &header; + http_response.header_count = 1; + + char *response_data = "404 Not Found"; + http_response.data = (uint8_t *)response_data; + http_response.current_data_length = strlen(response_data); + http_response.expected_data_length = http_response.current_data_length; + sl_http_server_send_response(handle, &http_response); + + return SL_STATUS_OK; +} + +static sl_status_t all_sensors_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) +{ + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + + if (req->type == SL_HTTP_REQUEST_GET) { + char response_data[1000] = { 0 }; + uint32_t remaining_buffer_length = sizeof(response_data) - 1; + char *current_response_data = response_data; + uint32_t index = 0; + bool red = false; + bool green = false; + bool blue = false; + float temperature = 0.0f; + float ambient_light_lux = 0.0f; + float white_light_lux = 0.0f; + float x = 0.0f; + float y = 0.0f; + float z = 0.0f; + uint32_t humidity = 0; + uint32_t microphone_decibel = 0; + + printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); + + rgb_led_get_state(&red, &green, &blue); + index = snprintf(current_response_data, + remaining_buffer_length, + "{\"led\": " LED_JSON_RESPONSE ",", + (red == true) ? ON : OFF, + (green == true) ? ON : OFF, + (blue == true) ? ON : OFF); + current_response_data += index; + remaining_buffer_length -= index; + + ambient_light_read(&ambient_light_lux); + white_light_read(&white_light_lux); + index = snprintf(current_response_data, + remaining_buffer_length, + "\"light\": " LIGHT_JSON_RESPONSE ",", + ambient_light_lux, + white_light_lux); + current_response_data += index; + remaining_buffer_length -= index; + + temperature_read(&temperature); + index = snprintf(current_response_data, + remaining_buffer_length, + "\"temperature\": " TEMPERATURE_JSON_RESPONSE ",", + temperature); + current_response_data += index; + remaining_buffer_length -= index; + + accelerometer_read(&x, &y, &z); + index = snprintf(current_response_data, + remaining_buffer_length, + "\"accelerometer\": " MOTION_SENSOR_JSON_RESPONSE ",", + x, + y, + z); + current_response_data += index; + remaining_buffer_length -= index; + + gyro_read(&x, &y, &z); + index = snprintf(current_response_data, + remaining_buffer_length, + "\"gyroscope\": " MOTION_SENSOR_JSON_RESPONSE ",", + x, + y, + z); + current_response_data += index; + remaining_buffer_length -= index; + + humidity_read(&humidity); + index = + snprintf(current_response_data, remaining_buffer_length, "\"humidity\": " HUMIDITY_JSON_RESPONSE ",", humidity); + current_response_data += index; + remaining_buffer_length -= index; + + // TODO: add call to microphone read + index = snprintf(current_response_data, + remaining_buffer_length, + "\"microphone\": " MICROPHONE_JSON_RESPONSE "}", + microphone_decibel); + current_response_data += index; + remaining_buffer_length -= index; + + http_response.response_code = SL_HTTP_RESPONSE_OK; + http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; + http_response.data = (uint8_t *)response_data; + http_response.current_data_length = strlen(response_data); + http_response.expected_data_length = http_response.current_data_length; + } + sl_http_server_send_response(handle, &http_response); + return SL_STATUS_OK; +} + +static sl_status_t status_led_request_handler(sl_http_server_t *handle, sl_http_server_request_t *req) +{ + sl_http_server_response_t http_response = DEFAULT_HTTP_RESPONSE_METHOD_NOT_ALLOWED; + char response_data[100] = { 0 }; + + printf("Got request %s with data length : %lu\r\n", req->uri.path, req->request_data_length); + + switch (req->type) { + case SL_HTTP_REQUEST_POST: { + char received_data_buffer[200] = { 0 }; + sl_http_recv_req_data_t received_data = { 0 }; + jsmn_parser parser; + jsmntok_t tokens[10]; + bool state_found = false; + // bool state = false; + + received_data.request = req; + received_data.buffer = (uint8_t *)received_data_buffer; + received_data.buffer_length = sizeof(received_data_buffer) - 1; + sl_http_server_read_request_data(handle, &received_data); + + jsmn_init(&parser); + + memset(&tokens, 0, sizeof(tokens)); + jsmn_parse(&parser, received_data_buffer, req->request_data_length, tokens, sizeof(tokens) / sizeof(jsmntok_t)); + if (tokens[1].type == JSMN_STRING) { + if (memcmp(&received_data_buffer[tokens[1].start], "status_led", tokens[1].end - tokens[1].start) == 0) { + if (tokens[2].type == JSMN_STRING) { + if (memcmp(&received_data_buffer[tokens[2].start], ON, tokens[2].end - tokens[2].start) == 0) { + state_found = true; + // state = true; + } else if (memcmp(&received_data_buffer[tokens[2].start], OFF, tokens[2].end - tokens[2].start) == 0) { + state_found = true; + // state = false; + } + } + } + } + if (state_found == false) { + http_response.response_code = SL_HTTP_RESPONSE_BAD_REQUEST; + http_response.data = (uint8_t *)METHOD_BAD_REQUEST; + http_response.current_data_length = sizeof(METHOD_BAD_REQUEST) - 1; + http_response.expected_data_length = http_response.current_data_length; + break; + } else { + // status_led_set_state(state); + // status_led_update_state(); + } + } // fall-through + // @suppress("No break at end of case") + case SL_HTTP_REQUEST_GET: { + snprintf(response_data, sizeof(response_data) - 1, STATUS_LED_JSON_RESPONSE, (status_led_on == true) ? ON : OFF); + http_response.response_code = SL_HTTP_RESPONSE_OK; + http_response.content_type = SL_HTTP_CONTENT_TYPE_APPLICATION_JSON; + http_response.data = (uint8_t *)response_data; + http_response.current_data_length = strlen(response_data); + http_response.expected_data_length = http_response.current_data_length; + break; + } + default: + break; + } + sl_http_server_send_response(handle, &http_response); + return SL_STATUS_OK; +} diff --git a/examples/si91x_soc/siwx917_dev_kit/sensor_app.h b/examples/si91x_soc/siwx917_dev_kit/sensor_app.h new file mode 100644 index 000000000..26f67afd0 --- /dev/null +++ b/examples/si91x_soc/siwx917_dev_kit/sensor_app.h @@ -0,0 +1,31 @@ +/***************************************************************************/ /** + * @file app.h + * @brief Top level application functions + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef SENSOR_APP_H +#define SENSOR_APP_H + +/***************************************************************************/ /** + * Initialize application. + ******************************************************************************/ +void sensors_init(void); + +void sensor_app_init(void); + +#include +#include + +#endif // SENSOR_APP_H diff --git a/examples/si91x_soc/siwx917_dev_kit/siwx917_dev_kit.slcp b/examples/si91x_soc/siwx917_dev_kit/siwx917_dev_kit.slcp index a0848fd6a..5c0b81233 100644 --- a/examples/si91x_soc/siwx917_dev_kit/siwx917_dev_kit.slcp +++ b/examples/si91x_soc/siwx917_dev_kit/siwx917_dev_kit.slcp @@ -14,39 +14,33 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c + - path: ble_app.c + - path: wifi_app.c + - path: sensor_app.c - path: main.c - path: sensors/humidity_sensor.c - path: sensors/light_sensor.c - path: sensors/motion_sensor.c - path: sensors/rgb_led.c include: - - path: resources - file_list: - - path: sensor_webserver.h - - path: resources - file_list: - - path: wifi_provisioning.h - path: . file_list: - - path: app.h + - path: app.h + - path: sensor_app.h + - path: ble_config.h + - path: wifi_config.h - path: sensors file_list: - - path: humidity_sensor.h - - path: sensors - file_list: - - path: light_sensor.h - - path: sensors - file_list: - - path: motion_sensor.h - - path: sensors - file_list: - - path: rgb_led.h + - path: humidity_sensor.h + - path: light_sensor.h + - path: motion_sensor.h + - path: rgb_led.h define: - name: SL_SI91X_PRINT_DBG_LOG - name: SLI_SI91X_ENABLE_IPV6 @@ -104,6 +98,8 @@ component: - green - blue from: wiseconnect3_sdk + - id: ble + from: wiseconnect3_sdk toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror @@ -119,21 +115,18 @@ configuration: readme: - path: readme.md other_file: - - path: resources/readme/browser-ip-address.png - path: resources/readme/connected-prints.png - - path: resources/readme/connecting-to-a-network-connections.png + - path: resources/readme/connecting-to-webserver.png - path: resources/readme/create-project.png - path: resources/readme/demo-run.png - path: resources/readme/embedded-sensor-demo-setup.png + - path: resources/readme/entering-password.png - path: resources/readme/led-control.png - path: resources/readme/led-selection.png - - path: resources/readme/provisioning-webpage.png - - path: resources/readme/scan.png - path: resources/readme/selecting-a-network.png - - path: resources/readme/sensor-webpage.png - path: resources/readme/startup-prints.png - path: resources/readme/temperature.png - - path: resources/readme/viewing-sensor-data-connections.png + - path: resources/readme/wifi-sensor-device-selection.png - path: resources/readme/wifi-sensors-data.png - path: resources/readme/wifi-sensors-demo.png diff --git a/examples/si91x_soc/siwx917_dev_kit/wifi_app.c b/examples/si91x_soc/siwx917_dev_kit/wifi_app.c new file mode 100644 index 000000000..c0a7aa7d0 --- /dev/null +++ b/examples/si91x_soc/siwx917_dev_kit/wifi_app.c @@ -0,0 +1,634 @@ +/******************************************************************************* + * @file wifi_app.c + * @brief + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ +/************************************************************************* + * + */ + +/*================================================================================ + * @brief : This file contains example application for Wlan Station BLE + * Provisioning + * @section Description : + * This application explains how to get the WLAN connection functionality using + * BLE provisioning. + * Silicon Labs Module starts advertising and with BLE Provisioning the Access Point + * details are fetched. + * Silicon Labs device is configured as a WiFi station and connects to an Access Point. + =================================================================================*/ + +/** + * Include files + * */ + +//! SL Wi-Fi SDK includes +#include "sl_wifi_callback_framework.h" +#include "sl_net_wifi_types.h" +#include "sl_si91x_driver.h" + +#include +#include + +#include "rsi_common_apis.h" +#include "rsi_bt_common_apis.h" + +#include "ble_config.h" +#include "wifi_config.h" + +//! LCD related include files +#include "sl_sleeptimer.h" +#include "sl_sleeptimer_config.h" +#include "app.h" +#include "RTE_Device_917.h" +#include "rsi_retention.h" +#include "sl_status.h" +#include "rsi_ccp_user_config.h" + +#include "em_assert.h" + +#include + +#include "sl_wifi.h" +#include "sl_net_dns.h" +#include "sl_net_ping.h" +#include "cmsis_os2.h" +#include "sensor_app.h" + +/****************************************************** + * Constants + ******************************************************/ + +#define WIFI_CLIENT_PROFILE_SSID "YOUR_INITIAL_AP_SSID" + +//MQTT related defines +#define WIFI_SCAN_TIMEOUT 10000 + +#define DHCP_HOST_NAME NULL + +/****************************************************** + * Function Declarations + ******************************************************/ + +void wifi_app_set_event(uint32_t event_num); +void wifi_app_clear_event(uint32_t event_num); +int32_t wifi_app_get_event(void); +sl_status_t join_callback_handler(sl_wifi_event_t event, char *result, uint32_t result_length, void *arg); +void rsi_wlan_app_callbacks_init(void); +sl_status_t wlan_app_scan_callback_handler(sl_wifi_event_t event, + sl_wifi_scan_result_t *result, + uint32_t result_length, + void *arg); +/* + ********************************************************************************************************* + * LOCAL GLOBAL VARIABLES + ********************************************************************************************************* + */ + +sl_wifi_scan_result_t *scan_result = NULL; +static volatile bool scan_complete = false; +static volatile sl_status_t callback_status = SL_STATUS_OK; +uint16_t scanbuf_size = (sizeof(sl_wifi_scan_result_t) + (SL_WIFI_MAX_SCANNED_AP * sizeof(scan_result->scan_info[0]))); + +sl_wifi_performance_profile_t wifi_profile = { .profile = ASSOCIATED_POWER_SAVE_LOW_LATENCY }; + +//MQTT related variables +uint8_t connected = 0, timeout = 0; +uint8_t disconnected = 0, disassociated = 0; +uint8_t a = 0; + +//MQTT disconnect flag +uint8_t mqtt_disconnect_flag = 0; + +sl_net_wifi_client_profile_t client_profile = { 0 }; + +static uint32_t wlan_app_event_map; + +uint8_t retry = 1; + +uint8_t yield; +uint8_t disconnect_flag = 0; +char *hostname = "www.silabs.com"; + +sl_mac_address_t mac_addr = { 0 }; +sl_ipv4_address_t *fetch_ip; +char msg[100]; + +char mac_id[18]; +char fw[32]; +char ip_add[32]; +sl_ip_address_t ip = { 0 }; + +// Application level WLAN reconnection attempt counter and retry limit +#define APP_RECONN_LOOP_CTR_LIM 3 +uint8_t app_reconn_loop_ctr = 0; + +typedef struct wlan_app_cb_s { + //! WLAN application state + volatile wifi_app_state_t state; + + //! length of buffer to copy + uint32_t length; + + //! application buffer + uint8_t buffer[RSI_APP_BUF_SIZE]; + + //! to check application buffer availability + uint8_t buf_in_use; + + //! application events bit map + uint32_t event_map; + +} wlan_app_cb_t; +wlan_app_cb_t wlan_app_cb; //! application control block + +/* + ********************************************************************************************************* + * DATA TYPES + ********************************************************************************************************* + */ +extern void wifi_app_send_to_ble(uint16_t msg_type, uint8_t *data, uint16_t data_len); +extern uint8_t coex_ssid[50], pwd[34], sec_type; + +uint8_t conn_status; +extern uint8_t magic_word; + +// WLAN include file for configuration +osSemaphoreId_t rsi_mqtt_sem; +extern osSemaphoreId_t wlan_thread_sem; + +static sl_net_wifi_client_profile_t wifi_client_profile = { + .config = { + .ssid.value = WIFI_CLIENT_PROFILE_SSID, + .ssid.length = sizeof(WIFI_CLIENT_PROFILE_SSID)-1, + .channel.channel = SL_WIFI_AUTO_CHANNEL, + .channel.band = SL_WIFI_AUTO_BAND, + .channel.bandwidth = SL_WIFI_AUTO_BANDWIDTH, + .bssid = {{0}}, + .bss_type = SL_WIFI_BSS_TYPE_INFRASTRUCTURE, + .security = SL_WIFI_WPA2, + .encryption = SL_WIFI_DEFAULT_ENCRYPTION, + .client_options = 0, + .credential_id = SL_NET_DEFAULT_WIFI_CLIENT_CREDENTIAL_ID, + }, + .ip = { + .mode = SL_IP_MANAGEMENT_DHCP, + .type = SL_IPV4, + .host_name = DHCP_HOST_NAME, + .ip = {{{0}}}, + + } +}; + +/*==============================================*/ +/** + * @fn wifi_app_set_event + * @brief sets the specific event. + * @param[in] event_num, specific event number. + * @return none. + * @section description + * This function is used to set/raise the specific event. + */ +void wifi_app_set_event(uint32_t event_num) +{ + wlan_app_event_map |= BIT(event_num); + + osSemaphoreRelease(wlan_thread_sem); + + return; +} + +/*==============================================*/ +/** + * @fn wifi_app_clear_event + * @brief clears the specific event. + * @param[in] event_num, specific event number. + * @return none. + * @section description + * This function is used to clear the specific event. + */ +void wifi_app_clear_event(uint32_t event_num) +{ + wlan_app_event_map &= ~BIT(event_num); + return; +} + +/*==============================================*/ +/** + * @fn wifi_app_get_event + * @brief returns the first set event based on priority + * @param[in] none. + * @return int32_t + * > 0 = event number + * -1 = not received any event + * @section description + * This function returns the highest priority event among all the set events + */ +int32_t wifi_app_get_event(void) +{ + uint32_t ix; + + for (ix = 0; ix < 32; ix++) { + if (wlan_app_event_map & (1 << ix)) { + return ix; + } + } + + return (-1); +} + +// rejoin failure call back handler in station mode +sl_status_t join_callback_handler(sl_wifi_event_t event, char *result, uint32_t result_length, void *arg) +{ + UNUSED_PARAMETER(event); + UNUSED_PARAMETER(result); + UNUSED_PARAMETER(result_length); + UNUSED_PARAMETER(arg); + + // Update WLAN application state + disconnected = 1; + connected = 0; + + wifi_app_set_event(WIFI_APP_DISCONNECTED_STATE); + + return SL_STATUS_OK; +} + +void rsi_wlan_app_callbacks_init(void) +{ + //! Initialize join fail call back + sl_wifi_set_join_callback(join_callback_handler, NULL); +} + +static sl_status_t show_scan_results() +{ + printf("%lu Scan results:\n", scan_result->scan_count); + + if (scan_result->scan_count) { + printf("\n %s %24s %s", "SSID", "SECURITY", "NETWORK"); + printf("%12s %12s %s\n", "BSSID", "CHANNEL", "RSSI"); + + for (int a = 0; a < (int)scan_result->scan_count; ++a) { + uint8_t *bssid = (uint8_t *)&scan_result->scan_info[a].bssid; + printf("%-24s %4u, %4u, ", + scan_result->scan_info[a].ssid, + scan_result->scan_info[a].security_mode, + scan_result->scan_info[a].network_type); + printf(" %02x:%02x:%02x:%02x:%02x:%02x, %4u, -%u\n", + bssid[0], + bssid[1], + bssid[2], + bssid[3], + bssid[4], + bssid[5], + scan_result->scan_info[a].rf_channel, + scan_result->scan_info[a].rssi_val); + } + } + + return SL_STATUS_OK; +} + +sl_status_t wlan_app_scan_callback_handler(sl_wifi_event_t event, + sl_wifi_scan_result_t *result, + uint32_t result_length, + void *arg) +{ + UNUSED_PARAMETER(result_length); + UNUSED_PARAMETER(arg); + + scan_complete = true; + + if (SL_WIFI_CHECK_IF_EVENT_FAILED(event)) { + callback_status = *(sl_status_t *)result; + return SL_STATUS_FAIL; + } + + memset(scan_result, 0, scanbuf_size); + memcpy(scan_result, result, scanbuf_size); + + if (result_length != 0) { + callback_status = show_scan_results(); + } + + return SL_STATUS_OK; +} + +sl_status_t network_event_handler(sl_net_event_t event, sl_status_t status, void *data, uint32_t data_length) +{ + UNUSED_PARAMETER(data_length); + switch (event) { + case SL_NET_PING_RESPONSE_EVENT: { + sl_si91x_ping_response_t *response = (sl_si91x_ping_response_t *)data; + UNUSED_VARIABLE(response); + if (status != SL_STATUS_OK) { + printf("\r\nPing request unsuccessful\r\n"); + return status; + } + printf("\r\nPing response from www.silabs.com \r\n"); + break; + } + default: + break; + } + + return SL_STATUS_OK; +} + +void wifi_app_task(void) +{ + int32_t status = RSI_SUCCESS; + int32_t event_id = 0; + + // Allocate memory for scan buffer + scan_result = (sl_wifi_scan_result_t *)malloc(scanbuf_size); + if (scan_result == NULL) { + LOG_PRINT("Failed to allocate memory for scan result\n"); + return; + } + memset(scan_result, 0, scanbuf_size); + while (1) { + // checking for events list + event_id = wifi_app_get_event(); + if (event_id == -1) { + osSemaphoreAcquire(wlan_thread_sem, osWaitForever); + + // if events are not received loop will be continued. + continue; + } + + switch (event_id) { + case WIFI_APP_INITIAL_STATE: { + wifi_app_clear_event(WIFI_APP_INITIAL_STATE); + + // Update WLAN application state + if (magic_word) { + wifi_app_set_event(WIFI_APP_FLASH_STATE); + } else { + wifi_app_set_event(WIFI_APP_SCAN_STATE); + } + } break; + + case WIFI_APP_UNCONNECTED_STATE: { + wifi_app_clear_event(WIFI_APP_UNCONNECTED_STATE); + + osSemaphoreRelease(wlan_thread_sem); + } break; + + case WIFI_APP_SCAN_STATE: { + wifi_app_clear_event(WIFI_APP_SCAN_STATE); + + sl_wifi_scan_configuration_t wifi_scan_configuration = { 0 }; + wifi_scan_configuration = default_wifi_scan_configuration; + + sl_wifi_set_scan_callback(wlan_app_scan_callback_handler, NULL); + + status = sl_wifi_start_scan(SL_WIFI_CLIENT_2_4GHZ_INTERFACE, NULL, &wifi_scan_configuration); + if (SL_STATUS_IN_PROGRESS == status) { + const uint32_t start = osKernelGetTickCount(); + + while (!scan_complete && (osKernelGetTickCount() - start) <= WIFI_SCAN_TIMEOUT) { + osThreadYield(); + } + status = scan_complete ? callback_status : SL_STATUS_TIMEOUT; + } + if (status != SL_STATUS_OK) { + LOG_PRINT("\r\nWLAN Scan Wait Failed, Error Code : 0x%lX\r\n", status); + osDelay(1000); + wifi_app_set_event(WIFI_APP_SCAN_STATE); + osDelay(1000); + } else { + // Update WLAN application state + wifi_app_send_to_ble(WIFI_APP_SCAN_RESP, (uint8_t *)scan_result, scanbuf_size); + } + } break; + + case WIFI_APP_JOIN_STATE: { + sl_wifi_credential_t cred = { 0 }; + + wifi_app_clear_event(WIFI_APP_JOIN_STATE); + + cred.type = SL_WIFI_PSK_CREDENTIAL; + memcpy(cred.psk.value, pwd, strlen((char *)pwd)); + + wifi_client_profile.config.ssid.length = strlen((char *)coex_ssid); + memcpy(wifi_client_profile.config.ssid.value, coex_ssid, wifi_client_profile.config.ssid.length); + wifi_client_profile.config.security = sec_type; + + // Set the custom Wi-Fi client profile + status = + sl_net_set_credential(wifi_client_profile.config.credential_id, SL_NET_WIFI_PSK, pwd, strlen((char *)pwd)); + if (status != SL_STATUS_OK) { + printf("\r\nFailed to set client credentials: 0x%lx\r\n", status); + continue; + } + + status = + sl_net_set_profile(SL_NET_WIFI_CLIENT_INTERFACE, SL_NET_DEFAULT_WIFI_CLIENT_PROFILE_ID, &wifi_client_profile); + if (SL_STATUS_OK == status) { + wifi_client_profile.config.ssid.length = strlen((char *)coex_ssid); + memcpy(wifi_client_profile.config.ssid.value, coex_ssid, wifi_client_profile.config.ssid.length); + wifi_client_profile.config.security = sec_type; + + // Enabling required MFP bits in join feature bitmap for WPA3 Personal mode security type + if (wifi_client_profile.config.security == SL_WIFI_WPA3) { + status = sl_si91x_set_join_configuration( + SL_WIFI_CLIENT_2_4GHZ_INTERFACE, + SL_SI91X_JOIN_FEAT_MFP_CAPABLE_REQUIRED | SL_SI91X_JOIN_FEAT_LISTEN_INTERVAL_VALID); + if (status != SL_STATUS_OK) { + printf("\r\n join configuration settings for WPA3 failed\r\n"); + } + } else if (wifi_client_profile.config.security == SL_WIFI_WPA3_TRANSITION) { + status = sl_si91x_set_join_configuration( + SL_WIFI_CLIENT_2_4GHZ_INTERFACE, + SL_SI91X_JOIN_FEAT_MFP_CAPABLE_ONLY | SL_SI91X_JOIN_FEAT_LISTEN_INTERVAL_VALID); + if (status != SL_STATUS_OK) { + printf("\r\n Join configuration settings for WPA3 failed\r\n"); + } + } else { + status = sl_si91x_set_join_configuration(SL_WIFI_CLIENT_2_4GHZ_INTERFACE, + SL_SI91X_JOIN_FEAT_LISTEN_INTERVAL_VALID); + if (status != SL_STATUS_OK) { + printf("\r\n Join configuration settings for WPA3 failed\r\n"); + } + } + + printf("\r\nSelected SSID:"); + for (int i = 0; i < wifi_client_profile.config.ssid.length; i++) { + printf("%c", wifi_client_profile.config.ssid.value[i]); + } + + do { + status = sl_net_up(SL_NET_WIFI_CLIENT_INTERFACE, SL_NET_DEFAULT_WIFI_CLIENT_PROFILE_ID); + app_reconn_loop_ctr++; + } while ((status != SL_STATUS_OK) && (app_reconn_loop_ctr < APP_RECONN_LOOP_CTR_LIM)); + app_reconn_loop_ctr = 0; + } + if (status != RSI_SUCCESS) { + timeout = 1; + wifi_app_send_to_ble(WIFI_APP_TIMEOUT_NOTIFY, (uint8_t *)&timeout, 1); + LOG_PRINT("\r\nWLAN Connect Failed, Error Code : 0x%lX\r\n", status); + osDelay(1000); + + // Update WLAN application state + disconnected = 1; + connected = 0; + } else { + + LOG_PRINT("\r\nWLAN connection successful\r\n"); + + // Update WLAN application state + wifi_app_set_event(WIFI_APP_CONNECTED_STATE); + } + + } break; + + case WIFI_APP_FLASH_STATE: { + wifi_app_clear_event(WIFI_APP_FLASH_STATE); + + if (retry) { + status = sl_net_up(SL_NET_WIFI_CLIENT_INTERFACE, SL_NET_DEFAULT_WIFI_CLIENT_PROFILE_ID); + if (status != RSI_SUCCESS) { + LOG_PRINT("\r\nWLAN connection failed, Error Code : 0x%lX\r\n", status); + break; + } else { + wifi_app_set_event(WIFI_APP_CONNECTED_STATE); + } + } + } break; + + case WIFI_APP_CONNECTED_STATE: { + wifi_app_clear_event(WIFI_APP_CONNECTED_STATE); + + // Configure IP + status = + sl_net_get_profile(SL_NET_WIFI_CLIENT_INTERFACE, SL_NET_DEFAULT_WIFI_CLIENT_PROFILE_ID, &client_profile); + ; + if (status != RSI_SUCCESS) { + a++; + if (a == 3) { + a = 0; + timeout = 1; + status = sl_net_deinit(SL_NET_WIFI_CLIENT_INTERFACE); + if (status == RSI_SUCCESS) { + connected = 0; + disassociated = 1; + wifi_app_send_to_ble(WIFI_APP_TIMEOUT_NOTIFY, (uint8_t *)&timeout, 1); + wifi_app_set_event(WIFI_APP_IDLE_STATE); + } + } + LOG_PRINT("\r\nIP configuration failed, Error Code : 0x%lX\r\n", status); + break; + } else { + a = 0; + connected = 1; + conn_status = 1; + disconnected = 0; + disassociated = 0; + + fetch_ip = &client_profile.ip.ip.v4.ip_address; + sprintf(ip_add, + "%d.%d.%d.%d", + fetch_ip->bytes[0], + fetch_ip->bytes[1], + fetch_ip->bytes[2], + fetch_ip->bytes[3]); + printf("\r\nIP Address:%s \r\n", ip_add); + osDelay(1000); + + // Update WLAN application state + wifi_app_send_to_ble(WIFI_APP_CONNECTION_STATUS, (uint8_t *)&connected, 1); + wifi_app_set_event(WIFI_APP_IPCONFIG_DONE_STATE); + osDelay(1000); + } + } break; + + case WIFI_APP_IPCONFIG_DONE_STATE: { + wifi_app_clear_event(WIFI_APP_IPCONFIG_DONE_STATE); + wlan_app_cb.state = WIFI_APP_IDLE_STATE; + + sl_wifi_get_mac_address(SL_WIFI_CLIENT_INTERFACE, &mac_addr); + sprintf(mac_id, + "%.02X:%.02X:%.02X:%.02X:%.02X:%.02X", + mac_addr.octet[0], + mac_addr.octet[1], + mac_addr.octet[2], + mac_addr.octet[3], + mac_addr.octet[4], + mac_addr.octet[5]); + printf("\r\nMAC Address:%s \r\n", mac_id); + osDelay(1000); + + //! initiating power save in BLE mode + status = rsi_bt_power_save_profile(PSP_MODE, PSP_TYPE); + if (status != RSI_SUCCESS) { + LOG_PRINT("\r\nFailed to initiate power save in BLE mode\r\n"); + } + // uint32_t rc = SL_STATUS_FAIL; + // sl_wifi_performance_profile_t performance_profile = { .profile = HIGH_PERFORMANCE, + // .listen_interval = 1000 }; + // + // rc = sl_wifi_set_performance_profile(&performance_profile); + // if (rc != SL_STATUS_OK) { + // printf("\r\nPower save configuration Failed, Error Code : 0x%lX\r\n", rc); + // } + + // printf("\r\nAssociated power save enabled\r\n"); + + sensor_app_init(); + + osDelay(1000); + wifi_app_set_event(WIFI_APP_IDLE_STATE); + } break; + + case WIFI_APP_IDLE_STATE: { + osDelay(1000); + } break; + + case WIFI_APP_DISCONNECTED_STATE: { + wifi_app_clear_event(WIFI_APP_DISCONNECTED_STATE); + retry = 1; + wifi_app_send_to_ble(WIFI_APP_DISCONNECTION_STATUS, (uint8_t *)&disconnected, 1); + wifi_app_set_event(WIFI_APP_FLASH_STATE); + } break; + + case WIFI_APP_DISCONN_NOTIFY_STATE: { + wifi_app_clear_event(WIFI_APP_DISCONN_NOTIFY_STATE); + status = sl_net_down(SL_NET_WIFI_CLIENT_INTERFACE); + + if (status == RSI_SUCCESS) { +#if RSI_WISE_MCU_ENABLE + rsi_flash_erase((uint32_t)FLASH_ADDR_TO_STORE_AP_DETAILS); +#endif + LOG_PRINT("\r\nWLAN disconnected\r\n"); + disassociated = 1; + connected = 0; + yield = 0; + disconnect_flag = 0; // reset flag to allow disconnecting again + + wifi_app_send_to_ble(WIFI_APP_DISCONNECTION_NOTIFY, (uint8_t *)&disassociated, 1); + wifi_app_set_event(WIFI_APP_UNCONNECTED_STATE); + } else { + LOG_PRINT("\r\nWi-Fi disconnect failed, Error Code : 0x%lX\r\n", status); + } + } break; + default: + break; + } + } + + if (scan_result != NULL) { + free(scan_result); + } +} diff --git a/examples/si91x_soc/siwx917_dev_kit/wifi_config.h b/examples/si91x_soc/siwx917_dev_kit/wifi_config.h new file mode 100644 index 000000000..ddf439983 --- /dev/null +++ b/examples/si91x_soc/siwx917_dev_kit/wifi_config.h @@ -0,0 +1,67 @@ +/******************************************************************************* +* @file wifi_config.h +* @brief +******************************************************************************* +* # License +* Copyright 2024 Silicon Laboratories Inc. www.silabs.com +******************************************************************************* +* +* The licensor of this software is Silicon Laboratories Inc. Your use of this +* software is governed by the terms of Silicon Labs Master Software License +* Agreement (MSLA) available at +* www.silabs.com/about-us/legal/master-software-license-agreement. This +* software is distributed to you in Source Code format and is governed by the +* sections of the MSLA applicable to Source Code. +* +******************************************************************************/ +/** + * @file wifi_config.h + * @version 0.1 + * + * @brief : This file contains user configurable details to configure the device + * + * @section Description This file contains user configurable details to configure the device + * + * + */ +#ifndef WIFI_CONFIG_H +#define WIFI_CONFIG_H + +#include "sl_net.h" + +#define RSI_APP_BUF_SIZE 1600 + +//! Enumeration for states in application +typedef enum wifi_app_state_e { + WIFI_APP_INITIAL_STATE = 0, + WIFI_APP_UNCONNECTED_STATE = 1, + WIFI_APP_CONNECTED_STATE = 2, + WIFI_APP_IPCONFIG_DONE_STATE = 3, + WIFI_APP_SOCKET_CONNECTED_STATE = 4, + WIFI_APP_SCAN_STATE = 5, + WIFI_APP_JOIN_STATE = 6, + + WIFI_APP_IDLE_STATE = 23, + BLE_GATT_WRITE_EVENT = 10, + WIFI_APP_DISCONNECTED_STATE = 11, + WIFI_APP_DISCONN_NOTIFY_STATE = 12, + WIFI_APP_AWS_SELECT_CONNECT_STATE = 13, + WIFI_APP_SLEEP_STATE = 14, + WIFI_APP_DATA_RECEIVE_STATE = 15, + WIFI_APP_SD_WRITE_STATE = 16, + WIFI_APP_DEMO_COMPLETE_STATE = 17, + WIFI_APP_FLASH_STATE = 22, +} wifi_app_state_t; + +typedef enum wifi_app_cmd_e { + WIFI_APP_DATA = 0, + WIFI_APP_SCAN_RESP = 1, + WIFI_APP_CONNECTION_STATUS = 2, + WIFI_APP_DISCONNECTION_STATUS = 3, + WIFI_APP_DISCONNECTION_NOTIFY = 4, + WIFI_APP_TIMEOUT_NOTIFY = 5 +} wifi_app_cmd_t; + +sl_status_t network_event_handler(sl_net_event_t event, sl_status_t status, void *data, uint32_t data_length); + +#endif diff --git a/examples/snippets/ble/ble_accept_list/ble_accept_list_ncp.slcp b/examples/snippets/ble/ble_accept_list/ble_accept_list_ncp.slcp index 4421469b6..81c0df5e2 100644 --- a/examples/snippets/ble/ble_accept_list/ble_accept_list_ncp.slcp +++ b/examples/snippets/ble/ble_accept_list/ble_accept_list_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_accept_list/ble_accept_list_psram.slcp b/examples/snippets/ble/ble_accept_list/ble_accept_list_psram.slcp index e249a2054..2afef0809 100644 --- a/examples/snippets/ble/ble_accept_list/ble_accept_list_psram.slcp +++ b/examples/snippets/ble/ble_accept_list/ble_accept_list_psram.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_accept_list/ble_accept_list_soc.slcp b/examples/snippets/ble/ble_accept_list/ble_accept_list_soc.slcp index 3841c4779..823ab178e 100644 --- a/examples/snippets/ble/ble_accept_list/ble_accept_list_soc.slcp +++ b/examples/snippets/ble/ble_accept_list/ble_accept_list_soc.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_ae_central/ble_ae_central_ncp.slcp b/examples/snippets/ble/ble_ae_central/ble_ae_central_ncp.slcp index 19d7840dc..47030b166 100644 --- a/examples/snippets/ble/ble_ae_central/ble_ae_central_ncp.slcp +++ b/examples/snippets/ble/ble_ae_central/ble_ae_central_ncp.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_ae_central/ble_ae_central_psram.slcp b/examples/snippets/ble/ble_ae_central/ble_ae_central_psram.slcp index 100141652..eaf7523c3 100644 --- a/examples/snippets/ble/ble_ae_central/ble_ae_central_psram.slcp +++ b/examples/snippets/ble/ble_ae_central/ble_ae_central_psram.slcp @@ -10,9 +10,9 @@ filter: value: ["BLE"] - name: "Project Difficulty" value: ["Advanced"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c @@ -58,6 +58,10 @@ component: from: wiseconnect3_sdk - id: sl_si91x_basic_buffers from: wiseconnect3_sdk +requires: + - name: device_needs_ram_execution + condition: + - si91x_common_flash toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/snippets/ble/ble_ae_central/ble_ae_central_soc.slcp b/examples/snippets/ble/ble_ae_central/ble_ae_central_soc.slcp index 2ecd8ef2c..0dcc3755a 100644 --- a/examples/snippets/ble/ble_ae_central/ble_ae_central_soc.slcp +++ b/examples/snippets/ble/ble_ae_central/ble_ae_central_soc.slcp @@ -10,9 +10,9 @@ filter: value: ["BLE"] - name: "Project Difficulty" value: ["Advanced"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_ae_central/ble_ae_central_uart_ncp.slcp b/examples/snippets/ble/ble_ae_central/ble_ae_central_uart_ncp.slcp index 0d7a4fbf3..67cdf1df9 100644 --- a/examples/snippets/ble/ble_ae_central/ble_ae_central_uart_ncp.slcp +++ b/examples/snippets/ble/ble_ae_central/ble_ae_central_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_ncp.slcp b/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_ncp.slcp index a9ba81f5c..40f4f7c6c 100644 --- a/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_ncp.slcp +++ b/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_ncp.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_psram.slcp b/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_psram.slcp index d816ac785..c4b108d8c 100644 --- a/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_psram.slcp +++ b/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_psram.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -62,6 +62,10 @@ component: from: wiseconnect3_sdk - id: sl_si91x_basic_buffers from: wiseconnect3_sdk +requires: + - name: device_needs_ram_execution + condition: + - si91x_common_flash toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_soc.slcp b/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_soc.slcp index 8acaace5c..b9b64b760 100644 --- a/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_soc.slcp +++ b/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_soc.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_uart_ncp.slcp b/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_uart_ncp.slcp index b85f2c497..f8c524769 100644 --- a/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_uart_ncp.slcp +++ b/examples/snippets/ble/ble_ae_peripheral/ble_ae_peripheral_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_central/ble_central_ncp.slcp b/examples/snippets/ble/ble_central/ble_central_ncp.slcp index 5ea3d5c3e..be5d09df1 100644 --- a/examples/snippets/ble/ble_central/ble_central_ncp.slcp +++ b/examples/snippets/ble/ble_central/ble_central_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_central/ble_central_psram.slcp b/examples/snippets/ble/ble_central/ble_central_psram.slcp index c02438613..a9a0ef459 100644 --- a/examples/snippets/ble/ble_central/ble_central_psram.slcp +++ b/examples/snippets/ble/ble_central/ble_central_psram.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_central/ble_central_soc.slcp b/examples/snippets/ble/ble_central/ble_central_soc.slcp index 696abcbd8..f943c47e7 100644 --- a/examples/snippets/ble/ble_central/ble_central_soc.slcp +++ b/examples/snippets/ble/ble_central/ble_central_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_datalength/ble_datalength_ncp.slcp b/examples/snippets/ble/ble_datalength/ble_datalength_ncp.slcp index 289d15c97..5f1f2b89c 100644 --- a/examples/snippets/ble/ble_datalength/ble_datalength_ncp.slcp +++ b/examples/snippets/ble/ble_datalength/ble_datalength_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_datalength/ble_datalength_psram.slcp b/examples/snippets/ble/ble_datalength/ble_datalength_psram.slcp index a398372d1..0ac3af4bb 100644 --- a/examples/snippets/ble/ble_datalength/ble_datalength_psram.slcp +++ b/examples/snippets/ble/ble_datalength/ble_datalength_psram.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_datalength/ble_datalength_soc.slcp b/examples/snippets/ble/ble_datalength/ble_datalength_soc.slcp index cc8ff3615..5126266d0 100644 --- a/examples/snippets/ble/ble_datalength/ble_datalength_soc.slcp +++ b/examples/snippets/ble/ble_datalength/ble_datalength_soc.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_ncp.slcp b/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_ncp.slcp index 3be64b0bb..6305203fd 100644 --- a/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_ncp.slcp +++ b/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_psram.slcp b/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_psram.slcp index f6a104828..7b8cdbc26 100644 --- a/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_psram.slcp +++ b/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_psram.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_soc.slcp b/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_soc.slcp index d8184fbc3..ee7e43803 100644 --- a/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_soc.slcp +++ b/examples/snippets/ble/ble_heart_rate_profile/ble_heart_rate_profile_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_ncp.slcp b/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_ncp.slcp index 7d0ff88ef..008d9790b 100644 --- a/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_ncp.slcp +++ b/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_psram.slcp b/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_psram.slcp index 8b6e93566..523df6ed9 100644 --- a/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_psram.slcp +++ b/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_psram.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_soc.slcp b/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_soc.slcp index a17f6c748..ca6fd65ed 100644 --- a/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_soc.slcp +++ b/examples/snippets/ble/ble_hid_on_gatt/ble_hid_on_gatt_soc.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_ibeacon/ble_ibeacon_ncp.slcp b/examples/snippets/ble/ble_ibeacon/ble_ibeacon_ncp.slcp index 6a76fe2f5..32688f024 100644 --- a/examples/snippets/ble/ble_ibeacon/ble_ibeacon_ncp.slcp +++ b/examples/snippets/ble/ble_ibeacon/ble_ibeacon_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_ibeacon/ble_ibeacon_psram.slcp b/examples/snippets/ble/ble_ibeacon/ble_ibeacon_psram.slcp index 9393847b0..d967f5300 100644 --- a/examples/snippets/ble/ble_ibeacon/ble_ibeacon_psram.slcp +++ b/examples/snippets/ble/ble_ibeacon/ble_ibeacon_psram.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_ibeacon/ble_ibeacon_soc.slcp b/examples/snippets/ble/ble_ibeacon/ble_ibeacon_soc.slcp index 2bb5095ca..4765ce38e 100644 --- a/examples/snippets/ble/ble_ibeacon/ble_ibeacon_soc.slcp +++ b/examples/snippets/ble/ble_ibeacon/ble_ibeacon_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_ncp.slcp b/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_ncp.slcp index 4a994b671..d01088dea 100644 --- a/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_ncp.slcp +++ b/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_psram.slcp b/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_psram.slcp index ab52d72e1..69d37deb0 100644 --- a/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_psram.slcp +++ b/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_psram.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_soc.slcp b/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_soc.slcp index bd8dead53..3c9c5a181 100644 --- a/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_soc.slcp +++ b/examples/snippets/ble/ble_longrange_2mbps/ble_longrange_2mbps_soc.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_ncp.slcp b/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_ncp.slcp index c20969fc0..ce104d59e 100644 --- a/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_ncp.slcp +++ b/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_ncp.slcp @@ -15,10 +15,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: ble_device_info.c - path: ble_main_task.c diff --git a/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_psram.slcp b/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_psram.slcp index 4a4960289..420003ee0 100644 --- a/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_psram.slcp +++ b/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_psram.slcp @@ -15,10 +15,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: ble_device_info.c - path: ble_main_task.c diff --git a/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_soc.slcp b/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_soc.slcp index 419a331a9..cafed0d54 100644 --- a/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_soc.slcp +++ b/examples/snippets/ble/ble_multiconnection_gatt_test/ble_multiconnection_gatt_test_soc.slcp @@ -15,10 +15,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: ble_device_info.c - path: ble_main_task.c diff --git a/examples/snippets/ble/ble_power_save/ble_power_save_ncp.slcp b/examples/snippets/ble/ble_power_save/ble_power_save_ncp.slcp index 5c922dd57..0eb8f46a2 100644 --- a/examples/snippets/ble/ble_power_save/ble_power_save_ncp.slcp +++ b/examples/snippets/ble/ble_power_save/ble_power_save_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_power_save/ble_power_save_psram.slcp b/examples/snippets/ble/ble_power_save/ble_power_save_psram.slcp index ff4fda501..cd380bb47 100644 --- a/examples/snippets/ble/ble_power_save/ble_power_save_psram.slcp +++ b/examples/snippets/ble/ble_power_save/ble_power_save_psram.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_power_save/ble_power_save_soc.slcp b/examples/snippets/ble/ble_power_save/ble_power_save_soc.slcp index e1ff3b190..9742caa23 100644 --- a/examples/snippets/ble/ble_power_save/ble_power_save_soc.slcp +++ b/examples/snippets/ble/ble_power_save/ble_power_save_soc.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_power_save/ble_power_save_uart_ncp.slcp b/examples/snippets/ble/ble_power_save/ble_power_save_uart_ncp.slcp index 1455d6d68..648f98c86 100644 --- a/examples/snippets/ble/ble_power_save/ble_power_save_uart_ncp.slcp +++ b/examples/snippets/ble/ble_power_save/ble_power_save_uart_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_privacy/ble_privacy_ncp.slcp b/examples/snippets/ble/ble_privacy/ble_privacy_ncp.slcp index 8ebebe5de..7097654b9 100644 --- a/examples/snippets/ble/ble_privacy/ble_privacy_ncp.slcp +++ b/examples/snippets/ble/ble_privacy/ble_privacy_ncp.slcp @@ -16,10 +16,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_privacy/ble_privacy_psram.slcp b/examples/snippets/ble/ble_privacy/ble_privacy_psram.slcp index 9b31b9b62..de6b4a707 100644 --- a/examples/snippets/ble/ble_privacy/ble_privacy_psram.slcp +++ b/examples/snippets/ble/ble_privacy/ble_privacy_psram.slcp @@ -16,10 +16,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_privacy/ble_privacy_soc.slcp b/examples/snippets/ble/ble_privacy/ble_privacy_soc.slcp index 8759cc2dd..1f27b8cb2 100644 --- a/examples/snippets/ble/ble_privacy/ble_privacy_soc.slcp +++ b/examples/snippets/ble/ble_privacy/ble_privacy_soc.slcp @@ -16,10 +16,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_secureconnection/ble_secureconnection_ncp.slcp b/examples/snippets/ble/ble_secureconnection/ble_secureconnection_ncp.slcp index f90447603..99497b44b 100644 --- a/examples/snippets/ble/ble_secureconnection/ble_secureconnection_ncp.slcp +++ b/examples/snippets/ble/ble_secureconnection/ble_secureconnection_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_secureconnection/ble_secureconnection_psram.slcp b/examples/snippets/ble/ble_secureconnection/ble_secureconnection_psram.slcp index 4698e7242..4c52982a0 100644 --- a/examples/snippets/ble/ble_secureconnection/ble_secureconnection_psram.slcp +++ b/examples/snippets/ble/ble_secureconnection/ble_secureconnection_psram.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_secureconnection/ble_secureconnection_soc.slcp b/examples/snippets/ble/ble_secureconnection/ble_secureconnection_soc.slcp index ac9dbe434..aeabcf020 100644 --- a/examples/snippets/ble/ble_secureconnection/ble_secureconnection_soc.slcp +++ b/examples/snippets/ble/ble_secureconnection/ble_secureconnection_soc.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_testmodes/ble_testmodes_ncp.slcp b/examples/snippets/ble/ble_testmodes/ble_testmodes_ncp.slcp index 2b8129b7d..d6296ce00 100644 --- a/examples/snippets/ble/ble_testmodes/ble_testmodes_ncp.slcp +++ b/examples/snippets/ble/ble_testmodes/ble_testmodes_ncp.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_testmodes/ble_testmodes_psram.slcp b/examples/snippets/ble/ble_testmodes/ble_testmodes_psram.slcp index 23e9dc15b..fb17dd434 100644 --- a/examples/snippets/ble/ble_testmodes/ble_testmodes_psram.slcp +++ b/examples/snippets/ble/ble_testmodes/ble_testmodes_psram.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -62,6 +62,10 @@ component: from: wiseconnect3_sdk - id: sl_si91x_basic_buffers from: wiseconnect3_sdk +requires: + - name: device_needs_ram_execution + condition: + - si91x_common_flash toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/snippets/ble/ble_testmodes/ble_testmodes_soc.slcp b/examples/snippets/ble/ble_testmodes/ble_testmodes_soc.slcp index 9e2801692..c8164ec58 100644 --- a/examples/snippets/ble/ble_testmodes/ble_testmodes_soc.slcp +++ b/examples/snippets/ble/ble_testmodes/ble_testmodes_soc.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_throughput_app/ble_throughput_app_ncp.slcp b/examples/snippets/ble/ble_throughput_app/ble_throughput_app_ncp.slcp index 353d179ff..5e16f3384 100644 --- a/examples/snippets/ble/ble_throughput_app/ble_throughput_app_ncp.slcp +++ b/examples/snippets/ble/ble_throughput_app/ble_throughput_app_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_throughput_app/ble_throughput_app_psram.slcp b/examples/snippets/ble/ble_throughput_app/ble_throughput_app_psram.slcp index 22f2b6faf..cfc1e1ca4 100644 --- a/examples/snippets/ble/ble_throughput_app/ble_throughput_app_psram.slcp +++ b/examples/snippets/ble/ble_throughput_app/ble_throughput_app_psram.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_throughput_app/ble_throughput_app_soc.slcp b/examples/snippets/ble/ble_throughput_app/ble_throughput_app_soc.slcp index dac4b22ac..3b41efef4 100644 --- a/examples/snippets/ble/ble_throughput_app/ble_throughput_app_soc.slcp +++ b/examples/snippets/ble/ble_throughput_app/ble_throughput_app_soc.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_throughput_app/ble_throughput_app_uart_ncp.slcp b/examples/snippets/ble/ble_throughput_app/ble_throughput_app_uart_ncp.slcp index 4f15d51a7..42c4a28ad 100644 --- a/examples/snippets/ble/ble_throughput_app/ble_throughput_app_uart_ncp.slcp +++ b/examples/snippets/ble/ble_throughput_app/ble_throughput_app_uart_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_ncp.slcp b/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_ncp.slcp index e52a888d2..413d8b55c 100644 --- a/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_ncp.slcp +++ b/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_ncp.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_psram.slcp b/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_psram.slcp index 81d6b2785..5fee02089 100644 --- a/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_psram.slcp +++ b/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_psram.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -90,6 +90,10 @@ component: from: wiseconnect3_sdk - id: sl_si91x_basic_buffers from: wiseconnect3_sdk +requires: + - name: device_needs_ram_execution + condition: + - si91x_common_flash toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_soc.slcp b/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_soc.slcp index 5952a62c8..5df0ac50b 100644 --- a/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_soc.slcp +++ b/examples/snippets/ble/ble_unified_ae_coex_app/ble_unified_ae_coex_app_soc.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_ncp.slcp b/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_ncp.slcp index cbffe25a5..b3b6cb5cd 100644 --- a/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_ncp.slcp +++ b/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_psram.slcp b/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_psram.slcp index 9ecfb7672..315e0dce6 100644 --- a/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_psram.slcp +++ b/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_psram.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_soc.slcp b/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_soc.slcp index 88cab1db1..3ec5120c3 100644 --- a/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_soc.slcp +++ b/examples/snippets/ble/ble_update_gain_table/ble_update_gain_table_soc.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/bt_stack_bypass/bt_stack_bypass.slcp b/examples/snippets/ble/bt_stack_bypass/bt_stack_bypass.slcp index 627a3f442..9998f9aa1 100644 --- a/examples/snippets/ble/bt_stack_bypass/bt_stack_bypass.slcp +++ b/examples/snippets/ble/bt_stack_bypass/bt_stack_bypass.slcp @@ -10,9 +10,9 @@ filter: value: ["BLE"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/gatt_long_read/gatt_long_read_ncp.slcp b/examples/snippets/ble/gatt_long_read/gatt_long_read_ncp.slcp index 70e50ca03..75429e892 100644 --- a/examples/snippets/ble/gatt_long_read/gatt_long_read_ncp.slcp +++ b/examples/snippets/ble/gatt_long_read/gatt_long_read_ncp.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/gatt_long_read/gatt_long_read_psram.slcp b/examples/snippets/ble/gatt_long_read/gatt_long_read_psram.slcp index 716b0e75f..2c865e4fd 100644 --- a/examples/snippets/ble/gatt_long_read/gatt_long_read_psram.slcp +++ b/examples/snippets/ble/gatt_long_read/gatt_long_read_psram.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/ble/gatt_long_read/gatt_long_read_soc.slcp b/examples/snippets/ble/gatt_long_read/gatt_long_read_soc.slcp index 5bbcd8bc1..d749939b5 100644 --- a/examples/snippets/ble/gatt_long_read/gatt_long_read_soc.slcp +++ b/examples/snippets/ble/gatt_long_read/gatt_long_read_soc.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/cli_demo/cli_demo_ncp.slcp b/examples/snippets/cli_demo/cli_demo_ncp.slcp index 252ddef34..721fe7e06 100644 --- a/examples/snippets/cli_demo/cli_demo_ncp.slcp +++ b/examples/snippets/cli_demo/cli_demo_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: demo.c - path: main.c diff --git a/examples/snippets/cli_demo/cli_demo_soc.slcp b/examples/snippets/cli_demo/cli_demo_soc.slcp index 28a29e505..792681e93 100644 --- a/examples/snippets/cli_demo/cli_demo_soc.slcp +++ b/examples/snippets/cli_demo/cli_demo_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: demo.c - path: main.c diff --git a/examples/snippets/cli_demo/cli_demo_uart_ncp.slcp b/examples/snippets/cli_demo/cli_demo_uart_ncp.slcp index ffe9fef6f..1b1cd9e68 100644 --- a/examples/snippets/cli_demo/cli_demo_uart_ncp.slcp +++ b/examples/snippets/cli_demo/cli_demo_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: demo.c - path: main.c diff --git a/examples/snippets/cli_demo/readme.md b/examples/snippets/cli_demo/readme.md index e4b33014a..26437b570 100644 --- a/examples/snippets/cli_demo/readme.md +++ b/examples/snippets/cli_demo/readme.md @@ -77,30 +77,36 @@ For details on the project folder structure, see the [WiSeConnect Examples](http The application can be configured to suit your requirements and development environment. -- The application uses the default configurations as provided in the **wifi_commands.c** and user can choose to configure these parameters as needed. +- The application uses the default configurations as provided in the **wifi_commands.c** and the user can choose to configure these parameters as needed. - User can enable or disable powersave related optimizations by setting the ENABLE_POWERSAVE_CLI macro in the **wifi_commands.c** file to 1 or 0 respectively + The user can enable or disable powersave related optimizations by setting the ENABLE_POWERSAVE_CLI macro in the **wifi_commands.c** file to 1 or 0 respectively. > **Note** : - The included Cloud connectivity certificates are for reference only, using default certificates in the release, cloud connection doesn't work. Please replace the default certificates with valid certificates while connecting to appropriate Cloud/OpenSSL Server. + +> - The default SSID is `MY_AP_SSID` and passphrase is `MY_AP_PASSPHRASE` in **wifi_commands.c** file. You may either use these or modify them. + +```c + #define SOFT_AP_SSID "MY_AP_SSID" + #define SOFT_AP_PSK "MY_AP_PASSPHRASE" +``` + +> - The included cloud connectivity certificates are for reference only. If using default certificates in the release, the cloud connection will not work. You must replace the default certificates with valid certificates while connecting to the appropriate Cloud/OpenSSL Server. ## Test the application Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: -- Build the application in Studio. -> -> Note: -> - The default SSID is "MY_AP_SSID" and passphrase is "MY_AP_PASSPHRASE". You may either use these or modify them as described in the [Application Build Environment](#application-build-environment) section. -- Flash, run and debug the application +- Build the application in Studio + +- Flash, run, and debug the application ![cli_demo_Output](resources/readme/build_output.png) Follow the steps below for successful execution of the application: -- The terminal screen displays lot of commands which can be added manually in Extension command in Serial debug assistant. +- The terminal screen displays several commands which can be added manually in the Extension command in the Serial debug assistant. - **Here are List of those commands:** + **Here are a list of those commands:** 1. HELP 2. wifi_init @@ -137,13 +143,13 @@ Follow the steps below for successful execution of the application: And so on... -### Below are the examples of the commands on how to enter those in the Serial Debug Assistant +### The following are examples of the commands and instructions for entering them in the Serial Debug Assistant: - **HELP COMMAND:-** **![Help_command](resources/readme/help.png)** -- After issuing the **help** command in serial Debug assistant it will display all the commands of the CLI demo on the Serial Debug screen as shown in the below image. +- After issuing the **help** command in the Serial Debug Assistant, it will display all the commands of the CLI demo on the Serial Debug screen as shown in the image below. **![Prints](resources/readme/prints.png)** @@ -153,7 +159,7 @@ And so on... **![Prints](resources/readme/empty_data.png)** -### **Below are the Commands to run the RF test example.** +### **The following are the commands to run the RF test example.** - **Transmit Test Commands for Wi-Fi** @@ -172,11 +178,11 @@ By default antenna type should be set to 0. e.g., wifi_transmit_test_start 127 0 100 1 1. -- For Wi-Fi 6 or 802.11ax mode RF test, issue the below command. +- For Wi-Fi 6 or 802.11ax mode RF test, issue the following command. 4. wifi_ax_transmit_test_start **power** **data rate** **length** **mode** **channel** **enable_11ax** **coding_type** **nominal_pe** **ul_dl** **he_ppdu_type** **beam_change** **bw** **stbc** **tx_bf** **gi_ltf** **dcm** **nsts_midamble** **spatial_reuse** **bss_color** **he_siga2_reserved** **ru_allocation** **n_heltf_tot** **sigb_dcm** **sigb_mcs** **user_sta_id** **user_idx** **sigb_compression_field** e.g., wifi_ax_transmit_test_start 127 0 100 1 1 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 1 1 1 1 1 1 1 - **power**: Set transmit power in dbm. Valid values are from 2dBm to 18dBm. + **power**: Set transmit power in dbm. Valid values are from 2 dBm to 18 dBm. **Note**: To configure the maximum power level for a particular frequency band, Set **power** = 127 @@ -195,8 +201,8 @@ Set **power** = 127 **Note**: **Burst Mode** -DUT transmits a burst of packets with the given power, rate, length in the channel configured. The burst size will be -determined by the **length** parameter, if it the **length** parameter is zero, then DUT keeps transmitting till +DUT transmits a burst of packets with the given power, rate, and length in the channel configured. The burst size will be +determined by the **length** parameter. If the **length** parameter is zero, then DUT keeps transmitting until stop API is called. **Continuous Mode**: @@ -213,7 +219,7 @@ of carrier leakage will be seen at Center Frequency. For example, for 2412 MHz the output will be seen at 2409.5 MHz. **Continuous Wave Mode (Non-Modulation) in Single Tone Mode (Center frequency +5 MHz)**: -The DUT transmits a spectrum that is generated at 5MHz from the center frequency of the channel selected. Some amount of +The DUT transmits a spectrum that is generated at 5 MHz from the center frequency of the channel selected. Some amount of carrier leakage will be seen at Center Frequency. For example, for 2412 MHz the output will be seen at 2417 MHz. @@ -277,37 +283,37 @@ By default antenna type should be set to 0. e.g., wifi_start_statistic_report -i client -c 1 -n 30 - To observe the receive stats for 'n' iterations (e.g. 20), the command can be given as follows: + To observe the receive stats for 'n' iterations (e.g., 20), the command can be given as follows: e.g., wifi_start_statistic_report -i client -c 1 -n 20 **WIFI INIT COMMAND:-** -- Click on the extension cmd and click on the Entered **wifi_init** command from the command console +- Click on the extension cmd and click on the Entered **wifi_init** command from the command console. **![Prints](resources/readme/wifi_init.png)** -- After issuing the **wifi_init** command from the command console, This is how the response is displayed on the screen. +- After issuing the **wifi_init** command from the command console, this is how the response is displayed on the screen. **![Prints](resources/readme/wifi_init_prints.png)** **WIFI SCAN COMMAND:-** -- After issuing the **wifi_scan** command in the command console, This is how the response is displayed on the screen. +- After issuing the **wifi_scan** command in the command console, this is how the response is displayed on the screen. **![Prints](resources/readme/scan_prints.png)** **WIFI CONNECT COMMAND:-** -- After issuing the **wifi_connect** command in the command console, This is how the response is displayed on the screen. +- After issuing the **wifi_connect** command in the command console, this is how the response is displayed on the screen. **![Prints](resources/readme/wifi_connect.png)** -- To connect to open mode networks, following command can be issued: wifi_connect -s open +- To connect to open mode networks, the following command can be issued: wifi_connect -s open **WIFI DEINIT COMMAND:-** -- After issuing the **wifi_deinit** command in command console, This is how the response is displayed on the screen. +- After issuing the **wifi_deinit** command in command console, this is how the response is displayed on the screen. **![Prints](resources/readme/deinit.png)** @@ -322,7 +328,7 @@ By default antenna type should be set to 0. Here the new command is: *cli_demo_new_cmd* The structure variable for the newly created command is *_cli_demo_new_cmd_command*. -2. The *_cli_demo_new_cmd_command* structure variable should be declared in the **console_commands/src/console_command_database.c** file with the following fields +2. The *_cli_demo_new_cmd_command* structure variable should be declared in the **console_commands/src/console_command_database.c** file with the following fields: **![cmdstructure](resources/readme/picture2.png)** @@ -338,7 +344,7 @@ The structure variable for the newly created command is *_cli_demo_new_cmd_comma - The function name can be anything, but the return type and argument must be as shown above. -**The string array for argument description of the command handler:-** +**The string array for argument description of the command handler:-** - In the above figure, *_cli_demo_new_cmd_arg_help* is the string array which needs to be defined. - We need to define a string array in **console_commands/src/console_command_database.c** file which briefly explains about the arguments in the command handler. The declaration is as shown below. @@ -349,22 +355,22 @@ We have given the description for all three strings as 0. **The list of data types of arguments of command handler:-** -- Refering to the *_cli_demo_new_cmd_command* structure variable image, { CONSOLE_OPTIONAL_ARG('s', CONSOLE_ARG_STRING ), CONSOLE_ARG_UINT, CONSOLE_ARG_INT, CONSOLE_ARG_END } } are the list of datatypes corresponding to the list of arguments. -- The data types CONSOLE_ARG_UINT corresponds to ‘uint’ , CONSOLE_ARG_INT corresponds to ‘int’ and CONSOLE_ARG_STRING corresponds to ‘string’. The list of arguments must end with CONSOLE_ARG_END. -- The arguments can be mandatory or optional. The mandatory arguments are given directly, but optional arguments are given using an expression, CONSOLE_OPTIONAL_ARG(‘character’, datatype) The ‘character’ is an alphabet which is user choice which can be used to give an optional argument in a cli command. The datatype can be anything mentioned above. -- In addition to standard data type arguments like uint, int, string, there can be enums which can also be passed as arguments to a command. The arguments we need to pass in a command depends on what APIs we call in a command handler. +- Referring to the *_cli_demo_new_cmd_command* structure variable image, { CONSOLE_OPTIONAL_ARG('s', CONSOLE_ARG_STRING ), CONSOLE_ARG_UINT, CONSOLE_ARG_INT, CONSOLE_ARG_END } } are the list of datatypes corresponding to the list of arguments. +- The data types CONSOLE_ARG_UINT corresponds to ‘uint’ , CONSOLE_ARG_INT corresponds to ‘int’, and CONSOLE_ARG_STRING corresponds to ‘string’. The list of arguments must end with CONSOLE_ARG_END. +- The arguments can be mandatory or optional. The mandatory arguments are given directly, but optional arguments are given using an expression, CONSOLE_OPTIONAL_ARG(‘character’, datatype). The ‘character’ is an alphabet which is the user's choice and can be used to give an optional argument in a cli command. The datatype can be anything mentioned above. +- In addition to standard data type arguments like uint, int, and string, there can be enums which can also be passed as arguments to a command. The arguments we need to pass in a command depend on what APIs we call in a command handler. - For some of the wifi APIs we call inside a command handler, we may need to use the argument values as specified in the *console_argument_values* variable defined in **console_commands/src/console_argument_types.c** file. For passing those values in a cli command, we need to look for the corresponding argument types defined in the same file. For example: -We may want to pass a data rate as *SL_WIFI_RATE_11B_1* enum value in a cli command, the corresponding uint32 array is mapped to *[CONSOLE_TYPE(data_rate)]*. We need to search for *data_rate_type* string array in the same file as shown below -The sring corresponding to *SL_WIFI_RATE_11B_1* is "1Mbps". So *1Mbps* should be passed as an argument in the cli command. -In the command handler, the arguments passed in the cli command are internally mapped to corresponding enum values and hence can be accessed directly using GET_COMMAND_ARG() or GET_OPTIONAL_COMMAND_ARG(). +We may want to pass a data rate as *SL_WIFI_RATE_11B_1* enum value in a cli command, the corresponding uint32 array is mapped to *[CONSOLE_TYPE(data_rate)]*. We need to search for *data_rate_type* string array in the same file as shown below: +The string corresponding to *SL_WIFI_RATE_11B_1* is "1Mbps". So *1Mbps* should be passed as an argument in the cli command. +In the command handler, the arguments passed in the cli command are internally mapped to corresponding enum values and can be accessed directly using GET_COMMAND_ARG() or GET_OPTIONAL_COMMAND_ARG(). **![cmdhandler](resources/readme/picture8.png)** **![cmdhandler](resources/readme/picture9.png)** **![cmdhandler](resources/readme/picture10.png)** - So, the overall changes we need to make in **console_commands/src/console_command_database.c** file is as shown below: **![cmdhandler](resources/readme/picture5.png)** -- So, the cli command that can be used with the above changes is *cli_demo_new_cmd -s Optional_String 1 2* +- So, the cli command that can be used with the above changes is *cli_demo_new_cmd -s Optional_String 1 2*. 3. The command handler should be defined in a relevant file as shown below. The arguments can be accessed directly or by using GET_COMMAND_ARG() or GET_OPTIONAL_COMMAND_ARG() as shown below. **![cmdhandler](resources/readme/picture6.png)** diff --git a/examples/snippets/cli_demo/wifi_commands.c b/examples/snippets/cli_demo/wifi_commands.c index 03e02512f..a4e198bd6 100644 --- a/examples/snippets/cli_demo/wifi_commands.c +++ b/examples/snippets/cli_demo/wifi_commands.c @@ -49,8 +49,8 @@ * Constants ******************************************************/ -#define SOFT_AP_PSK "123456789" -#define SOFT_AP_SSID "SILICON_LABS_AP" +#define SOFT_AP_PSK "MY_AP_PASSPHRASE" +#define SOFT_AP_SSID "MY_AP_SSID" #define WIFI_CONNECT_TIMEOUT 1000 #define WIFI_SCAN_TIMEOUT 10000 #define TWT_SCAN_TIMEOUT 10000 @@ -1128,7 +1128,8 @@ sl_status_t wifi_start_ap_command_handler(console_args_t *arguments) sl_status_t status; sl_wifi_ap_configuration_t ap_configuration = { 0 }; sl_wifi_credential_t cred = { 0 }; - char *ssid = GET_OPTIONAL_COMMAND_ARG(arguments, 0, default_wifi_ap_configuration.ssid.value, char *); + + char *ssid = GET_OPTIONAL_COMMAND_ARG(arguments, 0, SOFT_AP_SSID, char *); memcpy(ap_configuration.ssid.value, ssid, strlen(ssid)); ap_configuration.ssid.length = (uint8_t)strlen((char *)ap_configuration.ssid.value); diff --git a/examples/snippets/crypto/aes/aes.slcp b/examples/snippets/crypto/aes/aes.slcp index 905d5bea2..7b83306ab 100644 --- a/examples/snippets/crypto/aes/aes.slcp +++ b/examples/snippets/crypto/aes/aes.slcp @@ -10,9 +10,9 @@ filter: value: ["Wi-Fi"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/crypto/aes/readme.md b/examples/snippets/crypto/aes/readme.md index 6160e2ccc..87c009a73 100644 --- a/examples/snippets/crypto/aes/readme.md +++ b/examples/snippets/crypto/aes/readme.md @@ -22,6 +22,7 @@ This application demonstrates how to encrypt and decrypt the data using AES APIs - Windows PC - SoC Mode: - Silicon Labs [BRD4338A](https://www.silabs.com/) +- For the Wrap Key feature of this application to work, the keys should be programmed and secure boot (ta_secure_boot) should be enabled in the device ### Software Requirements diff --git a/examples/snippets/crypto/attestation/attestation.slcp b/examples/snippets/crypto/attestation/attestation.slcp index 01af8d420..950d6bd4c 100644 --- a/examples/snippets/crypto/attestation/attestation.slcp +++ b/examples/snippets/crypto/attestation/attestation.slcp @@ -6,10 +6,10 @@ description: | category: example|crypto package: platform quality: production -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/crypto/ecdh/ecdh.slcp b/examples/snippets/crypto/ecdh/ecdh.slcp index 0217e5791..26f43abe0 100644 --- a/examples/snippets/crypto/ecdh/ecdh.slcp +++ b/examples/snippets/crypto/ecdh/ecdh.slcp @@ -9,9 +9,9 @@ filter: value: ["Wi-Fi"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/crypto/ecdsa/ecdsa.slcp b/examples/snippets/crypto/ecdsa/ecdsa.slcp index 60e803f5e..70d36841b 100644 --- a/examples/snippets/crypto/ecdsa/ecdsa.slcp +++ b/examples/snippets/crypto/ecdsa/ecdsa.slcp @@ -9,9 +9,9 @@ filter: value: ["Wi-Fi"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/crypto/ecdsa/readme.md b/examples/snippets/crypto/ecdsa/readme.md index 9e5518fe2..377a5a447 100644 --- a/examples/snippets/crypto/ecdsa/readme.md +++ b/examples/snippets/crypto/ecdsa/readme.md @@ -17,13 +17,12 @@ This application explains how to configure and use the ECDSA crypto APIs. ## Prerequisites/Setup Requirements -- The board MBR should have "ta_secure_boot_enable" set to 1 for wrap functionality - ### Hardware Requirements - Windows PC - SoC Mode: - Silicon Labs [BRD4338A](https://www.silabs.com/) +- For the Wrap Key feature of this application to work, the keys should be programmed and secure boot (ta_secure_boot) should be enabled in the device ### Software Requirements diff --git a/examples/snippets/crypto/gcm_cmac/gcm_cmac.slcp b/examples/snippets/crypto/gcm_cmac/gcm_cmac.slcp index 6f2cb71e6..129803edd 100644 --- a/examples/snippets/crypto/gcm_cmac/gcm_cmac.slcp +++ b/examples/snippets/crypto/gcm_cmac/gcm_cmac.slcp @@ -10,9 +10,9 @@ filter: value: ["Wi-Fi"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/crypto/gcm_cmac/readme.md b/examples/snippets/crypto/gcm_cmac/readme.md index 7bad4982c..1ce7b1f4c 100644 --- a/examples/snippets/crypto/gcm_cmac/readme.md +++ b/examples/snippets/crypto/gcm_cmac/readme.md @@ -24,6 +24,7 @@ This application demonstrates the following: - Windows PC - SoC Mode: - Silicon Labs [BRD4338A](https://www.silabs.com/) +- For the Wrap Key feature of this application to work, the keys should be programmed and secure boot (ta_secure_boot) should be enabled in the device ### Software Requirements diff --git a/examples/snippets/crypto/hmac/hmac.slcp b/examples/snippets/crypto/hmac/hmac.slcp index be14b998d..5e1b6e369 100644 --- a/examples/snippets/crypto/hmac/hmac.slcp +++ b/examples/snippets/crypto/hmac/hmac.slcp @@ -10,9 +10,9 @@ filter: value: ["Wi-Fi"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/crypto/sha/sha.slcp b/examples/snippets/crypto/sha/sha.slcp index 51ee01060..77c9c358d 100644 --- a/examples/snippets/crypto/sha/sha.slcp +++ b/examples/snippets/crypto/sha/sha.slcp @@ -10,9 +10,9 @@ filter: value: ["Wi-Fi"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/flash_read_write/flash_read_write.slcp b/examples/snippets/flash_read_write/flash_read_write.slcp index 2fe9fea55..9af3b2b92 100644 --- a/examples/snippets/flash_read_write/flash_read_write.slcp +++ b/examples/snippets/flash_read_write/flash_read_write.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/sl_si91x_empty_c/sl_si91x_empty_c_ncp.slcp b/examples/snippets/sl_si91x_empty_c/sl_si91x_empty_c_ncp.slcp index 268333351..5e7f26777 100644 --- a/examples/snippets/sl_si91x_empty_c/sl_si91x_empty_c_ncp.slcp +++ b/examples/snippets/sl_si91x_empty_c/sl_si91x_empty_c_ncp.slcp @@ -14,10 +14,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/sl_si91x_empty_c/sl_si91x_empty_c_soc.slcp b/examples/snippets/sl_si91x_empty_c/sl_si91x_empty_c_soc.slcp index 3d6464148..a777472fb 100644 --- a/examples/snippets/sl_si91x_empty_c/sl_si91x_empty_c_soc.slcp +++ b/examples/snippets/sl_si91x_empty_c/sl_si91x_empty_c_soc.slcp @@ -14,10 +14,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/sl_si91x_empty_cpp/sl_si91x_empty_cpp_ncp.slcp b/examples/snippets/sl_si91x_empty_cpp/sl_si91x_empty_cpp_ncp.slcp index b43c91068..9f0967a05 100644 --- a/examples/snippets/sl_si91x_empty_cpp/sl_si91x_empty_cpp_ncp.slcp +++ b/examples/snippets/sl_si91x_empty_cpp/sl_si91x_empty_cpp_ncp.slcp @@ -14,10 +14,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.cpp - path: main.cpp diff --git a/examples/snippets/sl_si91x_empty_cpp/sl_si91x_empty_cpp_soc.slcp b/examples/snippets/sl_si91x_empty_cpp/sl_si91x_empty_cpp_soc.slcp index 7eb659084..943288263 100644 --- a/examples/snippets/sl_si91x_empty_cpp/sl_si91x_empty_cpp_soc.slcp +++ b/examples/snippets/sl_si91x_empty_cpp/sl_si91x_empty_cpp_soc.slcp @@ -14,10 +14,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.cpp - path: main.cpp diff --git a/examples/snippets/wlan/access_point/access_point_ncp.slcp b/examples/snippets/wlan/access_point/access_point_ncp.slcp index 08aa7bda6..f8e2b5417 100644 --- a/examples/snippets/wlan/access_point/access_point_ncp.slcp +++ b/examples/snippets/wlan/access_point/access_point_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/access_point/access_point_soc.slcp b/examples/snippets/wlan/access_point/access_point_soc.slcp index 7bdceb1ad..9220da293 100644 --- a/examples/snippets/wlan/access_point/access_point_soc.slcp +++ b/examples/snippets/wlan/access_point/access_point_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/access_point/access_point_uart_ncp.slcp b/examples/snippets/wlan/access_point/access_point_uart_ncp.slcp index d8c042d8e..3626657f9 100644 --- a/examples/snippets/wlan/access_point/access_point_uart_ncp.slcp +++ b/examples/snippets/wlan/access_point/access_point_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/ap_throughput/ap_throughput_ncp.slcp b/examples/snippets/wlan/ap_throughput/ap_throughput_ncp.slcp index d5355ef26..577057e74 100644 --- a/examples/snippets/wlan/ap_throughput/ap_throughput_ncp.slcp +++ b/examples/snippets/wlan/ap_throughput/ap_throughput_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/ap_throughput/ap_throughput_soc.slcp b/examples/snippets/wlan/ap_throughput/ap_throughput_soc.slcp index 66cdc97e5..83e18ae12 100644 --- a/examples/snippets/wlan/ap_throughput/ap_throughput_soc.slcp +++ b/examples/snippets/wlan/ap_throughput/ap_throughput_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/calibration_app/app.c b/examples/snippets/wlan/calibration_app/app.c index b06c94af4..08291a1eb 100644 --- a/examples/snippets/wlan/calibration_app/app.c +++ b/examples/snippets/wlan/calibration_app/app.c @@ -167,6 +167,7 @@ static const sl_wifi_device_configuration_t calibration_configuration = { .custom_feature_bit_map = (SL_SI91X_CUSTOM_FEAT_EXTENTION_VALID), .ext_custom_feature_bit_map = (SL_SI91X_EXT_FEAT_XTAL_CLK | SL_SI91X_EXT_FEAT_UART_SEL_FOR_DEBUG_PRINTS | MEMORY_CONFIG + | SL_SI91X_EXT_FEAT_DISABLE_XTAL_CORRECTION #ifdef SLI_SI917B0 | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 #endif @@ -277,9 +278,14 @@ void display_calib_cmd_usage() void validate_input_cmd() { - if ((strncasecmp((const char *)buffer, (const char *)"sl_", strlen("sl_") != 0)) - || (strlen(buffer) < MIN_CALIB_COMMAND_LENGTH) || (strlen(buffer) > MAX_CALIB_COMMAND_LENGTH)) { + size_t buffer_len = strlen(buffer); + + if ((strncasecmp((const char *)buffer, (const char *)"sl_", strlen("sl_")) != 0) + || (buffer_len < MIN_CALIB_COMMAND_LENGTH) || (buffer_len > MAX_CALIB_COMMAND_LENGTH)) { cmd_valid = false; + } else { + // Mark command as valid if all conditions are met. + cmd_valid = true; } } diff --git a/examples/snippets/wlan/calibration_app/calibration_app_ncp.slcp b/examples/snippets/wlan/calibration_app/calibration_app_ncp.slcp index 232eb73f8..4400c82b8 100644 --- a/examples/snippets/wlan/calibration_app/calibration_app_ncp.slcp +++ b/examples/snippets/wlan/calibration_app/calibration_app_ncp.slcp @@ -10,9 +10,9 @@ filter: value: ["Wi-Fi"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/calibration_app/calibration_app_soc.slcp b/examples/snippets/wlan/calibration_app/calibration_app_soc.slcp index a64a1b44f..0b7b94666 100644 --- a/examples/snippets/wlan/calibration_app/calibration_app_soc.slcp +++ b/examples/snippets/wlan/calibration_app/calibration_app_soc.slcp @@ -10,9 +10,9 @@ filter: value: ["Wi-Fi"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/calibration_app/calibration_app_uart_ncp.slcp b/examples/snippets/wlan/calibration_app/calibration_app_uart_ncp.slcp index d339d1f30..6ef013bf0 100644 --- a/examples/snippets/wlan/calibration_app/calibration_app_uart_ncp.slcp +++ b/examples/snippets/wlan/calibration_app/calibration_app_uart_ncp.slcp @@ -10,9 +10,9 @@ filter: value: ["Wi-Fi"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/calibration_app/readme.md b/examples/snippets/wlan/calibration_app/readme.md index c9d4143eb..1cdc224f7 100644 --- a/examples/snippets/wlan/calibration_app/readme.md +++ b/examples/snippets/wlan/calibration_app/readme.md @@ -69,7 +69,9 @@ For details on the project folder structure, see the [WiSeConnect Examples](http The application can be configured to suit user requirements and development environment. Read through the following sections and make any changes needed. -1. Configure the following parameters in **app.c** to test calibration app as per requirements +1. Ensure that SL_SI91X_EXT_FEAT_DISABLE_XTAL_CORRECTION (BIT(18)) is enabled in the sl_wifi_device_configuration_t.sl_si91x_boot_configuration_t.ext_custom_feature_bit_map structure variable. This setting will disable the automatic compensation for frequency offsets, thereby ensuring error-free calibration. + +2. Configure the following parameters in **app.c** to test calibration app as per requirements ```c sl_wifi_data_rate_t rate = SL_WIFI_DATA_RATE_1; diff --git a/examples/snippets/wlan/cloud_apps/aws/mqtt/aws_mqtt_ncp.slcp b/examples/snippets/wlan/cloud_apps/aws/mqtt/aws_mqtt_ncp.slcp index f99bef412..1e3464368 100644 --- a/examples/snippets/wlan/cloud_apps/aws/mqtt/aws_mqtt_ncp.slcp +++ b/examples/snippets/wlan/cloud_apps/aws/mqtt/aws_mqtt_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/cloud_apps/aws/mqtt/aws_mqtt_soc.slcp b/examples/snippets/wlan/cloud_apps/aws/mqtt/aws_mqtt_soc.slcp index 4c4b2decd..fa7c6ab67 100644 --- a/examples/snippets/wlan/cloud_apps/aws/mqtt/aws_mqtt_soc.slcp +++ b/examples/snippets/wlan/cloud_apps/aws/mqtt/aws_mqtt_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/cloud_apps/aws/mqtt/readme.md b/examples/snippets/wlan/cloud_apps/aws/mqtt/readme.md index 0fcedbc5b..597bf7cd9 100644 --- a/examples/snippets/wlan/cloud_apps/aws/mqtt/readme.md +++ b/examples/snippets/wlan/cloud_apps/aws/mqtt/readme.md @@ -21,15 +21,15 @@ This application demonstrates how to configure SiWx91x as an IoT device and securely connect to AWS IoT Cloud to subscribe and publish on a topic by using AWS MQTT library. -In this application, the SiWx91x, which is configured as a Wi-Fi client interface, gets connected to an Access Point which has internet access. After successful Wi-Fi connection, the application connects to AWS IoT Cloud and subscribes to **SUBSCRIBE_TO_TOPIC** topic. Subsequently, the application publishes **MQTT_PUBLISH_PAYLOAD** message on **PUBLISH_ON_TOPIC** topic. After publish, the NWP processor is set in to associated power save. Next, the application works differently in NCP and SoC modes as defined below. +In this application, the SiWx91x, which is configured as a Wi-Fi client interface, gets connected to an Access Point which has internet access. After successful Wi-Fi connection, the application connects to AWS IoT Cloud and subscribes to **SUBSCRIBE_TO_TOPIC** topic. Subsequently, the application publishes the **MQTT_PUBLISH_PAYLOAD** message on the **PUBLISH_ON_TOPIC** topic. After publish, the NWP processor is set into associated power save. Next, the application works differently in NCP and SoC modes as defined below. ## Soc Mode: -If macro **SL_SI91X_TICKLESS_MODE** enabled, Then M4 processor is set in sleep mode. The M4 processor can be woken in several ways as mentioned below: +If macro **SL_SI91X_TICKLESS_MODE** is enabled, then the M4 processor is set in sleep mode. The M4 processor can be woken in several ways as described below: ### Tickless Mode -In Tickless Mode, the device enters sleep based on the idle time set by the scheduler. The device can be awakened by these methods: SysRTC, a wireless signal, Button press-based (GPIO) and Alarm based wakeup. +In Tickless Mode, the device enters sleep based on the idle time set by the scheduler. The device can be awakened by these methods: SysRTC, a wireless signal, Button press-based (GPIO), and Alarm based wakeup. - **SysRTC (System Real-Time Clock)**: By default, the device uses SysRTC as the wakeup source. The device will enter sleep mode and then wake up when the SysRTC matches the idle time set by the scheduler. @@ -39,9 +39,9 @@ In Tickless Mode, the device enters sleep based on the idle time set by the sche - **Alarm Based Wakeup**:The device can also be awakened by setting the timeout to the appropriate duration in the osSemaphoreAcquire function. -After M4 processor wakes up via any of the above processes, the application publishes **MQTT_PUBLISH_PAYLOAD** message on **PUBLISH_ON_TOPIC** topic. +After M4 processor wakes up via any of the above processes, the application publishes the **MQTT_PUBLISH_PAYLOAD** message on the **PUBLISH_ON_TOPIC** topic. -If macro **SL_SI91X_TICKLESS_MODE** is disabled, then M4 processor does not go to sleep. A timer is run with a periodicity of **PUBLISH_PERIODICITY** milliseconds.The application publishes **MQTT_PUBLISH_PAYLOAD** message on **PUBLISH_ON_TOPIC** topic in the following cases: +If macro **SL_SI91X_TICKLESS_MODE** is disabled, then M4 processor does not go to sleep. A timer is run with a periodicity of **PUBLISH_PERIODICITY** milliseconds. The application publishes the **MQTT_PUBLISH_PAYLOAD** message on the **PUBLISH_ON_TOPIC** topic in the following cases: 1. Once in every **PUBLISH_PERIODICITY** time period. 2. When an incoming publish is received by the application. @@ -57,7 +57,7 @@ A timer is run with a periodicity of **PUBLISH_PERIODICITY** milliseconds. The a ## Overview of AWS SDK -AWS IoT Core is a cloud platform which connects devices across AWS cloud services. AWS IoT provides a interface which allows the devices to communicate securely and reliably in bi-directional ways to the AWS touch-points, even when the devices are offline. +AWS IoT Core is a cloud platform which connects devices across AWS cloud services. AWS IoT provides an interface which allows the devices to communicate securely and reliably in bi-directional ways to the AWS touch-points, even when the devices are offline. The AWS IoT Device SDK allow applications to securely connect to the AWS IoT platform. @@ -146,37 +146,37 @@ By default, the application connects to the remote Access point with `default_wi > - Before configuring the parameters in `aws_iot_config.h`, register the SiWx917 device in the AWS IoT registry by following the steps mentioned in [Create an AWS Thing](#create-an-aws-thing) section. -> - Configure AWS_IOT_MQTT_HOST macro with the device data endpoint to connect to AWS. For getting the device data endpoint in the AWS IoT Console navigate to Settings and copy the Endpoint and define the AWS_IOT_MQTT_HOST macro with this value. +> - Configure AWS_IOT_MQTT_HOST macro with the device data endpoint to connect to AWS. To get the device data endpoint in the AWS IoT Console, navigate to Settings, copy the Endpoint, and define the AWS_IOT_MQTT_HOST macro with this value. ![AWS_IOT_MQTT_HOST_NAME](resources/readme/aws_iot_mqtt_host_url_1.png) ```c #define AWS_IOT_MQTT_HOST \ "a2m21kovu9tcsh-ats.iot.us-east-2.amazonaws.com" ///< Customer specific MQTT HOST. The same will be used for Thing Shadow -#define AWS_IOT_MQTT_PORT 8883 ///< default port for MQTT/S +#define AWS_IOT_MQTT_PORT 8883 ///< Default port for MQTT/S #define AWS_IOT_MQTT_CLIENT_ID "silicon_labs_thing" ///< MQTT client ID should be unique for every device #define AWS_IOT_MY_THING_NAME "silicon_labs_thing" ``` -> - To authenticate and securely connect with AWS, the SiWx917 device requires a unique x.509 security certificate and private key, as well as a CA certificate. At this point, you must be having device certificate, private key and CA certificate which are downloaded during the creation/registration of AWS Thing. +> - To authenticate and securely connect with AWS, the SiWx917 device requires a unique x.509 security certificate and private key, as well as a CA certificate. At this point, you must have a device certificate, private key, and CA certificate, which are downloaded during the creation/registration of AWS Thing. -> - By default the certificate and private key that are downloaded from the AWS are in [.pem format](https://en.wikipedia.org/wiki/Privacy-Enhanced_Mail). To load the certificate and private key to the SiWx917, the certificate and private key should be converted into a C-array. For converting the certificates and private key into C-array refer to [Setting up Security Certificates](#setting-up-security-certificates). +> - By default, the certificate and private key that are downloaded from the AWS are in [.pem format](https://en.wikipedia.org/wiki/Privacy-Enhanced_Mail). To load the certificate and private key to the SiWx917, the certificate and private key should be converted into a C-array. For converting the certificates and private key into C-array, refer to [Setting up Security Certificates](#setting-up-security-certificates). -> - By default the WiSeConnect 3 SDK contains the Starfield Root CA Certificate in C-array format. +> - By default, the WiSeConnect 3 SDK contains the Starfield Root CA Certificate in C-array format. > **Note** : - The included Cloud connectivity certificates are for reference only, using default certificates in the release, cloud connection doesn't work. Please replace the default certificates with valid certificates while connecting to appropriate Cloud/OpenSSL Server. + The included Cloud connectivity certificates are for reference only. If using default certificates in the release, the cloud connection will not work. You must replace the default certificates with valid certificates while connecting to the appropriate Cloud/OpenSSL Server. ## Test the Application Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: - Build the application. -- Flash, run and debug the application. +- Flash, run, and debug the application. **Note:** -- To know more about aws mqtt apis error codes. Please refer wiseconnect3\third_party\aws_sdk\include\aws_iot_error.h file. -- As the user is calling select and waiting forever, if no data is received, it is the user's responsibility to manage sending the keepalive packets to maintain the connection. +- To know more about aws mqtt apis error codes, refer to wiseconnect3\third_party\aws_sdk\include\aws_iot_error.h file. +- If the user is calling select and experiencing long wait times in which no data is received, it is the user's responsibility to manage sending the keepalive packets to maintain the connection. ### Application Output @@ -186,29 +186,29 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise - In this instance, the SiWx91x has established a secure connection with the AWS Cloud, subscribed to *aws_status* topic, and published a message "Hi from SiWx91x" on *siwx91x_status* topic. - The NWP processor is then set into associated power save mode. -- Subsequently, the M4 processor is set in to power save. -- Later, the application performs publish through any of the three procedures described below: +- Subsequently, the M4 processor is set into power save. +- Later, the application performs the publish through any of the three procedures described below: - *case 1*: When an incoming publish is received - - Suppose, the message "Hi from AWS Cloud!" has been published by a test MQTT Client on *aws_status* topic. Upon reception of incoming publish, the NWP processor triggers M4 processor to wake up. The application then reads the received data, triggers a publish on *siwx91x_status* topic, and sets M4 processor back to sleep. + *case 1*: When an incoming publish is received: + - Suppose the message, "Hi from AWS Cloud!", has been published by a test MQTT Client on *aws_status* topic. Upon reception of incoming publish, the NWP processor triggers the M4 processor to wake up. The application then reads the received data, triggers a publish on *siwx91x_status* topic, and sets the M4 processor back to sleep. - *case 2*: When **BTN0** is pressed on WPK - - The button press triggers M4 processor to wake from sleep. The application then performs a publish on *siwx91x_status* topic, and sets M4 processor back to sleep. + *case 2*: When **BTN0** is pressed on WPK: + - The button press triggers the M4 processor to wake from sleep. The application then performs a publish on *siwx91x_status* topic, and sets the M4 processor back to sleep. *case 3*: When ALARM-timer elapses - - By default, the ALARM-timer periodicity is 30 seconds (**ALARM_PERIODIC_TIME**). During every iteration, the ALARM triggers M4 processor to wake from sleep. The application then performs a publish on *siwx91x_status* topic, and sets M4 processor back to sleep. + - By default, the ALARM-timer periodicity is 30 seconds (**ALARM_PERIODIC_TIME**). During every iteration, the ALARM triggers the M4 processor to wake from sleep. The application then performs a publish on *siwx91x_status* topic, and sets the M4 processor back to sleep. - **NCP Mode**: ![NCP Application prints](resources/readme/application_prints_ncp.png) - - In this instance, the SiWx91x has established a secure connection with the AWS Cloud, subscribed to *aws_status* topic, and published a message "Hi from SiWx91x" on *siwx91x_status* topic. + - In this instance, the SiWx91x has established a secure connection with the AWS Cloud, subscribed to *aws_status* topic, and published a message, "Hi from SiWx91x" on *siwx91x_status* topic. - The NWP processor is then set into associated power save mode. - *case 1*: When an incoming publish is received - - Suppose, the message "Hi from AWS Cloud!" has been published by a test MQTT Client on *aws_status* topic. Upon reception of incoming publish, the NWP processor triggers M4 processor to wake up. The application then reads the received data, triggers a publish on *siwx91x_status* topic, and sets M4 processor back to sleep. + *case 1*: When an incoming publish is received: + - Suppose the message, "Hi from AWS Cloud!", has been published by a test MQTT Client on *aws_status* topic. Upon reception of incoming publish, the NWP processor triggers the M4 processor to wake up. The application then reads the received data, triggers a publish on *siwx91x_status* topic, and sets the M4 processor back to sleep. - *case 2*: When periodic publish timer elapses + *case 2*: When periodic publish timer elapses: - By default, the periodicity of the publish timer is 30 seconds (**PUBLISH_PERIODICITY**). For every **PUBLISH_PERIODICITY**, the application performs a publish on *siwx91x_status* topic. **Application notes**: @@ -218,22 +218,22 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ## Additional Information -- Average current consumption measured in power-meter +- Average current consumption measured in power-meter: ![output_prints](resources/readme/power_meter_avg_current_consumption.png) - - **NOTE** : The measured current may vary if the scenario is performed in open environment. AP to AP variation is also observed. - - **NOTE** : To achieve the lowest power numbers in connected sleep, in SoC mode, one should configure `RAM_LEVEL` to `SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV` and M4 to without RAM retention i.e. `sl_si91x_configure_ram_retention` should not be done. + - **NOTE** : The measured current may vary if the scenario is performed in an open environment. AP to AP variation is also observed. + - **NOTE** : To achieve the lowest power numbers in connected sleep, in SoC mode, configure `RAM_LEVEL` to `SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV` and M4 to without RAM retention, i.e., `sl_si91x_configure_ram_retention` should not be done. ### Current Measurement using Simplicity Studio Energy Profiler -- After flashing the application code to the module. Energy profiler can be used for current consumption measurements. +- After flashing the application code to the module, the energy profiler can be used for current consumption measurements. -- From tools, choose Energy Profiler and click "OK" +- From tools, choose Energy Profiler and click "OK". ![Figure: Energy Profiler Step 6](resources/readme/energy_profiler_step_6.png) -- From Quick Access, choose Start Energy Capture option +- From Quick Access, choose Start Energy Capture option. ![Figure: Energy Profiler Step 7](resources/readme/energy_profiler_step_7.png) @@ -241,7 +241,7 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise - The WiSeConnect 3 SDK provides a conversion script (written in Python 3) to make the conversion straightforward. The script is provided in the SDK `/resources/scripts` directory and is called [certificate_to_array.py](https://github.com/SiliconLabs/wiseconnect/tree/master/resources/certificates/). -- Copy the downloaded device certificate, private key from AWS and also the certificate_to_array.py to the `/resources/certificates`. +- Copy the downloaded device certificate, private key from AWS, and also the certificate_to_array.py to the `/resources/certificates`. - To convert the device certificate and private key to C arrays, open a system command prompt in the same path and give the following commands. @@ -271,23 +271,30 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise > **NOTE :** > Amazon uses [Starfield Technologies](https://www.starfieldtech.com/) to secure the AWS website, the WiSeConnect SDK includes the [Starfield CA Certificate](https://github.com/SiliconLabs/wiseconnect/tree/master/resources/certificates/aws_starfield_ca.pem.h). > -> For AWS connectivity, StarField Root CA Class 2 certificate has the highest authority being at the top of the signing hierarchy. +> AWS has announced that there will be changes in their root CA chain. More details can be found in the reference link: (https://aws.amazon.com/blogs/security/acm-will-no-longer-cross-sign-certificates-with-starfield-class-2-starting-august-2024/) > -> The StarField Root CA Class 2 certificate is an expected/required certificate which usually comes pre-installed in the operating systems and plays a key part in certificate chain verification when a device is performing TLS authentication with the IoT endpoint. +> We are providing both root CAs (Starfield class-2 and Starfield G2) in aws_starfield_ca.pem.h, which is located in the WiSeConnect directory `/resources/certificates/aws_starfield_ca.pem.h` > -> On SiWx91x device, we do not maintain the root CA trust repository due to memory constraints, so it is mandatory to load Starfield Root CA Class 2 certificate for successful mutual authentication to the AWS server. +> For AWS connectivity, StarField Root CA certificate has the highest authority being at the top of the signing hierarchy. +> +> The StarField Root CA certificate is an expected/required certificate which usually comes pre-installed in the operating systems and plays a key part in certificate chain verification when a device is performing TLS authentication with the IoT endpoint. +> +> On SiWx91x device, we do not maintain the root CA trust repository due to memory constraints, so it is mandatory to load Starfield Root CA certificate for successful mutual authentication to the AWS server. > > The certificate chain sent by AWS server is as below: -> id-at-commonName=Amazon,id-at-organizationalUnitName=Server CA 1B,id-at-organizationName=Amazon,id-at-countryName=US +> Starfield Class 2 : +> id-at-commonName=Amazon,RSA 2048 M01,id-at-organizationName=Amazon,id-at-countryName=US > id-at-commonName=Amazon Root CA 1,id-at-organizationName=Amazon,id-at-countryName=US -> id-at-commonName=Starfield Services Root Certificate Authority ,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at- stateOrProvinceName=Arizona,id-at-countryName=US) +> id-at-commonName=Starfield Services Root Certificate Authority - G2,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at- stateOrProvinceName=Arizona,id-at-countryName=US +>id-at-organizationalUnitName=Starfield Class 2 Certification Authority,id-at-organizationName=Starfield Technologies, Inc.,id-at-countryName=US > -> On SiWx91x to authenticate the AWS server, firstly Root CA is validated (validate the Root CA received with the Root CA loaded on the device). Once the Root CA validation is successful, other certificates sent from the AWS server are validated. -> SiWx91x doesn't authenticate to AWS server if intermediate CA certificates are loaded instead of Starfield Root CA Class 2 certificate and would result in a Handshake error. -> StarField Root CA Class 2 certificate is at +> Starfield G2: +> id-at-commonName=Amazon RSA 2048 M01,id-at-organizationName=Amazon,id-at-countryName=US +> id-at-commonName=Amazon Root CA 1,id-at-organizationName=Amazon,id-at-countryName=US +> id-at-commonName=Starfield Services Root Certificate Authority - G2,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at-stateOrProvinceName=Arizona,id-at-countryName=US > -> Reference links : -> +> To authenticate the AWS server on SiWx91x, first validate the Root CA (validate the Root CA received with the Root CA loaded on the device). Once the Root CA validation is successful, other certificates sent from the AWS server are validated. +> If intermediate CA certificates are loaded instead of the Starfield Root CA certificate, the SiWx91x will not authenticate to the AWS server, resulting in a Handshake error. ### Create an AWS Thing @@ -307,7 +314,7 @@ Create a thing in the AWS IoT registry to represent your IoT device. ![AWS thing creation](resources/readme/aws_create_thing_step3.png) -- On the **Specify thing properties** page, enter a name for your IoT thing (for example, **Test_IoT**), and choose **Unnamed shadow (classic)** in the Device Shadow section, then choose **Next**. You can't change the name of a thing after you create it. To change a thing's name, you must create a new thing, give it the new name, and then delete the old thing. +- On the **Specify thing properties** page, enter a name for your IoT thing (for example, **Test_IoT**), and choose **Unnamed shadow (classic)** in the Device Shadow section, then choose **Next**. You cannot change the name of a thing after you create it. To change a thing's name, you must create a new thing, give it the new name, and then delete the old thing. ![Add Device 1](resources/readme/aws_create_thing_step4.png) @@ -315,26 +322,26 @@ Create a thing in the AWS IoT registry to represent your IoT device. ![Add Device 2](resources/readme/aws_create_thing_step5.png) -- To attach an existing policy choose the policy and click on create thing, if policy is not yet created Choose Create policy and fill the fields as mentioned in the following images. +- To attach an existing policy, choose the policy and click on create thing. If the policy is not yet created, choose Create policy and fill in the fields as shown in the following images. -- choosing an existing policy. +- Choosing an existing policy. ![Attach policy](resources/readme/aws_choosing_policy.png) -- creating a policy. +- Creating a policy. - Click on create policy. ![Create policy](resources/readme/aws_create_thing_attach_policy.png) - - Give the **Name** to your Policy, Fill **Action** and **Resource ARN** as shown in below image, Click on **Allow** under **Effect** and click **Create**. + - Give the **Name** to your Policy. Fill in the **Action** and **Resource ARN** fields as shown in the image below. Click on **Allow** under **Effect** and click **Create**. ![Filling fields for policy](resources/readme/aws_create_thing_policy_create.png) - - choose the created policy and click on **Create thing**. + - Choose the created policy and click on **Create thing**. - Choose the **Download** links to download the device certificate and private key. Note that Root CA certificate is already present in SDK (aws_starfield_ca.pem.h), and can be directly used. - > **Warning:** This is the only instance you can download your device certificate and private key. Make sure to save them safely. + > **Warning:** This is the only instance you can download your device certificate and private key. Make sure to save them securely. ![Downloading certificates](resources/readme/aws_thing_certificates_download.png) - Click **Done**. -- The created thing should now be visible on the AWS console (Manage > All devices > Things). \ No newline at end of file +- The created thing should now be visible on the AWS console (Manage > All devices > Things). diff --git a/examples/snippets/wlan/cloud_apps/azure/azure_iot_ncp.slcp b/examples/snippets/wlan/cloud_apps/azure/azure_iot_ncp.slcp index adc0125ed..b869dbbf8 100644 --- a/examples/snippets/wlan/cloud_apps/azure/azure_iot_ncp.slcp +++ b/examples/snippets/wlan/cloud_apps/azure/azure_iot_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/cloud_apps/azure/azure_iot_soc.slcp b/examples/snippets/wlan/cloud_apps/azure/azure_iot_soc.slcp index 382fa3a71..e6fd7f3fd 100644 --- a/examples/snippets/wlan/cloud_apps/azure/azure_iot_soc.slcp +++ b/examples/snippets/wlan/cloud_apps/azure/azure_iot_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -128,6 +128,10 @@ other_file: - path: resources/readme/azurex509devicecreate.png - path: resources/readme/iothubstep4image.png - path: resources/readme/openssloutputs.png +requires: +- name: device_needs_ram_execution + condition: + - si91x_common_flash ui_hints: highlight: - path: readme.md diff --git a/examples/snippets/wlan/cloud_apps/azure/readme.md b/examples/snippets/wlan/cloud_apps/azure/readme.md index 8274bf289..0039b0124 100644 --- a/examples/snippets/wlan/cloud_apps/azure/readme.md +++ b/examples/snippets/wlan/cloud_apps/azure/readme.md @@ -44,7 +44,7 @@ This application demonstrates how to configure the SiWx91x module as an Azure de > > - For establishing an AWS connection, it is essential for the user to replace the default certificate ([aws_client_certificate.pem.crt.h](https://github.com/SiliconLabs/wiseconnect/blob/master/resources/certificates/aws_client_certificate.pem.crt.h)) and private key ([aws_client_private_key.pem.key.h](https://github.com/SiliconLabs/wiseconnect/blob/master/resources/certificates/aws_client_private_key.pem.key.h)) with the authentic certificate and private key generated from their designated Certificate Authority (CA). > -> - Please refer to [Setting up Security Certificates](#setting-up-security-certificates) for a complete end-to-end procedure on how to generate and use authentic certificates. +> - Refer to [Setting up Security Certificates](#setting-up-security-certificates) for a complete end-to-end procedure on how to generate and use authentic certificates. ### Setup Diagram @@ -120,17 +120,17 @@ Open the ``demo_config.h`` file. Configure the following parameters. #define USE_SYMMETRIC_KEY 0 ``` > **Note** : By default Symmetric Key is set - - Device symmetric key. + - Device symmetric key ```c #define democonfigDEVICE_SYMMETRIC_KEY Symmetric key ``` - - Client's X509 Certificate. + - Client's X509 Certificate ```c #define democonfigCLIENT_CERTIFICATE_PEM YOUR DEVICE CERT HERE ``` - - Client's private key. + - Client's private key ```c #define democonfigCLIENT_PRIVATE_KEY_PEM YOUR DEVICE PRIVATE KEY HERE ``` @@ -144,7 +144,7 @@ Open the ``demo_config.h`` file. Configure the following parameters. #include "silabs_dgcert_ca.pem.h" ``` - - If X509 authentication is to be used, Three certificates (CA certificate, device certificate and the private key certificate) are required for the authentication process and three certificates have to be loaded into the SiWx91x module. The CA certificate is provided in the SDK, but the device certificate and the private key certificates have to be generated, converted to linear array format and loaded into the module. Refer to [Register IoT Deivice with X.509 Authenticated Device with IoT Hub](#132---register-iot-deivice-with-x509-authenticated-device-with-iot-hub) regarding the process of generating, converting the certificates to linear array format and loading into the module. + - If X509 authentication is to be used, three certificates (CA certificate, device certificate, and the private key certificate) are required for the authentication process and three certificates have to be loaded into the SiWx91x module. The CA certificate is provided in the SDK, but the device certificate and the private key certificates have to be generated, converted to linear array format and loaded into the module. Refer to [Register IoT Deivice with X.509 Authenticated Device with IoT Hub](#132---register-iot-deivice-with-x509-authenticated-device-with-iot-hub) regarding the process of generating, converting the certificates to linear array format, and loading into the module. ```c // Certificate includes @@ -156,14 +156,14 @@ Open the ``demo_config.h`` file. Configure the following parameters. > **Note** : This application continuously receives and sends publish messages between the cloud and the IoT Hub. > **Note** : - The included Cloud connectivity certificates are for reference only, using default certificates in the release, cloud connection doesn't work. Please replace the default certificates with valid certificates while connecting to appropriate Cloud/OpenSSL Server. + The included Cloud connectivity certificates are for reference only. If using default certificates in the release, cloud connection will not work. You must replace the default certificates with valid certificates while connecting to the appropriate Cloud/OpenSSL Server. ## Test the Application Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: - Build the application. -- Flash, run and debug the application. +- Flash, run, and debug the application. - SoC and NCP mode @@ -173,11 +173,11 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ### Follow the steps below for successful execution of the application: -1. SiWx917 configured as Wi-Fi staion, connects to the access point with Internet connection in OPEN/WPA-PSK/WPA2-PSK mode +1. The SiWx917 configured as Wi-Fi station connects to the access point with Internet connection in OPEN/WPA-PSK/WPA2-PSK mode. 2. Required certificates are loaded, and SiWx917 tries to connect to the Azure IoT hub device using the credentials configured in the application. -3. The SiWx917 upon connection, will send 5 telemetry messages to Azure Hub and waits to receive atleast 5 C2D messages. -4. Refer to Appendix section [Steps to check Telemetry message on Azure cloud](#appendix-2--steps-to-check-telemetry-message-on-azure-cloud) section to check the messages sent by application to cloud in the Azure portal. -5. Refer to Appendix section [Steps to send c2d message from the cloud](#appendix-3--steps-to-send-c2d-message-from-the-cloud) section to how to send C2D messages from Azure Hub +3. The SiWx917, upon connection, sends five telemetry messages to Azure Hub and waits to receive atleast five C2D messages. +4. Refer to Appendix section [Steps to check Telemetry message on Azure cloud](#appendix-2--steps-to-check-telemetry-message-on-azure-cloud) to check the messages sent by the application to the cloud in the Azure portal. +5. Refer to Appendix section [Steps to send c2d message from the cloud](#appendix-3--steps-to-send-c2d-message-from-the-cloud) for information on how to send C2D messages from the Azure Hub. ## **Appendix** @@ -185,13 +185,13 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ### 1.1 ***Azure Account creation*** -- Azure offers a free 30-day trail account for all new account holders, later depending on the services you will be charged in [Pay-as-you-go way.](https://azure.microsoft.com/en-in/pricing/) +- Azure offers a free 30-day trail account for all new account holders. Depending on the services you receive, later you will be charged in [Pay-as-you-go way.](https://azure.microsoft.com/en-in/pricing/) -- You can follow the below steps or refer on [how to create an Azure Account.](https://docs.microsoft.com/en-us/learn/modules/create-an-azure-account/) +- You can follow the steps below or refer to [how to create an Azure Account.](https://docs.microsoft.com/en-us/learn/modules/create-an-azure-account/) **Step 1:** Navigate to - **Step 2:** Click on “Free Account” in the top right + **Step 2:** Click on “Free Account” in the top right. ![Azure account ](resources/readme/azureaccountcreatea.png) @@ -199,7 +199,7 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ![Azure free trial](resources/readme/azureaccountcreateb.png) - **Step 4:** Enter the details requested to register to Microsoft Azure account. (Details like email, username, password etc...) + **Step 4:** Enter the details requested to register your Microsoft Azure account. (Details like email, username, password etc.) **Step 5:** Finally, agree to the Microsoft Azure terms and conditions to complete the setup process. @@ -207,15 +207,13 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise **Step 6:** At this stage you should be getting an Azure Link for your Azure Account. -You have now successfully created Azure account and you will be able to access all Azure Services. +You have now successfully created your Azure account and you will be able to access all Azure Services. ### 1.2 ***Azure IoT Hub and device creation*** -- Follow the steps below or refer [how to create an IoT Hub](https://docs.microsoft.com/en-us/azure/iot-hub/) -- Azure IoT Hub acts as a Gate way between IoT Devices and Azure Cloud Services -- Lets create a new IoT Hub service - -- Login to your Azure account at +- Follow the steps below or refer to [how to create an IoT Hub](https://docs.microsoft.com/en-us/azure/iot-hub/). +- Azure IoT Hub acts as a gateway between IoT Devices and Azure Cloud Services. +- Let's create a new IoT Hub service by logging in to your Azure account at . ![Azure login](resources/readme/azureaccountlogin.png) @@ -227,11 +225,11 @@ You have now successfully created Azure account and you will be able to access a ![Iot hub Search](resources/readme/azureresourcecreateb.png) -- This will open a page given below, select IoT Hub select “Create” +- This will open the page shown below. Select IoT Hub under “Create” ![Create IoT Hub](resources/readme/azureiothubcreate.png) -- Update the Basic details with below information +- Update the Basics details with below information - If a resource group is already available, choose the available resource group in the Resource group drop-down. If it is not available, then create a resource group as shown in the image and click "Next: Networking >" @@ -273,9 +271,9 @@ We have IoT Hub ready, now we can proceed with creating a device identity in the ![Select IoT Device](resources/readme/azureiothubadddevice.png) - To enable the device interactions after SAS authentication. Refer [Register IoT Device with symmetric key authentication in IoT Hub](#131---register-iot-device-with-symmetric-key-authentication-in-iot-hub) section. + To enable the device interactions after SAS authentication, refer to the [Register IoT Device with symmetric key authentication in IoT Hub](#131---register-iot-device-with-symmetric-key-authentication-in-iot-hub) section. - To enable the device interactions after X509 self-signed certificate authentication. Refer [Register IoT Deivice with X.509 Authenticated Device with IoT Hub](#132---register-iot-deivice-with-x509-authenticated-device-with-iot-hub) section. + To enable the device interactions after X509 self-signed certificate authentication, refer to the [Register IoT Deivice with X.509 Authenticated Device with IoT Hub](#132---register-iot-deivice-with-x509-authenticated-device-with-iot-hub) section. ### 1.3 - **Register the authentication method** @@ -285,40 +283,40 @@ We have IoT Hub ready, now we can proceed with creating a device identity in the ![Create Device](resources/readme/azurecreatedevicea.png) - **Step 4:** After the device is created, open the device from the list in the **IoT devices** pane. Select Device created and copy the **Primary Connection String** for use later. + **Step 4:** After the device is created, open the device from the list in the **IoT devices** pane. Select the device created and copy the **Primary Connection String** for use later. ![Create Device](resources/readme/azurecreatedevicea2.png) ![Primary connection string](resources/readme/azurecopyconnstring.png) - **Step 5:** For symmetric key authentication the primary connection string has to be referred. - For example, consider below sample connection string + **Step 5:** For symmetric key authentication, the primary connection string has to be referred. + For example, consider the below sample connection string HostName=example.azure-devices.net;DeviceId=example_Device_SymKey;SharedAccessKey=xxxxxx"; - then configure macros as below + then configure macros as below: ```c #define democonfigHOSTNAME "example.azure-devices.net" #define democonfigDEVICE_ID "example_Device_SymKey" #define democonfigDEVICE_SYMMETRIC_KEY "xxxxxx" ``` -Device is now successfully registered to IoT Hub with Symmetric key authentication type. +The device is now successfully registered to IoT Hub with Symmetric key authentication type. ### 1.3.2 - ***Register IoT Device with X.509 Authenticated Device with IoT Hub*** For X.509 self-signed authentication, sometimes referred to as thumbprint authentication, you need to create certificates to place on your device. These certificates have a thumbprint in them that you share with IoT Hub for authentication. - Follow the steps below or refer to the [Register a X.509 Device](https://docs.microsoft.com/en-us/azure/iot-edge/how-to-authenticate-downstream-device?view=iotedge-2021-11#x509-self-signed-authentication) + Follow the steps below or refer to the [Register a X.509 Device](https://docs.microsoft.com/en-us/azure/iot-edge/how-to-authenticate-downstream-device?view=iotedge-2021-11#x509-self-signed-authentication). - **Step 1:** Generating X509 Self Signed certificates + **Step 1:** Generating X509 Self-signed certificates - Generate the IoT device's x509 Certificate and the Private key certificate by using the below OpenSSL command from a Powershell window + Generate the IoT device's x509 Certificate and the Private key certificate by using the below OpenSSL command from a Powershell window: `Openssl req -newkey rsa:2048 -nodes -keyout azure_client_key.pem -x509 -days 365 -out azure_client_cert.pem` - After executing the above command, user is prompted to enter details like Country Name, click enter for all the fields + After executing the above command, the user is prompted to enter details such as Country Name. Click enter for all the fields. ![x509 certificate generation with OpenSSL](resources/readme/azureclientx509openssl.png) - The following private key and device certificate files are generated + The following private key and device certificate files are generated: - `azure_client_key.pem` is the private key file - `azure_client_cert.pem` is the x509 device certificate file @@ -335,20 +333,20 @@ Device is now successfully registered to IoT Hub with Symmetric key authenticati `E2927BCA4BEBB41DE54DCCDE3148AE6AD8D175C8` - **Step 3:** Go to Azure Portal - IoTHub to create new device with authentication type as X.509 Self-signed + **Step 3:** Go to Azure Portal - IoTHub to create a new device with authentication type as X.509 Self-signed - Fill the Device ID field. Choose X.509 Self-Signed as Authentication type. Enter the copied finger prints into both Primary Thumprint and Secondary Thumbprint fields. + Fill the Device ID field. Choose X.509 Self-signed as Authentication type. Enter the copied fingerprints into both Primary Thumprint and Secondary Thumbprint fields. Click Save. ![Create x509 Device](resources/readme/azurex509devicecreate.png) **Step 4:** Converting the certificates to linear array format - Copy the generated certificate file (azure_client_cert.pem) and key file (azure_client_cert.pem) into the /resources/certificates + Copy the generated certificate file (azure_client_cert.pem) and key file (azure_client_cert.pem) into the /resources/certificates. - Copy the certificate_to_array.py script from /resources/scripts to /resources/certificates + Copy the certificate_to_array.py script from /resources/scripts to /resources/certificates. - Execute the following python commands to convert the generated certificate and key files into linear array format + Execute the following python commands to convert the generated certificate and key files into linear array format: ```sh python certificate_to_array.py azure_client_cert.pem @@ -356,14 +354,14 @@ Device is now successfully registered to IoT Hub with Symmetric key authenticati python certificate_to_array.py azure_client_key.pem ``` - The files "azure_client_cert.pem.h" and "azure_client_key.pem.h" are over-written with the contents of the certificate and keyfiles which we have generated earlier. + The files "azure_client_cert.pem.h" and "azure_client_key.pem.h" are overwritten with the contents of the certificate and keyfiles which we have generated earlier. - **Step 5:** For X.509 self-signed authentication, there is no connection string available. We can configure as below + **Step 5:** For X.509 self-signed authentication, there is no connection string available. We can configure as below: ```c #define democonfigHOSTNAME "example.azure-devices.net" #define democonfigDEVICE_ID "example_Device_x509_Key" ``` - Device is now successfully registered with the IoT Hub with X509 self signed authentication type. + The device is now successfully registered with the IoT Hub with X509 self signed authentication type. ### ***Appendix-2*** : **Steps to check Telemetry message on Azure cloud** @@ -381,7 +379,7 @@ Device is now successfully registered to IoT Hub with Symmetric key authenticati eg: az iot hub monitor-events --hub-name azure-iothub-1 --output table -- The received telemetry message will be displayed as follows +- The received telemetry message will be displayed as follows: ![Azure telemetry messages](resources/readme/azureviewmsg.png) @@ -389,7 +387,7 @@ Device is now successfully registered to IoT Hub with Symmetric key authenticati - az iot hub monitor-events --hub-name --output table -- Login to Azure portal and navigate to the Hub that the device is created in +- Login to Azure portal and navigate to the Hub that the device is created in. ![Azure portal login](resources/readme/azurehubopen.png) diff --git a/examples/snippets/wlan/concurrent_firmware_update_from_host_uart/concurrent_firmware_update_from_host_uart_fg25_ncp.slcp b/examples/snippets/wlan/concurrent_firmware_update_from_host_uart/concurrent_firmware_update_from_host_uart_fg25_ncp.slcp index d56abbe99..eb70a42ca 100644 --- a/examples/snippets/wlan/concurrent_firmware_update_from_host_uart/concurrent_firmware_update_from_host_uart_fg25_ncp.slcp +++ b/examples/snippets/wlan/concurrent_firmware_update_from_host_uart/concurrent_firmware_update_from_host_uart_fg25_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_http_server/concurrent_http_server_ncp.slcp b/examples/snippets/wlan/concurrent_http_server/concurrent_http_server_ncp.slcp index f122567f0..006c52b0b 100644 --- a/examples/snippets/wlan/concurrent_http_server/concurrent_http_server_ncp.slcp +++ b/examples/snippets/wlan/concurrent_http_server/concurrent_http_server_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_http_server/concurrent_http_server_soc.slcp b/examples/snippets/wlan/concurrent_http_server/concurrent_http_server_soc.slcp index 6d7b1d9ba..38273575e 100644 --- a/examples/snippets/wlan/concurrent_http_server/concurrent_http_server_soc.slcp +++ b/examples/snippets/wlan/concurrent_http_server/concurrent_http_server_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_fg25_ncp.slcp b/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_fg25_ncp.slcp index c9e62407b..05988c74b 100644 --- a/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_fg25_ncp.slcp +++ b/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_fg25_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_ncp.slcp b/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_ncp.slcp index ab83b3e99..cc95b4799 100644 --- a/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_ncp.slcp +++ b/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_soc.slcp b/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_soc.slcp index 4f7d42fc8..5b3769884 100644 --- a/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_soc.slcp +++ b/examples/snippets/wlan/concurrent_http_server_provisioning/concurrent_http_server_provisioning_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_mode/app.c b/examples/snippets/wlan/concurrent_mode/app.c index b0f1de8ae..2fb3c414d 100644 --- a/examples/snippets/wlan/concurrent_mode/app.c +++ b/examples/snippets/wlan/concurrent_mode/app.c @@ -588,14 +588,13 @@ void send_data_to_udp_server(void) break; } total_bytes_sent = total_bytes_sent + sent_bytes; + } + printf("\r\nUDP_TX Throughput test finished\r\n"); + printf("\r\nTotal bytes sent : %ld\r\n", total_bytes_sent); - printf("\r\nUDP_TX Throughput test finished\r\n"); - printf("\r\nTotal bytes sent : %ld\r\n", total_bytes_sent); - - measure_and_print_throughput(total_bytes_sent, (now - start)); + measure_and_print_throughput(total_bytes_sent, (now - start)); - close(client_socket); - } + close(client_socket); } void receive_data_from_udp_client(void) { diff --git a/examples/snippets/wlan/concurrent_mode/concurrent_mode_fg25_ncp.slcp b/examples/snippets/wlan/concurrent_mode/concurrent_mode_fg25_ncp.slcp index c97ff7698..8ad14cdcf 100644 --- a/examples/snippets/wlan/concurrent_mode/concurrent_mode_fg25_ncp.slcp +++ b/examples/snippets/wlan/concurrent_mode/concurrent_mode_fg25_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_mode/concurrent_mode_ncp.slcp b/examples/snippets/wlan/concurrent_mode/concurrent_mode_ncp.slcp index dcc144acb..c9e05bcb6 100644 --- a/examples/snippets/wlan/concurrent_mode/concurrent_mode_ncp.slcp +++ b/examples/snippets/wlan/concurrent_mode/concurrent_mode_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_mode/concurrent_mode_soc.slcp b/examples/snippets/wlan/concurrent_mode/concurrent_mode_soc.slcp index 1641100a2..6ce1df0aa 100644 --- a/examples/snippets/wlan/concurrent_mode/concurrent_mode_soc.slcp +++ b/examples/snippets/wlan/concurrent_mode/concurrent_mode_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_mode/concurrent_mode_uart_ncp.slcp b/examples/snippets/wlan/concurrent_mode/concurrent_mode_uart_ncp.slcp index a9c53b5a1..86ede7e56 100644 --- a/examples/snippets/wlan/concurrent_mode/concurrent_mode_uart_ncp.slcp +++ b/examples/snippets/wlan/concurrent_mode/concurrent_mode_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_fg25_ncp.slcp b/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_fg25_ncp.slcp index c39a07584..17dd28c86 100644 --- a/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_fg25_ncp.slcp +++ b/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_fg25_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_ncp.slcp b/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_ncp.slcp index 5c85a04de..75e7d2b1c 100644 --- a/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_ncp.slcp +++ b/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_soc.slcp b/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_soc.slcp index 9a662d6fb..7cd0607d9 100644 --- a/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_soc.slcp +++ b/examples/snippets/wlan/concurrent_mode_dual_ip/concurrent_mode_dual_ip_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/data_transfer/data_transfer_ncp.slcp b/examples/snippets/wlan/data_transfer/data_transfer_ncp.slcp index c579b7c0a..7aff149a9 100644 --- a/examples/snippets/wlan/data_transfer/data_transfer_ncp.slcp +++ b/examples/snippets/wlan/data_transfer/data_transfer_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/data_transfer/data_transfer_soc.slcp b/examples/snippets/wlan/data_transfer/data_transfer_soc.slcp index d2f347fc2..c252527da 100644 --- a/examples/snippets/wlan/data_transfer/data_transfer_soc.slcp +++ b/examples/snippets/wlan/data_transfer/data_transfer_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/embedded_mqtt_client/embedded_mqtt_client_ncp.slcp b/examples/snippets/wlan/embedded_mqtt_client/embedded_mqtt_client_ncp.slcp index bf194501e..dca7681aa 100644 --- a/examples/snippets/wlan/embedded_mqtt_client/embedded_mqtt_client_ncp.slcp +++ b/examples/snippets/wlan/embedded_mqtt_client/embedded_mqtt_client_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/embedded_mqtt_client/embedded_mqtt_client_soc.slcp b/examples/snippets/wlan/embedded_mqtt_client/embedded_mqtt_client_soc.slcp index d17b41462..5cb7cc216 100644 --- a/examples/snippets/wlan/embedded_mqtt_client/embedded_mqtt_client_soc.slcp +++ b/examples/snippets/wlan/embedded_mqtt_client/embedded_mqtt_client_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -71,6 +71,10 @@ other_file: - path: resources/readme/delete_connections.png - path: resources/readme/mqtt_explorer_msg.png - path: resources/readme/setup_soc_ncp.png +requires: +- name: device_needs_ram_execution + condition: + - si91x_common_flash ui_hints: highlight: - path: readme.md diff --git a/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_ncp.slcp b/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_ncp.slcp index aede56d38..a4b2ac7e7 100644 --- a/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_ncp.slcp +++ b/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_soc.slcp b/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_soc.slcp index 867a60c0f..10f320060 100644 --- a/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_soc.slcp +++ b/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_uart_ncp.slcp b/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_uart_ncp.slcp index efdec38ea..506c901a9 100644 --- a/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_uart_ncp.slcp +++ b/examples/snippets/wlan/embedded_mqtt_client_twt/embedded_mqtt_client_twt_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/enterprise_client/enterprise_client_ncp.slcp b/examples/snippets/wlan/enterprise_client/enterprise_client_ncp.slcp index fcb1d420c..0d8c69d20 100644 --- a/examples/snippets/wlan/enterprise_client/enterprise_client_ncp.slcp +++ b/examples/snippets/wlan/enterprise_client/enterprise_client_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/enterprise_client/enterprise_client_soc.slcp b/examples/snippets/wlan/enterprise_client/enterprise_client_soc.slcp index 3b17a9ccb..4315079dc 100644 --- a/examples/snippets/wlan/enterprise_client/enterprise_client_soc.slcp +++ b/examples/snippets/wlan/enterprise_client/enterprise_client_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/firmware_flashing_from_host_uart_xmodem/firmware_flashing_ncp.slcp b/examples/snippets/wlan/firmware_flashing_from_host_uart_xmodem/firmware_flashing_ncp.slcp index 8a5e754e3..d3a928456 100644 --- a/examples/snippets/wlan/firmware_flashing_from_host_uart_xmodem/firmware_flashing_ncp.slcp +++ b/examples/snippets/wlan/firmware_flashing_from_host_uart_xmodem/firmware_flashing_ncp.slcp @@ -12,10 +12,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/firmware_flashing_from_host_uart_xmodem/firmware_flashing_soc.slcp b/examples/snippets/wlan/firmware_flashing_from_host_uart_xmodem/firmware_flashing_soc.slcp index d1e039691..278256fc2 100644 --- a/examples/snippets/wlan/firmware_flashing_from_host_uart_xmodem/firmware_flashing_soc.slcp +++ b/examples/snippets/wlan/firmware_flashing_from_host_uart_xmodem/firmware_flashing_soc.slcp @@ -12,10 +12,10 @@ filter: value: ["Beginner"] sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/http_client/http_client_ncp.slcp b/examples/snippets/wlan/http_client/http_client_ncp.slcp index 9f29bb3a9..5f315b282 100644 --- a/examples/snippets/wlan/http_client/http_client_ncp.slcp +++ b/examples/snippets/wlan/http_client/http_client_ncp.slcp @@ -10,9 +10,9 @@ filter: value: ["Wi-Fi"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/http_client/http_client_soc.slcp b/examples/snippets/wlan/http_client/http_client_soc.slcp index e0de990f4..d212b9f75 100644 --- a/examples/snippets/wlan/http_client/http_client_soc.slcp +++ b/examples/snippets/wlan/http_client/http_client_soc.slcp @@ -10,9 +10,9 @@ filter: value: ["Wi-Fi"] - name: "Project Difficulty" value: ["Beginner"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c @@ -51,6 +51,9 @@ requires: condition: [device_has_devinfo] - name: emlib_ldma condition: [device_has_devinfo] +- name: device_needs_ram_execution + condition: + - si91x_common_flash toolchain_settings: - option: gcc_compiler_option value: -Wall -Werror diff --git a/examples/snippets/wlan/http_otaf/app.c b/examples/snippets/wlan/http_otaf/app.c index 2da442533..b9db57252 100644 --- a/examples/snippets/wlan/http_otaf/app.c +++ b/examples/snippets/wlan/http_otaf/app.c @@ -57,8 +57,9 @@ * Constants ******************************************************/ //! Type of FW update -#define M4_FW_UPDATE 0 -#define TA_FW_UPDATE 1 +#define M4_FW_UPDATE 0 +#define TA_FW_UPDATE 1 +#define COMBINED_FW_UPDATE 2 //! Set FW update type #define FW_UPDATE_TYPE TA_FW_UPDATE @@ -99,7 +100,7 @@ //! Server port number #define HTTP_PORT 443 //! Server URL -#if FW_UPDATE_TYPE +#if (FW_UPDATE_TYPE == TA_FW_UPDATE) #define HTTP_URL "rps/firmware.rps" #else #define HTTP_URL "isp.bin" @@ -138,7 +139,7 @@ char *hostname = "si917updates.blob.core.windows.net"; //! HTTP Server IP address. #define HTTP_SERVER_IP_ADDRESS "192.168.0.100" //! HTTP resource name -#if FW_UPDATE_TYPE +#if (FW_UPDATE_TYPE == TA_FW_UPDATE) #define HTTP_URL "rps/firmware.rps" #else #define HTTP_URL "isp.bin" @@ -283,7 +284,7 @@ void application_start(const void *unused) sl_status_t status = SL_STATUS_OK; uint16_t flags = FLAGS; char server_ip[16]; -#if FW_UPDATE_TYPE +#if (FW_UPDATE_TYPE == TA_FW_UPDATE) sl_wifi_firmware_version_t version = { 0 }; #endif #if defined(AWS_ENABLE) || defined(AZURE_ENABLE) @@ -328,7 +329,7 @@ void application_start(const void *unused) } break; case WLAN_FIRMWARE_UPDATE: { -#if FW_UPDATE_TYPE +#if (FW_UPDATE_TYPE == TA_FW_UPDATE) status = sl_wifi_get_firmware_version(&version); print_firmware_version(&version); #endif @@ -393,7 +394,7 @@ void application_start(const void *unused) app_state = WLAN_NET_DOWN_STATE; } break; case WLAN_NET_DOWN_STATE: { -#if FW_UPDATE_TYPE +#if (FW_UPDATE_TYPE == TA_FW_UPDATE) //! Client deinitialization status = sl_net_deinit(SL_NET_WIFI_CLIENT_INTERFACE); if (status != SL_STATUS_OK) { diff --git a/examples/snippets/wlan/http_otaf/http_otaf_ncp.slcp b/examples/snippets/wlan/http_otaf/http_otaf_ncp.slcp index 26aa8cd1d..7de3e9625 100644 --- a/examples/snippets/wlan/http_otaf/http_otaf_ncp.slcp +++ b/examples/snippets/wlan/http_otaf/http_otaf_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/http_otaf/http_otaf_soc.slcp b/examples/snippets/wlan/http_otaf/http_otaf_soc.slcp index 81871b030..23c6d4ecf 100644 --- a/examples/snippets/wlan/http_otaf/http_otaf_soc.slcp +++ b/examples/snippets/wlan/http_otaf/http_otaf_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/http_otaf/http_otaf_uart_ncp.slcp b/examples/snippets/wlan/http_otaf/http_otaf_uart_ncp.slcp index d940838c8..15ba24856 100644 --- a/examples/snippets/wlan/http_otaf/http_otaf_uart_ncp.slcp +++ b/examples/snippets/wlan/http_otaf/http_otaf_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/http_otaf/readme.md b/examples/snippets/wlan/http_otaf/readme.md index c9b95990c..4e11351c8 100644 --- a/examples/snippets/wlan/http_otaf/readme.md +++ b/examples/snippets/wlan/http_otaf/readme.md @@ -19,14 +19,14 @@ This application shows how to update the NWP or M4 firmware of a device via Wi-Fi by downloading an update from a remote HTTP/HTTPS server. The server can be run on a local PC(Apache server) or hosted on a cloud service like Amazon AWS or Microsoft Azure. Here's how the update process works: -> **Note:** By enabling the `HTTPS_SUPPORT` flag in the `app.c` file, the same HTTP OTA (Over-the-Air) application can be used for HTTPS OTA. +> **Note:** By enabling the `HTTPS_SUPPORT` flag in the `app.c` file, the same HTTP Over-the-Air (OTA) application can be used for HTTPS OTA. - **Connection**: The device connects to a Wi-Fi network and acts as a HTTP/HTTPS client. - **Request**: The device sends a request to the HTTP/HTTPS server for the firmware update file. - **Download**: The server sends the firmware file to the device. - **Update**: The device writes the new firmware to its memory and then restarts to complete the update. -This process allows the device to update its software over the air (OTA) without needing a physical connection. +This process allows the device to update its software OTA without needing a physical connection. ## Prerequisites/Setup Requirements @@ -79,15 +79,15 @@ For details on the project folder structure, see the [WiSeConnect Examples](http ## Application Build Environment -The application can be configured to suit user requirements and development environment. Read through the following sections and make any changes needed. +The application can be configured to suit user requirements and the development environment. Read through the following sections and make any changes needed. -- The application uses the default configurations as provided in the **DEFAULT_WIFI_CLIENT_PROFILE** in **sl_net_default_values.h** and user can choose to configure these parameters as needed. +- The application uses the default configurations as provided in the **DEFAULT_WIFI_CLIENT_PROFILE** in **sl_net_default_values.h** and the user can choose to configure these parameters as needed. - In the Project explorer pane, expand the **config** folder and open the ``sl_net_default_values.h`` file. Configure the following parameters to enable SiWx91x to connect to your Wi-Fi network. -- STA instance related parameters +- STA instance related parameters: - - DEFAULT_WIFI_CLIENT_PROFILE_SSID refers to the name with which Wi-Fi network that shall be advertised and Si91X module is connected to it. + - DEFAULT_WIFI_CLIENT_PROFILE_SSID refers to the name with which the Wi-Fi network will be advertised and Si91X module is connected to it. ```c #define DEFAULT_WIFI_CLIENT_PROFILE_SSID "YOUR_AP_SSID" @@ -107,11 +107,11 @@ The application can be configured to suit user requirements and development envi - Other STA instance configurations can be modified if required in **DEFAULT_WIFI_CLIENT_PROFILE** configuration structure. -- Below mentioned configurations in ``app.c`` file can be configured as per requirements +- The following configurations in the ``app.c`` file can be configured as per requirements: - Select Firmware update type - - For NWP firmware upgrade, set FW_UPDATE_TYPE to TA_FW_UPDATE and for M4 firmware upgrade, set FW_UPDATE_TYPE to M4_FW_UPDATE and for Combined firmware upgrade, set FW_UPDATE_TYPE to COMBINED_FW_UPDATE + - For NWP firmware upgrade, set FW_UPDATE_TYPE to TA_FW_UPDATE and for M4 firmware upgrade, set FW_UPDATE_TYPE to M4_FW_UPDATE. For Combined firmware upgrade, set FW_UPDATE_TYPE to COMBINED_FW_UPDATE ```c //! Type of FW update @@ -123,18 +123,18 @@ The application can be configured to suit user requirements and development envi #define FW_UPDATE_TYPE TA_FW_UPDATE ``` -- Based on the type of server (Apache/AWS S3 bucket/Azure Blob Storage) from which firmware files needs to be downloaded, the below mentioned parameters needs to be configured. -- Configure FLAGS to choose the version and security type to be enabled +- Based on the type of server (Apache/AWS S3 bucket/Azure Blob Storage) from which firmware files needs to be downloaded, the parameters below need to be configured. +- Configure FLAGS to choose the version and security type to be enabled. - Valid configurations are : + Valid configurations are: ```c #define HTTPS_SUPPORT BIT(0) // Set HTTPS_SUPPORT to use HTTPS feature - #define HTTPV6 BIT(3) // Enable IPv6 set this bit in FLAGS, Default is IPv4 + #define HTTPV6 BIT(3) // Enable IPv6. Set this bit in FLAGS. Default is IPv4 #define HTTP_V_1_1 BIT(6) // Set HTTP_V_1_1 to use HTTP version 1.1 ``` -- In the application, **AWS_ENABLE** macro is enabled by default. Depending on the requirement user can enable downloading firmware from Azure Blob storage (Enable Macro **AZURE_ENABLE**). +- In the application, the **AWS_ENABLE** macro is enabled by default. Depending on the requirement, the user can enable downloading firmware from Azure Blob storage (Enable Macro **AZURE_ENABLE**). - Else if both **AWS_ENABLE** and **AZURE_ENABLE** macros are disabled, HTTP/HTTPS Apache server can be used to download the firmware.
- In the application, the following parameters should be configured: - HTTP_PORT refers to HTTP Server port number @@ -181,7 +181,7 @@ The application can be configured to suit user requirements and development envi - Include Starfield root certificate file for SSL connection. - > **Note:** The certificate authority for Amazon AWS S3 is Starfield, hence we need to include Starfield Root certification for SSL connection to be successful. This certificate is already included in the SDK in linear array format ``aws_starfield_ca.pem.h`` which can be directly used for SSL connection to AWS S3. + > **Note:** The certificate authority for Amazon AWS S3 is Starfield, so we need to include Starfield Root certification for SSL connection to be successful. This certificate is already included in the SDK in linear array format ``aws_starfield_ca.pem.h``, which can be directly used for SSL connection to AWS S3. - Extract the hostname from AWS S3 bucket URL `https://.s3..amazonaws.com/firmware.rps` and provide it in **hostname**. @@ -203,9 +203,9 @@ The application can be configured to suit user requirements and development envi char *hostname ="example.s3.ap-south-1.amazonaws.com"; ``` - > **Note:** The `USERNAME` and `PASSWORD` is provided as empty string "" since the S3 bucket URL created has public access provided. Refer [Configuring AWS S3 Bucket](#configuring-aws-s3-bucket) section on how to upload Firmware in AWS S3 Bucket. + > **Note:** The `USERNAME` and `PASSWORD` is provided as empty string "" because the S3 bucket URL that was created has public access provided. Refer to [Configuring AWS S3 Bucket](#configuring-aws-s3-bucket) section on how to upload Firmware in AWS S3 Bucket. - - For Private resource: While trying to download the private resource, please make sure to create the pre-signed URL and use it in HTTP_URL as shown below. + - For Private resource: While trying to download the private resource, make sure to create the pre-signed URL and use it in the HTTP_URL as shown below. ```C #define HTTP_URL "filename?query_parameters" // This should be used when pre-signed URLs are passed ``` @@ -213,15 +213,15 @@ The application can be configured to suit user requirements and development envi - For **Azure Blob Storage**: - Include Azure Baltimore certificate file for SSL connection. - > **Note:** This certificate is already included in the SDK in linear array format ``azure_baltimore_ca.pem.h`` which can be directly used for SSL connection to Azure Blob Storage. + > **Note:** This certificate is already included in the SDK in linear array format ``azure_baltimore_ca.pem.h``, which can be directly used for SSL connection to Azure Blob Storage. - Extract the hostname from Azure Blob Storage URL `https://.blob.core.windows.net//firmware.rps` and provide it in **hostname**. - > Example: For Azure Blob Storage URL ", hostname will be "example..blob.core.windows.net". + > Example: For Azure Blob Storage URL ", the hostname will be "example..blob.core.windows.net". - Extract the firmware package name from URL `.blob.core.windows.net//firmware.rps` and provide it in **HTTP_URL**. - > Example: For Azure Blob Storage URL "https://example1.blob.core.windows.net/example2/firmware.rps>", HTTP_URL will be "example2/firmware.rps" + > Example: For Azure Blob Storage URL "https://example1.blob.core.windows.net/example2/firmware.rps>", the HTTP_URL will be "example2/firmware.rps". - Configurations for Azure Blob Storage ```c @@ -235,9 +235,9 @@ The application can be configured to suit user requirements and development envi char *hostname ="example.blob.core.windows.net"; ``` - > **Note:** The `USERNAME` and `PASSWORD` is provided as empty string "" since the Azure Blob storage URL created has public access provided. Refer to [Configuring Azure Blob Storage](#configuring-azure-blob-storage) on how to upload Firmware in Azure Blob storage. + > **Note:** The `USERNAME` and `PASSWORD` is provided as empty string "" because the Azure Blob storage URL that was created has public access provided. Refer to [Configuring Azure Blob Storage](#configuring-azure-blob-storage) on how to upload Firmware in Azure Blob storage. -- The **station_init_configuration** from `app.c` should be modified as per below requirements +- The **station_init_configuration** from `app.c` should be modified as per the requirements below. - For **Apache HTTP Server**: @@ -266,7 +266,7 @@ The application can be configured to suit user requirements and development envi ``` - Certificate Loading - - The **[sl_net_set_credential()](https://docs.silabs.com/wiseconnect/3.0.13/wiseconnect-api-reference-guide-nwk-mgmt/net-credential-functions#sl-net-set-credential)** API expects the certificate in the form of linear array. Convert the pem certificate into linear array form using python script provided in the SDK `/resources/scripts/certificate_script.py`. + - The **[sl_net_set_credential()](https://docs.silabs.com/wiseconnect/3.0.13/wiseconnect-api-reference-guide-nwk-mgmt/net-credential-functions#sl-net-set-credential)** API expects the certificate in the form of a linear array. Convert the pem certificate into linear array form using python script provided in the SDK `/resources/scripts/certificate_script.py`. - For example : If the certificate is ca-certificate.pem, enter the command in the following way: `python certificate_script.py ca-certificate.pem` @@ -274,7 +274,7 @@ The application can be configured to suit user requirements and development envi - Root CA certificate needs to be converted as mentioned above. - - After the conversion, place the converted file in `/resources/certificates/` path and include the certificate file in ``app.c`` + - After the conversion, place the converted file in the `/resources/certificates/` path and include the certificate file in ``app.c`` - For HTTPS Apache server @@ -305,6 +305,9 @@ The application can be configured to suit user requirements and development envi // Load Security Certificates status = sl_net_set_credential(SL_NET_TLS_SERVER_CREDENTIAL_ID(0), SL_NET_SIGNING_CERTIFICATE, azure_baltimore_ca, (sizeof(azure_baltimore_ca) - 1)); ``` +**Note:** +> AWS has announced that there will be changes in their root CA chain. More details can be found in the reference links. (https://aws.amazon.com/blogs/security/acm-will-no-longer-cross-sign-certificates-with-starfield-class-2-starting-august-2024/) +> We are providing both root CAs (Starfield class-2 and Starfield G2) in aws_starfield_ca.pem.h, which is located in the WiSeConnect directory `/resources/certificates/aws_starfield_ca.pem.h` ## Test the Application @@ -342,7 +345,7 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ![ACL](resources/readme/aws_bucket_acl_enable.png) -- Under **Bucket settings for Block Public Access** uncheck **Block all public access**. +- Under **Bucket settings for Block Public Access**, uncheck **Block all public access**. ![Block all public access](resources/readme/aws_bucket_public_access.png) @@ -354,111 +357,111 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ![Create bucket](resources/readme/image392.png) -- Choose the created bucket from the list of buckets in console. +- Choose the created bucket from the list of buckets in the console. - Upload the file in creating bucket. ![Upload the file](resources/readme/image393.png) -- Add the file to the bucket +- Add the file to the bucket. ![Add the file to the bucket](resources/readme/image394.png) -- Setting permission to public access +- Set permission to public access. ![Setting permission to public access](resources/readme/image395.png) -- After uploading the file, click on the file +- After uploading the file, click on the file. ![S3_URL_1](resources/readme/aws_bucket_getting_url_1.png) -- Get the object URL inside bucket/properties, like below : +- Get the object URL inside bucket/properties, like below: ![S3_URL_2](resources/readme/aws_bucket_getting_url_2.png) ### Configuring Azure Blob Storage -* Login to your Azure account and go to Storage Account or search for Storage Account +* Login to your Azure account and go to Storage Account or search for Storage Account. ![Search for Storage Account](resources/readme/image396.png) -* Open storage account and create a new storage +* Open storage account and create a new storage. ![Create a new storage](resources/readme/image397.png) -* While creating a storage account select your common Resource Group you have already created and provide a storage account name. -* Select preferred location, for the account kind select Blob-Storage and Replication select LRS +* While creating a storage account, select your common Resource Group you have already created and provide a storage account name. +* Select preferred location. For the account kind, select Blob-Storage and Replication select LRS. ![Select preferred location](resources/readme/image398.png) -* Review and create your storage account -* Now download the Windows Storage Explorer here +* Review and create your storage account. +* Now download the Windows Storage Explorer here. * After installing the storage explorer, open Azure Storage Explorer in your Windows machine and navigate to Account management and add your Azure account. ![Open Azure Storage Explorer](resources/readme/image399.png) ![Add your Azure account](resources/readme/image400.png) -* Click on Open connect dialog, where you need to select a Resource from the list as shown below +* Click on Open connect dialog, where you need to select a Resource from the list as shown below. ![Select a Resource from the list](resources/readme/image401.png) -* Select Storage account or service, then select connection method as Connection String +* Select Storage account or service, then select connection method as Connection String. ![Select connection method as Connection String](resources/readme/image402.png) -* In the Azure Portal, navigate to your newly created storage account and select Access Keys, copy the connection string for Key1 +* In the Azure Portal, navigate to your newly created storage account and select Access Keys. Copy the connection string for Key1. ![Copy the connection string for Key1](resources/readme/image403.png) -* The connection string has to be given in the local Azure Storage Explorer app -* Up on successfully adding, you should now see the EXPLORER tab on your Azure Storage Explorer display all the storages available in your account +* The connection string has to be given in the local Azure Storage Explorer app. +* Upon successfully adding, you should now see the EXPLORER tab on your Azure Storage Explorer displaying all the storages available in your account. ![Display all the storages available in your account](resources/readme/image404.png) -* In the Azure Portal search for Storage Explorer and work the same thing there also. But it is in preview so better to use Windows Azure Storage Explorer. +* In the Azure Portal, search for Storage Explorer and perform the same steps as above. However, this option is in preview, so it is better to use Windows Azure Storage Explorer. * Create a new blob container as shown below: ![Create a new blob container](resources/readme/image405.png) -* The route folder name you give is quite important as all the further connections happen from here. For this I am choosing a file extension -* The name used here is “rps” -* This should create a new folder, which looks like this +* The route folder name you provide is quite important as all the further connections happen from here. For this example, we chose a file extension. +* The name used here is “rps”. +* This should create a new folder, which looks like this: ![New folder looks like this](resources/readme/image406.png) -* Change the Public Access Level, right click on the new folder and select Set Container Access Level +* Change the Public Access Level by right-clicking on the new folder and selecting Set Container Access Level. ![Select Set Container Access Level](resources/readme/image407.png) -* We can upload the Device Update File +* We can upload the Device Update File: ![Upload the Device Update File](resources/readme/image408.png) -* Once done uploading, we can see the file +* Once done uploading, we can see the file: ![We can see the file](resources/readme/image409.png) -* Right click on the uploaded file, then select properties. You will find a URL path. +* Right-click on the uploaded file, then select properties. You will find a URL path. ![Find a URL path](resources/readme/image410.png) -* Copy it this link is used for accessing our device update files +* Copy the URL path as this link is used for accessing our device update files. ![This link is used for accessing our device update files](resources/readme/image411.png) -* By accessing this URL, you can download the Device Update files in application +* By accessing this URL, you can download the Device Update files in the application. ### Configuring and Uploading Firmware on Apache HTTP - Download and Install Wamp-Apache Server - - Open the below link in your system browser. + - Open the following link in your system browser: Wamp Server - () - - Under Downloads, Download the latest version of WAMP server for 32bit or 64bit machine. + - Under Downloads, download the latest version of WAMP server for 32 bit or 64 bit machine. - Install Wamp-Apache server with all the default settings. - Make sure the Wamp-Apache server is present in C:\ directory - - Configure a HTTP server + - Configure an HTTP server. - Navigate to C:\wamp64\bin\apache\apache2.4.46\conf - Open httpd.conf file with an editor. - - Change the below lines into system IP address + - Change the following lines into system IP address: ```sh Listen {System-IP-Address}:80 @@ -468,34 +471,34 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ``` - Save the file and Exit. -- Open command prompt and run with Administrator Privilege's. +- Open command prompt and run with Administrator Privileges. - Navigate to directory C:\wamp64\bin\apache\apache2.4.46\bin - Add Apache as a Windows Service: `httpd.exe -k install` -- While the install is in progress, you will be prompted to Windows Network Access page as shown below. Make sure you allow both Private and Public network access. +- While the install is in progress, you will be directed to the Windows Network Access page as shown below. Make sure you allow both Private and Public network access. ![Windows Network Access page](resources/readme/image412.png) - Start Apache Service in Windows - Open RUN in windows using WIN+R button. - - Input "services.msc" into RUN - - This will open your Windows System Services - - In the list of services running you can find Apache2.x present. - - Start the service as shown below + - Input "services.msc" into RUN. + - This will open your Windows System Services. + - In the list of services running, you can find Apache2.x. + - Start the service as shown below: ![Start the service](resources/readme/image413.png) -- Now that your Apache has started and running, check it by using your browser. Open a Web browser and type the machine IP in the address bar and hit Enter. You should see the below, if server has started successfully. +- Now that your Apache has started and running, check it by using your browser. Open a Web browser and type the machine IP in the address bar and hit Enter. You should see the window below, if the server has started successfully. ![If server has started successfully.](resources/readme/image414.png) -- As you can see the connection is "Not Secure" means it is running HTTP server. -- Configure HTTP Wamp-Apache Server to Download firmware - - Goto the Wamp Root directory, in my case it is C:\wamp64 and navigate to "www" folder C:\wamp64\www. - - Create a new folder in that directory, in my case I created a folder named "Firmware". [Folder Structure: C:\wamp64\www\Firmware] - - In the "Firmware" folder create an "index.html" file and write below contents to the file. +- As you can see, the connection is "Not Secure", meaning it is running the HTTP server. +- Configure the HTTP Wamp-Apache Server to Download firmware: + - Go to the Wamp Root directory. In this example, it is C:\wamp64 and navigate to "www" folder C:\wamp64\www. + - Create a new folder in that directory. In this example, I created a folder named "Firmware". [Folder Structure: C:\wamp64\www\Firmware]. + - In the "Firmware" folder, create an "index.html" file and write the following contents to the file. ```html @@ -508,8 +511,8 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ``` -- This code will link your resources to Apache server, so that those files can be downloaded. -- you can edit href values in the index.html to your firmware file names. +- This code will link your resources to the Apache server so those files can be downloaded. +- You can edit href values in the index.html to your firmware file names. - Make sure to copy all the firmware files into the present directory, C:\wamp64\www\Firmware. Save the file and Exit. ```html @@ -519,30 +522,30 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise - Configure HTTPD.conf file for Wamp-Apache Server - Open httpd.conf file in C:\wamp64\bin\apache\apache2.4.46\conf\httpd.conf - - Search or Find "DocumentRoot" and change it to following configuration. Save the file and Exit + - Search or Find "DocumentRoot" and change it to the following configuration. Save the file and Exit. ```sh "${INSTALL_DIR}/www/Firmware" ``` - Restart Apache Service - - Open Windows services, "WIN+R" → "services.msc" → ENTER - - Check for Apache service and Restart the service - - In the above configuration, we have created a resource for our server in "Firmware" folder. - - Our access resource URL looks as shown in following + - Open Windows services, "WIN+R" → "services.msc" → ENTER. + - Check for Apache service and restart the service. + - In the above configuration, we have created a resource for our server in the "Firmware" folder. + - Our access resource URL looks as shown in following: - `http:////` > -> Eg: +> For example: >- >- -- Giving the `http:///` in browser should load as shown in following. Clicking on any link should download the Firmware files. +- Entering `http:///` in the browser should load the window shown in following image. Clicking on any link should download the firmware files. ![Webpage in browser](resources/readme/image415.png) -- Get the resource Information and test with Application - - In the SiWx91x FOTA application, make below changes and test application this should start downloading firmware. +- Get the resource information and test with application. + - In the SiWx91x FOTA application, make the changes below and test the application; this should start downloading firmware. ```c #define HTTP_SERVER_IP_ADDRESS "192.168.1.4" //Replace this values related to your requirements @@ -550,16 +553,16 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise #define HTTP_HOSTNAME "192.168.1.4"//Replace this values related to your requirements ``` - > **Warning:** Make sure that you are able to Access the WAMP-Apache Server (with its IP Address) is accessible to other systems in the same network, if not follow the Changing PHP Configurations. Else proceed with next steps. + > **Warning:** Make sure that you are able to access the WAMP-Apache Server (with its IP Address), and that it is accessible to other systems in the same network. If not, follow the Changing PHP Configurations. Otherwise, proceed with the next steps. - Changing PHP Configuration - - The following steps to be done only when you face an issue of not able to access the WAMP-Server from other machines in the network. Issue shown below : + - Complete the following steps only if you are unable to access the WAMP-Server from other machines in the network, as shown in the image below: ![Issue of not able to access the WAMP-Server from other machines](resources/readme/image416.png) - - Give permissions to the newly created resource `""` - - Open "phpmyadmin.conf" file in "C:\wamp64\alias\phpmyadmin.conf" - - Add the line shown in following into the end of file "phpmyadmin.conf" file. Save and exit the file. + - Give permissions to the newly created resource `""`. + - Open "phpmyadmin.conf" file in "C:\wamp64\alias\phpmyadmin.conf". + - Add the line shown in the following image to the end of the "phpmyadmin.conf" file. Save and exit the file. ```sh /"> @@ -573,25 +576,25 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ``` - - Restart Apache service and now the resource should be accessible from any systems connected in the same network. + - Restart the Apache service and now the resource should be accessible from any systems connected in the same network. -> **Note:** Even though if you are not able to access `http:///` this page directly, you will be able to access your resources from here `http:////` as we gave only permissions for this +> **Note:** Even if you are not able to access `http:///` this page directly, you will be able to access your resources from here `http:////`. ### Configuring and Uploading Firmware on Apache HTTPs -HTTPs Sever configuration for Apache requires Wamp server, if you have not installed it, follow the **"Step 1: Download and Install Wamp-Apache Server"** step and continue with the HTTPS steps in this document. +The HTTPs server configuration for Apache requires the Wamp server. If you have not installed it, follow the procedures in **"Step 1: Download and Install Wamp-Apache Server"** and continue with the HTTPS steps in this document. -- **Download and Install OPENSSL for windows** +- **Download and install OPENSSL for Windows** - OpenSSL for windows from here (). - - Do default install for OpenSSL. - - We can only run OpenSSL using command prompt, for that we need to first find the openssl.exe file. - - Normally it will be in "C:\Program Files\OpenSSL-Win64\bin\openssl.exe" + - Choose default install for OpenSSL. + - We can only run OpenSSL using command prompt, and for that we need to first find the openssl.exe file. + - Normally, it will be in "C:\Program Files\OpenSSL-Win64\bin\openssl.exe". - **Generate required certs** - > **Note:** If you already have the required certs to run the server then, skip the **Generate required certs** step, copy your certs to `C:\wamp64\bin\apache\apache2.4.46\conf` directory and update the `httpd-ssl.conf` file with these certificate paths shown in **HTTPD Configuration** step. + > **Note:** If you already have the required certs to run the server, you can skip the **Generate required certs** step. Copy your certs to `C:\wamp64\bin\apache\apache2.4.46\conf` directory and update the `httpd-ssl.conf` file with the certificate paths shown in the **HTTPD configuration** step. - - Open Command Prompt in Administrator privilege's. - - Change directory to your openssl.exe file "cd C:\Program Files\OpenSSL-Win64\bin\" + - Open Command Prompt in Administrator privileges. + - Change directory to your openssl.exe file "cd C:\Program Files\OpenSSL-Win64\bin\". - Execute the following command to generate a private.key file with AES 256 encryption. ```sh @@ -601,11 +604,11 @@ HTTPs Sever configuration for Apache requires Wamp server, if you have not insta openssl.exe req -new -x509 -nodes -sha1 -key private.key -out certificate.crt -days 36500 -config C:\wamp64\bin\apache\apache2.4.46\conf\openssl.conf ``` -- Now there will be two files created [Private.key and certificate.crt] in "C:\Program Files\OpenSSL-Win64\bin\" directory, copy them to "C:\wamp64\bin\apache\apache2.4.46\conf" +- Now there will be two files created [Private.key and certificate.crt] in the "C:\Program Files\OpenSSL-Win64\bin\" directory. Copy them to "C:\wamp64\bin\apache\apache2.4.46\conf". -- **HTTPD Configuration** +- **HTTPD configuration** - Open ``httpd.conf`` file in "C:\wamp64\bin\apache\apache2.4.46\conf" - - Uncomment the below shown lines in that file. Save and Exit. + - Uncomment the lines shown below in that file. Save and Exit. ```sh LoadModule ssl_module modules/mod_ssl.so @@ -613,10 +616,10 @@ HTTPs Sever configuration for Apache requires Wamp server, if you have not insta LoadModule socache_shmcb_module modules/mod_socache_shmcb.so ``` - - Open "php.ini" file in "C:\wamp64\bin\php\php5.6.40" and uncomment the below line in the file + - Open "php.ini" file in "C:\wamp64\bin\php\php5.6.40" and uncomment the below line in the file. `extension=php_openssl.dll` - - Open ``httpd-ssl.conf`` file in "C:\wamp64\bin\apache\apache2.4.46\conf\extra" and update the below paths with proper information (i.e provide system relative paths) + - Open ``httpd-ssl.conf`` file in "C:\wamp64\bin\apache\apache2.4.46\conf\extra" and update the below paths with proper information (i.e., provide system relative paths). ``` sh @@ -631,13 +634,13 @@ HTTPs Sever configuration for Apache requires Wamp server, if you have not insta SSLCertificateKeyFile "C:/wamp64/bin/apache/apache2.4.46/conf/private.key" ``` - - Run below command to check if the configurations given above are proper or not. If the configurations are proper, it will return "Syntax OK" + - Run the command below to check if the configurations given above are correct. If the configurations are correct, the command will return "Syntax OK". `httpd.exe -t` -- **Configure HTTPS Wamp-Apache Server to Download firmware** - - Go to the Wamp Root directory "C:\wamp64" and navigate to "www" +- **Configure HTTPS Wamp-Apache Server to download firmware** + - Go to the Wamp Root directory "C:\wamp64" and navigate to "www". - Create a new folder in that directory "Firmware". [Folder Structure: C:\wamp64\www\Firmware] - - In the "Firmware" folder create an "index.html" file and write below contents to the file. + - In the "Firmware" folder, create an "index.html" file and write the following contents to the file: ```html @@ -650,11 +653,11 @@ HTTPs Sever configuration for Apache requires Wamp server, if you have not insta ``` -- This code will link your resources to Apache server, so that those files can be downloaded. +- This code will link your resources to the Apache server so that those files can be downloaded. -- Make sure to copy all the firmware files into the present directory, C:\wamp64\www\Firmware +- Make sure to copy all the firmware files into the present directory, C:\wamp64\www\Firmware. -- you can edit href values in the index.html to your firmware file names. +- You can edit the href values in the index.html to your firmware file names. ```html Download_Version_6

@@ -664,15 +667,15 @@ HTTPs Sever configuration for Apache requires Wamp server, if you have not insta - Save the file and Exit. - **Restart Server** > -> - Open RUN, "WIN+R" → "services.msc" → ENTER +> - Open RUN, "WIN+R" → "services.msc" → ENTER. > - Restart the Apache service. -> - Open browser and give your Apache server URL +> - Open your browser and enter your Apache server URL. ![Give your Apache server URL](resources/readme/image418.png) -> - Here click on "Advanced Settings" and click on "Proceed to 192.168.43.85 (unsafe)" +> - Click on "Advanced Settings" and then click on "Proceed to 192.168.43.85 (unsafe)". > - You will be able to access the page and resources in HTTPS. ![Access the page and resources in HTTPS](resources/readme/image419.png) - > **Note:** Make sure to check your HTTPS server from other local machines present in the same network. It should be accessible. \ No newline at end of file + > **Note:** Make sure to check your HTTPS server from other local machines present in the same network. It should be accessible. diff --git a/examples/snippets/wlan/http_otaf_twt/app.c b/examples/snippets/wlan/http_otaf_twt/app.c index 80274324e..b86bf77fe 100644 --- a/examples/snippets/wlan/http_otaf_twt/app.c +++ b/examples/snippets/wlan/http_otaf_twt/app.c @@ -55,10 +55,11 @@ * Constants ******************************************************/ //! Type of FW update -#define M4_FW_UPDATE 0 -#define TA_FW_UPDATE 1 -#define TWT_SCAN_TIMEOUT 10000 -#define TWT_AUTO_CONFIG 1 +#define M4_FW_UPDATE 0 +#define TA_FW_UPDATE 1 +#define TWT_SCAN_TIMEOUT 10000 +#define TWT_AUTO_CONFIG 1 +#define COMBINED_FW_UPDATE 2 // Use case based TWT selection params #define DEVICE_AVERAGE_THROUGHPUT 20000 @@ -107,7 +108,7 @@ //! Server port number #define HTTP_PORT 443 //! Server URL -#if FW_UPDATE_TYPE +#if (FW_UPDATE_TYPE == TA_FW_UPDATE) #define HTTP_URL "SiWG917-A.2.9.0.0.16.rps" #else #define HTTP_URL "wifi_wlan_throughput_isp.bin" @@ -144,7 +145,7 @@ char *hostname = "si917updates.blob.core.windows.net"; //! HTTP Server IP address. #define HTTP_SERVER_IP_ADDRESS "192.168.0.100" //! HTTP resource name -#if FW_UPDATE_TYPE +#if (FW_UPDATE_TYPE == TA_FW_UPDATE) #define HTTP_URL "SiWG917-A.2.9.0.0.16.rps" #else #define HTTP_URL "wifi_access_point_isp.bin" @@ -346,7 +347,7 @@ sl_status_t http_otaf_app() char server_ip[16]; sl_wifi_performance_profile_t performance_profile; -#if FW_UPDATE_TYPE +#if (FW_UPDATE_TYPE == TA_FW_UPDATE) sl_wifi_firmware_version_t version = { 0 }; status = sl_wifi_get_firmware_version(&version); VERIFY_STATUS_AND_RETURN(status); @@ -467,7 +468,7 @@ sl_status_t http_otaf_app() printf("\r\nUpdating the firmware...\r\n"); } -#if FW_UPDATE_TYPE +#if (FW_UPDATE_TYPE == TA_FW_UPDATE) status = sl_net_deinit(SL_NET_WIFI_CLIENT_INTERFACE); if (status != SL_STATUS_OK) { printf("\r\nError while wifi deinit: 0x%lX \r\n", status); diff --git a/examples/snippets/wlan/http_otaf_twt/http_otaf_twt_ncp.slcp b/examples/snippets/wlan/http_otaf_twt/http_otaf_twt_ncp.slcp index 7753202b7..a4c6d1a54 100644 --- a/examples/snippets/wlan/http_otaf_twt/http_otaf_twt_ncp.slcp +++ b/examples/snippets/wlan/http_otaf_twt/http_otaf_twt_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/http_otaf_twt/http_otaf_twt_soc.slcp b/examples/snippets/wlan/http_otaf_twt/http_otaf_twt_soc.slcp index 56660b162..0cc835479 100644 --- a/examples/snippets/wlan/http_otaf_twt/http_otaf_twt_soc.slcp +++ b/examples/snippets/wlan/http_otaf_twt/http_otaf_twt_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/http_otaf_twt/readme.md b/examples/snippets/wlan/http_otaf_twt/readme.md index c426aaeef..645c87ec7 100644 --- a/examples/snippets/wlan/http_otaf_twt/readme.md +++ b/examples/snippets/wlan/http_otaf_twt/readme.md @@ -19,20 +19,20 @@ ## Purpose/Scope -This application demonstrates how to update new firmware to SiWx91x using local HTTP/HTTPS server or cloud storage server with TWT. +This application demonstrates how to update new firmware to SiWx91x using a local HTTP/HTTPS server or cloud storage server with TWT. > **Note:** By enabling HTTPS_SUPPORT Flag in `app.c` file, the same HTTP_OTAF application is used for HTTPS_OTAF. -In this application, the SiWx91x connects to an Access Point, configures as HTTP/HTTPS client and establishes connection with HTTP/HTTPS server (Apache server) or the cloud storage server (i.e., AWS S3 bucket/Azure Blob storage). After successful HTTP/HTTPS connection, SiWx91x sends firmware file request (HTTP GET Request) to remote server and server responds with Firmware file. +In this application, the SiWx91x connects to an Access Point, configures an HTTP/HTTPS client, and establishes connection with the HTTP/HTTPS server (Apache server) or the cloud storage server (i.e., AWS S3 bucket/Azure Blob storage). After successful HTTP/HTTPS connection, the SiWx91x sends the firmware file request (HTTP GET Request) to the remote server, which responds with the firmware file. -The server transferred firmware file gets loaded/updated in the SiWx91x flash memory. After successful firmware update, the [sl_si91x_http_otaf()](https://docs.silabs.com/wiseconnect/3.0.13/wiseconnect-api-reference-guide-fw-upgrade/service-firmware-upgrade-functions#sl-si91x-http-otaf) API returns success response. +The server transferred firmware file gets loaded/updated in the SiWx91x flash memory. After successful firmware update, the [sl_si91x_http_otaf()](https://docs.silabs.com/wiseconnect/3.0.13/wiseconnect-api-reference-guide-fw-upgrade/service-firmware-upgrade-functions#sl-si91x-http-otaf) API returns a success response. ## Prerequisites/Setup Requirements ### Hardware Requirements - Windows PC -- Wireless Access point +- Wireless Access Point - SiWx91x Wi-Fi Evaluation Kit. The SiWx91x supports multiple operating modes. See [Operating Modes]() for details. - **SoC Mode**: - Standalone @@ -77,15 +77,15 @@ For details on the project folder structure, see the [WiSeConnect Examples](http ## Application Build Environment -The application can be configured to suit user requirements and development environment. Read through the following sections and make any changes needed. +The application can be configured to suit user requirements and the development environment. Read through the following sections and make any changes needed. -- The application uses the default configurations as provided in the **DEFAULT_WIFI_CLIENT_PROFILE** in **sl_net_default_values.h** and user can choose to configure these parameters as needed. +- The application uses the default configurations as provided in the **DEFAULT_WIFI_CLIENT_PROFILE** in **sl_net_default_values.h** and the user can choose to configure these parameters as needed. - In the Project explorer pane, expand the **config** folder and open the ``sl_net_default_values.h`` file. Configure the following parameters to enable SiWx91x to connect to your Wi-Fi network. - STA instance related parameters - - DEFAULT_WIFI_CLIENT_PROFILE_SSID refers to the name with which Wi-Fi network that shall be advertised and Si91X module is connected to it. + - DEFAULT_WIFI_CLIENT_PROFILE_SSID refers to the name with which Wi-Fi network shall be advertised and Si91X module is connected to it. ```c #define DEFAULT_WIFI_CLIENT_PROFILE_SSID "YOUR_AP_SSID" @@ -109,29 +109,30 @@ The application can be configured to suit user requirements and development envi - Select Firmware update type - - For NWP firmware upgrade, set FW_UPDATE_TYPE to TA_FW_UPDATE and for M4 firmware upgrade, set FW_UPDATE_TYPE to M4_FW_UPDATE + - For NWP firmware upgrade, set FW_UPDATE_TYPE to TA_FW_UPDATE and for M4 firmware upgrade, set FW_UPDATE_TYPE to M4_FW_UPDATE. For Combined firmware upgrade, set FW_UPDATE_TYPE to COMBINED_FW_UPDATE. ```c //! Type of FW update #define M4_FW_UPDATE 0 #define TA_FW_UPDATE 1 + #define COMBINED_FW_UPDATE 2 //! Set FW update type #define FW_UPDATE_TYPE TA_FW_UPDATE ``` -- Based on the type of server (Apache/AWS S3 bucket/Azure Blob Storage) from which firmware files needs to be downloaded, the below mentioned parameters needs to be configured. -- Configure FLAGS to choose the version and security type to be enabled +- Based on the type of server (Apache/AWS S3 bucket/Azure Blob Storage) from which the firmware files need to be downloaded, the below mentioned parameters need to be configured. +- Configure FLAGS to choose the version and security type to be enabled. - Valid configurations are : + Valid configurations are: ```c #define HTTPS_SUPPORT BIT(0) // Set HTTPS_SUPPORT to use HTTPS feature - #define HTTPV6 BIT(3) // Enable IPv6 set this bit in FLAGS, Default is IPv4 + #define HTTPV6 BIT(3) // Enable IPv6. Set this bit in FLAGS. Default is IPv4 #define HTTP_V_1_1 BIT(6) // Set HTTP_V_1_1 to use HTTP version 1.1 ``` -- In the application, **AWS_ENABLE** macro is enabled by default. Depending on the requirement user can enable downloading firmware from Azure Blob storage (Enable Macro **AZURE_ENABLE**). +- In the application, the **AWS_ENABLE** macro is enabled by default. Depending on the requirements, the user can enable downloading firmware from Azure Blob storage (Enable Macro **AZURE_ENABLE**). - Else if both **AWS_ENABLE** and **AZURE_ENABLE** macros are disabled, HTTP/HTTPS Apache server can be used to download the firmware.
- In the application, the following parameters should be configured: - HTTP_PORT refers to HTTP Server port number @@ -158,7 +159,7 @@ The application can be configured to suit user requirements and development envi #define USERNAME "admin" #define PASSWORD "admin" ``` - > **Note:** Refer [Configuring and Uploading Firmware on Apache HTTP](#configuring-and-uploading-firmware-on-apache-http) section on how to set Apache Server up. + > **Note:** Refer to [Configuring and Uploading Firmware on Apache HTTP](#configuring-and-uploading-firmware-on-apache-http) section on how to set up Apache Server. - For **Apache HTTPS Server**: - Include Root certificate pem file for SSL connection. @@ -178,15 +179,15 @@ The application can be configured to suit user requirements and development envi - Include Starfield root certificate file for SSL connection. - > **Note:** The certificate authority for Amazon AWS S3 is Starfield, hence we need to include Starfield Root certification for SSL connection to be successful. This certificate is already included in the SDK in linear array format ``aws_starfield_ca.pem.h`` which can be directly used for SSL connection to AWS S3. + > **Note:** The certificate authority for Amazon AWS S3 is Starfield, so we need to include Starfield Root certification for SSL connection to be successful. This certificate is already included in the SDK in a linear array format ``aws_starfield_ca.pem.h``, which can be directly used for SSL connection to AWS S3. - Extract the hostname from AWS S3 bucket URL `https://.s3..amazonaws.com/firmware.rps` and provide it in **hostname**. - > Example: For S3 bucket URL ", hostname will be "example.s3.ap-south-1.amazonaws.com" + > Example: For S3 bucket URL ", hostname will be "example.s3.ap-south-1.amazonaws.com". - Extract the firmware package name from URL `https://.s3..amazonaws.com/firmware.rps` and provide it in **HTTP_URL** - > Example: For S3 bucket URL "", HTTP_URL will be "firmware.rps" + > Example: For S3 bucket URL "", HTTP_URL will be "firmware.rps". - Configurations for AWS S3 bucket ```c @@ -200,9 +201,9 @@ The application can be configured to suit user requirements and development envi char *hostname ="example.s3.ap-south-1.amazonaws.com"; ``` - > **Note:** The `USERNAME` and `PASSWORD` is provided as empty string "" since the S3 bucket URL created has public access provided. Refer [Configuring AWS S3 Bucket](#configuring-aws-s3-bucket) section on how to upload Firmware in AWS S3 Bucket. + > **Note:** The `USERNAME` and `PASSWORD` is provided as empty string "" since the S3 bucket URL that was created has public access provided. Refer to [Configuring AWS S3 Bucket](#configuring-aws-s3-bucket) section on how to upload Firmware in AWS S3 Bucket. - - For Private resource: While trying to download the private resource, please make sure to create the pre-signed URL and use it in HTTP_URL as shown below. + - For Private resource: While trying to download the private resource, make sure to create the pre-signed URL and use it in the HTTP_URL as shown below. ```C #define HTTP_URL "filename?query_parameters" // This should be used when pre-signed URLs are passed ``` @@ -210,7 +211,7 @@ The application can be configured to suit user requirements and development envi - For **Azure Blob Storage**: - Include Azure Baltimore certificate file for SSL connection. - > **Note:** This certificate is already included in the SDK in linear array format ``azure_baltimore_ca.pem.h`` which can be directly used for SSL connection to Azure Blob Storage. + > **Note:** This certificate is already included in the SDK in a linear array format ``azure_baltimore_ca.pem.h``, which can be directly used for SSL connection to Azure Blob Storage. - Extract the hostname from Azure Blob Storage URL `https://.blob.core.windows.net//firmware.rps` and provide it in **hostname**. @@ -218,7 +219,7 @@ The application can be configured to suit user requirements and development envi - Extract the firmware package name from URL `.blob.core.windows.net//firmware.rps` and provide it in **HTTP_URL**. - > Example: For Azure Blob Storage URL "https://example1.blob.core.windows.net/example2/firmware.rps>", HTTP_URL will be "example2/firmware.rps" + > Example: For Azure Blob Storage URL "https://example1.blob.core.windows.net/example2/firmware.rps>", HTTP_URL will be "example2/firmware.rps". - Configurations for Azure Blob Storage ```c @@ -232,9 +233,9 @@ The application can be configured to suit user requirements and development envi char *hostname ="example.blob.core.windows.net"; ``` - > **Note:** The `USERNAME` and `PASSWORD` is provided as empty string "" since the Azure Blob storage URL created has public access provided. Refer to [Configuring Azure Blob Storage](#configuring-azure-blob-storage) on how to upload Firmware in Azure Blob storage. + > **Note:** The `USERNAME` and `PASSWORD` is provided as empty string "" since the Azure Blob storage URL that was created has public access provided. Refer to [Configuring Azure Blob Storage](#configuring-azure-blob-storage) on how to upload Firmware in Azure Blob storage. -- The **station_init_configuration** from `app.c` should be modified as per below requirements +- The **station_init_configuration** from `app.c` should be modified as per the requirements below: - For **Apache HTTP Server**: @@ -247,7 +248,7 @@ The application can be configured to suit user requirements and development envi - For **Apache HTTPS Server**: ```c - // station_init_configuration structure should contain below configurations + // station_init_configuration structure should contain the configurations below: .tcp_ip_feature_bit_map = (TCP_IP_FEAT_DHCPV4_CLIENT | TCP_IP_FEAT_HTTP_CLIENT| TCP_IP_FEAT_EXTENSION_VALID | TCP_IP_FEAT_SSL) .ext_tcp_ip_feature_bit_map = EXT_FEAT_HTTP_OTAF_SUPPORT @@ -256,14 +257,14 @@ The application can be configured to suit user requirements and development envi - For **AWS S3 Bucket** and **Azure Blob Storage**: ```c - // station_init_configuration structure should contain below configurations + // station_init_configuration structure should contain the configurations below: .tcp_ip_feature_bit_map = (TCP_IP_FEAT_DHCPV4_CLIENT | TCP_IP_FEAT_HTTP_CLIENT| TCP_IP_FEAT_EXTENSION_VALID | TCP_IP_FEAT_SSL | TCP_IP_FEAT_DNS_CLIENT) .ext_tcp_ip_feature_bit_map = (EXT_FEAT_HTTP_OTAF_SUPPORT | EXT_TCP_IP_SSL_16K_RECORD) ``` - Certificate Loading - - The **[sl_net_set_credential()](https://docs.silabs.com/wiseconnect/3.0.13/wiseconnect-api-reference-guide-nwk-mgmt/net-credential-functions#sl-net-set-credential)** API expects the certificate in the form of linear array. Convert the pem certificate into linear array form using python script provided in the SDK `/resources/scripts/certificate_script.py`. + - The **[sl_net_set_credential()](https://docs.silabs.com/wiseconnect/3.0.13/wiseconnect-api-reference-guide-nwk-mgmt/net-credential-functions#sl-net-set-credential)** API expects the certificate in the form of a linear array. Convert the pem certificate into a linear array form using the python script provided in the SDK `/resources/scripts/certificate_script.py`. - For example : If the certificate is ca-certificate.pem, enter the command in the following way: `python certificate_script.py ca-certificate.pem` @@ -271,7 +272,7 @@ The application can be configured to suit user requirements and development envi - Root CA certificate needs to be converted as mentioned above. - - After the conversion, place the converted file in `/resources/certificates/` path and include the certificate file in ``app.c`` + - After the conversion, place the converted file in `/resources/certificates/` path and include the certificate file in ``app.c``. - For HTTPS Apache server @@ -316,20 +317,20 @@ The application can be configured to suit user requirements and development envi sl_status_t sl_wifi_target_wake_time_auto_selection(sl_wifi_twt_selection_t *twt_auto_request) ``` Parameters of this API can be configured in *sl_wifi_twt_selection_t* structure. - This TWT API is recommended because it's designed for maintaining connections, improving throughput, and enhancing power performance. + This TWT API is recommended because it is designed for maintaining connections, improving throughput, and enhancing power performance. - Below given are the parameter descriptions: + The following are the parameter descriptions: - twt_enable : 1- Setup ; 0 - teardown - tx_latency : The allowed latency, in milliseconds, within which the given Tx operation is expected to be completed. If 0 is configured, maximum allowed Tx latency is same as rx_latency. Otherwise, valid values are in the range of [200ms - 6hrs]. - rx_latency : The maximum latency, in milliseconds, for receiving buffered packets from the AP. The device wakes up at least once for a TWT service period within the configured rx_latency if there are any pending packets destined for the device from the AP. If set to 0, the default latency of 2 seconds is used. Valid range is between 2 seconds to 6 hours. Recommended range is 2 seconds to 60 seconds to avoid connection failures with AP due to longer sleep time. - - avg_tx_throughput : This is the expected average Tx throughput in Kbps. Value ranges from 0 to 10Mbps, which is half of the default [device_average_throughput](https://docs.silabs.com/wiseconnect/latest/wiseconnect-api-reference-guide-wi-fi/sl-wifi-twt-selection-t#device-average-throughput) (20Mbps by default). + - avg_tx_throughput : This is the expected average Tx throughput in Kbps. Value ranges from 0 to 10 Mbps, which is half of the default [device_average_throughput](https://docs.silabs.com/wiseconnect/latest/wiseconnect-api-reference-guide-wi-fi/sl-wifi-twt-selection-t#device-average-throughput) (20 Mbps by default). - For more information on parameters, refer [sl_wifi_twt_selection_t](https://docs.silabs.com/wiseconnect/latest/wiseconnect-api-reference-guide-wi-fi/sl-wifi-twt-selection-t). + For more information on parameters, refer to [sl_wifi_twt_selection_t](https://docs.silabs.com/wiseconnect/latest/wiseconnect-api-reference-guide-wi-fi/sl-wifi-twt-selection-t). Enable TWT_AUTO_CONFIG MACRO in the app.c file. - Given below are sample configurations. + The following are sample configurations. ```c sl_wifi_twt_selection_t default_twt_selection_configuration = { .twt_enable = 1, @@ -350,7 +351,7 @@ The application can be configured to suit user requirements and development envi status = sl_wifi_target_wake_time_auto_selection(&performance_profile.twt_selection); ``` - The following are the default macro settings. User should not change these values as it may affect the working of the algorithm. + The following are the default macro settings. The user should not change these values as they may affect the algorithm's functioning. Sample Macro Settings : ```c @@ -359,7 +360,7 @@ The application can be configured to suit user requirements and development envi #define TWT_TOLERABLE_DEVIATION 10 \\ in percentage #define TWT_DEFAULT_WAKE_INTERVAL_MS 1024 // in milli seconds #define TWT_DEFAULT_WAKE_DURATION_MS 16 // in milli seconds - #define MAX_TX_AND_RX_LATENCY_LIMIT 22118400 // 6hrs in milli seconds + #define MAX_TX_AND_RX_LATENCY_LIMIT 22118400 // 6 hrs in milli seconds #define MAX_BEACON_WAKE_UP_AFTER_SP \ 2 // The number of beacons after the service period completion for which the module wakes up and listens for any pending RX. ``` @@ -371,11 +372,11 @@ The application can be configured to suit user requirements and development envi sl_status_t sl_wifi_enable_target_wake_time(sl_wifi_twt_request_t *twt_req) ``` - Usage of this API requires knowledge of individual TWT setup negotiation. This API doesn't take care of network disconnections. + Usage of this API requires knowledge of individual TWT setup negotiation. This API does not take care of network disconnections. iTWT parameters should be configured and filled into the structure type *sl_wifi_twt_request_t* in app.c and passed as a parameter to *sl_wifi_enable_target_wake_time()* API. - Given below are sample configurations. + The following are sample configurations. ```c sl_wifi_twt_request_t default_twt_setup_configuration = { .twt_enable = 1, @@ -406,19 +407,19 @@ The application can be configured to suit user requirements and development envi - **twt_flow_id**: range 0-7 or 0xFF - **twt_req_params**: Structure with parameters in case of setup and NULL in case of teardown. - **wake_duration**: This is the nominal minimum wake duration of TWT. This is the time for which DUT will be in wake state for Transmission or reception of data. Allowed values range is 0-255. - - **wake_duration_unit**: This parameter defines unit for wake_duration. Allowed values are 0 (256uS) and 1 (1024uS). - - **wake_duration_tol**: This is the tolerance allowed for wake duration in case of suggest TWT. Received TWT wake duration from AP will be validated against tolerance limits and decided if TWT config received is in acceptable range. Allowed values are 0-255. + - **wake_duration_unit**: This parameter defines unit for wake_duration. Allowed values are 0 (256 uS) and 1 (1024 uS). + - **wake_duration_tol**: This is the tolerance allowed for wake duration in case of suggested TWT. Received TWT wake duration from AP will be validated against tolerance limits and decided if TWT config received is in acceptable range. Allowed values are 0-255. - **wake_int_exp**: TWT Wake interval exponent. It is exponent to base 2. Allowed values are 0 - 31. - **wake_int_exp_tol**: This is the allowed tolerance for wake_int_exp in case of suggest TWT request. Received TWT wake interval exponent from AP will be validated against tolerance limits and decided if TWT config received is in acceptable range. Allowed values are 0 - 31. - **wake_int_mantissa**: This is the TWT wake interval mantissa. Allowed values are 0-65535. - - **wake_int_mantissa_tol**: This is tolerance allowed for wake_int_mantissa in case of suggest TWT. Received TWT wake interval mantissa from AP will be validated against tolerance limits and decided if TWT config received is in acceptable range. Allowed values are 0-65535. + - **wake_int_mantissa_tol**: This is tolerance allowed for wake_int_mantissa in case of suggested TWT. Received TWT wake interval mantissa from AP will be validated against tolerance limits and decided if TWT config received is in acceptable range. Allowed values are 0-65535. - **implicit_twt**: If enabled (1), the TWT requesting STA calculates the Next TWT by adding a fixed value to the current TWT value. Explicit TWT is currently not allowed. - **un_announced_twt**: If enabled (1), TWT requesting STA does not announce its wake up to AP through PS-POLLs or UAPSD Trigger frames. - **triggered_twt**: If enabled(1), at least one trigger frame is included in the TWT Service Period(TSP). - **twt_channel**: Currently this configuration is not supported. Allowed values are 0-7. - **twt_protection**: If enabled (1), TSP is protected. This is negotiable with AP. Currently not supported. Only zero is allowed. - **restrict_tx_outside_tsp**: If enabled (1), any Tx outside the TSP is restricted. Else, TX can happen outside the TSP also. - - **twt_retry_limit**: This is the maximum number of retries allowed, if the TWT response frame is not received for the sent TWT request frame. Allowed values are 0 - 15. + - **twt_retry_limit**: This is the maximum number of retries allowed if the TWT response frame is not received for the sent TWT request frame. Allowed values are 0 - 15. - **twt_retry_interval**: The interval, in seconds, between two twt request retries. Allowed values are 5 - 255. - **req_type**: This is the TWT request type. - 0 - Request TWT @@ -431,7 +432,7 @@ The application can be configured to suit user requirements and development envi ``` >**Note:** - >- TWT Wake duration depends on the wake duration unit. For example, for the above configuration, wake duration value is (0xE0 * 256 = 57.3 msec). + >- TWT Wake duration depends on the wake duration unit. For example, for the above configuration, the wake duration value is (0xE0 * 256 = 57.3 msec). >- TWT Wake interval is calculated as mantissa *2 ^ exp. For example, for the above configuration, wake interval value is (0x1B00* 2^13 = 55.2 sec). >- Configuring TWT Wake interval beyond 1 min might lead to disconnections from the AP. >- There might be disconnections while using TWT with wake interval greater than 4sec when connected to an AP with non-zero GTK key renewal time. @@ -439,7 +440,7 @@ The application can be configured to suit user requirements and development envi - iTWT Teardown Configuration - To teardown TWT session use the matching TWT teardown API corresponding to the TWT setup configuration API: + To teardown TWT session, use the matching TWT teardown API corresponding to the TWT setup configuration API: 1. For TWT parameters Auto Selection API, call the following API to teardown : ```c status = sl_wifi_target_wake_time_auto_selection(twt_selection); @@ -453,24 +454,24 @@ The application can be configured to suit user requirements and development envi ``` - twt_req->twt_enable should be set to '0' for teardown operation. - twt_req->twt_flow_id should be configured as described below: - - This paramater value range is 0-7. It should be same as setup flow ID, other wise error will be triggered. + - This paramater value range is 0-7. It should be the same as setup flow ID, otherwise an error will be triggered. - 0xFF - To teardown all active sessions. This value is valid only in case of teardown command. - - Rest of the parameters in the structure are ignored for a Teardown operation. + - The rest of the parameters in the structure are ignored for a teardown operation. - > Note : For setting a new TWT session, the existing TWT session must be teared down. + > Note : For setting a new TWT session, the existing TWT session must be torn down. ## iTWT Session Status Codes - User can get asynchronous TWT session updates if *twt_response_handler* is defined and the callback is registered. A *twt_response_handler* is provided in the example application. The following are the TWT session status codes. + The user can get asynchronous TWT session updates if *twt_response_handler* is defined and the callback is registered. A *twt_response_handler* is provided in the example application. The following are the TWT session status codes. |S.No| MACRO| Session status code| Description| |:----|:------|:-------------------|:--------------| |1.| TWT_SESSION_SUCC| 0| TWT session setup success. TWT session is active.| |2.| TWT_UNSOL_SESSION_SUCC| 1| Unsolicited TWT setup response from AP accepted. TWT session is active.| |3.| TWT_SETUP_AP_REJECTED| 4| TWT Reject frame received in response for the sent TWT setup frame.| - |4.| TWT_SETUP_RSP_OUTOF_TOL|5| TWT response parameters from AP for TWT Suggest request is not within tolerance set by User.| - |5.| TWT_SETUP_RSP_NOT_MATCHED| 6| TWT response parameters from AP for TWT Demand request does not match parameters given by User.| + |4.| TWT_SETUP_RSP_OUTOF_TOL|5| TWT response parameters from AP for TWT Suggest request is not within tolerance set by user.| + |5.| TWT_SETUP_RSP_NOT_MATCHED| 6| TWT response parameters from AP for TWT Demand request does not match parameters given by user.| |6.| TWT_SETUP_UNSUPPORTED_RSP| 10| Unsupported TWT response from AP.| |7.| TWT_TEARDOWN_SUCC| 11| TWT session teardown success| |8.| TWT_AP_TEARDOWN_SUCC| 12| TWT session teardown from AP success| @@ -480,31 +481,35 @@ The application can be configured to suit user requirements and development envi |12.| TWT_INACTIVE_NO_AP_SUPPORT| 18| TWT session inactive as connected AP does not support TWT.| > Note: -> **twt_session_active** variable is provided in the example application and is updated according to the asychronous TWT session notifications. User can utilise this variable to teardown or configure new session parameters depending upon existing session status. +> **twt_session_active** variable is provided in the example application and is updated according to the asychronous TWT session notifications. The user can utilize this variable to teardown or configure new session parameters depending upon existing session status. ## TWT Recommendations - 1. Use sl_wifi_target_wake_time_auto_selection with appropriate Rx Latency input according to the use case as it has improved design over sl_wifi_enable_target_wake_time. Also, it handles network level disconnections such as ARP, Embedded MQTT and TCP connections. It has better user interface and simplifies TWT usage. + 1. Use sl_wifi_target_wake_time_auto_selection with appropriate Rx Latency input according to the use case as it has improved design over sl_wifi_enable_target_wake_time. Also, it handles network level disconnections such as ARP, Embedded MQTT, and TCP connections. It has a better user interface and simplifies TWT usage. 2. iTWT setup is recommended after IP assignment/TCP connection/application connection. - 3. When using sl_wifi_target_wake_time_auto_selection API, Rx Latency should be less than TCP / ARP Timeouts at the remote side. + 3. When using sl_wifi_target_wake_time_auto_selection API, Rx Latency should be less than TCP / ARP Timeouts at the remote side. 4. When using sl_wifi_enable_target_wake_time, TWT interval configured should be less than TCP / ARP Timeouts at the remote side. - 5. For iTWT, GTK Interval Should be kept maximum possible value or zero. If GTK interval is not configurable, recommended TWT interval (in case of sl_wifi_enable_target_wake_time) / RX Latency (in case of sl_wifi_target_wake_time_auto_selection API) is less than 4sec. - 6. When sl_wifi_enable_target_wake_time API is used, configuring TWT Wake interval beyond 1 min might lead to disconnections from the AP. Recommended to use TWT wakeup interval less than or equal to 1 min. - 7. WLAN Keep Alive timeout should **not** be disabled when sl_wifi_target_wake_time_auto_selection API is used or when unannounced TWT session is set up using sl_wifi_enable_target_wake_time API. It is recommended to use WLAN Keep Alive timeout of 30 sec which is the default timeout even if not configured specifically by the user. + 5. For iTWT, GTK Interval should be kept maximum possible value or zero. If GTK interval is not configurable, recommended TWT interval (in case of sl_wifi_enable_target_wake_time) / RX Latency (in case of sl_wifi_target_wake_time_auto_selection API) is less than 4 sec. + 6. When sl_wifi_enable_target_wake_time API is used, configuring TWT Wake interval beyond 1 min might lead to disconnections from the AP. Using TWT wakeup interval less than or equal to 1 min is recommended. + 7. WLAN Keep Alive timeout should **not** be disabled when sl_wifi_target_wake_time_auto_selection API is used or when unannounced TWT session is set up using sl_wifi_enable_target_wake_time API. It is recommended to use WLAN Keep Alive timeout of 30 sec, which is the default timeout even if not configured specifically by the user. 8. Disable power save and suspend any active TWT sessions before triggering HTTP OTAF. **Soc Mode**: The M4 processor is set in sleep mode. The M4 processor can be woken in several ways as mentioned below: - - ALARM timer-based - In this method, an ALARM timer is run that wakes the M4 processor up periodically every **ALARM_PERIODIC_TIME** time period. + - ALARM timer-based - In this method, an ALARM timer is run that wakes up the M4 processor every **ALARM_PERIODIC_TIME** time period. - We can enable the ALARM timer-wakeup by adding the preprocessor macro "ALARM_TIMER_BASED_WAKEUP" for the example. - - In the Project explorer pane, expand as follows wiseconnect3_sdk_xxx > components > device > silabs > si91x > mcu > drivers > peripheral_drivers > src folder and open sl_si91x_m4_ps.c file. Configure **ALARM_PERIODIC_TIME**, in seconds, in sl_si91x_m4_ps.c + - In the Project explorer pane, expand as follows: wiseconnect3_sdk_xxx > components > device > silabs > si91x > mcu > drivers > peripheral_drivers > src folder and open sl_si91x_m4_ps.c file. Configure **ALARM_PERIODIC_TIME**, in seconds, in sl_si91x_m4_ps.c - Button press-based (GPIO) - In this method, the M4 processor wakes up upon pressing a button (BTN0). - We can enable the Button press-based wakeup by adding the preprocessor macro "BUTTON_BASED_WAKEUP" for the example. - Wireless-based - When an RX packet is to be received by the NWP, the M4 processor is woken up. - We can enable the Wireless-wakeup by adding the preprocessor macro "WIRELESS_BASED_WAKEUP_TO_USE" for the example. +**Note:** +> AWS has announced that there will be changes in their root CA chain. More details can be found in the reference links.(https://aws.amazon.com/blogs/security/acm-will-no-longer-cross-sign-certificates-with-starfield-class-2-starting-august-2024/) +> We are providing both root CAs (Starfield class-2 and Starfield G2) in aws_starfield_ca.pem.h, which is located in the WiSeConnect directory `/resources/certificates/aws_starfield_ca.pem.h` + ## Test the Application Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: @@ -553,111 +558,111 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ![Create bucket](resources/readme/image392.png) -- Choose the created bucket from the list of buckets in console. +- Choose the created bucket from the list of buckets in the console. - Upload the file in creating bucket. ![Upload the file](resources/readme/image393.png) -- Add the file to the bucket +- Add the file to the bucket. ![Add the file to the bucket](resources/readme/image394.png) -- Setting permission to public access +- Set permission to public access. ![Setting permission to public access](resources/readme/image395.png) -- After uploading the file, click on the file +- After uploading the file, click on the file. ![S3_URL_1](resources/readme/aws_bucket_getting_url_1.png) -- Get the object URL inside bucket/properties, like below : +- Get the object URL inside bucket/properties, like below: ![S3_URL_2](resources/readme/aws_bucket_getting_url_2.png) ### Configuring Azure Blob Storage -* Login to your Azure account and go to Storage Account or search for Storage Account +* Login to your Azure account and go to Storage Account or search for Storage Account. ![Search for Storage Account](resources/readme/image396.png) -* Open storage account and create a new storage +* Open storage account and create a new storage. ![Create a new storage](resources/readme/image397.png) -* While creating a storage account select your common Resource Group you have already created and provide a storage account name. -* Select preferred location, for the account kind select Blob-Storage and Replication select LRS +* While creating a storage account, select your common Resource Group you have already created and provide a storage account name. +* Select preferred location. For the account kind, select Blob-Storage and for Replication select LRS. ![Select preferred location](resources/readme/image398.png) -* Review and create your storage account -* Now download the Windows Storage Explorer here +* Review and create your storage account. +* Now download the Windows Storage Explorer here. * After installing the storage explorer, open Azure Storage Explorer in your Windows machine and navigate to Account management and add your Azure account. ![Open Azure Storage Explorer](resources/readme/image399.png) ![Add your Azure account](resources/readme/image400.png) -* Click on Open connect dialog, where you need to select a Resource from the list as shown below +* Click on Open connect dialog and select a Resource from the list as shown below: ![Select a Resource from the list](resources/readme/image401.png) -* Select Storage account or service, then select connection method as Connection String +* Select Storage account or service, then select connection method as Connection String. ![Select connection method as Connection String](resources/readme/image402.png) -* In the Azure Portal, navigate to your newly created storage account and select Access Keys, copy the connection string for Key1 +* In the Azure Portal, navigate to your newly created storage account and select Access Keys. Copy the connection string for Key1. ![Copy the connection string for Key1](resources/readme/image403.png) -* The connection string has to be given in the local Azure Storage Explorer app -* Up on successfully adding, you should now see the EXPLORER tab on your Azure Storage Explorer display all the storages available in your account +* The connection string has to be given in the local Azure Storage Explorer app. +* Upon successfully adding, you should now see the EXPLORER tab on your Azure Storage Explorer displaying all the storages available in your account. ![Display all the storages available in your account](resources/readme/image404.png) -* In the Azure Portal search for Storage Explorer and work the same thing there also. But it is in preview so better to use Windows Azure Storage Explorer -* Create a new blob container as shown below +* In the Azure Portal, search for Storage Explorer and perform the same steps. However, this is in preview so it is better to use Windows Azure Storage Explorer. +* Create a new blob container as shown below. ![Create a new blob container](resources/readme/image405.png) -* The route folder name you give is quite important as all the further connections happen from here. For this I am choosing a file extension -* The name used here is “rps” -* This should create a new folder, which looks like this +* The route folder name you give is quite important as all the further connections happen from here. For this example, we use a file extension. +* The name used here is “rps”. +* This should create a new folder, which looks like this: ![New folder looks like this](resources/readme/image406.png) -* Change the Public Access Level, right click on the new folder and select Set Container Access Level +* Change the Public Access Level by right-clicking on the new folder and selecting Set Container Access Level. ![Select Set Container Access Level](resources/readme/image407.png) -* We can upload the Device Update File +* We can upload the Device Update File. ![Upload the Device Update File](resources/readme/image408.png) -* Once done uploading, we can see the file +* Once done uploading, we can see the file. ![We can see the file](resources/readme/image409.png) -* Right click on the uploaded file, then select properties. You will find a URL path. +* Right-click on the uploaded file, then select properties. You will find a URL path. ![Find a URL path](resources/readme/image410.png) -* Copy it this link is used for accessing our device update files +* Copy this link at it is used for accessing our device update files. ![This link is used for accessing our device update files](resources/readme/image411.png) -* By accessing this URL, you can download the Device Update files in application +* By accessing this URL, you can download the Device Update files in the application. ### Configuring and Uploading Firmware on Apache HTTP - Download and Install Wamp-Apache Server - Open the below link in your system browser. Wamp Server - () - - Under Downloads, Download the latest version of WAMP server for 32bit or 64bit machine. + - Under Downloads, download the latest version of WAMP server for 32 bit or 64 bit machine. - Install Wamp-Apache server with all the default settings. - Make sure the Wamp-Apache server is present in C:\ directory - - Configure a HTTP server + - Configure an HTTP server. - Navigate to C:\wamp64\bin\apache\apache2.4.46\conf - Open httpd.conf file with an editor. - - Change the below lines into system IP address + - Change the below lines into system IP address. ```sh Listen {System-IP-Address}:80 @@ -667,34 +672,34 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ``` - Save the file and Exit. -- Open command prompt and run with Administrator Privilege's. +- Open command prompt and run with Administrator Privileges. - Navigate to directory C:\wamp64\bin\apache\apache2.4.46\bin - Add Apache as a Windows Service: `httpd.exe -k install` -- While the install is in progress, you will be prompted to Windows Network Access page as shown below. Make sure you allow both Private and Public network access. +- While the install is in progress, you will be directed to the Windows Network Access page as shown below. Make sure you allow both Private and Public network access. ![Windows Network Access page](resources/readme/image412.png) - Start Apache Service in Windows - Open RUN in windows using WIN+R button. - - Input "services.msc" into RUN - - This will open your Windows System Services - - In the list of services running you can find Apache2.x present. - - Start the service as shown below + - Input "services.msc" into RUN. + - This will open your Windows System Services. + - In the list of services running, you can find Apache2.x present. + - Start the service as shown below. ![Start the service](resources/readme/image413.png) -- Now that your Apache has started and running, check it by using your browser. Open a Web browser and type the machine IP in the address bar and hit Enter. You should see the below, if server has started successfully. +- Now that your Apache has started and is running, check it by using your browser. Open a Web browser and type the machine IP in the address bar and hit Enter. You should see the window below, if the server has started successfully. ![If server has started successfully.](resources/readme/image414.png) -- As you can see the connection is "Not Secure" means it is running HTTP server. -- Configure HTTP Wamp-Apache Server to Download firmware - - Goto the Wamp Root directory, in my case it is C:\wamp64 and navigate to "www" folder C:\wamp64\www. - - Create a new folder in that directory, in my case I created a folder named "Firmware". [Folder Structure: C:\wamp64\www\Firmware] - - In the "Firmware" folder create an "index.html" file and write below contents to the file. +- As you can see, the connection is "Not Secure", meaning it is running an HTTP server. +- Configure HTTP Wamp-Apache Server to download firmware + - Go to the Wamp Root directory. In this example, it is C:\wamp64 and navigate to "www" folder C:\wamp64\www. + - Create a new folder in that directory. In this example, we created a folder named "Firmware". [Folder Structure: C:\wamp64\www\Firmware] + - In the "Firmware" folder, create an "index.html" file and write the following contents to the file. ```html @@ -707,8 +712,8 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ``` -- This code will link your resources to Apache server, so that those files can be downloaded. -- you can edit href values in the index.html to your firmware file names. +- This code will link your resources to the Apache server so that those files can be downloaded. +- You can edit href values in the index.html to your firmware file names. - Make sure to copy all the firmware files into the present directory, C:\wamp64\www\Firmware. Save the file and Exit. ```html @@ -725,10 +730,10 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ``` - Restart Apache Service - - Open Windows services, "WIN+R" → "services.msc" → ENTER - - Check for Apache service and Restart the service + - Open Windows services, "WIN+R" → "services.msc" → ENTER. + - Check for Apache service and restart the service. - In the above configuration, we have created a resource for our server in "Firmware" folder. - - Our access resource URL looks as shown below + - Our access resource URL looks as shown below. - `http:////` > @@ -736,29 +741,29 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise >- >- -- Giving the `http:///` in browser should load as shown below. Clicking on any link should download the Firmware files. +- Entering the `http:///` in your browser should load a window as shown below. Clicking on any link should download the Firmware files. ![Webpage in browser](resources/readme/image415.png) -- Get the resource Information and test with Application - - In the SiWx91x FOTA application, make below changes and test application this should start downloading firmware. +- Get the resource information and test with the application + - In the SiWx91x FOTA application, make the following changes and test the application. This process should start downloading firmware. ```c - #define HTTP_SERVER_IP_ADDRESS "192.168.1.4" //Replace this values related to your requirements + #define HTTP_SERVER_IP_ADDRESS "192.168.1.4" //Replace this value related to your requirements #define HTTP_URL "Firmware/firmware_file.rps" //HTTP GET request resource name - #define HTTP_HOSTNAME "192.168.1.4"//Replace this values related to your requirements + #define HTTP_HOSTNAME "192.168.1.4"//Replace this value related to your requirements ``` - > **Warning:** Make sure that you are able to Access the WAMP-Apache Server (with its IP Address) is accessible to other systems in the same network, if not follow the Changing PHP Configurations. Else proceed with next steps + > **Warning:** Make sure that the WAMP-Apache Server (with its IP Address) is accessible to other systems in the same network. If not, follow the Changing PHP Configurations. Otherwise, proceed with the next steps. - Changing PHP Configuration - - The below steps to be done only when you face an issue of not able to access the WAMP-Server from other machines in the network. Issue shown below : + - The following steps are to be done only when you are unable to access the WAMP-Server from other machines in the network. Issue shown below: ![Issue of not able to access the WAMP-Server from other machines](resources/readme/image416.png) - - Give permissions to the newly created resource `""` - - Open "phpmyadmin.conf" file in "C:\wamp64\alias\phpmyadmin.conf" - - Add the line shown below into the end of file "phpmyadmin.conf" file. Save and exit the file. + - Give permissions to the newly created resource `""`. + - Open "phpmyadmin.conf" file in "C:\wamp64\alias\phpmyadmin.conf". + - Add the line shown below into the end of the "phpmyadmin.conf" file. Save and exit the file. ```sh /"> @@ -772,26 +777,26 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise ``` - - Restart Apache service and now the resource should be accessible from any systems connected in the same network. + - Restart Apache service and now the resource should be accessible from any system connected in the same network. -> **Note:** Even though if you are not able to access `http:///` this page directly, you will be able to access your resources from here `http:////` as we gave only permissions for this +> **Note:** Even if you are not able to access `http:///` directly, you will be able to access your resources from here `http:////`. ### Configuring and Uploading Firmware on Apache HTTPs -HTTPs Sever configuration for Apache requires Wamp server, if you have not installed it, follow the **"Step 1: Download and Install Wamp-Apache Server"** step and continue with the HTTPS steps in this document. +HTTPs server configuration for Apache requires Wamp server. If you have not installed it, follow the procedures in **"Step 1: Download and Install Wamp-Apache Server"** step and continue with the HTTPS steps in this document. -- **Download and Install OPENSSL for windows** +- **Download and install OPENSSL for Windows** - OpenSSL for windows from here (). - Do default install for OpenSSL. - - We can only run OpenSSL using command prompt, for that we need to first find the openssl.exe file. - - Normally it will be in "C:\Program Files\OpenSSL-Win64\bin\openssl.exe" + - We can only run OpenSSL using command prompt, and for that we need to first find the openssl.exe file. + - Normally, it will be in "C:\Program Files\OpenSSL-Win64\bin\openssl.exe". - **Generate required certs** - > **Note:** If you already have the required certs to run the server then, skip the **Generate required certs** step, copy your certs to `C:\wamp64\bin\apache\apache2.4.46\conf` directory and update the `httpd-ssl.conf` file with these certificate paths shown in **HTTPD Configuration** step. + > **Note:** If you already have the required certs to run the server, skip the **Generate required certs** step. Copy your certs to `C:\wamp64\bin\apache\apache2.4.46\conf` directory and update the `httpd-ssl.conf` file with these certificate paths shown in **HTTPD configuration** step. - - Open Command Prompt in Administrator privilege's. - - Change directory to your openssl.exe file "cd C:\Program Files\OpenSSL-Win64\bin\" - - Execute the below command to generate a private.key file with AES 256 encryption. + - Open Command Prompt in Administrator privileges. + - Change directory to your openssl.exe file "cd C:\Program Files\OpenSSL-Win64\bin\". + - Execute the following command to generate a private.key file with AES 256 encryption. ```sh openssl.exe genrsa -aes256 -out private.key 2048 @@ -800,9 +805,9 @@ HTTPs Sever configuration for Apache requires Wamp server, if you have not insta openssl.exe req -new -x509 -nodes -sha1 -key private.key -out certificate.crt -days 36500 -config C:\wamp64\bin\apache\apache2.4.46\conf\openssl.conf ``` -- Now there will be two files created [Private.key and certificate.crt] in "C:\Program Files\OpenSSL-Win64\bin\" directory, copy them to "C:\wamp64\bin\apache\apache2.4.46\conf" +- Now there will be two files created [Private.key and certificate.crt] in "C:\Program Files\OpenSSL-Win64\bin\" directory. Copy them to "C:\wamp64\bin\apache\apache2.4.46\conf". -- **HTTPD Configuration** +- **HTTPD configuration** - Open ``httpd.conf`` file in "C:\wamp64\bin\apache\apache2.4.46\conf" - Uncomment the below shown lines in that file. Save and Exit. @@ -812,10 +817,10 @@ HTTPs Sever configuration for Apache requires Wamp server, if you have not insta LoadModule socache_shmcb_module modules/mod_socache_shmcb.so ``` - - Open "php.ini" file in "C:\wamp64\bin\php\php5.6.40" and uncomment the below line in the file + - Open "php.ini" file in "C:\wamp64\bin\php\php5.6.40" and uncomment the below line in the file. `extension=php_openssl.dll` - - Open ``httpd-ssl.conf`` file in "C:\wamp64\bin\apache\apache2.4.46\conf\extra" and update the below paths with proper information (i.e provide system relative paths) + - Open ``httpd-ssl.conf`` file in "C:\wamp64\bin\apache\apache2.4.46\conf\extra" and update the below paths with proper information (i.e., provide system relative paths). ``` sh @@ -830,13 +835,13 @@ HTTPs Sever configuration for Apache requires Wamp server, if you have not insta SSLCertificateKeyFile "C:/wamp64/bin/apache/apache2.4.46/conf/private.key" ``` - - Run below command to check if the configurations given above are proper or not. If the configurations are proper, it will return "Syntax OK" + - Run command below to check if the configurations given above are proper or not. If the configurations are correct, the command will return "Syntax OK". `httpd.exe -t` -- **Configure HTTPS Wamp-Apache Server to Download firmware** - - Goto the Wamp Root directory "C:\wamp64" and navigate to "www" +- **Configure HTTPS Wamp-Apache Server to download firmware** + - Goto the Wamp Root directory "C:\wamp64" and navigate to "www". - Create a new folder in that directory "Firmware". [Folder Structure: C:\wamp64\www\Firmware] - - In the "Firmware" folder create an "index.html" file and write below contents to the file. + - In the "Firmware" folder, create an "index.html" file and write following contents to the file. ```html @@ -849,11 +854,11 @@ HTTPs Sever configuration for Apache requires Wamp server, if you have not insta ``` -- This code will link your resources to Apache server, so that those files can be downloaded. +- This code will link your resources to the Apache server so that those files can be downloaded. -- Make sure to copy all the firmware files into the present directory, C:\wamp64\www\Firmware +- Make sure to copy all the firmware files into the present directory, C:\wamp64\www\Firmware. -- you can edit href values in the index.html to your firmware file names. +- You can edit href values in the index.html to your firmware file names. ```html Download_Version_6

@@ -863,13 +868,13 @@ HTTPs Sever configuration for Apache requires Wamp server, if you have not insta - Save the file and Exit. - **Restart Server** > -> - Open RUN, "WIN+R" → "services.msc" → ENTER +> - Open RUN, "WIN+R" → "services.msc" → ENTER. > - Restart the Apache service. -> - Open browser and give your Apache server URL +> - Open browser and enter your Apache server URL. ![Give your Apache server URL](resources/readme/image418.png) -> - Here click on "Advanced Settings" and click on "Proceed to 192.168.43.85 (unsafe)" +> - Click on "Advanced Settings" and then click on "Proceed to 192.168.43.85 (unsafe)". > - You will be able to access the page and resources in HTTPS. ![Access the page and resources in HTTPS](resources/readme/image419.png) diff --git a/examples/snippets/wlan/http_server/http_server_soc.slcp b/examples/snippets/wlan/http_server/http_server_soc.slcp index 227f1f333..bf19a4a13 100644 --- a/examples/snippets/wlan/http_server/http_server_soc.slcp +++ b/examples/snippets/wlan/http_server/http_server_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_ncp.slcp b/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_ncp.slcp index ca3adb6fb..3f941a355 100644 --- a/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_ncp.slcp +++ b/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_soc.slcp b/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_soc.slcp index ebe0de979..234308004 100644 --- a/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_soc.slcp +++ b/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_uart_ncp.slcp b/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_uart_ncp.slcp index e35f6327f..812066e46 100644 --- a/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_uart_ncp.slcp +++ b/examples/snippets/wlan/lwip_tcp_client/lwip_tcp_client_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/m4_firmware_update/m4_firmware_update.slcp b/examples/snippets/wlan/m4_firmware_update/m4_firmware_update.slcp index 973dcdc90..4d6bd8620 100644 --- a/examples/snippets/wlan/m4_firmware_update/m4_firmware_update.slcp +++ b/examples/snippets/wlan/m4_firmware_update/m4_firmware_update.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/multithreading_application/multithreading_application_ncp.slcp b/examples/snippets/wlan/multithreading_application/multithreading_application_ncp.slcp index fe69d757b..4ce3f39e1 100644 --- a/examples/snippets/wlan/multithreading_application/multithreading_application_ncp.slcp +++ b/examples/snippets/wlan/multithreading_application/multithreading_application_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/multithreading_application/multithreading_application_soc.slcp b/examples/snippets/wlan/multithreading_application/multithreading_application_soc.slcp index 6139f94ab..7ec06663f 100644 --- a/examples/snippets/wlan/multithreading_application/multithreading_application_soc.slcp +++ b/examples/snippets/wlan/multithreading_application/multithreading_application_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/select_app/select_app_ncp.slcp b/examples/snippets/wlan/select_app/select_app_ncp.slcp index 0bec1fe18..4ac9a7e9d 100644 --- a/examples/snippets/wlan/select_app/select_app_ncp.slcp +++ b/examples/snippets/wlan/select_app/select_app_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/select_app/select_app_soc.slcp b/examples/snippets/wlan/select_app/select_app_soc.slcp index 67c2bc0f1..0f1b6337e 100644 --- a/examples/snippets/wlan/select_app/select_app_soc.slcp +++ b/examples/snippets/wlan/select_app/select_app_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/sntp_client/sntp_client_ncp.slcp b/examples/snippets/wlan/sntp_client/sntp_client_ncp.slcp index 600ec8b8b..d522c8cf7 100644 --- a/examples/snippets/wlan/sntp_client/sntp_client_ncp.slcp +++ b/examples/snippets/wlan/sntp_client/sntp_client_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/sntp_client/sntp_client_soc.slcp b/examples/snippets/wlan/sntp_client/sntp_client_soc.slcp index 192de7538..e66247869 100644 --- a/examples/snippets/wlan/sntp_client/sntp_client_soc.slcp +++ b/examples/snippets/wlan/sntp_client/sntp_client_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/sntp_client/sntp_client_uart_ncp.slcp b/examples/snippets/wlan/sntp_client/sntp_client_uart_ncp.slcp index a994af323..3c0abbefc 100644 --- a/examples/snippets/wlan/sntp_client/sntp_client_uart_ncp.slcp +++ b/examples/snippets/wlan/sntp_client/sntp_client_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/station_ping/station_ping_ncp.slcp b/examples/snippets/wlan/station_ping/station_ping_ncp.slcp index 73ff8e710..6f8495b17 100644 --- a/examples/snippets/wlan/station_ping/station_ping_ncp.slcp +++ b/examples/snippets/wlan/station_ping/station_ping_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/station_ping/station_ping_soc.slcp b/examples/snippets/wlan/station_ping/station_ping_soc.slcp index b242817b7..fbebde538 100644 --- a/examples/snippets/wlan/station_ping/station_ping_soc.slcp +++ b/examples/snippets/wlan/station_ping/station_ping_soc.slcp @@ -13,10 +13,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/station_ping/station_ping_uart_ncp.slcp b/examples/snippets/wlan/station_ping/station_ping_uart_ncp.slcp index 2190fddfa..bfb49f174 100644 --- a/examples/snippets/wlan/station_ping/station_ping_uart_ncp.slcp +++ b/examples/snippets/wlan/station_ping/station_ping_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/station_ping_v6/station_ping_v6.slcp b/examples/snippets/wlan/station_ping_v6/station_ping_v6.slcp index d5bf113a1..375d0cf15 100644 --- a/examples/snippets/wlan/station_ping_v6/station_ping_v6.slcp +++ b/examples/snippets/wlan/station_ping_v6/station_ping_v6.slcp @@ -13,10 +13,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/tcp_tx_on_periodic_wakeup/tcp_tx_on_periodic_wakeup_ncp.slcp b/examples/snippets/wlan/tcp_tx_on_periodic_wakeup/tcp_tx_on_periodic_wakeup_ncp.slcp index 13dbd282a..291b374e5 100644 --- a/examples/snippets/wlan/tcp_tx_on_periodic_wakeup/tcp_tx_on_periodic_wakeup_ncp.slcp +++ b/examples/snippets/wlan/tcp_tx_on_periodic_wakeup/tcp_tx_on_periodic_wakeup_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/tcp_tx_on_periodic_wakeup/tcp_tx_on_periodic_wakeup_soc.slcp b/examples/snippets/wlan/tcp_tx_on_periodic_wakeup/tcp_tx_on_periodic_wakeup_soc.slcp index ad7924945..9636a39b6 100644 --- a/examples/snippets/wlan/tcp_tx_on_periodic_wakeup/tcp_tx_on_periodic_wakeup_soc.slcp +++ b/examples/snippets/wlan/tcp_tx_on_periodic_wakeup/tcp_tx_on_periodic_wakeup_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/three_ssl_concurrent_client_sockets/readme.md b/examples/snippets/wlan/three_ssl_concurrent_client_sockets/readme.md index 6c7d6ae5d..0d15598fb 100644 --- a/examples/snippets/wlan/three_ssl_concurrent_client_sockets/readme.md +++ b/examples/snippets/wlan/three_ssl_concurrent_client_sockets/readme.md @@ -19,7 +19,7 @@ ## Purpose/Scope -This application demonstrates how SiWx91x will connect to three different SSL servers with three different set of SSL certificates and loading certificates into the FLASH. +This application demonstrates how the SiWx91x will connect to three different SSL servers with three different sets of SSL certificates and load certificates into the FLASH. ## Prerequisites/Set up Requirements @@ -27,7 +27,7 @@ This application demonstrates how SiWx91x will connect to three different SSL se - Windows PC - USB-C cable -- A Wireless Access point (which has an active internet access) +- A Wireless Access Point (which has an active internet access) - **SoC Mode**: - Standalone @@ -78,11 +78,11 @@ For details on the project folder structure, see the [WiSeConnect Examples](http ## Application Build Environment -- In the Project Explorer pane, expand the **config** folder and open the ``sl_net_default_values.h`` file. Configure the following parameters to enable your Silicon Labs Wi-Fi device to connect to your Wi-Fi network +- In the Project Explorer pane, expand the **config** folder and open the ``sl_net_default_values.h`` file. Configure the following parameters to enable your Silicon Labs Wi-Fi device to connect to your Wi-Fi network. - STA instance related parameters - - DEFAULT_WIFI_CLIENT_PROFILE_SSID refers to the name with which Wi-Fi network that shall be advertised and Si91X module is connected to it. + - DEFAULT_WIFI_CLIENT_PROFILE_SSID refers to the name with which Wi-Fi network shall be advertised and Si91X module is connected to it. ```c #define DEFAULT_WIFI_CLIENT_PROFILE_SSID "YOUR_AP_SSID" @@ -102,7 +102,7 @@ For details on the project folder structure, see the [WiSeConnect Examples](http - Other STA instance configurations can be modified if required in `default_wifi_client_profile` configuration structure. -- Configure the following parameters in ``app.c`` to test three_ssl_client_sockets app as per requirements +- Configure the following parameters in ``app.c`` to test three_ssl_client_sockets app as per requirements: ```c #define SERVER_PORT1 // Remote server port @@ -113,7 +113,7 @@ For details on the project folder structure, see the [WiSeConnect Examples](http - If certificates are not there in flash, then SSL handshake will fail. -- AWS_DOMAIN_NAME refers to domain name of the AWS server. To get this refer to the [Configure the below parameters in `aws_iot_config.h` file present at `/config`](#configure-the-below-parameters-in-aws_iot_configh-file-present-at-projectconfig). +- AWS_DOMAIN_NAME refers to the domain name of the AWS server. To get this name, refer to the [Configure the below parameters in `aws_iot_config.h` file present at `/config`](#configure-the-below-parameters-in-aws_iot_configh-file-present-at-projectconfig). ```c #define AWS_DOMAIN_NAME "a2m21kovu9tcsh-ats.iot.us-east-2.amazonaws.com" @@ -123,25 +123,25 @@ For details on the project folder structure, see the [WiSeConnect Examples](http > - Before configuring the parameters in `aws_iot_config.h`, register the SiWx917 device in the AWS IoT registry by following the steps mentioned in [Create an AWS Thing](#create-an-aws-thing) section. > -> - Configure AWS_IOT_MQTT_HOST macro with the device data endpoint to connect to AWS. For getting the device data endpoint in the AWS IoT Console navigate to Settings and copy the Endpoint and define the AWS_IOT_MQTT_HOST macro with this value. +> - Configure AWS_IOT_MQTT_HOST macro with the device data endpoint to connect to AWS. To get the device data endpoint in the AWS IoT Console, navigate to Settings, copy the Endpoint, and define the AWS_IOT_MQTT_HOST macro with this value. > > ![AWS_IOT_MQTT_HOST_NAME](resources/readme/aws_iot_mqtt_host_url_1.png) ```c #define AWS_IOT_MQTT_HOST "a2m21kovu9tcsh-ats.iot.us-east-2.amazonaws.com" ///< Customer specific MQTT HOST. The same will be used for Thing Shadow -#define AWS_IOT_MQTT_PORT 8883 ///< default port for MQTT/S +#define AWS_IOT_MQTT_PORT 8883 ///< Default port for MQTT/S #define AWS_IOT_MQTT_CLIENT_ID "silicon_labs_thing" ///< MQTT client ID should be unique for every device #define AWS_IOT_MY_THING_NAME "silicon_labs_thing" ``` -> - To authenticate and securely connect with AWS, the SiWx917 device requires a unique x.509 security certificate and private key, as well as a CA certificate. At this point, you must be having device certificate, private key and CA certificate which are downloaded during the creation/registration of AWS Thing. +> - To authenticate and securely connect with AWS, the SiWx917 device requires a unique x.509 security certificate and private key, as well as a CA certificate. At this point, you must have a device certificate, private key, and CA certificate, which are downloaded during the creation/registration of AWS Thing. > -> - By default the certificate and private key that are downloaded from the AWS are in [.pem format](https://en.wikipedia.org/wiki/Privacy-Enhanced_Mail). To load the certificate and private key to the SiWx917, the certificate and private key should be converted into a C-array. For converting the certificates and private key into C-array refer to [Setting up Security Certificates](#setting-up-security-certificates). +> - By default, the certificate and private key that are downloaded from the AWS are in [.pem format](https://en.wikipedia.org/wiki/Privacy-Enhanced_Mail). To load the certificate and private key to the SiWx917, the certificate and private key should be converted into a C-array. For converting the certificates and private key into a C-array, refer to [Setting up Security Certificates](#setting-up-security-certificates). > -> - By default the WiSeConnect 3 SDK contains the Starfield Root CA Certificate in C-array format. +> - By default, the WiSeConnect 3 SDK contains the Starfield Root CA Certificate in C-array format. > **Note** : - The included self signed certificates will work for local OpenSSL server. Incase of cloud server, using default certificates in the release, cloud connection doesn't work. Please replace the default certificates with valid certificates while connecting to Cloud Server. + The included self-signed certificates will work for local OpenSSL servers. For a cloud server, using default certificates will not work for the cloud connection. You must replace the default certificates with valid certificates while connecting to a cloud server. ## Test the Application @@ -149,9 +149,9 @@ For details on the project folder structure, see the [WiSeConnect Examples](http Copy the certificates server-cert and server-key into Openssl/bin folder in the Windows PC (Remote PC). ->**NOTE:** All the certificates are given in the SDK. Path: `/resources/certificates` +>**NOTE:** All the certificates are given in the SDK. Path: `/resources/certificates`. -- In Windows PC (Remote PC) which is connected to AP, run the Openssl server by giving the following command. +- In Windows PC (Remote PC). which is connected to AP, run the Openssl server by giving the following command. ```c > Openssl.exe s_server -accept -cert -key -tls @@ -162,14 +162,14 @@ Copy the certificates server-cert and server-key into Openssl/bin folder in the ### Run the application -Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to +Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: - Build the application. -- Flash, run and debug the application. +- Flash, run, and debug the application. -- After the program gets executed, SiWx91x would be connected to access point having the configuration same that of in the application and get IP. +- After the program is executed, the SiWx91x connects to the access point that has the same configuration as that in the application, and gets the IP. -- The device which is configured as SSL client will connect to three different remote SSL servers. +- The device which is configured as an SSL client will connect to three different remote SSL servers. ![two_ssl_servers](resources/readme/two_ssl_servers.png) @@ -181,7 +181,7 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise - The WiSeConnect 3 SDK provides a conversion script (written in Python 3) to make the conversion straightforward. The script is provided in the SDK `/resources/scripts` directory and is called [certificate_to_array.py](https://github.com/SiliconLabs/wiseconnect/tree/master/resources/certificates/). -- Copy the downloaded device certificate, private key from AWS and also the certificate_to_array.py to the `/resources/certificates`. +- Copy the downloaded device certificate, private key from AWS, and also the certificate_to_array.py to the `/resources/certificates`. - To convert the device certificate and private key to C arrays, open a system command prompt in the same path and give the following commands. @@ -193,7 +193,7 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise $> python3 certificate_to_array.py d8f3a44d3f.pem.key aws_private_key ``` -- After running the above commands, two new files shall be created as below: +- After running the above commands, two new files are created as below: ```sh aws_device_certificate.crt.h @@ -211,23 +211,30 @@ Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wise > **NOTE :** > Amazon uses [Starfield Technologies](https://www.starfieldtech.com/) to secure the AWS website, the WiSeConnect SDK includes the [Starfield CA Certificate](https://github.com/SiliconLabs/wiseconnect/tree/master/resources/certificates/aws_starfield_ca.pem.h). > -> For AWS connectivity, StarField Root CA Class 2 certificate has the highest authority being at the top of the signing hierarchy. +> AWS has announced that there will be changes in their root CA chain. More details can be found in the reference link:(https://aws.amazon.com/blogs/security/acm-will-no-longer-cross-sign-certificates-with-starfield-class-2-starting-august-2024/) +> +> We are providing both root CAs (Starfield class-2 and Starfield G2) in aws_starfield_ca.pem.h, which is located in the WiSeConnect directory `/resources/certificates/aws_starfield_ca.pem.h`. > -> The StarField Root CA Class 2 certificate is an expected/required certificate which usually comes pre-installed in the operating systems and plays a key part in certificate chain verification when a device is performing TLS authentication with the IoT endpoint. +> For AWS connectivity, StarField Root CA certificate has the highest authority being at the top of the signing hierarchy. > -> On SiWx91x device, we do not maintain the root CA trust repository due to memory constraints, so it is mandatory to load Starfield Root CA Class 2 certificate for successful mutual authentication to the AWS server. +> The StarField Root CA certificate is an expected/required certificate which usually comes pre-installed in the operating systems and plays a key part in certificate chain verification when a device is performing TLS authentication with the IoT endpoint. +> +> On the SiWx91x device, we do not maintain the root CA trust repository due to memory constraints, so it is mandatory to load Starfield Root CA certificate for successful mutual authentication to the AWS server. > > The certificate chain sent by AWS server is as below: -> id-at-commonName=Amazon,id-at-organizationalUnitName=Server CA 1B,id-at-organizationName=Amazon,id-at-countryName=US +> Starfield Class 2 : +> id-at-commonName=Amazon,RSA 2048 M01,id-at-organizationName=Amazon,id-at-countryName=US > id-at-commonName=Amazon Root CA 1,id-at-organizationName=Amazon,id-at-countryName=US -> id-at-commonName=Starfield Services Root Certificate Authority ,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at- stateOrProvinceName=Arizona,id-at-countryName=US) +> id-at-commonName=Starfield Services Root Certificate Authority - G2,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at- stateOrProvinceName=Arizona,id-at-countryName=US +>id-at-organizationalUnitName=Starfield Class 2 Certification Authority,id-at-organizationName=Starfield Technologies, Inc.,id-at-countryName=US > -> On SiWx91x to authenticate the AWS server, firstly Root CA is validated (validate the Root CA received with the Root CA loaded on the device). Once the Root CA validation is successful, other certificates sent from the AWS server are validated. -> SiWx91x doesn't authenticate to AWS server if intermediate CA certificates are loaded instead of Starfield Root CA Class 2 certificate and would result in a Handshake error. -> StarField Root CA Class 2 certificate is at +> Starfield G2: +> id-at-commonName=Amazon RSA 2048 M01,id-at-organizationName=Amazon,id-at-countryName=US +> id-at-commonName=Amazon Root CA 1,id-at-organizationName=Amazon,id-at-countryName=US +> id-at-commonName=Starfield Services Root Certificate Authority - G2,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at-stateOrProvinceName=Arizona,id-at-countryName=US > -> Reference links : -> +> To authenticate the AWS server on SiWx91x, first validate the Root CA (validate the Root CA received with the Root CA loaded on the device). Once the Root CA validation is successful, other certificates sent from the AWS server are validated. +> If intermediate CA certificates are loaded instead of the Starfield Root CA certificate, the SiWx91x will not authenticate to the AWS server, resulting in a Handshake error. ### Create an AWS Thing @@ -245,36 +252,36 @@ Create a thing in the AWS IoT registry to represent your IoT device. ![AWS thing creation](resources/readme/aws_create_thing_step3.png) -- On the **Specify thing properties** page, enter a name for your IoT thing (for example, **Test_IoT**), and choose **Unnamed shadow (classic)** in the Device Shadow section, then choose **Next**. You can't change the name of a thing after you create it. To change a thing's name, you must create a new thing, give it the new name, and then delete the old thing. +- On the **Specify thing properties** page, enter a name for your IoT thing (for example, **Test_IoT**), and choose **Unnamed shadow (classic)** in the Device Shadow section, then choose **Next**. You cannot change the name of a thing after you create it. To change a thing's name, you must create a new thing, give it the new name, and then delete the old thing. ![Add Device 1](resources/readme/aws_create_thing_step4.png) -- During **Configure device certificate** step, choose **Auto-generate a new certificate (recommended)** option and click next. +- During the **Configure device certificate** step, choose **Auto-generate a new certificate (recommended)** option and click next. ![Add Device 2](resources/readme/aws_create_thing_step5.png) -- Attach the policy to the thing created - - If you have any existing policy, attach it and click on create thing +- Attach the policy to the thing created. + - If you have any existing policy, attach it and click on create thing. ![Attach policy](resources/readme/aws_choosing_policy.png) - - If policy is not yet created, follow the below steps. + - If policy is not yet created, follow the steps below. - - Choose **Create policy** and fill the fields as per your requirements. + - Choose **Create policy** and fill in the fields as per your requirements. ![Create policy](resources/readme/aws_create_thing_attach_policy.png) - - Give the **Name** to your Policy, Fill **Action** and **Resource ARN** as shown in below image, Click on **Allow** under **Effect** and click **Create**. + - Give the **Name** to your Policy. Fill in the **Action** and **Resource ARN** fields as shown in the image below. Click on **Allow** under **Effect** and click **Create**. ![Filling fields for policy](resources/readme/aws_create_thing_policy_create.png) - Choose the created policy and click on **Create thing**. - Choose the **Download** links to download the device certificate and private key. Note that Root CA certificate is already present in SDK (aws_starfield_ca.pem.h), and can be directly used. - > **Warning:** This is the only instance you can download your device certificate and private key. Make sure to save them safely. + > **Warning:** This is the only instance you can download your device certificate and private key. Make sure to save them securely. ![Downloading certificates](resources/readme/aws_thing_certificates_download.png) - Click **Done**. -- The created thing should now be visible on the AWS console (Manage > All devices > Things). \ No newline at end of file +- The created thing should now be visible on the AWS console (Manage > All devices > Things). diff --git a/examples/snippets/wlan/three_ssl_concurrent_client_sockets/three_ssl_client_sockets_ncp.slcp b/examples/snippets/wlan/three_ssl_concurrent_client_sockets/three_ssl_client_sockets_ncp.slcp index bc1ded934..c6930663b 100644 --- a/examples/snippets/wlan/three_ssl_concurrent_client_sockets/three_ssl_client_sockets_ncp.slcp +++ b/examples/snippets/wlan/three_ssl_concurrent_client_sockets/three_ssl_client_sockets_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/three_ssl_concurrent_client_sockets/three_ssl_client_sockets_soc.slcp b/examples/snippets/wlan/three_ssl_concurrent_client_sockets/three_ssl_client_sockets_soc.slcp index 73720ac04..a146986a3 100644 --- a/examples/snippets/wlan/three_ssl_concurrent_client_sockets/three_ssl_client_sockets_soc.slcp +++ b/examples/snippets/wlan/three_ssl_concurrent_client_sockets/three_ssl_client_sockets_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -76,6 +76,10 @@ other_file: - path: resources/readme/aws_create_thing_attach_policy.png - path: resources/readme/aws_create_thing_policy_create.png - path: resources/readme/aws_thing_certificates_download.png +requires: +- name: device_needs_ram_execution + condition: + - si91x_common_flash ui_hints: highlight: - path: readme.md diff --git a/examples/snippets/wlan/tls_client/app.c b/examples/snippets/wlan/tls_client/app.c index b207df0d7..45ee6d35d 100644 --- a/examples/snippets/wlan/tls_client/app.c +++ b/examples/snippets/wlan/tls_client/app.c @@ -37,6 +37,10 @@ #include "socket.h" #include "sl_net_si91x.h" #include "sl_utility.h" +#include "sl_si91x_socket_constants.h" +#include "sl_si91x_socket_types.h" +#include "sl_si91x_socket_utility.h" +#include "sl_si91x_socket_support.h" //include certificates #include "cacert.pem.h" @@ -50,12 +54,15 @@ //! Load certificate to device flash : //! Certificate should be loaded once and need not need to load for every boot up -#define LOAD_CERTIFICATE 1 -#define SERVER_IP "192.168.0.247" -#define SERVER_PORT1 5002 -#define SERVER_PORT2 5003 -#define DATA "Hello from SSL TCP Client\n" -#define NUMBER_OF_PACKETS 1000 +#define LOAD_CERTIFICATE 1 +#define SERVER_IP "192.168.0.247" +#define SERVER_PORT1 5002 +#define SERVER_PORT2 5003 +#define DATA "Hello from SSL TCP Client\n" +#define NUMBER_OF_PACKETS 1000 +#define TLS_EXTENSION_ENABLE 0 +#define TLS_ALPN_EXTENSION "http/1.1" +#define TLS_SNI_EXTENSION "example.com" /****************************************************** * Variable Definitions @@ -105,6 +112,7 @@ static const sl_wifi_device_configuration_t station_init_configuration = { ******************************************************/ static void application_start(void *argument); sl_status_t send_data_from_tls_socket(); +sl_status_t set_tls_extensions(int client_socket); /****************************************************** * Function Definitions @@ -184,6 +192,16 @@ sl_status_t send_data_from_tls_socket() return SL_STATUS_FAIL; } +#if TLS_EXTENSION_ENABLE + status = set_tls_extensions(client_socket1); + if (status != SL_STATUS_OK) { + printf("\r\nFailed to set TLS extension: 0x%lx\r\n", status); + close(client_socket1); + return SL_STATUS_FAIL; + } + printf("\r\nTLS extension set successfully\r\n"); +#endif + return_value = connect(client_socket1, (struct sockaddr *)&server_address, socket_length); if (return_value < 0) { printf("\r\nSocket1 connect failed with %s with bsd error: %d\r\n", tls_socket1, errno); @@ -208,6 +226,17 @@ sl_status_t send_data_from_tls_socket() return SL_STATUS_FAIL; } +#if TLS_EXTENSION_ENABLE + status = set_tls_extensions(client_socket2); + if (status != SL_STATUS_OK) { + printf("\r\nFailed to set TLS extension: 0x%lx\r\n", status); + close(client_socket1); + close(client_socket2); + return SL_STATUS_FAIL; + } + printf("\r\nTLS extension set successfully\r\n"); +#endif + server_address.sin_port = SERVER_PORT2; return_value = connect(client_socket2, (struct sockaddr *)&server_address, socket_length); if (return_value < 0) { @@ -246,3 +275,81 @@ sl_status_t send_data_from_tls_socket() return status; } + +sl_status_t set_tls_extensions(int client_socket) +{ + + int socket_return_value = 0; + + // Calculate the length of the SNI data + uint16_t sni_length = (uint16_t)strlen(TLS_SNI_EXTENSION); + + // Allocate memory for the sl_si91x_socket_type_length_value_t structure + sl_si91x_socket_type_length_value_t *sni_value = + (sl_si91x_socket_type_length_value_t *)malloc(sizeof(sl_si91x_socket_type_length_value_t) + sni_length); + + if (sni_value == NULL) { + printf("\r\nMemory allocation failed for SNI value\r\n"); + return SL_STATUS_ALLOCATION_FAILED; + } + + // Set the type to 1 for SNI extension + sni_value->type = SL_SI91X_TLS_EXTENSION_SNI_TYPE; + + // Set the length of the SNI data + sni_value->length = sni_length; + + // Copy the SNI data into the value field + memcpy(sni_value->value, TLS_SNI_EXTENSION, sni_length); + + socket_return_value = sl_si91x_set_custom_sync_sockopt(client_socket, + SOL_SOCKET, + SO_TLS_ALPN, + sni_value, + sizeof(sl_si91x_socket_type_length_value_t) + sni_length); + + if (socket_return_value < 0) { + printf("\r\nSet Socket option SNI extension failed with bsd error: %d\r\n", errno); + free(sni_value); + return SL_STATUS_FAIL; + } + + free(sni_value); + + // Calculate the length of the ALPN data + uint16_t alpn_length = (uint16_t)strlen(TLS_ALPN_EXTENSION); + + // Allocate memory for the sl_si91x_socket_type_length_value_t structure + sl_si91x_socket_type_length_value_t *alpn_value = + (sl_si91x_socket_type_length_value_t *)malloc(sizeof(sl_si91x_socket_type_length_value_t) + alpn_length); + + if (alpn_value == NULL) { + printf("\r\nMemory allocation failed for ALPN value\r\n"); + return SL_STATUS_ALLOCATION_FAILED; + } + + // Set the type to 2 for ALPN extension + alpn_value->type = SL_SI91X_TLS_EXTENSION_ALPN_TYPE; + + // Set the length of the ALPN data + alpn_value->length = alpn_length; + + // Copy the ALPN data into the value field + memcpy(alpn_value->value, TLS_ALPN_EXTENSION, alpn_length); + + socket_return_value = sl_si91x_set_custom_sync_sockopt(client_socket, + SOL_SOCKET, + SO_TLS_ALPN, + alpn_value, + sizeof(sl_si91x_socket_type_length_value_t) + alpn_length); + + if (socket_return_value < 0) { + SL_DEBUG_LOG("\r\nSet Socket option ALPN extension failed with bsd error: %d\r\n", errno); + free(alpn_value); + return SL_STATUS_FAIL; + } + + // Free the allocated memory after usage + free(alpn_value); + return SL_STATUS_OK; +} diff --git a/examples/snippets/wlan/tls_client/tls_client_ncp.slcp b/examples/snippets/wlan/tls_client/tls_client_ncp.slcp index a8a843982..366f9e84c 100644 --- a/examples/snippets/wlan/tls_client/tls_client_ncp.slcp +++ b/examples/snippets/wlan/tls_client/tls_client_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/tls_client/tls_client_soc.slcp b/examples/snippets/wlan/tls_client/tls_client_soc.slcp index 480b2b9c6..9def3934c 100644 --- a/examples/snippets/wlan/tls_client/tls_client_soc.slcp +++ b/examples/snippets/wlan/tls_client/tls_client_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -64,6 +64,10 @@ other_file: - path: resources/readme/server2.png - path: resources/readme/tls_client_output.png - path: resources/readme/tls_client_soc_ncp.png +requires: +- name: device_needs_ram_execution + condition: + - si91x_common_flash ui_hints: highlight: - path: readme.md diff --git a/examples/snippets/wlan/twt_use_case_remote_app/twt_use_case_remote_app_ncp.slcp b/examples/snippets/wlan/twt_use_case_remote_app/twt_use_case_remote_app_ncp.slcp index 551b87904..f3a073948 100644 --- a/examples/snippets/wlan/twt_use_case_remote_app/twt_use_case_remote_app_ncp.slcp +++ b/examples/snippets/wlan/twt_use_case_remote_app/twt_use_case_remote_app_ncp.slcp @@ -13,10 +13,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/twt_use_case_remote_app/twt_use_case_remote_app_soc.slcp b/examples/snippets/wlan/twt_use_case_remote_app/twt_use_case_remote_app_soc.slcp index d1a932ac4..51347597d 100644 --- a/examples/snippets/wlan/twt_use_case_remote_app/twt_use_case_remote_app_soc.slcp +++ b/examples/snippets/wlan/twt_use_case_remote_app/twt_use_case_remote_app_soc.slcp @@ -13,10 +13,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/user_gain_table/user_gain_table_ncp.slcp b/examples/snippets/wlan/user_gain_table/user_gain_table_ncp.slcp index b4e2dca3a..74101a086 100644 --- a/examples/snippets/wlan/user_gain_table/user_gain_table_ncp.slcp +++ b/examples/snippets/wlan/user_gain_table/user_gain_table_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/user_gain_table/user_gain_table_soc.slcp b/examples/snippets/wlan/user_gain_table/user_gain_table_soc.slcp index a29410cb1..e8d32229e 100644 --- a/examples/snippets/wlan/user_gain_table/user_gain_table_soc.slcp +++ b/examples/snippets/wlan/user_gain_table/user_gain_table_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/user_gain_table/user_gain_table_uart_ncp.slcp b/examples/snippets/wlan/user_gain_table/user_gain_table_uart_ncp.slcp index 7b824993d..73cbd061c 100644 --- a/examples/snippets/wlan/user_gain_table/user_gain_table_uart_ncp.slcp +++ b/examples/snippets/wlan/user_gain_table/user_gain_table_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_ncp.slcp b/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_ncp.slcp index ab0de2231..40e797451 100644 --- a/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_ncp.slcp +++ b/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_ncp.slcp @@ -13,10 +13,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_soc.slcp b/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_soc.slcp index 7cb06a3ba..a41e00199 100644 --- a/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_soc.slcp +++ b/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_soc.slcp @@ -13,10 +13,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_uart_ncp.slcp b/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_uart_ncp.slcp index 11e1877ef..45cd21d0a 100644 --- a/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_uart_ncp.slcp +++ b/examples/snippets/wlan/wifi6_twt_use_case_demo/wifi6_twt_use_case_demo_uart_ncp.slcp @@ -13,10 +13,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_ncp.slcp b/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_ncp.slcp index 87b55a94c..92539a234 100644 --- a/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_ncp.slcp +++ b/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_soc.slcp b/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_soc.slcp index e309daff9..05c129683 100644 --- a/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_soc.slcp +++ b/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_soc.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_uart_ncp.slcp b/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_uart_ncp.slcp index 923ba7332..8972b17bb 100644 --- a/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_uart_ncp.slcp +++ b/examples/snippets/wlan/wlan_rf_test/wlan_rf_test_uart_ncp.slcp @@ -14,10 +14,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/wlan_throughput_v6/wlan_throughput_v6_ncp.slcp b/examples/snippets/wlan/wlan_throughput_v6/wlan_throughput_v6_ncp.slcp index 045698fe4..2014c705d 100644 --- a/examples/snippets/wlan/wlan_throughput_v6/wlan_throughput_v6_ncp.slcp +++ b/examples/snippets/wlan/wlan_throughput_v6/wlan_throughput_v6_ncp.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan/wlan_throughput_v6/wlan_throughput_v6_soc.slcp b/examples/snippets/wlan/wlan_throughput_v6/wlan_throughput_v6_soc.slcp index 10a675554..0efb4469e 100644 --- a/examples/snippets/wlan/wlan_throughput_v6/wlan_throughput_v6_soc.slcp +++ b/examples/snippets/wlan/wlan_throughput_v6/wlan_throughput_v6_soc.slcp @@ -15,10 +15,10 @@ filter: - Beginner sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan_ble/out_of_box_demo/app.c b/examples/snippets/wlan_ble/out_of_box_demo/app.c index 47d0b34e2..1e8ccf6db 100644 --- a/examples/snippets/wlan_ble/out_of_box_demo/app.c +++ b/examples/snippets/wlan_ble/out_of_box_demo/app.c @@ -60,12 +60,19 @@ osSemaphoreId_t ble_thread_sem; osSemaphoreId_t i2c_sem; extern volatile int currentLine; extern GLIB_Context_t glibContext; - +// The following condition enables the front-end internal switch control +#if (SL_SI91X_ACX_MODULE == 1) +#define FRONT_END_SWITCH_CTRL SL_SI91X_EXT_FEAT_FRONT_END_INTERNAL_SWITCH +#define REGION_CODE IGNORE_REGION +#else +#define FRONT_END_SWITCH_CTRL SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 +#define REGION_CODE WORLD_DOMAIN +#endif static const sl_wifi_device_configuration_t config = { .boot_option = LOAD_NWP_FW, .mac_address = NULL, .band = SL_SI91X_WIFI_BAND_2_4GHZ, - .region_code = WORLD_DOMAIN, + .region_code = REGION_CODE, .boot_config = { .oper_mode = SL_SI91X_CLIENT_MODE, .coex_mode = SL_SI91X_WLAN_BLE_MODE, .feature_bit_map = (SL_SI91X_FEAT_ULP_GPIO_BASED_HANDSHAKE | SL_SI91X_FEAT_DEV_TO_HOST_ULP_GPIO_1 @@ -83,7 +90,7 @@ static const sl_wifi_device_configuration_t config = { .ext_custom_feature_bit_map = (SL_SI91X_EXT_FEAT_LOW_POWER_MODE | SL_SI91X_EXT_FEAT_XTAL_CLK | MEMORY_CONFIG #ifdef SLI_SI917 - | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 + | FRONT_END_SWITCH_CTRL #endif | SL_SI91X_EXT_FEAT_BT_CUSTOM_FEAT_ENABLE), .bt_feature_bit_map = (SL_SI91X_BT_RF_TYPE | SL_SI91X_ENABLE_BLE_PROTOCOL), diff --git a/examples/snippets/wlan_ble/out_of_box_demo/out_of_box_demo.slcp b/examples/snippets/wlan_ble/out_of_box_demo/out_of_box_demo.slcp index 75183000a..e622aa9ae 100644 --- a/examples/snippets/wlan_ble/out_of_box_demo/out_of_box_demo.slcp +++ b/examples/snippets/wlan_ble/out_of_box_demo/out_of_box_demo.slcp @@ -10,9 +10,9 @@ filter: value: ["WiFi BLE"] - name: "Project Difficulty" value: ["Intermediate"] -sdk: {id: simplicity_sdk, version: 2024.6.1} +sdk: {id: simplicity_sdk, version: 2024.6.2} sdk_extension: -- {id: wiseconnect3_sdk, version: 3.3.2} +- {id: wiseconnect3_sdk, version: 3.3.3} source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan_ble/out_of_box_demo/wifi_app.c b/examples/snippets/wlan_ble/out_of_box_demo/wifi_app.c index 3a53abee5..7846f7e9b 100644 --- a/examples/snippets/wlan_ble/out_of_box_demo/wifi_app.c +++ b/examples/snippets/wlan_ble/out_of_box_demo/wifi_app.c @@ -177,7 +177,7 @@ void wifi_app_set_event(uint32_t event_num); void wifi_app_clear_event(uint32_t event_num); int32_t wifi_app_get_event(void); sl_status_t join_callback_handler(sl_wifi_event_t event, char *result, uint32_t result_length, void *arg); -void rsi_wlan_app_call_backs_init(void); +void rsi_wlan_app_callbacks_init(void); sl_status_t wlan_app_scan_callback_handler(sl_wifi_event_t event, sl_wifi_scan_result_t *result, uint32_t result_length, @@ -366,7 +366,7 @@ sl_status_t join_callback_handler(sl_wifi_event_t event, char *result, uint32_t return SL_STATUS_OK; } -void rsi_wlan_app_call_backs_init(void) +void rsi_wlan_app_callbacks_init(void) { //! Initialize join fail call back sl_wifi_set_join_callback(join_callback_handler, NULL); diff --git a/examples/snippets/wlan_ble/wifi_https_ble_dual_role/wifi_https_ble_dual_role_ncp.slcp b/examples/snippets/wlan_ble/wifi_https_ble_dual_role/wifi_https_ble_dual_role_ncp.slcp index 37e3a649b..6a74e4e72 100644 --- a/examples/snippets/wlan_ble/wifi_https_ble_dual_role/wifi_https_ble_dual_role_ncp.slcp +++ b/examples/snippets/wlan_ble/wifi_https_ble_dual_role/wifi_https_ble_dual_role_ncp.slcp @@ -15,10 +15,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan_ble/wifi_https_ble_dual_role/wifi_https_ble_dual_role_soc.slcp b/examples/snippets/wlan_ble/wifi_https_ble_dual_role/wifi_https_ble_dual_role_soc.slcp index cf3db43ce..de8a09d72 100644 --- a/examples/snippets/wlan_ble/wifi_https_ble_dual_role/wifi_https_ble_dual_role_soc.slcp +++ b/examples/snippets/wlan_ble/wifi_https_ble_dual_role/wifi_https_ble_dual_role_soc.slcp @@ -15,10 +15,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c @@ -84,6 +84,10 @@ other_file: - path: resources/readme/remote_screen3.png - path: resources/readme/SSL_screen1.png - path: resources/readme/http_server_1.png +requires: +- name: device_needs_ram_execution + condition: + - si91x_common_flash ui_hints: highlight: - path: readme.md diff --git a/examples/snippets/wlan_ble/wifi_station_ble_provisioning/wifi_station_ble_provisioning_ncp.slcp b/examples/snippets/wlan_ble/wifi_station_ble_provisioning/wifi_station_ble_provisioning_ncp.slcp index 5880daae7..d5d2d35e2 100644 --- a/examples/snippets/wlan_ble/wifi_station_ble_provisioning/wifi_station_ble_provisioning_ncp.slcp +++ b/examples/snippets/wlan_ble/wifi_station_ble_provisioning/wifi_station_ble_provisioning_ncp.slcp @@ -15,10 +15,10 @@ filter: - Intermediate sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan_ble/wifi_station_ble_provisioning/wifi_station_ble_provisioning_soc.slcp b/examples/snippets/wlan_ble/wifi_station_ble_provisioning/wifi_station_ble_provisioning_soc.slcp index 0c7c189ed..4e443c19f 100644 --- a/examples/snippets/wlan_ble/wifi_station_ble_provisioning/wifi_station_ble_provisioning_soc.slcp +++ b/examples/snippets/wlan_ble/wifi_station_ble_provisioning/wifi_station_ble_provisioning_soc.slcp @@ -15,10 +15,10 @@ filter: - Intermediate sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/readme.md b/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/readme.md index 272a9dfa1..bfb2f6db8 100644 --- a/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/readme.md +++ b/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/readme.md @@ -22,32 +22,32 @@ ## Purpose / Scope -In this application, the Bluetooth Low Energy (BLE) and Simplicity Connect App(formerly EFR Connect App)lication are used for provisioning the SiWx917 to a Wi-Fi Network. The SiWx917 acts as a Wi-Fi station and connects to the AWS cloud via MQTT. After the connection is established, it subscribes to MQTT_TOPIC1. The application then publishes a message to the cloud on MQTT_TOPIC2, and thereafter the SiWx917 is put into Associated Power Save mode. +In this application, the Bluetooth Low Energy (BLE) and Simplicity Connect Application (formerly EFR Connect App) are used for provisioning the SiWx917 to a Wi-Fi Network. The SiWx917 acts as a Wi-Fi station and connects to the AWS cloud via MQTT. After the connection is established, it subscribes to MQTT_TOPIC1. The application then publishes a message to the cloud on MQTT_TOPIC2, and thereafter the SiWx917 is put into Associated Power Save mode. ## Soc Mode: -Si917 connected to LM75 Temperature Sensor via I2C interface, collects real time temperature data publishes to the cloud until the device is disconnected from the access point. After publish, the NWP processor is set in to associated power save. Next, the application works differently in NCP and SoC modes as defined below. +Si917 connected to LM75 Temperature Sensor via I2C interface collects real time temperature data publishes to the cloud until the device is disconnected from the access point. After publish, the NWP processor is set into associated power save. Next, the application works differently in NCP and SoC modes as defined below. -If macro **SL_SI91X_TICKLESS_MODE** enabled, Then M4 processor is set in sleep mode. The M4 processor can be woken in several ways as mentioned below: +If macro **SL_SI91X_TICKLESS_MODE** enabled, then the M4 processor is set in sleep mode. The M4 processor can be woken in several ways as mentioned below: ### Tickless Mode -In Tickless Mode, the device enters sleep based on the idle time set by the scheduler. The device can be awakened by these methods: SysRTC, a wireless signal, Button press-based (GPIO) and Alarm based wakeup. +In Tickless Mode, the device enters sleep based on the idle time set by the scheduler. The device can be awakened by these methods: SysRTC, a wireless signal, Button press-based (GPIO), and Alarm-based wakeup. - **SysRTC (System Real-Time Clock)**: By default, the device uses SysRTC as the wakeup source. The device will enter sleep mode and then wake up when the SysRTC matches the idle time set by the scheduler. - **Wireless Wakeup**: The device can also be awakened by a wireless signal. If this signal is triggered before the idle time set by the scheduler, the device will wake up in response to it. -- **Button Based Wakeup**:The device can also be awakened by a button signal. +- **Button-based Wakeup**:The device can also be awakened by a button signal. -- **Alarm Based Wakeup**:The device can also be awakened by setting the timeout to the appropriate duration in the osSemaphoreAcquire function. +- **Alarm-based Wakeup**:The device can also be awakened by setting the timeout to the appropriate duration in the osSemaphoreAcquire function. -After M4 processor wakes up via any of the above processes, the application publishes **MQTT_publish_QOS0_PAYLOAD** message on **MQTT_TOPIC2** topic. +After M4 processor wakes up via any of the above processes, the application publishes the **MQTT_publish_QOS0_PAYLOAD** message on the **MQTT_TOPIC2** topic. -If macro **SL_SI91X_TICKLESS_MODE** is disabled, then M4 processor does not go to sleep. A timer is run with a periodicity of **PUBLISH_PERIODICITY** milliseconds.The application publishes **MQTT_publish_QOS0_PAYLOAD** message on **MQTT_TOPIC2** topic in the following cases: +If macro **SL_SI91X_TICKLESS_MODE** is disabled, then the M4 processor does not go to sleep. A timer is run with a periodicity of **PUBLISH_PERIODICITY** milliseconds. The application publishes the **MQTT_publish_QOS0_PAYLOAD** message on the **MQTT_TOPIC2** topic in the following cases: -1. Once in every **PUBLISH_PERIODICITY** time period. -2. When an incoming publish is received by the application. +- Once in every **PUBLISH_PERIODICITY** time period. +- When an incoming publish is received by the application. **NCP Mode**: @@ -65,9 +65,9 @@ A timer is run with a periodicity of **PUBLISH_PERIODICITY** milliseconds. The a - A Windows PC - USB-C cable -- A Wireless Access point (which has an active internet access) -- Android Phone or iPhone with **Simplicity Connect App(formerly EFR Connect App)** App, which is available in Play Store and App Store. -- LM75 Temperature Sensor (inbuilt sensor available on WSDK/WPK board) +- A Wireless Access Point (which has an active internet access) +- Android Phone or iPhone with **Simplicity Connect App (formerly EFR Connect App)** App, which is available in Play Store and App Store. +- LM75 Temperature Sensor (in-built sensor available on WSDK/WPK board) - **SoC Mode**: - Standalone - BRD4002A Wireless pro kit mainboard [SI-MB4002A] @@ -137,14 +137,14 @@ For SoC Mode only: #define RTE_I2C2_SDA_PORT_ID 0 ``` - Open `wifi_app.c` file and update/modify following macros + Open `wifi_app.c` file and update/modify the following macros: - Modify the MQTT topics and give different names for both topics SiWx917 is subscribed to MQTT_TOPIC1 and publishing to MQTT_TOPIC2. + Modify the MQTT topics and give different names for both topics the SiWx917 is subscribed to: MQTT_TOPIC1 and publishing to MQTT_TOPIC2. MQTT web application is subscribed to `MQTT_TOPIC2` and publishing on `MQTT_TOPIC1`. ```c -#define MQTT_TOPIC1 "aws_status" //! Subscribe Topic to receive the message from cloud -#define MQTT_TOPIC2 "si91x_status" //! Publish Topic to send the status from application to cloud +#define MQTT_TOPIC1 "aws_status" //! Subscribe topic to receive the message from cloud +#define MQTT_TOPIC2 "si91x_status" //! Publish topic to send the status from application to cloud ``` **NOTE:** You can change the topic names, which are `aws_status` and `si91x_status`. @@ -156,7 +156,7 @@ For SoC Mode only: #define PUBLISH_PERIODICITY (30000) // Configure this macro to publish data every 30 seconds (this works only in NCP with and without POWERSAVE and in SOC without POWERSAVE). ``` -Open `ble_app.c` file and update/modify following macros +Open `ble_app.c` file and update/modify following macros: **Configuring the BLE Application** @@ -227,11 +227,11 @@ Open `ble_app.c` file and update/modify following macros ```c #define RSI_BLE_ATT_PROPERTY_NOTIFY 0x10 ``` -### Configure the below parameters in `aws_iot_config.h` file present at `/config` +### Configure the following parameters in `aws_iot_config.h` file present at `/config` > - Before configuring the parameters in `aws_iot_config.h`, register the SiWx917 device in the AWS IoT registry by following the steps mentioned in [Create an AWS Thing](#create-an-aws-thing) section. > -> - Configure AWS_IOT_MQTT_HOST macro with the device data endpoint to connect to AWS. For getting the device data endpoint in the AWS IoT Console navigate to Settings and copy the Endpoint and define the AWS_IOT_MQTT_HOST macro with this value. +> - Configure AWS_IOT_MQTT_HOST macro with the device data endpoint to connect to AWS. To get the device data endpoint in the AWS IoT Console, navigate to Settings, copy the Endpoint, and define the AWS_IOT_MQTT_HOST macro with this value. > > ![AWS_IOT_MQTT_HOST_NAME](resources/readme/aws_iot_mqtt_host_url_1.png) @@ -248,35 +248,35 @@ Open `ble_app.c` file and update/modify following macros // Thing Name of the Shadow this device is associated with #define AWS_IOT_MY_THING_NAME "silicon_labs_thing" ``` -> - To authenticate and securely connect with AWS, the SiWx917 device requires a unique x.509 security certificate and private key, as well as a CA certificate. At this point, you must be having device certificate, private key and CA certificate which are downloaded during the creation/registration of AWS Thing. +> - To authenticate and securely connect with AWS, the SiWx917 device requires a unique x.509 security certificate and private key, as well as a CA certificate. At this point, you must have a device certificate, private key, and CA certificate, which are downloaded during the creation/registration of AWS Thing. > -> - By default the device certificate and private key that are downloaded from the AWS are in [.pem format](https://en.wikipedia.org/wiki/Privacy-Enhanced_Mail). To load the device certificate and private key to the SiWx917, the device certificate and private key should be converted into a C-array. For converting the certificates and private key into C-array refer to [Setting up Security Certificates](#setting-up-security-certificates). +> - By default, the device certificate and private key that are downloaded from the AWS are in [.pem format](https://en.wikipedia.org/wiki/Privacy-Enhanced_Mail). To load the device certificate and private key to the SiWx917, the device certificate and private key should be converted into a C-array. For converting the certificates and private key into a C-array, refer to [Setting up Security Certificates](#setting-up-security-certificates). > -> - By default the WiSeConnect 3 SDK contains the Starfield Root CA Certificate in C-array format. +> - By default, the WiSeConnect 3 SDK contains the Starfield Root CA Certificate in C-array format. > **Note** : - The included Cloud connectivity certificates are for reference only, using default certificates in the release, cloud connection doesn't work. Please replace the default certificates with valid certificates while connecting to appropriate Cloud/OpenSSL Server. + The included Cloud connectivity certificates are for reference only. If using default certificates in the release, the cloud connection will not work. You must replace the default certificates with valid certificates while connecting to the appropriate Cloud/OpenSSL Server. ## Test the Application Refer to the instructions [here](https://docs.silabs.com/wiseconnect/latest/wiseconnect-getting-started/) to: - Build the application. -- Flash, run and debug the application +- Flash, run, and debug the application. Follow the steps below for successful execution of the application: -1. Configure the Access point in OPEN/WPA-PSK/WPA2-PSK/WPA3 mode to connect the SiWx917 in STA mode. +1. Configure the access point in OPEN/WPA-PSK/WPA2-PSK/WPA3 mode to connect the SiWx917 in STA mode. 2. Connect any serial console for prints. -3. When SiWx917 EVK enters BLE advertising mode, launch the **Simplicity Connect App(formerly EFR Connect App)** App. +3. When the SiWx917 EVK enters BLE advertising mode, launch the **Simplicity Connect App (formerly EFR Connect App)**. 4. Click on Demo and select Wi-Fi Commissioning over BLE. ![](resources/readme/remote_screen1.png) -5. It will scan for the module, and it appears as `BLE_CONFIGURATOR` on the UI, select as shown below. +5. It will scan for the module, and it appears as `BLE_CONFIGURATOR` on the UI. Select as shown below. ![](resources/readme/dut_scan_result.png) @@ -286,17 +286,17 @@ Follow the steps below for successful execution of the application: ![](resources/readme/remote_screen2.png) -8. Click on the SSID of the AP, enter password if the AP is in security mode. Click on connect to associate with the access point. +8. Click on the SSID of the AP, enter a password if the AP is in security mode. Click on connect to associate with the access point. ![](resources/readme/remote_screen3.png) -9. Once Silicon labs module is connected to the access point, you can notice on the GUI as below. +9. Once the Silicon Labs module is connected to the access point, you can see it on the GUI, as shown below. ![](resources/readme/remote_screen4.png) -10. This completes the BLE provisioning using Android application, next step is the [MQTT Connection](#mqtt-connection) +10. This completes the BLE provisioning using Android application. The next step is the [MQTT Connection](#mqtt-connection). -11. To disconnect from Access Point, click on connected AP and click on YES +11. To disconnect from the access point, click on connected AP and click on YES. ![](resources/readme/remote_screen5.png) @@ -315,29 +315,29 @@ Follow the steps below for successful execution of the application: ![](resources/readme/output3.png) **Note:** -- To know more about aws mqtt apis error codes. Please refer wiseconnect3\third_party\aws_sdk\include\aws_iot_error.h file. -- As the user is calling select and waiting forever, if no data is received, it is the user's responsibility to manage sending the keepalive packets to maintain the connection. +- To learn more about aws mqtt apis error codes, refer to the wiseconnect3\third_party\aws_sdk\include\aws_iot_error.h file. +- If the user is calling select and experiencing long wait times, and if no data is received, it is the user's responsibility to manage sending the keepalive packets to maintain the connection. ### MQTT Connection -- After successful Wi-Fi connection, application connects to AWS Core and subscribes to a topic. Publishes a message on subscribed topic and application waits to receive the data published on subscribed topic from the cloud. +- After successful Wi-Fi connection, the application connects to AWS Core and subscribes to a topic. It then publishes a message on the subscribed topic and waits to receive the data published on the subscribed topic from the cloud. -- You can use any MQTT client and connect to the AWS cloud, for subscribe and publishing messages. +- You can use any MQTT client and connect to the AWS cloud for subscribe and publishing messages. To do that, -1. Go to the [AWS IoT console](https://console.aws.amazon.com/iot/home), in the navigation pane, under Manage, choose All devices, and then choose Things. +1. Go to the [AWS IoT console](https://console.aws.amazon.com/iot/home). In the navigation pane, under Manage, choose All devices, and then choose Things. -2. Click on the thing you have created. Go to activity at below. Click on MQTT test client as shown below. +2. Click on the thing you have created. Go to activity as shown below. Click on MQTT test client as shown below. ![](resources/readme/aws_screen.png) -3. Then subscribe to a topic that is configured in the application, give the name of the topic and click on subscribe as shown below. You can see the published data from the device. +3. Then subscribe to a topic that is configured in the application, give the name of the topic, and click on subscribe as shown below. You can see the published data from the device. ![](resources/readme/aws_screen1.png) ![](resources/readme/aws_screen2.png) -4. To publish data from AWS. Give the name of the topic configured in the application and write down the data at Message payload as shown below.Then click on publish. +4. To publish data from AWS, enter the name of the topic configured in the application and write down the data at Message payload as shown below. Then click on publish. ![](resources/readme/aws_screen3.png) @@ -347,18 +347,18 @@ To do that, Using Simplicity Studio Energy Profiler for current measurement: -- After flashing the application code to the module. Energy profiler can be used for current consumption measurements. +- After flashing the application code to the module, the energy profiler can be used for current consumption measurements. -- From tools, choose Energy Profiler and click "OK" +- From tools, choose Energy Profiler and click "OK". ![Figure: Energy Profiler Step 6](resources/readme/energy_profiler_step_6.png) -- From Quick Access, choose Start Energy Capture option +- From Quick Access, choose Start Energy Capture option. ![Figure: Energy Profiler Step 7](resources/readme/energy_profiler_step_7.png) - **NOTE** : The measured current may vary if the scenario is performed in open environment. AP to AP variation is also observed. - **NOTE** : To achieve the lowest power numbers in connected sleep, in SoC mode, one should configure `RAM_LEVEL` to `SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV` and M4 to without RAM retention i.e. `sl_si91x_configure_ram_retention` should not be done. + **NOTE** : The measured current may vary if the scenario is performed in an open environment. AP to AP variation is also observed. + **NOTE** : To achieve the lowest power numbers in connected sleep, in SoC mode, configure `RAM_LEVEL` to `SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV` and M4 to without RAM retention, i.e., `sl_si91x_configure_ram_retention` should not be done. - Average current consumption measured in power-meter @@ -376,7 +376,7 @@ For NCP mode, following defines have to enabled manually in preprocessor setting - The WiSeConnect 3 SDK provides a conversion script (written in Python 3) to make the conversion straightforward. The script is provided in the SDK `/resources/scripts` directory and is called [certificate_to_array.py](https://github.com/SiliconLabs/wiseconnect/tree/master/resources/certificates/). -- Copy the downloaded device certificate, private key from AWS and also the certificate_to_array.py to the `/resources/certificates`. +- Copy the downloaded device certificate, private key from AWS, and also the certificate_to_array.py to the `/resources/certificates`. - To convert the device certificate and private key to C arrays, open a system command prompt in the same path and give the following commands. @@ -388,7 +388,7 @@ For NCP mode, following defines have to enabled manually in preprocessor setting $> python3 certificate_to_array.py d8f3a44d3f.pem.key aws_client_private_key.pem ``` -- After running the above commands, two new files shall be created as below: +- After running the above commands, two new files are created as below: ```sh aws_client_certificate.pem.crt.h @@ -411,23 +411,30 @@ For NCP mode, following defines have to enabled manually in preprocessor setting > **NOTE :** > Amazon uses [Starfield Technologies](https://www.starfieldtech.com/) to secure the AWS website, the WiSeConnect SDK includes the [Starfield CA Certificate](https://github.com/SiliconLabs/wiseconnect/tree/master/resources/certificates/aws_starfield_ca.pem.h). > - > For AWS connectivity, StarField Root CA Class 2 certificate has the highest authority being at the top of the signing hierarchy. + > AWS has announced that there will be changes in their root CA chain. More details can be found in the reference link:(https://aws.amazon.com/blogs/security/acm-will-no-longer-cross-sign-certificates-with-starfield-class-2-starting-august-2024/) + > + > We are providing both root CAs (Starfield class-2 and Starfield G2) in aws_starfield_ca.pem.h, which is located in the WiSeConnect directory `/resources/certificates/aws_starfield_ca.pem.h` > - > The StarField Root CA Class 2 certificate is an expected/required certificate which usually comes pre-installed in the operating systems and plays a key part in certificate chain verification when a device is performing TLS authentication with the IoT endpoint. + > For AWS connectivity, StarField Root CA certificate has the highest authority being at the top of the signing hierarchy. > - > On SiWx91x device, we do not maintain the root CA trust repository due to memory constraints, so it is mandatory to load Starfield Root CA Class 2 certificate for successful mutual authentication to the AWS server. + > The StarField Root CA certificate is an expected/required certificate which usually comes pre-installed in the operating systems and plays a key part in certificate chain verification when a device is performing TLS authentication with the IoT endpoint. + > + > On SiWx91x device, we do not maintain the root CA trust repository due to memory constraints, so it is mandatory to load Starfield Root CA certificate for successful mutual authentication to the AWS server. > > The certificate chain sent by AWS server is as below: - > id-at-commonName=Amazon,id-at-organizationalUnitName=Server CA 1B,id-at-organizationName=Amazon,id-at-countryName=US + > Starfield Class 2 : + > id-at-commonName=Amazon,RSA 2048 M01,id-at-organizationName=Amazon,id-at-countryName=US > id-at-commonName=Amazon Root CA 1,id-at-organizationName=Amazon,id-at-countryName=US - > id-at-commonName=Starfield Services Root Certificate Authority ,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at- stateOrProvinceName=Arizona,id-at-countryName=US) + > id-at-commonName=Starfield Services Root Certificate Authority - G2,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at- stateOrProvinceName=Arizona,id-at-countryName=US + >id-at-organizationalUnitName=Starfield Class 2 Certification Authority,id-at-organizationName=Starfield Technologies, Inc.,id-at-countryName=US > - > On SiWx91x to authenticate the AWS server, firstly Root CA is validated (validate the Root CA received with the Root CA loaded on the device). Once the Root CA validation is successful, other certificates sent from the AWS server are validated. - > SiWx91x doesn't authenticate to AWS server if intermediate CA certificates are loaded instead of Starfield Root CA Class 2 certificate and would result in a Handshake error. - > StarField Root CA Class 2 certificate is at + > Starfield G2: + > id-at-commonName=Amazon RSA 2048 M01,id-at-organizationName=Amazon,id-at-countryName=US + > id-at-commonName=Amazon Root CA 1,id-at-organizationName=Amazon,id-at-countryName=US + > id-at-commonName=Starfield Services Root Certificate Authority - G2,id-at-organizationName=Starfield Technologies, Inc.,id-at-localityName=Scottsdale,id-at-stateOrProvinceName=Arizona,id-at-countryName=US > - > Reference links : - > + > To authenticate the AWS server on SiWx91x, first validate the Root CA (validate the Root CA received with the Root CA loaded on the device). Once the Root CA validation is successful, other certificates sent from the AWS server are validated. + > If intermediate CA certificates are loaded instead of the Starfield Root CA certificate, the SiWx91x will not authenticate to the AWS server, resulting in a Handshake error. ### Create an AWS Thing @@ -445,7 +452,7 @@ Create a thing in the AWS IoT registry to represent your IoT device. ![AWS thing creation](resources/readme/aws_create_thing_step3.png) -- On the **Specify thing properties** page, enter a name for your IoT thing (for example, **Test_IoT**), and choose **Unnamed shadow (classic)** in the Device Shadow section, then choose **Next**. You can't change the name of a thing after you create it. To change a thing's name, you must create a new thing, give it a new name, and then delete the old thing. +- On the **Specify thing properties** page, enter a name for your IoT thing (for example, **Test_IoT**), and choose **Unnamed shadow (classic)** in the Device Shadow section, then choose **Next**. You cannot change the name of a thing after you create it. To change a thing's name, you must create a new thing, give it a new name, and then delete the old thing. ![Add Device 1](resources/readme/aws_create_thing_step4.png) @@ -453,30 +460,30 @@ Create a thing in the AWS IoT registry to represent your IoT device. ![Add Device 2](resources/readme/aws_create_thing_step5.png) -- Attach the policy to the thing created - - If you have any existing policy, attach it and click on create thing +- Attach the policy to the thing created. + - If you have any existing policy, attach it and click on create thing. ![Attach policy](resources/readme/aws_choosing_policy.png) - - If policy is not yet created, follow the below steps. + - If policy is not yet created, follow the steps below. - Choose **Create policy** and fill the fields as per your requirements. ![Create policy](resources/readme/aws_create_thing_attach_policy.png) - - Give the **Name** to your Policy, Fill **Action** and **Resource ARN** as shown in below image, Click on **Allow** under **Effect** and click **Create**. + - Give the **Name** to your Policy. Fill in the **Action** and **Resource ARN** fields as shown in the image below. Click on **Allow** under **Effect** and click **Create**. ![Filling fields for policy](resources/readme/aws_create_thing_policy_create.png) - Choose the created policy and click on **Create thing**. - - Choose the **Download** links to download the device certificate and private key. Note that Root CA certificate is already present in SDK (aws_starfield_ca.pem.h), and can be directly used. + - Choose the **Download** links to download the device certificate and private key. Note that Root CA certificate is already present in the SDK (aws_starfield_ca.pem.h), and can be directly used. - >**Warning:** This is the only instance you can download your device certificate and private key. Make sure to save them safely. + >**Warning:** This is the only instance you can download your device certificate and private key. Make sure to save them securely. ![Downloading certificates](resources/readme/aws_thing_certificates_download.png) - Click **Done**. - The created thing should now be visible on the AWS console (Manage > All devices > Things). - \ No newline at end of file + diff --git a/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_app.c b/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_app.c index ee03b8d95..8969e243e 100644 --- a/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_app.c +++ b/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_app.c @@ -276,7 +276,7 @@ sl_status_t join_callback_handler(sl_wifi_event_t event, char *result, uint32_t return SL_STATUS_OK; } -void rsi_wlan_app_call_backs_init(void) +void rsi_wlan_app_callbacks_init(void) { //! Initialize join fail call back sl_wifi_set_join_callback(join_callback_handler, NULL); @@ -392,7 +392,7 @@ int32_t rsi_wlan_mqtt_certs_init(void) return status; } - rsi_wlan_app_call_backs_init(); + rsi_wlan_app_callbacks_init(); return status; } diff --git a/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_ncp.slcp b/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_ncp.slcp index 56c0c4f12..743b89537 100644 --- a/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_ncp.slcp +++ b/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_ncp.slcp @@ -17,10 +17,10 @@ filter: - Intermediate sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_soc.slcp b/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_soc.slcp index 1bd8ff146..c86bd30a0 100644 --- a/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_soc.slcp +++ b/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_soc.slcp @@ -17,10 +17,10 @@ filter: - Intermediate sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_uart_ncp.slcp b/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_uart_ncp.slcp index 36b04fa3e..9341f7324 100644 --- a/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_uart_ncp.slcp +++ b/examples/snippets/wlan_ble/wifi_station_ble_provisioning_aws/wifi_station_ble_provisioning_aws_uart_ncp.slcp @@ -17,10 +17,10 @@ filter: - Intermediate sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan_ble/wifi_station_ble_throughput_app/wifi_station_ble_throughput_app_ncp.slcp b/examples/snippets/wlan_ble/wifi_station_ble_throughput_app/wifi_station_ble_throughput_app_ncp.slcp index aa1d4f8ca..1e7a52ee6 100644 --- a/examples/snippets/wlan_ble/wifi_station_ble_throughput_app/wifi_station_ble_throughput_app_ncp.slcp +++ b/examples/snippets/wlan_ble/wifi_station_ble_throughput_app/wifi_station_ble_throughput_app_ncp.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan_ble/wifi_station_ble_throughput_app/wifi_station_ble_throughput_app_soc.slcp b/examples/snippets/wlan_ble/wifi_station_ble_throughput_app/wifi_station_ble_throughput_app_soc.slcp index 49337e3c8..d0a6e7152 100644 --- a/examples/snippets/wlan_ble/wifi_station_ble_throughput_app/wifi_station_ble_throughput_app_soc.slcp +++ b/examples/snippets/wlan_ble/wifi_station_ble_throughput_app/wifi_station_ble_throughput_app_soc.slcp @@ -14,10 +14,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan_ble/wifi_throughput_ble_dual_role/wifi_throughput_ble_dual_role_ncp.slcp b/examples/snippets/wlan_ble/wifi_throughput_ble_dual_role/wifi_throughput_ble_dual_role_ncp.slcp index c700823bb..7b795deef 100644 --- a/examples/snippets/wlan_ble/wifi_throughput_ble_dual_role/wifi_throughput_ble_dual_role_ncp.slcp +++ b/examples/snippets/wlan_ble/wifi_throughput_ble_dual_role/wifi_throughput_ble_dual_role_ncp.slcp @@ -15,10 +15,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/examples/snippets/wlan_ble/wifi_throughput_ble_dual_role/wifi_throughput_ble_dual_role_soc.slcp b/examples/snippets/wlan_ble/wifi_throughput_ble_dual_role/wifi_throughput_ble_dual_role_soc.slcp index c6b027c69..b4e3b947b 100644 --- a/examples/snippets/wlan_ble/wifi_throughput_ble_dual_role/wifi_throughput_ble_dual_role_soc.slcp +++ b/examples/snippets/wlan_ble/wifi_throughput_ble_dual_role/wifi_throughput_ble_dual_role_soc.slcp @@ -15,10 +15,10 @@ filter: - Advanced sdk: id: simplicity_sdk - version: 2024.6.1 + version: 2024.6.2 sdk_extension: - id: wiseconnect3_sdk - version: 3.3.2 + version: 3.3.3 source: - path: app.c - path: main.c diff --git a/resources/certificates/aws_starfield_ca.pem.h b/resources/certificates/aws_starfield_ca.pem.h index c56ff8111..e8d048453 100644 --- a/resources/certificates/aws_starfield_ca.pem.h +++ b/resources/certificates/aws_starfield_ca.pem.h @@ -16,78 +16,149 @@ ******************************************************************************/ const unsigned char aws_starfield_ca[] = { - '-', '-', '-', '-', '-', 'B', 'E', 'G', 'I', 'N', ' ', 'C', 'E', 'R', 'T', 'I', 'F', 'I', 'C', 'A', - 'T', 'E', '-', '-', '-', '-', '-', '\n', 'M', 'I', 'I', 'E', 'D', 'z', 'C', 'C', 'A', 'v', 'e', 'g', - 'A', 'w', 'I', 'B', 'A', 'g', 'I', 'B', 'A', 'D', 'A', 'N', 'B', 'g', 'k', 'q', 'h', 'k', 'i', 'G', - '9', 'w', '0', 'B', 'A', 'Q', 'U', 'F', 'A', 'D', 'B', 'o', 'M', 'Q', 's', 'w', 'C', 'Q', 'Y', 'D', - 'V', 'Q', 'Q', 'G', 'E', 'w', 'J', 'V', 'U', 'z', 'E', 'l', '\n', 'M', 'C', 'M', 'G', 'A', '1', 'U', - 'E', 'C', 'h', 'M', 'c', 'U', '3', 'R', 'h', 'c', 'm', 'Z', 'p', 'Z', 'W', 'x', 'k', 'I', 'F', 'R', - 'l', 'Y', '2', 'h', 'u', 'b', '2', 'x', 'v', 'Z', '2', 'l', 'l', 'c', 'y', 'w', 'g', 'S', 'W', '5', - 'j', 'L', 'j', 'E', 'y', 'M', 'D', 'A', 'G', 'A', '1', 'U', 'E', 'C', 'x', 'M', 'p', '\n', 'U', '3', - 'R', 'h', 'c', 'm', 'Z', 'p', 'Z', 'W', 'x', 'k', 'I', 'E', 'N', 's', 'Y', 'X', 'N', 'z', 'I', 'D', - 'I', 'g', 'Q', '2', 'V', 'y', 'd', 'G', 'l', 'm', 'a', 'W', 'N', 'h', 'd', 'G', 'l', 'v', 'b', 'i', - 'B', 'B', 'd', 'X', 'R', 'o', 'b', '3', 'J', 'p', 'd', 'H', 'k', 'w', 'H', 'h', 'c', 'N', 'M', 'D', - 'Q', 'w', '\n', 'N', 'j', 'I', '5', 'M', 'T', 'c', 'z', 'O', 'T', 'E', '2', 'W', 'h', 'c', 'N', 'M', - 'z', 'Q', 'w', 'N', 'j', 'I', '5', 'M', 'T', 'c', 'z', 'O', 'T', 'E', '2', 'W', 'j', 'B', 'o', 'M', - 'Q', 's', 'w', 'C', 'Q', 'Y', 'D', 'V', 'Q', 'Q', 'G', 'E', 'w', 'J', 'V', 'U', 'z', 'E', 'l', 'M', - 'C', 'M', 'G', 'A', '1', 'U', 'E', '\n', 'C', 'h', 'M', 'c', 'U', '3', 'R', 'h', 'c', 'm', 'Z', 'p', - 'Z', 'W', 'x', 'k', 'I', 'F', 'R', 'l', 'Y', '2', 'h', 'u', 'b', '2', 'x', 'v', 'Z', '2', 'l', 'l', - 'c', 'y', 'w', 'g', 'S', 'W', '5', 'j', 'L', 'j', 'E', 'y', 'M', 'D', 'A', 'G', 'A', '1', 'U', 'E', - 'C', 'x', 'M', 'p', 'U', '3', 'R', 'h', 'c', 'm', 'Z', 'p', '\n', 'Z', 'W', 'x', 'k', 'I', 'E', 'N', - 's', 'Y', 'X', 'N', 'z', 'I', 'D', 'I', 'g', 'Q', '2', 'V', 'y', 'd', 'G', 'l', 'm', 'a', 'W', 'N', - 'h', 'd', 'G', 'l', 'v', 'b', 'i', 'B', 'B', 'd', 'X', 'R', 'o', 'b', '3', 'J', 'p', 'd', 'H', 'k', - 'w', 'g', 'g', 'E', 'g', 'M', 'A', '0', 'G', 'C', 'S', 'q', 'G', 'S', 'I', 'b', '3', '\n', 'D', 'Q', - 'E', 'B', 'A', 'Q', 'U', 'A', 'A', '4', 'I', 'B', 'D', 'Q', 'A', 'w', 'g', 'g', 'E', 'I', 'A', 'o', - 'I', 'B', 'A', 'Q', 'C', '3', 'M', 's', 'j', '+', '6', 'X', 'G', 'm', 'B', 'I', 'W', 't', 'D', 'B', - 'F', 'k', '3', '8', '5', 'N', '7', '8', 'g', 'D', 'G', 'I', 'c', '/', 'o', 'a', 'v', '7', 'P', 'K', - 'a', 'f', '\n', '8', 'M', 'O', 'h', '2', 't', 'T', 'Y', 'b', 'i', 't', 'T', 'k', 'P', 's', 'k', 'p', - 'D', '6', 'E', '8', 'J', '7', 'o', 'X', '+', 'z', 'l', 'J', '0', 'T', '1', 'K', 'K', 'Y', '/', 'e', - '9', '7', 'g', 'K', 'v', 'D', 'I', 'r', '1', 'M', 'v', 'n', 's', 'o', 'F', 'A', 'Z', 'M', 'e', 'j', - '2', 'Y', 'c', 'O', 'a', 'd', 'N', '\n', '+', 'l', 'q', '2', 'c', 'w', 'Q', 'l', 'Z', 'u', 't', '3', - 'f', '+', 'd', 'Z', 'x', 'k', 'q', 'Z', 'J', 'R', 'R', 'U', '6', 'y', 'b', 'H', '8', '3', '8', 'Z', - '1', 'T', 'B', 'w', 'j', '6', '+', 'w', 'R', 'i', 'r', '/', 'r', 'e', 's', 'p', '7', 'd', 'e', 'f', - 'q', 'g', 'S', 'H', 'o', '9', 'T', '5', 'i', 'a', 'U', '0', '\n', 'X', '9', 't', 'D', 'k', 'Y', 'I', - '2', '2', 'W', 'Y', '8', 's', 'b', 'i', '5', 'g', 'v', '2', 'c', 'O', 'j', '4', 'Q', 'y', 'D', 'v', - 'v', 'B', 'm', 'V', 'm', 'e', 'p', 's', 'Z', 'G', 'D', '3', '/', 'c', 'V', 'E', '8', 'M', 'C', '5', - 'f', 'v', 'j', '1', '3', 'c', '7', 'J', 'd', 'B', 'm', 'z', 'D', 'I', '1', 'a', 'a', '\n', 'K', '4', - 'U', 'm', 'k', 'h', 'y', 'n', 'A', 'r', 'P', 'k', 'P', 'w', '2', 'v', 'C', 'H', 'm', 'C', 'u', 'D', - 'Y', '9', '6', 'p', 'z', 'T', 'N', 'b', 'O', '8', 'a', 'c', 'r', '1', 'z', 'J', '3', 'o', '/', 'W', - 'S', 'N', 'F', '4', 'A', 'z', 'b', 'l', '5', 'K', 'X', 'Z', 'n', 'J', 'H', 'o', 'e', '0', 'n', 'R', - 'r', 'A', '\n', '1', 'W', '4', 'T', 'N', 'S', 'N', 'e', '3', '5', 't', 'f', 'P', 'e', '/', 'W', '9', - '3', 'b', 'C', '6', 'j', '6', '7', 'e', 'A', '0', 'c', 'Q', 'm', 'd', 'r', 'B', 'N', 'j', '4', '1', - 't', 'p', 'v', 'i', '/', 'J', 'E', 'o', 'A', 'G', 'r', 'A', 'g', 'E', 'D', 'o', '4', 'H', 'F', 'M', - 'I', 'H', 'C', 'M', 'B', '0', 'G', '\n', 'A', '1', 'U', 'd', 'D', 'g', 'Q', 'W', 'B', 'B', 'S', '/', - 'X', '7', 'f', 'R', 'z', 't', '0', 'f', 'h', 'v', 'R', 'b', 'V', 'a', 'z', 'c', '1', 'x', 'D', 'C', - 'D', 'q', 'm', 'I', '5', 'z', 'C', 'B', 'k', 'g', 'Y', 'D', 'V', 'R', '0', 'j', 'B', 'I', 'G', 'K', - 'M', 'I', 'G', 'H', 'g', 'B', 'S', '/', 'X', '7', 'f', 'R', '\n', 'z', 't', '0', 'f', 'h', 'v', 'R', - 'b', 'V', 'a', 'z', 'c', '1', 'x', 'D', 'C', 'D', 'q', 'm', 'I', '5', '6', 'F', 's', 'p', 'G', 'o', - 'w', 'a', 'D', 'E', 'L', 'M', 'A', 'k', 'G', 'A', '1', 'U', 'E', 'B', 'h', 'M', 'C', 'V', 'V', 'M', - 'x', 'J', 'T', 'A', 'j', 'B', 'g', 'N', 'V', 'B', 'A', 'o', 'T', 'H', 'F', 'N', '0', '\n', 'Y', 'X', - 'J', 'm', 'a', 'W', 'V', 's', 'Z', 'C', 'B', 'U', 'Z', 'W', 'N', 'o', 'b', 'm', '9', 's', 'b', '2', - 'd', 'p', 'Z', 'X', 'M', 's', 'I', 'E', 'l', 'u', 'Y', 'y', '4', 'x', 'M', 'j', 'A', 'w', 'B', 'g', - 'N', 'V', 'B', 'A', 's', 'T', 'K', 'V', 'N', '0', 'Y', 'X', 'J', 'm', 'a', 'W', 'V', 's', 'Z', 'C', - 'B', 'D', '\n', 'b', 'G', 'F', 'z', 'c', 'y', 'A', 'y', 'I', 'E', 'N', 'l', 'c', 'n', 'R', 'p', 'Z', - 'm', 'l', 'j', 'Y', 'X', 'R', 'p', 'b', '2', '4', 'g', 'Q', 'X', 'V', '0', 'a', 'G', '9', 'y', 'a', - 'X', 'R', '5', 'g', 'g', 'E', 'A', 'M', 'A', 'w', 'G', 'A', '1', 'U', 'd', 'E', 'w', 'Q', 'F', 'M', - 'A', 'M', 'B', 'A', 'f', '8', 'w', '\n', 'D', 'Q', 'Y', 'J', 'K', 'o', 'Z', 'I', 'h', 'v', 'c', 'N', - 'A', 'Q', 'E', 'F', 'B', 'Q', 'A', 'D', 'g', 'g', 'E', 'B', 'A', 'A', 'W', 'd', 'P', '4', 'i', 'd', - '0', 'c', 'k', 'a', 'V', 'a', 'G', 's', 'a', 'f', 'P', 'z', 'W', 'd', 'q', 'b', 'A', 'Y', 'c', 'a', - 'T', '1', 'e', 'p', 'o', 'X', 'k', 'J', 'K', 't', 'v', '3', '\n', 'L', '7', 'I', 'e', 'z', 'M', 'd', - 'e', 'a', 't', 'i', 'D', 'h', '6', 'G', 'X', '7', '0', 'k', '1', 'P', 'n', 'c', 'G', 'Q', 'V', 'h', - 'i', 'v', '4', '5', 'Y', 'u', 'A', 'p', 'n', 'P', '+', 'y', 'z', '3', 'S', 'F', 'm', 'H', '8', 'l', - 'U', '+', 'n', 'L', 'M', 'P', 'U', 'x', 'A', '2', 'I', 'G', 'v', 'd', '5', '6', 'D', '\n', 'e', 'r', - 'u', 'i', 'x', '/', 'U', '0', 'F', '4', '7', 'Z', 'E', 'U', 'D', '0', '/', 'C', 'w', 'q', 'T', 'R', - 'V', '/', 'p', '2', 'J', 'd', 'L', 'i', 'X', 'T', 'A', 'A', 's', 'g', 'G', 'h', '1', 'o', '+', 'R', - 'e', '4', '9', 'L', '2', 'L', '7', 'S', 'h', 'Z', '3', 'U', '0', 'W', 'i', 'x', 'e', 'D', 'y', 'L', - 'J', 'l', '\n', 'x', 'y', '1', '6', 'p', 'a', 'q', '8', 'U', '4', 'Z', 't', '3', 'V', 'e', 'k', 'y', - 'v', 'g', 'g', 'Q', 'Q', 't', 'o', '8', 'P', 'T', '7', 'd', 'L', '5', 'W', 'X', 'X', 'p', '5', '9', - 'f', 'k', 'd', 'h', 'e', 'M', 't', 'l', 'b', '7', '1', 'c', 'Z', 'B', 'D', 'z', 'I', '0', 'f', 'm', - 'g', 'A', 'K', 'h', 'y', 'n', 'p', '\n', 'V', 'S', 'J', 'Y', 'A', 'C', 'P', 'q', '4', 'x', 'J', 'D', - 'K', 'V', 't', 'H', 'C', 'N', '2', 'M', 'Q', 'W', 'p', 'l', 'B', 'q', 'j', 'l', 'I', 'a', 'p', 'B', - 't', 'J', 'U', 'h', 'l', 'b', 'l', '9', '0', 'T', 'S', 'r', 'E', '9', 'a', 't', 'v', 'N', 'z', 'i', - 'P', 'T', 'n', 'N', 'v', 'T', '5', '1', 'c', 'K', 'E', 'Y', '\n', 'W', 'Q', 'P', 'J', 'I', 'r', 'S', - 'P', 'n', 'N', 'V', 'e', 'K', 't', 'e', 'l', 't', 't', 'Q', 'K', 'b', 'f', 'i', '3', 'Q', 'B', 'F', - 'G', 'm', 'h', '9', '5', 'D', 'm', 'K', '/', 'D', '5', 'f', 's', '4', 'C', '8', 'f', 'F', '5', 'Q', - '=', '\n', '-', '-', '-', '-', '-', 'E', 'N', 'D', ' ', 'C', 'E', 'R', 'T', 'I', 'F', 'I', 'C', 'A', - 'T', 'E', '-', '-', '-', '-', '-', '\n', 0 + '-', '-', '-', '-', '-', 'B', 'E', 'G', 'I', 'N', ' ', 'C', 'E', 'R', 'T', 'I', 'F', 'I', 'C', 'A', + 'T', 'E', '-', '-', '-', '-', '-', '\n', 'M', 'I', 'I', 'D', '7', 'z', 'C', 'C', 'A', 't', 'e', 'g', + 'A', 'w', 'I', 'B', 'A', 'g', 'I', 'B', 'A', 'D', 'A', 'N', 'B', 'g', 'k', 'q', 'h', 'k', 'i', 'G', + '9', 'w', '0', 'B', 'A', 'Q', 's', 'F', 'A', 'D', 'C', 'B', 'm', 'D', 'E', 'L', 'M', 'A', 'k', 'G', + 'A', '1', 'U', 'E', 'B', 'h', 'M', 'C', 'V', 'V', 'M', 'x', '\n', 'E', 'D', 'A', 'O', 'B', 'g', 'N', + 'V', 'B', 'A', 'g', 'T', 'B', '0', 'F', 'y', 'a', 'X', 'p', 'v', 'b', 'm', 'E', 'x', 'E', 'z', 'A', + 'R', 'B', 'g', 'N', 'V', 'B', 'A', 'c', 'T', 'C', 'l', 'N', 'j', 'b', '3', 'R', '0', 'c', '2', 'R', + 'h', 'b', 'G', 'U', 'x', 'J', 'T', 'A', 'j', 'B', 'g', 'N', 'V', 'B', 'A', 'o', 'T', '\n', 'H', 'F', + 'N', '0', 'Y', 'X', 'J', 'm', 'a', 'W', 'V', 's', 'Z', 'C', 'B', 'U', 'Z', 'W', 'N', 'o', 'b', 'm', + '9', 's', 'b', '2', 'd', 'p', 'Z', 'X', 'M', 's', 'I', 'E', 'l', 'u', 'Y', 'y', '4', 'x', 'O', 'z', + 'A', '5', 'B', 'g', 'N', 'V', 'B', 'A', 'M', 'T', 'M', 'l', 'N', '0', 'Y', 'X', 'J', 'm', 'a', 'W', + 'V', 's', '\n', 'Z', 'C', 'B', 'T', 'Z', 'X', 'J', '2', 'a', 'W', 'N', 'l', 'c', 'y', 'B', 'S', 'b', + '2', '9', '0', 'I', 'E', 'N', 'l', 'c', 'n', 'R', 'p', 'Z', 'm', 'l', 'j', 'Y', 'X', 'R', 'l', 'I', + 'E', 'F', '1', 'd', 'G', 'h', 'v', 'c', 'm', 'l', '0', 'e', 'S', 'A', 't', 'I', 'E', 'c', 'y', 'M', + 'B', '4', 'X', 'D', 'T', 'A', '5', '\n', 'M', 'D', 'k', 'w', 'M', 'T', 'A', 'w', 'M', 'D', 'A', 'w', + 'M', 'F', 'o', 'X', 'D', 'T', 'M', '3', 'M', 'T', 'I', 'z', 'M', 'T', 'I', 'z', 'N', 'T', 'k', '1', + 'O', 'V', 'o', 'w', 'g', 'Z', 'g', 'x', 'C', 'z', 'A', 'J', 'B', 'g', 'N', 'V', 'B', 'A', 'Y', 'T', + 'A', 'l', 'V', 'T', 'M', 'R', 'A', 'w', 'D', 'g', 'Y', 'D', '\n', 'V', 'Q', 'Q', 'I', 'E', 'w', 'd', + 'B', 'c', 'm', 'l', '6', 'b', '2', '5', 'h', 'M', 'R', 'M', 'w', 'E', 'Q', 'Y', 'D', 'V', 'Q', 'Q', + 'H', 'E', 'w', 'p', 'T', 'Y', '2', '9', '0', 'd', 'H', 'N', 'k', 'Y', 'W', 'x', 'l', 'M', 'S', 'U', + 'w', 'I', 'w', 'Y', 'D', 'V', 'Q', 'Q', 'K', 'E', 'x', 'x', 'T', 'd', 'G', 'F', 'y', '\n', 'Z', 'm', + 'l', 'l', 'b', 'G', 'Q', 'g', 'V', 'G', 'V', 'j', 'a', 'G', '5', 'v', 'b', 'G', '9', 'n', 'a', 'W', + 'V', 'z', 'L', 'C', 'B', 'J', 'b', 'm', 'M', 'u', 'M', 'T', 's', 'w', 'O', 'Q', 'Y', 'D', 'V', 'Q', + 'Q', 'D', 'E', 'z', 'J', 'T', 'd', 'G', 'F', 'y', 'Z', 'm', 'l', 'l', 'b', 'G', 'Q', 'g', 'U', '2', + 'V', 'y', '\n', 'd', 'm', 'l', 'j', 'Z', 'X', 'M', 'g', 'U', 'm', '9', 'v', 'd', 'C', 'B', 'D', 'Z', + 'X', 'J', '0', 'a', 'W', 'Z', 'p', 'Y', '2', 'F', '0', 'Z', 'S', 'B', 'B', 'd', 'X', 'R', 'o', 'b', + '3', 'J', 'p', 'd', 'H', 'k', 'g', 'L', 'S', 'B', 'H', 'M', 'j', 'C', 'C', 'A', 'S', 'I', 'w', 'D', + 'Q', 'Y', 'J', 'K', 'o', 'Z', 'I', '\n', 'h', 'v', 'c', 'N', 'A', 'Q', 'E', 'B', 'B', 'Q', 'A', 'D', + 'g', 'g', 'E', 'P', 'A', 'D', 'C', 'C', 'A', 'Q', 'o', 'C', 'g', 'g', 'E', 'B', 'A', 'N', 'U', 'M', + 'O', 's', 'Q', 'q', '+', 'U', '7', 'i', '9', 'b', '4', 'Z', 'l', '1', '+', 'O', 'i', 'F', 'O', 'x', + 'H', 'z', '/', 'L', 'z', '5', '8', 'g', 'E', '2', '0', 'p', '\n', 'O', 's', 'g', 'P', 'f', 'T', 'z', + '3', 'a', '3', 'Y', '4', 'Y', '9', 'k', '2', 'Y', 'K', 'i', 'b', 'X', 'l', 'w', 'A', 'g', 'L', 'I', + 'v', 'W', 'X', '/', '2', 'h', '/', 'k', 'l', 'Q', '4', 'b', 'n', 'a', 'R', 't', 'S', 'm', 'p', 'D', + 'h', 'c', 'e', 'P', 'Y', 'L', 'Q', '1', 'O', 'b', '/', 'b', 'I', 'S', 'd', 'm', '2', '\n', '8', 'x', + 'p', 'W', 'r', 'i', 'u', '2', 'd', 'B', 'T', 'r', 'z', '/', 's', 'm', '4', 'x', 'q', '6', 'H', 'Z', + 'Y', 'u', 'a', 'j', 't', 'Y', 'l', 'I', 'l', 'H', 'V', 'v', '8', 'l', 'o', 'J', 'N', 'w', 'U', '4', + 'P', 'a', 'h', 'H', 'Q', 'U', 'w', '2', 'e', 'e', 'B', 'G', 'g', '6', '3', '4', '5', 'A', 'W', 'h', + '1', 'K', '\n', 'T', 's', '9', 'D', 'k', 'T', 'v', 'n', 'V', 't', 'Y', 'A', 'c', 'M', 't', 'S', '7', + 'n', 't', '9', 'r', 'j', 'r', 'n', 'v', 'D', 'H', '5', 'R', 'f', 'b', 'C', 'Y', 'M', '8', 'T', 'W', + 'Q', 'I', 'r', 'g', 'M', 'w', '0', 'R', '9', '+', '5', '3', 'p', 'B', 'l', 'b', 'Q', 'L', 'P', 'L', + 'J', 'G', 'm', 'p', 'u', 'f', 'e', '\n', 'h', 'R', 'h', 'J', 'f', 'G', 'Z', 'O', 'o', 'z', 'p', 't', + 'q', 'b', 'X', 'u', 'N', 'C', '6', '6', 'D', 'Q', 'O', '4', 'M', '9', '9', 'H', '6', '7', 'F', 'r', + 'j', 'S', 'X', 'Z', 'm', '8', '6', 'B', '0', 'U', 'V', 'G', 'M', 'p', 'Z', 'w', 'h', '9', '4', 'C', + 'D', 'k', 'l', 'D', 'h', 'b', 'Z', 's', 'c', '7', 't', 'k', '\n', '6', 'm', 'F', 'B', 'r', 'M', 'n', + 'U', 'V', 'N', '+', 'H', 'L', '8', 'c', 'i', 's', 'i', 'b', 'M', 'n', '1', 'l', 'U', 'a', 'J', '/', + '8', 'v', 'i', 'o', 'v', 'x', 'F', 'U', 'c', 'd', 'U', 'B', 'g', 'F', '4', 'U', 'C', 'V', 'T', 'm', + 'L', 'f', 'w', 'U', 'C', 'A', 'w', 'E', 'A', 'A', 'a', 'N', 'C', 'M', 'E', 'A', 'w', '\n', 'D', 'w', + 'Y', 'D', 'V', 'R', '0', 'T', 'A', 'Q', 'H', '/', 'B', 'A', 'U', 'w', 'A', 'w', 'E', 'B', '/', 'z', + 'A', 'O', 'B', 'g', 'N', 'V', 'H', 'Q', '8', 'B', 'A', 'f', '8', 'E', 'B', 'A', 'M', 'C', 'A', 'Q', + 'Y', 'w', 'H', 'Q', 'Y', 'D', 'V', 'R', '0', 'O', 'B', 'B', 'Y', 'E', 'F', 'J', 'x', 'f', 'A', 'N', + '+', 'q', '\n', 'A', 'd', 'c', 'w', 'K', 'z', 'i', 'I', 'o', 'r', 'h', 't', 'S', 'p', 'z', 'y', 'E', + 'Z', 'G', 'D', 'M', 'A', '0', 'G', 'C', 'S', 'q', 'G', 'S', 'I', 'b', '3', 'D', 'Q', 'E', 'B', 'C', + 'w', 'U', 'A', 'A', '4', 'I', 'B', 'A', 'Q', 'B', 'L', 'N', 'q', 'a', 'E', 'd', '2', 'n', 'd', 'O', + 'x', 'm', 'f', 'Z', 'y', 'M', 'I', '\n', 'b', 'w', '5', 'h', 'y', 'f', '2', 'E', '3', 'F', '/', 'Y', + 'N', 'o', 'H', 'N', '2', 'B', 't', 'B', 'L', 'Z', '9', 'g', '3', 'c', 'c', 'a', 'a', 'N', 'n', 'R', + 'b', 'o', 'b', 'h', 'i', 'C', 'P', 'P', 'E', '9', '5', 'D', 'z', '+', 'I', '0', 's', 'w', 'S', 'd', + 'H', 'y', 'n', 'V', 'v', '/', 'h', 'e', 'y', 'N', 'X', 'B', '\n', 'v', 'e', '6', 'S', 'b', 'z', 'J', + '0', '8', 'p', 'G', 'C', 'L', '7', '2', 'C', 'Q', 'n', 'q', 't', 'K', 'r', 'c', 'g', 'f', 'U', '2', + '8', 'e', 'l', 'U', 'S', 'w', 'h', 'X', 'q', 'v', 'f', 'd', 'q', 'l', 'S', '5', 's', 'd', 'J', '/', + 'P', 'H', 'L', 'T', 'y', 'x', 'Q', 'G', 'j', 'h', 'd', 'B', 'y', 'P', 'q', '1', 'z', '\n', 'q', 'w', + 'u', 'b', 'd', 'Q', 'x', 't', 'R', 'b', 'e', 'O', 'l', 'K', 'y', 'W', 'N', '7', 'W', 'g', '0', 'I', + '8', 'V', 'R', 'w', '7', 'j', '6', 'I', 'P', 'd', 'j', '/', '3', 'v', 'Q', 'Q', 'F', '3', 'z', 'C', + 'e', 'p', 'Y', 'o', 'U', 'z', '8', 'j', 'c', 'I', '7', '3', 'H', 'P', 'd', 'w', 'b', 'e', 'y', 'B', + 'k', 'd', '\n', 'i', 'E', 'D', 'P', 'f', 'U', 'Y', 'd', '/', 'x', '7', 'H', '4', 'c', '7', '/', 'I', + '9', 'v', 'G', '+', 'o', '1', 'V', 'T', 'q', 'k', 'C', '5', '0', 'c', 'R', 'R', 'j', '7', '0', '/', + 'b', '1', '7', 'K', 'S', 'a', '7', 'q', 'W', 'F', 'i', 'N', 'y', 'i', '2', 'L', 'S', 'r', '2', 'E', + 'I', 'Z', 'k', 'y', 'X', 'C', 'n', '\n', '0', 'q', '2', '3', 'K', 'X', 'B', '5', '6', 'j', 'z', 'a', + 'Y', 'y', 'W', 'f', '/', 'W', 'i', '3', 'M', 'O', 'x', 'w', '+', '3', 'W', 'K', 't', '2', '1', 'g', + 'Z', '7', 'I', 'e', 'y', 'L', 'n', 'p', '2', 'K', 'h', 'v', 'A', 'o', 't', 'n', 'D', 'U', '0', 'm', + 'V', '3', 'H', 'a', 'I', 'P', 'z', 'B', 'S', 'l', 'C', 'N', '\n', 's', 'S', 'i', '6', '\n', '-', '-', + '-', '-', '-', 'E', 'N', 'D', ' ', 'C', 'E', 'R', 'T', 'I', 'F', 'I', 'C', 'A', 'T', 'E', '-', '-', + '-', '-', '-', '\n', '-', '-', '-', '-', '-', 'B', 'E', 'G', 'I', 'N', ' ', 'C', 'E', 'R', 'T', 'I', + 'F', 'I', 'C', 'A', 'T', 'E', '-', '-', '-', '-', '-', '\n', 'M', 'I', 'I', 'E', 'D', 'z', 'C', 'C', + 'A', 'v', 'e', 'g', 'A', 'w', 'I', 'B', 'A', 'g', 'I', 'B', 'A', 'D', 'A', 'N', 'B', 'g', 'k', 'q', + 'h', 'k', 'i', 'G', '9', 'w', '0', 'B', 'A', 'Q', 'U', 'F', 'A', 'D', 'B', 'o', 'M', 'Q', 's', 'w', + 'C', 'Q', 'Y', 'D', 'V', 'Q', 'Q', 'G', 'E', 'w', 'J', 'V', 'U', 'z', 'E', 'l', '\n', 'M', 'C', 'M', + 'G', 'A', '1', 'U', 'E', 'C', 'h', 'M', 'c', 'U', '3', 'R', 'h', 'c', 'm', 'Z', 'p', 'Z', 'W', 'x', + 'k', 'I', 'F', 'R', 'l', 'Y', '2', 'h', 'u', 'b', '2', 'x', 'v', 'Z', '2', 'l', 'l', 'c', 'y', 'w', + 'g', 'S', 'W', '5', 'j', 'L', 'j', 'E', 'y', 'M', 'D', 'A', 'G', 'A', '1', 'U', 'E', 'C', 'x', 'M', + 'p', '\n', 'U', '3', 'R', 'h', 'c', 'm', 'Z', 'p', 'Z', 'W', 'x', 'k', 'I', 'E', 'N', 's', 'Y', 'X', + 'N', 'z', 'I', 'D', 'I', 'g', 'Q', '2', 'V', 'y', 'd', 'G', 'l', 'm', 'a', 'W', 'N', 'h', 'd', 'G', + 'l', 'v', 'b', 'i', 'B', 'B', 'd', 'X', 'R', 'o', 'b', '3', 'J', 'p', 'd', 'H', 'k', 'w', 'H', 'h', + 'c', 'N', 'M', 'D', 'Q', 'w', '\n', 'N', 'j', 'I', '5', 'M', 'T', 'c', 'z', 'O', 'T', 'E', '2', 'W', + 'h', 'c', 'N', 'M', 'z', 'Q', 'w', 'N', 'j', 'I', '5', 'M', 'T', 'c', 'z', 'O', 'T', 'E', '2', 'W', + 'j', 'B', 'o', 'M', 'Q', 's', 'w', 'C', 'Q', 'Y', 'D', 'V', 'Q', 'Q', 'G', 'E', 'w', 'J', 'V', 'U', + 'z', 'E', 'l', 'M', 'C', 'M', 'G', 'A', '1', 'U', 'E', '\n', 'C', 'h', 'M', 'c', 'U', '3', 'R', 'h', + 'c', 'm', 'Z', 'p', 'Z', 'W', 'x', 'k', 'I', 'F', 'R', 'l', 'Y', '2', 'h', 'u', 'b', '2', 'x', 'v', + 'Z', '2', 'l', 'l', 'c', 'y', 'w', 'g', 'S', 'W', '5', 'j', 'L', 'j', 'E', 'y', 'M', 'D', 'A', 'G', + 'A', '1', 'U', 'E', 'C', 'x', 'M', 'p', 'U', '3', 'R', 'h', 'c', 'm', 'Z', 'p', '\n', 'Z', 'W', 'x', + 'k', 'I', 'E', 'N', 's', 'Y', 'X', 'N', 'z', 'I', 'D', 'I', 'g', 'Q', '2', 'V', 'y', 'd', 'G', 'l', + 'm', 'a', 'W', 'N', 'h', 'd', 'G', 'l', 'v', 'b', 'i', 'B', 'B', 'd', 'X', 'R', 'o', 'b', '3', 'J', + 'p', 'd', 'H', 'k', 'w', 'g', 'g', 'E', 'g', 'M', 'A', '0', 'G', 'C', 'S', 'q', 'G', 'S', 'I', 'b', + '3', '\n', 'D', 'Q', 'E', 'B', 'A', 'Q', 'U', 'A', 'A', '4', 'I', 'B', 'D', 'Q', 'A', 'w', 'g', 'g', + 'E', 'I', 'A', 'o', 'I', 'B', 'A', 'Q', 'C', '3', 'M', 's', 'j', '+', '6', 'X', 'G', 'm', 'B', 'I', + 'W', 't', 'D', 'B', 'F', 'k', '3', '8', '5', 'N', '7', '8', 'g', 'D', 'G', 'I', 'c', '/', 'o', 'a', + 'v', '7', 'P', 'K', 'a', 'f', '\n', '8', 'M', 'O', 'h', '2', 't', 'T', 'Y', 'b', 'i', 't', 'T', 'k', + 'P', 's', 'k', 'p', 'D', '6', 'E', '8', 'J', '7', 'o', 'X', '+', 'z', 'l', 'J', '0', 'T', '1', 'K', + 'K', 'Y', '/', 'e', '9', '7', 'g', 'K', 'v', 'D', 'I', 'r', '1', 'M', 'v', 'n', 's', 'o', 'F', 'A', + 'Z', 'M', 'e', 'j', '2', 'Y', 'c', 'O', 'a', 'd', 'N', '\n', '+', 'l', 'q', '2', 'c', 'w', 'Q', 'l', + 'Z', 'u', 't', '3', 'f', '+', 'd', 'Z', 'x', 'k', 'q', 'Z', 'J', 'R', 'R', 'U', '6', 'y', 'b', 'H', + '8', '3', '8', 'Z', '1', 'T', 'B', 'w', 'j', '6', '+', 'w', 'R', 'i', 'r', '/', 'r', 'e', 's', 'p', + '7', 'd', 'e', 'f', 'q', 'g', 'S', 'H', 'o', '9', 'T', '5', 'i', 'a', 'U', '0', '\n', 'X', '9', 't', + 'D', 'k', 'Y', 'I', '2', '2', 'W', 'Y', '8', 's', 'b', 'i', '5', 'g', 'v', '2', 'c', 'O', 'j', '4', + 'Q', 'y', 'D', 'v', 'v', 'B', 'm', 'V', 'm', 'e', 'p', 's', 'Z', 'G', 'D', '3', '/', 'c', 'V', 'E', + '8', 'M', 'C', '5', 'f', 'v', 'j', '1', '3', 'c', '7', 'J', 'd', 'B', 'm', 'z', 'D', 'I', '1', 'a', + 'a', '\n', 'K', '4', 'U', 'm', 'k', 'h', 'y', 'n', 'A', 'r', 'P', 'k', 'P', 'w', '2', 'v', 'C', 'H', + 'm', 'C', 'u', 'D', 'Y', '9', '6', 'p', 'z', 'T', 'N', 'b', 'O', '8', 'a', 'c', 'r', '1', 'z', 'J', + '3', 'o', '/', 'W', 'S', 'N', 'F', '4', 'A', 'z', 'b', 'l', '5', 'K', 'X', 'Z', 'n', 'J', 'H', 'o', + 'e', '0', 'n', 'R', 'r', 'A', '\n', '1', 'W', '4', 'T', 'N', 'S', 'N', 'e', '3', '5', 't', 'f', 'P', + 'e', '/', 'W', '9', '3', 'b', 'C', '6', 'j', '6', '7', 'e', 'A', '0', 'c', 'Q', 'm', 'd', 'r', 'B', + 'N', 'j', '4', '1', 't', 'p', 'v', 'i', '/', 'J', 'E', 'o', 'A', 'G', 'r', 'A', 'g', 'E', 'D', 'o', + '4', 'H', 'F', 'M', 'I', 'H', 'C', 'M', 'B', '0', 'G', '\n', 'A', '1', 'U', 'd', 'D', 'g', 'Q', 'W', + 'B', 'B', 'S', '/', 'X', '7', 'f', 'R', 'z', 't', '0', 'f', 'h', 'v', 'R', 'b', 'V', 'a', 'z', 'c', + '1', 'x', 'D', 'C', 'D', 'q', 'm', 'I', '5', 'z', 'C', 'B', 'k', 'g', 'Y', 'D', 'V', 'R', '0', 'j', + 'B', 'I', 'G', 'K', 'M', 'I', 'G', 'H', 'g', 'B', 'S', '/', 'X', '7', 'f', 'R', '\n', 'z', 't', '0', + 'f', 'h', 'v', 'R', 'b', 'V', 'a', 'z', 'c', '1', 'x', 'D', 'C', 'D', 'q', 'm', 'I', '5', '6', 'F', + 's', 'p', 'G', 'o', 'w', 'a', 'D', 'E', 'L', 'M', 'A', 'k', 'G', 'A', '1', 'U', 'E', 'B', 'h', 'M', + 'C', 'V', 'V', 'M', 'x', 'J', 'T', 'A', 'j', 'B', 'g', 'N', 'V', 'B', 'A', 'o', 'T', 'H', 'F', 'N', + '0', '\n', 'Y', 'X', 'J', 'm', 'a', 'W', 'V', 's', 'Z', 'C', 'B', 'U', 'Z', 'W', 'N', 'o', 'b', 'm', + '9', 's', 'b', '2', 'd', 'p', 'Z', 'X', 'M', 's', 'I', 'E', 'l', 'u', 'Y', 'y', '4', 'x', 'M', 'j', + 'A', 'w', 'B', 'g', 'N', 'V', 'B', 'A', 's', 'T', 'K', 'V', 'N', '0', 'Y', 'X', 'J', 'm', 'a', 'W', + 'V', 's', 'Z', 'C', 'B', 'D', '\n', 'b', 'G', 'F', 'z', 'c', 'y', 'A', 'y', 'I', 'E', 'N', 'l', 'c', + 'n', 'R', 'p', 'Z', 'm', 'l', 'j', 'Y', 'X', 'R', 'p', 'b', '2', '4', 'g', 'Q', 'X', 'V', '0', 'a', + 'G', '9', 'y', 'a', 'X', 'R', '5', 'g', 'g', 'E', 'A', 'M', 'A', 'w', 'G', 'A', '1', 'U', 'd', 'E', + 'w', 'Q', 'F', 'M', 'A', 'M', 'B', 'A', 'f', '8', 'w', '\n', 'D', 'Q', 'Y', 'J', 'K', 'o', 'Z', 'I', + 'h', 'v', 'c', 'N', 'A', 'Q', 'E', 'F', 'B', 'Q', 'A', 'D', 'g', 'g', 'E', 'B', 'A', 'A', 'W', 'd', + 'P', '4', 'i', 'd', '0', 'c', 'k', 'a', 'V', 'a', 'G', 's', 'a', 'f', 'P', 'z', 'W', 'd', 'q', 'b', + 'A', 'Y', 'c', 'a', 'T', '1', 'e', 'p', 'o', 'X', 'k', 'J', 'K', 't', 'v', '3', '\n', 'L', '7', 'I', + 'e', 'z', 'M', 'd', 'e', 'a', 't', 'i', 'D', 'h', '6', 'G', 'X', '7', '0', 'k', '1', 'P', 'n', 'c', + 'G', 'Q', 'V', 'h', 'i', 'v', '4', '5', 'Y', 'u', 'A', 'p', 'n', 'P', '+', 'y', 'z', '3', 'S', 'F', + 'm', 'H', '8', 'l', 'U', '+', 'n', 'L', 'M', 'P', 'U', 'x', 'A', '2', 'I', 'G', 'v', 'd', '5', '6', + 'D', '\n', 'e', 'r', 'u', 'i', 'x', '/', 'U', '0', 'F', '4', '7', 'Z', 'E', 'U', 'D', '0', '/', 'C', + 'w', 'q', 'T', 'R', 'V', '/', 'p', '2', 'J', 'd', 'L', 'i', 'X', 'T', 'A', 'A', 's', 'g', 'G', 'h', + '1', 'o', '+', 'R', 'e', '4', '9', 'L', '2', 'L', '7', 'S', 'h', 'Z', '3', 'U', '0', 'W', 'i', 'x', + 'e', 'D', 'y', 'L', 'J', 'l', '\n', 'x', 'y', '1', '6', 'p', 'a', 'q', '8', 'U', '4', 'Z', 't', '3', + 'V', 'e', 'k', 'y', 'v', 'g', 'g', 'Q', 'Q', 't', 'o', '8', 'P', 'T', '7', 'd', 'L', '5', 'W', 'X', + 'X', 'p', '5', '9', 'f', 'k', 'd', 'h', 'e', 'M', 't', 'l', 'b', '7', '1', 'c', 'Z', 'B', 'D', 'z', + 'I', '0', 'f', 'm', 'g', 'A', 'K', 'h', 'y', 'n', 'p', '\n', 'V', 'S', 'J', 'Y', 'A', 'C', 'P', 'q', + '4', 'x', 'J', 'D', 'K', 'V', 't', 'H', 'C', 'N', '2', 'M', 'Q', 'W', 'p', 'l', 'B', 'q', 'j', 'l', + 'I', 'a', 'p', 'B', 't', 'J', 'U', 'h', 'l', 'b', 'l', '9', '0', 'T', 'S', 'r', 'E', '9', 'a', 't', + 'v', 'N', 'z', 'i', 'P', 'T', 'n', 'N', 'v', 'T', '5', '1', 'c', 'K', 'E', 'Y', '\n', 'W', 'Q', 'P', + 'J', 'I', 'r', 'S', 'P', 'n', 'N', 'V', 'e', 'K', 't', 'e', 'l', 't', 't', 'Q', 'K', 'b', 'f', 'i', + '3', 'Q', 'B', 'F', 'G', 'm', 'h', '9', '5', 'D', 'm', 'K', '/', 'D', '5', 'f', 's', '4', 'C', '8', + 'f', 'F', '5', 'Q', '=', '\n', '-', '-', '-', '-', '-', 'E', 'N', 'D', ' ', 'C', 'E', 'R', 'T', 'I', + 'F', 'I', 'C', 'A', 'T', 'E', '-', '-', '-', '-', '-', '\n', 0 }; diff --git a/third_party/aws_sdk/platform/silabs/src/network_sl_api_wrapper.c b/third_party/aws_sdk/platform/silabs/src/network_sl_api_wrapper.c index 36564ddee..c9ecdcb86 100644 --- a/third_party/aws_sdk/platform/silabs/src/network_sl_api_wrapper.c +++ b/third_party/aws_sdk/platform/silabs/src/network_sl_api_wrapper.c @@ -23,6 +23,9 @@ #include "sl_net_dns.h" #include "sl_constants.h" #include "sl_si91x_constants.h" +#include "sl_si91x_socket_constants.h" +#include "sl_si91x_socket_utility.h" +#include "sl_si91x_socket_types.h" #include "sl_si91x_core_utilities.h" #include "sl_si91x_protocol_types.h" #include "errno.h" @@ -42,6 +45,8 @@ osSemaphoreId_t select_sem; #define MAX_DNS_REQ_COUNT 5 #define TLS_SOCKET 2 #define SL_CERT_INDEX_0 0 +#define MQTT_TLS_PORT 443 +#define ALPN_AMZN_MQTT_CA "x-amzn-mqtt-ca" /****************************************************** * Variable Declarations @@ -144,7 +149,6 @@ static int32_t sli_si91x_ConnecttoNetwork(Network *n, uint8_t flags, sl_ip_addre memcpy(&server_addr.sin_addr.s_addr, &addr->ip.v4.value, SL_IPV4_ADDRESS_LENGTH); n->socket_id = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP); #endif - if (n->socket_id < 0) { return sli_si91x_get_aws_error(errno); } @@ -158,6 +162,47 @@ static int32_t sli_si91x_ConnecttoNetwork(Network *n, uint8_t flags, sl_ip_addre if (sl_si91x_set_custom_sync_sockopt(n->socket_id, SOL_SOCKET, SO_CERT_INDEX, &certificate_index, sizeof(certificate_index))) { return sli_si91x_get_aws_error(errno); } + + if(dst_port == MQTT_TLS_PORT) { + int socket_return_value = 0; + + // Calculate the length of the ALPN data + uint16_t alpn_length = (uint16_t)strlen(ALPN_AMZN_MQTT_CA); + + // Allocate memory for the sl_si91x_socket_type_length_value_t structure + sl_si91x_socket_type_length_value_t *alpn_value = + (sl_si91x_socket_type_length_value_t *)malloc(sizeof(sl_si91x_socket_type_length_value_t) + alpn_length); + + if (alpn_value == NULL) { + SL_DEBUG_LOG("\r\nMemory allocation failed for ALPN value\r\n"); + return FAILURE; + } + + // Set the type to 2 for ALPN extension + alpn_value->type = SL_SI91X_TLS_EXTENSION_ALPN_TYPE; + + // Set the length of the ALPN data + alpn_value->length = alpn_length; + + // Copy the ALPN data into the value field + memcpy(alpn_value->value, ALPN_AMZN_MQTT_CA, alpn_length); + + socket_return_value = sl_si91x_set_custom_sync_sockopt(n->socket_id, + SOL_SOCKET, + SO_TLS_ALPN, + alpn_value, + sizeof(sl_si91x_socket_type_length_value_t) + alpn_length); + + if (socket_return_value < 0) { + SL_DEBUG_LOG("\r\nSet Socket option failed with bsd error: %d\r\n", errno); + close(n->socket_id); + free(alpn_value); + return sli_si91x_get_aws_error(errno); + } + + // Free the allocated memory after usage + free(alpn_value); + } } status = bind( n->socket_id, (struct sockaddr *)&client_addr, socket_length); diff --git a/wifi_templates.xml b/wifi_templates.xml index 56555b0f4..32644cfb6 100644 --- a/wifi_templates.xml +++ b/wifi_templates.xml @@ -35,8 +35,8 @@ - - + + @@ -50,8 +50,8 @@ - - + + @@ -80,8 +80,8 @@ - - + + @@ -95,8 +95,8 @@ - - + + @@ -140,8 +140,8 @@ - - + + @@ -155,8 +155,8 @@ - - + + @@ -200,8 +200,8 @@ - - + + @@ -215,8 +215,8 @@ - - + + @@ -245,8 +245,8 @@ - - + + @@ -260,8 +260,8 @@ - - + + @@ -290,8 +290,8 @@ - - + + @@ -305,8 +305,8 @@ - - + + @@ -335,8 +335,8 @@ - - + + @@ -350,8 +350,8 @@ - - + + @@ -380,8 +380,8 @@ - - + + @@ -395,8 +395,8 @@ - - + + @@ -425,8 +425,8 @@ - - + + @@ -440,8 +440,8 @@ - - + + @@ -470,8 +470,8 @@ - - + + @@ -485,8 +485,8 @@ - - + + @@ -515,8 +515,8 @@ - - + + @@ -530,8 +530,8 @@ - - + + @@ -560,8 +560,8 @@ - - + + @@ -575,8 +575,8 @@ - - + + @@ -620,8 +620,8 @@ - - + + @@ -635,8 +635,8 @@ - - + + @@ -680,8 +680,8 @@ - - + + @@ -695,8 +695,8 @@ - - + + @@ -725,8 +725,8 @@ - - + + @@ -740,8 +740,8 @@ - - + + @@ -770,8 +770,8 @@ - - + + @@ -785,8 +785,8 @@ - - + + @@ -815,8 +815,8 @@ - - + + @@ -830,8 +830,8 @@ - - + + @@ -875,8 +875,8 @@ - - + + @@ -890,8 +890,8 @@ - - + + @@ -920,8 +920,8 @@ - - + + @@ -935,8 +935,8 @@ - - + + @@ -950,8 +950,8 @@ - - + + @@ -981,7 +981,7 @@ - + @@ -1101,7 +1101,7 @@ - + @@ -1116,7 +1116,7 @@ - + @@ -1131,7 +1131,7 @@ - + @@ -1146,7 +1146,7 @@ - + @@ -1161,7 +1161,7 @@ - + @@ -1176,7 +1176,7 @@ - + @@ -1191,7 +1191,7 @@ - + @@ -1206,7 +1206,7 @@ - + @@ -1221,7 +1221,7 @@ - + @@ -1236,7 +1236,7 @@ - + @@ -1251,7 +1251,7 @@ - + @@ -1266,7 +1266,7 @@ - + @@ -1281,7 +1281,7 @@ - + @@ -1296,7 +1296,7 @@ - + @@ -1311,7 +1311,7 @@ - + @@ -1326,7 +1326,7 @@ - + @@ -1341,7 +1341,7 @@ - + @@ -1356,7 +1356,7 @@ - + @@ -1371,7 +1371,7 @@ - + @@ -1386,7 +1386,7 @@ - + @@ -1401,7 +1401,7 @@ - + @@ -1416,7 +1416,7 @@ - + @@ -1431,7 +1431,7 @@ - + @@ -1446,7 +1446,7 @@ - + @@ -1461,7 +1461,7 @@ - + @@ -1475,23 +1475,8 @@ - - - - - - - - - - - - - - - - - + + @@ -1506,7 +1491,7 @@ - + @@ -1521,7 +1506,7 @@ - + @@ -1536,7 +1521,7 @@ - + @@ -1551,7 +1536,7 @@ - + @@ -1566,7 +1551,7 @@ - + @@ -1581,7 +1566,7 @@ - + @@ -1596,7 +1581,7 @@ - + @@ -1626,7 +1611,7 @@ - + @@ -1656,7 +1641,7 @@ - + @@ -1671,7 +1656,7 @@ - + @@ -1686,7 +1671,7 @@ - + @@ -1701,7 +1686,7 @@ - + @@ -1716,7 +1701,7 @@ - + @@ -1731,7 +1716,7 @@ - + @@ -1746,7 +1731,7 @@ - + @@ -1761,7 +1746,7 @@ - + @@ -1776,7 +1761,7 @@ - + @@ -1791,7 +1776,7 @@ - + @@ -1806,7 +1791,7 @@ - + @@ -1821,7 +1806,7 @@ - + @@ -1836,7 +1821,7 @@ - + @@ -1851,7 +1836,7 @@ - + @@ -1866,7 +1851,7 @@ - + @@ -1881,7 +1866,7 @@ - + @@ -1896,7 +1881,7 @@ - + @@ -1911,7 +1896,7 @@ - + @@ -1926,7 +1911,7 @@ - + @@ -1941,7 +1926,7 @@ - + @@ -1956,7 +1941,7 @@ - + @@ -1971,7 +1956,7 @@ - + @@ -1986,7 +1971,7 @@ - + @@ -2001,7 +1986,7 @@ - + @@ -2016,7 +2001,7 @@ - + @@ -2031,7 +2016,7 @@ - + @@ -2046,7 +2031,7 @@ - + @@ -2061,7 +2046,7 @@ - + @@ -2076,7 +2061,7 @@ - + @@ -2091,7 +2076,7 @@ - + @@ -2106,7 +2091,7 @@ - + @@ -2121,7 +2106,7 @@ - + @@ -2136,7 +2121,7 @@ - + @@ -2151,7 +2136,7 @@ - + @@ -2166,7 +2151,7 @@ - + @@ -2181,7 +2166,7 @@ - + @@ -2196,7 +2181,7 @@ - + @@ -2211,7 +2196,7 @@ - + @@ -2226,7 +2211,7 @@ - + @@ -2241,7 +2226,7 @@ - + @@ -2256,7 +2241,7 @@ - + @@ -2271,7 +2256,7 @@ - + @@ -2286,7 +2271,7 @@ - + @@ -2301,7 +2286,7 @@ - + @@ -2316,7 +2301,7 @@ - + @@ -2331,7 +2316,7 @@ - + @@ -2346,7 +2331,7 @@ - + @@ -2361,7 +2346,7 @@ - + @@ -2391,7 +2376,7 @@ - + @@ -2421,7 +2406,7 @@ - + @@ -2556,7 +2541,7 @@ - + @@ -2601,7 +2586,7 @@ - + @@ -2631,7 +2616,7 @@ - + @@ -2661,7 +2646,7 @@ - + @@ -2766,7 +2751,7 @@ - + @@ -2976,7 +2961,7 @@ - + @@ -3006,7 +2991,7 @@ - + @@ -3126,7 +3111,7 @@ - + @@ -3186,7 +3171,7 @@ - + @@ -3231,7 +3216,7 @@ - + @@ -3261,7 +3246,7 @@ - + @@ -3291,7 +3276,7 @@ - + @@ -3321,7 +3306,7 @@ - + @@ -3351,7 +3336,7 @@ - + @@ -3381,7 +3366,7 @@ - + @@ -3411,7 +3396,7 @@ - + @@ -3471,7 +3456,7 @@ - + @@ -3499,7 +3484,7 @@ - + @@ -3508,13 +3493,13 @@ - + - + @@ -3523,22 +3508,22 @@ - + - + - + - + @@ -3576,7 +3561,7 @@ - + @@ -3604,7 +3589,7 @@ - + @@ -3613,7 +3598,7 @@ - + @@ -3636,7 +3621,7 @@ - + @@ -3666,7 +3651,7 @@ - + @@ -3711,7 +3696,7 @@ - + @@ -3741,7 +3726,7 @@ - + @@ -3771,7 +3756,7 @@ - + @@ -3801,7 +3786,7 @@ - + @@ -3831,7 +3816,7 @@ - + @@ -3861,7 +3846,7 @@ - + @@ -3891,7 +3876,7 @@ - + @@ -3921,7 +3906,7 @@ - + @@ -3951,7 +3936,7 @@ - + @@ -4011,7 +3996,7 @@ - + @@ -4056,7 +4041,7 @@ - + @@ -4086,7 +4071,7 @@ - + diff --git a/wiseconnect3.slce b/wiseconnect3.slce index 5a9e086dc..04c23b84c 100644 --- a/wiseconnect3.slce +++ b/wiseconnect3.slce @@ -2,13 +2,13 @@ id: wiseconnect3_sdk label: WiSeConnect 3 SDK description: > WiSeConnect 3 extension for the Simplicity SDK (formerly Gecko SDK) -version: "3.3.2" +version: "3.3.3" sdk: id: simplicity_sdk - version: "2024.6.1" + version: "2024.6.2" documentation: - docset: wiseconnect - version: "3.3.2" + version: "3.3.3" component_path: - path: resources - path: components/board diff --git a/wiseconnect3.slsdk b/wiseconnect3.slsdk index 2cef3ffbf..dc5460f98 100644 --- a/wiseconnect3.slsdk +++ b/wiseconnect3.slsdk @@ -1,12 +1,12 @@ # Properties file for Simplicity Studio metadata id=uc.extension.wiseconnect3_sdk -version=3.3.2 +version=3.3.3 label=WiSeConnect 3 description=WiSeConnect 3 SDK -prop.subLabel=Wi-Fi\\ SDK\\ 3.3.2 +prop.subLabel=Wi-Fi\\ SDK\\ 3.3.3 prop.file.templatesFile=wifi_templates.xml wifi_internal_templates.xml @@ -17,4 +17,4 @@ prop.file.connectivityFirmwareFolders=connectivity_firmware prop.file.demosFile=wiseconnect3_demos.xml prop.boardCompatibility=.* -prop.partCompatibility=.*si917.* .*siwg917m111mgtba.* .*siwg917m141xgtba.* .*siwg917m100xntba.* .*siwg917y111mgab.* .*siwg917y111mgnba.* .*siwg917y121mgnb.* .*siwg917m121xgtba.* .*siwg917m111xgtba.* .*siwg917m100mgtba.* .*siwg917m110lgtba.* +prop.partCompatibility=.*si917.* .*siwg917m111mgtba.* .*siwg917m141xgtba.* .*siwg917m100xntba.* .*siwg917y111mgab.* .*siwg917y111mgnba.* .*siwg917y121mgnb.* .*siwg917m121xgtba.* .*siwg917m111xgtba.* .*siwg917y110lgnba.* .*siwg917y111xgnba.* .*siwg917y121mgnba.* .*siwg917y111mgaba.* .*siwg917y110lgaba.* .*siwg917y111xgaba.* .*siwg917y121mgaba.* .*siwg917y121mgnb.* .*siwg917m121xgtba.* .*siwg917m100mgtba.* .*siwg917m110lgtba.* diff --git a/wiseconnect3_demos.xml b/wiseconnect3_demos.xml index 63ce960f2..2a1714898 100644 --- a/wiseconnect3_demos.xml +++ b/wiseconnect3_demos.xml @@ -5,7 +5,9 @@ - + + + @@ -15,7 +17,9 @@ - + + + @@ -25,7 +29,9 @@ - + + + @@ -35,7 +41,21 @@ - + + + + + + + + + This application demonstrates the WLAN, BLE, MCU peripheral features and NWP (network processor) powersave capabilities of SiWG917 with a ready to go, minimal software installation experience. + + + + + + @@ -45,7 +65,9 @@ - + + + diff --git a/wiseconnect3_docs.xml b/wiseconnect3_docs.xml index 54a2341e1..08383627e 100644 --- a/wiseconnect3_docs.xml +++ b/wiseconnect3_docs.xml @@ -1,7 +1,7 @@ - + @@ -9,7 +9,7 @@ Get started with developing an application for the SiWx91x™ chipset family using the WiSeConnect™ SDK v3.x with an EFR32™ host in Network Co-Processor (NCP) mode, where the application runs on the EFR32 host and the connectivity stack runs on the SiWx91x chipset. - + @@ -17,7 +17,7 @@ Release Notes for the WiSeConnect 3 SDK for NCP mode development. These release notes provide information on the release including part compatibility, changes, and supported features. - + @@ -35,7 +35,7 @@ Glossary of commonly used terms in the SiWx91x™ documentation. - + @@ -98,7 +98,16 @@ Guide for updating an existing application using the WiSeConnect™ SDK v3.3.0 to a v3.3.1 application. This guide describes the naming and interface changes in v3.3.0, mostly in order to standardize the names and improve the overall usage experience of the application programming interface (API). Migration requires the names everywhere to be updated in the existing code of an application. - + + + + + + + Guide for updating an existing application using the WiSeConnect™ SDK v3.3.2 to a v3.3.3 application. This guide describes the naming and interface changes in v3.3.3, mostly in order to standardize the names and improve the overall usage experience of the application programming interface (API). Migration requires the names everywhere to be updated in the existing code of an application. + + + @@ -107,7 +116,7 @@ This reference manual provides information about the software on the SiWx917™, the first chip in the SiWx91x™ chipset family. It is intended to provide all the details required for a smooth developer experience. - + @@ -116,7 +125,7 @@ Guide to the application programming interface (API) of the WiSeConnect™ SDK v3.x, providing details of the functions, data types, constants, and callback frameworks within the various categories of APIs provided by the WiSeConnect™ SDK v3.x. - +