diff --git a/.gitignore b/.gitignore
index 843619b8c7..692779b7c9 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,12 +1,14 @@
-<<<<<<< HEAD
 # Qucs Specific #
-######################
+#################
 */src/qucsator
 */src/converter/qucsconv
 */src/gperfappgen
 qucs_typedefs.h
 */src/components/verilog/discipline.vams
 
+# Verilog-A generated files
+qucs-core/src/components/verilog/*.cpp
+
 # Following files generated by lex and yacc
 
 # qucsator generated files (in qucs-core/src)
@@ -88,7 +90,6 @@ Makefile.in
 Makefile
 stamp-h1
 missing
-configure
 config.guess
 config.h
 config.sub
@@ -102,7 +103,6 @@ depcomp
 install-sh
 libtool
 autom4te.cache/
-aclocal.m4
 auxconf/
 libltdl/
 libtool.m4
@@ -112,7 +112,6 @@ ltversion.m4
 lt~obsolete.m4
 ltmain.sh
 
-
 # Unknown #
 ###########
 *.output
@@ -128,6 +127,9 @@ ltmain.sh
 *.mex*
 *.pyc
 moc_*.cpp
+moc_*.cxx
+qrc_*.cpp
+qrc_*.cxx
 .libs
 
 # Packages #
@@ -174,35 +176,39 @@ qucs/contrib/doxygen/html/
 # created by Qt Creator
 CMakeLists.txt.user
 
+# emacs #
+#########
+# dot hash files (write locks)
+.\#*
 
-=======
-*.o
-*.cpp~
-*.h~
-qucsactivefilter
-*.pro.user
-Makefile
-moc_*.cpp
+# Qucs user files #
+###################
+# ignore schematics, data display and data
 *.sch
-*.sch~
-*.dat
 *.dpl
-qrc_*.cpp
-moc_*.cxx
-qrc_*.cxx
-CMakeFiles
-CMakeCache.txt
-*.cmake
-*.depends
+*.dat
+# except in the examples/ directory
+!examples/*.sch
+!examples/*.dpl
 
-# Xcode
+# Xcode #
+#########
 DerivedData
 *.build
 Debug
 *.xcodeproj
 
-#Others
+# Others #
+##########
 CMakeScripts
 *.cxx_parameters
 shadow
 
+########
+qucsactivefilter
+*.pro.user
+
+CMakeFiles
+CMakeCache.txt
+*.cmake
+*.depends
diff --git a/examples/filter_optimization.sch b/examples/filter_optimization.sch
new file mode 100644
index 0000000000..c00bf09686
--- /dev/null
+++ b/examples/filter_optimization.sch
@@ -0,0 +1,69 @@
+<Qucs Schematic 0.0.19>
+<Properties>
+  <View=33,92,1091,1000,0.859168,0,0>
+  <Grid=10,10,1>
+  <DataSet=filter_optimization.dat>
+  <DataDisplay=filter_optimization.dpl>
+  <OpenDisplay=0>
+  <Script=filter_optimizationt.m>
+  <RunScript=0>
+  <showFrame=0>
+  <FrameText0=Title>
+  <FrameText1=Drawn By:>
+  <FrameText2=Date:>
+  <FrameText3=Revision:>
+</Properties>
+<Symbol>
+</Symbol>
+<Components>
+  <Pac P1 1 100 260 18 -26 0 1 "1" 1 "50 Ohm" 1 "0 dBm" 0 "1 GHz" 0 "26.85" 0>
+  <GND * 1 100 290 0 0 0 0>
+  <GND * 1 210 290 0 0 0 0>
+  <GND * 1 350 290 0 0 0 0>
+  <GND * 1 490 290 0 0 0 0>
+  <L L1 1 420 180 -18 -48 0 0 "L2" 1 "" 0>
+  <L L3 1 280 180 -17 -48 0 0 "L1" 1 "" 0>
+  <C C1 1 210 260 17 -26 0 1 "C1" 1 "" 0 "neutral" 0>
+  <C C2 1 350 260 17 -26 0 1 "C2" 1 "" 0 "neutral" 0>
+  <C C3 1 490 260 17 -26 0 1 "C3" 1 "" 0 "neutral" 0>
+  <L L2 1 560 180 -17 -48 0 0 "L3" 1 "" 0>
+  <GND * 1 630 290 0 0 0 0>
+  <C C4 1 630 260 17 -26 0 1 "C4" 1 "" 0 "neutral" 0>
+  <Pac P2 1 750 260 18 -26 0 1 "2" 1 "50 Ohm" 1 "0 dBm" 0 "1 GHz" 0 "26.85" 0>
+  <GND * 1 750 290 0 0 0 0>
+  <.SP SP1 1 100 360 0 74 0 0 "log" 1 "1MHz" 1 "200MHz" 1 "233" 1 "no" 0 "1" 0 "2" 0 "no" 0 "no" 0>
+  <Eqn Eqn2 1 310 370 -28 15 0 0 "S21_dB=dB(S[2,1])" 1 "S11_dB=dB(S[1,1])" 1 "S22_dB=dB(S[2,2])" 1 "yes" 0>
+  <.Opt Opt1 1 470 360 0 44 0 0 "Sim=SP1" 0 "DE=3|1000|2|50|0.85|0.95|3|1e-6|10|100" 0 "Var=L1|yes|3.900000E-07|100e-9|560e-9|E12" 0 "Var=L2|yes|4.700000E-07|100e-9|560e-9|E12" 0 "Var=L3|yes|3.900000E-07|100e-9|560e-9|E12" 0 "Var=C1|yes|6.200000E-11|56e-12|330e-12|E24" 0 "Var=C2|yes|1.600000E-10|56e-12|470e-12|E24" 0 "Var=C3|yes|1.800000E-10|56e-12|470e-12|E24" 0 "Var=C4|yes|9.100000E-11|56e-12|330e-12|E24" 0 "Goal=Ripple|MIN|0" 0 "Goal=Min_S11|LE|-15" 0 "Goal=Min_Rej|GE|25" 0>
+  <Eqn Eqn1 1 690 370 -28 15 0 0 "f0=1e6" 1 "f1=31e6" 1 "fs=45e6" 1 "Max_Gain=max(dB(S[2,1]), f0:f1)" 1 "Min_Gain=min(dB(S[2,1]), f0:f1)" 1 "Min_S11=max(dB(S[1,1]), f0:f1)" 1 "Min_Rej=-max(dB(S[2,1]), fs:200e6)" 1 "Ripple=Max_Gain-Min_Gain" 1 "yes" 0>
+</Components>
+<Wires>
+  <100 180 100 230 "" 0 0 0 "">
+  <100 180 210 180 "" 0 0 0 "">
+  <210 180 210 230 "" 0 0 0 "">
+  <350 180 350 230 "" 0 0 0 "">
+  <490 180 490 230 "" 0 0 0 "">
+  <450 180 490 180 "" 0 0 0 "">
+  <350 180 390 180 "" 0 0 0 "">
+  <310 180 350 180 "" 0 0 0 "">
+  <210 180 250 180 "" 0 0 0 "">
+  <590 180 630 180 "" 0 0 0 "">
+  <490 180 530 180 "" 0 0 0 "">
+  <630 180 630 230 "" 0 0 0 "">
+  <630 180 750 180 "" 0 0 0 "">
+  <750 180 750 230 "" 0 0 0 "">
+</Wires>
+<Diagrams>
+  <Rect 150 836 359 281 3 #c0c0c0 1 10 1 1e+06 1 3e+08 0 -50 10 0 0 -2.5 0.5 2.5 315 0 225 "frequency, Hz" "" "">
+	<"S21_dB" #0000ff 0 3 0 0 0>
+	<"S11_dB" #ff0000 0 3 0 0 0>
+	<"S21_dB" #00aa00 0 3 0 0 1>
+  </Rect>
+  <Tab 186 960 304 49 3 #c0c0c0 1 00 1 0 1 1 1 0 1 1 1 0 1 1 315 0 225 "" "" "">
+	<"Ripple" #0000ff 0 3 1 0 0>
+	<"Min_S11" #0000ff 0 3 1 0 0>
+	<"Min_Rej" #0000ff 0 3 1 0 0>
+  </Tab>
+</Diagrams>
+<Paintings>
+  <Text 620 640 12 #ff5500 0 "Filter optimization using ASCO example:\n\nThe filter response is optimized for the minimum ripple\nwith constraints on the minimum in-band reflection coefficient\nand on the attenuation at a frequency in the stop band.\n\nThe components values are forced to be in the E12 series for\nthe inductors and in the E24 series for the capacitors.">
+</Paintings>
diff --git a/qucs/qucs/components/opt_sim.cpp b/qucs/qucs/components/opt_sim.cpp
index 3403de26b2..2ab5d28c23 100644
--- a/qucs/qucs/components/opt_sim.cpp
+++ b/qucs/qucs/components/opt_sim.cpp
@@ -183,7 +183,7 @@ bool Optimize_Sim::createASCOFiles()
 	stream << "#\n\n";
 	stream << "# Post Processing #\n";
 	stream << "MEASURE_VAR:#SYMBOL#:SEARCH_FOR:'<indep " << VarName
-	       << "':S_COL:01:P_LINE:01:P_COL:01:31" << "\n";
+	       << " ':S_COL:01:P_LINE:01:P_COL:01:31" << "\n";
 	stream << "#\n\n";
 	efile.close();
       }
diff --git a/qucs/qucs/components/optimizedialog.cpp b/qucs/qucs/components/optimizedialog.cpp
index ddd6af9fb0..f50cf720c3 100644
--- a/qucs/qucs/components/optimizedialog.cpp
+++ b/qucs/qucs/components/optimizedialog.cpp
@@ -4,6 +4,8 @@
     begin                : Sun Jul 30 2006
     copyright            : (C) 2006 by Michael Margraf
     email                : michael.margraf@alumni.tu-berlin.de
+
+    copyright            : (C) 2016 Qucs Team
  ***************************************************************************/
 
 /***************************************************************************
@@ -228,6 +230,13 @@ OptimizeDialog::OptimizeDialog(Optimize_Sim *c_, Schematic *d_)
   VarTypeCombo->insertItem(1, tr("logarithmic double"));
   VarTypeCombo->insertItem(2, tr("linear integer"));
   VarTypeCombo->insertItem(3, tr("logarithmic integer"));
+  VarTypeCombo->insertItem(4, tr("E3 series"));
+  VarTypeCombo->insertItem(5, tr("E6 series"));
+  VarTypeCombo->insertItem(6, tr("E12 series"));
+  VarTypeCombo->insertItem(7, tr("E24 series"));
+  VarTypeCombo->insertItem(8, tr("E48 series"));
+  VarTypeCombo->insertItem(9, tr("E96 series"));
+  VarTypeCombo->insertItem(10, tr("E192 series"));
   connect(VarTypeCombo, SIGNAL(activated(const QString&)),
           SLOT(slotChangeVarType(const QString&)));
 
@@ -404,6 +413,20 @@ OptimizeDialog::OptimizeDialog(Optimize_Sim *c_, Schematic *d_)
         typeStr = tr("logarithmic double");
       } else if (ValueSplit.at(5) == "LIN_INT") {
         typeStr = tr("linear integer");
+      } else if (ValueSplit.at(5) == "E3") {
+        typeStr = tr("E3 series");
+      } else if (ValueSplit.at(5) == "E6") {
+        typeStr = tr("E6 series");
+      } else if (ValueSplit.at(5) == "E12") {
+        typeStr = tr("E12 series");
+      } else if (ValueSplit.at(5) == "E24") {
+        typeStr = tr("E24 series");
+      } else if (ValueSplit.at(5) == "E48") {
+        typeStr = tr("E48 series");
+      } else if (ValueSplit.at(5) == "E96") {
+        typeStr = tr("E96 series");
+      } else if (ValueSplit.at(5) == "E192") {
+        typeStr = tr("E192 series");
       } else {
         typeStr = tr("logarithmic integer");
       }
@@ -749,6 +772,20 @@ void OptimizeDialog::slotApply()
       propList << "LOG_DOUBLE";
     } else if (typeStr == tr("linear integer")) {
       propList << "LIN_INT";
+    } else if (typeStr == tr("E3 series")) {
+      propList << "E3";
+    } else if (typeStr == tr("E6 series")) {
+      propList << "E6";
+    } else if (typeStr == tr("E12 series")) {
+      propList << "E12";
+    } else if (typeStr == tr("E24 series")) {
+      propList << "E24";
+    } else if (typeStr == tr("E48 series")) {
+      propList << "E48";
+    } else if (typeStr == tr("E96 series")) {
+      propList << "E96";
+    } else if (typeStr == tr("E192 series")) {      
+      propList << "E192";
     } else {
       propList << "LOG_INT";
     }