Optim level 2 and 3 modifiy circuits that match topology #3386
Labels
bug
Something isn't working
priority: high
status: pending PR
It has one or more PRs pending to solve this issue
Information
What is the current behavior?
The following circuit fits Vigo-like topologies exactly:
But optimization level 3 gives:
Where as the default gives the expected original circuit (save for H -> U2):
Steps to reproduce the problem
What is the expected behavior?
Suggested solutions
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