From 678979bf10a48d0f48530d296ada2a0c07eff4f1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Guido=20G=C3=BCnther?= <agx@sigxcpu.org>
Date: Wed, 27 Jan 2021 14:41:44 +0100
Subject: [PATCH] arm64: dts: librem5: Add interconnect name for DCSS
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Otherwise it fails to probe indicated by

    [   30.524888] imx-dcss 32e00000.display-controller: No interconnect support may cause display underflows!

Closes: #262
Signed-off-by: Guido Günther <agx@sigxcpu.org>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index e9807effa872b5..e4c74633852e00 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1233,6 +1233,7 @@
 				assigned-clock-rates = <800000000>,
 						       <400000000>;
 				interconnects = <&noc IMX8MQ_ICM_DCSS &noc IMX8MQ_ICS_DRAM>;
+				interconnect-names = "dram";
 				status = "disabled";
 				dcss_dsi_out: port@0 {
 					dcss_mipi_dsi: endpoint {