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Bender.yml
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# Copyright 2020 ETH Zurich and University of Bologna.
# Solderpad Hardware License, Version 0.51, see LICENSE for details.
# SPDX-License-Identifier: SHL-0.51
package:
name: occamy
authors:
- Florian Zaruba <zarubaf@iis.ee.ethz.ch>
- Fabian Schuiki <fschuiki@iis.ee.ethz.ch>
- Gianna Paulin <pauling@iis.ee.ethz.ch> # current maintainer
- Paul Scheffler <paulsc@iis.ee.ethz.ch>
- Thomas Benz <tbenz@iis.ee.ethz.ch>
- Tim Fischer <fischeti@iis.ee.ethz.ch>
- Luca Colagrande <colluca@iis.ee.ethz.ch>
- Noah Huetter <huettern@ethz.ch>
- Samuel Riedel <sriedel@iis.ee.ethz.ch>
- Nils Wistoff <nwistoff@iis.ee.ethz.ch>
- Luca Bertaccini <lbertaccini@iis.ee.ethz.ch>
- Matheus Cavalcante <matheusd@iis.ee.ethz.ch>
dependencies:
apb: { git: https://github.com/pulp-platform/apb.git, version: 0.2.0 }
apb_timer: { git: https://github.com/pulp-platform/apb_timer.git, rev: 0cbc6cbc26c94b8e3bf27cc058c48ef89ea3d4c3 }
apb_uart: { git: https://github.com/pulp-platform/apb_uart.git, rev: b6145341df79137ac584c83e9c081f80a7a40440 }
axi: { path: hw/vendor/pulp_platform_axi }
axi_tlb: { path: hw/vendor/pulp_platform_axi_tlb }
clint: { git: https://github.com/pulp-platform/clint.git, rev: v0.1.0 }
common_cells: { git: https://github.com/pulp-platform/common_cells.git, rev: v1.28.0 }
cva6: { path: hw/vendor/openhwgroup_cva6 }
opentitan_peripherals: { path: hw/vendor/pulp_platform_opentitan_peripherals }
register_interface: { git: https://github.com/pulp-platform/register_interface.git, version: 0.3.8 }
snitch_cluster: { git: https://github.com/KULeuven-MICAS/snax_cluster.git, rev: main }
tech_cells_generic: { git: https://github.com/KULeuven-MICAS/tech_cells_generic.git, version: 0.2.16 }
cluster_icache: { git: https://github.com/KULeuven-MICAS/cluster_icache.git, rev: main }
hemaia_axi_spi_slave: { git: https://github.com/KULeuven-MICAS/hemaia_axi_spi_slave.git, rev: main }
workspace:
package_links:
deps/snitch_cluster: snitch_cluster
export_include_dirs:
- hw/spm_interface/include
sources:
- target: all(tech_cells_generic_exclude_tc_sram, prep_syn, print_mem_info)
files:
- target/tapeout/tc_sram/tc_sram_print/tc_sram.sv
- target/tapeout/tc_sram/tc_sram_print/tc_sram_impl.sv
- target: all(tech_cells_generic_exclude_tc_sram, any(prep_syn_test,synthesis))
files:
- /users/micas/shares/project_snax/tapeout_modules/hemaia/tc_sram_impl.sv
# spm_interface
- files:
# Level 1
- hw/spm_interface/src/spm_interface.sv
- hw/spm_interface/src/spm_rmw_adapter.sv
# Level 2
- hw/spm_interface/src/spm_1p_adv_mem_wrapper.sv
- hw/spm_interface/src/spm_1p_adv.sv
- target: simulation
files:
- hw/spm_interface/src/spm_test.sv
- target: test
files:
- hw/spm_interface/test/tb_spm_rmw_adapter.sv
- hw/spm_interface/test/tb_spm_1p_adv.sv
# cluster wrapper (If the file is added in the snax repo, then it does not needed to be added here)
- target: snax_minimal_cluster
files:
- deps/snitch_cluster/target/snitch_cluster/generated/snax_minimal_cluster_wrapper.sv
# auto-generated soc
- target: occamy
files:
# quadrant_s1_ctrl
- target/rtl/src/quadrant_s1_ctrl/occamy_quadrant_s1_reg_pkg.sv
- target/rtl/src/quadrant_s1_ctrl/occamy_quadrant_s1_reg_top.sv
# soc_ctrl
- target/rtl/src/soc_ctrl/occamy_soc_reg_pkg.sv
- target/rtl/src/soc_ctrl/occamy_soc_reg_top.sv
- target/rtl/src/soc_ctrl/occamy_soc_ctrl.sv
# rv_plic
- target/rtl/src/rv_plic/rv_plic_reg_pkg.sv
- target/rtl/src/rv_plic/rv_plic_reg_top.sv
- target/rtl/src/rv_plic/rv_plic.sv
# clint
- target/rtl/src/clint/clint_reg_pkg.sv
- target/rtl/src/clint/clint_reg_top.sv
- target/rtl/src/clint/clint.sv
# occamy
- target/rtl/src/occamy_pkg.sv
- target/rtl/src/occamy_quadrant_s1_ctrl.sv
- target/rtl/src/occamy_quadrant_s1.sv
- target/rtl/src/occamy_soc.sv
- target/rtl/src/occamy_top.sv
- target/rtl/src/occamy_cva6.sv
# target/fpga
- target: xilinx
files:
- target/rtl/src/occamy_xilinx.sv
# target/sim
- target: simulation_occamy
files:
- target/rtl/test/uartdpi/uartdpi.sv
- target/rtl/test/testharness.sv
# target/sim_chip
- target: simulation_hemaia
files:
- target/rtl/test/uartdpi/uartdpi.sv
- target/sim_chip/testharness/testharness.sv
# - target/sim/test/bootrom.sv
- target/rtl/bootrom/bootrom.sv
- target/rtl/src/occamy_chip.sv
# target/*_chip
- target: hemaia
files:
- target/rtl/bootrom/bootrom.sv
- target/rtl/src/occamy_chip.sv
- target: tsmc_pad
files:
- /users/micas/shares/project_snax/tapeout_modules/hemaia/obs_clk_div.sv
- /users/micas/shares/project_snax/tapeout_modules/hemaia/hemaia_chip_top.sv