From 1887d6da006c39c03aff3291eab39f9cd282f5a9 Mon Sep 17 00:00:00 2001
From: Sam Bobrowicz <sbobrowicz@digilentinc.com>
Date: Fri, 17 Feb 2017 13:41:02 -0800
Subject: [PATCH] new: arty-z7-10: swap SS with IO10

Swapped IO10 and SPI SS pin. The following issue now applies to this board:
https://github.com/Digilent/vivado-boards/issues/5
---
 new/board_files/arty-z7-10/A.0/part0_pins.xml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/new/board_files/arty-z7-10/A.0/part0_pins.xml b/new/board_files/arty-z7-10/A.0/part0_pins.xml
index 7e36c05..4ec6346 100644
--- a/new/board_files/arty-z7-10/A.0/part0_pins.xml
+++ b/new/board_files/arty-z7-10/A.0/part0_pins.xml
@@ -46,13 +46,13 @@
   <pin index="42" name ="shield_dp0_dp13_tri_i_7" iostandard="LVCMOS33" loc="U17"/>
   <pin index="43" name ="shield_dp0_dp13_tri_i_8" iostandard="LVCMOS33" loc="V17"/>
   <pin index="44" name ="shield_dp0_dp13_tri_i_9" iostandard="LVCMOS33" loc="V18"/>
-  <pin index="45" name ="shield_dp0_dp13_tri_i_10" iostandard="LVCMOS33" loc="T16"/>
+  <pin index="45" name ="shield_dp0_dp13_tri_i_10" iostandard="LVCMOS33" loc="F16"/>
   <pin index="46" name ="shield_dp0_dp13_tri_i_11" iostandard="LVCMOS33" loc="R17"/>
   <pin index="47" name ="shield_dp0_dp13_tri_i_12" iostandard="LVCMOS33" loc="P18"/>
   <pin index="48" name ="shield_dp0_dp13_tri_i_13" iostandard="LVCMOS33" loc="N17"/>
   <pin index="65" name ="spi_miso_i" iostandard="LVCMOS33" loc="W15"/>
   <pin index="66" name ="spi_mosi_i" iostandard="LVCMOS33" loc="T12"/>
   <pin index="67" name ="spi_sclk_i" iostandard="LVCMOS33" loc="H15"/>
-  <pin index="68" name ="spi_ss_i" iostandard="LVCMOS33" loc="F16"/>
+  <pin index="68" name ="spi_ss_i" iostandard="LVCMOS33" loc="T16"/>
 </pins>
 </part_info>