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Copy pathMIPS_core.v.out
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MIPS_core.v.out
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#! /usr/local/iverilog/bin/vvp
:ivl_version "11.0 (devel)" "(s20150603-642-g3bdb50da)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "system";
:vpi_module "vhdl_sys";
:vpi_module "vhdl_textio";
:vpi_module "v2005_math";
:vpi_module "va_math";
S_0000000000f9d6b0 .scope module, "mips_core" "mips_core" 2 11;
.timescale 0 0;
.port_info 0 /INPUT 1 "clock";
RS_0000000000f9ea58 .resolv tri, v0000000000f95070_0, v0000000000ff2240_0;
v0000000000ff5e60_0 .net8 "Branch", 0 0, RS_0000000000f9ea58; 2 drivers
v0000000000ff4c40_0 .net "MemRead", 0 0, v0000000000ff22e0_0; 1 drivers
v0000000000ff5500_0 .net "MemWrite", 0 0, v0000000000ff2380_0; 1 drivers
v0000000000ff55a0_0 .var "PC", 31 0;
v0000000000ff5a00_0 .net "RegRead", 0 0, v0000000000ff2420_0; 1 drivers
v0000000000ff5640_0 .net "RegWrite", 0 0, v0000000000ff6680_0; 1 drivers
v0000000000ff5b40_0 .net "aa", 0 0, v0000000000ff3280_0; 1 drivers
v0000000000ff4880_0 .net "bd", 13 0, v0000000000ff3780_0; 1 drivers
v0000000000ff6040_0 .net "bi", 4 0, v0000000000ff3a00_0; 1 drivers
v0000000000ff4920_0 .net "bo", 4 0, v0000000000ff3140_0; 1 drivers
o0000000000f9fb38 .functor BUFZ 1, C4<z>; HiZ drive
v0000000000ff49c0_0 .net "clock", 0 0, o0000000000f9fb38; 0 drivers
v0000000000ff4ce0_0 .net "ds", 13 0, v0000000000ff2600_0; 1 drivers
v0000000000ff5be0_0 .net "instruction", 31 0, v0000000000ff2560_0; 1 drivers
v0000000000ff4d80_0 .net "li", 23 0, v0000000000ff38c0_0; 1 drivers
v0000000000ff5280_0 .net "lk", 0 0, v0000000000ff26a0_0; 1 drivers
v0000000000ff6400_0 .net "memory_read_data", 63 0, v0000000000ff2c40_0; 1 drivers
v0000000000ff4e20_0 .net "oe", 0 0, v0000000000ff3320_0; 1 drivers
v0000000000ff5320_0 .net "opcode", 5 0, L_0000000000ff4f60; 1 drivers
v0000000000ff51e0_0 .net "rc", 0 0, v0000000000ff3aa0_0; 1 drivers
v0000000000ff4a60_0 .net "rd", 4 0, v0000000000ff2740_0; 1 drivers
v0000000000ff5820_0 .net "rs", 4 0, v0000000000ff2880_0; 1 drivers
v0000000000ff60e0_0 .net "rs_content", 63 0, v0000000000ff2e20_0; 1 drivers
v0000000000ff6180_0 .net "rt", 4 0, v0000000000ff29c0_0; 1 drivers
v0000000000ff53c0_0 .net "rt_content", 63 0, v0000000000ff3c80_0; 1 drivers
v0000000000ff6220_0 .net "si", 15 0, v0000000000ff27e0_0; 1 drivers
v0000000000ff5460_0 .net "write_data", 63 0, v0000000000f95f70_0; 1 drivers
v0000000000ff62c0_0 .net "xods", 1 0, v0000000000ff2920_0; 1 drivers
v0000000000ff6360_0 .net "xox", 9 0, v0000000000ff2a60_0; 1 drivers
v0000000000ff5dc0_0 .net "xoxo", 8 0, v0000000000ff2ec0_0; 1 drivers
E_0000000000f8e590 .event posedge, v0000000000ff49c0_0;
S_0000000000f772c0 .scope module, "ALU" "ALU32bit" 2 47, 3 5 0, S_0000000000f9d6b0;
.timescale 0 0;
.port_info 0 /OUTPUT 64 "ALU_result";
.port_info 1 /OUTPUT 1 "Branch";
.port_info 2 /INPUT 64 "rs";
.port_info 3 /INPUT 64 "rt";
.port_info 4 /INPUT 64 "bo";
.port_info 5 /INPUT 64 "bi";
.port_info 6 /INPUT 6 "opcode";
.port_info 7 /INPUT 9 "xoxo";
.port_info 8 /INPUT 10 "xox";
.port_info 9 /INPUT 1 "rc";
.port_info 10 /INPUT 1 "aa";
.port_info 11 /INPUT 14 "ds";
.port_info 12 /INPUT 16 "si";
.port_info 13 /INPUT 2 "xods";
v0000000000f95f70_0 .var "ALU_result", 63 0;
v0000000000f95070_0 .var "Branch", 0 0;
v0000000000f95c50_0 .net "aa", 0 0, v0000000000ff3280_0; alias, 1 drivers
v0000000000f952f0_0 .net "bi", 63 0, v0000000000ff3c80_0; alias, 1 drivers
v0000000000f95d90_0 .net "bo", 63 0, v0000000000ff2e20_0; alias, 1 drivers
v0000000000f95b10_0 .net "ds", 13 0, v0000000000ff2600_0; alias, 1 drivers
v0000000000f95e30_0 .net "opcode", 5 0, L_0000000000ff4f60; alias, 1 drivers
v0000000000f95110_0 .net "rc", 0 0, v0000000000ff3aa0_0; alias, 1 drivers
v0000000000f956b0_0 .net "rs", 63 0, v0000000000ff2e20_0; alias, 1 drivers
v0000000000f95430_0 .net "rt", 63 0, v0000000000ff3c80_0; alias, 1 drivers
v0000000000f954d0_0 .net "si", 15 0, v0000000000ff27e0_0; alias, 1 drivers
v0000000000f95bb0_0 .var "sign16ExtendSI", 31 0;
v0000000000f951b0_0 .var "signExtendDS", 31 0;
v0000000000f95250_0 .var "signExtendSI", 31 0;
v0000000000ff24c0_0 .var/s "signed_rs", 31 0;
v0000000000ff2060_0 .var/s "signed_rt", 31 0;
v0000000000ff3820_0 .net "xods", 1 0, v0000000000ff2920_0; alias, 1 drivers
v0000000000ff3500_0 .net "xox", 9 0, v0000000000ff2a60_0; alias, 1 drivers
v0000000000ff36e0_0 .net "xoxo", 8 0, v0000000000ff2ec0_0; alias, 1 drivers
E_0000000000f8ec50/0 .event edge, v0000000000f954d0_0, v0000000000f95b10_0, v0000000000f95110_0, v0000000000ff3820_0;
E_0000000000f8ec50/1 .event edge, v0000000000ff36e0_0, v0000000000ff3500_0, v0000000000f952f0_0, v0000000000f95d90_0;
E_0000000000f8ec50 .event/or E_0000000000f8ec50/0, E_0000000000f8ec50/1;
S_0000000000f77450 .scope module, "InstructionMemory" "read_instructions" 2 41, 4 4 0, S_0000000000f9d6b0;
.timescale 0 0;
.port_info 0 /OUTPUT 32 "instruction";
.port_info 1 /INPUT 32 "program_counter";
v0000000000ff2560_0 .var "instruction", 31 0;
v0000000000ff3be0 .array "instructions", 0 1, 31 0;
v0000000000ff3960_0 .net "program_counter", 31 0, v0000000000ff55a0_0; 1 drivers
E_0000000000f8ea10 .event edge, v0000000000ff3960_0;
S_0000000000f6fd40 .scope module, "MainMemory" "read_mem" 2 49, 5 4 0, S_0000000000f9d6b0;
.timescale 0 0;
.port_info 0 /OUTPUT 64 "ReadData";
.port_info 1 /INPUT 64 "address";
.port_info 2 /INPUT 64 "WriteData";
.port_info 3 /INPUT 6 "opcode";
.port_info 4 /INPUT 1 "MemRead";
.port_info 5 /INPUT 1 "MemWrite";
v0000000000ff3b40_0 .net "MemRead", 0 0, v0000000000ff22e0_0; alias, 1 drivers
v0000000000ff31e0_0 .net "MemWrite", 0 0, v0000000000ff2380_0; alias, 1 drivers
v0000000000ff2c40_0 .var "ReadData", 63 0;
v0000000000ff2ba0_0 .net "WriteData", 63 0, v0000000000ff2e20_0; alias, 1 drivers
v0000000000ff30a0_0 .net "address", 63 0, v0000000000f95f70_0; alias, 1 drivers
v0000000000ff3640 .array "data_mem", 0 4, 63 0;
v0000000000ff33c0_0 .net "opcode", 5 0, L_0000000000ff4f60; alias, 1 drivers
E_0000000000f8ea50 .event edge, v0000000000f95f70_0;
S_0000000000f6fed0 .scope module, "Parse" "InstructionParse" 2 43, 6 5 0, S_0000000000f9d6b0;
.timescale 0 0;
.port_info 0 /OUTPUT 6 "opcode";
.port_info 1 /OUTPUT 5 "rs";
.port_info 2 /OUTPUT 5 "rt";
.port_info 3 /OUTPUT 5 "rd";
.port_info 4 /OUTPUT 5 "bo";
.port_info 5 /OUTPUT 5 "bi";
.port_info 6 /OUTPUT 9 "xoxo";
.port_info 7 /OUTPUT 10 "xox";
.port_info 8 /OUTPUT 1 "rc";
.port_info 9 /OUTPUT 1 "aa";
.port_info 10 /OUTPUT 1 "lk";
.port_info 11 /OUTPUT 1 "oe";
.port_info 12 /OUTPUT 14 "bd";
.port_info 13 /OUTPUT 14 "ds";
.port_info 14 /OUTPUT 16 "si";
.port_info 15 /OUTPUT 24 "li";
.port_info 16 /OUTPUT 2 "xods";
.port_info 17 /INPUT 32 "instruction";
v0000000000ff3280_0 .var "aa", 0 0;
v0000000000ff3780_0 .var "bd", 13 0;
v0000000000ff3a00_0 .var "bi", 4 0;
v0000000000ff3140_0 .var "bo", 4 0;
v0000000000ff2600_0 .var "ds", 13 0;
v0000000000ff2ce0_0 .net "instruction", 31 0, v0000000000ff2560_0; alias, 1 drivers
v0000000000ff38c0_0 .var "li", 23 0;
v0000000000ff26a0_0 .var "lk", 0 0;
v0000000000ff3320_0 .var "oe", 0 0;
v0000000000ff3460_0 .net "opcode", 5 0, L_0000000000ff4f60; alias, 1 drivers
v0000000000ff3aa0_0 .var "rc", 0 0;
v0000000000ff2740_0 .var "rd", 4 0;
v0000000000ff2880_0 .var "rs", 4 0;
v0000000000ff29c0_0 .var "rt", 4 0;
v0000000000ff27e0_0 .var "si", 15 0;
v0000000000ff2920_0 .var "xods", 1 0;
v0000000000ff2a60_0 .var "xox", 9 0;
v0000000000ff2ec0_0 .var "xoxo", 8 0;
E_0000000000f8eb10 .event edge, v0000000000ff2560_0;
L_0000000000ff4f60 .part v0000000000ff2560_0, 26, 6;
S_0000000000f6d470 .scope module, "Registers" "read_registers" 2 51, 7 1 0, S_0000000000f9d6b0;
.timescale 0 0;
.port_info 0 /OUTPUT 64 "ReadData1";
.port_info 1 /OUTPUT 64 "ReadData2";
.port_info 2 /INPUT 5 "rs";
.port_info 3 /INPUT 5 "rt";
.port_info 4 /INPUT 5 "rd";
.port_info 5 /INPUT 6 "opcode";
.port_info 6 /INPUT 64 "WriteData";
.port_info 7 /INPUT 1 "RegRead";
.port_info 8 /INPUT 1 "RegWrite";
v0000000000ff2e20_0 .var "ReadData1", 63 0;
v0000000000ff3c80_0 .var "ReadData2", 63 0;
v0000000000ff35a0_0 .net "RegRead", 0 0, v0000000000ff2420_0; alias, 1 drivers
v0000000000ff2f60_0 .net "RegWrite", 0 0, v0000000000ff6680_0; alias, 1 drivers
v0000000000ff3d20_0 .net "WriteData", 63 0, v0000000000f95f70_0; alias, 1 drivers
v0000000000ff3000_0 .net "opcode", 5 0, L_0000000000ff4f60; alias, 1 drivers
v0000000000ff3dc0_0 .net "rd", 4 0, v0000000000ff2740_0; alias, 1 drivers
v0000000000ff3e60 .array "registers", 0 31, 63 0;
v0000000000ff3f00_0 .net "rs", 4 0, v0000000000ff2880_0; alias, 1 drivers
v0000000000ff2100_0 .net "rt", 4 0, v0000000000ff29c0_0; alias, 1 drivers
E_0000000000f8e090 .event edge, v0000000000ff2740_0, v0000000000ff29c0_0, v0000000000ff2880_0;
S_0000000000f6d600 .scope module, "Signals" "control_unit" 2 45, 8 3 0, S_0000000000f9d6b0;
.timescale 0 0;
.port_info 0 /OUTPUT 1 "RegRead";
.port_info 1 /OUTPUT 1 "RegWrite";
.port_info 2 /OUTPUT 1 "MemRead";
.port_info 3 /OUTPUT 1 "MemWrite";
.port_info 4 /OUTPUT 1 "Branch";
.port_info 5 /INPUT 6 "opcode";
.port_info 6 /INPUT 9 "xoxo";
.port_info 7 /INPUT 10 "xox";
.port_info 8 /INPUT 2 "xods";
v0000000000ff2240_0 .var "Branch", 0 0;
v0000000000ff22e0_0 .var "MemRead", 0 0;
v0000000000ff2380_0 .var "MemWrite", 0 0;
v0000000000ff2420_0 .var "RegRead", 0 0;
v0000000000ff6680_0 .var "RegWrite", 0 0;
v0000000000ff5960_0 .net "opcode", 5 0, L_0000000000ff4f60; alias, 1 drivers
v0000000000ff5fa0_0 .net "xods", 1 0, v0000000000ff2920_0; alias, 1 drivers
v0000000000ff5aa0_0 .net "xox", 9 0, v0000000000ff2a60_0; alias, 1 drivers
v0000000000ff6720_0 .net "xoxo", 8 0, v0000000000ff2ec0_0; alias, 1 drivers
E_0000000000f8e0d0 .event edge, v0000000000ff3820_0, v0000000000ff3500_0, v0000000000ff36e0_0, v0000000000f95e30_0;
.scope S_0000000000f77450;
T_0 ;
%vpi_call 4 11 "$readmemb", "instructions.mem", v0000000000ff3be0, 32'sb00000000000000000000000000000001, 32'sb00000000000000000000000000000000 {0 0 0};
%end;
.thread T_0;
.scope S_0000000000f77450;
T_1 ;
%wait E_0000000000f8ea10;
%ix/getv 4, v0000000000ff3960_0;
%load/vec4a v0000000000ff3be0, 4;
%store/vec4 v0000000000ff2560_0, 0, 32;
%jmp T_1;
.thread T_1, $push;
.scope S_0000000000f6fed0;
T_2 ;
%wait E_0000000000f8eb10;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 31, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 9, 1, 2;
%pushi/vec4 266, 0, 9;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 9, 1, 2;
%pushi/vec4 40, 0, 9;
%cmp/e;
%flag_get/vec4 4;
%or;
%and;
%flag_set/vec4 8;
%jmp/0xz T_2.0, 8;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 21, 6;
%store/vec4 v0000000000ff2740_0, 0, 5;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 16, 6;
%store/vec4 v0000000000ff2880_0, 0, 5;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 11, 5;
%store/vec4 v0000000000ff29c0_0, 0, 5;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 9, 1, 2;
%store/vec4 v0000000000ff2ec0_0, 0, 9;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 1, 10, 5;
%store/vec4 v0000000000ff3320_0, 0, 1;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 1, 0, 2;
%store/vec4 v0000000000ff3aa0_0, 0, 1;
%jmp T_2.1;
T_2.0 ;
%load/vec4 v0000000000ff3460_0;
%cmpi/e 31, 0, 6;
%jmp/0xz T_2.2, 4;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 10, 1, 2;
%store/vec4 v0000000000ff2a60_0, 0, 10;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 1, 0, 2;
%store/vec4 v0000000000ff3aa0_0, 0, 1;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 21, 6;
%store/vec4 v0000000000ff2740_0, 0, 5;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 16, 6;
%store/vec4 v0000000000ff2880_0, 0, 5;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 11, 5;
%store/vec4 v0000000000ff29c0_0, 0, 5;
%jmp T_2.3;
T_2.2 ;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 14, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 15, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 28, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 24, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 26, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 32, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 36, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 37, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 40, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 42, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 44, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 34, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff3460_0;
%pushi/vec4 38, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%flag_set/vec4 8;
%jmp/0xz T_2.4, 8;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 21, 6;
%store/vec4 v0000000000ff2740_0, 0, 5;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 16, 6;
%store/vec4 v0000000000ff2880_0, 0, 5;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 16, 0, 2;
%store/vec4 v0000000000ff27e0_0, 0, 16;
%jmp T_2.5;
T_2.4 ;
%load/vec4 v0000000000ff3460_0;
%cmpi/e 19, 0, 6;
%jmp/0xz T_2.6, 4;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 21, 6;
%store/vec4 v0000000000ff3140_0, 0, 5;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 16, 6;
%store/vec4 v0000000000ff3a00_0, 0, 5;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 1, 1, 2;
%store/vec4 v0000000000ff3280_0, 0, 1;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 1, 0, 2;
%store/vec4 v0000000000ff26a0_0, 0, 1;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 14, 2, 3;
%store/vec4 v0000000000ff3780_0, 0, 14;
%jmp T_2.7;
T_2.6 ;
%load/vec4 v0000000000ff3460_0;
%cmpi/e 18, 0, 6;
%jmp/0xz T_2.8, 4;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 24, 2, 3;
%store/vec4 v0000000000ff38c0_0, 0, 24;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 1, 1, 2;
%store/vec4 v0000000000ff3280_0, 0, 1;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 1, 0, 2;
%store/vec4 v0000000000ff26a0_0, 0, 1;
%jmp T_2.9;
T_2.8 ;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 21, 6;
%store/vec4 v0000000000ff2740_0, 0, 5;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 5, 16, 6;
%store/vec4 v0000000000ff2880_0, 0, 5;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 14, 2, 3;
%store/vec4 v0000000000ff2600_0, 0, 14;
%load/vec4 v0000000000ff2ce0_0;
%parti/s 2, 0, 2;
%store/vec4 v0000000000ff2920_0, 0, 2;
T_2.9 ;
T_2.7 ;
T_2.5 ;
T_2.3 ;
T_2.1 ;
%jmp T_2;
.thread T_2, $push;
.scope S_0000000000f6d600;
T_3 ;
%wait E_0000000000f8e0d0;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000000000ff22e0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000000000ff2380_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000000000ff6680_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000000000ff2420_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000000000ff2240_0, 0, 1;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 31, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v0000000000ff6720_0;
%pad/u 32;
%pushi/vec4 0, 0, 32;
%cmp/ne;
%flag_get/vec4 4;
%and;
%flag_set/vec4 8;
%jmp/0xz T_3.0, 8;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff2420_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff6680_0, 0, 1;
%jmp T_3.1;
T_3.0 ;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 31, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v0000000000ff5aa0_0;
%pad/u 32;
%pushi/vec4 0, 0, 32;
%cmp/ne;
%flag_get/vec4 4;
%and;
%flag_set/vec4 8;
%jmp/0xz T_3.2, 8;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff2420_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff6680_0, 0, 1;
%jmp T_3.3;
T_3.2 ;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 14, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 15, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 28, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 24, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 26, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%flag_set/vec4 8;
%jmp/0xz T_3.4, 8;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff2420_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff6680_0, 0, 1;
%jmp T_3.5;
T_3.4 ;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 32, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 40, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 42, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 34, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 58, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%flag_set/vec4 8;
%jmp/0xz T_3.6, 8;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff2420_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff6680_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff22e0_0, 0, 1;
%jmp T_3.7;
T_3.6 ;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 36, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 37, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 44, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 38, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000ff5960_0;
%pushi/vec4 62, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%flag_set/vec4 8;
%jmp/0xz T_3.8, 8;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff2420_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff2380_0, 0, 1;
%jmp T_3.9;
T_3.8 ;
%load/vec4 v0000000000ff5960_0;
%cmpi/e 18, 0, 6;
%jmp/0xz T_3.10, 4;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff2240_0, 0, 1;
%jmp T_3.11;
T_3.10 ;
%load/vec4 v0000000000ff5960_0;
%cmpi/e 19, 0, 6;
%jmp/0xz T_3.12, 4;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff2420_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000ff2240_0, 0, 1;
T_3.12 ;
T_3.11 ;
T_3.9 ;
T_3.7 ;
T_3.5 ;
T_3.3 ;
T_3.1 ;
%jmp T_3;
.thread T_3, $push;
.scope S_0000000000f772c0;
T_4 ;
%wait E_0000000000f8ec50;
%load/vec4 v0000000000f956b0_0;
%pad/u 32;
%store/vec4 v0000000000ff24c0_0, 0, 32;
%load/vec4 v0000000000f95430_0;
%pad/u 32;
%store/vec4 v0000000000ff2060_0, 0, 32;
%load/vec4 v0000000000f954d0_0;
%parti/s 1, 15, 5;
%replicate 48;
%load/vec4 v0000000000f954d0_0;
%concat/vec4; draw_concat_vec4
%pad/u 32;
%store/vec4 v0000000000f95250_0, 0, 32;
%load/vec4 v0000000000f954d0_0;
%load/vec4 v0000000000f954d0_0;
%parti/s 1, 15, 5;
%replicate 16;
%concat/vec4; draw_concat_vec4
%store/vec4 v0000000000f95bb0_0, 0, 32;
%load/vec4 v0000000000f95b10_0;
%parti/s 1, 13, 5;
%replicate 50;
%load/vec4 v0000000000f95b10_0;
%concat/vec4; draw_concat_vec4
%pad/u 32;
%store/vec4 v0000000000f951b0_0, 0, 32;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 31, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v0000000000ff36e0_0;
%pad/u 32;
%pushi/vec4 0, 0, 32;
%cmp/ne;
%flag_get/vec4 4;
%and;
%flag_set/vec4 8;
%jmp/0xz T_4.0, 8;
%load/vec4 v0000000000ff36e0_0;
%dup/vec4;
%pushi/vec4 266, 0, 9;
%cmp/u;
%jmp/1 T_4.2, 6;
%dup/vec4;
%pushi/vec4 40, 0, 9;
%cmp/u;
%jmp/1 T_4.3, 6;
%jmp T_4.4;
T_4.2 ;
%load/vec4 v0000000000ff24c0_0;
%pad/s 64;
%load/vec4 v0000000000ff2060_0;
%pad/s 64;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.4;
T_4.3 ;
%load/vec4 v0000000000ff2060_0;
%pad/s 64;
%load/vec4 v0000000000ff24c0_0;
%pad/s 64;
%sub;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.4;
T_4.4 ;
%pop/vec4 1;
%jmp T_4.1;
T_4.0 ;
%load/vec4 v0000000000f95e30_0;
%cmpi/e 31, 0, 6;
%jmp/0xz T_4.5, 4;
%load/vec4 v0000000000ff3500_0;
%dup/vec4;
%pushi/vec4 28, 0, 10;
%cmp/u;
%jmp/1 T_4.7, 6;
%dup/vec4;
%pushi/vec4 986, 0, 10;
%cmp/u;
%jmp/1 T_4.8, 6;
%dup/vec4;
%pushi/vec4 476, 0, 10;
%cmp/u;
%jmp/1 T_4.9, 6;
%dup/vec4;
%pushi/vec4 444, 0, 10;
%cmp/u;
%jmp/1 T_4.10, 6;
%dup/vec4;
%pushi/vec4 316, 0, 10;
%cmp/u;
%jmp/1 T_4.11, 6;
%jmp T_4.12;
T_4.7 ;
%load/vec4 v0000000000f956b0_0;
%load/vec4 v0000000000f95430_0;
%and;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.12;
T_4.8 ;
%load/vec4 v0000000000f956b0_0;
%parti/s 1, 31, 6;
%replicate 32;
%load/vec4 v0000000000f956b0_0;
%parti/s 32, 0, 2;
%concat/vec4; draw_concat_vec4
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.12;
T_4.9 ;
%load/vec4 v0000000000f956b0_0;
%load/vec4 v0000000000f95430_0;
%and;
%inv;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.12;
T_4.10 ;
%load/vec4 v0000000000f956b0_0;
%load/vec4 v0000000000f95430_0;
%or;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.12;
T_4.11 ;
%load/vec4 v0000000000f956b0_0;
%load/vec4 v0000000000f95430_0;
%xor;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.12;
T_4.12 ;
%pop/vec4 1;
%jmp T_4.6;
T_4.5 ;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 14, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 15, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 28, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 24, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 26, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 32, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 36, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 37, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 40, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 42, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 44, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 34, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%load/vec4 v0000000000f95e30_0;
%pushi/vec4 38, 0, 6;
%cmp/e;
%flag_get/vec4 4;
%or;
%flag_set/vec4 8;
%jmp/0xz T_4.13, 8;
%load/vec4 v0000000000f95e30_0;
%dup/vec4;
%pushi/vec4 14, 0, 6;
%cmp/u;
%jmp/1 T_4.15, 6;
%dup/vec4;
%pushi/vec4 15, 0, 6;
%cmp/u;
%jmp/1 T_4.16, 6;
%dup/vec4;
%pushi/vec4 28, 0, 6;
%cmp/u;
%jmp/1 T_4.17, 6;
%dup/vec4;
%pushi/vec4 24, 0, 6;
%cmp/u;
%jmp/1 T_4.18, 6;
%dup/vec4;
%pushi/vec4 26, 0, 6;
%cmp/u;
%jmp/1 T_4.19, 6;
%dup/vec4;
%pushi/vec4 32, 0, 6;
%cmp/u;
%jmp/1 T_4.20, 6;
%dup/vec4;
%pushi/vec4 36, 0, 6;
%cmp/u;
%jmp/1 T_4.21, 6;
%dup/vec4;
%pushi/vec4 37, 0, 6;
%cmp/u;
%jmp/1 T_4.22, 6;
%dup/vec4;
%pushi/vec4 40, 0, 6;
%cmp/u;
%jmp/1 T_4.23, 6;
%dup/vec4;
%pushi/vec4 42, 0, 6;
%cmp/u;
%jmp/1 T_4.24, 6;
%dup/vec4;
%pushi/vec4 44, 0, 6;
%cmp/u;
%jmp/1 T_4.25, 6;
%dup/vec4;
%pushi/vec4 36, 0, 6;
%cmp/u;
%jmp/1 T_4.26, 6;
%dup/vec4;
%pushi/vec4 36, 0, 6;
%cmp/u;
%jmp/1 T_4.27, 6;
%jmp T_4.28;
T_4.15 ;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%load/vec4 v0000000000f956b0_0;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.16 ;
%load/vec4 v0000000000f95bb0_0;
%pad/u 64;
%load/vec4 v0000000000f956b0_0;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.17 ;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%load/vec4 v0000000000f956b0_0;
%and;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.18 ;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%load/vec4 v0000000000f956b0_0;
%or;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.19 ;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%load/vec4 v0000000000f956b0_0;
%xor;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.20 ;
%load/vec4 v0000000000ff24c0_0;
%pad/u 64;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.21 ;
%load/vec4 v0000000000ff24c0_0;
%pad/u 64;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.22 ;
%load/vec4 v0000000000ff24c0_0;
%pad/u 64;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.23 ;
%load/vec4 v0000000000ff24c0_0;
%pad/u 64;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.24 ;
%load/vec4 v0000000000ff24c0_0;
%pad/u 64;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.25 ;
%load/vec4 v0000000000ff24c0_0;
%pad/u 64;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.26 ;
%load/vec4 v0000000000ff24c0_0;
%pad/u 64;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.27 ;
%load/vec4 v0000000000ff24c0_0;
%pad/u 64;
%load/vec4 v0000000000f95250_0;
%pad/u 64;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.28;
T_4.28 ;
%pop/vec4 1;
%jmp T_4.14;
T_4.13 ;
%load/vec4 v0000000000f95e30_0;
%cmpi/e 18, 0, 6;
%jmp/0xz T_4.29, 4;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000f95070_0, 0, 1;
%jmp T_4.30;
T_4.29 ;
%load/vec4 v0000000000f95e30_0;
%cmpi/e 19, 0, 6;
%jmp/0xz T_4.31, 4;
%load/vec4 v0000000000f95c50_0;
%cmpi/e 0, 0, 1;
%jmp/0xz T_4.33, 4;
%load/vec4 v0000000000ff24c0_0;
%pad/s 64;
%load/vec4 v0000000000ff2060_0;
%pad/s 64;
%sub;
%store/vec4 v0000000000f95f70_0, 0, 64;
%load/vec4 v0000000000f95f70_0;
%cmpi/e 0, 0, 64;
%jmp/0xz T_4.35, 4;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000f95070_0, 0, 1;
%jmp T_4.36;
T_4.35 ;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000000000f95070_0, 0, 1;
T_4.36 ;
%jmp T_4.34;
T_4.33 ;
%load/vec4 v0000000000ff24c0_0;
%pad/s 64;
%load/vec4 v0000000000ff2060_0;
%pad/s 64;
%sub;
%store/vec4 v0000000000f95f70_0, 0, 64;
%load/vec4 v0000000000f95f70_0;
%cmpi/e 0, 0, 64;
%jmp/0xz T_4.37, 4;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000000000f95070_0, 0, 1;
%pushi/vec4 0, 0, 64;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.38;
T_4.37 ;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000000000f95070_0, 0, 1;
T_4.38 ;
T_4.34 ;
%jmp T_4.32;
T_4.31 ;
%load/vec4 v0000000000f95e30_0;
%cmpi/e 58, 0, 6;
%jmp/0xz T_4.39, 4;
%load/vec4 v0000000000ff24c0_0;
%pad/u 64;
%load/vec4 v0000000000f951b0_0;
%pad/u 64;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
%jmp T_4.40;
T_4.39 ;
%load/vec4 v0000000000f95e30_0;
%cmpi/e 62, 0, 6;
%jmp/0xz T_4.41, 4;
%load/vec4 v0000000000ff24c0_0;
%pad/u 64;
%load/vec4 v0000000000f951b0_0;
%pad/u 64;
%add;
%store/vec4 v0000000000f95f70_0, 0, 64;
T_4.41 ;
T_4.40 ;
T_4.32 ;
T_4.30 ;
T_4.14 ;
T_4.6 ;
T_4.1 ;
%jmp T_4;