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memory.pcf
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//! **************************************************************************
// Written by: Map J.40 on Tue Nov 27 17:54:14 2018
//! **************************************************************************
SCHEMATIC START;
COMP "lclk" LOCATE = SITE "E16" LEVEL 1;
COMP "ra0<10>" LOCATE = SITE "L5" LEVEL 1;
COMP "ra0<11>" LOCATE = SITE "L4" LEVEL 1;
COMP "ra0<12>" LOCATE = SITE "R11" LEVEL 1;
COMP "ra0<20>" LOCATE = SITE "M3" LEVEL 1;
COMP "ra0<13>" LOCATE = SITE "T11" LEVEL 1;
COMP "ra0<14>" LOCATE = SITE "K3" LEVEL 1;
COMP "ra0<15>" LOCATE = SITE "L3" LEVEL 1;
COMP "ra0<16>" LOCATE = SITE "K2" LEVEL 1;
COMP "ra0<17>" LOCATE = SITE "K1" LEVEL 1;
COMP "ra1<10>" LOCATE = SITE "A5" LEVEL 1;
COMP "ra0<18>" LOCATE = SITE "M6" LEVEL 1;
COMP "ra1<11>" LOCATE = SITE "B5" LEVEL 1;
COMP "ra0<19>" LOCATE = SITE "M5" LEVEL 1;
COMP "ra1<12>" LOCATE = SITE "J9" LEVEL 1;
COMP "ra1<20>" LOCATE = SITE "G7" LEVEL 1;
COMP "ra1<13>" LOCATE = SITE "K9" LEVEL 1;
COMP "ra1<14>" LOCATE = SITE "C13" LEVEL 1;
COMP "ra1<15>" LOCATE = SITE "C14" LEVEL 1;
COMP "ra1<16>" LOCATE = SITE "E6" LEVEL 1;
COMP "ra1<17>" LOCATE = SITE "F6" LEVEL 1;
COMP "ra2<10>" LOCATE = SITE "E28" LEVEL 1;
COMP "ra1<18>" LOCATE = SITE "C5" LEVEL 1;
COMP "ra2<11>" LOCATE = SITE "F28" LEVEL 1;
COMP "ra1<19>" LOCATE = SITE "D5" LEVEL 1;
COMP "ra2<12>" LOCATE = SITE "A31" LEVEL 1;
COMP "ra2<20>" LOCATE = SITE "F29" LEVEL 1;
COMP "ra2<13>" LOCATE = SITE "B31" LEVEL 1;
COMP "ra2<14>" LOCATE = SITE "B28" LEVEL 1;
COMP "ra2<15>" LOCATE = SITE "C28" LEVEL 1;
COMP "ra2<16>" LOCATE = SITE "D30" LEVEL 1;
COMP "ra2<17>" LOCATE = SITE "D31" LEVEL 1;
COMP "ra3<10>" LOCATE = SITE "AN8" LEVEL 1;
COMP "ra2<18>" LOCATE = SITE "G27" LEVEL 1;
COMP "ra3<11>" LOCATE = SITE "AM8" LEVEL 1;
COMP "ra2<19>" LOCATE = SITE "G28" LEVEL 1;
COMP "ra3<12>" LOCATE = SITE "AP7" LEVEL 1;
COMP "ra3<20>" LOCATE = SITE "AL9" LEVEL 1;
COMP "ra3<13>" LOCATE = SITE "AP6" LEVEL 1;
COMP "ra3<14>" LOCATE = SITE "AL11" LEVEL 1;
COMP "ra3<15>" LOCATE = SITE "AL10" LEVEL 1;
COMP "ra3<16>" LOCATE = SITE "AE11" LEVEL 1;
COMP "ra3<17>" LOCATE = SITE "AF11" LEVEL 1;
COMP "ra3<18>" LOCATE = SITE "AM12" LEVEL 1;
COMP "ra3<19>" LOCATE = SITE "AM11" LEVEL 1;
COMP "rd0<10>" LOCATE = SITE "F4" LEVEL 1;
COMP "rd0<11>" LOCATE = SITE "F3" LEVEL 1;
COMP "rd0<12>" LOCATE = SITE "C2" LEVEL 1;
COMP "rd0<20>" LOCATE = SITE "H5" LEVEL 1;
COMP "rd0<13>" LOCATE = SITE "D2" LEVEL 1;
COMP "rd0<21>" LOCATE = SITE "H4" LEVEL 1;
COMP "rd0<14>" LOCATE = SITE "D1" LEVEL 1;
COMP "rd0<22>" LOCATE = SITE "N10" LEVEL 1;
COMP "rd0<30>" LOCATE = SITE "K6" LEVEL 1;
COMP "rd0<15>" LOCATE = SITE "E1" LEVEL 1;
COMP "rd0<23>" LOCATE = SITE "N9" LEVEL 1;
COMP "rd0<31>" LOCATE = SITE "L6" LEVEL 1;
COMP "rd0<16>" LOCATE = SITE "E3" LEVEL 1;
COMP "rd0<24>" LOCATE = SITE "P12" LEVEL 1;
COMP "rd0<17>" LOCATE = SITE "E2" LEVEL 1;
COMP "rd0<25>" LOCATE = SITE "P11" LEVEL 1;
COMP "rd1<10>" LOCATE = SITE "F10" LEVEL 1;
COMP "rd0<18>" LOCATE = SITE "J6" LEVEL 1;
COMP "rd0<26>" LOCATE = SITE "G3" LEVEL 1;
COMP "rd1<11>" LOCATE = SITE "G10" LEVEL 1;
COMP "rd0<19>" LOCATE = SITE "J5" LEVEL 1;
COMP "rd0<27>" LOCATE = SITE "G2" LEVEL 1;
COMP "rd1<12>" LOCATE = SITE "D11" LEVEL 1;
COMP "rd1<20>" LOCATE = SITE "E11" LEVEL 1;
COMP "rd0<28>" LOCATE = SITE "L8" LEVEL 1;
COMP "rd1<13>" LOCATE = SITE "D10" LEVEL 1;
COMP "rd1<21>" LOCATE = SITE "F11" LEVEL 1;
COMP "rd0<29>" LOCATE = SITE "M8" LEVEL 1;
COMP "rd1<14>" LOCATE = SITE "H10" LEVEL 1;
COMP "rd1<22>" LOCATE = SITE "A6" LEVEL 1;
COMP "rd1<30>" LOCATE = SITE "F8" LEVEL 1;
COMP "rd1<15>" LOCATE = SITE "H9" LEVEL 1;
COMP "rd1<23>" LOCATE = SITE "B6" LEVEL 1;
COMP "rd1<31>" LOCATE = SITE "G8" LEVEL 1;
COMP "rd1<16>" LOCATE = SITE "B13" LEVEL 1;
COMP "rd1<24>" LOCATE = SITE "H12" LEVEL 1;
COMP "rd1<17>" LOCATE = SITE "B12" LEVEL 1;
COMP "rd1<25>" LOCATE = SITE "J11" LEVEL 1;
COMP "rd2<10>" LOCATE = SITE "F25" LEVEL 1;
COMP "rd1<18>" LOCATE = SITE "A8" LEVEL 1;
COMP "rd1<26>" LOCATE = SITE "B7" LEVEL 1;
COMP "rd2<11>" LOCATE = SITE "F26" LEVEL 1;
COMP "rd1<19>" LOCATE = SITE "B8" LEVEL 1;
COMP "rd1<27>" LOCATE = SITE "C7" LEVEL 1;
COMP "rd2<12>" LOCATE = SITE "D24" LEVEL 1;
COMP "rd2<20>" LOCATE = SITE "F24" LEVEL 1;
COMP "rd1<28>" LOCATE = SITE "A10" LEVEL 1;
COMP "rd2<13>" LOCATE = SITE "D25" LEVEL 1;
COMP "rd2<21>" LOCATE = SITE "E24" LEVEL 1;
COMP "rd1<29>" LOCATE = SITE "A9" LEVEL 1;
COMP "rd2<14>" LOCATE = SITE "B27" LEVEL 1;
COMP "rd2<22>" LOCATE = SITE "D27" LEVEL 1;
COMP "rd2<30>" LOCATE = SITE "J25" LEVEL 1;
COMP "rd2<15>" LOCATE = SITE "C27" LEVEL 1;
COMP "rd2<23>" LOCATE = SITE "E27" LEVEL 1;
COMP "rd2<31>" LOCATE = SITE "K26" LEVEL 1;
COMP "rd2<16>" LOCATE = SITE "F23" LEVEL 1;
COMP "rd2<24>" LOCATE = SITE "G23" LEVEL 1;
COMP "rd2<17>" LOCATE = SITE "E23" LEVEL 1;
COMP "rd2<25>" LOCATE = SITE "H24" LEVEL 1;
COMP "rd3<10>" LOCATE = SITE "AJ6" LEVEL 1;
COMP "rd2<18>" LOCATE = SITE "D26" LEVEL 1;
COMP "rd2<26>" LOCATE = SITE "A28" LEVEL 1;
COMP "rd3<11>" LOCATE = SITE "AJ5" LEVEL 1;
COMP "rd2<19>" LOCATE = SITE "E26" LEVEL 1;
COMP "rd2<27>" LOCATE = SITE "A29" LEVEL 1;
COMP "rd3<12>" LOCATE = SITE "AK7" LEVEL 1;
COMP "rd3<20>" LOCATE = SITE "AL8" LEVEL 1;
COMP "rd2<28>" LOCATE = SITE "B25" LEVEL 1;
COMP "rd3<13>" LOCATE = SITE "AJ7" LEVEL 1;
COMP "rd3<21>" LOCATE = SITE "AK8" LEVEL 1;
COMP "rd2<29>" LOCATE = SITE "C25" LEVEL 1;
COMP "rd3<14>" LOCATE = SITE "AN3" LEVEL 1;
COMP "rd3<22>" LOCATE = SITE "AH8" LEVEL 1;
COMP "rd3<30>" LOCATE = SITE "AP5" LEVEL 1;
COMP "rd3<15>" LOCATE = SITE "AN2" LEVEL 1;
COMP "rd3<23>" LOCATE = SITE "AH7" LEVEL 1;
COMP "rd3<31>" LOCATE = SITE "AN5" LEVEL 1;
COMP "rd3<16>" LOCATE = SITE "AK13" LEVEL 1;
COMP "rd3<24>" LOCATE = SITE "AM13" LEVEL 1;
COMP "rd3<17>" LOCATE = SITE "AL13" LEVEL 1;
COMP "rd3<25>" LOCATE = SITE "AN13" LEVEL 1;
COMP "rd3<18>" LOCATE = SITE "AL6" LEVEL 1;
COMP "rd3<26>" LOCATE = SITE "AM6" LEVEL 1;
COMP "rd3<19>" LOCATE = SITE "AK6" LEVEL 1;
COMP "rd3<27>" LOCATE = SITE "AM5" LEVEL 1;
COMP "rd3<28>" LOCATE = SITE "AJ10" LEVEL 1;
COMP "rd3<29>" LOCATE = SITE "AJ9" LEVEL 1;
COMP "la<2>" LOCATE = SITE "AC19" LEVEL 1;
COMP "la<3>" LOCATE = SITE "AB18" LEVEL 1;
COMP "la<4>" LOCATE = SITE "AD16" LEVEL 1;
COMP "la<5>" LOCATE = SITE "AN20" LEVEL 1;
COMP "la<6>" LOCATE = SITE "AP20" LEVEL 1;
COMP "la<7>" LOCATE = SITE "AD17" LEVEL 1;
COMP "la<8>" LOCATE = SITE "AC17" LEVEL 1;
COMP "la<9>" LOCATE = SITE "AM20" LEVEL 1;
COMP "ld<0>" LOCATE = SITE "AG20" LEVEL 1;
COMP "ld<1>" LOCATE = SITE "AE19" LEVEL 1;
COMP "ld<2>" LOCATE = SITE "AF15" LEVEL 1;
COMP "ld<3>" LOCATE = SITE "AG15" LEVEL 1;
COMP "ld<4>" LOCATE = SITE "AD21" LEVEL 1;
COMP "ld<5>" LOCATE = SITE "AD20" LEVEL 1;
COMP "ld<6>" LOCATE = SITE "AM15" LEVEL 1;
COMP "ld<7>" LOCATE = SITE "AM16" LEVEL 1;
COMP "ld<8>" LOCATE = SITE "L18" LEVEL 1;
COMP "ld<9>" LOCATE = SITE "L19" LEVEL 1;
COMP "la<10>" LOCATE = SITE "AL18" LEVEL 1;
COMP "la<11>" LOCATE = SITE "AM18" LEVEL 1;
COMP "la<12>" LOCATE = SITE "AM17" LEVEL 1;
COMP "la<20>" LOCATE = SITE "D19" LEVEL 1;
COMP "la<13>" LOCATE = SITE "AJ15" LEVEL 1;
COMP "la<21>" LOCATE = SITE "C17" LEVEL 1;
COMP "la<22>" LOCATE = SITE "D17" LEVEL 1;
COMP "la<30>" LOCATE = SITE "H20" LEVEL 1;
COMP "la<14>" LOCATE = SITE "AH14" LEVEL 1;
COMP "la<31>" LOCATE = SITE "F20" LEVEL 1;
COMP "la<15>" LOCATE = SITE "AD19" LEVEL 1;
COMP "la<23>" LOCATE = SITE "C19" LEVEL 1;
COMP "la<24>" LOCATE = SITE "C18" LEVEL 1;
COMP "la<16>" LOCATE = SITE "AL16" LEVEL 1;
COMP "la<25>" LOCATE = SITE "D16" LEVEL 1;
COMP "la<17>" LOCATE = SITE "AK16" LEVEL 1;
COMP "la<26>" LOCATE = SITE "C15" LEVEL 1;
COMP "la<18>" LOCATE = SITE "M17" LEVEL 1;
COMP "la<27>" LOCATE = SITE "C20" LEVEL 1;
COMP "la<19>" LOCATE = SITE "E19" LEVEL 1;
COMP "la<28>" LOCATE = SITE "B20" LEVEL 1;
COMP "la<29>" LOCATE = SITE "A20" LEVEL 1;
COMP "ld<10>" LOCATE = SITE "J15" LEVEL 1;
COMP "ld<11>" LOCATE = SITE "H15" LEVEL 1;
COMP "ld<12>" LOCATE = SITE "G21" LEVEL 1;
COMP "ld<20>" LOCATE = SITE "AH20" LEVEL 1;
COMP "ld<13>" LOCATE = SITE "J20" LEVEL 1;
COMP "ld<21>" LOCATE = SITE "AJ20" LEVEL 1;
COMP "ld<14>" LOCATE = SITE "F14" LEVEL 1;
COMP "ld<22>" LOCATE = SITE "AL15" LEVEL 1;
COMP "ld<30>" LOCATE = SITE "K16" LEVEL 1;
COMP "ld<15>" LOCATE = SITE "G15" LEVEL 1;
COMP "ld<23>" LOCATE = SITE "AJ14" LEVEL 1;
COMP "ld<31>" LOCATE = SITE "L16" LEVEL 1;
COMP "ld<16>" LOCATE = SITE "AL20" LEVEL 1;
COMP "ld<24>" LOCATE = SITE "M18" LEVEL 1;
COMP "ld<17>" LOCATE = SITE "AL19" LEVEL 1;
COMP "ld<25>" LOCATE = SITE "N17" LEVEL 1;
COMP "ld<18>" LOCATE = SITE "AB16" LEVEL 1;
COMP "ld<26>" LOCATE = SITE "M16" LEVEL 1;
COMP "ld<19>" LOCATE = SITE "AB17" LEVEL 1;
COMP "ld<27>" LOCATE = SITE "N15" LEVEL 1;
COMP "ld<28>" LOCATE = SITE "F21" LEVEL 1;
COMP "ld<29>" LOCATE = SITE "D20" LEVEL 1;
COMP "ra0<0>" LOCATE = SITE "F1" LEVEL 1;
COMP "ra0<1>" LOCATE = SITE "G1" LEVEL 1;
COMP "ra0<2>" LOCATE = SITE "J4" LEVEL 1;
COMP "ra0<3>" LOCATE = SITE "K4" LEVEL 1;
COMP "ra1<0>" LOCATE = SITE "A14" LEVEL 1;
COMP "ra0<4>" LOCATE = SITE "H3" LEVEL 1;
COMP "ra1<1>" LOCATE = SITE "A13" LEVEL 1;
COMP "ra0<5>" LOCATE = SITE "H2" LEVEL 1;
COMP "ra1<2>" LOCATE = SITE "D7" LEVEL 1;
COMP "ra0<6>" LOCATE = SITE "P10" LEVEL 1;
COMP "ra1<3>" LOCATE = SITE "D6" LEVEL 1;
COMP "ra0<7>" LOCATE = SITE "P9" LEVEL 1;
COMP "ra2<0>" LOCATE = SITE "C22" LEVEL 1;
COMP "ra1<4>" LOCATE = SITE "D9" LEVEL 1;
COMP "ra0<8>" LOCATE = SITE "M7" LEVEL 1;
COMP "ra2<1>" LOCATE = SITE "B22" LEVEL 1;
COMP "ra1<5>" LOCATE = SITE "E9" LEVEL 1;
COMP "ra0<9>" LOCATE = SITE "N7" LEVEL 1;
COMP "ra2<2>" LOCATE = SITE "A30" LEVEL 1;
COMP "ra1<6>" LOCATE = SITE "A4" LEVEL 1;
COMP "ra2<3>" LOCATE = SITE "B30" LEVEL 1;
COMP "ra1<7>" LOCATE = SITE "A3" LEVEL 1;
COMP "ra3<0>" LOCATE = SITE "AH12" LEVEL 1;
COMP "ra2<4>" LOCATE = SITE "K24" LEVEL 1;
COMP "ra1<8>" LOCATE = SITE "E13" LEVEL 1;
COMP "ra3<1>" LOCATE = SITE "AG11" LEVEL 1;
COMP "ra2<5>" LOCATE = SITE "J24" LEVEL 1;
COMP "ra1<9>" LOCATE = SITE "E12" LEVEL 1;
COMP "ra3<2>" LOCATE = SITE "AN7" LEVEL 1;
COMP "ra2<6>" LOCATE = SITE "C29" LEVEL 1;
COMP "ra3<3>" LOCATE = SITE "AM7" LEVEL 1;
COMP "ra2<7>" LOCATE = SITE "C30" LEVEL 1;
COMP "ra3<4>" LOCATE = SITE "AN10" LEVEL 1;
COMP "ra2<8>" LOCATE = SITE "B21" LEVEL 1;
COMP "rc0<0>" LOCATE = SITE "L1" LEVEL 1;
COMP "ra3<5>" LOCATE = SITE "AM10" LEVEL 1;
COMP "ra2<9>" LOCATE = SITE "A21" LEVEL 1;
COMP "rc0<1>" LOCATE = SITE "M2" LEVEL 1;
COMP "ra3<6>" LOCATE = SITE "AF10" LEVEL 1;
COMP "rc0<2>" LOCATE = SITE "M1" LEVEL 1;
COMP "ra3<7>" LOCATE = SITE "AE9" LEVEL 1;
COMP "rc0<3>" LOCATE = SITE "N5" LEVEL 1;
COMP "ra3<8>" LOCATE = SITE "AJ12" LEVEL 1;
COMP "rc1<0>" LOCATE = SITE "E14" LEVEL 1;
COMP "rc0<4>" LOCATE = SITE "P5" LEVEL 1;
COMP "ra3<9>" LOCATE = SITE "AK12" LEVEL 1;
COMP "rc1<1>" LOCATE = SITE "G6" LEVEL 1;
COMP "rc0<5>" LOCATE = SITE "T10" LEVEL 1;
COMP "rc1<2>" LOCATE = SITE "D14" LEVEL 1;
COMP "rc0<6>" LOCATE = SITE "P6" LEVEL 1;
COMP "rc1<3>" LOCATE = SITE "B3" LEVEL 1;
COMP "rc0<7>" LOCATE = SITE "P7" LEVEL 1;
COMP "rd0<0>" LOCATE = SITE "C4" LEVEL 1;
COMP "rc2<0>" LOCATE = SITE "D29" LEVEL 1;
COMP "rc1<4>" LOCATE = SITE "B2" LEVEL 1;
COMP "rd0<1>" LOCATE = SITE "C3" LEVEL 1;
COMP "rc2<1>" LOCATE = SITE "F30" LEVEL 1;
COMP "rc1<5>" LOCATE = SITE "K8" LEVEL 1;
COMP "rd0<2>" LOCATE = SITE "F5" LEVEL 1;
COMP "rc2<2>" LOCATE = SITE "E29" LEVEL 1;
COMP "rc1<6>" LOCATE = SITE "H7" LEVEL 1;
COMP "rd0<3>" LOCATE = SITE "G5" LEVEL 1;
COMP "rc2<3>" LOCATE = SITE "L25" LEVEL 1;
COMP "rc1<7>" LOCATE = SITE "H8" LEVEL 1;
COMP "rd1<0>" LOCATE = SITE "D12" LEVEL 1;
COMP "rd0<4>" LOCATE = SITE "D4" LEVEL 1;
COMP "rc3<0>" LOCATE = SITE "AP11" LEVEL 1;
COMP "rc2<4>" LOCATE = SITE "L26" LEVEL 1;
COMP "rd1<1>" LOCATE = SITE "C12" LEVEL 1;
COMP "rd0<5>" LOCATE = SITE "E4" LEVEL 1;
COMP "rc3<1>" LOCATE = SITE "AK9" LEVEL 1;
COMP "rc2<5>" LOCATE = SITE "E31" LEVEL 1;
COMP "rd1<2>" LOCATE = SITE "B10" LEVEL 1;
COMP "rd0<6>" LOCATE = SITE "M10" LEVEL 1;
COMP "rc3<2>" LOCATE = SITE "AP10" LEVEL 1;
COMP "rc2<6>" LOCATE = SITE "B33" LEVEL 1;
COMP "rd1<3>" LOCATE = SITE "C10" LEVEL 1;
COMP "rd0<7>" LOCATE = SITE "L9" LEVEL 1;
COMP "rc3<3>" LOCATE = SITE "AH10" LEVEL 1;
COMP "rc2<7>" LOCATE = SITE "B32" LEVEL 1;
COMP "rd2<0>" LOCATE = SITE "B23" LEVEL 1;
COMP "rd1<4>" LOCATE = SITE "A11" LEVEL 1;
COMP "rd0<8>" LOCATE = SITE "N13" LEVEL 1;
COMP "rc3<4>" LOCATE = SITE "AG10" LEVEL 1;
COMP "rd2<1>" LOCATE = SITE "A23" LEVEL 1;
COMP "rd1<5>" LOCATE = SITE "B11" LEVEL 1;
COMP "rd0<9>" LOCATE = SITE "N12" LEVEL 1;
COMP "rc3<5>" LOCATE = SITE "AP9" LEVEL 1;
COMP "rd2<2>" LOCATE = SITE "A26" LEVEL 1;
COMP "rd1<6>" LOCATE = SITE "C9" LEVEL 1;
COMP "rc3<6>" LOCATE = SITE "AP12" LEVEL 1;
COMP "rd2<3>" LOCATE = SITE "B26" LEVEL 1;
COMP "rd1<7>" LOCATE = SITE "C8" LEVEL 1;
COMP "rc3<7>" LOCATE = SITE "AN12" LEVEL 1;
COMP "rd3<0>" LOCATE = SITE "AL5" LEVEL 1;
COMP "rd2<4>" LOCATE = SITE "A24" LEVEL 1;
COMP "rd1<8>" LOCATE = SITE "G12" LEVEL 1;
COMP "rd3<1>" LOCATE = SITE "AL4" LEVEL 1;
COMP "rd2<5>" LOCATE = SITE "A25" LEVEL 1;
COMP "rd1<9>" LOCATE = SITE "G11" LEVEL 1;
COMP "rd3<2>" LOCATE = SITE "AK4" LEVEL 1;
COMP "rd2<6>" LOCATE = SITE "G25" LEVEL 1;
COMP "rd3<3>" LOCATE = SITE "AJ4" LEVEL 1;
COMP "rd2<7>" LOCATE = SITE "H25" LEVEL 1;
COMP "rd3<4>" LOCATE = SITE "AP4" LEVEL 1;
COMP "rd2<8>" LOCATE = SITE "C23" LEVEL 1;
COMP "rd3<5>" LOCATE = SITE "AN4" LEVEL 1;
COMP "rd2<9>" LOCATE = SITE "C24" LEVEL 1;
COMP "rd3<6>" LOCATE = SITE "AD10" LEVEL 1;
COMP "rd3<7>" LOCATE = SITE "AD9" LEVEL 1;
COMP "rd3<8>" LOCATE = SITE "AN14" LEVEL 1;
COMP "rd3<9>" LOCATE = SITE "AP14" LEVEL 1;
COMP "lbe_l<0>" LOCATE = SITE "AJ19" LEVEL 1;
COMP "lbe_l<1>" LOCATE = SITE "AK19" LEVEL 1;
COMP "lbe_l<2>" LOCATE = SITE "AJ17" LEVEL 1;
COMP "lbe_l<3>" LOCATE = SITE "AH17" LEVEL 1;
COMP "fholda" LOCATE = SITE "AG16" LEVEL 1;
COMP "lads_l" LOCATE = SITE "E17" LEVEL 1;
COMP "mclk_n" LOCATE = SITE "K17" LEVEL 1;
COMP "mclk_p" LOCATE = SITE "K18" LEVEL 1;
COMP "lblast_l" LOCATE = SITE "H18" LEVEL 1;
COMP "lwrite" LOCATE = SITE "H19" LEVEL 1;
COMP "lbterm_l" LOCATE = SITE "J17" LEVEL 1;
COMP "lready_l" LOCATE = SITE "H17" LEVEL 1;
COMP "refclk_n" LOCATE = SITE "G18" LEVEL 1;
COMP "refclk_p" LOCATE = SITE "F18" LEVEL 1;
COMP "lreset_l" LOCATE = SITE "A15" LEVEL 1;
COMP "ramclki<0>" LOCATE = SITE "AE17" LEVEL 1;
COMP "ramclki<1>" LOCATE = SITE "AG18" LEVEL 1;
COMP "ramclki<2>" LOCATE = SITE "G17" LEVEL 1;
COMP "ramclki<3>" LOCATE = SITE "AH19" LEVEL 1;
COMP "ramclko<0>" LOCATE = SITE "R9" LEVEL 1;
COMP "ramclko<1>" LOCATE = SITE "J7" LEVEL 1;
COMP "ramclko<2>" LOCATE = SITE "F31" LEVEL 1;
COMP "ramclko<3>" LOCATE = SITE "AN9" LEVEL 1;
COMP
"memory_main_0/memory_banks_0/memclk_0/dll_ramclk0/STANDBY_INST/DCM_ADV_INST"
LOCATE = SITE "DCM_ADV_X0Y0" LEVEL 1;
COMP "lclk_dcm_0/dll_lclk/STANDBY_INST/DCM_ADV_INST" LOCATE = SITE
"DCM_ADV_X0Y7" LEVEL 1;
COMP
"memory_main_0/memory_banks_0/memclk_0/dll_memclk/STANDBY_INST/DCM_ADV_INST"
LOCATE = SITE "DCM_ADV_X0Y6" LEVEL 1;
TIMEGRP LCLK_FFS = BEL "memory_main_0/memstat_reg_3" BEL
"memory_main_0/memstat_reg_2" BEL "memory_main_0/memstat_reg_1" BEL
"memory_main_0/memstat_reg_0" BEL "memory_main_0/status_reg_17" BEL
"memory_main_0/status_reg_16" BEL "memory_main_0/status_reg_9" BEL
"memory_main_0/status_reg_8" BEL "memory_main_0/spd_reg_31" BEL
"memory_main_0/spd_reg_19" BEL "memory_main_0/spd_reg_18" BEL
"memory_main_0/spd_reg_23" BEL "memory_main_0/spd_reg_17" BEL
"memory_main_0/spd_reg_22" BEL "memory_main_0/spd_reg_16" BEL
"memory_main_0/spd_reg_21" BEL "memory_main_0/spd_reg_20" BEL
"memory_main_0/memctl_reg_0" BEL "memory_main_0/mode_reg_499" BEL
"memory_main_0/mode_reg_498" BEL "memory_main_0/mode_reg_497" BEL
"memory_main_0/mode_reg_496" BEL "memory_main_0/mode_reg_489" BEL
"memory_main_0/mode_reg_495" BEL "memory_main_0/mode_reg_494" BEL
"memory_main_0/mode_reg_488" BEL "memory_main_0/mode_reg_493" BEL
"memory_main_0/mode_reg_487" BEL "memory_main_0/mode_reg_492" BEL
"memory_main_0/mode_reg_486" BEL "memory_main_0/mode_reg_491" BEL
"memory_main_0/mode_reg_485" BEL "memory_main_0/mode_reg_490" BEL
"memory_main_0/mode_reg_479" BEL "memory_main_0/mode_reg_484" BEL
"memory_main_0/mode_reg_483" BEL "memory_main_0/mode_reg_477" BEL
"memory_main_0/mode_reg_478" BEL "memory_main_0/mode_reg_482" BEL
"memory_main_0/mode_reg_476" BEL "memory_main_0/mode_reg_481" BEL
"memory_main_0/mode_reg_475" BEL "memory_main_0/mode_reg_480" BEL
"memory_main_0/mode_reg_469" BEL "memory_main_0/mode_reg_474" BEL
"memory_main_0/mode_reg_468" BEL "memory_main_0/mode_reg_473" BEL
"memory_main_0/mode_reg_467" BEL "memory_main_0/mode_reg_472" BEL
"memory_main_0/mode_reg_466" BEL "memory_main_0/mode_reg_471" BEL
"memory_main_0/mode_reg_465" BEL "memory_main_0/mode_reg_470" BEL
"memory_main_0/mode_reg_459" BEL "memory_main_0/mode_reg_464" BEL
"memory_main_0/mode_reg_509" BEL "memory_main_0/mode_reg_458" BEL
"memory_main_0/mode_reg_463" BEL "memory_main_0/mode_reg_508" BEL
"memory_main_0/mode_reg_457" BEL "memory_main_0/mode_reg_462" BEL
"memory_main_0/mode_reg_507" BEL "memory_main_0/mode_reg_456" BEL
"memory_main_0/mode_reg_461" BEL "memory_main_0/mode_reg_511" BEL
"memory_main_0/mode_reg_506" BEL "memory_main_0/mode_reg_455" BEL
"memory_main_0/mode_reg_460" BEL "memory_main_0/mode_reg_505" BEL
"memory_main_0/mode_reg_510" BEL "memory_main_0/mode_reg_399" BEL
"memory_main_0/mode_reg_449" BEL "memory_main_0/mode_reg_454" BEL
"memory_main_0/mode_reg_504" BEL "memory_main_0/mode_reg_398" BEL
"memory_main_0/mode_reg_448" BEL "memory_main_0/mode_reg_453" BEL
"memory_main_0/mode_reg_503" BEL "memory_main_0/mode_reg_397" BEL
"memory_main_0/mode_reg_447" BEL "memory_main_0/mode_reg_452" BEL
"memory_main_0/mode_reg_502" BEL "memory_main_0/mode_reg_396" BEL
"memory_main_0/mode_reg_446" BEL "memory_main_0/mode_reg_451" BEL
"memory_main_0/mode_reg_501" BEL "memory_main_0/mode_reg_395" BEL
"memory_main_0/mode_reg_445" BEL "memory_main_0/mode_reg_450" BEL
"memory_main_0/mode_reg_500" BEL "memory_main_0/mode_reg_389" BEL
"memory_main_0/mode_reg_394" BEL "memory_main_0/mode_reg_439" BEL
"memory_main_0/mode_reg_444" BEL "memory_main_0/mode_reg_388" BEL
"memory_main_0/mode_reg_393" BEL "memory_main_0/mode_reg_438" BEL
"memory_main_0/mode_reg_443" BEL "memory_main_0/mode_reg_387" BEL
"memory_main_0/mode_reg_392" BEL "memory_main_0/mode_reg_437" BEL
"memory_main_0/mode_reg_442" BEL "memory_main_0/mode_reg_386" BEL
"memory_main_0/mode_reg_391" BEL "memory_main_0/mode_reg_441" BEL
"memory_main_0/mode_reg_436" BEL "memory_main_0/mode_reg_385" BEL
"memory_main_0/mode_reg_390" BEL "memory_main_0/mode_reg_435" BEL
"memory_main_0/mode_reg_440" BEL "memory_main_0/mode_reg_379" BEL
"memory_main_0/mode_reg_429" BEL "memory_main_0/mode_reg_434" BEL
"memory_main_0/mode_reg_384" BEL "memory_main_0/mode_reg_378" BEL
"memory_main_0/mode_reg_383" BEL "memory_main_0/mode_reg_428" BEL
"memory_main_0/mode_reg_433" BEL "memory_main_0/mode_reg_377" BEL
"memory_main_0/mode_reg_382" BEL "memory_main_0/mode_reg_427" BEL
"memory_main_0/mode_reg_432" BEL "memory_main_0/mode_reg_376" BEL
"memory_main_0/mode_reg_381" BEL "memory_main_0/mode_reg_426" BEL
"memory_main_0/mode_reg_431" BEL "memory_main_0/mode_reg_380" BEL
"memory_main_0/mode_reg_425" BEL "memory_main_0/mode_reg_375" BEL
"memory_main_0/mode_reg_430" BEL "memory_main_0/mode_reg_374" BEL
"memory_main_0/mode_reg_419" BEL "memory_main_0/mode_reg_424" BEL
"memory_main_0/mode_reg_369" BEL "memory_main_0/mode_reg_373" BEL
"memory_main_0/mode_reg_418" BEL "memory_main_0/mode_reg_423" BEL
"memory_main_0/mode_reg_368" BEL "memory_main_0/mode_reg_372" BEL
"memory_main_0/mode_reg_417" BEL "memory_main_0/mode_reg_422" BEL
"memory_main_0/mode_reg_367" BEL "memory_main_0/mode_reg_371" BEL
"memory_main_0/mode_reg_416" BEL "memory_main_0/mode_reg_421" BEL
"memory_main_0/mode_reg_366" BEL "memory_main_0/mode_reg_415" BEL
"memory_main_0/mode_reg_420" BEL "memory_main_0/mode_reg_370" BEL
"memory_main_0/mode_reg_365" BEL "memory_main_0/mode_reg_409" BEL
"memory_main_0/mode_reg_414" BEL "memory_main_0/mode_reg_364" BEL
"memory_main_0/mode_reg_359" BEL "memory_main_0/mode_reg_408" BEL
"memory_main_0/mode_reg_413" BEL "memory_main_0/mode_reg_363" BEL
"memory_main_0/mode_reg_358" BEL "memory_main_0/mode_reg_407" BEL
"memory_main_0/mode_reg_412" BEL "memory_main_0/mode_reg_362" BEL
"memory_main_0/mode_reg_357" BEL "memory_main_0/mode_reg_99" BEL
"memory_main_0/mode_reg_406" BEL "memory_main_0/mode_reg_411" BEL
"memory_main_0/mode_reg_361" BEL "memory_main_0/mode_reg_356" BEL
"memory_main_0/mode_reg_98" BEL "memory_main_0/mode_reg_405" BEL
"memory_main_0/mode_reg_410" BEL "memory_main_0/mode_reg_360" BEL
"memory_main_0/mode_reg_355" BEL "memory_main_0/mode_reg_97" BEL
"memory_main_0/mode_reg_404" BEL "memory_main_0/mode_reg_354" BEL
"memory_main_0/mode_reg_349" BEL "memory_main_0/mode_reg_299" BEL
"memory_main_0/mode_reg_96" BEL "memory_main_0/mode_reg_403" BEL
"memory_main_0/mode_reg_353" BEL "memory_main_0/mode_reg_348" BEL
"memory_main_0/mode_reg_298" BEL "memory_main_0/mode_reg_95" BEL
"memory_main_0/mode_reg_402" BEL "memory_main_0/mode_reg_352" BEL
"memory_main_0/mode_reg_347" BEL "memory_main_0/mode_reg_297" BEL
"memory_main_0/mode_reg_89" BEL "memory_main_0/mode_reg_94" BEL
"memory_main_0/mode_reg_401" BEL "memory_main_0/mode_reg_351" BEL
"memory_main_0/mode_reg_346" BEL "memory_main_0/mode_reg_296" BEL
"memory_main_0/mode_reg_88" BEL "memory_main_0/mode_reg_400" BEL
"memory_main_0/mode_reg_350" BEL "memory_main_0/mode_reg_93" BEL
"memory_main_0/mode_reg_345" BEL "memory_main_0/mode_reg_295" BEL
"memory_main_0/mode_reg_87" BEL "memory_main_0/mode_reg_92" BEL
"memory_main_0/mode_reg_344" BEL "memory_main_0/mode_reg_339" BEL
"memory_main_0/mode_reg_294" BEL "memory_main_0/mode_reg_289" BEL
"memory_main_0/mode_reg_91" BEL "memory_main_0/mode_reg_343" BEL
"memory_main_0/mode_reg_86" BEL "memory_main_0/mode_reg_338" BEL
"memory_main_0/mode_reg_293" BEL "memory_main_0/mode_reg_288" BEL
"memory_main_0/mode_reg_85" BEL "memory_main_0/mode_reg_90" BEL
"memory_main_0/mode_reg_342" BEL "memory_main_0/mode_reg_337" BEL
"memory_main_0/mode_reg_292" BEL "memory_main_0/mode_reg_287" BEL
"memory_main_0/mode_reg_79" BEL "memory_main_0/mode_reg_84" BEL
"memory_main_0/mode_reg_341" BEL "memory_main_0/mode_reg_336" BEL
"memory_main_0/mode_reg_291" BEL "memory_main_0/mode_reg_286" BEL
"memory_main_0/mode_reg_78" BEL "memory_main_0/mode_reg_83" BEL
"memory_main_0/mode_reg_340" BEL "memory_main_0/mode_reg_335" BEL
"memory_main_0/mode_reg_290" BEL "memory_main_0/mode_reg_285" BEL
"memory_main_0/mode_reg_77" BEL "memory_main_0/mode_reg_82" BEL
"memory_main_0/mode_reg_334" BEL "memory_main_0/mode_reg_329" BEL
"memory_main_0/mode_reg_284" BEL "memory_main_0/mode_reg_279" BEL
"memory_main_0/mode_reg_76" BEL "memory_main_0/mode_reg_81" BEL
"memory_main_0/mode_reg_333" BEL "memory_main_0/mode_reg_328" BEL
"memory_main_0/mode_reg_278" BEL "memory_main_0/mode_reg_283" BEL
"memory_main_0/mode_reg_75" BEL "memory_main_0/mode_reg_80" BEL
"memory_main_0/mode_reg_332" BEL "memory_main_0/mode_reg_327" BEL
"memory_main_0/mode_reg_282" BEL "memory_main_0/mode_reg_277" BEL
"memory_main_0/mode_reg_69" BEL "memory_main_0/mode_reg_74" BEL
"memory_main_0/mode_reg_331" BEL "memory_main_0/mode_reg_326" BEL
"memory_main_0/mode_reg_281" BEL "memory_main_0/mode_reg_276" BEL
"memory_main_0/mode_reg_68" BEL "memory_main_0/mode_reg_73" BEL
"memory_main_0/mode_reg_330" BEL "memory_main_0/mode_reg_325" BEL
"memory_main_0/mode_reg_280" BEL "memory_main_0/mode_reg_275" BEL
"memory_main_0/mode_reg_67" BEL "memory_main_0/mode_reg_72" BEL
"memory_main_0/mode_reg_324" BEL "memory_main_0/mode_reg_319" BEL
"memory_main_0/mode_reg_274" BEL "memory_main_0/mode_reg_269" BEL
"memory_main_0/mode_reg_66" BEL "memory_main_0/mode_reg_71" BEL
"memory_main_0/mode_reg_323" BEL "memory_main_0/mode_reg_318" BEL
"memory_main_0/mode_reg_273" BEL "memory_main_0/mode_reg_268" BEL
"memory_main_0/mode_reg_65" BEL "memory_main_0/mode_reg_70" BEL
"memory_main_0/mode_reg_322" BEL "memory_main_0/mode_reg_317" BEL
"memory_main_0/mode_reg_272" BEL "memory_main_0/mode_reg_267" BEL
"memory_main_0/mode_reg_59" BEL "memory_main_0/mode_reg_64" BEL
"memory_main_0/mode_reg_321" BEL "memory_main_0/mode_reg_316" BEL
"memory_main_0/mode_reg_271" BEL "memory_main_0/mode_reg_266" BEL
"memory_main_0/mode_reg_58" BEL "memory_main_0/mode_reg_63" BEL
"memory_main_0/mode_reg_320" BEL "memory_main_0/mode_reg_315" BEL
"memory_main_0/mode_reg_270" BEL "memory_main_0/mode_reg_265" BEL
"memory_main_0/mode_reg_57" BEL "memory_main_0/mode_reg_62" BEL
"memory_main_0/mode_reg_314" BEL "memory_main_0/mode_reg_309" BEL
"memory_main_0/mode_reg_264" BEL "memory_main_0/mode_reg_259" BEL
"memory_main_0/mode_reg_56" BEL "memory_main_0/mode_reg_61" BEL
"memory_main_0/mode_reg_313" BEL "memory_main_0/mode_reg_308" BEL
"memory_main_0/mode_reg_263" BEL "memory_main_0/mode_reg_258" BEL
"memory_main_0/mode_reg_55" BEL "memory_main_0/mode_reg_60" BEL
"memory_main_0/mode_reg_312" BEL "memory_main_0/mode_reg_307" BEL
"memory_main_0/mode_reg_262" BEL "memory_main_0/mode_reg_257" BEL
"memory_main_0/mode_reg_49" BEL "memory_main_0/mode_reg_54" BEL
"memory_main_0/mode_reg_311" BEL "memory_main_0/mode_reg_306" BEL
"memory_main_0/mode_reg_261" BEL "memory_main_0/mode_reg_256" BEL
"memory_main_0/mode_reg_53" BEL "memory_main_0/mode_reg_48" BEL
"memory_main_0/mode_reg_310" BEL "memory_main_0/mode_reg_305" BEL
"memory_main_0/mode_reg_260" BEL "memory_main_0/mode_reg_255" BEL
"memory_main_0/mode_reg_47" BEL "memory_main_0/mode_reg_52" BEL
"memory_main_0/mode_reg_304" BEL "memory_main_0/mode_reg_254" BEL
"memory_main_0/mode_reg_199" BEL "memory_main_0/mode_reg_249" BEL
"memory_main_0/mode_reg_46" BEL "memory_main_0/mode_reg_51" BEL
"memory_main_0/mode_reg_303" BEL "memory_main_0/mode_reg_253" BEL
"memory_main_0/mode_reg_248" BEL "memory_main_0/mode_reg_198" BEL
"memory_main_0/mode_reg_45" BEL "memory_main_0/mode_reg_50" BEL
"memory_main_0/mode_reg_302" BEL "memory_main_0/mode_reg_252" BEL
"memory_main_0/mode_reg_247" BEL "memory_main_0/mode_reg_197" BEL
"memory_main_0/mode_reg_39" BEL "memory_main_0/mode_reg_44" BEL
"memory_main_0/mode_reg_301" BEL "memory_main_0/mode_reg_251" BEL
"memory_main_0/mode_reg_246" BEL "memory_main_0/mode_reg_196" BEL
"memory_main_0/mode_reg_38" BEL "memory_main_0/mode_reg_43" BEL
"memory_main_0/mode_reg_300" BEL "memory_main_0/mode_reg_250" BEL
"memory_main_0/mode_reg_245" BEL "memory_main_0/mode_reg_195" BEL
"memory_main_0/mode_reg_37" BEL "memory_main_0/mode_reg_42" BEL
"memory_main_0/mode_reg_244" BEL "memory_main_0/mode_reg_239" BEL
"memory_main_0/mode_reg_194" BEL "memory_main_0/mode_reg_189" BEL
"memory_main_0/mode_reg_41" BEL "memory_main_0/mode_reg_36" BEL
"memory_main_0/mode_reg_243" BEL "memory_main_0/mode_reg_238" BEL
"memory_main_0/mode_reg_193" BEL "memory_main_0/mode_reg_188" BEL
"memory_main_0/mode_reg_35" BEL "memory_main_0/mode_reg_40" BEL
"memory_main_0/mode_reg_242" BEL "memory_main_0/mode_reg_237" BEL
"memory_main_0/mode_reg_192" BEL "memory_main_0/mode_reg_29" BEL
"memory_main_0/mode_reg_34" BEL "memory_main_0/mode_reg_187" BEL
"memory_main_0/mode_reg_241" BEL "memory_main_0/mode_reg_236" BEL
"memory_main_0/mode_reg_191" BEL "memory_main_0/mode_reg_186" BEL
"memory_main_0/mode_reg_28" BEL "memory_main_0/mode_reg_33" BEL
"memory_main_0/mode_reg_235" BEL "memory_main_0/mode_reg_190" BEL
"memory_main_0/mode_reg_240" BEL "memory_main_0/mode_reg_185" BEL
"memory_main_0/mode_reg_27" BEL "memory_main_0/mode_reg_32" BEL
"memory_main_0/mode_reg_234" BEL "memory_main_0/mode_reg_229" BEL
"memory_main_0/mode_reg_184" BEL "memory_main_0/mode_reg_179" BEL
"memory_main_0/mode_reg_26" BEL "memory_main_0/mode_reg_31" BEL
"memory_main_0/mode_reg_233" BEL "memory_main_0/mode_reg_228" BEL
"memory_main_0/mode_reg_183" BEL "memory_main_0/mode_reg_178" BEL
"memory_main_0/mode_reg_25" BEL "memory_main_0/mode_reg_30" BEL
"memory_main_0/mode_reg_232" BEL "memory_main_0/mode_reg_227" BEL
"memory_main_0/mode_reg_182" BEL "memory_main_0/mode_reg_177" BEL
"memory_main_0/mode_reg_19" BEL "memory_main_0/mode_reg_24" BEL
"memory_main_0/mode_reg_231" BEL "memory_main_0/mode_reg_226" BEL
"memory_main_0/mode_reg_181" BEL "memory_main_0/mode_reg_176" BEL
"memory_main_0/mode_reg_18" BEL "memory_main_0/mode_reg_23" BEL
"memory_main_0/mode_reg_230" BEL "memory_main_0/mode_reg_225" BEL
"memory_main_0/mode_reg_180" BEL "memory_main_0/mode_reg_175" BEL
"memory_main_0/mode_reg_17" BEL "memory_main_0/mode_reg_22" BEL
"memory_main_0/mode_reg_169" BEL "memory_main_0/mode_reg_174" BEL
"memory_main_0/mode_reg_224" BEL "memory_main_0/mode_reg_219" BEL
"memory_main_0/mode_reg_16" BEL "memory_main_0/mode_reg_21" BEL
"memory_main_0/mode_reg_168" BEL "memory_main_0/mode_reg_173" BEL
"memory_main_0/mode_reg_223" BEL "memory_main_0/mode_reg_218" BEL
"memory_main_0/mode_reg_15" BEL "memory_main_0/mode_reg_20" BEL
"memory_main_0/mode_reg_167" BEL "memory_main_0/mode_reg_172" BEL
"memory_main_0/mode_reg_222" BEL "memory_main_0/mode_reg_217" BEL
"memory_main_0/mode_reg_14" BEL "memory_main_0/mode_reg_166" BEL
"memory_main_0/mode_reg_171" BEL "memory_main_0/mode_reg_221" BEL
"memory_main_0/mode_reg_216" BEL "memory_main_0/mode_reg_13" BEL
"memory_main_0/mode_reg_165" BEL "memory_main_0/mode_reg_170" BEL
"memory_main_0/mode_reg_220" BEL "memory_main_0/mode_reg_215" BEL
"memory_main_0/mode_reg_12" BEL "memory_main_0/mode_reg_159" BEL
"memory_main_0/mode_reg_164" BEL "memory_main_0/mode_reg_214" BEL
"memory_main_0/mode_reg_209" BEL "memory_main_0/mode_reg_11" BEL
"memory_main_0/mode_reg_158" BEL "memory_main_0/mode_reg_163" BEL
"memory_main_0/mode_reg_213" BEL "memory_main_0/mode_reg_208" BEL
"memory_main_0/mode_reg_10" BEL "memory_main_0/mode_reg_157" BEL
"memory_main_0/mode_reg_162" BEL "memory_main_0/mode_reg_212" BEL
"memory_main_0/mode_reg_207" BEL "memory_main_0/mode_reg_156" BEL
"memory_main_0/mode_reg_161" BEL "memory_main_0/mode_reg_211" BEL
"memory_main_0/mode_reg_206" BEL "memory_main_0/mode_reg_155" BEL
"memory_main_0/mode_reg_210" BEL "memory_main_0/mode_reg_205" BEL
"memory_main_0/mode_reg_160" BEL "memory_main_0/mode_reg_149" BEL
"memory_main_0/mode_reg_154" BEL "memory_main_0/mode_reg_204" BEL
"memory_main_0/mode_reg_148" BEL "memory_main_0/mode_reg_153" BEL
"memory_main_0/mode_reg_203" BEL "memory_main_0/mode_reg_147" BEL
"memory_main_0/mode_reg_152" BEL "memory_main_0/mode_reg_202" BEL
"memory_main_0/mode_reg_146" BEL "memory_main_0/mode_reg_151" BEL
"memory_main_0/mode_reg_201" BEL "memory_main_0/mode_reg_145" BEL
"memory_main_0/mode_reg_150" BEL "memory_main_0/mode_reg_200" BEL
"memory_main_0/mode_reg_139" BEL "memory_main_0/mode_reg_144" BEL
"memory_main_0/mode_reg_138" BEL "memory_main_0/mode_reg_143" BEL
"memory_main_0/mode_reg_137" BEL "memory_main_0/mode_reg_142" BEL
"memory_main_0/mode_reg_136" BEL "memory_main_0/mode_reg_141" BEL
"memory_main_0/mode_reg_135" BEL "memory_main_0/mode_reg_129" BEL
"memory_main_0/mode_reg_134" BEL "memory_main_0/mode_reg_140" BEL
"memory_main_0/mode_reg_128" BEL "memory_main_0/mode_reg_133" BEL
"memory_main_0/mode_reg_127" BEL "memory_main_0/mode_reg_132" BEL
"memory_main_0/mode_reg_126" BEL "memory_main_0/mode_reg_131" BEL
"memory_main_0/mode_reg_125" BEL "memory_main_0/mode_reg_130" BEL
"memory_main_0/mode_reg_119" BEL "memory_main_0/mode_reg_124" BEL
"memory_main_0/mode_reg_118" BEL "memory_main_0/mode_reg_123" BEL
"memory_main_0/mode_reg_117" BEL "memory_main_0/mode_reg_122" BEL
"memory_main_0/mode_reg_116" BEL "memory_main_0/mode_reg_121" BEL
"memory_main_0/mode_reg_115" BEL "memory_main_0/mode_reg_120" BEL
"memory_main_0/mode_reg_109" BEL "memory_main_0/mode_reg_114" BEL
"memory_main_0/mode_reg_108" BEL "memory_main_0/mode_reg_113" BEL
"memory_main_0/mode_reg_107" BEL "memory_main_0/mode_reg_112" BEL
"memory_main_0/mode_reg_106" BEL "memory_main_0/mode_reg_111" BEL
"memory_main_0/mode_reg_105" BEL "memory_main_0/mode_reg_110" BEL
"memory_main_0/mode_reg_104" BEL "memory_main_0/mode_reg_103" BEL
"memory_main_0/mode_reg_102" BEL "memory_main_0/mode_reg_101" BEL
"memory_main_0/mode_reg_100" BEL "memory_main_0/page_reg_9" BEL
"memory_main_0/page_reg_8" BEL "memory_main_0/page_reg_7" BEL
"memory_main_0/page_reg_6" BEL "memory_main_0/page_reg_5" BEL
"memory_main_0/page_reg_4" BEL "memory_main_0/page_reg_3" BEL
"memory_main_0/page_reg_2" BEL "memory_main_0/page_reg_1" BEL
"memory_main_0/page_reg_0" BEL "memory_main_0/bank_reg_3" BEL
"memory_main_0/bank_reg_2" BEL "memory_main_0/bank_reg_1" BEL
"memory_main_0/bank_reg_0" BEL "memory_main_0/user_reg_in_31" BEL
"memory_main_0/user_reg_in_30" BEL "memory_main_0/user_reg_in_29" BEL
"memory_main_0/user_reg_in_28" BEL "memory_main_0/user_reg_in_27" BEL
"memory_main_0/user_reg_in_26" BEL "memory_main_0/user_reg_in_25" BEL
"memory_main_0/user_reg_in_24" BEL "memory_main_0/user_reg_in_23" BEL
"memory_main_0/user_reg_in_22" BEL "memory_main_0/user_reg_in_21" BEL
"memory_main_0/user_reg_in_20" BEL "memory_main_0/user_reg_in_19" BEL
"memory_main_0/user_reg_in_18" BEL "memory_main_0/user_reg_in_17" BEL
"memory_main_0/user_reg_in_16" BEL "memory_main_0/user_reg_in_15" BEL
"memory_main_0/user_reg_in_14" BEL "memory_main_0/user_reg_in_13" BEL
"memory_main_0/user_reg_in_12" BEL "memory_main_0/user_reg_in_11" BEL
"memory_main_0/user_reg_in_10" BEL "memory_main_0/user_reg_in_9" BEL
"memory_main_0/user_reg_in_8" BEL "memory_main_0/user_reg_in_7" BEL
"memory_main_0/user_reg_in_6" BEL "memory_main_0/user_reg_in_5" BEL
"memory_main_0/user_reg_in_4" BEL "memory_main_0/user_reg_in_3" BEL
"memory_main_0/user_reg_in_2" BEL "memory_main_0/user_reg_in_1" BEL
"memory_main_0/user_reg_in_0" BEL "memory_main_0/spd_reg_27" BEL
"memory_main_0/spd_reg_26" BEL "memory_main_0/spd_reg_25" BEL
"memory_main_0/spd_reg_7" BEL "memory_main_0/spd_reg_6" BEL
"memory_main_0/spd_reg_5" BEL "memory_main_0/page_reg_12" BEL
"memory_main_0/spd_reg_4" BEL "memory_main_0/page_reg_11" BEL
"memory_main_0/spd_reg_3" BEL "memory_main_0/page_reg_10" BEL
"memory_main_0/spd_reg_2" BEL "memory_main_0/mode_reg_9" BEL
"memory_main_0/spd_reg_1" BEL "memory_main_0/mode_reg_8" BEL
"memory_main_0/spd_reg_0" BEL "memory_main_0/mode_reg_7" BEL
"memory_main_0/mode_reg_6" BEL "memory_main_0/mode_reg_5" BEL
"memory_main_0/mode_reg_4" BEL "memory_main_0/mode_reg_3" BEL
"memory_main_0/mode_reg_2" BEL "memory_main_0/mode_reg_1" BEL
"memory_main_0/mode_reg_0" BEL "memory_main_0/sel_spd_reg" BEL
"memory_main_0/wr_spd_reg" BEL "memory_main_0/wr_page_reg" BEL
"memory_main_0/ld_iq_31" BEL "memory_main_0/ld_iq_30" BEL
"memory_main_0/ld_iq_29" BEL "memory_main_0/ld_iq_28" BEL
"memory_main_0/ld_iq_27" BEL "memory_main_0/ld_iq_26" BEL
"memory_main_0/ld_iq_25" BEL "memory_main_0/ld_iq_24" BEL
"memory_main_0/ld_iq_23" BEL "memory_main_0/ld_iq_22" BEL
"memory_main_0/ld_iq_21" BEL "memory_main_0/ld_iq_20" BEL
"memory_main_0/ld_iq_19" BEL "memory_main_0/ld_iq_18" BEL
"memory_main_0/ld_iq_17" BEL "memory_main_0/ld_iq_16" BEL
"memory_main_0/ld_iq_15" BEL "memory_main_0/ld_iq_14" BEL
"memory_main_0/ld_iq_13" BEL "memory_main_0/ld_iq_12" BEL
"memory_main_0/ld_iq_11" BEL "memory_main_0/ld_iq_10" BEL
"memory_main_0/ld_iq_9" BEL "memory_main_0/ld_iq_8" BEL
"memory_main_0/ld_iq_7" BEL "memory_main_0/ld_iq_6" BEL
"memory_main_0/ld_iq_5" BEL "memory_main_0/ld_iq_4" BEL
"memory_main_0/ld_iq_3" BEL "memory_main_0/ld_iq_2" BEL
"memory_main_0/ld_iq_1" BEL "memory_main_0/ld_iq_0" BEL
"memory_main_0/wr_status_reg" BEL "memory_main_0/read_spd" BEL
"memory_main_0/sel_page_reg" BEL "memory_main_0/la_q_21" BEL
"memory_main_0/la_q_20" BEL "memory_main_0/la_q_19" BEL
"memory_main_0/la_q_18" BEL "memory_main_0/la_q_17" BEL
"memory_main_0/la_q_16" BEL "memory_main_0/la_q_15" BEL
"memory_main_0/la_q_14" BEL "memory_main_0/la_q_13" BEL
"memory_main_0/la_q_12" BEL "memory_main_0/la_q_11" BEL
"memory_main_0/la_q_10" BEL "memory_main_0/la_q_9" BEL
"memory_main_0/la_q_8" BEL "memory_main_0/la_q_7" BEL
"memory_main_0/la_q_6" BEL "memory_main_0/la_q_5" BEL
"memory_main_0/la_q_4" BEL "memory_main_0/la_q_3" BEL
"memory_main_0/la_q_2" BEL "memory_main_0/sel_memctl_reg" BEL
"memory_main_0/user_reg_wr_25" BEL "memory_main_0/user_reg_wr_24" BEL
"memory_main_0/user_reg_wr_21" BEL "memory_main_0/user_reg_wr_16" BEL
"memory_main_0/user_reg_wr_20" BEL "memory_main_0/user_reg_wr_13" BEL
"memory_main_0/user_reg_wr_12" BEL "memory_main_0/user_reg_wr_11" BEL
"memory_main_0/user_reg_wr_10" BEL "memory_main_0/sel_user_reg_61" BEL
"memory_main_0/sel_user_reg_60" BEL "memory_main_0/wr_bank_reg" BEL
"memory_main_0/sel_user_reg_32" BEL "memory_main_0/sel_user_reg_6" BEL
"memory_main_0/sel_user_reg_5" BEL "memory_main_0/sel_user_reg_4" BEL
"memory_main_0/status_reg_1" BEL "memory_main_0/sel_user_reg_3" BEL
"memory_main_0/status_reg_0" BEL "memory_main_0/sel_user_reg_2" BEL
"memory_main_0/wr_mode_reg_9" BEL "memory_main_0/sel_user_reg_1" BEL
"memory_main_0/wr_mode_reg_8" BEL "memory_main_0/sel_user_reg_0" BEL
"memory_main_0/wr_mode_reg_7" BEL "memory_main_0/wr_mode_reg_6" BEL
"memory_main_0/wr_mode_reg_5" BEL "memory_main_0/wr_mode_reg_3" BEL
"memory_main_0/wr_mode_reg_4" BEL "memory_main_0/wr_mode_reg_2" BEL
"memory_main_0/wr_mode_reg_1" BEL "memory_main_0/wr_mode_reg_0" BEL
"memory_main_0/mem_wr" BEL "memory_main_0/wr_user_reg_any" BEL
"memory_main_0/reading" BEL "memory_main_0/sel_bank_reg" BEL
"memory_main_0/user_reg_wr_9" BEL "memory_main_0/user_reg_wr_8" BEL
"memory_main_0/user_reg_wr_4" BEL "memory_main_0/wr_mode_reg_15" BEL
"memory_main_0/wr_mode_reg_14" BEL "memory_main_0/wr_mode_reg_13" BEL
"memory_main_0/wr_mode_reg_12" BEL "memory_main_0/wr_mode_reg_11" BEL
"memory_main_0/wr_mode_reg_10" BEL "memory_main_0/user_reg_wr_0" BEL
"memory_main_0/lbe_iq_l_3" BEL "memory_main_0/lbe_iq_l_2" BEL
"memory_main_0/lbe_iq_l_1" BEL "memory_main_0/lbe_iq_l_0" BEL
"memory_main_0/sel_user_reg_any" BEL "memory_main_0/mem_term" BEL
"memory_main_0/sel_status_reg" BEL "memory_main_0/sel_mode_reg_15" BEL
"memory_main_0/sel_mode_reg_14" BEL "memory_main_0/sel_mode_reg_13"
BEL "memory_main_0/sel_mode_reg_12" BEL
"memory_main_0/sel_mode_reg_11" BEL "memory_main_0/sel_mode_reg_10"
BEL "memory_main_0/sel_bank_1h_3" BEL "memory_main_0/sel_bank_1h_2"
BEL "memory_main_0/sel_bank_1h_1" BEL "memory_main_0/wr_memctl_reg"
BEL "memory_main_0/sel_bank_1h_0" BEL "memory_main_0/mem_adv" BEL
"memory_main_0/sel_memstat_reg" BEL "memory_main_0/sel_mode_reg_9" BEL
"memory_main_0/sel_mode_reg_8" BEL "memory_main_0/sel_mode_reg_7" BEL
"memory_main_0/sel_mode_reg_6" BEL "memory_main_0/sel_mode_reg_5" BEL
"memory_main_0/sel_mode_reg_3" BEL "memory_main_0/sel_mode_reg_2" BEL
"memory_main_0/sel_mode_reg_4" BEL "memory_main_0/sel_mode_reg_1" BEL
"memory_main_0/sel_mode_reg_0" BEL "memory_main_0/dssm/state_FFd1" BEL
"memory_main_0/dssm/state_FFd2" BEL "memory_main_0/dssm/lready_oe_l"
BEL "memory_main_0/dssm/stopping" BEL "memory_main_0/dssm/i_transfer"
BEL "memory_main_0/dssm/lready_o_l" BEL "memory_main_0/dssm/i_write"
BEL "memory_main_0/dssm/i_decode" BEL
"memory_main_0/spd_i2c_0/state1_FFd3" BEL
"memory_main_0/spd_i2c_0/state1_FFd1" BEL
"memory_main_0/spd_i2c_0/state1_FFd2" BEL
"memory_main_0/spd_i2c_0/state1_FFd8" BEL
"memory_main_0/spd_i2c_0/state1_FFd14" BEL
"memory_main_0/spd_i2c_0/state1_FFd20" BEL
"memory_main_0/spd_i2c_0/state1_FFd34" BEL
"memory_main_0/spd_i2c_0/state2_FFd1" BEL
"memory_main_0/spd_i2c_0/state2_FFd2" BEL
"memory_main_0/spd_i2c_0/rddata_7" BEL
"memory_main_0/spd_i2c_0/rddata_6" BEL
"memory_main_0/spd_i2c_0/rddata_5" BEL
"memory_main_0/spd_i2c_0/rddata_4" BEL
"memory_main_0/spd_i2c_0/rddata_3" BEL
"memory_main_0/spd_i2c_0/rddata_2" BEL
"memory_main_0/spd_i2c_0/rddata_1" BEL
"memory_main_0/spd_i2c_0/rddata_0" BEL
"memory_main_0/spd_i2c_0/sladdr_6" BEL
"memory_main_0/spd_i2c_0/sladdr_4" BEL
"memory_main_0/spd_i2c_0/count2_2" BEL "memory_main_0/spd_i2c_0/tc1"
BEL "memory_main_0/spd_i2c_0/a_q_7" BEL
"memory_main_0/spd_i2c_0/a_q_6" BEL "memory_main_0/spd_i2c_0/a_q_5"
BEL "memory_main_0/spd_i2c_0/a_q_4" BEL
"memory_main_0/spd_i2c_0/a_q_3" BEL "memory_main_0/spd_i2c_0/a_q_2"
BEL "memory_main_0/spd_i2c_0/a_q_1" BEL
"memory_main_0/spd_i2c_0/a_q_0" BEL "memory_main_0/spd_i2c_0/i_scl"
BEL "memory_main_0/spd_i2c_0/ack" BEL "memory_main_0/spd_i2c_0/tc" BEL
"memory_main_0/spd_i2c_0/i_sda" BEL "memory_main_0/spd_i2c_0/sda_iq"
BEL "memory_main_0/spd_i2c_0/devaddr_7" BEL
"memory_main_0/spd_i2c_0/devaddr_6" BEL
"memory_main_0/spd_i2c_0/devaddr_5" BEL
"memory_main_0/spd_i2c_0/devaddr_4" BEL
"memory_main_0/spd_i2c_0/devaddr_3" BEL
"memory_main_0/spd_i2c_0/devaddr_2" BEL
"memory_main_0/spd_i2c_0/devaddr_1" BEL
"memory_main_0/spd_i2c_0/devaddr_0" BEL
"memory_main_0/spd_i2c_0/scl_iq" BEL
"memory_main_0/spd_i2c_0/bitcnt_2" BEL
"memory_main_0/spd_i2c_0/bitcnt_1" BEL
"memory_main_0/spd_i2c_0/bitcnt_0" BEL
"memory_main_0/spd_i2c_0/trig_2" BEL "memory_main_0/spd_i2c_0/sa_q_2"
BEL "memory_main_0/spd_i2c_0/sa_q_1" BEL
"memory_main_0/spd_i2c_0/sa_q_0" BEL "memory_main_0/spd_i2c_0/i_busy"
BEL "memory_main_0/user_reg_sync_0/reg_sync_0/o_0" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_32" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_64" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_65" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_66" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_67" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_68" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_69" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_70" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_71" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_72" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_73" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_74" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_75" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_76" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_77" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_78" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_79" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_80" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_81" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_82" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_83" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_84" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_85" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_86" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_87" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_88" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_89" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_90" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_91" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_92" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_93" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_94" BEL
"memory_main_0/user_reg_sync_0/reg_sync_0/o_95" BEL
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"memory_main_0/memory_banks_0/gen_async_ports[3].async_port_0/ofifo/mem_rd_idx_0"
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"memory_main_0/memory_banks_0/gen_async_ports[3].async_port_0/ififo/write_state2_0"
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